WO2020224379A1 - 显示基板及其驱动方法、显示装置 - Google Patents

显示基板及其驱动方法、显示装置 Download PDF

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Publication number
WO2020224379A1
WO2020224379A1 PCT/CN2020/084284 CN2020084284W WO2020224379A1 WO 2020224379 A1 WO2020224379 A1 WO 2020224379A1 CN 2020084284 W CN2020084284 W CN 2020084284W WO 2020224379 A1 WO2020224379 A1 WO 2020224379A1
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Prior art keywords
sub
display substrate
control signal
pixels
display
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PCT/CN2020/084284
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English (en)
French (fr)
Inventor
刘宗民
段立业
侯孟军
王龙
黄继景
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京东方科技集团股份有限公司
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Publication of WO2020224379A1 publication Critical patent/WO2020224379A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display substrate, a driving method thereof, and a display device.
  • LCD liquid crystal display
  • the display substrate can be divided into two display areas.
  • a display area can use an edge-type backlight source to provide backlight, and the display area can adopt optical waveguide technology to achieve transparent color display, and the camera of the terminal can be set under the display area.
  • Another display area can use a direct-lit backlight to provide backlighting.
  • each pixel in the display area where the edge-type backlight is used to provide the backlight displays a different color at different time periods, it is necessary to use a higher refresh frequency to time-sharing each pixel to achieve color display. Since each pixel in the display area where the direct-lit backlight provides backlight includes multiple sub-pixels of different colors, a lower refresh rate can be used to light up multiple sub-pixels in each pixel at the same time, that is, color display can be realized .
  • the present disclosure provides a display substrate, a driving method thereof, and a display device.
  • the technical solutions are as follows:
  • a display substrate in one aspect, includes a plurality of switch circuits, a plurality of first pixels located in a first display area, and a plurality of second pixels located in a second display area, each of which is The second pixel includes a plurality of sub-pixels of different colors;
  • the first pixels in each column are connected to a first data line, and the sub-pixels in each column are connected to a second data line;
  • Each of the switch circuits is respectively connected to a control signal terminal, one of the first data line, and a plurality of the second data lines, and each of the switch circuits is used to control the control signal in response to the control signal from the control signal terminal.
  • the colors of the sub-pixels connected to any two of the second data lines are different.
  • the multiple second data lines connected to each of the switch circuits are respectively connected to multiple columns of the sub-pixels included in the second pixels located in the same column.
  • a column of the first pixels connected to the first data line is connected to a plurality of The row of the second pixels connected to the second data line is located in the same row.
  • each of the switch circuits includes multiple switch sub-circuits
  • the control signal terminal includes multiple sub-control signal terminals
  • the number of switch sub-circuits included in each switch circuit and the control signal terminal The number of sub-control signal terminals included is the same as the number of sub-pixels included in each second pixel;
  • Each of the switch sub-circuits is connected to one of the sub-control signal terminals, one of the first data line, and one of the second data lines, and each of the switch sub-circuits is configured to respond to the control signal from the sub-control The control signal of the signal terminal controls the on-off between the first data line and the second data line connected to it.
  • any two of the switch sub-circuits connected to the sub-pixels of the same color are connected to the same sub-control signal terminal.
  • each switch sub-circuit includes: a switch transistor
  • each switch transistor is connected to one of the sub-control signal terminals, the first pole of each switch transistor is connected to one of the first data lines, and the second pole of each switch transistor is connected to One of the second data lines is connected.
  • each of the second pixels includes three sub-pixels of different colors, and each of the switch circuits is connected to three of the second data lines.
  • the number of switch circuits included in the display substrate is the same as the number of columns of first pixels included in the first display area.
  • the plurality of switch circuits are located between the first display area and the second display area.
  • a method for driving a display substrate which is applied to the display substrate as described in the above aspect, and the method includes:
  • a control signal is provided to the control signal terminal in the display substrate, and each switch circuit controls the conduction of the first data line and the second data line connected to it in response to the control signal.
  • each second pixel includes a plurality of sub-pixels
  • each of the switch circuits includes a plurality of switch sub-circuits
  • the control signal terminal includes a plurality of sub-control signal terminals; the control signal to the display substrate The terminal provides control signals, including:
  • a control signal is sequentially provided to the plurality of sub-control signal terminals in the display substrate, and each of the switch sub-circuits controls one of the first data lines and one of the connected first data lines in response to the received control signal.
  • the second data line is turned on.
  • the time periods for providing control signals to any two of the sub-control signal terminals do not overlap with each other.
  • the providing data signals to the plurality of first data lines or the plurality of second data lines in the display substrate includes: providing data signals to the plurality of first data lines in the display substrate .
  • a display device comprising: the display substrate as described in the above aspect, and a driving circuit connected to the display substrate.
  • the driving circuit includes: a source driving circuit, a gate driving circuit, and a control circuit;
  • the gate driving circuit is connected to a plurality of gate lines in the display substrate, the source driving circuit is connected to a plurality of first data lines or a plurality of second data lines in the display substrate, and the control The circuit is connected to the control signal terminal in the display substrate;
  • the gate drive circuit is used to provide gate drive signals to the multiple gate lines
  • the source drive circuit is used to provide data signals to multiple data lines connected to it
  • the control circuit is used to provide The control signal terminal provides a control signal.
  • the source driving circuit is located on a side of the display substrate close to the first display area, and is connected to a plurality of first data lines in the first display area.
  • control circuit is integrated with the gate drive circuit.
  • the display device further includes: an edge-type backlight source and a direct-type backlight source;
  • the edge-lit backlight is arranged on the side surface of the display substrate, and is used to provide backlight for the first pixels in the first display area of the display substrate;
  • the direct type backlight source is arranged on the side of the display substrate away from the light-emitting surface, and is used to provide backlight for the second pixels in the second display area of the display substrate.
  • the edge-lit backlight source is a color backlight source.
  • the display device further includes: a direct-lit backlight provided on a side of the display substrate away from the light-emitting surface;
  • the direct type backlight is a color backlight, which is used to provide backlights for the first pixels in the first display area of the display substrate and the second pixels in the second display area of the display substrate.
  • FIG. 1 is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 3 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 4 is a schematic structural diagram of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 5 is a schematic structural diagram of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 6 is a flowchart of a method for driving a display substrate provided by an embodiment of the present disclosure
  • FIG. 7 is a timing diagram of each signal terminal in a display substrate provided by an embodiment of the present disclosure.
  • FIG. 8 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of another display device provided by an embodiment of the present disclosure.
  • the transistors used in all the embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same characteristics.
  • the transistors used in the embodiments of the present disclosure are mainly switching transistors. Since the source and drain of the switching transistor used here are symmetrical, the source and drain are interchangeable.
  • the source electrode is referred to as the first electrode and the drain electrode is referred to as the second electrode; alternatively, the drain electrode may be referred to as the first electrode and the source electrode is referred to as the second electrode.
  • the middle end of the transistor is the gate, the signal input end is the source, and the signal output end is the drain.
  • the switching transistors used in the embodiments of the present disclosure may include any one of a P-type switching transistor and an N-type switching transistor, wherein the P-type switching transistor is turned on when the gate is low and turned off when the gate is high. , The N-type switching transistor is turned on when the gate is high, and it is turned off when the gate is low.
  • multiple signals in each embodiment of the present disclosure correspond to effective potentials and ineffective potentials.
  • the effective potential and the ineffective potential only represent that the signal’s potential has two different state quantities. It does not mean that the effective or ineffective potential in the full text has Specific value.
  • the packaging technology may include: the technology of driving integrated circuit (Integrated Circuit, IC) fixed on the glass substrate (chip on glass, COG), the technology of driving IC fixed on the chip on film (COF), and A technology in which a driver IC is fixed on a flexible substrate (chip on Pi, COP).
  • the driver IC may refer to a source driver circuit that provides data signals for data lines in a display substrate.
  • the existence of hardware structures such as the front camera still has a greater impact on the realization of the full screen.
  • Embodiments of the present disclosure provide a display substrate, which includes a display area capable of achieving color transparent display.
  • the front camera can be set in the display area, so as to avoid affecting the sensitivity of the front camera on the premise of realizing a full screen.
  • the display substrate may be divided into a first display area A1 and a second display area A2.
  • the first display area A1 is provided with a plurality of first pixels
  • the second display area A2 is provided with a plurality of second pixels. Pixels.
  • an edge-type backlight source may be used to provide backlight for the first pixel in the first display area A1
  • a direct-type backlight source may be used to provide backlight for the second pixel in the second display area A2.
  • Each first pixel may be a monochrome pixel, that is, does not include sub-pixels.
  • Each second pixel may include a plurality of sub-pixels of different colors.
  • the edge-lit backlight that provides backlight for the first pixels in the first display area A1 may be a color backlight, which can provide backlights of different colors at different time periods, so that each first pixel can be used at different times.
  • the segments display different colors respectively, thereby achieving color display.
  • the first display area since each of the first pixels included in it displays different colors in different time periods, in order to avoid human eyes perception and realize normal color display, it is necessary to use a higher refresh rate to light up each first pixel in time sharing.
  • One pixel to achieve color display That is, light sources of different colors are used to light up all the first pixels in different time periods.
  • This driving method can be called field sequential display.
  • the second display area A2 since each second pixel includes multiple sub-pixels of different colors, it is only necessary to use a lower refresh rate to simultaneously light up multiple sub-pixels of different colors included in each second pixel. Realize color display.
  • each first pixel in the first display area A1 since each first pixel in the first display area A1 does not include a sub-pixel, each first pixel may include only one thin film transistor. Since each second pixel in the second display area A2 includes a plurality of sub-pixels of different colors, and each sub-pixel includes one thin film transistor, each second pixel may include the same number of sub-pixels as a plurality of thin film transistors.
  • the ratio of the refresh rate corresponding to the first display area A1 to the refresh rate corresponding to the second display area A2 can be compared with the density of the thin film transistors in the second display area A2 It is the same as the ratio of the density of the thin film transistors in the first display area A1. That is, the ratio of the refresh rates of the two display areas may be equal to the number of sub-pixels included in each second pixel in the second display area.
  • each pixel in the second display area A2 includes three sub-pixels of different colors
  • the number of thin film transistors included in the second display area A2 is The first display area A1 includes three times the number of thin film transistors.
  • the refresh rate corresponding to the first display area A1 is three times the refresh rate corresponding to the second display area A2. If a refresh rate of 60 Hz (Hz) is used to refresh the pixels included in the second display area A2, a refresh rate of 180 Hz needs to be used to refresh the pixels included in the first display area A1.
  • Hz 60 Hz
  • the first display area A1 and the second display area A2 have a large difference in refresh frequency requirements, it is necessary to use two source drive circuits to drive the two display areas separately in the related art, which requires two packaging processes (such as COF Process) To package the two source driving circuits, the manufacturing process is more complicated and the production cost is higher.
  • the embodiments of the present disclosure provide a display substrate, which requires only one source driving circuit to write data signals to all pixels included in two display regions of the display substrate.
  • only one packaging process is required to package the source driving circuit, the manufacturing process (such as the module production process) is simple, the production cost is low, and the product yield is high.
  • FIG. 2 is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure.
  • the display substrate may include a plurality of switch circuits 10, a plurality of first pixels 20 located in the first display area A1, and a plurality of second pixels 30 located in the second display area A2.
  • each second pixel 30 may also include a plurality of sub-pixels 301 of different colors.
  • each second pixel 30 shown in Fig. 2 includes three sub-pixels 301 of different colors.
  • each column of first pixels 20 may be connected to one first data line D1, and each column of sub-pixels 301 may be connected to one second data line D2.
  • Each switch circuit 10 can be respectively connected to the control signal terminal S1, a first data line D1 and a plurality of second data lines D2.
  • Each switch circuit 10 can respond to a control signal from the control signal terminal S1 to control the on-off between a first data line D1 and each second data line D2 connected to it.
  • the colors of the sub-pixels 301 connected to any two second data lines D2 are different.
  • control signal terminal S1 connected to each switch circuit 10 may be the same or different.
  • each switch circuit 10 can control one first data line D1 and a plurality of second data lines D2 to be turned on respectively. That is, in the same time period, each switch circuit 10 can only control one first data line D1 and one second data line D2 to be turned on.
  • each switch circuit 10 may be connected to the control signal terminal S1, one first data line D1, and three second data lines D2, and the colors of the sub-pixels 301 connected to the three second data lines D2 are different.
  • a plurality of first data lines D1 in the display substrate can be connected to a source driving circuit, and each switch circuit 10 can control one first data line D1 and three second data lines when the control signal terminal S1 provides a control signal.
  • Each second data line D2 in the line D2 is turned on sequentially, and in the same time period, only one first data line D1 and one second data line D2 are controlled to be turned on.
  • each switch circuit 10 can transmit the data signal provided by the source driving circuit to the first data line D1 to the second data line D2 which is connected to the first data line D1.
  • switch circuit 10 can control the conduction of the first data line D1 and the second data line D2, only one source driving circuit is required to provide data signals to the first data line D1 or the second data line D2, which can realize The data line writes data signals.
  • each first pixel 20 displays different colors in different time periods, and accordingly, the magnitude of the data signal provided by the source driving circuit for the first data line D1 in different time periods may be different. Therefore, when the source driving circuit is connected to the first data line D1, if the colors of the sub-pixels 301 connected to the second data lines D2 connected to the same switch circuit 10 are the same, it may cause writing to sub-pixels of the same color.
  • the data signal is different, that is, the reliable writing of the data signal cannot be guaranteed.
  • each second pixel 30 includes sub-pixels 301 of different colors, correspondingly, the source driving circuit provides the same size of the data signal for the second data line D2 connected to the sub-pixels of the same color. Therefore, when the source driving circuit is connected to the second data line D2, if the colors of the sub-pixels 301 connected to the second data line D2 connected to the same switch circuit 10 are the same, it may cause the The data signals provided by the data lines D1 are all the same in size, and therefore, it cannot be guaranteed that the first display area A1 normally displays a color image.
  • the embodiments of the present disclosure provide a display substrate.
  • the display substrate includes a plurality of switching circuits.
  • Each switching circuit can control a first data line and a plurality of second data lines to be turned on, respectively.
  • the colors of the sub-pixels connected to the second data line are different. Therefore, it is only necessary to provide data signals to the first data line or the second data line, that is, it is possible to provide data signals to all the data lines in the display substrate, that is, to realize data signal writing to all pixels included in the display substrate.
  • only one source driving circuit is required to control the normal display of the display substrate.
  • the manufacturing process of the display device is relatively simple and the production cost is low.
  • FIG. 3 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the switch circuit 10 may be located in an area between the first display area A1 and the second display area A2.
  • the source driving circuit L0 is located on a side of the display substrate close to the first display area A1, and is connected to a plurality of first data lines D1 in the first display area A1.
  • the manufacturing process of the display device is simpler and the production cost is lower.
  • the multiple second data lines D2 connected to each switch circuit 10 may be respectively connected to multiple columns of sub-pixels 301 included in the second pixels 30 located in the same column.
  • the first switch circuit 10 from the left is connected to the first second data line D2 to the third second data line D2 from the left, and the first second data line D2 to the third
  • the three columns of sub-pixels 301 connected to the second data line D2 are the three columns of sub-pixels 301 included in the second pixel 30 in the first column from the left.
  • the multiple second data lines D2 connected to each switch circuit 10 may also be respectively connected to multiple columns of sub-pixels 301 included in the second pixels 30 located in different columns.
  • the sub-pixels 301 in the same column have the same color
  • the three columns of sub-pixels 301 in the second pixel 30 in one column are red sub-pixels and green sub-pixels. Pixels and blue sub-pixels.
  • the three second data lines D2 connected to the first switch circuit 10 can be connected to a column of red sub-pixels 301 in the first column of second pixels 30, and a column of green sub-pixels 301 in the second column of second pixels 30, respectively.
  • a row of blue sub-pixels 301 in the second pixel 30 in the third row are connected.
  • a column of first pixels 20 connected to the first data line D1 and multiple A column of second pixels 30 connected to a second data line D2 may be located in the same column.
  • the first data line D1 connected to the first switch circuit 10 is connected to the first pixel 20 in the first column from the left, and the three second data lines D2 connected to the first switch circuit 10 are also It is connected to three columns of sub-pixels 301 included in the second pixel 30 located in the first column.
  • first data line D1 and multiple second data lines D2 connected to the same switch circuit 10 a column of first pixels 20 connected to the first data line D1 and multiple second data lines D2 A connected column of second pixels 30 can also be located in different columns.
  • first data line D1 connected to the first switch circuit 10 is connected to the first pixel 20 in the first column, and the first switch circuit 10 connects three pieces of second data
  • the line D2 may be connected to the three columns of sub-pixels 301 included in the second pixel 30 located in the second column.
  • FIG. 4 is a schematic structural diagram of still another display substrate provided by an embodiment of the present disclosure.
  • each switch circuit 10 may include multiple switch sub-circuits 101
  • the control signal terminal S1 may include multiple sub-control signal terminals.
  • the number of switch sub-circuits 101 included in each switch circuit 10 and the number of sub-control signal terminals included in the control signal terminal S1 are the same as the number of sub-pixels 301 included in each second pixel 30.
  • Each switch sub-circuit 101 can be respectively connected to a sub-control signal terminal, a first data line D1 and a second data line D2. Each switch sub-circuit 101 can control the on-off between a first data line D1 and a second data line D2 connected to it in response to a control signal from a sub-control signal terminal.
  • each second pixel 30 in the display substrate includes three sub-pixels 301 of different colors.
  • each switch circuit 10 includes three switch sub-circuits 101, and the control signal terminal S1 includes three sub-pixels.
  • the three sub-control signal terminals S1_1, S1_2, and S1_3 can provide control signals with no overlap at all.
  • the sub-control signal terminals S1_2 and S1_3 stop providing control signals;
  • the sub-control signal terminal S1_2 stops providing a control signal, the sub-control signal terminal S1_2 provides a control signal again;
  • the sub-control signal terminal S1_3 provides a control signal again.
  • any two switch sub-circuits 101 connected to sub-pixels of the same color may be connected to the same sub-control signal terminal.
  • the first switch sub-circuit 101 from the left in each switch circuit 10 can be connected to the sub-control signal terminal S1_1, a first data line D1 and a second data line D2, and the second The data line D2 is connected to a column of red sub-pixels 301.
  • the second switch sub-circuit 101 from the left in each switch circuit 10 can be connected to the sub-control signal terminal S1_2, a first data line D1 and a second data line D2, and the second data line D2 is connected to a column of green
  • the sub-pixels 301 are connected.
  • the third switch sub-circuit 101 from the left in each switch circuit 10 can be connected to the sub-control signal terminal S1_3, a first data line D1 and a second data line D2, and the second data line D2 is connected to a column of blue
  • the color sub-pixels 301 are connected.
  • the source driving circuit is connected to the first data line D1.
  • the first switch sub-circuit 101 in each switch circuit 10 can control a first data line D1 and a second data line D2 connected to it to be turned on.
  • Each first switch sub-circuit 101 can further transmit the data signal provided by the source driving circuit to the first data line D1 to the second data line D2 which is connected to the first data line D1.
  • the second switch sub-circuit 101 in each switch circuit 10 can control the first data line D1 and the second data line D2 connected to it to be turned on.
  • the third switch sub-circuit 101 in each switch circuit 10 can control the first data line D1 and the second data line D2 connected to it to be turned on.
  • the source The driving circuit can provide data signals for each column of red sub-pixels. If the second data line D2 connected to the second switch sub-circuit 101 in each switch circuit 10 is connected to the green sub-pixel, when the sub-control signal terminal S1_2 provides the control signal, the source drive circuit can be for each column The green sub-pixels provide data signals.
  • the source drive circuit can be each The columns of blue sub-pixels provide data signals.
  • the colors of the sub-pixels 301 connected to the multiple second data lines D2 connected to the same switch circuit 10 are different, correspondingly, data needs to be written to each second data line D2 connected to the same switch circuit 10
  • the size of the signal may vary. Therefore, in order to avoid the problem of inaccurate writing of the data signal by each sub-control signal terminal providing the control signal in the same time period, the time periods during which the multiple sub-control signal terminals provide the control signal may not overlap at all, that is, strictly mutually exclusive.
  • FIG. 5 is a schematic structural diagram of still another display substrate provided by an embodiment of the present disclosure. As shown in FIG. 5, each switch sub-circuit 101 may include: a switch transistor M1.
  • each switch transistor M1 can be connected to a sub-control signal terminal, the first pole of each switch transistor M1 can be connected to a first data line D1, and the second pole of each switch transistor M1 can be connected to a second Data line D2 is connected.
  • each switch circuit 10 includes a first switch sub-circuit 101, that is, the gate of the first switch transistor M1 can be connected to the sub-control signal terminal S1_1, and the first pole can be connected to a second data line. D2 connection, the second pole can be connected to the first second data line D2 connected to each second pixel 30.
  • the source driving circuit L0 may be connected to each first data line D1, and the source driving circuit L0 may directly provide a data signal for each first data line D1.
  • Each row of the first pixel 20 and each row of the second pixel 30 can be respectively connected to a gate line G1.
  • the thin film transistors in the first pixel 20 and the thin film transistors in the second pixel 30 can be driven by the gate line G1. Turn on under signal control.
  • each second pixel 30 in the display substrate provided by the embodiment of the present disclosure may include three sub-pixels 301 of different colors.
  • each switch circuit 10 may Connect with three second data lines D2.
  • the number of switch circuits 10 included in the display substrate may be the same as the number of columns of the first pixels 20 included in the first display area A1.
  • the number of switch circuits 10 with the same number as the number of columns of the first pixels 20 can reduce the number of switch circuits 10 required on the premise that data is normally written to all the data lines in the first display area A1 and the second display area A2. The number of, further saves production costs, and is conducive to the realization of narrow borders.
  • the embodiments of the present disclosure provide a display substrate.
  • the display substrate includes a plurality of switching circuits.
  • Each switching circuit can control a first data line and a plurality of second data lines to conduct respectively, and the first The data line is connected to a column of pixels in the first display area, and each second data line is connected to a column of sub-pixels in the second display area. Therefore, the solution provided by the embodiments of the present disclosure only needs to provide data signals to the first data line or the second data line, that is, to provide data signals to all the data lines in the display substrate, that is, to provide data signals to all the pixels included in the display substrate. The writing of the data signal.
  • only one source driving circuit is required to control the normal display of the display substrate.
  • the manufacturing process of the display device is relatively simple and the production cost is low.
  • FIG. 6 is a flowchart of a method for driving a display substrate provided by an embodiment of the present disclosure.
  • the method can be applied to the display substrate shown in any one of FIGS. 2 to 5, and the method can be implemented by a driving circuit of the display substrate
  • the driving circuit may include a source driving circuit, a gate driving circuit and a control circuit. As shown in Figure 6, the method may include:
  • Step 601 Provide gate driving signals to a plurality of gate lines in the display substrate in sequence.
  • a plurality of gate lines in the display substrate may all be connected to the gate driving circuit, and the gate driving circuit may sequentially provide gate driving signals to the first row to the last row of gate lines.
  • Step 602 Provide data signals to a plurality of first data lines or second data lines in the display substrate.
  • a plurality of first data lines in the display substrate may be connected to a source driving circuit, and the source driving circuit may provide a data signal to each first data line.
  • a plurality of second data lines may be connected to the source driving circuit, and the source driving circuit may provide a data signal to each second data line.
  • Step 603 Provide a control signal to the control signal terminal in the display substrate, and each switch circuit controls the conduction of a first data line and a second data line connected to it in response to the control signal.
  • control signal terminal in the display substrate may be connected to the control circuit, and the control circuit may provide a control signal to each control signal terminal.
  • Each switch circuit can be driven by a control signal to control a first data line connected with a second data line to conduct.
  • steps 601 to 603 can be performed synchronously, that is, while the gate driving circuit sequentially provides gate driving signals to the multiple gate lines in the display substrate, the source driving circuit sends the gate driving signals to the display substrate.
  • the plurality of first data lines or second data lines provide data signals, and the control circuit also provides control signals to the control signal terminals in the display substrate.
  • the embodiments of the present disclosure provide a method for driving a display substrate.
  • Each switch circuit included in the display substrate can control one first data line and a plurality of second data lines to be turned on respectively in response to a control signal.
  • the first data line is connected to a column of pixels in the first display area
  • each second data line is connected to a column of sub-pixels in the second display area. Therefore, it is only necessary to provide data signals to the first data line or the second data line, that is, it is possible to provide data signals to all the data lines in the display substrate, that is, to realize data signal writing to all pixels included in the display substrate.
  • only one source drive circuit is required to control the normal display of the display substrate, and the manufacturing process of the display device is relatively simple and the production cost is low.
  • each second pixel may include multiple sub-pixels
  • each switch circuit may include multiple switch sub-circuits
  • the control signal terminal may include multiple sub-control signal terminals.
  • the foregoing step 603 may include:
  • control signals are sequentially provided to a plurality of sub-control signal terminals in the display substrate, and each switch sub-circuit can control a first data line and a second data line connected to it to conduct in response to the received control signal.
  • the time period of the control signal provided by the control circuit to each sub-control signal terminal may not overlap at all, that is, within a time period, the control circuit can only send to one sub-control signal terminal. Provide control signals.
  • each second pixel 30 includes three sub-pixels 301
  • each switch circuit 10 includes three switch sub-circuits 101
  • the control signal terminal includes three control signal terminals S1_1, S1_2, and S1_3.
  • the control circuit can sequentially provide control signals to the three control signal terminals S1_1, S1_2, and S1_3, and the time periods of the control signals provided by the control circuit to the three control signal terminals S1_1, S1_2, and S1_3 do not overlap at all.
  • the switch circuit 10 can sequentially control one first data line D1 and one second data line D2 to be turned on.
  • the source driving circuit is connected to a plurality of first data lines D1.
  • the above step 602 may include: providing data signals to a plurality of first data lines in the display substrate.
  • each first pixel 20 in the first display area A1 is connected to only one first data line D1
  • each second pixel 30 in the second display area A2 includes a plurality of sub-pixels 301 of different colors
  • each column of sub-pixels 301 The pixel 301 is connected to one second data line D2, that is, each second pixel 30 needs to be connected to multiple second data lines D2. Therefore, by connecting the source drive circuit to the first data line D1, the number of data line channels required by the source drive circuit can be reduced, and the demand for the number of source drive circuit channels on the high-resolution display substrate can be reduced. Full screen implementation provides guarantee.
  • the switching transistor M1 is an N-type transistor, and each second pixel 30 includes three sub-pixels 301 arranged in order of red, green, and blue as an example, the display provided by the embodiment of the present disclosure is introduced.
  • the driving principle of the substrate is an N-type transistor, and each second pixel 30 includes three sub-pixels 301 arranged in order of red, green, and blue as an example, the display provided by the embodiment of the present disclosure is introduced.
  • the driving principle of the substrate is the driving principle of the substrate.
  • the display substrate may only use one clock signal.
  • the timing controller first obtains the data signal. After the timing controller obtains the data signal, it can parse the data signal into the data signal corresponding to the red sub-pixel, the data signal corresponding to the green sub-pixel and the data signal corresponding to the blue sub-pixel. Then, the timing controller can output the analyzed three data signals to the source drive circuit, and the source drive circuit provides the data signals to the multiple data lines connected to it according to the refresh rate provided by the timing controller.
  • FIG. 7 is a timing diagram of each signal terminal in a display substrate provided by an embodiment of the present disclosure.
  • the sub-control signal terminal S1_1 provides a control signal.
  • each switch transistor M1 connected to the sub-control signal terminal S1_1 is turned on, and each switch transistor M1 can control its connected
  • One first data line D1 and one second data line D2 are connected to each other, and the second data line D2 is connected to a column of red sub-pixels.
  • the data signal provided by the source driving circuit L0 to the first data line D1 can be transmitted to the second data line D2 connected to the first data line D1 through the switching transistor M1.
  • the source driving circuit L0 provides the data signal corresponding to the red sub-pixel to the first data line D1. Therefore, in the first stage T1, the backlight driving circuit can control the edge-type backlight as the first The display area A1 provides a red backlight, and accordingly, data writing to the first pixel 20 included in the first display area A1 and the red sub-pixel 301 included in the second display area A2 can be realized.
  • the sub-control signal terminal S1_2 provides a control signal.
  • each switch transistor M1 connected to the sub-control signal terminal S1_2 is turned on, and each switch transistor M1 can control a first data line connected to it.
  • D1 is connected to a second data line D2, and the second data line D2 is connected to a column of green sub-pixels.
  • the data signal provided by the source driving circuit L0 to the first data line D1 can be transmitted to the second data line D2 through the switching transistor M1.
  • the source driver circuit L0 provides the data signal corresponding to the green sub-pixel to the first data line D1. Therefore, in the second stage T2, the backlight driver circuit can control the edge-type backlight as the first The display area A1 provides a green backlight, and accordingly, data writing to the first pixel 20 included in the first display area A1 and the green sub-pixel 301 included in the second display area A2 can be realized.
  • the sub-control signal terminal S1_3 provides a control signal. Accordingly, each switch transistor M1 connected to the sub-control signal terminal S1_3 is turned on, and each switch transistor M1 can control a first data line connected to it. D1 is connected to a second data line D2, and the second data line D2 is connected to a column of blue sub-pixels. Furthermore, the data signal provided by the source driving circuit L0 to the first data line D1 can be transmitted to the second data line D2 through the switching transistor M1.
  • the source driving circuit L0 provides the data signal corresponding to the blue sub-pixel to the first data line D1. Therefore, in the third stage T3, the backlight driving circuit can control the edge-type backlight as the first A display area A1 provides a blue backlight. Accordingly, data writing to the first pixel 20 included in the first display area A1 and the blue sub-pixel 301 included in the second display area A2 can be realized.
  • the gate driving circuit can send the first gate line G1 in the first display area A1 to the last gate line G1 in the second display area A2 in sequence.
  • the thin film transistors included in the first row of the first pixel 20 to the last row of the second pixel 30 in the display substrate can be turned on sequentially.
  • the sub-control signal terminals S1_2 and S1_3 do not provide control signals.
  • the sub-control signal terminals S1_1 and S1_3 do not provide control signals.
  • the sub-control signal terminals S1_1 and S1_2 do not provide control signals. That is, the time periods of the control signals provided by the three sub-control signal terminals do not overlap at all.
  • only one switch transistor M1 in each switch circuit 10 is in the enabled state, which ensures the data signal Reliable writing.
  • each sub-control signal terminal needs to scan the second pixel 30 in the second display area A2 in the gate driving circuit.
  • the sub-control signal terminals S1_1, S1_2, and S1_3 may all provide a control signal while the gate driving circuit provides a gate driving signal to the first gate line G1, thereby ensuring that the data signal can be reliably written To the second pixel 30 in the second display area A2.
  • a blanking stage t0 may also be included.
  • the blanking stage t0 may refer to the vertical blanking stage from the completion of driving one frame of picture to the beginning of driving the next frame.
  • the driving of the red sub-picture frame, the green sub-picture frame and the blue sub-picture frame can be completed.
  • the display substrate can display a color picture.
  • the refresh rate of each stage in the first stage T1, the second stage T2 and the third stage T3 may be 180 Hz.
  • the backlight source driving circuit can control the edge-lit backlight after the gate driving circuit scans all the gate lines in the first display area A1.
  • a backlight is provided for the first pixels 20 of the first display area A1. That is, the backlight source driving circuit may control the edge backlight to be the first pixel of the first display area A1 after the gate driving circuit provides the gate driving signal to the last row of gate lines in the first display area A1 20 provides backlighting.
  • the backlight source driving circuit controls the side-lit backlight source to provide backlight for the first pixels 20 in the first display area A1 for a time period, which can be adjusted according to the brightness of the screen to be displayed by the display device.
  • the backlight source driving circuit may control the edge-type backlight source to continue to be the first row of the gate line G1 to the last row of the gate line G1 in the process of providing the gate driving signal to the gate line G1 of the second display area A2.
  • the first pixel 20 of the display area A1 provides a red backlight.
  • the backlight source driving circuit may be in the process of providing the gate driving signal to the gate line G1 to the last line G1 of the second display area A2 by the gate driving circuit, as well as the first stage T1 and the second stage During the blanking period t0 between T2, the edge-lit backlight is controlled to continuously provide a red backlight for the first pixel 20 in the first display area A1.
  • the embodiments of the present disclosure since the embodiments of the present disclosure have both the refresh rate of the pixels included in the first display area A1 and the pixels included in the second display area A2 in the display substrate It is 180 Hz, so only one gate driving circuit is needed to drive all the pixels in the display substrate.
  • the one gate driving circuit can be connected to all the gate lines in the first display area and all the gate lines in the second display area, which further simplifies the manufacturing process and saves production costs.
  • the embodiments of the present disclosure provide a method for driving a display substrate.
  • Each switch circuit included in the display substrate can control a first data line and a plurality of second data lines to be turned on respectively in response to a control signal. . Therefore, it is only necessary to provide data signals to the first data line or the second data line, that is, it is possible to provide data signals to all the data lines in the display substrate, that is, to realize data signal writing to all pixels included in the display substrate.
  • only one source drive circuit is required to control the normal display of the display substrate, and the manufacturing process of the display device is relatively simple and the production cost is low.
  • the display device may include: a display substrate 100 as shown in any one of FIGS. 2 to 5, and a driving circuit connected to the display substrate 100.
  • the driving circuit may include: a source driving circuit L0, a gate driving circuit L1, and a control circuit L2.
  • the gate driving circuit L1 may be connected to a plurality of gate lines G1 in the display substrate 100, and the source driving circuit L0 may be connected to a plurality of first data lines D1 or a plurality of second data lines D1 in the display substrate 100.
  • the two data lines D2 are connected (the source driving circuit L0 shown in FIG. 5 is connected to a plurality of first data lines D1).
  • the control circuit L2 can be connected to the control signal terminal S1 in the display substrate 100 (that is, S1_1 shown in FIG. 5). Connect to S1_3).
  • the gate driving circuit L1 can provide gate driving signals to multiple gate lines G1, the source driving circuit L0 can provide data signals to multiple data lines connected to it, and the control circuit L2 can provide control signals to the control signal terminal S1.
  • the gate driving circuit L1 may be disposed on the display substrate 100.
  • the control circuit L2 may be an integrated circuit provided independently in the display device, or may also be integrated with the gate driving circuit L1. By integrating the control circuit L2 and the gate driving circuit L1, it is possible to prevent the control circuit L2 from occupying an additional area of the display substrate 100, which is beneficial to the realization of a narrow frame display device.
  • the display device may further include: an edge-type backlight source 200 and a direct-type backlight source 300.
  • the edge type backlight 200 may be disposed on the side of the display substrate 100, for example, on the top of the display substrate 100.
  • the edge-lit backlight 200 can provide backlight for the first pixels in the first display area A1 of the display substrate 100.
  • the direct-lit backlight 300 can be arranged on the side of the display substrate 100 away from the light-emitting surface.
  • the direct-lit backlight 300 can A backlight is provided for the second pixels in the second display area A2 of the display substrate 100.
  • the edge-lit backlight source 200 may be a color backlight source. Accordingly, the edge-lit backlight source 200 may provide the first display area A1 Different colors of backlight.
  • the edge-lit backlight 200 may be a color backlight capable of emitting red light, green light, and blue light.
  • each pixel in the second display area A2 includes sub-pixels of different colors, that is, the second display area A2 realizes color display through a color film, so even if the backlight provided by the edge-lit backlight 200 enters the second In the display area A2, the normal display of the second display area A2 will not be affected.
  • the display device may also include only one direct-lit backlight 300 disposed on the side of the display substrate 100 away from the light-emitting surface.
  • the direct type backlight 300 may be a color backlight, and the color backlight may provide backlights for the first pixels in the first display area A1 and the second pixels in the second display area A2 of the display substrate 100.
  • each pixel in the second display area A2 includes sub-pixels of different colors, that is, the second display area A2 realizes color display through a color film, so even if the direct-lit backlight 300 provides backlights of different colors, it does not It will affect the normal display of the second display area A2.
  • the display device can be any product or component with a display function, such as a liquid crystal panel, electronic paper, mobile phone, tablet computer, television, monitor, notebook computer, digital photo frame, navigator, etc.
  • a display function such as a liquid crystal panel, electronic paper, mobile phone, tablet computer, television, monitor, notebook computer, digital photo frame, navigator, etc.

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Abstract

一种显示基板及其驱动方法、显示装置。显示基板包括多个开关电路（10），每个开关电路（10）可以控制一条第一数据线（D1）和多条第二数据线（D2）分别导通，且多条第二数据线（D2）连接的子像素的颜色不同。因此仅需向第一数据线（D1）或第二数据线（D2）提供数据信号，即可以实现向显示基板内的所有数据线均提供数据信号，即实现对显示基板包括的所有像素的数据信号写入。相应的，仅需设置一个源极驱动电路，即可控制显示基板正常显示，显示装置的制造工艺较为简单，生产成本较低。

Description

显示基板及其驱动方法、显示装置
本公开要求于2019年5月9日提交的申请号为201910383221.4、发明名称为“显示基板及其驱动方法、显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及显示技术领域，特别涉及一种显示基板及其驱动方法、显示装置。
背景技术
液晶显示(liquid crystal display，LCD)装置因其分辨率高、重量轻、低能耗和低辐射等优点被广泛应用于显示领域上。
为了实现终端的全面屏设计，显示基板可以划分为两个显示区域。一个显示区域可以使用侧入式背光源提供背光，且该显示区域可以采用光波导技术实现透明彩色显示，终端的摄像头即可设置在该显示区域的下方。另一个显示区域可以使用直下式背光源提供背光。
由于使用侧入式背光源提供背光的显示区域中每个像素在不同时间段显示的颜色不同，因此需要采用较高的刷新频率分时点亮每个像素，从而实现彩色显示。而由于使用直下式背光源提供背光的显示区域中每个像素包括多个不同颜色的子像素，因此可以采用较低的刷新频率同时点亮每个像素中的多个子像素，即可以实现彩色显示。
发明内容
本公开提供了一种显示基板及其驱动方法、显示装置，技术方案如下：
一方面，提供了一种显示基板，所述显示基板包括：多个开关电路，位于第一显示区域的多个第一像素，以及位于第二显示区域的多个第二像素，其中每个所述第二像素包括多个不同颜色的子像素；
每列所述第一像素与一条第一数据线连接，每列所述子像素与一条第二数 据线连接；
每个所述开关电路分别与控制信号端、一条所述第一数据线以及多条所述第二数据线连接，每个所述开关电路用于响应于来自所述控制信号端的控制信号，控制其所连接的一条所述第一数据线与每条所述第二数据线之间的通断；
其中，每个所述开关电路连接的多条所述第二数据线种，任意两条所述第二数据线连接的子像素的颜色不同。
可选的，每个所述开关电路连接的多条所述第二数据线，分别与位于同一列的所述第二像素包括的多列所述子像素连接。
可选的，对于与同一个所述开关电路连接的所述第一数据线和多条所述第二数据线，所述第一数据线所连接的一列所述第一像素，与多条所述第二数据线所连接的一列所述第二像素位于同一列。
可选的，每个所述开关电路包括多个开关子电路，所述控制信号端包括多个子控制信号端，且每个所述开关电路包括的开关子电路的个数和所述控制信号端包括的子控制信号端的个数，均与每个所述第二像素包括的子像素的个数相同；
每个所述开关子电路分别与一个所述子控制信号端、一条所述第一数据线和一条所述第二数据线连接，每个所述开关子电路用于响应于来自所述子控制信号端的控制信号，控制其所连接的一条所述第一数据线和一条所述第二数据线之间的通断。
可选的，与相同颜色的子像素连接的任意两个所述开关子电路，与同一个所述子控制信号端连接。
可选的，每个所述开关子电路包括：一个开关晶体管；
每个所述开关晶体管的栅极与一个所述子控制信号端连接，每个所述开关晶体管的第一极与一条所述第一数据线连接，每个所述开关晶体管的第二极与一条所述第二数据线连接。
可选的，每个所述第二像素包括三个不同颜色的子像素，每个所述开关电路与三条所述第二数据线连接。
可选的，所述显示基板包括的所述开关电路的个数，与所述第一显示区域包括的第一像素的列数相同。
可选的，所述多个开关电路位于所述第一显示区域和所述第二显示区域之 间。
另一方面，提供了一种显示基板的驱动方法，应用于如上述方面所述的显示基板，所述方法包括：
向所述显示基板中的多条栅线依次提供栅极驱动信号；
向所述显示基板中的多条第一数据线或多条第二数据线提供数据信号；
向所述显示基板中的控制信号端提供控制信号，每个开关电路响应于所述控制信号，控制其所连接的一条所述第一数据线与一条所述第二数据线导通。
可选的，每个第二像素包括多个子像素，每个所述开关电路包括多个开关子电路，所述控制信号端包括多个子控制信号端；所述向所述显示基板中的控制信号端提供控制信号，包括：
向所述显示基板中的多个所述子控制信号端依次提供控制信号，每个所述开关子电路响应于接收到的控制信号，控制其所连接的一条所述第一数据线和一条所述第二数据线导通。
可选的，向任意两个所述子控制信号端提供控制信号的时段互不重叠。
可选的，所述向所述显示基板中的多条第一数据线或多条第二数据线提供数据信号，包括：向所述显示基板中的多条所述第一数据线提供数据信号。
又一方面，提供了一种显示装置，所述显示装置包括：如上述方面所述的显示基板，以及与所述显示基板连接的驱动电路。
可选的，所述驱动电路包括：源极驱动电路、栅极驱动电路和控制电路；
所述栅极驱动电路与所述显示基板中的多条栅线连接，所述源极驱动电路与所述显示基板中的多条第一数据线或多条第二数据线连接，所述控制电路与所述显示基板中的控制信号端连接；
所述栅极驱动电路用于向所述多条栅线提供栅极驱动信号，所述源极驱动电路用于向其所连接的多条数据线提供数据信号，所述控制电路用于向所述控制信号端提供控制信号。
可选的，所述源极驱动电路位于所述显示基板靠近第一显示区域的一侧，并与所述第一显示区域内的多条第一数据线连接。
可选的，所述控制电路与所述栅极驱动电路集成设置。
可选的，所述显示装置还包括：侧入式背光源和直下式背光源；
所述侧入式背光源设置在所述显示基板的侧面，用于为所述显示基板的第 一显示区域中的第一像素提供背光；
所述直下式背光源设置在所述显示基板远离出光面的一面，用于为所述显示基板的第二显示区域中的第二像素提供背光。
可选的，所述侧入式背光源为彩色背光源。
可选的，所述显示装置还包括：设置在所述显示基板远离出光面的一面的直下式背光源；
所述直下式背光源为彩色背光源，用于为所述显示基板的第一显示区域中的第一像素，以及所述显示基板的第二显示区域中的第二像素提供背光。
附图说明
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本公开实施例提供的一种显示基板的结构示意图；
图2是本公开实施例提供的另一种显示基板的结构示意图；
图3是本公开实施例提供的又一种显示基板的结构示意图；
图4是本公开实施例提供的再一种显示基板的结构示意图；
图5是本公开实施例提供的再一种显示基板的结构示意图；
图6是本公开实施例提供的一种显示基板的驱动方法流程图；
图7是本公开实施例提供的一种显示基板中各信号端的时序图；
图8是本公开实施例提供的一种显示装置的结构示意图；
图9是本公开实施例提供的另一种显示装置的结构示意图。
具体实施方式
为了使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开实施方式作进一步地详细描述。
本公开所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件，根据在电路中的作用本公开的实施例所采用的晶体管主要为开关晶体管。由于这里采用的开关晶体管的源极、漏极是对称的，所以其源极、 漏极是可以互换的。在本公开实施例中，将其中源极称为第一极，漏极称为第二极；或者，可以将其中漏极称为第一极，源极称为第二极。按附图中的形态规定晶体管的中间端为栅极、信号输入端为源极、信号输出端为漏极。此外，本公开实施例所采用的开关晶体管可以包括P型开关晶体管和N型开关晶体管中的任一种，其中，P型开关晶体管在栅极为低电平时导通，在栅极为高电平时截止，N型开关晶体管在栅极为高电平时导通，在栅极为低电平时截止。
此外，本公开各个实施例中的多个信号都对应有有效电位和无效电位，有效电位和无效电位仅代表该信号的电位有2个不同的状态量，不代表全文中有效电位或无效电位具有特定的数值。
随着全面屏设计的出现，推动了各种显示技术的发展。例如，封装技术，异性屏技术和识别技术。其中，封装技术可以包括：驱动集成电路(Integrated Circuit，IC)固定于玻璃基板上(chip on glass，COG)的技术，驱动IC固定于覆晶薄膜上(chip on film，COF)的技术，以及驱动IC固定于柔性基板上(chip on Pi，COP)的技术，该驱动IC可以是指为显示基板中的数据线提供数据信号的源极驱动电路。但是，前置摄像头等硬件结构的存在还是对全面屏的实现造成了较大影响。本公开实施例提供了一种显示基板，该显示基板包括能够实现彩色透明显示的显示区域。相应的，即可将前置摄像头设置于该显示区域内，从而在实现全面屏的前提下，避免对前置摄像头的感光造成影响。
例如，参考图1，该显示基板可以划分为第一显示区域A1和第二显示区域A2，该第一显示区域A1设置有多个第一像素，该第二显示区域A2设置有多个第二像素。其中，可以采用侧入式背光源为该第一显示区域A1中的第一像素提供背光，以及可以采用直下式背光源为该第二显示区域A2中第二像素提供背光。每个第一像素可以为单色像素，即不包括子像素。每个第二像素可以包括多个不同颜色的子像素。因此，为该第一显示区域A1中的第一像素提供背光的侧入式背光源可以为彩色背光源，其能够在不同时间段提供不同颜色的背光，使得每个第一像素可以在不同时间段分别显示不同的颜色，由此实现彩色显示。
对于第一显示区域，由于其包括的每个第一像素在不同时间段显示的颜色不同，因此为了避免人眼察觉，实现正常彩色显示，需要采用较高的刷新率分时点亮每个第一像素来实现彩色显示。也即是，在不同的时间段内使用不同颜色的光源点亮所有第一像素，该驱动方式可称为场序显示。对于第二显示区域 A2，由于每个第二像素包括多个不同颜色的子像素，因此仅需采用较低的刷新率同时点亮每个第二像素包括的多个不同颜色的子像素即可实现彩色显示。
在本公开实施例中，由于第一显示区域A1中的每个第一像素不包括子像素，因此每个第一像素可以仅包括一个薄膜晶体管。由于第二显示区域A2中的每个第二像素包括多个不同颜色的子像素，每个子像素包括一个薄膜晶体管，因此每个第二像素可以包括与子像素数量相同的多个薄膜晶体管。
当两个显示区域A1和A2的像素密度相同时，该第一显示区域A1对应的刷新率与第二显示区域A2对应的刷新率的比值，可以与第二显示区域A2中的薄膜晶体管的密度与第一显示区域A1中的薄膜晶体管的密度的比值相同。也即是，两个显示区域的刷新率的比值可以等于第二显示区域中每个第二像素包括的子像素的个数。
例如，假设第二显示区域A2中每个像素包括三个不同颜色的子像素，则在两个显示区域A1和A2的像素密度相同时，该第二显示区域A2包括的薄膜晶体管的数量即为第一显示区域A1包括的薄膜晶体管的数量的三倍。相应的，第一显示区域A1对应的刷新率即为第二显示区域A2对应的刷新率的三倍。若采用60赫兹(Hz)的刷新率对第二显示区域A2内包括的像素进行刷新，则需采用180Hz的刷新率对第一显示区域A1内包括的像素进行刷新。
由于第一显示区域A1和第二显示区域A2对刷新频率的需求差异较大，因此相关技术中需要采用两个源极驱动电路分别驱动两个显示区域，进而即需要两次封装工艺(如COF工艺)对两个源极驱动电路进行封装，制造工艺较为复杂，生产成本较高。
本公开实施例提供了一种显示基板，该显示基板仅需一个源极驱动电路即可实现对显示基板中两个显示区域包括的所有像素进行数据信号的写入。相应的，仅需一次封装工艺对源极驱动电路进行封装，制造工艺(如模组生产流程)简单，生产成本较低，且产品良率较高。
图2是本公开实施例提供的一种显示基板的结构示意图。如图2所示，该显示基板可以包括：多个开关电路10，位于第一显示区域A1的多个第一像素20，以及位于第二显示区域A2的多个第二像素30。并且，参考图2，每个第二像素30还可以包括多个不同颜色的子像素301，例如，图2示出的每个第二像 素30包括3个不同颜色的子像素301。
如图2所示，每列第一像素20可以与一条第一数据线D1连接，每列子像素301可以与一条第二数据线D2连接。每个开关电路10可以分别与控制信号端S1、一条第一数据线D1以及多条第二数据线D2连接。每个开关电路10均可以响应于来自控制信号端S1的控制信号，控制其所连接的一条第一数据线D1与每条第二数据线D2之间的通断。其中，每个开关电路10连接的多条第二数据线D2中，任意两条第二数据线D2连接的子像素301的颜色不同。
可选的，各个开关电路10所连接的控制信号端S1可以相同，也可以不同。且每个开关电路10可以控制一条第一数据线D1和多条第二数据线D2分别导通。也即是，在同一时间段，每个开关电路10仅可以控制一条第一数据线D1与一条第二数据线D2导通。
示例的，参考图2，每个开关电路10可以分别与控制信号端S1、一条第一数据线D1以及三条二数据线D2连接，且该三条第二数据线D2连接的子像素301的颜色不同。并且，该显示基板中的多条第一数据线D1可以与源极驱动电路连接，每个开关电路10可以在控制信号端S1提供控制信号时，控制一条第一数据线D1与三条第二数据线D2中的每条第二数据线D2依次导通，且在同一时间段，仅控制一条第一数据线D1与一条第二数据线D2导通。进而，每个开关电路10可以将源极驱动电路向第一数据线D1提供的数据信号传输至与第一数据线D1导通的第二数据线D2。
由于开关电路10可以控制第一数据线D1与第二数据线D2导通，因此仅需设置一个源极驱动电路向第一数据线D1或第二数据线D2提供数据信号，即可以实现对所有数据线写入数据信号。
并且，由于为了实现正常彩色显示，每个第一像素20在不同时间段显示的颜色不同，相应的，源极驱动电路在不同时间段为第一数据线D1提供的数据信号的大小可能不同。因此当源极驱动电路与第一数据线D1连接时，若与同一个开关电路10连接的各条第二数据线D2连接的子像素301的颜色相同，可能导致写入至同一颜色的子像素的数据信号不同，即无法保证数据信号的可靠写入。
由于每个第二像素30包括不同颜色的子像素301，相应的，源极驱动电路为与相同颜色子像素连接的第二数据线D2提供的数据信号的大小相同。因此当源极驱动电路与第二数据线D2连接时，若与同一个开关电路10连接的各条第 二数据线D2连接的子像素301的颜色相同，可能会导致在不同时间段向第一数据线D1提供的数据信号的大小均相同，进而无法保证第一显示区域A1正常显示彩色画面。
综上，通过使得与同一个开关电路10连接的各条第二数据线D2所连接的子像素301的颜色不同，可以有效保证显示基板的显示效果。
综上所述，本公开实施例提供了一种显示基板，该显示基板包括多个开关电路，每个开关电路可以控制一条第一数据线和多条第二数据线分别导通，且该多条第二数据线连接的子像素的颜色不同。因此仅需向第一数据线或第二数据线提供数据信号，即可以实现向显示基板中的所有数据线均提供数据信号，即实现对显示基板包括的所有像素的数据信号写入。相应的，仅需设置一个源极驱动电路，即可控制显示基板正常显示，显示装置的制造工艺较为简单，生产成本较低。
可选的，图3是本公开实施例提供的又一种显示基板的结构示意图。如图2和图3所示，该开关电路10可以位于第一显示区域A1和第二显示区域A2之间的区域。源极驱动电路L0位于显示基板靠近第一显示区域A1的一侧，并与第一显示区域A1内的多条第一数据线D1连接。相对于相关技术中需要设置两个源极驱动电路分别与第一数据线D1和第二数据线D2连接，该显示装置的制造工艺更为简单，生产成本更低。
可选的，在本公开实施例中，每个开关电路10连接的多条第二数据线D2，可以分别与位于同一列的第二像素30包括的多列子像素301连接。
例如，参考图2，左起第一个开关电路10分别与左起第一条第二数据线D2至第三条第二数据线D2连接，该第一条第二数据线D2至第三条第二数据线D2所连接的三列子像素301为左起第一列第二像素30包括的三列子像素301。
通过使每个开关电路10连接的多条第二数据线D2分别与位于同一列的第二像素30包括的多列子像素301连接，可以有效简化布线工艺，节省布线空间。
需要说明的是，每个开关电路10连接的多条第二数据线D2，也可以分别与位于不同列的第二像素30所包括的多列子像素301连接。例如，结合图2所示的显示基板，假设第二显示区域A2中，位于同一列的子像素301的颜色相同，且一列第二像素30中的三列子像素301分别为红色子像素、绿色子像素和蓝色 子像素。则该第一个开关电路10所连接的三条第二数据线D2可以分别与第一列第二像素30中的一列红色子像素301，第二列第二像素30中的一列绿色子像素301，以及第三列第二像素30中的一列蓝色子像素301连接。
可选的，在本公开实施例中，对于与同一个开关电路10连接的第一数据线D1和多条第二数据线D2，第一数据线D1所连接的一列第一像素20，与多条第二数据线D2连接的一列第二像素30可以位于同一列。
例如，参考图2，第一个开关电路10连接的第一数据线D1与位于左起第一列的第一像素20连接，且该第一个开关电路10连接的三条第二数据线D2也与位于第一列的第二像素30包括的三列子像素301连接。
通过使得每个开关电路10连接的第一数据线D1和第二数据线D2，与位于同一列的第一像素20和第二像素30连接，可以进一步有效简化布线工艺，节省布线空间。
需要说明的是，对于与同一个开关电路10连接的第一数据线D1和多条第二数据线D2，第一数据线D1所连接的一列第一像素20，与多条第二数据线D2连接的一列第二像素30也可以位于不同列。例如，结合图2所示的显示基板，第一个开关电路10连接的第一数据线D1与位于第一列的第一像素20连接，而该第一个开关电路10连接的三条第二数据线D2则可以与位于第二列的第二像素30包括的三列子像素301连接。
可选的，图4是本公开实施例提供的再一种显示基板的结构示意图。如图4所示，每个开关电路10可以包括多个开关子电路101，控制信号端S1可以包括多个子控制信号端。并且，每个开关电路10包括的开关子电路101的个数和控制信号端S1包括的子控制信号端的个数，均与每个第二像素30包括的子像素301的个数相同。
每个开关子电路101可以分别与一个子控制信号端、一条第一数据线D1和一条第二数据线D2连接。每个开关子电路101可以响应于来自子控制信号端的控制信号，控制其连接的一条第一数据线D1和一条第二数据线D2之间的通断。
例如，参考图4，该显示基板中的每个第二像素30包括三个不同颜色的子像素301，相应的，每个开关电路10包括三个开关子电路101，控制信号端S1包括三个子控制信号端S1_1、S1_2和S1_3。且该三个子控制信号端S1_1、S1_2和S1_3提供控制信号的时间段可以完全不重叠，即在子控制信号端S1_1提供 控制信号时，子控制信号端S1_2和S1_3均停止提供控制信号；在子控制信号端S1_1停止提供控制信号时，子控制信号端S1_2再提供控制信号；在子控制信号端S1_2停止提供控制信号时，子控制信号端S1_3再提供控制信号。
可选的，在本公开实施例中，与相同颜色的子像素连接的任意两个开关子电路101，可以与同一个子控制信号端连接。
例如，参考图4，每个开关电路10中的左起第一个开关子电路101可以与子控制信号端S1_1，一条第一数据线D1和一条第二数据线D2连接，且该条第二数据线D2与一列红色子像素301连接。每个开关电路10中的左起第二个开关子电路101可以与子控制信号端S1_2，一条第一数据线D1和一条第二数据线D2连接，且该条第二数据线D2与一列绿色子像素301连接。每个开关电路10中的左起第三个开关子电路101可以与子控制信号端S1_3，一条第一数据线D1和一条第二数据线D2连接，且该条第二数据线D2与一列蓝色子像素301连接。
源极驱动电路与第一数据线D1连接。在子控制信号端S1_1提供控制信号时，每个开关电路10中的第一个开关子电路101可以控制其所连接的一条第一数据线D1和一条第二数据线D2导通。每个第一开关子电路101进而可以将源极驱动电路向第一数据线D1提供的数据信号，传输至与第一数据线D1导通的第二数据线D2。在子控制信号端S1_2提供控制信号时，每个开关电路10中的第二个开关子电路101可以控制其所连接的一条第一数据线D1和一条第二数据线D2导通。在子控制信号端S1_3提供控制信号时，每个开关电路10中的第三个开关子电路101可以控制其所连接的一条第一数据线D1和一条第二数据线D2导通。
如图4所示，若每个开关电路10中的第一个开关子电路101所连接的第二数据线D2均与红色子像素连接，则在子控制信号端S1_1提供控制信号时，源极驱动电路可以为各列红色子像素提供数据信号。若每个开关电路10中的第二个开关子电路101所连接的第二数据线D2均与绿色子像素连接，则在子控制信号端S1_2提供控制信号时，源极驱动电路可以为各列绿色子像素提供数据信号。若每个开关电路10中的第三个开关子电路101所连接的第二数据线D2均与红色子像素连接，则在该子控制信号端S1_3提供控制信号时，源极驱动电路可以为各列蓝色子像素提供数据信号。
由于与同一个开关电路10连接的多条第二数据线D2所连接的子像素301的颜色不同，相应的，需要写入至与同一个开关电路10连接的各条第二数据线D2的数据信号的大小可能不同。因此为了避免各个子控制信号端在同一时间段提供控制信号，造成数据信号写入不准确的问题，该多个子控制信号端提供控制信号的时间段可以完全不重叠，即严格互斥。
并且，通过设置与每个第二像素30包括的子像素301的个数相同的多个开关子电路101，可以在保证将数据信号写入至每条第二数据线D2，即保证显示基板正常显示的前提下，节省设置的开关子电路101的数量。
图5是本公开实施例提供的再一种显示基板的结构示意图。如图5所示，每个开关子电路101可以包括：一个开关晶体管M1。
每个开关晶体管M1的栅极可以与一个子控制信号端连接，每个开关晶体管M1的第一极可以与一条第一数据线D1连接，每个开关晶体管M1的第二极可以与一条第二数据线D2连接。
例如，参考图5，每个开关电路10包括的第一个开关子电路101，即第一个开关晶体管M1的栅极可以与子控制信号端S1_1连接，第一极可以与一条第二数据线D2连接，第二极可以与和每个第二像素30连接的第一条第二数据线D2连接。
另外，参考图5，源极驱动电路L0可以与每条第一数据线D1连接，该源极驱动电路L0可以为每条第一数据线D1直接提供数据信号。每行第一像素20和每行第二像素30可以分别与一条栅线G1连接，第一像素20中的薄膜晶体管和第二像素30中的薄膜晶体管均可在栅线G1提供的栅极驱动信号控制下开启。
可选的，参考图2、图4和图5，本公开实施例提供的显示基板中的每个第二像素30可以包括三个不同颜色的子像素301，相应的，每个开关电路10可以与三条第二数据线D2连接。
在本公开实施例中，显示基板包括的开关电路10的个数，可以与第一显示区域A1包括的第一像素20的列数相同。
参考图1和图3，由于第一显示区域A1的面积可以小于第二显示区域A2的面积，因此当源极驱动电路L0与第二显示区域A2内的第二数据线D2连接时，通过设置个数与第一像素20列数相同的开关电路10，可以在保证向第一显示区域A1和第二显示区域A2内所有数据线正常写入数据的前提下，减少所需 设置的开关电路10的数量，进一步节省了生产成本，且有利于窄边框的实现。
综上所述，本公开实施例提供了一种显示基板，该显示基板包括多个开关电路，每个开关电路可以控制一条第一数据线和多条第二数据线分别导通，且第一数据线与位于第一显示区域的一列像素连接，每条第二数据线与位于第二显示区域的一列子像素连接。因此本公开实施例提供的方案，仅需向第一数据线或第二数据线提供数据信号，即可以实现向显示基板中的所有数据线均提供数据信号，即实现对显示基板包括的所有像素的数据信号的写入。相应的，仅需设置一个源极驱动电路，即可控制显示基板正常显示，显示装置的制造工艺较为简单，生产成本较低。
图6是本公开实施例提供的一种显示基板的驱动方法流程图，该方法可以应用于如图2至图5任一所示的显示基板中，且该方法可以由显示基板的驱动电路实现，该驱动电路可以包括源极驱动电路、栅极驱动电路和控制电路。如图6所示，该方法可以包括：
步骤601、向显示基板中的多条栅线依次提供栅极驱动信号。
在本公开实施例中，显示基板中的多条栅线可以均与栅极驱动电路连接，栅极驱动电路可以向第一行栅线至最后一行栅线依次提供栅极驱动信号。
步骤602、向显示基板中的多条第一数据线或第二数据线提供数据信号。
在本公开实施例中，显示基板中的多条第一数据线可以与源极驱动电路连接，源极驱动电路可以向每条第一数据线提供数据信号。或者多条第二数据线可以与源极驱动电路连接，源极驱动电路可以向每条第二数据线提供数据信号。
步骤603、向显示基板中的控制信号端提供控制信号，每个开关电路响应于控制信号，控制其所连接的一条第一数据线与一条第二数据线导通。
在本公开实施例中，显示基板中的控制信号端可以与控制电路连接，控制电路可以向每个控制信号端提供控制信号。每个开关电路可以在控制信号的驱动下，控制其所连接的一条第一数据线与一条第二数据线导通。
需要说明的是，上述步骤601至步骤603可以同步执行，也即是，在栅极驱动电路向显示基板中的多条栅线依次提供栅极驱动信号的同时，源极驱动电路向显示基板中的多条第一数据线或第二数据线提供数据信号，且控制电路也同时向显示基板中的控制信号端提供控制信号。
综上所述，本公开实施例提供了一种显示基板的驱动方法，显示基板包括的每个开关电路可以响应于控制信号，控制一条第一数据线和多条第二数据线分别导通，且该第一数据线与位于第一显示区域的一列像素连接，每条第二数据线与位于第二显示区域的一列子像素连接。因此仅需向第一数据线或第二数据线提供数据信号，即可以实现向显示基板中的所有数据线均提供数据信号，即实现对显示基板包括的所有像素的数据信号写入。相应的，仅需设置一个源极驱动电路，即可控制显示基板正常显示，显示装置的制造工艺较为简单，生产成本较低。
可选的，每个第二像素可以包括多个子像素，每个开关电路可以包括多个开关子电路，控制信号端可以包括多个子控制信号端。相应的，上述步骤603可以包括：
向显示基板中的多个子控制信号端依次提供控制信号，每个开关子电路可以响应于接收到的控制信号，控制其所连接的一条第一数据线和一条第二数据线导通。
并且，为了保证数据信号的可靠写入，控制电路向各个子控制信号端提供的控制信号的时间段可以完全不重叠，也即是在一个时间段内，控制电路仅可以向一个子控制信号端提供控制信号。
例如，参考图4和图5，每个第二像素30包括三个子像素301，每个开关电路10包括3个开关子电路101，控制信号端包括三个控制信号端S1_1、S1_2和S1_3。控制电路可以向该三个控制信号端S1_1、S1_2和S1_3依次提供控制信号，且控制电路向该三个控制信号端S1_1、S1_2和S1_3提供的控制信号的时间段完全不重叠。进而，开关电路10即可以依次控制一条第一数据线D1和一条第二数据线D2导通。
可选的，参考图5，源极驱动电路与多条第一数据线D1连接。相应的，上述步骤602即可以包括：向显示基板中的多条第一数据线提供数据信号。
由于第一显示区域A1中的每个第一像素20仅与一条第一数据线D1连接，而第二显示区域A2中的每个第二像素30包括多个不同颜色的子像素301，每列子像素301与一条第二数据线D2连接，也即是每个第二像素30需要与多条第二数据线D2连接。因此，通过将源极驱动电路与第一数据线D1连接，可以减少源极驱动电路所需设置的数据线通道数量，进而可以降低高分辨率显示基 板对源极驱动电路通道数量的需求，为全面屏实现提供了保障。
以图5所示的显示基板，开关晶体管M1为N型晶体管，以及每个第二像素30包括按照红色、绿色和蓝色依次排列的三个子像素301为例，介绍本公开实施例提供的显示基板的驱动原理。
需要说明的是，该显示基板可以仅使用一个时钟信号。在驱动显示基板工作时，是由时序控制器先获取数据信号。当时序控制器获取到数据信号后，可以将数据信号解析为红色子像素对应的数据信号，绿色子像素对应的数据信号和蓝色子像素对应的数据信号。然后，时序控制器可以将解析后的三种数据信号输出至源极驱动电路，并由源极驱动电路根据时序控制器提供的刷新率，将数据信号提供给其所连接的多条数据线。
图7是本公开实施例提供的一种显示基板中各信号端的时序图。如图7所示，在第一阶段T1，子控制信号端S1_1提供控制信号，相应的，与该子控制信号端S1_1连接的各个开关晶体管M1均开启，每个开关晶体管M1可以控制其所连接的一条第一数据线D1与一条第二数据线D2导通，且该条第二数据线D2与一列红色子像素连接。进而，源极驱动电路L0向第一数据线D1提供的数据信号，即可通过该开关晶体管M1传输至与该第一数据线D1导通的第二数据线D2。
在第一阶段T1，源极驱动电路L0向第一数据线D1提供的是红色子像素对应的数据信号，因此在该第一阶段T1，背光源驱动电路可以控制侧入式背光源为第一显示区域A1提供红色背光，相应的，即可以实现对第一显示区域A1所包括的第一像素20，以及第二显示区域A2包括的红色子像素301的数据写入。
在第二阶段T2，子控制信号端S1_2提供控制信号，相应的，与该子控制信号端S1_2连接的各个开关晶体管M1均开启，每个开关晶体管M1可以控制其所连接的一条第一数据线D1与一条第二数据线D2导通，且该条第二数据线D2与一列绿色子像素连接。进而，源极驱动电路L0向第一数据线D1提供的数据信号，即可以通过该开关晶体管M1传输至第二数据线D2。
在第二阶段T2，源极驱动电路L0向第一数据线D1提供的是绿色子像素对应的数据信号，因此在该第二阶段T2，背光源驱动电路可以控制侧入式背光源为第一显示区域A1提供绿色背光，相应的，即可以实现对第一显示区域A1所包括的第一像素20，以及第二显示区域A2包括的绿色子像素301的数据写入。
在第三阶段T3，子控制信号端S1_3提供控制信号，相应的，与该子控制信号端S1_3连接的各个开关晶体管M1均开启，每个开关晶体管M1可以控制其所连接的一条第一数据线D1与一条第二数据线D2导通，且该条第二数据线D2与一列蓝色子像素连接。进而，源极驱动电路L0向第一数据线D1提供的数据信号，即可以通过该开关晶体管M1传输至第二数据线D2。
在第三阶段T3，源极驱动电路L0向第一数据线D1提供的是蓝色子像素对应的数据信号，因此在该第三阶段T3，背光源驱动电路可以控制侧入式背光源为第一显示区域A1提供蓝色背光，相应的，即可以实现对第一显示区域A1所包括的第一像素20，以及第二显示区域A2包括的蓝色子像素301的数据写入。
参考图7，在该第一阶段T1至第三阶段T3，栅极驱动电路可以向第一显示区域A1中的第一条栅线G1至第二显示区域A2中的最后一条栅线G1均依次提供栅极驱动信号。相应的，在该第一阶段T1至第三阶段T3，显示基板中的第一行第一像素20至最后一行第二像素30包括的薄膜晶体管均可以依次开启。
需要说明的是，参考图7，在第一阶段T1，子控制信号端S1_2和S1_3均不提供控制信号。在第二阶段T2，子控制信号端S1_1和S1_3均不提供控制信号。在第三阶段T3，子控制信号端S1_1和S1_2均不提供控制信号。也即是，三个子控制信号端提供的控制信号的时间段完全不重叠，相应的，在同一时间段，每个开关电路10中仅有一个开关晶体管M1处于使能状态，保证了数据信号的可靠写入。
可选的，为了确保数据信号能够可靠写入至第二显示区域A2的第二像素30中，每个子控制信号端需要在栅极驱动电路对第二显示区域A2中的第二像素30进行扫描之前提供控制信号。也即是，每个子控制信号端需要在栅极驱动电路开始向第一行第一像素20提供栅极驱动信号后，并在该栅极驱动电路向最后一行第一像素20提供栅极驱动信号之前提供控制信号。
例如，参考图7，子控制信号端S1_1、S1_2和S1_3可以均在栅极驱动电路向第一条栅线G1提供栅极驱动信号的同时提供控制信号，由此保证了数据信号能够可靠写入至第二显示区域A2的第二像素30中。
需要说明的是，参考图7，在第一阶段T1和第二阶段T2之间，在第二阶段T2和第三阶段T3之间，以及在T3阶段之后，还可以包括消隐阶段t0。该消隐阶段t0可以是指驱动一帧画面驱动完成到驱动下一帧画面开始之前的垂直消 隐阶段。在依次执行上述第一阶段T1至第三阶段T3之后，即可以完成红色子画面帧、绿色子画面帧和蓝色子画面帧的驱动。相应的，在第三阶段T3结束之后，该显示基板即可显示出一副彩色画面。为了避免人眼察觉，保证显示效果，第一阶段T1、第二阶段T2和第三阶段T3中每个阶段的刷新率可以均为180Hz。
并且，在第一阶段T1至第三阶段T3中的每个阶段，背光源驱动电路均可以在栅极驱动电路对第一显示区域A1内的所有栅线扫描完成之后，控制侧入式背光源为第一显示区域A1的第一像素20提供背光。也即是，背光源驱动电路可以在栅极驱动电路向第一显示区域A1的最后一行栅线提供栅极驱动信号之后，再控制侧入式背光源为该第一显示区域A1的第一像素20提供背光。并且，背光源驱动电路控制侧入式背光源为第一显示区域A1的第一像素20提供背光的时长，可以根据显示装置所需显示的画面的亮度进行调整。
例如，背光源驱动电路可以在栅极驱动电路向第二显示区域A2的第一行栅线G1至最后一行栅线G1提供栅极驱动信号的过程中，控制侧入式背光源持续为第一显示区域A1的第一像素20提供红色的背光。又例如，背光源驱动电路可以在栅极驱动电路向第二显示区域A2的第一行栅线G1至最后一行栅线G1提供栅极驱动信号的过程中，以及第一阶段T1和第二阶段T2之间的消隐阶段t0，控制侧入式背光源持续为第一显示区域A1的第一像素20提供红色的背光。
还需要说明的是，结合图5所示的显示基板以及上述驱动原理的介绍，由于本公开实施例对显示基板内第一显示区域A1包括的像素和第二显示区域A2包括的像素刷新率均为180Hz，因此也仅需要设置一个栅极驱动电路来驱动显示基板中的所有像素。该一个栅极驱动电路既可以与第一显示区域内的所有栅线连接，又可以与第二显示区域内的所有栅线连接，进一步简化了制造工艺，节省了生产成本。
综上所述，本公开实施例提供了一种显示基板的驱动方法，该显示基板包括的每个开关电路可以响应于控制信号，控制一条第一数据线和多条第二数据线分别导通。因此仅需向第一数据线或第二数据线提供数据信号，即可以实现向显示基板中的所有数据线均提供数据信号，即实现对显示基板包括的所有像素的数据信号写入。相应的，仅需设置一个源极驱动电路，即可控制显示基板正常显示，显示装置的制造工艺较为简单，生产成本较低。
本公开实施例提供了一种显示装置，如图8所示，该显示装置可以包括：如图2至图5任一所示的显示基板100，以及与该显示基板100连接的驱动电路。可选的，如图8所示，该驱动电路可以包括：源极驱动电路L0、栅极驱动电路L1和控制电路L2。
其中，结合图5，该栅极驱动电路L1可以与显示基板100中的多条栅线G1连接，该源极驱动电路L0可以与显示基板100中的多条第一数据线D1或多条第二数据线D2连接(图5示出的源极驱动电路L0与多条第一数据线D1连接)，该控制电路L2可以与显示基板100中的控制信号端S1(即图5所示的S1_1至S1_3)连接。栅极驱动电路L1可以向多条栅线G1提供栅极驱动信号，源极驱动电路L0可以向其所连接的多条数据线提供数据信号，控制电路L2可以向控制信号端S1提供控制信号。
可选的，该栅极驱动电路L1可以设置在该显示基板100上。该控制电路L2可以为显示装置中独立设置的集成电路，或者也可以与栅极驱动电路L1集成设置。通过使得控制电路L2和栅极驱动电路L1集成设置，可以避免控制电路L2占用显示基板100的额外面积，有利于窄边框显示装置的实现。
作为本公开实施例一种可选的实现方式，如图9所示，该显示装置还可以包括：侧入式背光源200和直下式背光源300。侧入式背光源200可以设置在显示基板100的侧面，例如设置在显示基板100的顶部。该侧入式背光源可200以为显示基板100的第一显示区域A1中的第一像素提供背光，直下式背光源300可以设置在显示基板100远离出光面的一面，该直下式背光源300可以为显示基板100的第二显示区域A2中的第二像素提供背光。
需要说明的是，为了使得第一显示区域A1可以正常显示彩色画面，该侧入式背光源200可以为彩色背光源，相应的，该侧入式背光源200即可以向第一显示区域A1提供不同颜色的背光。例如，该侧入式背光源200可以为能够发出红光、绿光和蓝光的彩色背光源。
由于该第二显示区域A2中的每个像素包括不同颜色的子像素，即该第二显示区域A2是通过彩膜实现彩色显示，因此即使该侧入式背光源200提供的背光进入该第二显示区域A2内，也不会对第二显示区域A2的正常显示造成影响。
作为本公开实施例另一种可选的实现方式，该显示装置还可以仅包括一个设置在显示基板100远离出光面的一面的直下式背光源300。该直下式背光源 300可以为彩色背光源，该彩色背光源可以为显示基板100的第一显示区域A1中的第一像素，以及第二显示区域A2中的第二像素提供背光。
由于该第二显示区域A2中的每个像素包括不同颜色的子像素，即该第二显示区域A2是通过彩膜实现彩色显示，因此即使该直下式背光源300提供不同颜色的背光，也不会对第二显示区域A2的正常显示造成影响。
可选的，该显示装置可以为液晶面板、电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的显示基板和各电路的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
以上所述仅为本公开的可选实施例，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (20)

  1. 一种显示基板，所述显示基板具有第一显示区域和第二显示区域；所述显示基板包括：多个开关电路，位于所述第一显示区域的多个第一像素，以及位于所述第二显示区域的多个第二像素，其中每个所述第二像素包括多个不同颜色的子像素；
    每列所述第一像素与一条第一数据线连接，每列所述子像素与一条第二数据线连接；
    每个所述开关电路分别与控制信号端、一条所述第一数据线以及多条所述第二数据线连接，每个所述开关电路用于响应于来自所述控制信号端的控制信号，控制其所连接的一条所述第一数据线与每条所述第二数据线之间的通断；
    每个所述开关电路连接的多条所述第二数据线中，任意两条所述第二数据线连接的子像素的颜色不同。
  2. 根据权利要求1所述的显示基板，
    每个所述开关电路连接的多条所述第二数据线，分别与位于同一列的所述第二像素包括的多列所述子像素连接。
  3. 根据权利要求2所述的显示基板，
    对于与同一个所述开关电路连接的所述第一数据线和多条所述第二数据线，所述第一数据线所连接的一列所述第一像素，与多条所述第二数据线所连接的一列所述第二像素位于同一列。
  4. 根据权利要求1至3任一所述的显示基板，每个所述开关电路包括多个开关子电路，所述控制信号端包括多个子控制信号端，且每个所述开关电路包括的开关子电路的个数和所述控制信号端包括的子控制信号端的个数，均与每个所述第二像素包括的子像素的个数相同；
    每个所述开关子电路分别与一个所述子控制信号端、一条所述第一数据线和一条所述第二数据线连接，每个所述开关子电路用于响应于来自所述子控制信号端的控制信号，控制其所连接的一条所述第一数据线和一条所述第二数据 线之间的通断。
  5. 根据权利要求4所述的显示基板，与相同颜色的子像素连接的任意两个所述开关子电路，与同一个所述子控制信号端连接。
  6. 根据权利要求4或5所述的显示基板，每个所述开关子电路包括：一个开关晶体管；
    每个所述开关晶体管的栅极与一个所述子控制信号端连接，每个所述开关晶体管的第一极与一条所述第一数据线连接，每个所述开关晶体管的第二极与一条所述第二数据线连接。
  7. 根据权利要求1至6任一所述的显示基板，
    每个所述第二像素包括三个不同颜色的子像素，每个所述开关电路与三条所述第二数据线连接。
  8. 根据权利要求1至7任一所述的显示基板，
    所述显示基板包括的所述开关电路的个数，与所述第一显示区域包括的所述第一像素的列数相同。
  9. 根据权利要求1至8任一所述的显示基板，所述多个开关电路位于所述第一显示区域和所述第二显示区域之间。
  10. 一种显示基板的驱动方法，应用于如权利要求1至9任一所述的显示基板，所述方法包括：
    向所述显示基板中的多条栅线依次提供栅极驱动信号；
    向所述显示基板中的多条第一数据线或多条第二数据线提供数据信号；
    向所述显示基板中的控制信号端提供控制信号，每个开关电路响应于所述控制信号，控制其所连接的一条所述第一数据线与一条所述第二数据线导通。
  11. 根据权利要求10所述的方法，每个第二像素包括多个子像素，每个所 述开关电路包括多个开关子电路，所述控制信号端包括多个子控制信号端；所述向所述显示基板中的控制信号端提供控制信号，包括：
    向所述显示基板中的多个所述子控制信号端依次提供控制信号，每个所述开关子电路响应于接收到的控制信号，控制其所连接的一条所述第一数据线和一条所述第二数据线导通。
  12. 根据权利要求11所述的方法，向任意两个所述子控制信号端提供控制信号的时段互不重叠。
  13. 根据权利要求10至12任一所述的方法，所述向所述显示基板中的多条第一数据线或多条第二数据线提供数据信号，包括：
    向所述显示基板中的多条所述第一数据线提供数据信号。
  14. 一种显示装置，所述显示装置包括：如权利要求1至9任一所述的显示基板，以及与所述显示基板连接的驱动电路。
  15. 根据权利要求14所述的显示装置，所述驱动电路包括：源极驱动电路、栅极驱动电路和控制电路；
    所述栅极驱动电路与所述显示基板中的多条栅线连接，所述源极驱动电路与所述显示基板中的多条第一数据线或多条第二数据线连接，所述控制电路与所述显示基板中的控制信号端连接；
    所述栅极驱动电路用于向所述多条栅线提供栅极驱动信号，所述源极驱动电路用于向其所连接的多条数据线提供数据信号，所述控制电路用于向所述控制信号端提供控制信号。
  16. 根据权利要求15所述的显示装置，所述源极驱动电路位于所述显示基板靠近第一显示区域的一侧，并与所述第一显示区域内的多条第一数据线连接。
  17. 根据权利要求15或16所述的显示装置，所述控制电路与所述栅极驱动电路集成设置。
  18. 根据权利要求14至17任一所述的显示装置，所述显示装置还包括：侧入式背光源和直下式背光源；
    所述侧入式背光源设置在所述显示基板的侧面，用于为所述显示基板的第一显示区域中的第一像素提供背光；
    所述直下式背光源设置在所述显示基板远离出光面的一面，用于为所述显示基板的第二显示区域中的第二像素提供背光。
  19. 根据权利要求18所述的显示装置，所述侧入式背光源为彩色背光源。
  20. 根据权利要求14至17任一所述的显示装置，所述显示装置还包括：设置在所述显示基板远离出光面的一面的直下式背光源；
    所述直下式背光源为彩色背光源，用于为所述显示基板的第一显示区域中的第一像素，以及所述显示基板的第二显示区域中的第二像素提供背光。
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