WO2020207144A1 - Display apparatus, image display method, and electronic device - Google Patents

Abstract

A display apparatus, an image display method, and an electronic device. The display apparatus comprises an image receiver (10), a driving circuit (20), a processing circuit (30), and multiple display screens (40). The driving circuit (20) receives a first image signal of the image receiver (10) and processes the first image signal into a second image signal; the processing circuit (30) converts the second image signal into a third image signal, and processes the third image signal into a fourth image signal according to screen resolution and image resolution of the display screen (40), and outputs the fourth image signal to the corresponding display screen (40) for display. The first and third image signals both comprise image signals required by the display screens (40).

Description

Display device, image display method and electronic equipment

Cross references to related applications

This application claims the priority of the Chinese patent application CN201910294849.7 filed on April 12, 2019, the entire disclosure of which is incorporated herein by reference.

Technical field

The present disclosure relates to the field of display technology, and in particular to a display device, an image display method, and electronic equipment.

Background technique

Since the display device can bring more intuitive visual effects to people, the display device is increasingly used in the commercial field. For example, a business can use the display device to display product advertisements, business notifications, and so on. In practical applications, many commercial display devices often have special specification requirements. For example, for the entire row of shelves in a supermarket, a long strip of display screen can be set on the top of each shelf to display the attributes of the goods on the corresponding shelf. Promotional information, etc.

In the existing display driving scheme, each display screen needs to be equipped with a driving circuit for driving, and each driving circuit needs to be equipped with an image receiver, and each image receiver can input the corresponding driving circuit to the corresponding driving circuit. The image signal required by the display.

However, in practical applications, multiple display screens are often required to display at the same time. Therefore, for a complete device including multiple display screens, multiple drive circuits and multiple image receivers are required. Therefore, the structure of the whole device is complicated. The degree is higher, the installation is more difficult, and the cost is higher.

Summary of the invention

The first aspect of the embodiments of the present disclosure provides a display device, including an image receiver, a driving circuit, a processing circuit, and at least two display screens, wherein:

The image receiver is connected to the drive circuit and is configured to input a first image signal to the drive circuit, the first image signal including an image signal required by each of the at least two display screens ；

The driving circuit is configured to adjust the resolution of the first image signal to obtain at least one second image signal;

The processing circuit is connected to the drive circuit and is configured to receive the at least one second image signal from the drive circuit, convert the at least one second image signal into a third image signal, and according to the at least one The screen resolution and image resolution of the two display screens, the third image signal is processed into a fourth image signal corresponding to the at least two display screens, wherein the third image signal includes the Image signals required for each of at least two display screens; and

Each of the at least two display screens is connected to the processing circuit, and is configured to receive a corresponding fourth image signal from the processing circuit, and display according to the fourth image signal.

In an embodiment, the screen resolution of the at least two display screens is smaller than the image resolution of the at least two display screens.

In an embodiment, the image resolution corresponding to the third image signal is the same as the image resolution corresponding to the first image signal.

In an embodiment, the drive circuit includes a first signal input interface and a first signal output interface, the processing circuit includes a second signal input interface, and the image receiver is connected to the first signal input interface of the drive circuit , The first signal output interface of the drive circuit is connected to the second signal input interface of the processing circuit;

The image resolution that meets the first signal output interface is equal to the image resolution that meets the second signal input interface, and is less than the image resolution that meets the first signal input interface; or,

It conforms that the image resolutions of the first signal input interface, the first signal output interface, and the second signal input interface are the same.

In an embodiment, the first signal output interface and the second signal input interface are both single-channel low-voltage differential signal interfaces, or the first signal output interface and the second signal input interface are both dual-channel Low voltage differential signal interface.

In an embodiment, the at least two display screens include a third signal input interface, and the processing circuit includes a second signal output interface connected in a one-to-one correspondence with the third signal input interfaces of the at least two display screens;

The image resolution conforming to the second signal output interface is equal to the image resolution conforming to the third signal input interface, and neither is greater than the image resolution conforming to the first signal input interface.

In an embodiment, the second signal output interface and the third signal input interface are both single-channel low-voltage differential signal interfaces, or the second signal output interface and the third signal input interface are both dual-channel Low voltage differential signal interface.

In an embodiment, the at least two display screens have a display surface and a back surface opposite to the display surface, and the driving circuit and the processing circuit are respectively arranged on the back surfaces of different display screens.

In an embodiment, the drive circuit further includes a first power output interface, the processing circuit further includes a first power input interface, the first power output interface is connected to the first power input interface, and the drive circuit It is also configured to input the power supply voltage required by the processing circuit into the first power input interface through the first power output interface to supply power to the processing circuit.

In an embodiment, the driving circuit further includes at least two second power output interfaces, the at least two display screens further include a second power input interface, the second power input interface and the second power output interface In a one-to-one correspondence connection, the driving circuit is further configured to input the power supply voltage required by the corresponding display screen into the corresponding second power input interface through the second power output interface to supply power to the display screen.

In an embodiment, the processing circuit is a field programmable gate array FPGA.

The second aspect of the embodiments of the present disclosure provides an image display method applied to the above-mentioned display device, and the method includes:

Inputting a first image signal from the image receiver to the driving circuit, the first image signal including an image signal required by each of the at least two display screens;

Adjusting the resolution of the first image signal by the driving circuit to obtain at least one second image signal;

Outputting the second image signal to a processing circuit by the driving circuit;

Converting the at least one second image signal into a third image signal by the processing circuit, wherein the third image signal includes an image signal required by each of the at least two display screens;

The processing circuit processes the third image signal into a fourth image signal corresponding to the at least two display screens one-to-one according to the screen resolution and image resolution of the at least two display screens;

Outputting each of the fourth image signals to the corresponding display screen by the processing circuit; and

The display screen performs display according to the fourth image signal.

In an embodiment, the screen resolution of the at least two display screens is smaller than the image resolution of the at least two display screens.

In an embodiment, the image resolution corresponding to the third image signal is the same as the image resolution corresponding to the first image signal.

In an embodiment, the first image signal includes a plurality of pixel signals;

Adjusting the resolution of the first image signal by the driving circuit to obtain at least one second image signal includes:

Extracting a target number of pixel signals in sequence from the plurality of pixel signals of the first image signal by the driving circuit to obtain a second image signal;

Wherein, the target number is equal to the number of pixels included in the image resolution conforming to the first signal output interface of the driving circuit.

In an embodiment, the processing circuit converting the at least one second image signal into a third image signal includes:

The processing circuit adds a plurality of first preset pixel signals to the second image signal to obtain a third image signal with the same resolution as the image resolution corresponding to the first image signal.

In an embodiment, adjusting the resolution of the first image signal by the driving circuit to obtain at least one second image signal includes:

Extracting odd-numbered pixel signals from the first image signal by the driving circuit to obtain a second image signal of odd-numbered pixels;

The driving circuit extracts even-numbered pixel signals from the first image signal to obtain a second image signal of even-numbered pixels.

In an embodiment, converting the at least one second image signal into a third image signal by the processing circuit includes:

The processing circuit sequentially inserts one even-numbered pixel signal in the second image signal of the even-numbered pixel between every two adjacent odd-numbered pixel signals in the second image signal of the odd-numbered pixel to obtain a resolution A third image signal having the same rate as the image resolution corresponding to the first image signal.

In an embodiment, the processing circuit processes the third image signal into a fourth image signal corresponding to the at least two display screens according to the screen resolution and image resolution of the at least two display screens. Image signal, including:

The processing circuit splits the third image signal into intermediate image signals corresponding to the at least two display screens one-to-one according to the screen resolutions of the at least two display screens; and

The processing circuit adds a plurality of second preset pixel signals to each of the intermediate image signals to obtain a fourth image signal with the same resolution as the image resolution of the corresponding display screen.

A third aspect of the embodiments of the present disclosure provides an electronic device including the above-mentioned display device.

Description of the drawings

FIG. 1 shows a schematic diagram of a display device according to an embodiment of the present disclosure;

FIG. 2 shows a schematic structural diagram of a display device according to an embodiment of the present disclosure;

Fig. 3 shows a flowchart of an image display method according to an embodiment of the present disclosure;

FIG. 4 shows a flowchart of processing pixel signals according to an embodiment of the present disclosure; and

FIG. 5 shows another flowchart of processing pixel signals according to an embodiment of the present disclosure.

detailed description

In order to make the above objectives, features and advantages of the present disclosure more obvious and understandable, the present disclosure will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

In the disclosed embodiment, the display device may include an image receiver, a driving circuit connected to the image receiver, a processing circuit connected to the driving circuit, and at least two display screens connected to the processing circuit. When the screen resolution of at least two display screens is less than its image resolution, the image signal required by each display screen is synthesized into the first image signal, and then the driving circuit and the processing circuit can be used to receive The received image signal is divided into the image signal required by each display screen, and processed into a signal form that can be received by the display screen, so that the display screen can display according to the received image signal. In this way, through a drive circuit and The processing circuit can drive at least two display screens. In the embodiments of this application, the image resolution of the display screen refers to the maximum image resolution corresponding to the image signal it can receive. For example, a display screen can receive 1920*1080 images, but it can only display 1080*720 images. image. This saves costs and achieves the effect of at least two display screens simultaneously displaying different images. Data transmission and synchronization can be completed only through a set of gigabit network system, which reduces the difficulty of structural design and assembly. 1, there is shown a schematic diagram of a display device according to an embodiment of the present disclosure. The display device may include an image receiver 10, a driving circuit 20, a processing circuit 30, and at least two display screens 40. Among them, the image receiver 10 can be connected to the driving circuit 20, the driving circuit 20 can be connected to the processing circuit 30, and the processing circuit 30 can be connected to each display screen 40. Each of the above-mentioned devices in the display device is an electrical device, and accordingly, the connection mode between the above-mentioned various devices may specifically be an electrical connection.

In an embodiment, the image receiver 10 may be configured to input a first image signal to the driving circuit 20, where the first image signal includes an image signal required by each display screen 40. In specific applications, the image receiver 10 may be a gigabit component, so that the image receiver 10 can input a high-definition image to the driving circuit 20 at a gigabit transmission rate. The image receiver 10 in the display device can be connected to a data source device external to the display device. When the corresponding image needs to be displayed on each display screen in the display device, the data source device can transfer the required data of each display screen 40 The image signal is input to the image receiver 10. The image receiver 10 splices the received image content to be displayed on each display screen 40 into a first image signal. In the embodiment of the present disclosure, when the screen resolution of the display screen 40 is less than the required image resolution, the image signal required by each display screen 40 is synthesized into the first image signal, and then the drive circuit can be subsequently used With the cooperation of 20 and the processing circuit 30, the image signal required by each display screen 40 is separated from the first image signal, and processed into a signal form that can be received by the display screen 40, so that the display screen 40 can be based on the received image The signal is displayed, so that at least two display screens 40 can be driven by one image receiver 10 and one driving circuit 20. In the embodiment, the display screen may be a bar screen, but the display screen of the embodiment of the present disclosure is not limited to the bar screen.

The driving circuit 20 may be configured to adjust the resolution of the first image signal, obtain at least one second image signal, and output the second image signal to the processing circuit 30. In specific applications, the driving circuit 20 may be a driving circuit including an SOC (System on Chip, also called a system on chip) chip, and the driving circuit 20 includes an LVDS (Low-Voltage Differential Signaling, low-voltage differential signal) interface . When the drive circuit transmits digital video signals, in addition to the image signal, it also includes signals such as line synchronization, field synchronization, and pixel clock. The maximum frequency of the pixel clock signal can exceed 28MHz. LVDS interface is a digital video signal transmission and interface technology, due to its low voltage and low current drive mode. Therefore, the drive circuit adopts the LVDS interface to realize low noise and low power consumption of video signal transmission. In this embodiment, the signal transmission mode based on the LVDS interface may include a single-channel LVDS interface transmission mode and a dual-channel LVDS interface transmission mode, that is, the image signal can be transmitted between the driving circuit 20 and the processing circuit 30 through a single-channel LVDS interface , Or can transmit image signal through dual LVDS interface. The dual LVDS interface can split the image signal to be output into two groups of image signals according to odd and even rows of pixels and output them. The single-channel LVDS interface can remove part of the image signal to be output when the image resolution corresponding to the image signal to be output is greater than the image resolution of the single-channel LVDS interface, so that the image signal to be output conforms to the single-channel LVDS interface Corresponding image resolution, and then output the processed image signal. Correspondingly, the driving circuit 20 can adjust the resolution of the first image signal according to the image resolution of the output interface of its own, so as to obtain at least one second image signal adapted to the output interface of its own, and then output the second image signal To processing circuit 30.

The driving circuit 20 may include a first signal input interface and a first signal output interface. The processing circuit 30 may include a second signal input interface. The image receiver 10 is connected to the first signal input interface of the driving circuit 20. The signal output interface is connected to the second signal input interface of the processing circuit 30. Wherein, the image resolution meeting the first signal output interface is equal to the image resolution meeting the second signal input interface, and is smaller than the image resolution meeting the first signal input interface. Or, it conforms that the image resolutions of the first signal input interface, the first signal output interface, and the second signal input interface are the same.

In practical applications, in order to adapt to the signal output interface of the image receiver 10, the image resolution of the first signal input interface conforming to the driving circuit 20 is equal to the image resolution corresponding to the image signal that the image receiver 10 can output. In a specific application, the image receiver 10 may output a FHD (Full High Definition) first image signal to the driving circuit 20, and the image resolution corresponding to the first image signal is 1920×1080, correspondingly, it conforms to the first The image resolution of a signal input interface is 1920×1080. In addition, since the first signal output interface of the driving circuit 20 and the second signal input interface of the processing circuit 30 need to be adapted, the image resolution conforming to the first signal output interface may be equal to the image resolution conforming to the second signal input interface , And the above two can be less than or equal to the image resolution of the first signal input interface.

In a specific implementation manner, the first signal output interface and the second signal input interface may both be single-channel LVDS interfaces, that is, image signals can be transmitted between the driving circuit 20 and the processing circuit 30 through a single-channel LVDS interface. The conventional single-channel LVDS interface can input or output image signals with an image resolution of 1280×720. Therefore, when the image signal is transmitted between the drive circuit 20 and the processing circuit 30 through the single-channel LVDS interface, it conforms to the requirements of the drive circuit 20. The image resolution of the first signal output interface is smaller than that of the first signal input interface. Furthermore, when the driving circuit 20 receives the first image signal, it can extract the first 1280×720 pixel signals in sequence from the 1920×1080 pixel signals of the first image signal according to the image resolution conforming to the single-channel LVDS interface. The second image signal, that is, the pixel signal in the latter part of the first image signal can be removed to obtain the second image signal adapted to the first signal output interface, and the driving circuit 20 can output the second image signal to the processing circuit 30 .

In another specific implementation manner, the first signal output interface and the second signal input interface may both be dual LVDS interfaces, that is, image signals may be transmitted between the driving circuit 20 and the processing circuit 30 through the dual LVDS interfaces. According to the configuration of the conventional dual-channel LVDS interface, the image signal needs to be split into multiple odd-numbered pixel signals and multiple even-numbered pixel signals, and then the odd-numbered pixel signals and even-numbered pixel signals are output through different signal lines in the dual-channel LVDS interface. Correspondingly, when image signals are transmitted between the drive circuit 20 and the processing circuit 30 through the dual LVDS interface, when the drive circuit 20 receives the first image signal, it can be based on the odd number signal lines and the even number signal in the dual LVDS interface. The image resolution corresponding to the line, the 1920×1080 pixel signal of the first image signal is split into the second image signal containing 960×1080 odd-numbered pixel signals, and the second image signal containing 960×1080 even-numbered pixel signals The second image signal of the even-numbered pixel can obtain two second image signals of the second signal output interface of the adaptation processing circuit 30, and then the driving circuit 20 can convert the second image signal of the odd-numbered pixel and the second image of the even-numbered pixel The signal is output to the processing circuit 30.

In the embodiments of the present disclosure, the core frequency of the single-channel LVDS interface driver circuit is lower than that of the dual-channel LVDS interface driver circuit. Therefore, by adopting the single-channel LVDS interface driver circuit, the heat generation and the display device can be reduced. Power consumption, and the cost of a single-channel LVDS interface drive circuit is relatively low, so that the manufacturing cost of the display device can be saved.

Further, the processing circuit 30 may be configured to convert at least one second image signal into a third image signal with the same resolution as the image resolution corresponding to the first image signal, according to the screen resolution and image resolution of the display screen 40 , The third image signal is processed into the fourth image signal corresponding to the display screen 40 one-to-one, and each fourth image signal is output to the corresponding display screen 40, where the third image signal includes the required value of each display screen 40 Image signal. In practical applications, the processing circuit 30 is specifically an FPGA (Field-Programmable Gate Array). FPGA is a kind of microprocessor, which can extract and segment image signals through a series of operations to be suitable for display screen output. In a specific application, when the signal transmission interface between the driving circuit 20 and the processing circuit 30 is different, the processing circuit 30 may convert the at least one second image signal in different ways when receiving at least one second image signal It is a third image signal with the same resolution as the image resolution corresponding to the first image signal.

If the image signal is transmitted between the driving circuit 20 and the processing circuit 30 through a single-channel LVDS interface, the second image signal received by the processing circuit 30 is the first image signal with some pixel signals removed, and accordingly, the processing circuit 30 can send A preset pixel signal, such as a black pixel signal, is added to the second image signal, so that a third image signal with the same resolution as that of the image corresponding to the first image signal can be obtained. In this mode, because part of the pixel signal is removed from the first image signal, and a preset number of pixel signals are added subsequently, for this mode, the image content corresponding to the third image signal is the same as the first image signal. The corresponding image content is different. Accordingly, only the pixel signal part of the third image signal that is the same as the first image signal is a valid signal and can be used for display of each display screen 40.

If the image signal is transmitted between the driving circuit 20 and the processing circuit 30 through a dual LVDS interface, the two second image signals received by the processing circuit 30 are the first image signals that are split into two parts according to the odd and even pixels, correspondingly, The processing circuit 30 may insert an even-numbered pixel signal between every two adjacent odd-numbered pixel signals, so as to obtain a third image signal with the same resolution as the image resolution corresponding to the first image signal. In this method, since the first image signal is split into two parts, and the two parts are recombined later, for this method, the image content corresponding to the third image signal is the same as the image content corresponding to the first image signal. Similarly, and correspondingly, all the pixel signals in the third image signal are valid signals and can be used for display on each display screen 40.

Furthermore, the processing circuit 30 can split the third image signal into the same number of intermediate image signals as the display screen 40 according to the screen resolution of the display screen 40, where the image resolution corresponding to the intermediate image signal is equal to that of the display screen 40. Screen Resolution. Further, the image resolution of the display screen 40 is generally greater than the screen resolution of the display screen 40 itself, that is, the image resolution corresponding to the image signal that the display screen 40 can receive is generally greater than that of the image displayed on the display screen 40. rate. For example, the image resolution corresponding to the image signal that can be input to the display screen 40 can be 1920×1080 or 1280×720, and the screen resolution of the display screen 40 itself is usually small, generally 1920×135. Therefore, the processing circuit 30 is After obtaining each intermediate image signal, according to the image resolution of the display screen 40, a preset pixel signal, such as a black pixel signal, can be added after each intermediate image signal to add pixels to each intermediate image signal, so that the resolution can be obtained. Each fourth image signal having the same rate as the image resolution of the display screen 40. After that, the processing circuit 30 may output each fourth image signal to the corresponding display screen 40.

The display screen 40 may include a third signal input interface, and the processing circuit 30 may include a second signal output interface connected to the third signal input interface of the display screen 40 in a one-to-one correspondence. Wherein, the image resolution conforming to the second signal output interface is equal to the image resolution conforming to the third signal input interface, and is smaller than the image resolution conforming to the first signal input interface; or, conforming to the first signal input interface and the second signal output interface. The image resolution of the interface and the third signal input interface are the same. Since the second signal output interface of the processing circuit 30 needs to be adapted to the third signal input interface of the display screen 40, the image resolution conforming to the second signal output interface should be equal to the image resolution conforming to the third signal input interface, and Both can be less than or equal to the image resolution of the first signal input interface.

Among them, the processing circuit 30 and the display screen 40 can also transmit image signals through a dual LVDS interface or a single LVDS interface. When the signal transmission interface between the processing circuit 30 and the display screen 40 is different, the processing circuit 30 can transmit image signals through different In this way, each fourth image signal is output to the corresponding display screen 40.

Specifically, in a specific implementation manner, the second signal output interface and the third signal input interface may both be dual LVDS interfaces, that is, the processing circuit 30 and the display screen 40 may be transmitted through the dual LVDS interface. Image signal. Correspondingly, for the fourth image signal corresponding to any display screen 40, the processing circuit 30 may split the fourth image signal into odd-numbered pixels and even-numbered pixels according to odd and even pixels. In turn, the fourth odd image signal can be output to the corresponding display screen 40 through the odd signal line in the second signal output interface, and the fourth even image signal can be output to the corresponding display through the even signal line in the second signal output interface.屏40.

In another specific implementation, the second signal output interface and the third signal input interface may both be single-channel LVDS interfaces, that is, image signals can be transmitted between the processing circuit 30 and the display screen 40 through a single-channel LVDS interface . Correspondingly, for the fourth image signal corresponding to any display screen 40, since the image resolution corresponding to the fourth image signal to which the pixel signal is added is the same as the image resolution of the display screen 40, the processing circuit 30 and the display In the case where the image signal is transmitted between the screens 40 through a single LVDS interface, the processing circuit 30 can directly output the fourth image signal to the corresponding display screen 40.

Further, the display screen 40 may be configured to display according to the fourth image signal. Specifically, when image signals are transmitted between the processing circuit 30 and the display screen 40 through a dual-channel LVDS interface, the display screen 40 can receive the fourth image signal of odd pixels and the fourth image of even pixels sent by the processing circuit 30. Correspondingly, the display screen 40 can display the fourth image signal of odd-numbered pixels and the fourth image signal of even-numbered pixels. When the image signal is transmitted between the processing circuit 30 and the display screen 40 through a single-channel LVDS interface, the display screen 40 can receive the fourth image signal sent by the processing circuit 30. Accordingly, the display screen 40 can directly respond to the fourth image signal. The image signal is displayed.

It should be noted here that since the screen resolution of the display screen 40 is relatively small, the image resolution corresponding to the image signal that the display screen 40 can receive is relatively large. Therefore, when the display screen 40 performs display according to the input fourth image signal , The display screen 40 can only display the part of the image that meets its screen resolution. For example, the image resolution corresponding to the fourth image signal may be 1920×1080 (the product is 2073600), which is equal to the sum of the image resolutions corresponding to the fourth image signal of odd pixels and the fourth image signal of even pixels, and the screen resolution of the display screen 40 It can be 1920×135 (the product is 259200), that is, the display screen 40 needs to input 2073600 pixel signals, but it can only display the image corresponding to the first 259200 pixel signals of the 2073600 pixel signals, and the remaining 1814400 pixels None of the pixel signals can be displayed on the display screen 40, but they are necessary pixel signals to ensure that the display screen 40 can normally receive image signals.

Furthermore, the driving circuit 20 may also include a first power output interface, and the processing circuit 30 may also include a first power input interface, wherein the first power output interface is connected to the first power input interface. Correspondingly, the driving circuit 20 may also be configured to input the power supply voltage required by the processing circuit 30 into the first power input interface through the first power output interface to supply power to the processing circuit 30. That is, the power supply voltage required by the processing circuit 30 can be input by the driving circuit 20 without being input from the outside of the display device. In this way, the external interfaces and wires of the display device can be reduced, and the assembly difficulty of the display device can be reduced.

In addition, the driving circuit 20 may also include at least two second power output interfaces, and the display screen 40 may also include a second power input interface, wherein the second power input interface and the second power output interface are connected in a one-to-one correspondence, correspondingly, The driving circuit 20 may also be configured to input the power supply voltage required by the corresponding display screen 40 into the corresponding second power input interface through the second power output interface to supply power to the display screen 40. That is, the power supply voltage required by the display screen 40 can be input by the drive circuit 20 without inputting from the outside of the display device. In this way, the external interfaces and wires of the display device can be reduced, and the assembly difficulty of the display device can be reduced.

FIG. 2 shows a schematic structural diagram of a display device. Referring to FIG. 2, the display device may specifically include an image receiver 10, a driving circuit 20, a processing circuit 30 and two display screens 40. The image receiver 10 can be electrically connected to the driving circuit 20, and the image receiver 10 can be arranged on the driving circuit 20, the driving circuit 20 and the processing circuit 30 can be electrically connected, and the processing circuit 30 can be electrically connected to each display screen 40. . The display screen 40 has a display surface and a back surface opposite to the display surface. The drive circuit 20 and the processing circuit 30 can be respectively arranged on the back of different display screens 40, so that the display screen provided with the drive circuit 20 can be in accordance with existing specifications. On the basis of the hardware structure of the display screen, some power connection wires and signal connection wires can be modified adaptively, thereby reducing the difficulty of manufacturing the display device. In order to make the drive circuit 20 meet the existing display screen assembly, the LVDS interface of the drive circuit 20 must be set in the center of the drive circuit 20. In addition, referring to FIG. 2, the driving circuit 20 can obtain the power supply voltage from outside the display device through the external power supply interface 01. Among them, the interface of the image receiver 10 and the external power interface 01 of the drive circuit 20 need to be set at the bottom of the drive circuit 20 so that the display device can adapt to the installation requirements of shelves and other devices, so that the display device can be installed on shelves and other devices. on. In addition, because the connection line of the display device needs to be connected from the rear of the whole machine, the interface of the image receiver 10 and the external power interface 01 of the drive circuit 20 can adopt a vertical interface, which is more vertical than the horizontal interface. It is convenient for the wiring connection of the display screen 40 after installation.

In addition, the power supply voltages required by the image receiver 10, the processing circuit 30, and the two display screens 40 can all be provided by the driving circuit 20, so that the external interfaces and wires of the display device can be reduced, and the assembly difficulty of the display device can be reduced. 2, the first signal output interface 201 of the drive circuit 20 can be electrically connected to the second signal input interface 301 of the processing circuit 30, so that the drive circuit 20 and the processing circuit 30 can transmit image signals through a single LVDS interface. The core frequency of the driving circuit of the LVDS interface is lower, which can reduce the heat generation and power consumption of the display device, and the cost of the driving circuit of the single LVDS interface is also lower than that of the driving circuit of the dual LVDS interface. Further, as shown in FIG. 2, the first power output interface 202 of the driving circuit 20 can be electrically connected to the first power input interface 302 of the processing circuit 30, so that the driving circuit 20 can supply power to the processing circuit 30. In addition, in order to further reduce assembly difficulty and reduce wire consumption, the first power output interface 202 can be arranged on the side of the drive circuit 20 close to the processing circuit 30, and the first power input interface 302 can be arranged on the processing circuit 30 close to the drive circuit. 20 side. The driving circuit 20 can also directly supply power to the display screen 40 where it is located, and can supply power to other display screens 40 through the processing circuit 30, which is not specifically limited in the embodiment of the present disclosure.

Since the conventional display screen has a dual LVDS interface, the processing circuit 30 and the display screen 40 can transmit image signals through the dual LVDS interface. As shown in FIG. 2, a second signal output interface 303 of the processing circuit 30 can be electrically connected to the third signal input interface 401 of the first display screen 40, and another second signal output interface 303 of the processing circuit 30 can be connected to the The third signal input interface 401 of the two display screens 40 is electrically connected, so that the processing circuit 30 can transmit image signals to the two display screens 40 through the two dual LVDS interfaces, and each display screen 40 can receive Image signal for display.

It should be noted that FIG. 2 only shows part of the structure and part of the connecting lines in the display device, and other unshown structures or connecting lines may also be included in practical applications, which are not specifically limited in the embodiments of the present disclosure. In addition, the schematic structural diagram of the display device shown in FIG. 2 is only used as an example of the structure of the display device, and the connection line position, connection mode, device position, number of interfaces, etc. do not limit the present disclosure.

In an embodiment of the present disclosure, the display device may include an image receiver, a driving circuit, a processing circuit, and at least two display screens. The image receiver is connected to the drive circuit and is configured to input a first image signal to the drive circuit, the first image signal including an image signal required by each of the at least two display screens The driving circuit is configured to adjust the resolution of the first image signal to obtain at least one second image signal; the processing circuit is connected to the driving circuit and is configured to receive the The at least one second image signal, the at least one second image signal is converted into a third image signal with the same image resolution as the image resolution corresponding to the first image signal, and according to the at least two display screens The third image signal is processed into a fourth image signal corresponding to the at least two display screens one-to-one, wherein the third image signal includes the at least two display And each of the at least two display screens is connected to the processing circuit, and is configured to receive a corresponding fourth image signal from the processing circuit, and according to the The fourth image signal is displayed. In the embodiments of the present disclosure, when the screen resolution of the display screen is smaller than its image resolution, the image signal required by each display screen can be synthesized into the first image signal, and then the drive circuit and the processing circuit can be used With the cooperation of the first image signal, the image signal required by each display screen is separated from the first image signal, and processed into a signal form that can be received by the display screen, so that the display screen can display according to the received image signal. The image receiver and one drive circuit can drive at least two display screens.

3, there is shown a step flow chart of an image display method according to an embodiment of the present disclosure. The image display method includes the following steps:

Step 301: The image receiver inputs a first image signal to the driving circuit; the first image signal includes an image signal required by each display screen.

In the embodiments of the present disclosure, the image receiver in the display device can be connected to a data source device outside the display device. When the corresponding image needs to be displayed on each display screen in the display device, the data source device can The first image signal required by the display screen is input to the image receiver in the display device, and the image receiver further inputs the first image signal to the driving circuit.

Wherein, the first image signal may include the image signal required by each display screen, that is, the image content corresponding to the first image signal is spliced by the image content required to be displayed on each display screen. In practical applications, the content of the image to be displayed on each display screen may be the same or different, which is not specifically limited in the embodiment of the present disclosure.

For example, the image receiver may obtain the first image signal with an image resolution of 1920×1080 from outside the display device, and then input the first image signal to the driving circuit.

Step 302: The driving circuit adjusts the resolution of the first image signal to obtain at least one second image signal.

In the embodiment of the present disclosure, the image signal can be transmitted between the driving circuit and the processing circuit through a single LVDS interface. The first image signal includes multiple pixel signals. Accordingly, this step can be implemented in the following ways, including: The drive circuit sequentially extracts the target number of pixel signals from the multiple pixel signals of the first image signal to obtain the second image signal; where the target number is equal to the number of pixels included in the image resolution of the signal output interface of the drive circuit .

For example, referring to FIG. 4, for a first image signal with an image resolution of 1920×1080, the first image signal includes a total of 2073600 pixel signals. The first image signal includes image pixel signals required for each display screen (e.g., white circle type, shaded circle type, and black circle type in FIG. 4). The image resolution of a single-channel LVDS interface that conforms to the drive circuit can be 1280×720, and the number of pixels contained in the image resolution of 1280×720 is 921600, which is the image signal that can be output by the signal output interface of the drive circuit. Contains 921600 pixel signals. The driving circuit can extract the first 921600 pixel signals in sequence from the 2073600 pixel signals of the first image signal. The 921600 pixel signals form the second image signal, and the image resolution corresponding to the second image signal is 1280×720 .

In addition, image signals can also be transmitted between the driving circuit and the processing circuit through a dual-channel LVDS interface. The first image signal includes multiple odd-numbered pixel signals and multiple even-numbered pixel signals. Accordingly, this step can be specifically implemented in the following manner , Including: the driving circuit extracts the odd pixel signal from the first image signal to obtain the second image signal of the odd pixel; the driving circuit extracts the even pixel signal from the first image signal to obtain the second image signal of the even pixel.

For example, referring to FIG. 5, for a first image signal with an image resolution of 1920×1080, the first image signal includes a total of 2073600 pixel signals. The first image signal includes image pixel signals required for each display screen (for example, the white circle type, the shaded circle type, and the black circle type in FIG. 5). The image resolution of the dual-channel LVDS interface that conforms to the drive circuit can be 1920×1080. Among them, the image resolution of the odd-numbered signal line in the dual-channel LVDS interface is 960×1080, and the image resolution of the even-numbered signal line is also 960. ×1080. The driving circuit can extract the first pixel signal, the third pixel signal, the fifth pixel signal, the seventh pixel signal,..., the 2073599th pixel signal from the 2073600 pixel signals of the first image signal Pixel signals, so that a total of 1036800 odd-numbered pixel signals in the first image signal can be extracted to form a second image signal of odd-numbered pixels. The driving circuit can also extract the second pixel signal, the fourth pixel signal, the sixth pixel signal, the eighth pixel signal,..., the 2073600th pixel signal from the 2073600 pixel signals of the first image signal. Thus, a total of 1,036,800 even-numbered pixel signals in the first image signal can be extracted to form a second image signal of even-numbered pixels. That is, the driving circuit can split the first image signal into the second image signal of odd-numbered pixels and the second image signal of even-numbered pixels with the image resolution of 960×1080 according to the odd and even pixels.

Step 303: The driving circuit outputs the second image signal to the processing circuit.

In the embodiment of the present disclosure, after processing to obtain the second image signal, the driving circuit may output the second image signal to the processing circuit.

Specifically, when the image signal is transmitted between the driving circuit and the processing circuit through a single-channel LVDS interface, the driving circuit may directly output the second image signal to the processing circuit through the single-channel LVDS interface. When the image signal is transmitted between the driving circuit and the processing circuit through the dual LVDS interface, the driving circuit can output the second image signal of the odd pixel to the processing circuit through the odd signal line in the dual LVDS interface, and through the dual The even-numbered signal line in the LVDS interface outputs the second image signal of the even-numbered pixel to the processing circuit.

For example, the image signal is transmitted between the driving circuit and the processing circuit through a single LVDS interface. Accordingly, referring to FIG. 4, the driving circuit can directly output the second image signal with an image resolution of 1280×720 to the processing circuit.

For another example, the image signal is transmitted between the driving circuit and the processing circuit through a dual LVDS interface. Correspondingly, referring to Figure 5, the driving circuit can use one of the two signal output interfaces to convert the image resolution to 960×1080 odd-numbered pixels. The second image signal of is output to the processing circuit, and the second image signal of even-numbered pixels with an image resolution of 960×1080 is output to the processing circuit through the other of the two signal output interfaces.

In the embodiments of the present disclosure, the feature that the screen resolution of the display screen is smaller than its receivable image resolution can be used to synthesize the image signal required by each display screen into a first image signal, which can then be driven by With the cooperation of the circuit and the processing circuit, the image signals required by each display screen are separated from the first image signal and processed into a signal form that can be received by the display screen, so that the display screen can display according to the received image signal. In this way, at least two display screens can be driven by one image receiver and one driving circuit.

Step 304: The processing circuit converts at least one second image signal into a third image signal; where the third image signal includes the image signal required by each display screen, and the image resolution corresponding to the third image signal is the same as that of the first image. The image resolution corresponding to the signal is the same.

In the embodiment of the present disclosure, when the processing circuit receives the second image signal input by the driving circuit, it can convert the received second image signal into a third image with the same resolution as the image resolution corresponding to the first image signal. The third image signal also includes the image signal required by each display screen.

Specifically, when the image signal is transmitted between the driving circuit and the processing circuit through a single-channel LVDS interface, when the driving circuit obtains the second image signal, part of the pixel signal in the first image signal is removed, so that the second The number of pixel signals contained in the image signal is less than the number of pixel signals contained in the first image signal. Therefore, the processing circuit can obtain the third image signal in the following manner, including: the processing circuit adds multiple first presets to the second image signal The pixel signal obtains a third image signal with the same resolution as the image resolution corresponding to the first image signal.

Among them, in the above method, because part of the pixel signal is removed from the first image signal, and another pixel signal is added subsequently, for the above method, the image content of the third image signal is the same as that of the first image signal. The image content is different. Correspondingly, only the pixel signal part of the third image signal that is the same as the first image signal is a valid signal and can be used for the display of each display screen 40. Therefore, the subsequent supplementary first preset pixel signal can be It is an arbitrary pixel signal. In practical applications, the first preset pixel signal may be a black pixel signal, a white pixel signal, etc., which is not specifically limited in the embodiment of the present disclosure.

For example, referring to Figure 4, when the processing circuit receives the second image signal with an image resolution of 1280×720, it can add 1152,000 black pixel signals (the black cross in Figure 4) to the second image signal to obtain the resolution. A third image signal with the same rate as the image resolution 1920×1080 corresponding to the first image signal.

It should be noted that for the above method, the pixel signal part of the third image signal that is the same as the first image signal is the effective signal. Therefore, in specific applications, the number of display screens included in a display device needs to be considered comprehensively. The screen resolution of the display screen and the number of effective pixel signals in the third image signal are set. For example, the third image signal with an image resolution of 1920×1080 is obtained by removing 1152,000 pixel signals from the first image signal, and then adding another 1152,000 pixel signals. Correspondingly, the third image signal Only the first 921600 pixel signals are valid pixel signals. Therefore, for the above method of obtaining the third image signal, a display device can only include at most 3 display screens with a screen resolution of 1920×135. If the display screen is 4, the added black pixel signal will be displayed on the display screen after the 4th, and effective information cannot be displayed.

In addition, when image signals are transmitted between the driving circuit and the processing circuit through a dual LVDS interface, the two second image signals received by the processing circuit are the first image signals that are split into two parts according to the odd and even pixels, so , The processing circuit can also obtain the third image signal in the following manner, including: the processing circuit inserts the second image of even-numbered pixels in sequence between every two adjacent odd-numbered pixel signals in the second image signal of odd-numbered pixels An even-numbered pixel signal in the signal obtains a third image signal with the same resolution as the image resolution corresponding to the first image signal.

Among them, in the above method, because the first image signal is split into two parts, and the two parts are recombined later, for the above method, the image content of the third image signal is the same as the image content of the first image signal. The image content is the same. Correspondingly, all pixel signals in the third image signal are valid signals and can be used for display on each display screen.

For example, referring to Figure 5, when the processing circuit receives the second image signal of odd-numbered pixels with an image resolution of 960×1080, and the second image signal of even-numbered pixels with an image resolution of 960×1080, the processing circuit may Between every two adjacent odd-numbered pixel signals in the second image signal, an even-numbered pixel signal in the second image signal of even-numbered pixels is sequentially interspersed to obtain an image resolution 1920 corresponding to the first image signal. ×1080 the same third image signal.

It should be noted that for the above method, since all the pixel signals in the third image signal are valid signals, in specific applications, the number of display screens included in a display device only considers the screen resolution of the display screen itself. OK. For example, the third image signal with an image resolution of 1920×1080 is obtained by splitting the parity pixel of the first image signal and then recombining it. Accordingly, the 2073600 pixel signals in the third image signal are all Effective pixel signals. Therefore, for the above-mentioned method of obtaining the third image signal, a display device can include up to 8 display screens with a screen resolution of 1920×135, and each display screen can display effective information.

Step 305: The processing circuit processes the third image signal into a fourth image signal corresponding to the display screen one to one according to the screen resolution and image resolution of the display screen.

In the embodiment of the present disclosure, in order to segment the image signal required by each display screen from the third image signal and enable the image signal output by the processing circuit to be received by the display screen normally, this step can be specifically implemented in the following manner , Including: the processing circuit splits the third image signal into intermediate image signals corresponding to the display screen according to the screen resolution of the display; the processing circuit adds a plurality of second preset pixel signals to each intermediate image signal , To obtain each fourth image signal with the same image resolution as the display screen.

Among them, the processing circuit can first split the third image signal into the same number of intermediate image signals as the display screen according to the screen resolution of the display screen, where the image resolution corresponding to the intermediate image signal is equal to the screen resolution of the display screen. rate. Then, since the image resolution corresponding to the image signal that can be input to the display screen is generally greater than the screen resolution of the display screen itself, the processing circuit can add multiple second preset pixel signals to each intermediate image signal, so that Obtaining the respective fourth image signals with the same image resolution as the display screen, that is, obtaining the fourth image signals that can be received by the display screen. In practical applications, the second preset pixel signal may be a black pixel signal, a white pixel signal, etc., which is not specifically limited in the embodiment of the present disclosure.

In addition, it should be noted that the first preset pixel signal and the second preset pixel signal may be the same, for example, both may be black pixel signals. Of course, in practical applications, the first preset pixel signal and the second preset pixel signal may also be different. For example, one of the two may be a black pixel signal, and the other may be a white pixel signal. Embodiments of the present disclosure There is no specific restriction on this.

For example, referring to Figures 4 and 5, the screen resolution of the display can be 1920×135. When the display adopts dual LVDS interface, the image resolution of the display can be 1920×1080. When the display adopts single LVDS interface , The image resolution of the display screen can be 1280×720. Correspondingly, the processing circuit can split the pixel signals from line 1 to line 135 in the third image signal according to the screen resolution of 1920×135 to form an intermediate image signal corresponding to the first display screen. , Split the pixel signals from line 136 to line 270 in the third image signal to form the intermediate image signal corresponding to the second display screen, and so on, until the intermediate images corresponding to all the display screens are split signal. Then, when the image resolution of the display screen is 1920×1080, the processing circuit can add 1814400 black pixel signals to each intermediate image signal according to the image resolution of the display screen 1920×1080, so as to obtain the The image resolution of each fourth image signal is the same as 1920×1080. When the image resolution of the display screen is 1280×720, the processing circuit can add 662,400 black pixel signals to each intermediate image signal according to the image resolution of the display screen 1280×720, so that the image resolution of the display screen can be obtained. Fourth image signals with the same rate of 1280×720.

Step 306: The processing circuit outputs each fourth image signal to the corresponding display screen.

In the embodiment of the present disclosure, if the image signal is transmitted between the processing circuit and the display screen through a dual-channel LVDS interface, for the fourth image signal corresponding to any display screen, the processing circuit can divide the fourth image signal according to the odd and even pixels. The signal is split into the fourth image signal of the odd pixel and the fourth image signal of the even pixel, and the processing circuit can output the fourth image signal of the odd pixel to the corresponding display screen through the odd signal line in the dual LVDS interface, and The fourth image signal of the even pixel is output to the display screen through the even signal line in the dual LVDS interface.

For example, referring to FIGS. 4 and 5, for a fourth image signal corresponding to any display screen, the image resolution corresponding to the fourth image signal may be 1920×1080, and the processing circuit may divide the fourth image according to the odd and even pixels. The signal is split into the fourth image signal of odd-numbered pixels with an image resolution of 960×1080, and the fourth image signal of even-numbered pixels with an image resolution of 960×1080, and the processing circuit can pass the odd-numbered signal in the dual-channel LVDS interface The line outputs the fourth image signal of the odd-numbered pixels to the corresponding display screen, and outputs the fourth image signal of the even-numbered pixels to the display screen through the even-numbered signal line in the dual-channel LVDS interface.

If the image signal is transmitted between the processing circuit and the display through a single-channel LVDS interface, since the image resolution of the fourth image signal supplemented by the pixel signal is the same as the image resolution of the display, the processing circuit can transfer the fourth image The signal is output directly to the corresponding display screen.

For example, for the fourth image signal corresponding to any display screen, the image resolution corresponding to the fourth image signal may be 1280×720, and the processing circuit may directly output the fourth image signal with the image resolution of 1280×720 to The image resolution is also the corresponding display screen of 1280×720.

Step 307: The display screen performs display according to the fourth image signal.

In the embodiment of the present disclosure, when the image signal is transmitted between the processing circuit and the display screen through the dual LVDS interface, the display screen can receive the fourth image signal of odd pixels and the fourth image of even pixels sent by the processing circuit. Correspondingly, the display screen can display according to the fourth image signal of the odd-numbered pixels and the fourth image signal of the even-numbered pixels according to the display mode corresponding to the dual-channel LVDS interface.

When the image signal is transmitted between the processing circuit and the display screen through a single-channel LVDS interface, the display screen can receive the fourth image signal sent by the processing circuit 30, and accordingly, the display screen can directly display according to the fourth image signal .

In the embodiment of the present disclosure, the image receiver may input the first image signal including the image signal required by each display screen to the driving circuit, and then the driving circuit may adjust the resolution of the first image signal to obtain at least one second image signal. Image signal, output the second image signal to the processing circuit, and then the processing circuit can convert at least one second image signal into a third image signal with the same resolution as the image resolution corresponding to the first image signal, wherein the third image The signal includes the image signal required by each display screen, and the processing circuit can process the third image signal into a fourth image signal corresponding to the display screen one-to-one according to the screen resolution and image resolution of the display screen. The fourth image signal is output to the corresponding display screen, and the display screen can display according to the fourth image signal. In the embodiments of the present disclosure, the feature that the screen resolution of the display screen is smaller than its image resolution can be used to synthesize the image signal required by each display screen into the first image signal, which can then be combined with the driving circuit and the processing circuit. In cooperation, the image signal required by each display screen is separated from the first image signal, and processed into a signal form that can be received by the display screen, so that the display screen can display according to the received image signal. In this way, through an image The receiver and one drive circuit can drive at least two displays.

The embodiment of the present disclosure also discloses an electronic device including the above-mentioned display device and other electronic components such as a camera.

In the embodiment of the present disclosure, the display device in the electronic device may include an image receiver, a driving circuit, a processing circuit, and at least two display screens. The image receiver is connected to the drive circuit and is configured to input a first image signal to the drive circuit, the first image signal including an image signal required by each of the at least two display screens The driving circuit is configured to adjust the resolution of the first image signal to obtain at least one second image signal; the processing circuit is connected to the driving circuit and is configured to receive the The at least one second image signal is converted into a third image signal, and the third image signal is processed according to the screen resolution and image resolution of the at least two display screens Is a fourth image signal corresponding to the at least two display screens, wherein the third image signal includes an image signal required by each of the at least two display screens; and the at least two Each of the display screens is connected to the processing circuit, and is configured to receive a corresponding fourth image signal from the processing circuit, and display according to the fourth image signal. In the embodiments of the present disclosure, the feature that the screen resolution of the display screen is smaller than its image resolution can be used to synthesize the image signal required by each display screen into the first image signal, which can then be combined with the driving circuit and the processing circuit. In cooperation, the image signal required by each display screen is separated from the first image signal, and processed into a signal form that can be received by the display screen, so that the display screen can display according to the received image signal. In this way, through an image The receiver and one drive circuit can drive at least two displays.

For the foregoing method embodiments, for the sake of simple description, they are all expressed as a series of action combinations, but those skilled in the art should know that the present disclosure is not limited by the described sequence of actions, because according to the present disclosure, Some steps can be performed in other order or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present disclosure.

The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referred to each other.

Finally, it should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply these entities Or there is any such actual relationship or sequence between operations. Moreover, the terms "including", "including" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity, or device that includes a series of elements includes not only those elements, but also those that are not explicitly listed Other elements of, or also include elements inherent to this process, method, commodity or equipment. If there are no more restrictions, the element defined by the sentence "including a..." does not exclude the existence of other identical elements in the process, method, commodity or equipment including the element.

The above is a detailed introduction to a display device, an image display method, and an electronic device provided by the present disclosure. Specific examples are used in this article to illustrate the principles and implementations of the present disclosure. The description of the above embodiments is only for help Understand the methods and core ideas of the present disclosure; at the same time, for those of ordinary skill in the art, according to the ideas of the present disclosure, there will be changes in the specific implementation and the scope of application. In summary, the content of this specification does not It should be understood as a limitation of the present disclosure.

Claims (20)

1. A display device includes an image receiver, a drive circuit, a processing circuit and at least two display screens, wherein:

   The image receiver is connected to the drive circuit and is configured to input a first image signal to the drive circuit, the first image signal including an image signal required by each of the at least two display screens ；

   The driving circuit is configured to adjust the resolution of the first image signal to obtain at least one second image signal;

   The processing circuit is connected to the drive circuit and is configured to receive the at least one second image signal from the drive circuit, convert the at least one second image signal into a third image signal, and according to the at least one The screen resolution and image resolution of the two display screens, the third image signal is processed into a fourth image signal corresponding to the at least two display screens, wherein the third image signal includes the Image signals required for each of at least two display screens; and

   Each of the at least two display screens is connected to the processing circuit, and is configured to receive a corresponding fourth image signal from the processing circuit, and display according to the fourth image signal.
2. The display device according to claim 1, wherein the screen resolution of the at least two display screens is smaller than the image resolution of the at least two display screens.
3. The display device according to claim 1, wherein the image resolution corresponding to the third image signal is the same as the image resolution corresponding to the first image signal.
4. The display device according to claim 1, wherein the driving circuit includes a first signal input interface and a first signal output interface, the processing circuit includes a second signal input interface, the image receiver and the driving circuit Is connected to the first signal input interface of the drive circuit, and the first signal output interface of the drive circuit is connected to the second signal input interface of the processing circuit;

   The image resolution conforming to the first signal output interface is equal to the image resolution conforming to the second signal input interface, and neither is greater than the image resolution conforming to the first signal input interface.
5. The display device according to claim 2, wherein the first signal output interface and the second signal input interface are both single-channel low-voltage differential signal interfaces, or the first signal output interface and the second signal input interface The signal input interfaces are dual low-voltage differential signal interfaces.
6. The display device according to claim 4, wherein the at least two display screens comprise a third signal input interface, and the processing circuit comprises a one-to-one correspondence connection with the third signal input interfaces of the at least two display screens. The second signal output interface;

   The image resolution conforming to the second signal output interface is equal to the image resolution conforming to the third signal input interface, and is smaller than the image resolution conforming to the first signal input interface; or,

   It conforms that the image resolutions of the first signal input interface, the second signal output interface, and the third signal input interface are the same.
7. 8. The display device according to claim 6, wherein the second signal output interface and the third signal input interface are both single-channel low-voltage differential signal interfaces, or the second signal output interface and the third signal input interface The signal input interfaces are dual low-voltage differential signal interfaces.
8. The display device according to claim 1, wherein the at least two display screens have a display surface and a back surface opposite to the display surface, and the driving circuit and the processing circuit are respectively arranged on different display screens. The back.
9. The display device according to claim 1, wherein the driving circuit further comprises a first power output interface, the processing circuit further comprises a first power input interface, the first power output interface is connected to the first power input Interface connection, the driving circuit is further configured to input the power supply voltage required by the processing circuit into the first power input interface through the first power output interface to supply power to the processing circuit.
10. The display device according to claim 1, wherein the driving circuit further comprises at least two second power output interfaces, the at least two display screens further comprise a second power input interface, and the second power input interface is connected to The second power output interfaces are connected in a one-to-one correspondence, and the driving circuit is further configured to input the power supply voltage required by the corresponding display screen into the corresponding second power input interface through the second power output interface to Supply power to the display screen.
11. The display device according to claim 1, wherein the processing circuit is a field programmable gate array.
12. An image display method applied to the display device according to any one of claims 1 to 11, the method comprising:

    Inputting a first image signal from the image receiver to the driving circuit, the first image signal including an image signal required by each of the at least two display screens;

    Adjusting the resolution of the first image signal by the driving circuit to obtain at least one second image signal;

    Outputting the second image signal to a processing circuit by the driving circuit;

    Converting the at least one second image signal into a third image signal by the processing circuit, wherein the third image signal includes an image signal required by each of the at least two display screens;

    The processing circuit processes the third image signal into a fourth image signal corresponding to the at least two display screens one-to-one according to the screen resolution and image resolution of the at least two display screens;

    Outputting each of the fourth image signals to the corresponding display screen by the processing circuit; and

    The display screen performs display according to the fourth image signal.
13. The method of claim 12, wherein the screen resolution of the at least two display screens is smaller than the image resolution of the at least two display screens.
14. The method according to claim 12, wherein the image resolution corresponding to the third image signal is the same as the image resolution corresponding to the first image signal.
15. The method according to claim 14, wherein the first image signal includes a plurality of pixel signals;

    Adjusting the resolution of the first image signal by the driving circuit to obtain at least one second image signal includes:

    Extracting a target number of pixel signals in sequence from the plurality of pixel signals of the first image signal by the driving circuit to obtain a second image signal;

    Wherein, the target number is equal to the number of pixels included in the image resolution conforming to the first signal output interface of the driving circuit.
16. The method according to claim 15, wherein the processing circuit converting the at least one second image signal into a third image signal comprises:

    The processing circuit adds a plurality of first preset pixel signals to the second image signal to obtain a third image signal with the same resolution as the image resolution corresponding to the first image signal.
17. The method according to claim 14, wherein, adjusting the resolution of the first image signal by the driving circuit to obtain at least one second image signal comprises:

    Extracting odd-numbered pixel signals from the first image signal by the driving circuit to obtain a second image signal of odd-numbered pixels;

    The driving circuit extracts even-numbered pixel signals from the first image signal to obtain a second image signal of even-numbered pixels.
18. The method according to claim 17, wherein the conversion of the at least one second image signal into a third image signal by the processing circuit comprises:

    The processing circuit sequentially inserts one even-numbered pixel signal in the second image signal of the even-numbered pixel between every two adjacent odd-numbered pixel signals in the second image signal of the odd-numbered pixel to obtain a resolution A third image signal having the same rate as the image resolution corresponding to the first image signal.
19. The method according to claim 12, wherein the processing circuit processes the third image signal to be compatible with the at least two display screens according to the screen resolution and image resolution of the at least two display screens. The fourth image signal in one-to-one correspondence includes:

    The processing circuit splits the third image signal into intermediate image signals corresponding to the at least two display screens one-to-one according to the screen resolutions of the at least two display screens; and

    The processing circuit adds a plurality of second preset pixel signals to each of the intermediate image signals to obtain a fourth image signal with the same resolution as the image resolution of the corresponding display screen.
20. An electronic device comprising the display device according to any one of claims 1-11.

Images