WO2020177081A1 - 一种跨阻放大器和跨阻放大器电路 - Google Patents

一种跨阻放大器和跨阻放大器电路 Download PDF

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Publication number
WO2020177081A1
WO2020177081A1 PCT/CN2019/077010 CN2019077010W WO2020177081A1 WO 2020177081 A1 WO2020177081 A1 WO 2020177081A1 CN 2019077010 W CN2019077010 W CN 2019077010W WO 2020177081 A1 WO2020177081 A1 WO 2020177081A1
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Prior art keywords
amplifier
output
transimpedance amplifier
transimpedance
input
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PCT/CN2019/077010
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English (en)
French (fr)
Inventor
劳之豪
王昕�
向涛
商松泉
袁亚兴
刘德昂
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深圳市傲科光电子有限公司
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Priority to PCT/CN2019/077010 priority Critical patent/WO2020177081A1/zh
Publication of WO2020177081A1 publication Critical patent/WO2020177081A1/zh

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/08Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light

Definitions

  • the application belongs to the field of microelectronic circuits, and specifically relates to a transimpedance amplifier (TIA: Trans-Impedance Amplifier) and a transimpedance amplifier circuit that integrates DC drift cancellation and automatic gain control functions.
  • TIA Trans-Impedance Amplifier
  • Transimpedance amplifiers are often used in optical signal receiving equipment systems, such as optical sensors and optical fiber communication systems, to amplify weak electrical signals after optical signals are converted into electrical signals.
  • a DC servo loop is generally required to eliminate the influence of the input DC current, so that the direct current signal input by the optical signal through the photodiode will not affect the operating point of the transimpedance amplifier.
  • an automatic gain control Automatic gain control
  • Gain Control AGC circuit to adjust the gain of the transimpedance amplifier to achieve better load performance.
  • transimpedance amplifiers generally adjust the gain of the transimpedance amplifier by adjusting the resistance in the transimpedance feedback loop, but such a design will affect the stability of the circuit, and the frequency response characteristics of the corresponding transimpedance amplifier circuit will also be affected. For example, one loop is used to eliminate the DC drift, and another loop is used to adjust the feedback resistance to achieve automatic gain control. But in actual operation, if the feedback resistance is reduced by reducing the resistance of the transistor, the phase margin of the "parallel-parallel" feedback circuit will be reduced, which will cause stability problems. Even if the TIA system can still work, as the negative feedback resistance changes, the shape of the frequency response curve will change greatly.
  • the purpose of this application is to provide a transimpedance amplifier circuit and a transimpedance amplifier circuit, which aim to solve the influence of the traditional transimpedance amplifier on the stability and frequency response characteristics of the circuit when the gain is adjusted by adjusting the feedback resistance.
  • the first aspect of the embodiments of the present application provides a transimpedance amplifier, including:
  • the amplifier is configured to amplify the input signal
  • a transimpedance feedback loop is connected between the input terminal and the output terminal of the amplifier to provide negative feedback for the amplifier
  • the DC drift elimination and automatic gain control loops are respectively connected to the input and output terminals of the amplifier to match the DC component in the input current signal and eliminate the DC drift; at the same time, the amplifier is adjusted according to the magnitude of the voltage signal output by the amplifier. Control the electrical parameters of the loop to adjust the gain of the entire transimpedance amplifier circuit.
  • a second aspect of the embodiments of the present application provides a transimpedance amplifier circuit, including:
  • a pre-transimpedance amplifier which is the transimpedance amplifier as described above;
  • the first input terminal of the limiting amplifier is connected with the output terminal of the pre-transimpedance amplifier; according to the requirements of the output amplitude in practical applications, the limiting amplifier may have one-stage or multi-stage limiting Amplifier cascade.
  • An output buffer two input ends of the output buffer are connected to two output ends of the limiting amplifier, and the two output ends of the output buffer are used as output ends of the transimpedance amplifier circuit;
  • a feedback loop two input ends of the feedback loop are connected to two output ends of the output buffer, and an output end of the feedback loop is connected to the second input end of the limiting amplifier;
  • the input end of the gain control unit is connected to the two output ends of the limiting amplifier or the two output ends of the output buffer.
  • the above-mentioned transimpedance amplifier and transimpedance amplifier circuit integrate the DC drift elimination and automatic gain control functions into a loop network, which can not only eliminate the input DC current, but also automatically control the gain of the transimpedance amplifier, and the loop network does not It is not in the transimpedance feedback loop of the transimpedance amplifier, so the parameter change of the loop network will not affect the phase margin, the shape of the frequency response curve, the circuit bandwidth, the phase margin, and the stability of the amplifier's feedback.
  • FIG. 1 is a schematic structural diagram of a transimpedance amplifier provided by an embodiment of the present application
  • FIG. 2 is a schematic structural diagram of a transimpedance amplifier circuit provided by an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a transimpedance amplifier provided by another embodiment of the present application.
  • FIG. 4 is a schematic diagram of the circuit principle of a transimpedance amplifier provided by an embodiment of the present application.
  • the transimpedance amplifier 10 provided by an embodiment of the present application is generally used to amplify and convert an input current signal I in into a voltage signal V out .
  • the transimpedance amplifier 10 of this embodiment includes an amplifier Tz and a transimpedance feedback loop 11. DC drift elimination and automatic gain control loop 12.
  • the amplifier Tz is configured to amplify the input signal; the transimpedance feedback loop 11 is connected between the input end of the amplifier Tz and the output end of the amplifier Tz to provide negative feedback for the amplifier; the control loop 12 is connected to the input end of the amplifier Tz and an output terminal connected to match the input DC component of the current signal I in the I D, remove the DC drift; while controlling the electrical parameters of the circuit 12 according to the size of the adjustment voltage of the signal amplifier Tz output V out to adjust the overall transimpedance amplifier circuit 10 The gain.
  • the transimpedance amplifier 10 integrates the DC drift elimination and automatic gain control functions into a loop network, which can not only eliminate the input DC current, but also automatically control the gain of the transimpedance amplifier, and the loop network is not in the transimpedance amplifier.
  • the parameter change of the loop network will not affect the phase margin, the shape of the frequency response curve and the stability of the amplifier's feedback.
  • the pre-transimpedance amplifier that is, the above-mentioned transimpedance amplifier 10, is generally used in combination with the photodiode D2.
  • the photodiode D2 is used to receive optical signals and convert the optical signals into current signals I in .
  • Most of the current signals I in directly converted from optical signals are relatively weak, so the pre-transimpedance amplifier 10 is needed to transimpedance the current converted by the photodiode D2; in addition, the current signal I in includes no information.
  • I D DC component and an AC component carrying the information I a are relatively weak, so the pre-transimpedance amplifier 10 is needed to transimpedance the current converted by the photodiode D2; in addition, the current signal I in includes no information.
  • the pre-transimpedance amplifier 10 converts the single-ended current signal I A into a single-ended voltage signal V out ; at the same time, with the feedback loop 40, the single-ended voltage signal V out is converted into a pair of voltage differential signals on the limiting amplifier 20 OUTP ⁇ OUTN, and further amplify the voltage differential signal to a large enough amplitude, and then output it through the output buffer 30, that is, the above-mentioned voltage signal V out is the single-ended voltage signal V out output by the amplifier Tz, or a pair of limiters
  • the amplifier 20 outputs or outputs the voltage differential signal OUTP ⁇ OUTN output by the output buffer.
  • control loop 12 includes a bypass network 121 and a gain control unit 122.
  • Bypass network 121 connected to the input of the amplifier Tz, and is configured to match an input current signal I in the DC component I D, remove the DC drift, in particular a shunt DC component I D of the current signal I in order to eliminate DC offset .
  • the input end of the gain control unit 122 is connected to the common contact point of the transimpedance feedback loop 11 and the output end of the amplifier Tz, is connected to the voltage signal V out and connected to the bypass network 121, and is configured to adjust the bypass network according to the magnitude of the voltage signal V out
  • the electrical parameters of 121 are used to adjust the magnitude of the current signal I A connected to the input terminal of the amplifier Tz, thereby adjusting the gain of the transimpedance amplifier 10.
  • the resistance of the bypass network 121 is adjustable. Specifically, the resistance changes according to changes in the applied voltage.
  • the gain control unit 122 adjusts the bypass network 121 by detecting changes in the voltage signal V out . To achieve current adjustment, the AC component I A of the input current signal connected to the amplifier Tz can be adjusted to achieve automatic gain control.
  • the automatic gain control of the transimpedance amplifier 10 is realized by reducing the resistance of the bypass network 121. If no signal current AC component I A flows through the bypass network 121, the resistance of the bypass network 121 is equal to infinity. At this time, the amplifier Tz Work in the maximum gain state. When the current signal I in is relatively large, the resistance of the bypass network 121 is relatively small, so that part of the signal current AC component I A will flow away through the bypass network 121 and will not enter the amplifier Tz, thereby reducing V out , thus Realize automatic gain control.
  • the voltage-controlled bypass network 121 is not in the transimpedance (negative) feedback loop 11 of the amplifier Tz, so the parameter change of the bypass network 121 will not affect the phase margin and the stability of the parallel-parallel feedback of the transimpedance amplifier. Sex. In this way, under the premise of not affecting the frequency response characteristics, the transimpedance amplifier has a better linear amplification capability, and the anti-overload capability and dynamic range have been improved.
  • the bypass network 121 includes a unidirectional conducting device and a voltage dividing device.
  • the input terminal of the unidirectional conducting device is connected to the input terminal of the amplifier Tz, and the output terminal of the unidirectional conducting device is connected to the pass divider.
  • the pressure device is grounded.
  • the gain control unit 122 includes an operational amplifier U1, the input terminal of the operational amplifier U1 is connected to the voltage signal V out , and the output terminal of the operational amplifier U1 is connected to the output terminal of the unidirectional conducting device.
  • Unidirectional conduction device varies according to the resistance in the voltage across the load changes, i.e., the output terminal voltage V in and the operational amplifier U1 Tz input of the amplifier.
  • the unidirectional conduction device is a diode D1 to reduce the circuit cost.
  • the unidirectional conduction device may be a transistor that has been processed to have diode characteristics, such as a triode or a field effect transistor that short-circuits two of the electrodes.
  • the voltage dividing device includes a resistor R1, and may further include a capacitor, a semiconductor device, and the like.
  • the voltage signal V out is a single-ended voltage signal V out output by the amplifier Tz, or it may be a pair of voltage differential signals.
  • the voltage signal V out is a single-ended voltage signal V out input to one input terminal of the operational amplifier U1, and the other input terminal can be added to the reference voltage Vref.
  • the reference voltage Vref does not need to be added.
  • the bypass current flows through the diode D1 and the resistor R1.
  • the control voltage from the output of the operational amplifier U1 decreases, and the voltage applied to the diode D1 increases, making it more More current flows through the diode D1, so that the amplifier Tz can be guaranteed to work in a constant working condition.
  • the automatic gain control function is realized by reducing the resistance r D1 of the diode D1.
  • the total resistance R1 of the bypass network 121 is equal to the resistance value r D1 of the diode D1 plus the resistance value R R1 of the resistor R1.
  • the control voltage output by the operational amplifier U1 decreases, and the increase in the voltage drop on the diode D1 causes the resistance value r D1 of the diode D1 to decrease, so that the current I D1 of the bypass network 121 increases.
  • This part of the current I D1 flows to the ground through the bypass network 121, thereby reducing the AC component I A of the input current signal flowing to the amplifier Tz, thus realizing automatic gain control.
  • the automatic gain control in this application will not change the feedback resistance R F , so it will not affect the frequency response of the (transimpedance) transimpedance amplifier 10, nor will it affect the stability of the transimpedance amplifier 10.
  • the resistance value R R1 of the resistor R1 can also be adjusted to realize the automatic gain control function.
  • the transimpedance feedback loop 11 includes a first feedback resistor R F , and the first feedback resistor R F is connected in series between the input terminal and the output terminal of the amplifier Tz.
  • This application does not need to adjust the parameters (such as resistance) of the transimpedance feedback loop 11 to realize automatic gain control. Therefore, the transimpedance feedback loop 11 can be set with only one feedback resistor R F.
  • the feedback loop 11 may also include capacitors, transistors, etc. arranged in series and parallel with the feedback resistor R F.
  • a transimpedance amplifier 10 working at 25Gb/s is designed, which can be integrated in the chip, the average input signal current from the photodiode is about 5uA, and the resistance R1 of the bypass network 121 is selected to be 5.2k ⁇ , To ensure that the circuit chip has high gain and low noise.
  • the variable resistor R1 of the bypass network 121 enables the chip to have an automatic gain control function, and the automatic gain control function improves the load capacity of the chip under high input current, making the output of the chip more linear.
  • PAM4 Pulse Amplitude Modulation, 4-level pulse amplitude modulation
  • the linearity of the chip output is very important.
  • the variable resistor bypass network 121 used in this application is not in the negative feedback loop of the amplifier Tz, it can be used without affecting the frequency response performance of the chip. Adjust the gain of the chip.
  • an embodiment of the present application also provides a transimpedance amplifier circuit 100.
  • the transimpedance amplifier circuit 100 includes a pre-transimpedance amplifier, a limiting amplifier 20, an output buffer 30, and a feedback loop 40.
  • the pre-transimpedance amplifier is the above-mentioned transimpedance amplifier 10; the first input end of the limiting amplifier 20 is connected to the output end of the pre-transimpedance amplifier 10; the two input ends of the output buffer 30 and two of the limiting amplifier 20 are The output ends are connected, the two output ends of the output buffer 30 are used as the output ends of the transimpedance amplifier circuit 100; the two input ends of the feedback loop 40 are connected to the two output ends of the output buffer 30, and the output ends of the feedback loop 40 Connected to the second input end of the limiting amplifier 20; wherein the input end of the gain control unit 122 in the transimpedance amplifier 10 is connected to the two output ends of the limiting amplifier 20 or the two output ends of the output buffer 30 to connect Input the voltage signal V out .
  • the input of the pre-transimpedance amplifier 10 is generally connected to the anode of the photodiode D2, and the cathode of the photodiode D2 is connected to the supply voltage VPD.
  • the incident light is converted into photocurrent by the photodiode D2, and the photocurrent passes through
  • the pre-transimpedance amplifier 10 converts a single-ended current signal into a single-ended voltage signal.
  • the limiting amplifier 20 converts the single-ended voltage signal into a double-ended voltage differential signal and inputs it to the output buffer 30.
  • the limiting amplifier 20 and the output buffer 30 are both CML (Current-Mode Logic, current-mode logic) devices.
  • the transimpedance amplifier circuit 100 further includes a first differential load resistance R3 and a second differential load resistance R4.
  • the first differential load resistance R3 and the second differential load resistance R4 are respectively connected to two of the output buffer 30 Between the output terminal and the power supply Vcc1.
  • the first differential load resistance R3 and the second differential load resistance R4 also serve as load resistances at the output end of the entire circuit.
  • the feedback loop 40 includes an operational amplifier 41.
  • the two input terminals of the operational amplifier 41 are respectively connected to the two output terminals of the output buffer 30, and the output terminal of the second operational amplifier 41 is connected to the limiting amplifier 20.
  • the two input terminals of the second operational amplifier 41 are respectively connected to the two output terminals of the output buffer 30 through a current-limiting resistor R5 and a current-limiting resistor R6, and the two input terminals of the second operational amplifier 41 are directly connected to a Filter capacitor C1.
  • the inverting input terminal of the pre-transimpedance amplifier 10 is connected to the anode of the photodiode D2
  • the non-inverting input terminal of the second operational amplifier 41 is connected to the non-inverting output terminal of the output buffer 30, and the opposite of the second operational amplifier 41
  • the phase input terminal is connected to the inverted output terminal of the output buffer 30.
  • One application field of this application is high-speed optical communication technology.
  • the transimpedance amplifier circuit 100 and the transimpedance amplifier 10 designed with the technology proposed in this application will not affect the chip frequency.
  • the transimpedance amplifier circuit 100 and the transimpedance amplifier 10 have better linear amplification capabilities, and the anti-overload capability and dynamic range of the transimpedance amplifier circuit 100 and the transimpedance amplifier 10 are improved.
  • transimpedance amplifier circuit 100 and the transimpedance amplifier 10 are proposed in this application for applications in the field of high-speed optical communications, their application fields are not limited to this, as long as they are equally similar applications, the technology proposed in this application can be used to improve the circuit Performance.

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Abstract

一种具有直流漂移消除功能和自动增益控制功能的跨阻放大器,其包括放大器、跨阻反馈回路、直流漂移消除及自动增益控制回路;直流漂移消除及自动增益控制回路与所述放大器的输入端和输出端分别连接,以匹配输入电流信号中的直流分量,消除直流漂移;同时根据所述输出电压信号的大小调节所述回路的电学参数,以调节整个跨阻放大器电路的增益。如此,与传统的跨阻放大器电路相比,用一个电路支路同时实现直流漂移消除功能和自动增益控制功能,而不会影响频率响应曲线的形状、电路带宽和相位裕度,提高电路的稳定性。

Description

一种跨阻放大器和跨阻放大器电路 技术领域
本申请属于微电子电路领域,具体涉及一种整合直流漂移消除和自动增益控制功能的跨阻放大器(TIA:Trans-Impedance Amplifier)和跨阻放大器电路。
背景技术
跨阻放大器常用于光信号接收设备系统中,如光学传感器,光纤通信系统,在光信号转换为电信号之后,进行微弱电信号的放大。
在跨阻放大器电路中,一般需要一个直流伺服回路来消除输入直流电流的影响,这样由光信号通过光电二极管输入的直流电信号不会影响跨阻放大器的工作点。另外,因为输入光信号的强度变化范围比较大,所以在跨阻放大器电路中,需要有一个自动增益控制(Automatic Gain Control:AGC)电路来调节跨阻放大器的增益,以取得更好的负载性能。
传统的跨阻放大器一般通过调节跨阻反馈回路中的电阻来调节跨阻放大器的增益,不过这样的设计会影响电路的稳定性,对应跨阻放大器电路的频率响应特性也会受影响。例如,通过一个回路来实现直流漂移消除功能,通过另外一个回路调节反馈电阻来实现自动增益控制。但是在实际操作中,如果通过降低晶体管的电阻来降低反馈电阻将会降低“并-并”反馈电路的相位裕度,从而引起稳定性问题。即使TIA系统依然可以工作,但是随着负反馈电阻的改变,频率响应曲线的形状也会有很大的改变。
技术问题
本申请的在于提供的一种跨阻放大器电路和跨阻放大器电路,旨在解决传统的跨阻放大器通过调节反馈电阻来调节增益时,对电路的稳定性和频率响应特性的影响。
技术解决方案
本申请实施例第一方面提供了一种跨阻放大器,包括:
放大器,被配置为对输入信号进行放大;
跨阻反馈回路,连接在所述放大器的输入端和输出端之间,以为所述放大器提供负反馈;
直流漂移消除及自动增益控制回路,分别与所述放大器的输入端和输出端连接,以匹配输入电流信号中的直流分量,消除直流漂移;同时根据所述放大器输出的电压信号的大小调节所述控制回路的电学参数,以调节整个跨阻放大器电路的增益。
本申请实施例第二方面提供了一种跨阻放大器电路,包括:
前置跨阻放大器,其为如上所述的跨阻放大器;
限幅放大器,所述限幅放大器的第一输入端与所述前置跨阻放大器的输出端连接;根据实际应用中对输出幅度的要求,所述限幅放大器可以有一级或者多级限幅放大器级联。
输出缓冲器,所述输出缓冲器的两个输入端与所述限幅放大器的两个输出端连接,所述输出缓冲器的两个输出端作为所述跨阻放大器电路的输出端;及
反馈环路,所述反馈环路的两个输入端接所述输出缓冲器的两个输出端,所述反馈环路的输出端接所述限幅放大器的第二输入端;
其中,所述增益控制单元的输入端与所述限幅放大器的两个输出端或所述输出缓冲器的两个输出端连接。
有益效果
上述跨阻放大器和跨阻放大器电路把直流漂移消除和自动增益控制功能整合在一个回路网络,该回路网络不仅可以消除输入的直流电流,还可以自动控制跨阻放大器的增益,而且该回路网络并不在跨阻放大器的跨阻反馈回路中,所以该回路网络的参数变化不会影响相位裕度、不会影响频率响应曲线的形状、电路带宽、相位裕度及放大器的反馈的稳定性。
附图说明
图1是本申请一实施例所提供的跨阻放大器的结构示意图;
图2是本申请一实施例所提供的跨阻放大器电路的结构示意图;
图3是本申请另一实施例所提供的跨阻放大器的结构示意图;
图4是本申请一实施例所提供的跨阻放大器的电路原理示意图。
本发明的实施方式
为了使本申请的目的、技术申请及优点更加清楚明白,以下结合附图及实施例,对本申请进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本申请,并不用于限定本申请。
请参阅图1,本申请一实施例提供的跨阻放大器10一般用作接入电流信号I in放大并转换为电压信号V out,本实施例的跨阻放大器10包括放大器Tz、跨阻反馈回路11、直流漂移消除及自动增益控制回路12。
放大器Tz被配置为对输入信号进行放大;跨阻反馈回路11连接在该放大器Tz的输入端和放大器Tz的输出端之间,为放大器提供负反馈;控制回路12分别与放大器Tz的输入端和输出端连接,以匹配输入电流信号I in中的直流分量I D,消除直流漂移;同时根据放大器Tz输出的电压信号V out的大小调节控制回路12的电学参数,以调节整个跨阻放大器电路10的增益。
跨阻放大器10把直流漂移消除和自动增益控制功能整合在一个回路网络,该回路网络不仅可以消除输入的直流电流,还可以自动控制跨阻放大器的增益,而且该回路网络并不在跨阻放大器的跨阻反馈回路中,所以该回路网络的参数变化不会影响相位裕度、不会影响频率响应曲线的形状和放大器的反馈的稳定性。
在一些示例应用中,请参阅图2,前置跨阻放大器即上述跨阻放大器10一般与光电二极管D2联合使用,光电二极管D2用于接收光信号,并把光信号转换为电流信号I in,大部分光信号直接转换成的电流信号I in都比较微弱,所以需要前置跨阻放大器10用于把光电二极管D2所转换的电流进行跨阻放大;另外,该电流信号I in包括没有携带信息的直流分量I D和携带信息的交流分量I A。前置跨阻放大器10将单端的电流信号I A转换为单端的电压信号V out;同时,借助反馈环路40,单端电压信号V out在限幅放大器20上被转化为一对电压差分信号OUTP\OUTN,并把电压差分信号进一步放大到足够大的幅度,然后通过输出缓冲器30输出,即上述电压信号V out为放大器Tz输出的单端电压信号V out,也可以为一对限幅放大器20输出或输出缓冲器输出的电压差分信号OUTP\OUTN。
在一个实施例中,请参阅图3,控制回路12包括旁路网络121和增益控制单元122。旁路网络121与放大器Tz的输入端连接,被配置为匹配输入电流信号中I in的直流分量I D,消除直流漂移,具体是对电流信号I in中的直流分量I D分流以消除直流漂移。增益控制单元122的输入端连接跨阻反馈回路11与放大器Tz的输出端的共接点,接入电压信号V out并与旁路网络121连接,被配置为根据电压信号V out的大小调节旁路网络121的电学参数,以调节接入该放大器Tz的输入端的电流信号I A的大小,进而以调节跨阻放大器10的增益。
请参阅图3和图4,旁路网络121的阻值可调,具体是阻值根据所加载的电压的变化而变化,增益控制单元122通过检测电压信号V out的变化来调节旁路网络121的阻值以实现电流调节,从而调节接入到放大器Tz的输入电流信号交流分量I A的大小,以实现自动增益控制。
上述跨阻放大器10自动增益控制是通过减小旁路网络121的电阻来实现的,如果没有信号电流交流分量I A流过旁路网络121,旁路网络121的电阻等于无穷大,这时候放大器Tz工作在最大增益状态。当电流信号I in比较大的时候,旁路网络121电阻比较小,这样部分信号电流交流分量I A就通过旁路网络121流走,不会进入到放大器Tz,从而降低了V out,这样就实现了自动增益控制。另外,电压控制的旁路网络121并不在放大器Tz的跨阻(负)反馈回路11中,所以旁路网络121的参数变化不会影响相位裕度和跨阻放大器“并-并”反馈的稳定性。如此,不影响频响特性前提下,跨阻放大器具有更好的线性放大能力,抗过载能力和动态范围都得到了提高。
在一个实施例中,请参阅图4,旁路网络121包括一单向导通器件和分压器件,单向导通器件的输入端接放大器Tz的输入端,单向导通器件的输出端与通过分压器件接地。增益控制单元122包括运算放大器U1,运算放大器U1输入端接入电压信号V out,运算放大器U1的输出端接单向导通器件的输出端。单向导通器件的阻值根据加载在其两端的电压的变化而变化,即放大器Tz输入端的电压V in和运算放大器U1的输出端电压。比如单向导通器件为二极管D1,以降低电路成本。在其他实施方式中,单向导通器件可以是经过处理具有二极管特性的晶体管,例如短接其中两个电极的三极管或者场效应管。分压器件包括电阻R1,也可以进一步包括电容、半导体器件等。
如上述,电压信号V out为放大器Tz输出的单端电压信号V out,也可以为一对电压差分信号。其中,电压信号V out为单端电压信号V out输入到运算放大器U1的一个输入端,另一个输入端可加入参考电压Vref。电压信号V out为一对电压差分信号时,则不需要加入参考电压Vref。
具体地,请参阅图4,旁路电流流过二极管D1和电阻R1,当电流信号I in过高的时候,来自于运算放大器U1输出的控制电压降低,加载在二极管D1的电压增加,使得更多的电流流过二极管D1,这样可以保证放大器Tz工作在恒定的工作条件。
本实施例中,自动增益控制功能是通过减小二极管D1的电阻r D1来实现的,旁路网络121的总电阻R1等于二极管D1的阻值r D1和电阻R1阻值R R1相加,这里r D1=V in/I D1=26mV/I D1。如果没有电流流过二极管D1,旁路网络121的电阻等于无穷大,这时候跨阻放大器10工作在最大增益状态。当输入电流信号I in比较大的时候,运算放大器U1输出的控制电压降低,二极管D1上的压降增加导致二极管D1的阻值r D1变小,从而旁路网络121的电流I D1增大,这部分电流I D1就通过旁路网络121流走到地,从而降低了流向放大器Tz的输入电流信号的交流分量I A,这样就实现了自动增益控制。本申请中的自动增益控制不会去改变反馈电阻R F,所以不会影响(跨阻)跨阻放大器10的频率响应,也不会影响跨阻放大器10的稳定性。其他实施例中,也可以调节电阻R1阻值R R1来实现自动增益控制功能。
在一个实施例中,请参阅图1、图3和图4,跨阻反馈回路11包括第一反馈电阻R F,第一反馈电阻R F串接在放大器Tz的输入端和输出端之间。本申请不需要通过调节跨阻反馈回路11的参数(比如阻值)来实现自动增益控制,因此,可以仅以一个反馈电阻R F设置跨阻反馈回路11。在其他实施方式中,反馈回路11还可以包括与反馈电阻R F串并联设置的电容、晶体管等。
在一个示例中,设计了工作在25Gb/s 的跨阻放大器10,其可以集成在芯片中,来自于光电二极管的平均输入信号电流大约是5uA,旁路网络121的电阻R1选择为5.2kΩ,以保证电路芯片有高增益和低噪音。根据以上分析,旁路网络121的可变电阻R1使得芯片具有自动增益控制功能,自动增益控制功能提高了芯片在高输入电流下的负载能力,使得芯片的输出更加线性。对于100G/400G的相干光通信系统,特别是PAM4(4 Pulse Amplitude Modulation,4 级脉冲幅度调制)调制系统,芯片输出的线性度非常重要。与使用可变反馈电阻RF的芯片相比较,因为在本申请中采用的可变电阻旁路网络121并不在放大器Tz的负反馈环路中,所以可以在不影响芯片的频率响应性能的前提下调节芯片的增益。
请参阅图2,本申请实施例还提供的一种跨阻放大器电路100,跨阻放大器电路100包括前置跨阻放大器、限幅放大器20、输出缓冲器30及反馈环路40。
前置跨阻放大器为上述跨阻放大器10;限幅放大器20的第一输入端与前置跨阻放大器10的输出端连接;输出缓冲器30的两个输入端与限幅放大器20的两个输出端连接,输出缓冲器30的两个输出端作为跨阻放大器电路100的输出端;反馈环路40的两个输入端接输出缓冲器30的两个输出端,反馈环路40的输出端接限幅放大器20的第二输入端;其中,跨阻放大器10中的增益控制单元122的输入端与限幅放大器20的两个输出端或输出缓冲器30的两个输出端连接,以接入所述电压信号V out
在光学传感器和光纤通信系统中,前置跨阻放大器10的输入端一般接光电二极管D2的阳极,光电二极管D2的阴极接供电电压VPD,入射光通过光电二极管D2转化为光电流,光电流经过前置跨阻放大器10把单端的电流信号转换为单端的电压信号。其后,限幅放大器20将单端电压信号在转化为双端电压差分信号输入到输出缓冲器30。可选地,该限幅放大器20和输出缓冲器30均为CML(Current-Mode Logic,电流型逻辑)器件。
在一个实施例中,跨阻放大器电路100还包括第一差分负载电阻R3和第二差分负载电阻R4,第一差分负载电阻R3和第二差分负载电阻R4分别连接在输出缓冲器30的两个输出端和供电电源Vcc1之间。第一差分负载电阻R3和第二差分负载电阻R4还作为整个电路输出端的负载电阻。
在一些实施方式中,反馈环路40包括运算放大器41,运算放大器41的两个输入端分别与输出缓冲器30的两个输出端连接,第二运算放大器41的输出端接限幅放大器20的第二输入端12。可选的,第二运算放大器41的两个输入端分别通过限流电阻R5和限流电阻R6连接输出缓冲器30的两个输出端,且第二运算放大器41的两个输入端直接连接有一滤波电容C1。
可选的,前置跨阻放大器10的反相输入端与光电二极管D2的阳极连接,第二运算放大器41的同相输入端与输出缓冲器30的同相输出端连接,第二运算放大器41的反相输入端与输出缓冲器30的反相输出端连接。
本申请的一个应用领域是高速光通信技术,例如在100G/200G/400G高速光通信系统中,用本申请提出的技术而设计的跨阻放大器电路100和跨阻放大器10,在不影响芯片频响特性前提下,跨阻放大器电路100和跨阻放大器10具有更好的线性放大能力,跨阻放大器电路100和跨阻放大器10的抗过载能力和动态范围都得到了提高。跨阻放大器电路100和跨阻放大器10虽然本申请的提出是在高速光通信领域的应用, 但是其应用领域并不限于此,只要是同等类似的应用都可以采用本申请提出的技术,提高电路的性能。
对比测试了采用了本申请所提出的技术的高速跨阻放大器10的芯片,以及未使用本申请所提出的技术的高速跨阻放大器10的芯片,经过对两种芯片的对比测试,结果证明,采用本申请所提出的技术的跨阻放大器10的芯片,在保持频响特性不变的情况下可以改变电路的增益,电路的动态范围增加了50%,抗过载能力得到了明显提高。
以上所述仅为本申请的较佳实施例而已,并不用以限制本申请,凡在本申请的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本申请的保护范围之内。

Claims (14)

  1. 一种跨阻放大器,其特征在于,包括:
    放大器,被配置为对输入信号进行放大;
    跨阻反馈回路,连接在所述放大器的输入端和输出端之间,以为所述放大器提供负反馈;
    直流漂移消除及自动增益控制回路,分别与所述放大器的输入端和输出端连接,以匹配输入电流信号中的直流分量,消除直流漂移;同时根据所述放大器输出的电压信号的大小调节所述控制回路的电学参数,以调节整个跨阻放大器电路的增益。
  2. 如权利要求1所述的跨阻放大器,其特征在于,所述直流漂移消除及自动增益控制回路包括:
    旁路网络,与所述放大器的输入端连接,被配置为匹配输入电流信号中的直流分量,消除直流漂移;及
    增益控制单元,接入所述电压信号并与所述旁路网络连接,被配置为根据所述电压信号的大小调节所述旁路网络的电学参数,以调节整个跨阻放大器电路的增益。
  3. 如权利要求2所述的跨阻放大器,其特征在于,所述旁路网络的阻值可调。
  4. 如权利要求2所述的跨阻放大器,其特征在于,所述旁路网络的阻值根据所加载的电压变化而变化。
  5. 如权利要求2、3或4所述的跨阻放大器,其特征在于,所述旁路网络包括一单向导通器件和分压器件,所述单向导通器件的输入端接所述跨阻放大器的输入端,所述单向导通器件的输出端通过所述分压器件接地。
  6. 如权利要求5所述的跨阻放大器,其特征在于,所述单向导通器件为二极管,或者具有二极管特性的晶体管。
  7. 如权利要求5所述的跨阻放大器,其特征在于,所述分压器件包括电阻。
  8. 如权利要求5所述的跨阻放大器,其特征在于,所述增益控制单元包括运算放大器,所述运算放大器输入端接入所述电压信号,所述运算放大器的输出端连接所述单向导通器件的输出端。
  9. 如权利要求1或8所述的跨阻放大器,其特征在于,所述电压信号为一对电压差分信号。
  10. 如权利要求1或8所述的跨阻放大器,其特征在于,该放大器电路集成在芯片中。
  11. 如权利要求1所述的跨阻放大器,其特征在于,所述反馈回路包括第一反馈电阻,所述第一反馈电阻串接在所述跨阻放大器的输入端和输出端之间。
  12. 一种跨阻放大器电路,其特征在于,包括:
    前置跨阻放大器,其为如权利要求1至11任一项所述的跨阻放大器;
    限幅放大器,所述限幅放大器的第一输入端与所述前置跨阻放大器的输出端连接;根据实际应用中对输出幅度的要求,所述限幅放大器可以有一级或者多级限幅放大器级联。
    输出缓冲器,所述输出缓冲器的两个输入端与所述限幅放大器的两个输出端连接,所述输出缓冲器的两个输出端作为所述跨阻放大器电路的输出端;及
    反馈环路,所述反馈环路的两个输入端接所述输出缓冲器的两个输出端,所述反馈环路的输出端接所述限幅放大器的第二输入端;
    其中,所述增益控制单元的输入端与所述限幅放大器的两个输出端或所述输出缓冲器的两个输出端连接。
  13. 如权利要求12所述的跨阻放大器电路,其特征在于,还包括第一差分负载电阻和第二差分负载电阻,所述第一差分负载电阻和所述第二差分负载电阻分别连接在所述输出缓冲器的两个输出端和电源之间。
  14. 如权利要求12所述的跨阻放大器电路,其特征在于,所述反馈环路包括一运算放大器,所述运算放大器的两个输入端分别与所述输出缓冲器的两个输出端连接,所述运算放大器的输出端接所述限幅放大器的第二输入端。
PCT/CN2019/077010 2019-03-05 2019-03-05 一种跨阻放大器和跨阻放大器电路 WO2020177081A1 (zh)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101106360A (zh) * 2006-07-10 2008-01-16 Jds尤尼弗思公司 用于跨阻放大器的dc偏移消除
CN101621252A (zh) * 2009-08-07 2010-01-06 天津泛海科技有限公司 直流恢复与直流监视电路
CN107835054A (zh) * 2016-09-15 2018-03-23 塑料光纤科技发展有限公司 用于基于线性调制的高速光通信的跨阻放大器

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101106360A (zh) * 2006-07-10 2008-01-16 Jds尤尼弗思公司 用于跨阻放大器的dc偏移消除
CN101621252A (zh) * 2009-08-07 2010-01-06 天津泛海科技有限公司 直流恢复与直流监视电路
CN107835054A (zh) * 2016-09-15 2018-03-23 塑料光纤科技发展有限公司 用于基于线性调制的高速光通信的跨阻放大器

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