WO2020168522A1 - 一种片上系统、访问命令的路由方法及终端 - Google Patents

一种片上系统、访问命令的路由方法及终端 Download PDF

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Publication number
WO2020168522A1
WO2020168522A1 PCT/CN2019/075754 CN2019075754W WO2020168522A1 WO 2020168522 A1 WO2020168522 A1 WO 2020168522A1 CN 2019075754 W CN2019075754 W CN 2019075754W WO 2020168522 A1 WO2020168522 A1 WO 2020168522A1
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WIPO (PCT)
Prior art keywords
address
access
command
range configuration
access command
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PCT/CN2019/075754
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English (en)
French (fr)
Inventor
何世明
孙波
周文旻
张志强
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP19916504.4A priority Critical patent/EP3893119B1/en
Priority to CN201980067620.8A priority patent/CN112840327A/zh
Priority to PCT/CN2019/075754 priority patent/WO2020168522A1/zh
Publication of WO2020168522A1 publication Critical patent/WO2020168522A1/zh
Priority to US17/394,002 priority patent/US11748279B2/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/206—Memory mapped I/O
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • This application relates to the field of chip technology, and in particular to a system on chip, a routing method for access commands, and a terminal.
  • a system-on-chip (SOC) chip is an integrated circuit that integrates multiple electronic systems on the same chip, and is widely used in terminal devices such as mobile phones and handheld computers.
  • the SOC is usually composed of multiple intellectual property (intellectual property, IP) cores, and multiple IP cores are connected to an external memory through a bus, so as to interact with programs and data.
  • IP core can be regarded as a pre-designed circuit function module for implementing corresponding functions.
  • the IP core can be a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a multimedia subsystem (video subsystem), and a camera subsystem ( camera subsystem, wireless access module (modem), display subsystem (display subsystem), etc.
  • the structure of a SOC may be as shown in FIG. 1.
  • AP multimedia subsystem
  • camera subsystem multimedia subsystem
  • display subsystem GPU
  • wireless access module are connected to external memory through a bus.
  • the SOC may also include a system cache (system cache, SC).
  • SC cache is the last level cache (LLC) of the system and can be regarded as an extension of external memory.
  • LLC system cache
  • the IP core accesses the external memory, it can first access the SC. If the access hits a cache line in the SC, the data or response can be returned directly from the SC. Since on-chip access can obtain greater bandwidth than off-chip access, the use of SC can improve access efficiency to a certain extent.
  • the embodiments of the present application provide a system on chip, an access command routing method, and a terminal to solve the problems of low IP core access hit rate and high chip access power consumption in the prior art.
  • an embodiment of the present application provides a system on chip
  • the system on chip SOC includes an intellectual property IP core and a bus; wherein the IP core is used to obtain the address range configuration label corresponding to the access address according to the access address corresponding to the access command, The access command and the address range configuration label are transmitted to the bus.
  • the address range configuration label is used for the bus to route the access command; the bus is used to route the access command to the system cache SC or external memory according to the address range configuration label.
  • the IP core obtains the address range configuration label corresponding to the access address, and sends the address range configuration label to the bus along with the access command. Therefore, the bus can determine whether to route the access command to the SC or to the external memory after receiving the address range configuration label.
  • the address space accessed by the IP core includes a first part of the address space and a second part of the address space, wherein the address range configuration label corresponding to the first part of the address space is a specified value, and the second part of the address space corresponds to The address range configuration label of is a value other than the specified value.
  • the correspondingly stored data in the first part of the address space is not suitable for storage in SC, and the correspondingly stored data in the second part of the address space is suitable for storage in SC.
  • the data in the first part of the address space can be routed to the external memory for processing, and the data in the second part of the address space can be routed to the SC for processing, so that more appropriate devices can be used to process the data in different address spaces.
  • the bus when the bus routes the access command to the SC or external memory according to the address range configuration label, it can be specifically implemented in the following way: if the address range configuration label is a specified value, the access command is routed to the external memory; If the address range configuration label is a value other than the specified value, the access command will be routed to the SC.
  • the access address is a virtual address
  • the IP core obtains the address range configuration label corresponding to the access address according to the access address corresponding to the access command, which can be implemented in the following way: the access address is sent to the memory management unit MMU
  • the MMU is used to obtain the address range configuration label corresponding to the access address by querying the page table.
  • the page table is used to record the mapping relationship between the access address and the address range configuration label; to receive the address range configuration label sent by the MMU.
  • the MMU queries the page table according to the access address to obtain the physical address, and the address range configuration label is stored in the high order of the physical address.
  • the IP core can obtain the address range configuration label corresponding to the access address (ie virtual address) through the virtual-real address conversion process of the MMU.
  • address range configuration label can also be stored in a dedicated bit field of the page table.
  • the access address is a physical address
  • the IP core obtains the address range configuration label corresponding to the access address according to the access address corresponding to the access command, which can be implemented in the following way: query the register according to the access address, obtain the The address range configuration label corresponding to the access address is placed in the IP core to record the mapping relationship between the access address and the address range configuration label.
  • the above mapping relationship can be stored in a register in advance.
  • the IP core initiates an access command, it can query the corresponding address range configuration label in the register according to the access address of the access command, and send the address range configuration label along with the access command to the bus.
  • system-on-chip may also include SC, which is used to process access commands.
  • the access command can be processed through the SC in the system-on-chip.
  • the SC can have different processing methods when processing the access command.
  • the SC processes the access command, which can be specifically implemented in the following manner: if there is a cache line corresponding to the access address in the SC, the SC reads and writes data in the SC according to the access command.
  • the SC can directly read or write in the corresponding cache line.
  • the bus is also used to route the address range configuration label to the SC, then the SC processes the access command, which can be specifically implemented in the following manner: if there is no cache line corresponding to the access address in the SC , The SC processes the access command according to the configuration policy corresponding to the address range configuration label.
  • the SC can determine the specific processing method for the access command (for example, whether to allocate a new cache line for the access command) according to the configuration strategy corresponding to the address range configuration label.
  • the configuration strategy corresponding to the address range configuration label includes one or more of the following: an allocation strategy, which is used to indicate that the data under the access address is a read command and/or write command.
  • the command can be stored in the SC;
  • the replacement strategy is used to indicate that the data under the access address can be replaced;
  • the priority strategy is used to indicate the priority of the data under the access address;
  • the used capacity is used to indicate the address range Configure the maximum capacity occupied by the data corresponding to the label in the SC.
  • the SC is also used to store the address range configuration label in the label field of the cache line corresponding to the access address.
  • the address range configuration label field in the tag field can be used to determine the corresponding configuration policy according to the address range configuration label.
  • the corresponding configuration can be obtained according to the address range configuration label Strategies to determine the processing method.
  • an embodiment of the present application provides a terminal, and the terminal includes the system on chip provided in the first aspect and any possible design thereof.
  • an embodiment of the present application provides an access command routing method, which includes the following steps: obtaining an address range configuration label corresponding to the access address according to the access address corresponding to the access command, and the address range configuration label is used for bus pair access Commands are routed; access commands are routed to the system cache SC or external storage according to the address range configuration label.
  • the address space accessed by the IP core includes the first part of the address space and the second part of the address space, where the address range configuration label corresponding to the first part of the address space is a specified value, and the second part of the address space corresponds to the address
  • the range configuration label is a value other than the specified value.
  • the correspondingly stored data in the first part of the address space is not suitable for storage using SC, and the correspondingly stored data in the second part of the address space is suitable for storage using SC.
  • the access command is routed to the SC or external memory according to the address range configuration label, including: if the address range configuration label is a specified value, the access command is routed to the external memory; if the address range configuration label is except Specify a value other than the value, then the access command will be routed to the SC.
  • the access address is a virtual address
  • obtaining the address range configuration label corresponding to the access address according to the access address corresponding to the access command includes: sending the access address to the memory management unit MMU, which is used to query the page
  • the table obtains the address range configuration label corresponding to the access address.
  • the page table is used to record the mapping relationship between the access address and the address range configuration label; it receives the address range configuration label sent by the MMU.
  • the MMU queries the page table according to the access address to obtain the physical address, and the address range configuration label is stored in the high order of the physical address.
  • address range configuration label can also be stored in a dedicated bit field of the page table.
  • the access address is a physical address
  • obtaining the address range configuration label corresponding to the access address according to the access address corresponding to the access command includes: querying the register according to the access address, and obtaining the address range configuration label corresponding to the access address ,
  • This register is placed in the IP core and is used to record the mapping relationship between the access address and the address range configuration label.
  • the method further includes: the SC processes the access command.
  • the SC processes the access command, including: if there is a cache line corresponding to the access address in the SC, the SC reads and writes data in the SC according to the access command.
  • the method further includes: routing the address range configuration label to the SC; the SC processes the access command, including: if there is no cache line corresponding to the access address in the SC, the SC configures according to the address range The configuration strategy corresponding to the label processes the access command.
  • the configuration strategy corresponding to the address range configuration label includes one or more of the following: an allocation strategy, which is used to indicate that the data under the access address is a read command and/or a write command. It can be stored in the SC in the case of the replacement strategy; the replacement strategy is used to indicate the situation where the data under the access address can be replaced; the priority strategy is used to indicate the priority of the data under the access address; the used capacity is used to indicate the address range configuration The maximum capacity occupied by the data corresponding to the label in the SC.
  • the method further includes: storing the address range configuration label in the label field of the cache line corresponding to the access address.
  • FIG. 1 is a schematic structural diagram of a system on chip provided by the prior art
  • FIG. 2 is a schematic structural diagram of a terminal provided by an embodiment of the application.
  • FIG. 3 is a schematic structural diagram of a system on a chip provided by an embodiment of the application.
  • FIG. 4 is a schematic structural diagram of another system on chip provided by an embodiment of the application.
  • FIG. 5 is a schematic structural diagram of a terminal provided by an embodiment of this application.
  • FIG. 6 is a schematic flowchart of a routing method for access commands provided by an embodiment of the application.
  • the embodiments of the present application provide a system on chip, an access command routing method, and a terminal to solve the problems of low IP core access hit rate and high chip access power consumption in the prior art.
  • the method and the device are based on the same inventive concept. Since the principles of the method and the device to solve the problem are similar, the implementation of the device and the method can be referred to each other, and the repetition will not be repeated.
  • the terminal can be a mobile terminal, such as a mobile phone (or called a "cellular" phone) and a computer corresponding to the mobile terminal.
  • a mobile terminal such as a mobile phone (or called a "cellular" phone) and a computer corresponding to the mobile terminal.
  • the wireless access network exchanges language and/or data.
  • PCS personal communication service
  • SIP session initiated protocol
  • WLL wireless local loop
  • PDA personal digital assistant
  • Terminals can also be called systems, subscriber units, subscriber stations, mobile stations, mobile stations, remote stations, access points, and remote stations.
  • the terminal (remote terminal), access terminal (access terminal), user terminal (user terminal), user agent (user agent) or user equipment (user equipment) are not limited in the embodiments of the present application.
  • the terminal includes multiple IP cores, a bus, at least one external memory connected to the bus through a controller, and an SC.
  • Multiple IP cores are connected to the external memory and SC through a bus; when the external memory is connected to the bus, it is connected to the bus through a controller, and the controller is used to control access to the memory.
  • SC is also connected to external storage.
  • the IP core includes but not limited to CPU, AP, GPU, multimedia subsystem, camera subsystem, wireless access module, display subsystem; external memory includes but not limited to dynamic random access memory (DRAM) , Synchronous dynamic random access memory (synchronous dynamic random access memory, SDRAM), double-rate synchronous dynamic random access memory (double data rate synchronous dynamic random access memory, DDR SDRAM); SC is the last level cache of the system (last level cache, LLC) ). The SC can be accessed by all IP cores and is the system shareable cache of the SoC chip. The SC can be implemented using static random-access memory (SRAM).
  • DRAM dynamic random access memory
  • SDRAM Synchronous dynamic random access memory
  • DDR SDRAM double-rate synchronous dynamic random access memory
  • SC is the last level cache of the system (last level cache, LLC) ).
  • the SC can be accessed by all IP cores and is the system shareable cache of the SoC chip.
  • the SC can be implemented using static random-access memory (SRAM).
  • the external memory can be regarded as an off-chip system, and the part before the external memory can be regarded as an on-chip SOC chip.
  • the IP core After the IP core issues an access command, it can achieve data exchange by accessing the SC; it can also achieve data exchange by accessing an external memory. If data exchange is achieved by accessing the SC, the access command can be directly responded to on-chip without accessing the external memory. Due to the large bandwidth and high data exchange rate on the chip, the response speed is faster when responding to access commands on the chip.
  • the IP core performs data access outside the chip, because the data exchange has to go through the input/output interface (I/O port), the bandwidth of the I/O port is small, so the response speed to the access command is slow.
  • I/O port input/output interface
  • the bus after the bus receives the access command sent by the IP core, it does not directly match in the SC, but determines whether the access command is routed to the SC or the route according to the address range configuration label sent with the access command To external storage. Therefore, it is possible to avoid query matching of all access commands in the SC.
  • FIG. 3 is a schematic structural diagram of a system on a chip provided in an embodiment of this application.
  • the system on chip 300 includes an IP core 301 and a bus 302.
  • the IP core 301 is used to obtain the address range configuration label corresponding to the access address according to the access address corresponding to the access command, and transmit the access command and the address range configuration label to the bus 302.
  • the address range configuration label is used by the bus 302 to perform the access command routing.
  • the bus 302 is used to route the access command to the SC or external memory according to the address range configuration label.
  • the IP core (may also be referred to as the Master in the embodiment of the present application) includes but is not limited to CPU, AP, GPU, multimedia subsystem, camera subsystem, wireless access module, and display subsystem.
  • the address range configuration label may be represented by RID (range of identity).
  • the address range configuration label is a parameter set for determining the routing path of the access command in the embodiment of the present application. For example, it can be set: if the RID obtained according to a certain access command is a specified value, the access command is routed to the external memory; if the RID obtained according to a certain access command is not a specified value, the access command is routed To SC.
  • the correspondence between different address ranges and RIDs can be stored in the SOC or external memory.
  • each access address has a corresponding RID
  • the RID can be used to indicate whether the access to the data under the access address is performed in the SC or the external memory.
  • the bus 302 After the bus 302 receives the access command and the RID, it can determine whether to route the access command to the external memory or the SC according to the RID.
  • multiple access addresses may correspond to one RID, or one access address may correspond to one RID.
  • the embodiment of the application does not specifically limit this.
  • the bus 302 when the bus 302 routes the access command to the SC or external memory according to the RID, it can be implemented in the following manner: if the RID is a specified value, the access command is routed to the external memory; if the RID is other than the specified value Other values of, that is, non-specified values, will route the access command to SC.
  • the specified value can be set to 0.
  • the values other than the specified value can be 1, 2, 3, 4, etc.
  • the designated value can also be set to 1, 2, 3, etc.
  • the specific value of the designated value is not limited in the embodiment of the present application.
  • the IP core 301 can be used to implement multiple services, and the system can reserve one or more segments of address space for each specific type of task. Then, in the embodiment of the present application, the address space that the IP core needs to access when launching different types of tasks can be divided according to the application scenarios of different tasks. Specifically, the address space accessed by the IP core includes the address space that is friendly to the SC and the address space that is not friendly to the SC. In actual applications, the RID can be assigned to different address spaces: the RID corresponding to the address space that is not friendly to the SC Assign the value to the specified value, and assign the RID corresponding to the SC-friendly address space to a value other than the specified value.
  • the correspondingly stored data in the SC-friendly address space is suitable for storage using the SC, and the correspondingly stored data in the SC-unfriendly address space is not suitable for storage using the SC.
  • it can be based on time limitations (such as the frequency of business initiation, the time interval for re-initiating the same type of business, etc.) and space limitations (such as the amount of business data, the probability of continuous access to data at adjacent addresses, etc.) From a perspective, consider how to divide the address space that the IP core can access and assign RID values to it.
  • time limitations such as the frequency of business initiation, the time interval for re-initiating the same type of business, etc.
  • space limitations such as the amount of business data, the probability of continuous access to data at adjacent addresses, etc.
  • the RID corresponding to the address space reserved for the service type can be set to a value other than the specified value; for a service type with a lower frequency of initiation, the RID can be set for the service
  • the RID corresponding to the address space reserved for the type is set to a specified value; for a business type with a small amount of data, the RID corresponding to the address space reserved for the business type can be set to a value other than the specified value; for data
  • the RID corresponding to the address space reserved for the service type can be set to a specified value.
  • the address space accessed by the IP core 301 includes the first part of the address space and the second part of the address space, where the RID corresponding to the first part of the address space is a specified value, and the second part of the address space
  • the corresponding RID is a value other than the specified value.
  • the data corresponding to the first part of the address space is not suitable for storage using SC, and the data corresponding to the second part of the address space is suitable for storage using SC.
  • the first part of the address space can be regarded as an address space that is not friendly to the SC
  • the second part of the address space can be regarded as an address space that is friendly to the SC.
  • system on chip 300 shown in FIG. 3 may further include an SC, which is used to process access commands.
  • SC which is used to process access commands. The processing method will be described in detail later and will not be repeated here.
  • the bus 302 routes the access command to the external memory according to the RID, the external memory processes the access command.
  • the specific processing method is the same as that in the prior art, and will not be repeated in the embodiment of the present application. It is worth noting that, in the embodiment of the present application, since the external memory does not need to use the RID to process the access command, the bus 302 may not send the RID to the external memory, but only route the access command to the external memory. Of course, the bus 302 can also choose to route the RID to an external memory, and the external memory just discards the RID without processing.
  • the SC processes the access command, it can be implemented in the following manner: if there is a cache line corresponding to the access address in the SC, the SC reads and writes data in the SC according to the access command.
  • the SC can directly perform the read or write operation in the corresponding cache line. Since there is a cache line corresponding to the access address in the SC, there is no need to allocate a new Cache Line for the access command when the access command is executed.
  • the second part of the address space can be further divided into different subclasses, and different configuration strategies are configured for each subclass, and then different RIDs are assigned to different configuration strategies, so that each subclass Use different RID identification. Then, the SC can process the access commands according to the configuration policies corresponding to different RIDs.
  • the configuration policy corresponding to the address range configuration label can be stored in the SC. Specifically, it can be stored in the RID parsing module in the SC.
  • the assignment method can be static mapping, dynamic mapping, or a combination of the two .
  • the static mapping method can be understood as: each time the same configuration strategy is assigned the same RID; the dynamic mapping method can be understood as: for the same configuration strategy, the RID assigned during each assignment is different; the combination of the two mapping methods It can be understood that each time multiple configuration strategies are assigned, the value of the RID corresponding to a part of the configuration strategy is always unchanged, while the value of the RID corresponding to the other part of the configuration strategy changes dynamically.
  • the bus 302 is also used to route the RID to the SC. Then, when the SC processes the access command, it can be implemented in the following manner: If there is no cache line corresponding to the access address in the SC , The SC processes the access command according to the configuration policy corresponding to the RID.
  • the configuration strategy corresponding to the RID includes one or more of the following: an allocation strategy, which is used to indicate that the data under the access address can be stored in the SC when the access command is a read command and/or a write command; Replacement strategy, used to indicate that the data under the access address can be replaced; priority strategy, used to indicate the priority of the data under the access address; used capacity, used to indicate the maximum capacity occupied by the data corresponding to the RID in the SC .
  • the allocation strategy is used to indicate that the data under the access address can be stored in the SC when the access command is a read command and/or a write command. That is, the allocation strategy is used to indicate which attribute the access command is (for example, read or write), the Cache Line can be allocated in the SC for the access command. For example, the allocation strategy can be used to indicate that if the access command is a read command, Cache Line can be allocated to the access command; or, the allocation strategy can be used to indicate that if the access command is a write command, it can be The access command allocates Cache Line in the SC.
  • each access command corresponds to an access address, and each access address corresponds to an RID.
  • the access command can be a read command or a write command; the data under the access address may be stored in the SC or in an external memory.
  • the allocation strategy can be read allocation (that is, when the access command is a read command, Cache Line can be allocated to the SC in the SC, which is the command The corresponding access address is allocated Cache Line; if the access command is a write command, the Cache Line is not allocated in the SC for this command), it can be a write allocation (that is, when the access command is a write command, the command can be in the SC Cache Line is allocated; if the access command is a read command, the Cache Line is not allocated in the SC for the command, or it can be read-write allocation (that is, when the access command is a write command or a read command, it can be the command in the SC Allocate Cache Line).
  • the SC When the allocation strategy is read allocation and the access command is a read command, the SC reads the data requested by the access command from the external memory and stores it; the SC returns the data requested by the access command to the IP core 301.
  • the meaning of read allocation is: when the access command is a read command, Cache Line can be allocated in the SC for the command. Then, when the allocation strategy is read allocation and the access command is a read command, the SC can allocate a Cache Line for the access command, and the SC reads the data requested by the access command from the external memory and stores it in the SC, and This data is returned to the IP core 301. It should be noted that in this case, the SC reads the data from the external memory and writes the data into the SC, that is, the data under the access address occupies the Cache Line of the SC.
  • the SC When the allocation strategy is read allocation and the access command is a write command, the SC writes the data requested by the access command to the external memory.
  • the meaning of read allocation is: when the access command is a read command, the Cache Line can be allocated to the command in the SC; if the access command is a write command, the Cache Line is not allocated in the SC for the command. Then, when the allocation strategy is read allocation and the access command is a write command, the SC does not allocate a Cache Line for the access command, and the SC writes the data requested by the access command to the external memory.
  • the SC When the allocation strategy is write allocation and the access command is a read command, the SC reads the data requested by the access command from the external memory, and returns the data requested by the access command to the IP core 301.
  • the meaning of write allocation is: if the access command is a read command, the Cache Line is not allocated in the SC for the command. Then, when the allocation strategy is write allocation and the access command is a read command, the SC reads the data requested by the access command from the external memory, and returns the data requested by the access command to the IP core 301.
  • the SC reads the data from the external memory
  • the data is not written into the SC, but is directly returned to the IP core 301, that is, the data under the access address is not Occupy the Cache Line of the SC.
  • the SC When the allocation strategy is write allocation and the access command is a write command, the SC reads the data corresponding to the access address from the external memory and stores it; the SC writes the data corresponding to the access address into the SC.
  • the meaning of write allocation is: when the access command is a write command, Cache Line can be allocated in the SC for the command. Then, when the allocation strategy is write allocation and the access command is a write command, the SC reads and stores the data corresponding to the access address from the external memory, and then writes the data corresponding to the access address into the SC. That is to say, in this case, the data under the access address occupies the Cache Line of the SC.
  • the SC When the allocation strategy is read and write allocation, the SC performs data read and write in the SC according to the access command.
  • the meaning of read-write allocation is: when the access command is a write command or a read command, a Cache Line can be allocated for the command in the SC. Then, when the allocation strategy is read and write allocation, regardless of whether the access command is a read command or a write command, the Cache Line of the SC can be allocated to the command, and data can be read and written in the SC directly according to the access command.
  • some special allocation strategies can also be configured, such as read de-allocate (read empty), which refers to emptying the Cache Line corresponding to the sample address in the case of a read hit (invalid), when the read command does not hit, the Cache Line is not allocated for the read command; the read allocation strategy and the write allocation strategy can be combined, for example, the allocation strategy can be write allocation + read empty, indicating that the access command is a write command Cache Line can be allocated in the SC for this command. When the access command is a read command, the Cache Line corresponding to the access address will be cleared in the case of a read hit.
  • read de-allocate read empty
  • invalid invalid
  • the replacement policy is used to indicate the situation where the data under the access address can be replaced.
  • the SC can allocate the Cache Line according to the aforementioned allocation strategy after receiving the access command.
  • the SC due to the limited capacity of the SC, it is difficult for the SC to allocate a Cache Line to each access command after receiving the access command. Then, when the capacity of the SC has been completely occupied or the capacity is insufficient, the problem of data coverage will be involved.
  • the replacement strategy takes effect when data coverage issues are involved.
  • the replacement strategy corresponding to the RID may be to allow replacement, so when the SC capacity is completely occupied or the capacity is insufficient, the data under the access address corresponding to the RID can be overwritten by other data.
  • the replacement strategy corresponding to the RID may be to allow replacement with the RID, so when the SC capacity is completely occupied or the capacity is insufficient, the data under the access address corresponding to the RID can be used by the data under other access addresses corresponding to the same RID cover. That is, in this implementation manner, multiple access addresses correspond to one RID, and data under one access address can be overwritten by data under another access address.
  • the replacement strategy corresponding to the RID may be to allow high-priority replacement, so in the case that the SC capacity is completely occupied or the capacity is insufficient, the data under the access address corresponding to the RID can be given priority higher than that of its own RID The data under the access address is overwritten.
  • the replacement strategy corresponding to the RID may be that replacement is not allowed, so when the SC capacity is completely occupied or the capacity is insufficient, the data under the access address corresponding to the RID cannot be overwritten by other data.
  • the SC may also store the RID in the tag field (Tag) of the cache line corresponding to the access address.
  • the tag field (Tag) of the cache line corresponding to the access address contains the TAG field (used to indicate the Tag value), the VLD field (used to indicate whether the data is valid), and the CL field (used to indicate the storage in the SC). Whether the data of is consistent with the data stored in the external memory).
  • an RID field may also be added to the tag field (Tag) to indicate the RID corresponding to the access address of the cache line.
  • the RID field in the tag field (Tag) can be used to determine the corresponding configuration policy according to the RID.
  • the corresponding configuration policy can be obtained according to the RID to determine the processing mode. For example, when the SC capacity is completely occupied or the capacity is insufficient, the SC can determine whether the data stored in the cache line can be overwritten according to the priority strategy corresponding to the RID field in the tag field (Tag).
  • Priority policy used to indicate the priority of the data under the access address. For example, the description of the priority strategy has been involved in the above introduction about the replacement strategy. In scenarios involving data coverage, the priority policy may indicate the priority of the data under the access address corresponding to the RID.
  • the used capacity is used to indicate the maximum capacity occupied by the data corresponding to the RID in the SC. For example, it can be 1MByte, 256kByte, 2Mbyte, 128kByte, etc.
  • the strategy of using capacity can be set in the configuration strategy corresponding to the RID.
  • the SC can allocate a Cache Line for the data under the access address corresponding to the RID; if the used capacity is fully occupied, if the data corresponding to the RID is to be written in the SC, then It is necessary to select whether other data in the SC can be overwritten according to the aforementioned replacement strategy or priority strategy, and then determine whether the data corresponding to the RID can be used to overwrite other data in the SC.
  • the configuration strategy corresponding to the RID may also include other content, which is not specifically limited in the embodiment of the present application.
  • a security attribute may also be included, and the security attribute may be used to indicate the security (secure or non-secure) of the data under the access address corresponding to the RID.
  • the configuration policy corresponding to the address range configuration label can be pre-configured in the SC.
  • the application scenario of the terminal changes, the application scenario of each task type will also change accordingly.
  • the configuration strategy stored in the SC can be modified.
  • the priority strategy corresponding to the RID can be dynamically modified, for example, the priority strategy can be modified from 2 to 3, thereby increasing the priority of the RID; and the usage capacity corresponding to the RID can also be dynamically modified
  • the used capacity can be modified from 2Mbyte to 1Mbyte, thereby reducing the used capacity occupied by the RID in the SC.
  • the aforementioned specified value is zero.
  • the RID modification can also be allocated to other address spaces for use according to requirements, and corresponding configuration policies can be configured.
  • the above introduces the setting principles of RID, the configuration strategy corresponding to RID, and how the SC processes the access commands.
  • the premise of the above solution is that after the IP core issues an access command, it needs to obtain the RID corresponding to the access address.
  • the following describes in detail how the IP core obtains the RID corresponding to the access address.
  • the access address carried in the access command corresponding to some IP core is a virtual address.
  • the memory management unit MMU
  • the memory management unit needs to pass The page table stored in the external memory converts the virtual address into a physical address and then performs data access according to the physical address.
  • the MMU is connected to the IP core 301 and the bus 302.
  • the MMU receives the access address (virtual address) sent by the IP core 301 and routes the access address to the external memory via the bus 302, and the external memory queries the page
  • the MMU receives the converted corresponding physical address through the bus 302 and sends it to the IP core 301.
  • the access address carried in the access command corresponding to some IP cores is a physical address. When data access is performed, there is no need to perform virtual-real address conversion, and the access can be directly based on the physical address.
  • the RID setting method and storage location are different, and accordingly, the way the IP core obtains the RID is also different.
  • the RID can be configured in the page table, and the RID corresponding to the access address can be obtained during virtual-to-real address conversion; for another example, for an IP core that accesses data based on a physical address, The RID can be configured in a register built into the IP core, and the IP core can obtain the RID by querying the register before sending an access command to the bus 302.
  • the access address is a virtual address.
  • the IP core 301 obtains the RID corresponding to the access address according to the access address corresponding to the access command, it can be specifically implemented as follows: the access address is sent to the MMU, and the MMU is used to query The page table obtains the RID corresponding to the access address. The page table is used to record the mapping relationship between the access address and the RID; to receive the RID sent by the MMU.
  • the above mapping relationship can be stored in the page table in advance.
  • the above mapping relationship can be obtained by querying the page table, and then the RID corresponding to the access address can be obtained.
  • the page table can be used to record the mapping relationship between the virtual address and the physical address.
  • the MMU converts the virtual address into a physical address by querying the page table After that, the physical address is sent to the bus as the associated signal of the access command, and data access is performed according to the physical address.
  • the RID can be stored in the upper part of the physical address (the upper part of the physical address is not occupied). After the MMU queries the page table according to the access address to obtain the physical address, the RID corresponding to the access address can be obtained from the upper part of the physical address.
  • the RID can also be stored in a dedicated bit field of the page table.
  • the page table contains many bit fields.
  • the page table also reserves bit fields for storing attribute information.
  • the page table can contain bit fields reserved for hardware. The data written in this bit field can be read by hardware.
  • the above reserved bit field for storing attribute information can be regarded as the "dedicated bit field" described in the embodiment of the present application.
  • the RID is stored in a dedicated bit field. The MMU can obtain the RID in the dedicated bit field after querying the page table according to the access address, and then obtain the RID corresponding to the access address.
  • the SC can also process the access command.
  • the SC can also process the access command.
  • the RID can be stored in the high-order bits of the physical address of the page table or in the dedicated bit field of the page table.
  • the access address is a physical address.
  • the IP core 301 obtains the RID corresponding to the access address according to the access address corresponding to the access command, it can be specifically implemented as follows: query the register according to the access address, and obtain the corresponding access address RID, this register is placed in the IP core 301, and this register is used to record the mapping relationship between the access address and the RID.
  • the above mapping relationship can be stored in the register in advance.
  • the IP core When the IP core initiates an access command, it can query the corresponding RID in the register according to the access address of the access command, and send the RID to the bus 302 along with the access command.
  • mapping relationship is expressed by multiple sets of consecutive physical address ranges (such as start address and end address, or start address and length) and corresponding RIDs; multiple consecutive physical addresses can correspond to one RID or respectively correspond to Multiple RIDs.
  • the address space that the IP core may access can be divided into multiple sub-categories, and each sub-category corresponds to a different RID. For example, there are multiple types of services initiated by the IP core, and the address space allocated for each type of service can be assigned a different RID.
  • the access address is a physical address.
  • the IP core 301 obtains the RID corresponding to the access address according to the access address corresponding to the access command, it can be specifically implemented as follows: query the IP core built-in register according to the access address to obtain the RID, This register is used to record RID.
  • the RID can be stored in the register in advance.
  • the IP core initiates an access command, it can directly query the value of the RID in the register, and send the RID to the bus 302 along with the access command.
  • the address space that the IP core may access are all assigned the same RID.
  • the service type initiated by the IP core is relatively single, so the address space that the IP core may access may be assigned the same RID.
  • the MMU can be used to set the RID for a series of discrete physical pages; in the second method, the same or different fixed physical addresses can be set respectively RID:
  • mode three a fixed register configuration method can be used to set the same RID for the address space that an IP core can access.
  • the access addresses carried in the access commands initiated by the IP core are all physical addresses
  • the service types of the IP core are relatively rich, so the address space allocated for different service types can be assigned Different RID values
  • the service type of the IP core is relatively single, so the address space that the IP core can access can be assigned the same RID.
  • the IP core 301 obtains the RID corresponding to the access address, and sends the RID to the bus 302 along with the access command. Therefore, the bus 302 can determine whether to route the access command to the SC or to the external memory after receiving the RID.
  • the solution provided by the embodiment of the present application avoids the situation that all access commands must be searched and matched in the SC first, thereby improving the access hit rate of the IP core, thereby reducing system power consumption.
  • the embodiments of the present application also provide a system on chip.
  • the system on chip includes Master A, Master B, Master C, bus, and SC.
  • the system on chip is located in the terminal, and the terminal may also include DRAM (including a DRAM controller).
  • Master is an example of the aforementioned IP cores
  • Master A, Master B, and Master C are three different types of IP cores, and their corresponding RID configuration strategies are different.
  • the bus routes the access command to the DRAM when the associated RID of the access command is 0, and the DRAM processes the access command with reference to the prior art; when the associated RID of the access command is not 0, the RID and Access commands are routed to SC.
  • the SC is equipped with Tag and RID parsing modules.
  • the tag field Tag includes the TAG field, the VLD field, the CL field, and the RID field.
  • the meaning of these fields can be referred to the previous description and will not be repeated here.
  • the RID analysis module is used to analyze and obtain the configuration strategy corresponding to the RID after receiving the access command and the associated RID.
  • the SC can process the access command according to the corresponding configuration strategy.
  • the specific processing method has been introduced in the system on chip 300 shown in FIG. 3, and will not be repeated here.
  • Step 1 Analyze the memory space that needs to be used according to the application scenario, and classify it according to whether the behavior of accessing these memory spaces is friendly to System Cache (that is, the time locality of the access, the spatial locality);
  • Step 2 Cache-friendly space is further divided into its use configuration strategies (SC usage capacity, allocation strategy, replacement strategy, priority, security), so that Cache-friendly space is divided into different sub-categories;
  • Step 3 Obtain different SC application space subclasses from step 2 and map different non-zero RIDs to them.
  • Step 4 In the configuration table of the RID analysis module of the SC, set the corresponding configuration strategy for the non-zero RID allocated in step 3;
  • Step 5 Add the RID parameter to the system address space application function, and the RID parameter will be written into the last-level page table of the applied address space.
  • the RID parameter can be recorded in the high bit of an unused physical address or a dedicated bit field in the page table; the same physical address space can only be configured as one type of RID at the same time;
  • Step 6 When the access command of Master A performs virtual-real address conversion through the MMU, the RID recorded in the page table is extracted (written in step 5), and the MMU supports sending the RID as the access signal to the downstream (bus);
  • Step 8 For the access command to the SC, analyze the specific configuration strategy according to its associated RID for processing. If the access needs to allocate a new Cache Line, the RID should be stored in the RID field of the Tag. If the access needs to overwrite the old one Cache Line, the RID in the old Cache Line Tag needs to be taken out and processed after analyzing various attributes;
  • Step 10 the software can dynamically modify the RID configuration strategy in the System Cache, such as modifying priority, modifying usage capacity, etc.;
  • system-on-chip shown in FIG. 4 can be regarded as a specific example of the system-on-chip 300 shown in FIG. 3, and the implementation of the system-on-chip shown in FIG. 4 that is not described in detail can be found in the system-on-chip 300 Related description.
  • an embodiment of the present application also provides a terminal.
  • the terminal includes the system on chip 300 shown in FIG.
  • the terminal may also include an external memory.
  • the external memory is used to implement operations performed by the external memory in the example of FIG. 3.
  • the terminal can be deployed on land, including indoor or outdoor, handheld or vehicle-mounted; it can also be deployed on the water (such as ships, etc.); it can also be deployed in the air (such as airplanes, balloons, and satellites).
  • the terminal may be a mobile phone (mobile phone), a tablet computer (pad), a computer with wireless transceiver function, a virtual reality (VR) terminal, an augmented reality (AR) terminal, and an industrial control (industrial control) Wireless terminals in, self-driving (self-driving), wireless terminals in remote medical, wireless terminals in smart grid, wireless terminals in transportation safety, Wireless terminals in a smart city, wireless terminals in a smart home, etc.
  • embodiments of the present application provide a routing method for access commands.
  • the method includes the following steps:
  • S601 Acquire the address range configuration label corresponding to the access address according to the access address corresponding to the access command.
  • the address range configuration label is used for the bus to route the access command.
  • S602 Route the access command to the SC or external memory according to the address range configuration label.
  • the address space accessed by the IP core includes a first part address space and a second part address space, where the address range configuration label corresponding to the first part address space is a specified value, and the address range configuration label corresponding to the second part address space is For values other than the specified value, the correspondingly stored data in the first part of the address space is not suitable for storage using SC, and the correspondingly stored data in the second part of the address space is suitable for storage using SC.
  • route the access command to the SC or external storage according to the address range configuration label including: if the address range configuration label is a specified value, route the access command to the external storage; if the address range configuration label is other than the specified value For other values, the access command is routed to SC.
  • the method further includes: the SC processes the access command.
  • the SC processes the access command, including: if there is a cache line corresponding to the access address in the SC, the SC reads and writes data in the SC according to the access command.
  • the method further includes: routing the address range configuration label to the SC; the SC processes the access command, including: if there is no cache line corresponding to the access address in the SC, the SC configures the configuration corresponding to the label according to the address range
  • the policy processes the access commands.

Abstract

一种片上系统、访问命令的路由方法及终端，用以解决现有技术中存在的IP核访问命中率低、芯片访问功耗大的问题。该片上系统包含知IP核和总线；IP核，用于根据访问命令对应的访问地址获取与访问地址对应的地址范围配置标号，并将访问命令以及地址范围配置标号传输至总线，地址范围配置标号用于总线对访问命令进行路由；总线，用于根据地址范围配置标号将访问命令路由至系统缓存或外部存储器。

Description

一种片上系统、访问命令的路由方法及终端 技术领域
本申请涉及芯片技术领域，尤其涉及一种片上系统、访问命令的路由方法及终端。
背景技术
片上系统(system on chip，SOC)芯片是将多个电子系统集成在同一芯片的集成电路，其广泛应用于手机、掌上电脑等终端设备中。SOC通常由多个知识产权(intellectual property，IP)核组成，多个IP核通过总线与外部存储器连接，从而进行程序和数据的交互。每个IP核可以视为一个预先设计好的电路功能模块，用于实现相应功能。其中，IP核可以是中央处理器(central processing unit，CPU)、应用处理器(application processor，AP)、图形处理器(graphics processing unit，GPU)、多媒体子系统(video subsystem)、相机子系统(camera subsystem)、无线接入模块(modem)、显示子系统(display subsystem)等。
示例性地，一种SOC的结构可以如图1所示。在图1中，AP、多媒体子系统、相机子系统、显示子系统、GPU和无线接入模块通过总线与外部存储器连接。此外，如图1所示，SOC中还可以包含系统缓存(system cache，SC)，SC缓存是系统的最后一级缓存(last level cache，LLC)，可以看作外部存储器的扩展。IP核对外部存储器进行访问时，可以先访问SC，如果访问命中了SC中的某个缓存行(cache line)，则可以直接从SC返回数据或响应。由于片内访问相比于片外访问来说可以获取更大的带宽，因而采用SC可以在一定程度上提高访问效率。
但是，现有技术中，所有访问命令必须先在SC中进行查询匹配，匹配不成功的情况下再通过SC对外部存储器进行访问，再由SC将数据或响应返回给IP核。由于SC与外部存储器的容量相差较大、SC能存储的数据容量有限，因而采用这种方式，IP核的访问命中率较低。因而大部分情况下SC需要通过访问外部存储器来获取数据或响应，进而返回给IP核。这无疑会增加系统的访问功耗。
综上，采用现有技术方案，会导致访问命中率低、访问功耗大的问题。
发明内容
本申请实施例提供一种片上系统、访问命令的路由方法及终端，用以解决现有技术中存在的IP核访问命中率低、芯片访问功耗大的问题。
第一方面，本申请实施例提供一种片上系统，该片上系统SOC包含知识产权IP核和总线；其中，IP核用于根据访问命令对应的访问地址获取与访问地址对应的地址范围配置标号，并将访问命令以及地址范围配置标号传输至总线，该地址范围配置标号用于总线对访问命令进行路由；总线用于根据地址范围配置标号将访问命令路由至系统缓存SC或外部存储器。
采用上述方案，由于IP核获取到与访问地址对应的地址范围配置标号，并将地址范围配置标号随访问命令一起发送至总线。因而总线在接收到地址范围配置标号后可以确定将访问命令路由至SC还是路由至外部存储器。采用上述方案，可以避免出现所有访问命令 必须先在SC中进行查询匹配的情况，因而可以提高IP核的访问命中率，从而降低系统功耗。
具体地，在一种实现方式中，IP核访问的地址空间包括第一部分地址空间和第二部分地址空间，其中，第一部分地址空间对应的地址范围配置标号为指定数值，第二部分地址空间对应的地址范围配置标号为指定数值之外的其他数值，第一部分地址空间中对应存储的数据不适于采用SC进行存储，第二部分地址空间中对应存储的数据适于采用SC进行存储。
采用上述方案，可以将第一部分地址空间中的数据路由至外部存储器处理，将第二部分地址空间中的数据路由至SC处理，从而可以采用更适当的装置对不同地址空间上的数据进行处理。
那么，基于上述实现方式，总线在根据地址范围配置标号将访问命令路由至SC或外部存储器时，具体可通过如下方式实现：若地址范围配置标号为指定数值，则将访问命令路由至外部存储器；若地址范围配置标号为除指定数值之外的其他数值，则将访问命令路由至SC。
采用上述方案，提供了总线根据地址范围配置标号对访问命令进行路由的具体方式。
在一种可能的设计中，访问地址为虚拟地址，IP核根据访问命令对应的访问地址获取与访问地址对应的地址范围配置标号，具体可通过如下方式实现：将访问地址发送给内存管理单元MMU，MMU用于通过查询页表获取访问地址对应的地址范围配置标号，该页表用于记录访问地址与地址范围配置标号的映射关系；接收MMU发送的地址范围配置标号。
其中，MMU根据访问地址查询页表获取物理地址，地址范围配置标号存储在所述物理地址的高位。
采用上述方案，IP核可以通过MMU的虚实地址转换过程获取与访问地址(即虚拟地址)对应的地址范围配置标号。
此外，地址范围配置标号也可以存储在页表的专用位域中。
在另一种可能的设计中，访问地址为物理地址，IP核根据访问命令对应的访问地址获取与访问地址对应的地址范围配置标号，具体可通过如下方式实现：根据访问地址查询寄存器，获取与访问地址对应的地址范围配置标号，该寄存器置于IP核中，用于记录访问地址与地址范围配置标号的映射关系。
采用上述方案，在访问地址为物理地址的情况下，可以预先在寄存器中存储上述映射关系。IP核在发起访问命令时，可根据访问命令的访问地址去寄存器中查询对应的地址范围配置标号，并将地址范围配置标号随访问命令一起发送给总线。
此外，该片上系统还可以包括SC，SC用于对访问命令进行处理。
采用上述方案，可以通过片上系统中的SC对访问命令进行处理。
由于SC中可能存在与访问地址对应的缓存行，也可能不存在与访问地址对应的缓存行。那么，SC在对访问命令进行处理时可以有不同的处理方式。
具体地，SC对访问命令进行处理，具体可通过如下方式实现：若SC中存在与访问地址对应的缓存行，则SC根据访问命令在SC中进行数据读写。
采用上述方案，由于SC中存在与访问地址对应的缓存行，那么在执行访问命令时不需要为该访问命令分配新的缓存行。无论访问命令是读取命令还是写入命令，SC直接在对 应的缓存行中进行读取或者写入操作即可。
具体地，在该片上系统中，总线还用于将地址范围配置标号路由至SC，那么，SC对访问命令进行处理，具体可通过如下方式实现：若SC中不存在与访问地址对应的缓存行，则SC根据地址范围配置标号对应的配置策略对访问命令进行处理。
采用上述方案，SC可根据地址范围配置标号对应的配置策略来确定对访问命令的具体处理方式(例如，是否为该访问命令分配新的缓存行)。
在第一方面提供的方法中，地址范围配置标号对应的配置策略包括以下一种或多种：分配策略，分配策略用于指示访问地址下的数据在访问命令为读取命令和/或写入命令的情况下可以存储在SC；替换策略，用于指示访问地址下的数据可以被替换的情况；优先级策略，用于指示访问地址下的数据的优先级；使用容量，用于指示地址范围配置标号对应的数据在SC中占用的最大容量。
此外，SC还用于：将地址范围配置标号存储在与访问地址对应的缓存行的标签域中。
采用上述方案，标签域(Tag)中的地址范围配置标号字段可以用于根据该地址范围配置标号确定相应的配置策略，在SC对访问命令进行处理时，可以根据该地址范围配置标号获取相应配置策略，从而判断处理方式。
第二方面，本申请实施例提供一种终端，该终端包括上述第一方面及其任一可能的设计中提供的片上系统。
第三方面，本申请实施例提供一种访问命令的路由方法，该方法包括如下步骤：根据访问命令对应的访问地址获取与访问地址对应的地址范围配置标号，地址范围配置标号用于总线对访问命令进行路由；根据地址范围配置标号将访问命令路由至系统缓存SC或外部存储器。
在一种可能的设计中，IP核访问的地址空间包括第一部分地址空间和第二部分地址空间，其中，第一部分地址空间对应的地址范围配置标号为指定数值，第二部分地址空间对应的地址范围配置标号为指定数值之外的其他数值，第一部分地址空间中对应存储的数据不适于采用SC进行存储，第二部分地址空间中对应存储的数据适于采用SC进行存储。
在一种可能的设计中，根据地址范围配置标号将访问命令路由至SC或外部存储器，包括：若地址范围配置标号为指定数值，则将访问命令路由至外部存储器；若地址范围配置标号为除指定数值之外的其他数值，则将访问命令路由至SC。
在一种可能的设计中，访问地址为虚拟地址，根据访问命令对应的访问地址获取与访问地址对应的地址范围配置标号，包括：将访问地址发送给内存管理单元MMU，MMU用于通过查询页表获取访问地址对应的地址范围配置标号，页表用于记录访问地址与地址范围配置标号的映射关系；接收MMU发送的地址范围配置标号。
其中，MMU根据访问地址查询页表获取物理地址，地址范围配置标号存储在所述物理地址的高位。
此外，地址范围配置标号也可以存储在页表的专用位域中。
在一种可能的设计中，访问地址为物理地址，根据访问命令对应的访问地址获取与访问地址对应的地址范围配置标号，包括：根据访问地址查询寄存器，获取与访问地址对应的地址范围配置标号，该寄存器置于IP核中，用于记录访问地址与地址范围配置标号的映射关系。
在一种可能的设计中，该方法还包括：SC对访问命令进行处理。
在一种可能的设计中，SC对访问命令进行处理，包括：若SC中存在与访问地址对应的缓存行，则SC根据访问命令在SC中进行数据读写。
在一种可能的设计中，该方法还包括：将地址范围配置标号路由至SC；SC对访问命令进行处理，包括：若SC中不存在与访问地址对应的缓存行，则SC根据地址范围配置标号对应的配置策略对访问命令进行处理。
在一种可能的设计中，地址范围配置标号对应的配置策略包括以下一种或多种：分配策略，分配策略用于指示访问地址下的数据在访问命令为读取命令和/或写入命令的情况下可以存储在SC；替换策略，用于指示访问地址下的数据可以被替换的情况；优先级策略，用于指示访问地址下的数据的优先级；使用容量，用于指示地址范围配置标号对应的数据在SC中占用的最大容量。
在一种可能的设计中，该方法还包括：将地址范围配置标号存储在与访问地址对应的缓存行的标签域中。
另外，第二方面至第三方面中任一种可能设计方式所带来的技术效果可参见第一方面中不同设计方式所带来的技术效果，此处不再赘述。
附图说明
图1为现有技术提供的一种片上系统的结构示意图；
图2为本申请实施例提供的一种终端的结构示意图；
图3为本申请实施例提供的一种片上系统的结构示意图；
图4为本申请实施例提供的另一种片上系统的结构示意图；
图5为本申请实施例提供的一种终端的结构示意图；
图6为本申请实施例提供的一种访问命令的路由方法的流程示意图。
具体实施方式
如背景技术中所述，采用SC设计的SOC中，所有IP核的访问命令都必须先在SC中进行匹配查询，IP核的访问命中率较低，芯片的访问功耗较大。
本申请实施例提供一种片上系统、访问命令的路由方法及终端，用以解决现有技术中存在的IP核访问命中率低、芯片访问功耗大的问题。其中，方法和装置是基于同一发明构思的，由于方法及装置解决问题的原理相似，因此装置与方法的实施可以相互参见，重复之处不再赘述。
下面，首先对本申请实施例的应用场景进行介绍。本申请实施例可应用于图2所示的终端中。
其中，终端可以是移动终端，如移动电话(或称为“蜂窝”电话)和对应移动终端的计算机，例如，可以是便携式、袖珍式、手持式、计算机内置的或者车载的移动装置，它们与无线接入网交换语言和/或数据。例如，个人通信业务(personal communication service，PCS)电话、无绳电话、会话发起协议(session initiated protocol，SIP)话机、无线本地环路(wireless local loop，WLL)站、个人数字助理(personal digital assistant，PDA)等设备。终端也可以称为系统、订户单元(subscriber unit)、订户站(subscriber station)，移动站(mobile station)、移动台(mobile)、远程站(remote station)、接入点(access point)、 远程终端(remote terminal)、接入终端(access terminal)、用户终端(user terminal)、用户代理(user agent)或用户装备(user equipment)，本申请实施例中并不限定。
如图2所示，终端包括多个IP核、总线、通过控制器与总线连接的至少一个外部存储器以及SC。多个IP核通过总线与外部存储器和SC连接；外部存储器与总线连接时，通过控制器与总线连接，控制器用于对存储器的访问进行控制。此外，SC也与外部存储器连接。
其中，IP核包括但不限于CPU、AP、GPU、多媒体子系统、相机子系统、无线接入模块、显示子系统；外部存储器包括但不限于动态随机存取存储器(dynamic random access memory，DRAM)、同步动态随机存储器(synchronous dynamic random access memory，SDRAM)、双倍速率同步动态随机存储器(double data rate synchronous dynamic random access memory，DDR SDRAM)；SC是系统的最后一级缓存(last level cache，LLC)。SC可以被所有IP核访问，是SoC芯片的系统共享缓存(system shareable cache)。SC可以采用静态随机存取存储器(static random-access memory，SRAM)实现。
在图2所示的终端中，外部存储器可以视为片外系统，除外部存储器之前的部分可以视为片内SOC芯片。
IP核发出访问命令后，可以通过访问SC实现数据交换；也可以通过访问外部存储器实现数据交换。若通过访问SC实现数据交换，则可以直接在片内对访问命令进行响应，无需再访问外部存储器。由于片内带宽大、数据交换速率高，因而在片内对访问命令进行响应时，响应速度较快。而IP核在片外进行数据访问时，由于数据交换要经过输入/输出接口(I/O口)，I/O口的带宽小，因而对访问命令的响应速度较慢。
本申请实施例中，总线在接收到IP核发送的访问命令后，并不是直接在SC中进行匹配，而是根据与访问命令一起发送的地址范围配置标号确定将该访问命令路由至SC还是路由至外部存储器。因而可以避免所有访问命令在SC中进行查询匹配。
下面将结合附图对本申请实施例作进一步地详细描述。
需要说明的是，本申请实施例中，多个是指两个或两个以上。另外，需要理解的是，在本申请的描述中，“第一”、“第二”等词汇，仅用于区分描述的目的，而不能理解为指示或暗示相对重要性，也不能理解为指示或暗示顺序。
参见图3，为本申请实施例提供的一种片上系统的结构示意图。该片上系统300包括IP核301和总线302。
IP核301，用于根据访问命令对应的访问地址获取与访问地址对应的地址范围配置标号，并将访问命令以及地址范围配置标号传输至总线302，地址范围配置标号用于总线302对访问命令进行路由。
总线302，用于根据地址范围配置标号将访问命令路由至SC或外部存储器。
其中，IP核(本申请实施例中也可以称为Master)包括但不限于CPU、AP、GPU、多媒体子系统、相机子系统、无线接入模块、显示子系统。在本申请实施例及附图中，地址范围配置标号可以用RID(range of identity)表示。
此外，地址范围配置标号是本申请实施例中为了确定访问命令的路由路径而设置的参数。例如，可以设定：若根据某一访问命令获取的RID为指定数值时，则将该访问命令路由至外部存储器；若根据某一访问命令获取的RID不是指定数值时，则将该访问命令路由 至SC。具体实现时，可将不同地址范围与RID的对应关系存储在SOC中或者外部存储器中。在IP核发起访问命令时，可以通过查询获取访问地址对应的RID，进而根据RID确定将访问命令的路由路径。
本申请实施例中，每个访问地址均存在一个与之对应的RID，该RID可用于指示对该访问地址下数据的访问是在SC中进行还是在外部存储器进行。总线302在接收到访问命令及RID后，可根据RID确定将访问命令路由至外部存储器还是SC。
需要说明的是，在本申请实施例中，可以是多个访问地址对应一个RID，也可以是一个访问地址对应一个RID。本申请实施例对此不作具体限定。
具体实现时，总线302在根据RID将访问命令路由至SC或外部存储器时，具体可通过如下方式实现：若RID为指定数值，则将访问命令路由至外部存储器；若RID为除指定数值之外的其他数值，即非指定数值，则将访问命令路由至SC。
其中，指定数值可以设置为0。除指定数值之外的其他数值可以是1、2、3、4等。当然，指定数值也可以设定为1、2、3等数值，本申请实施例中对指定数值的具体值不做限定。
不难理解，IP核301可用于实现多种业务，系统可以为每个特定类型的任务预留一段或多段地址空间。那么，本申请实施例中，可根据不同任务的应用场景对IP核在发起不同类型任务时需要访问的地址空间进行划分。具体地，IP核访问的地址空间包括对SC友好的地址空间和对SC不友好的地址空间，实际应用中可以为不同的地址空间进行RID的赋值：将对SC不友好的地址空间对应的RID赋值为指定数值，将对SC友好的地址空间对应的RID赋值为除指定数值之外的其他数值。
其中，对SC友好的地址空间中对应存储的数据适用于采用SC进行存储，对SC不友好的地址空间中对应存储的数据不适用于采用SC进行存储。
具体实现时，可以从时间局限性(例如业务的发起频率、再次发起同一类型业务的时间间隔等)和空间局限性(例如业务的数据量、相邻地址的数据被连续访问的概率等)的角度考虑如何对IP核可以访问的地址空间进行划分，并为其进行RID的赋值。例如，对于发起频率较高的业务类型，可以将为该业务类型预留的地址空间对应的RID设置为除指定数值之外的其他数值；对发起频率较低的业务类型，可以将为该业务类型预留的地址空间对应的RID设置为指定数值；对于数据量较小的业务类型，可以将为该业务类型预留的地址空间对应的RID设置为除指定数值之外的其他数值；对于数据量较大的业务类型，可以将为该业务类型预留的地址空间对应的RID设置为指定数值。
结合以上叙述不难看出，本申请实施例中，IP核301访问的地址空间包括第一部分地址空间和第二部分地址空间，其中，第一部分地址空间对应的RID为指定数值，第二部分地址空间对应的RID为指定数值之外的其他数值，第一部分地址空间对应存储的数据不适于采用SC进行存储，第二部分地址空间对应存储的数据适于采用SC进行存储。其中，第一部分地址空间可视为对SC不友好的地址空间，第二部分地址空间可视为对SC友好的地址空间。
在一种可能的实现方式中，图3所示的片上系统300还可以包括SC，该SC用于对访问命令进行处理。其处理方式将在后面进行详细介绍，此处不再赘述。
此外，若总线302根据RID将访问命令路由至外部存储器，则由外部存储器对该访问命令进行处理，具体处理方式与现有技术相同，本申请实施例中不再赘述。值得注意的是， 本申请实施例中，由于外部存储器对访问命令的处理不需要用到RID，因而总线302可以不将RID发送至外部存储器，仅将访问命令路由至外部存储器即可。当然，总线302也可以选择将RID路由至外部存储器，外部存储器将RID丢弃不做处理即可。
具体地，SC在对访问命令进行处理时，可通过以下方式实现：若SC中存在与访问地址对应的缓存行，则SC根据访问命令在SC中进行数据读写。
也就是说，若SC中存在与访问地址对应的缓存行，无论访问命令是读取命令还是写入命令，SC直接在对应的缓存行中进行读取或者写入操作即可。由于SC中存在与访问地址对应的缓存行，那么在执行访问命令时不需要为该访问命令分配新的Cache Line。
此外，本申请实施例中，对于第二部分地址空间，还可以进一步划分为不同的子类，并为每个子类配置不同的配置策略，然后针对不同配置策略赋值不同的RID，使得每个子类用不同的RID标识。那么，SC可以根据不同RID对应的配置策略对访问命令进行处理。
不难理解，由于RID对应的配置策略用于SC对访问命令进行处理，那么地址范围配置标号对应的配置策略可以存储在SC中。具体地，可以存储在SC中的RID解析模块中。
需要说明的是，在将RID赋值为除指定数值之外的其他数值时，其他数值可以有多个，那么赋值方式可以采用静态映射方式，可以采用动态映射方式，也可以采用二者结合的方式。静态映射方式可以理解为：每次对同样的配置策略均赋值同一个RID；动态映射方式可以理解为：针对同样的配置策略，每次赋值时赋予的RID是不同的；二者结合的映射方式可以理解为：每次对多个配置策略进行赋值时，一部分配置策略对应的RID的值总是不变的，而另一部分配置策略对应的RID的值是动态变化的。
因此，在另一种实现方式中，总线302还用于将RID路由至SC，那么，SC在对访问命令进行处理时，可通过以下方式实现：若SC中不存在与访问地址对应的缓存行，则SC根据RID对应的配置策略对访问命令进行处理。
具体地，RID对应的配置策略包括以下一种或多种：分配策略，分配策略用于指示访问地址下的数据在访问命令为读取命令和/或写入命令的情况下可以存储在SC；替换策略，用于指示访问地址下的数据可以被替换的情况；优先级策略，用于指示访问地址下的数据的优先级；使用容量，用于指示RID对应的数据在SC中占用的最大容量。
下面对上述每种配置策略进行逐一解释。
一、分配策略
分配策略用于指示访问地址下的数据在访问命令为读取命令和/或写入命令的情况下可以存储在SC。即，分配策略用于指示该访问命令为何种属性时(例如，读取或写入)可以为该访问命令在SC中分配Cache Line。例如，分配策略可用于指示在该访问命令为读取命令的情况下可以为该访问命令在SC中分配Cache Line；或者，分配策略可用于指示在该访问命令为写入命令的情况下可以为该访问命令在SC中分配Cache Line。
如前所述，本申请实施例中，每个访问命令对应一个访问地址，每个访问地址对应一个RID。其中，访问命令可以是读取命令，也可以是写入命令；访问地址下的数据可能存储在SC中，也可能存储在外部存储器中。
那么，与访问命令的属性(例如，读取或写入)相对应地，分配策略可以是读分配(即访问命令为读取命令时可以为该命令在SC中分配Cache Line，即为该命令所对应的访问地址分配Cache Line；若访问命令为写入命令则不为该命令在SC中再分配Cache Line)，可以是写分配(即访问命令为写入命令时可以为该命令在SC中分配Cache Line；若访问 命令为读取命令则不为该命令在SC中分配Cache Line，也可以是读写分配(即访问命令为写入命令或读取命令时均可以为该命令在SC中分配Cache Line)。
下面给出几种SC根据分配策略与访问命令的属性对访问命令进行处理的具体方式。
当分配策略为读分配、访问命令为读取命令时，SC从外部存储器读取访问命令请求读取的数据并存储；SC将该访问命令请求读取的数据返回给IP核301。前面提到，读分配的含义是：访问命令为读取命令时可以为该命令在SC中分配Cache Line。那么，在分配策略为读分配、访问命令为读取命令的情况下，SC可以为该访问命令分配Cache Line，SC从外部存储器读取该访问命令请求读取的数据并存储在SC中，并将该数据返回给IP核301。需要注意的是，在这种情况下，SC从外部存储器中读取了该数据并将该数据写入SC中，即该访问地址下的数据占用了SC的Cache Line。
当分配策略为读分配、访问命令为写入命令时，SC将该访问命令请求写入的数据写入外部存储器。前面提到，读分配的含义是：访问命令为读取命令时可以为该命令在SC中分配Cache Line，若访问命令为写入命令则不为该命令在SC中再分配Cache Line。那么，在分配策略为读分配、访问命令为写入命令的情况下，SC不为该访问命令分配Cache Line，SC将该访问命令请求写入的数据写入外部存储器。
当分配策略为写分配、访问命令为读取命令时，SC从外部存储器读取该访问命令请求读取的数据，并将访问命令请求读取的数据返回给IP核301。前面提到，写分配的含义是：若访问命令为读取命令则不为该命令在SC中分配Cache Line。那么，在分配策略为写分配、访问命令为读取命令的情况下，SC从外部存储器读取该访问命令请求读取的数据，并将访问命令请求读取的数据返回给IP核301。需要注意的是，在这种情况下，SC虽然从外部存储器读取了该数据，但是该数据并未写入SC中，而是直接返回给IP核301，即该访问地址下的数据并未占用SC的Cache Line。
当分配策略为写分配、访问命令为写入命令时，SC从外部存储器读取访问地址对应的数据并存储；SC将访问地址对应的数据写入SC。前面提到，写分配的含义是：访问命令为写入命令时可以为该命令在SC中分配Cache Line。那么，在分配策略为写分配、访问命令为写入命令的情况下，SC从外部存储器读取访问地址对应的数据并存储，然后将访问地址对应的数据写入SC。也就是说，在这种情况下，该访问地址下的数据占用了SC的Cache Line。
当分配策略为读写分配时，SC根据访问命令在SC中进行数据读写。前面提到，读写分配的含义是：访问命令为写入命令或读取命令时均可以为该命令在SC中分配Cache Line。那么，在分配策略为读写分配的情况下，无论访问命令是读取命令还是写入命令，均可以为该命令分配SC的Cache Line，可直接根据访问命令在SC中进行数据读写。
需要说明的是，若SC中存在与访问地址对应的缓存行，那么在执行该访问命令时不涉及SC重新为该访问命令分配Cache Line的情况，SC直接在对应的缓存行中进行读取或者写入即可，可以不考虑分配策略。上面列举的几种情况适用于SC中不存在与访问地址对应的缓存行的情况。
示例性地，除了标准的读/写分配以外，还可以配置一些特殊的分配策略，例如读de-allocate(读清空)，该分配策略是指在读命中的情况下将范文地址对应的Cache Line清空(invalid)，在读命令不命中时也不为读命令分配Cache Line；读的分配策略和写的分配策略是可以组合的，例如分配策略可以是写分配+读清空，表示访问命令为写入命令时可 以为该命令在SC中分配Cache Line，访问命令为读取命令时，则在读命中的情况下将访问地址对应的Cache Line清空。
二、替换策略
替换策略，用于指示访问地址下的数据可以被替换的情况。在SC未被完全占用的情况下，SC在接收到访问命令后可以根据前述分配策略分配Cache Line。但是，由于SC的容量有限，SC难以在接收到访问命令后为每一个访问命令均分配Cache Line。那么，在SC的容量已被完全占用或者容量不足的情况下，就会涉及到数据覆盖的问题。替换策略则是在涉及数据覆盖问题时生效。
例如，RID对应的替换策略可以是允许替换，那么在SC容量已被完全占用或者容量不足的情况下，该RID对应的访问地址下的数据可以被其他数据覆盖。
例如，RID对应的替换策略可以是允许同RID替换，那么在SC容量已被完全占用或者容量不足的情况下，该RID对应的访问地址下的数据可以被同一RID对应的其他访问地址下的数据覆盖。也就是说，在这种实现方式中，多个访问地址对应一个RID，其中一个访问地址下的数据可以被另一个访问地址下的数据覆盖。
例如，RID对应的替换策略可以是允许高优先级替换，那么在SC容量已被完全占用或者容量不足的情况下，该RID对应的访问地址下的数据可以被优先级高于自身的RID对应的访问地址下的数据覆盖。
例如，RID对应的替换策略可以是不允许替换，那么在SC容量已被完全占用或者容量不足的情况下，该RID对应的访问地址下的数据不可以被其他数据覆盖。
本申请实施例中，SC还可将RID存储在与访问地址对应的缓存行的标签域(Tag)中。现有技术中，与访问地址对应的缓存行的标签域(Tag)中包含TAG字段(用于指示Tag值)、VLD字段(用于指示数据是否有效)、CL字段(用于指示SC中存储的数据与外部存储器中存储的数据是否一致)。本申请实施例中，还可以在标签域(Tag)中增加RID字段，以指示该缓存行的访问地址对应的RID。
标签域(Tag)中的RID字段可以用于根据该RID确定相应的配置策略，在SC对访问命令进行处理时，可以根据该RID获取相应配置策略，从而判断处理方式。例如，在SC容量已被完全占用或者容量不足的情况下，SC根据标签域(Tag)中的RID字段对应的优先级策略，可以判断该缓存行中存储的数据是否可以被覆盖。
此外，在SC中的某个缓存行中写入数据时，同时也要在标签域(Tag)中写入RID；在涉及数据覆盖的场景时，可以将该缓存行的标签域(Tag)中的RID取出并解析属性；若该缓存行下的数据需要被覆盖，则该缓存行的标签域(Tag)中的RID也要进行相应修改替换。
三、优先级策略
优先级策略，用于指示访问地址下的数据的优先级。例如，在上述关于替换策略的介绍中已经涉及优先级策略的描述。在涉及数据覆盖的场景下，优先级策略可指示该RID对应的访问地址下的数据的优先级。
例如，RID＝1的优先级为2，替换策略为允许高优先级替换；那么，在SC容量已被完全占用或者容量不足的情况下，若RID＝2的优先级为3，则RID＝1对应的访问地址下的数据可以被RID＝2对应的访问地址下的数据覆盖。
四、使用容量
使用容量，用于指示RID对应的数据在SC中占用的最大容量。例如可以是1MByte、256kByte、2Mbyte、128kByte等。
由于SC的容量有限，因而SC不可能允许某个任务或某个IP核无限制地占用SC中的Cache Line。因而，可以在RID对应的配置策略中设置使用容量这一策略。在该使用容量的限制范围内，SC可以为该RID对应的访问地址下的数据分配Cache Line；在使用容量已被全部占用的情况下，若要在SC中写入该RID对应的数据，则需要根据前述替换策略或优先级策略选择是否可以将SC中的其他数据覆盖，进而判断是否可以用该RID对应的数据覆盖掉SC中的其他数据。
此外，RID对应的配置策略还可以包括其他内容，本申请实施例对此不作具体限定。例如还可以包括安全属性，安全属性可用于指示该RID对应的访问地址下的数据的安全性(安全或者非安全)。
如前所述，地址范围配置标号对应的配置策略可以预先配置在SC中。当然，随着终端的应用场景的改变，每个任务类型的应用场景也会发生相应变化，此时，可以对SC中存储的配置策略进行修改。
示例性地，随着应用场景的变换，可以动态修改RID对应的优先级策略，例如可以将优先级策略由2修改为3，从而提高该RID的优先级；也可以动态修改RID对应的使用容量，例如可以将使用容量由2Mbyte修改为1Mbyte，从而降低该RID在SC中占用的使用容量。
示例性地，假设前述指定数值为0。当希望取消某个非0的RID的使用时，可以先将该RID的使用容量配置为0，或者将该RID的分配策略设置为不允许分配；然后对SC中为该RID分配的Cache Line进行无效(invalid)操作，从而将SC中为该RID分配的Cache Line中的数据刷新到外部存储器中，完成后该RID不再使用。可选地，还可根据需求将该RID修改分配给其他地址空间使用，并配置相应的配置策略。
需要说明的是，在上述示例中，若标签域(Tag)中的CL字段指示SC中的数据与外部存储器中的数据一致，则可以直接对SC中为该RID分配的Cache Line进行无效(invalid)操作；若标签域(Tag)中的CL字段指示SC中的数据与外部存储器中的数据不一致，则需要对SC中为该RID分配的Cache Line进行清除(clean)操作后再进行无效(invalid)操作，才可将SC中为该RID分配的Cache Line中的数据刷新到外部存储器中。
以上介绍了RID的设置原则、RID对应的配置策略，以及SC如何对访问命令进行处理。以上方案实现的前提是，IP核在发出访问命令后，需要获取到与访问地址对应的RID。下面就对IP核如何获取与访问地址对应的RID进行详细介绍。
具体实现时，IP核301的类型有多种，比如，有的IP核对应的访问命令中携带的访问地址是虚拟地址，在进行数据访问时，内存管理单元(memory management unit，MMU)需要通过外部存储器中存储的页表将虚拟地址转换成物理地址后再根据物理地址进行数据访问。其中，MMU与IP核301和总线302连接，在进行虚实地址转换时，MMU接收IP核301发出的访问地址(虚拟地址)并将该访问地址经总线302路由至外部存储器，由外部存储器查询页表进行地址转换后，MMU再通过总线302接收转换得到的相应物理地址并发送给IP核301。再比如，有的IP核对应的访问命令中携带的访问地址是物理地址，在进行数据访问时，无需进行虚实地址转换，直接根据该物理地址访问即可。
针对不同类型的IP核，RID的设定方式和存储位置不同，相应地，IP核获取RID的方式也有所不同。比如，针对根据虚拟地址进行数据访问的IP核，可以将RID配置在页表中，在进行虚实地址转换时可以获取访问地址对应的RID；再比如，针对根据物理地址进行数据访问的IP核，可以将RID配置在IP核内置的寄存器中，IP核在向总线302发送访问命令之前，可以通过查询该寄存器获取RID。
下面举例说明IP核获取RID的三种方式。
方式一
在方式一中，访问地址为虚拟地址，IP核301在根据访问命令对应的访问地址获取与访问地址对应的RID时，具体可通过如下方式实现：将访问地址发送给MMU，MMU用于通过查询页表获取访问地址对应的RID，页表用于记录访问地址与RID的映射关系；接收MMU发送的RID。
也就是说，可以预先在页表中存储上述映射关系。在访问地址为虚拟地址的情况下，可通过查询页表获知上述映射关系，进而获取与访问地址对应的RID。
在现有技术中，页表可用于记录虚拟地址和物理地址之间的映射关系，在IP核发起对某一虚拟地址下的数据的访问时，MMU通过查询页表将虚拟地址转换为物理地址后，物理地址作为访问命令的随路信号下发至总线，进而根据该物理地址进行数据访问。本申请实施例中，RID可以存储在物理地址的高位(物理地址的高位未被占用)，MMU根据访问地址查询页表获取物理地址后，即可从物理地址高位获取与访问地址对应的RID。
此外，在方式一中，RID也可以存储在页表的专用位域中。页表中包含很多位域，除了用于存储地址信息的位域之外，页表中还预留有用于存储属性信息的位域，例如，页表中可以包含为硬件预留的位域，在该位域中写入的数据可供硬件读取。上述预留的、用于存储属性信息的位域可以视为本申请实施例中所述的“专用位域”。将RID存储在专用位域中，MMU在根据访问地址查询页表后可获取专用位域中的RID，进而获取与访问地址对应的RID。
示例性地，页表中的一条记录可以是虚拟地址A～RID＝N，其中，RID＝N的信息存储在专用位域中。若IP核发起的访问命令对应的访问地址为虚拟地址A，那么MMU可通过查询页表中的这条记录确定虚拟地址A对应的RID为N。那么，IP核在接收到MMU发送的页表查询结果后，可以确定RID＝N这一信息。总线302在接收到IP核发送的RID＝N的信息后，可以确定将访问命令路由至SC还是路由至外部存储器。
此外，在总线302根据RID＝N将访问命令路由至SC的情况下，SC还可对该访问命令进行处理，具体方式可参见前面的描述，此处不再赘述。
在方式一中，RID可以存储在页表的物理地址高位或者存储在页表的专用位域。
方式二
在方式二中，访问地址为物理地址，IP核301在根据访问命令对应的访问地址获取与访问地址对应的RID时，具体可通过如下方式实现：根据访问地址查询寄存器，获取与访问地址对应的RID，该寄存器置于IP核301中，该寄存器用于记录访问地址与RID的映射关系。
也就是说，在访问地址为物理地址的情况下，可以预先在寄存器中存储上述映射关系。IP核在发起访问命令时，可根据访问命令的访问地址去寄存器中查询对应的RID，并将RID随访问命令一起发送给总线302。
一般而言，上述映射关系由多组连续物理地址范围(如起始地址和结束地址，或起始地址和长度)及对应的RID表达；多个连续物理地址可以对应一个RID，也可以分别对应多个RID。
在方式二中，该IP核可能访问的地址空间可以划分为多个子类，每个子类对应不同的RID。例如，该IP核发起的业务类型有多种，每种业务类型所分配的地址空间可以赋值不同的RID。
方式三
在方式二中，访问地址为物理地址，IP核301在根据访问命令对应的访问地址获取与访问地址对应的RID时，具体可通过如下方式实现：根据访问地址查询IP核内置的寄存器获取RID，该寄存器用于记录RID。
也就是说，在访问地址为物理地址的情况下，可以预先在寄存器中存储RID。IP核在发起访问命令时，可直接去寄存器中查询RID的数值，并将RID随访问命令一起发送给总线302。
在方式三中，该IP核可能访问的地址空间均赋予同一RID。例如，该IP核发起的业务类型比较单一，因而将该IP核可能访问的地址空间赋值同一RID即可。
由以上对三种方式的介绍可知，在方式一中，可以采用MMU对一系列离散的物理页设定RID；在方式二中，可以对固定的若干个连续物理地址分别设定相同或不同的RID；在方式三中，可以采用寄存器固定配置的方式，对一个IP核可以访问的地址空间设定同一RID。在方式三和方式二中，虽然IP核发起的访问命令中携带的访问地址均是物理地址，但是方式二中，IP核的业务类型比较丰富，因而可以将为不同业务类型分配的地址空间赋予不同的RID的数值；而方式三中，IP核的业务类型比较单一，因而可以将为该IP核可以访问的地址空间均赋予同一RID。
综上，采用本申请实施例，由于IP核301获取到与访问地址对应的RID，并将RID随访问命令一起发送至总线302。因而总线302在接收到RID后可以确定将访问命令路由至SC还是路由至外部存储器。采用本申请实施例提供的方案，避免出现所有访问命令必须先在SC中进行查询匹配的情况，因而可以提高IP核的访问命中率，从而降低系统功耗。
基于以上实施例，本申请实施例还提供一种片上系统。如图4所示，该片上系统包括Master A、Master B、Master C、总线、SC。此外，该片上系统位于终端中，该终端还可以包括DRAM(其中包括DRAM控制器)。
其中，Master即为前述IP核的一种示例，Master A、Master B和Master C为三种不同类型的IP核，其对应的RID配置策略有所不同，具体可参见图4中的描述。该IP核在发送访问命令时，会将RID的对应数值一起发送给总线。总线在访问命令的随路RID＝0的情况下将访问命令路由至DRAM，由DRAM参照现有技术的方式对访问命令进行处理；在访问命令的随路RID不为0的情况下将RID和访问命令路由至SC。SC中配置有Tag和RID解析模块，标签域Tag包含TAG字段、VLD字段、CL字段以及RID字段，这些字段的含义可参见前面的描述，此处不再赘述。RID解析模块用于在接收到访问命令及随路RID后，解析获取该RID对应的配置策略。SC可以根据对应配置策略对访问命令进行处理，具体处理方式在图3所示的片上系统300中已有介绍，此处不再赘述。
下面，针对图4所示的片上系统中的Master A为例，详细介绍Master A的应用步骤。
步骤1.根据应用场景分析需要使用的Memory空间，根据访问这些Memory空间的行为按照是否对System Cache友好(即访问的时间局域性，空间局域性)进行分类；
步骤2.对Cache友好的空间进一步划分其使用配置策略(SC使用容量，分配策略、替换策略、优先级、安全性)，从而将对Cache友好的空间划分为不同的子类；
步骤3.从步骤2获取不同SC应用空间子类后为其映射不同的非零RID，映射方式可以采用静态映射、动态映射或两者结合；从步骤1获得的SC非友好的地址空间直接配置RID＝0；
步骤4.在SC的RID解析模块的配置表中，设定步骤3分配的非0的RID相应的配置策略；
步骤5.在系统地址空间申请函数中增加RID参数，该RID参数将写入申请的地址空间的最后一级页表中。
具体地，该RID参数可以记录在未使用的物理地址高位，或者页表中的专用位域；同一个物理地址空间同一时刻只允许配置为一种RID；
步骤6.Master A的访问命令通过MMU进行虚实地址转换时，提取页表中记录的RID(步骤5中写入)，MMU支持将RID作为访问的随路信号向下游(总线)发送；
步骤7.总线会根据访问的随路RID是否为0分别路由到SC(RID！＝0)或者DRAM(RID＝0)；
步骤8.对于到达SC的访问命令，根据其随路RID解析出具体的配置策略进行处理，如果访问需要分配新的Cache Line，则RID应存入Tag的RID字段中，如果访问需要覆盖旧的Cache Line，需要将旧Cache Line Tag中的RID取出并解析各种属性后进行相应处理；
步骤9.DRAM对RID＝0的访问命令进行处理，此时RID＝0这一信息对DRAM的处理过程无意义；
步骤10.随着应用场景的变换，软件可以动态修改RID在System Cache中的配置策略，例如修改优先级，修改使用容量等；
步骤11.当希望取消某个非0的RID的使用时，先将该RID允许的使用容量配置为0，然后对SC中该RID分配的Cache Line进行clean and invalid操作；可选地，还可将原分配该RID的地址修改为RID＝0或其他非0的RID。
需要说明的是，图4所示的片上系统可以视为图3所示的片上系统300的一种具体示例，图4所示的片上系统中未详尽描述的实现方式可参见片上系统300中的相关描述。
此外，本申请实施例还提供一种终端，如图5所示，该终端包括图3所示的片上系统300。
可选地，该终端还可以包括外部存储器。该外部存储器用于实现图3的示例中外部存储器所执行的操作。
其中，该终端可以部署在陆地上，包括室内或室外、手持或车载；也可以部署在水面上(如轮船等)；还可以部署在空中(例如飞机、气球和卫星上等)。所述终端可以是手机(mobile phone)、平板电脑(pad)、带无线收发功能的电脑、虚拟现实(virtual reality，VR)终端、增强现实(augmented reality，AR)终端、工业控制(industrial control)中的无线终端、无人驾驶(self driving)中的无线终端、远程医疗(remote medical)中的无线 终端、智能电网(smart grid)中的无线终端、运输安全(transportation safety)中的无线终端、智慧城市(smart city)中的无线终端、智慧家庭(smart home)中的无线终端等。
基于同一发明构思，本申请实施例提供一种访问命令的路由方法。参见图6，该方法包括如下步骤：
S601：根据访问命令对应的访问地址获取与访问地址对应的地址范围配置标号。
其中，该地址范围配置标号用于总线对访问命令进行路由。
S602：根据地址范围配置标号将访问命令路由至SC或外部存储器。
可选地，IP核访问的地址空间包括第一部分地址空间和第二部分地址空间，其中，第一部分地址空间对应的地址范围配置标号为指定数值，第二部分地址空间对应的地址范围配置标号为指定数值之外的其他数值，第一部分地址空间中对应存储的数据不适于采用SC进行存储，第二部分地址空间中对应存储的数据适于采用SC进行存储。
可选地，根据地址范围配置标号将访问命令路由至SC或外部存储器，包括：若地址范围配置标号为指定数值，则将访问命令路由至外部存储器；若地址范围配置标号为除指定数值之外的其他数值，则将访问命令路由至SC。
可选地，该方法还包括：SC对访问命令进行处理。
可选地，SC对访问命令进行处理，包括：若SC中存在与访问地址对应的缓存行，则SC根据访问命令在SC中进行数据读写。
可选地，该方法还包括：将地址范围配置标号路由至SC；SC对访问命令进行处理，包括：若SC中不存在与访问地址对应的缓存行，则SC根据地址范围配置标号对应的配置策略对访问命令进行处理。
此外，图6所示方法中的其他实现方式还可参见片上系统300中的相关描述，此处不再赘述。

Claims (18)

  1. 一种片上系统，其特征在于，所述片上系统SOC包含知识产权IP核和总线；
    所述IP核，用于根据访问命令对应的访问地址获取与所述访问地址对应的地址范围配置标号，并将所述访问命令以及所述地址范围配置标号传输至所述总线，所述地址范围配置标号用于所述总线对所述访问命令进行路由；
    所述总线，用于根据所述地址范围配置标号将所述访问命令路由至系统缓存SC或外部存储器。
  2. 如权利要求1所述的片上系统，其特征在于，所述IP核访问的地址空间包括第一部分地址空间和第二部分地址空间，其中，第一部分地址空间对应的地址范围配置标号为指定数值，第二部分地址空间对应的地址范围配置标号为指定数值之外的其他数值，所述第一部分地址空间中对应存储的数据不适于采用所述SC进行存储，所述第二部分地址空间中对应存储的数据适于采用所述SC进行存储。
  3. 如权利要求2所述的片上系统，其特征在于，所述总线在根据所述地址范围配置标号将所述访问命令路由至SC或外部存储器时，具体用于：
    若所述地址范围配置标号为指定数值，则将所述访问命令路由至所述外部存储器；
    若所述地址范围配置标号为除指定数值之外的其他数值，则将所述访问命令路由至所述SC。
  4. 如权利要求1～3任一项所述的片上系统，其特征在于，所述访问地址为虚拟地址，所述IP核在根据访问命令对应的访问地址获取与所述访问地址对应的地址范围配置标号时，具体用于：
    将所述访问地址发送给内存管理单元MMU，所述MMU用于通过查询页表获取所述地址范围配置标号，所述页表用于记录所述访问地址与所述地址范围配置标号的映射关系；
    接收所述MMU发送的所述地址范围配置标号。
  5. 如权利要求4所述的片上系统，其特征在于，所述MMU根据所述访问地址查询所述页表获取物理地址，所述地址范围配置标号存储在所述物理地址的高位。
  6. 如权利要求1～3任一项所述的片上系统，其特征在于，所述访问地址为物理地址，所述IP核在根据访问命令对应的访问地址获取与所述访问地址对应的地址范围配置标号时，具体用于：
    根据所述访问地址查询寄存器，获取与所述访问地址对应的所述地址范围配置标号，所述寄存器置于所述IP核中，所述寄存器用于记录所述访问地址与所述地址范围配置标号的映射关系。
  7. 如权利要求1～6任一项所述的片上系统，其特征在于，所述系统还包括：
    所述SC，用于对所述访问命令进行处理。
  8. 如权利要求7所述的片上系统，其特征在于，所述SC在对所述访问命令进行处理时，具体用于：
    若所述SC中存在与所述访问地址对应的缓存行，则所述SC根据所述访问命令在所述SC中进行数据读写。
  9. 如权利要求7所述的片上系统，其特征在于，所述总线还用于：
    将所述地址范围配置标号路由至所述SC；
    所述SC在对所述访问命令进行处理时，具体用于：
    若所述SC中不存在与所述访问地址对应的缓存行，则所述SC根据所述地址范围配置标号对应的配置策略对所述访问命令进行处理。
  10. 如权利要求9所述的片上系统，其特征在于，所述地址范围配置标号对应的配置策略包括以下一种或多种：
    分配策略，所述分配策略用于指示所述访问地址下的数据在所述访问命令为读取命令和/或写入命令的情况下可以存储在所述SC；
    替换策略，用于指示所述访问地址下的数据可以被替换的情况；
    优先级策略，用于指示所述访问地址下的数据的优先级；
    使用容量，用于指示所述地址范围配置标号对应的数据在所述SC中占用的最大容量。
  11. 如权利要求7～10任一项所述的片上系统，其特征在于，所述SC还用于：
    将所述地址范围配置标号存储在与所述访问地址对应的缓存行的标签域中。
  12. 一种终端，其特征在于，包括如权利要求1～11任一项所述的片上系统。
  13. 一种访问命令的路由方法，其特征在于，包括：
    根据访问命令对应的访问地址获取与所述访问地址对应的地址范围配置标号，所述地址范围配置标号用于所述总线对所述访问命令进行路由；
    根据所述地址范围配置标号将所述访问命令路由至系统缓存SC或外部存储器。
  14. 如权利要求13所述的方法，其特征在于，知识产权IP核访问的地址空间包括第一部分地址空间和第二部分地址空间，其中，第一部分地址空间对应的地址范围配置标号为指定数值，第二部分地址空间对应的地址范围配置标号为指定数值之外的其他数值，所述第一部分地址空间中对应存储的数据不适于采用所述SC进行存储，所述第二部分地址空间中对应存储的数据适于采用所述SC进行存储。
  15. 如权利要求14所述的方法，其特征在于，根据所述地址范围配置标号将所述访问命令路由至SC或外部存储器，包括：
    若所述地址范围配置标号为指定数值，则将所述访问命令路由至所述外部存储器；
    若所述地址范围配置标号为除指定数值之外的其他数值，则将所述访问命令路由至所述SC。
  16. 如权利要求13～15任一项所述的方法，其特征在于，还包括：
    所述SC对所述访问命令进行处理。
  17. 如权利要求16所述的方法，其特征在于，所述SC对所述访问命令进行处理，包括：
    若所述SC中存在与所述访问地址对应的缓存行，则所述SC根据所述访问命令在所述SC中进行数据读写。
  18. 如权利要求16所述的方法，其特征在于，还包括：
    将所述地址范围配置标号路由至所述SC；
    所述SC对所述访问命令进行处理，包括：
    若所述SC中不存在与所述访问地址对应的缓存行，则所述SC根据所述地址范围配置标号对应的配置策略对所述访问命令进行处理。
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