WO2020144211A1

WO2020144211A1 - An electromagnetic radiation detection device

Info

Publication number: WO2020144211A1
Application number: PCT/EP2020/050277
Authority: WO
Inventors: Kevin O'neill
Original assignee: PixQuanta Limited
Priority date: 2019-01-11
Filing date: 2020-01-08
Publication date: 2020-07-16

Abstract

An electromagnetic radiation detection device (1) comprises a matrix having a plurality of N rows divided into a plurality of M columns of cells (2), each cell comprising a plurality of diode segments (3) responsive to electromagnetic radiation incident on said device (1). A scan driver (4) provides a plurality of N scan line signals to respective rows of said matrix, each for enabling charge values from cells (2) of a selected row of said matrix to be read. A reader (5) reads a plurality of M variable charge value signals from respective columns of said matrix, each corresponding to a cell (2) within a selected row of said matrix. Each diode segment (3) is connected to a drive voltage sufficient to operate each diode segment (3) in avalanche multiplication Geiger mode; and connected in series with an avalanche quenching resistor (8) to said reader.

Description

An electromagnetic radiation detection device

Field

The present invention relates to an electromagnetic radiation detection device.

Background

In applications such as Digital Radiography (DR), Flat Panel Detectors (FPDs) can be used to indirectly acquire X-Ray images. FPDs typically comprise a matrix of individual pixel sensor circuits and use indirect conversion from X-ray photons to optical photons using a “phosphor” (not shown) over the entire area of the detector. Typical scintillation materials used in X-ray imaging are phosphors such as structured Cesium Iodide (CsI(Tl)) and

Gadolinium OxySulfide (Gd₂0₂S(Tb)), also known as GadOx or GOS. Optical light photons from the phosphor that reach photodiodes within respective pixel circuits are converted into single electron-hole pairs, and the resulting charge is stored within the pixel circuits, using either discrete capacitors and/or parasitic capacitance.

WO2018/166805 discloses an electromagnetic radiation detection device comprising a matrix having a plurality of N rows divided into a plurality of M columns of cells, each cell comprising a plurality of diode segments responsive to electromagnetic radiation incident on said device. A scan driver provides a plurality of N scan line signals to respective rows of said matrix, each for enabling charge values from cells of a selected row of said matrix to be read. A reader reads a plurality of M variable charge value signals from respective columns of said matrix, each corresponding to a cell within a selected row of said matrix. Each diode segment is connected to a drive voltage sufficient to operate each diode segment in avalanche multiplication Geiger mode; and connected in series with an avalanche quenching resistor to said reader. A time of flight (TOF) imaging device is also provided as well as exemplary stack designs for diode segments.

Summary

According to the invention, there is provided an electromagnetic radiation detection device according to claim 1. Some embodiments of this invention enable high-quality large-area X-ray imaging of subjects, such as high-risk category subjects, with lower, safer exposure doses.

In some use cases, high frame-rate sequential imaging of subjects, for example, angiograms, can be made with lower dose and at higher frame-rates than the incumbent technology.

Alternatively, in use cases of the detection device where there is no need to limit an X-ray dose, the exposure time per frame can be reduced. This reduces the blurring of images due to patient movement during exposure, for example, due to blood flow or heartbeat, resulting in an improved image quality. Also, for hazard & threat applications, where cargo is dynamically scanned, shorter exposure times will result in less blurring due to reduced movement of the object during scanning.

Among the medical applications of the radiation detection device according to the invention are: CT imaging, PET imaging, SPECT imaging, and DR (Digital Radiography) imaging.

Other non-medical applications comprise: cargo scanning or detection at airports, or radiation detection (e.g. for nuclear physics experiments, non-destructive testing, or for large-area hazard and threat).

Among other imaging applications which can benefit from the use of this electromagnetic radiation detection device there are LiDAR imaging, VR retina camera, low light level contact image sensors (CIS), and security applications (e.g. for low light level cameras).

According to a second aspect there is provided a time-of- flight imaging device according to claim 4.

These devices find application where the goal is to capture an arrival time of a single photon with the photon generating a plurality of electrons within the diode, and improving the quality of detection of such devices.

Applications for embodiments of this aspect include ranging or triangulation applications.

Brief Description of the Drawings

Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings, in which:

Figure 1 shows a portion of an active matrix FPD as disclosed in WO2018/166805; Figure 2 shows a cross-section of an individual cell of the FPD portion illustrated in Figure 1;

Figure 3 shows a portion of an active matrix time-of-flight imaging device as disclosed in WO2018/166805;

Figure 4 shows a cross-section of an embodiment of an individual cell of the FPD portion illustrated in Figure 3 formed from a Silicon-on-Glass process;

Figures 5 and 6 illustrate variations of the stacks disclosed in WO2018/166805;

Figure 7 illustrates a particularly advantageous manner for fabricating devices according to embodiments of the present invention; and

Figures 8-12 illustrates variations of cell design according to embodiments of the present invention.

Description of the Preferred Embodiments

With reference to Figure 1 and by way of background, there is shown an active matrix FPD 1 as disclosed in WO2018/166805. The FPD 1 comprises a matrix having a plurality of N rows divided into a plurality of M columns of cells 2 (only a 3x3 portion of which are shown). The matrix is incorporated in a detector which can comprise focussing optics (not shown) which determine the field of view of the detector and which are otherwise conventional.

Each cell 2 comprises a plurality of diode segments 3 responsive to electromagnetic radiation incident on the FPD 1. In the embodiment, each cell comprises 9 diode segments laid out in a 3x3 grid. Nonetheless, it will be appreciated that this arrangement can be varied and can involve a variety of numbers of segments laid out in alternative arrangements. Nonetheless, the diode segments for embodiments of the present application can still occupy a similar area and so provide a similar resolution to the unitary diode implementations of the prior art.

Each cell 2 further comprises a transistor 10 for selectively connecting the diode segments 3 of the cell 2 to a data line 6 associated with a reader 5. Each of the diode segments 3 is connected in parallel to the transistor 10 via a respective avalanche quenching resistor 8.

For indirect X-ray detection applications, FPD 1 can comprise at least one layer of scintillation material, e.g. a phosphor, for converting incident X-ray photons to optical photons that can reach the diode segments 3 of the cells 2. In response to the incident optical photons, the diode segments 3 generate charge signals. In this way, the FPD1 can perform an indirect X-ray/charge signal conversion.

The operation of the diode segments 3 is under a reverse drive voltage bias applied by power supplying means 7 to the cathodes of the diode segments 3. The reverse voltage bias is above the breakdown voltage of the diode segments 3, so that the diode segments 3 operate in an avalanche multiplication Geiger mode. In this mode, many electron-hole pairs are generated by a diode segment 3 for a single photon absorption event, resulting in a higher generated charge for a given X-ray exposure compared with the prior art solutions.

Although not shown in Figure 1, this charge can be stored in either a discrete capacitor provided within the cell or using parasitic capacitance.

Depending on the breakdown voltage of the diode segments 3, typical values for the reverse voltage bias can be in the range between 10 V and 30 V. The applied reverse voltage bias is a DC voltage, but can be gated by the frame time (typically 20ms for a 50Hz frame rate).

Alternatively, the reverse voltage bias can be applied in a pulsed mode, where the pulse width is determined by the X-ray pulse width (typically about 2ms); in this way, reliability is improved and the readout operation of the FPD 1 can occur at lower voltages than using a DC bias.

Side walls 22 of the diode segments 3 within a cell 2 are laterally separated from each other by dielectric material 23, thus providing laterally confined structures to control the gain of the Geiger avalanche multiplication. A diode segment size can be between 2 pm (a limit imposed by typical photolithographic fabrication processes feature size) to 150 pm (max pixel size limit).

Each resistor 8 is designed to provide a current limiting resistance high enough to return the diode segments 3 to a pre-breakdown state after an avalanche event. The resistance value, depending on the diode segments 3 used, can be in the range between 50k W and 2M W, and more typically between 100k W and 400k W.

Referring back to Figure 1, the FPD 1 comprises:

- a scan driver 4 for providing a plurality of N scan line signals to respective rows of the matrix, each for enabling charge values from cells 2 of a selected row to be read; and - a reader 5 reading a plurality of M variable charge value signals from respective columns of the matrix, each corresponding to a cell 2 within a selected row.

The scan line signals from the scan driver 4 are applied to the gates 11 of the transistors 10 in the selected rows, so as to turn on these transistors 10. In this way, the diode segments 3 of the cells 2 within the selected row are operatively connected to corresponding data lines 6, and the reader 5 can sequentially read from the data lines 6, the variable charge value signals generated by the diode segments 3 of the cells 2 within the selected row. In this way, a sequential active matrix addressing of the row lines can be performed to determine the charge value, and therefore the incident radiation intensity, at each cell location of the FPD 1.

As disclosed in WO2018/166805, the principles of the circuitry of Figures 1 and 2 can be applied to generating time-of- flight (ToF) images with a view to generating depth maps of a scene. Referring now to Figures 3 and 4, the matrix is operatively coupled with a light (radiation) source (not shown) that is pulsed to illuminate a scene at a known time compared with the readout of each device row. Once initialised, a transistor 14 connected to the anode of the diode segments 3”’ is open in linear mode and acts as a resistance element in parallel with a capacitor 19; the RC time of the capacitor 19 is chosen so that the charge on the pixel is time varying and discharges within a time period corresponding to the desired range of the TOF detector. For typical indoor applications a maximum range of 10m would apply, therefor an RC time comparable to the total round trip time of 67ns could be chosen. When reflected photons from an illuminated scene arrive at the detector pixel, the avalanche diode segments 3”’ fire, closing the transistor 14 to halt the discharging of the pixel capacitor 19 through to Vdd. The charge remaining on the pixel is then uniquely related to the time of flight of the light, and the pixel array can be read out in the conventional fashion allowing a map of distance for each location in the matrix that forms the focal plane array to be generated.

Referring now to Figures 5 and 6, there are shown still further variants of the stacks disclosed in WO2018/166805. In each of these examples, similar reference numerals are employed to indicate corresponding layers. As will be seen in Figure 5, as well as the doped layer 42’, a layer of intrinsic Silicon Carbide 42” is provided, whereas in Figure 6, the doped layer 42 of Figure 9 of WO2018/166805 has been replaced completely with a layer of Silicon Carbide 42”. In each of the stacks of Figures 5 and 6, a buffer metal layer 47 comprising for example, TiN is interposed between the second layer(s) 42 and the transparent ITO layer 25. The intrinsic layer 43 can again be composed of alternate regions of amorphous semiconductor and crystalline semiconductor and as in the case of the stack of Figure 9 of WO2018/166805, it will be appreciated that such semiconductor can comprise any of Silicon, as illustrated,

Silicon Germanium or Germanium.

Still further variants of the stacks of Figures 5 and 6 are possible and so for example, it is possible to provide additional layers of SiC or SiC/Si above or below the mixed phase layer 43. Also, it is possible to provide a further intrinsic layer between the SiC 42” and upper p- type layers 42’ of Figure 5.

Also, rather than using ITO for conductive transparent layer 25, materials such as a boron doped semiconductor, a boron doped oxide or glass, aluminium oxynitride or a refractory metal nitride such as titanium nitride or molybdenum nitride or any other CMOS compatible material, can be used.

Referring now to Figure 7 and using as an example the structure of Figure 14 disclosed in WO2018/166805, it will be seen that one particularly advantageous approach to fabricating the devices according to the embodiments of the present invention is to implement the logic for the matrix up to and including the uppermost metal layer 33 using a standard CMOS ROIC (read-out integrated circuit) fabrication process. Thereafter the additional layers for the detector including those for the diode segments 3’ and quench resistors 8, illustrated in more detail in Figures 5 and 6 as well as in WO2018/166805, can be added by post processing the CMOS wafer using low temperature thin film deposition techniques such as PE-CVD or in some cases sputtering. These techniques do not require processing temperatures in excess of approximately 400°C and so they do not affect the integrity of the previously produced ROIC circuitry. It will be appreciated that while illustrated with a particular structure, this technique is equally applicable to the other structures such as shown in Figures 2 and 4 as well as the other structures disclosed in WO2018/166805.

In particular and to ensure the integrity of the separate diode segments 3’, prior to or as part of the deposition of the dielectric layer 23 using such plasma deposition, the sidewall surfaces of the diode segments 3’ can be treated using a hydrogen plasma treatment to passivate any dangling bonds of the semiconductor layer 43 with hydrogen atoms.

Referring now to Figure 8-12, there are shown variants of the cell circuits described above: Referring first to Figure 8, it will be appreciated that by varying Vref, Vdd, and Vanode it is possible using the same matrix topology, such as described in relation to Figures 3 and 4, to switch a device between a TOF mode and a simple imaging mode. When acting as an imager, the FET 14 is driven so that it is always in enhancement-mode, whereas when acting in TOF mode, the FET 14 is switched by the diode segments 3’” from enhancement-mode to depletion-mode.

Referring to Figure 9, in order to increase the speed of closing of a pixel and so provide more accurate time stamping, especially when operating in TOF mode, double stage amplification can be provided with the addition of a FET 260 within each cell and interposed between the diode segments 3’” and the FET 14. In order to improve temperature robustness, a further FET 262 can be added to mirror the FET 260, although it will be appreciated that this will mitigate the amplification effect provided by the FET in isolation.

Figure 10 shows a pixel embodiment where instead of the direct pulse based approach of the previous embodiments, a Frequency-modulated continuous-wave radar (FM-CW) signal (Vseq) is interposed between the diode segments 3’” and the FET 14. Using such an indirect approach, a transmitted signal of a known stable frequency continuous wave varies up and down in frequency over a fixed period of time by a modulating signal. Frequency differences between the reflected received signal detected by the diode segments 3’” and the transmitted signal increase with delay, and hence with distance. This technique smears out, or blurs, Doppler effect to provide improved background noise rejection.

In a further variation of this embodiment, rather than the frequency modulated signal (Vseq) an indirect amplitude modulated signal can be employed.

In a still further variation as shown in Figure 11, a high pass filter comprising a shunt resistor 280 and a capacitor 282 are interposed between the diode segments 3’” and the FET 14 and rather than a gain increasing FET 260, as in Figure 9, a comparator 284 is used. Again, this provides for faster closing of a pixel and more accurate time stamping.

Finally, as shown in Figure 12, in order to extend the range of the device, it can be useful to duplicate or even multiply the switch/capacitor combination 14/19 with a cascade of such elements Ml /Cl, M2/C2, each triggered by the diode segments 3’”. Each capacitor Cl, C2 varies in size so that it charges/discharges at a different rate. Objects at short-range will trigger the smallest capacitors at the highest resolution as they charge/discharge, whereas reflections from objects at longer ranges will be picked up after the smaller capacitors have completely charged/discharged, by triggering larger capacitor elements while they are charging/discharging, but with lower resolution. Separate readout lines can be used to read values from each element C1,C2. Thus, dual mode ranging with long range/low resolution and short range/high resolution measurements can be provided from a single device. It will be appreciated that while the features of Figures 8 to 12 have been described separately, these can be combined as appropriate to gain the respective functionality as required from each approach.

It will also be appreciated that while the avalanche quench resistors 8 of the various embodiments have been shown as separate components from the diodes of the diode segments 3, these could equally be integrally formed with the diodes.

Finally, it will be seen that while the above described embodiments have been described in terms of cells providing an analog charge value which is read out to provide a value which is subsequently digitized, the detector design could equally be used with a read-out circuit (ROIC) comprising a cell design providing a digital output, for example, as disclosed in Perenzoni Matteo et al: "A 64x64-Pixels Digital Silicon Photomultiplier Direct TOF Sensor With 100-MPhotons/s/pixel Background Rejection and Imaging/ Altimeter Mode With 0.14% Precision Up To 6 km for Spacecraft Navigation and Landing", IEEE Journal Of Solid-State Circuits, vol. 52, no. 1, page 151-160. Here a digital counter within each cell can be reset at the beginning of each frame and begins counting until stopped by a signal from the diode segments.

Claims

Claims:

1. An electromagnetic radiation detection device comprising:

a readout circuit formed in a substrate using a CMOS fabrication process, the readout circuit comprising:

a scan driver providing a plurality of scan line signals to a matrix area of said substrate to select respective rows of said matrix, said matrix having a plurality of N rows divided into a plurality of M columns of cells; and

a reader reading a plurality of M charge values from respective columns of said matrix, each corresponding to a cell within a selected row of said matrix; and

a driver for providing a drive voltage to each cell of said matrix; and

a detector comprising a plurality of thin film layers extending over at least a portion of the matrix area of said readout circuit, at least one of said layers formed with a plasma enhanced- chemical vapor deposition, PE-CVD, process involving processing temperatures not exceeding about 400°C, the detector comprising:

for each cell of said matrix, a plurality of diode segments responsive to incident

electromagnetic radiation on said device, each diode segment connected in series through an avalanche quenching resistor to said reader, enabling charge values generated within cells of a selected row of said matrix to be read, each diode segment being connected to a drive voltage sufficient to operate each diode segment in avalanche multiplication Geiger mode, and each of said diode segments within a cell being separated from one another with a plasma deposited dielectric material.

2. The device according to claim 1 wherein said dielectric material is deposited after a plasma treatment of said deposited diode segments.

3. The device according to claim 1 wherein said charge values are either analog charge values or digitally encoded charge values.

4. A time-of-flight, TOF, imaging device comprising:

an electromagnetic radiation source arranged to emit at least one pulse of radiation;

a readout circuit formed in a substrate using a CMOS fabrication process, the readout circuit comprising: a scan driver providing a plurality of scan line signals to a matrix area of said substrate to select respective rows of said matrix, said matrix having a plurality of N rows divided into a plurality of M columns of cells; and

a reader reading a plurality of M TOF values from respective columns of said matrix, each corresponding to a cell within a selected row of said matrix;

for each cell, a memory element for storing said TOF value for a cell;

a driver for providing a drive voltage to each cell of said matrix; and

row driver circuitry operatively connected to each cell so as to start said memory element accumulating said TOF value; and

a detector comprising a plurality of thin film layers extending over at least a portion of the matrix area of said readout circuit, at least one of said layers formed with a PE-CVD process involving processing temperatures not exceeding about 400°C, the detector comprising: for each cell of said matrix, a plurality of diode segments responsive to reflected

electromagnetic radiation emitted by said radiation source and incident on said device from a field of view of said device, each diode segment connected in series through an avalanche quenching resistor to said memory element in the same cell so as to stop said memory element accumulating a TOF value in response to reflected electromagnetic radiation emitted by said radiation source incident on said diode segments, each diode segment being connected to a drive voltage sufficient to operate each diode segment in avalanche multiplication Geiger mode, and each of said diode segments within a cell being separated from one another with a plasma deposited dielectric material.

5. The TOF imaging device according to claim 4 wherein said memory element comprises a charge storage element and wherein said TOF value is a variable charge value.

6. The TOF imaging device according to claim 4 wherein said memory element comprises a digital counter and wherein each diode segment is connected to said memory element in the same cell so as to stop said counter in response to reflected electromagnetic radiation emitted by said radiation source incident on said diode segments.

7. The TOF imaging device according to claim 5 wherein each cell is arranged to be selectively driven in a first TOF imaging mode and a second imaging mode in which each diode segment directly generates said charge values within said cells.

8. The TOF imaging device according to claim 4 wherein said pulse of radiation is a part of either a frequency or an amplitude modulated signal.

9. The device according to either claim 1 or claim 4 comprising a metal layer providing a first set of connections from said readout circuit to respective cells of said matrix; and wherein each diode segment comprises:

a first doped layer of a first semiconductor type formed on said metal layer;

a mixed phase intrinsic semiconductor layer composed of alternate regions of amorphous semiconductor and crystal semiconductor formed on said first doped layer;

a second layer of semiconductor material formed on said mixed phase semiconductor layer; each of said diode segments within a cell being separated from one another with a dielectric material; and

at least one conductive transparent layer formed on said second layer and providing a second set of connections from said readout circuit to respective cells of said matrix.

10. The device according to claim 9 wherein said second layer of semiconductor material comprises either: an oppositely doped layer to said first layer; an oppositely doped layer to said first layer and a layer of Silicon Carbide; or a layer of Silicon Carbide.

11. The device according to claim 9 wherein said intrinsic semiconductor comprises either: Silicon; Silicon Germanium; or Germanium.

12. The device according to claim 9 further comprising a metal layer interposed between the transparent layer and the second layer.

13. The device according to claim 9 wherein said dielectric material is deposited after a plasma treatment of said deposited diode segments.