WO2020141286A1

WO2020141286A1 - Method for collectively bending a set of electronic chips

Info

Publication number: WO2020141286A1
Application number: PCT/FR2020/050005
Authority: WO
Inventors: Bertrand Chambion; Jean-Philippe Colonna
Original assignee: Commissariat A L'Énergie Atomique Et Aux Energies Alternatives
Priority date: 2019-01-04
Filing date: 2020-01-03
Publication date: 2020-07-09
Also published as: FR3091621B1; FR3091621A1

Abstract

This method comprising the steps: a) providing the set of electronic chips (P), comprising: - a stack comprising: a first layer (1), having opposing first and second surfaces (10, 11), a set of pixel matrices (2) formed on the first surface (10); the stack having a first thickness and a first CTE; - a material (4) having a second thickness, a second CTE strictly greater than the first CTE, and a shaping temperature, the material (4) being shaped on the stack so as to match the contour of the pixel matrices (2); b) cutting the electronic chips (P); the shaping temperature, the ratio between the first and second CTEs and the ratio between the first and second thicknesses being adapted so that, when step b) is completed, the stack is curved, adopting a predetermined concave shape, oriented toward the material (4), at a given working temperature of the electronic chip (P).

Description

METHOD OF COLLECTIVELY BENDING AN ASSEMBLY OF

ELECTRONIC CHIPS

Technical area

The invention relates to the technical field of collective bending of electronic chips. By "collective" is meant curvature at the scale of the wafer on which the electronic chips are formed, or else a simultaneous curvature of a set of individualized electronic chips.

The invention finds its application in particular in the manufacture of curved image sensors, or curved displays, which can be integrated into an optical system (eg a photographic objective) in order to increase the compactness of the optical system, or improve optical performance (eg compensate for field curvature, astigmatism).

State of the art

A method of collective bending of electronic chips known from the state of the art, in particular from document US 2006/0038183 A1 (hereinafter Dl), includes a step consisting in arranging flexor units. to curve electronic chips.

In particular, Dl discloses (fig. 5, §0035-36) deflection units arranged under the substrate comprising the electronic chips to be curved, each unit comprising:

- a central element, formed under the substrate;

- spacers, extending on either side of the central element, and formed under the substrate;

- a plate ("flat"), connecting the central element to the spacers.

The spacers and the central element have different coefficients of thermal expansion so that by applying heat treatment, it is possible to bend the substrate, and thereby the electronic chips.

Furthermore, Dl discloses (fig. 8, §0039) deflection units arranged under the substrate comprising the electronic chips to be curved, each unit comprising:

- a first material, formed under the substrate;

- a second material, formed under the first material.

The first and second materials have different coefficients of thermal expansion so that by applying heat treatment, it is possible to bend the substrate, and thereby the electronic chips. Such a state-of-the-art method is not entirely satisfactory insofar as the deflection units complicate the implementation of the method. Indeed, it is necessary to provide several additional structural elements (spacers, plates) and to perfectly master the heat treatment applied to the deflection units since the curvature is carried out before the individualization of the electronic chips.

In addition, DI discloses (fig. 11, §0042) deflection units arranged above the substrate, overhanging the individualized electronic chips to be curved, each unit comprising:

- standoffs formed on the substrate, extending between the electronic chips;

- a transparent plate, connecting the spacers, and overhanging the electronic chips.

The transparent plate has a coefficient of thermal expansion greater than that of the substrate so as to curve the substrate in a concave shape, oriented in front of the electronic chips, after cooling of the transparent plate (formed at high temperature).

This embodiment of DI is not entirely satisfactory because it is not operational for curvature at the scale of the wafer (“wafer” in English) on which the electronic chips and the units are formed. of bending affect the light flux entering or leaving the pixel arrays of electronic chips.

Statement of the invention

The invention aims to remedy all or part of the aforementioned drawbacks. To this end, the invention relates to a method of collective bending of a set of electronic chips, comprising the steps:

a) provide the set of electronic chips, comprising:

- a stack comprising:

a first layer, comprising first and second opposite surfaces, a set of pixel arrays, formed at the first surface of the first layer; the stack having a first thickness and a first coefficient of thermal expansion;

- A material, having a second thickness, a second coefficient of thermal expansion strictly greater than the first coefficient of thermal expansion, and a formation temperature, the material being formed on the stack so as to follow the outline of the pixel arrays; b) cutting the electronic chips so as to release the thermomechanical stresses undergone by the stack; the formation temperature, the ratio between the first and second coefficients of thermal expansion and the ratio between the first and second thicknesses being adapted so that at the end of step b), the stack is curved in a shape predetermined concave, oriented towards the material, at a given operating temperature of the electronic chips.

Thus, such a method according to the invention makes it possible to perform the curvature during the individualization of the electronic chips, that is to say during the cutting of step b), which releases the thermomechanical constraints undergone by stacking. This is made possible by the material formed integrally with the stack.

In addition, such a method according to the invention requires only the formation of the material on the stack, and therefore no additional structural elements such as plates connecting spacers.

Definitions

- By "electronic chip" ("die" or "chip" in English) means a part of a substrate having undergone technological stages in order to form an electronic component intended to be mounted on an electronic card or in a housing.

- By "substrate" is meant a self-supporting physical support, which may for example be a wafer ("wafer" in English) cut from a monocrystalline ingot of semiconductor material.

- By "pixels", we mean:

photosensitive cells (also called photosites) in the case of an image sensor microchip,

light emitting (or emitting) cells in the case of a display chip.

- By "matching the contour", it is meant that the material formed on the stack follows at a distance - by alignment - the contour of the pixel arrays so as not to obstruct the light flux entering or leaving the pixel arrays.

- By "predetermined" means the concave shape desired for the intended application.

The method according to the invention may include one or more of the following characteristics. According to a characteristic of the invention, step a) is carried out so that:

- the stack includes:

a set of matrices of focusing lenses, formed on the second surface of the first layer,

an interconnection layer formed on the pixel arrays;

- The material is formed on the second surface of the first layer, following the contour of the matrices of focusing lenses, so as to match the contour of the matrixes of pixels.

By "interconnection layer" is meant a stack of interconnection levels comprising metallic tracks embedded in a dielectric material.

Thus, an advantage obtained is to obtain an image sensor of the BSI (“Bach Side Illuminated” in English) type where the incident light penetrates by the opposite side of the stack where the interconnection layer is arranged, this which prevents energy loss, and thereby increases the sensitivity of the image sensor.

According to a characteristic of the invention, step a) is carried out so that a temporary substrate is assembled to the interconnection layer;

and step b) is preceded by the steps of:

- Assemble the set of electronic chips to a support substrate, via the material, so that the matrices of focusing lenses are facing the support substrate; then

- remove the temporary substrate.

According to a characteristic of the invention, step b) is preceded by a step consisting in forming solder balls on the interconnection layer after the temporary substrate has been removed.

Thus, an advantage provided is to be able to establish an electrical connection with an electronic card (or with a box). According to a characteristic of the invention, step a) comprises the steps:

ai) providing a first substrate, comprising first and second opposite surfaces;

Άi) forming the set of pixel matrices on the first surface of the first substrate; a ₃ ) forming the interconnection layer on the pixel arrays;

a4) assemble the temporary substrate to the interconnection layer;

as) thin the first substrate until the first layer is obtained; ¾) forming the set of focusing lens arrays at the second surface of the first layer;

ai) forming the material on the second surface of the first layer, following the contour of the matrices of focusing lenses, so as to match the contour of the matrixes of pixels.

Thus, an advantage provided by the thinning of the first substrate is to favor the curvature of the electronic chips during step b).

According to a characteristic of the invention, step a) is carried out so that:

- the stack includes:

an interconnection layer, formed on the pixel arrays,

a set of focusing lens arrays formed on the interconnection layer;

- the material is formed on the interconnection layer, following the contour of the matrices of focusing lenses, so as to follow the contour of the matrixes of pixels.

Thus, an advantage obtained is to obtain an image sensor of the FSI (Front Side Illuminated) type where the incident light penetrates through the side of the stack where the interconnection layer is arranged.

According to a characteristic of the invention, step a) is carried out so that a temporary substrate is assembled to the material and to the matrices of focusing lenses;

and step b) is preceded by the steps of:

- Assemble the set of electronic chips to a support substrate, via the second surface of the first layer; then

- remove the temporary substrate.

According to a characteristic of the invention, step a) comprises the steps:

a'i) providing a first substrate, comprising first and second opposite surfaces; a ' ₂ ) forming the set of pixel matrices on the first surface of the first substrate; a ' ₃ ) forming the interconnection layer on the pixel arrays;

a ' ₄ ) forming the set of focusing lens arrays on the interconnection layer;

a ' ₅ ) forming the material on the interconnection layer, following the contour of the focusing lens arrays, so as to follow the contour of the pixel arrays; a¾ assembling the temporary substrate to the material and to the matrices of focusing lenses;

a ' ₇ ) thin the first substrate until the first layer is obtained.

According to a characteristic of the invention, step a) comprises the steps:

a ”1) providing a first substrate, comprising first and second opposite surfaces; a'h) forming the set of pixel arrays at the first surface of the first substrate; at." ₃ ) forming the interconnection layer on the pixel arrays;

a’h) forming the set of focusing lens arrays on the interconnection layer;

a ”5) forming the material on the interconnection layer, following the outline of the focusing lens arrays, so as to follow the outline of the pixel arrays; a ” ₆ ) assembling a support substrate to the material so that the matrices of focusing lenses are facing the support substrate;

a’7) thin the first substrate until the first layer is obtained.

Thus, an advantage obtained is to be freed from a temporary substrate. The thinning of the first substrate makes it possible to favor the curvature of the electronic chips during step b). Furthermore, such steps make it possible to obtain an image sensor of the FSI (Front Side Illuminated) type where the incident light penetrates through the stacking side where the interconnection layer is arranged.

According to a characteristic of the invention, step a) is carried out so that the material is a thermosetting polymer, preferably chosen from an epoxy resin and a polysiloxane resin.

Thus, an advantage provided is being able to mold the material so as to follow the outline of the pixel arrays.

According to a characteristic of the invention, the thermosetting polymer has a formation temperature strictly higher than the given operating temperature.

The subject of the invention is also a method of collective bending of a set of electronic chips, comprising the steps: ao) providing the set of electronic chips, previously cut out, and each comprising a stack comprising:

- a first substrate, thinned, comprising first and second opposite surfaces;

- a matrix of pixels, formed on the first surface of the first substrate; the stack having a first thickness and a first coefficient of thermal expansion;

bo) provide an injection mold for a material, the material being a thermosetting polymer having a second coefficient of thermal expansion strictly greater than the first coefficient of thermal expansion and a formation temperature, the injection mold comprising:

- a first part, adapted to receive all of the cut electronic chips;

- a second part, comprising imprints arranged to form the material on the stack according to a second thickness, and so as to match the outline of the pixel matrix;

co) arranging the first substrate of each electronic chip on the first part of the injection mold; close the injection mold by placing the second part of the injection mold on the first part of the injection mold; then inject the material into the injection mold;

do) apply a heat treatment to the material formation temperature, the ratio between the first and second coefficients of thermal expansion, the ratio between the first and second thicknesses, and the formation temperature being adapted so that at the end from step do), the stack of each electronic chip is curved according to a predetermined concave shape, oriented towards the material, at a given operating temperature of the corresponding electronic chip.

Thus, such a method according to the invention makes it possible to carry out the curvature from individual electronic chips, which are gathered in the injection mold provided during step bo). The curvature arises from the thermomechanical stresses released after the material has cooled after step do), i.e. when the material is brought to the operating temperature of the electronic chip. Such a method according to the invention requires only the integral formation of the material with the stack, and therefore no additional structural elements such as plates connecting spacers as in the prior art.

According to a characteristic of the invention, step ao) is executed so that the stacking of each electronic chip comprises: - an array of focusing lenses, formed on the second surface of the first substrate;

- an interconnection layer, formed on the pixel matrix;

and step bo) is executed so that the imprints are arranged to form the material on the second surface of the first substrate, around the matrix of focusing lenses, so as to follow the outline of the matrix of pixels.

According to a characteristic of the invention, step ao) is executed so that the stacking of each electronic chip comprises:

- an interconnection layer, formed on the pixel matrix;

- a matrix of focusing lenses, formed on the interconnection layer;

and step bb) is performed so that the imprints are arranged to form the material on the interconnection layer, around the focusing lens array, so as to match the outline of the pixel array.

According to a characteristic of the invention, step bo) is executed so that the first part of the injection mold comprises:

- a first zone, intended to receive the set of electronic chips;

- a second zone, extending around the first zone, and provided with contact pads intended to be electrically connected to the corresponding pixel matrix.

Thus, the fact of moving the contact pads relative to the electronic chips makes it possible to be able to anticipate their deformation when the electronic chips are curved, for example by forming them on a non-planar surface.

According to a characteristic of the invention, the second zone is curved according to a suitable convex shape so that the contact pads are coplanar at the end of step do) in a horizontal plane.

Thus, an advantage provided is to facilitate an electrical connection of the electronic chip with an electronic card (or with a housing), for example by billing on the pads. contact, by compensating for the curvature of the contact pads caused by the curvature of the electronic chips.

According to a characteristic of the invention, step bo) comprises a step consisting in resting the second zone on pedestals, arranged so that the base of the pedestals and the ends of the second curved zone are coplanar in a horizontal plane with the outcome of step do).

Thus, an advantage provided is to improve the mechanical strength of the injection mold during the formation of the material. In addition, the pedestals can provide the coding function to facilitate the alignment of the electronic chip with the optical axis of an optical system (e.g. a photographic lens) during their integration.

According to a characteristic of the invention, step bo) is executed so that the first zone has a surface topology in the shape of a hollow rectangular parallelepiped.

Thus, an advantage provided by such a surface topology is to be able to control or modify the curvature of the electronic chips by a non-constant thickness of the first zone.

According to a characteristic of the invention, the first and second coefficients of thermal expansion are chosen so that:

- a ₁ is the coefficient of thermal expansion of the stack,

- a ₂ is the coefficient of thermal expansion of the material.

Thus, an advantage provided is to allow high radii of curvature for the concave shape, and thereby for electronic chips. The radius of curvature can be calculated as a function of a ₁ and a ₂ by Stoney's formula.

According to a characteristic of the invention, the material has a Young's modulus greater than 100 MPa, preferably greater than 1 GPa, more preferably greater than 3 GPa.

Thus, an advantage obtained is to obtain a satisfactory rigidity of the material allowing the desired curvature of the stack during step b) or during step do).

According to a characteristic of the invention, the material is provided with interconnection holes. By "interconnection hole"("via" in English) means a metallized hole for establishing an electrical connection. In the case where the material is a thermosetting polymer, the interconnection hole is of the TMV (“Through Mold Via”) type.

Thus, an advantage provided is being able to establish an electrical connection between the interconnection layer and an electronic card (or a housing) by billing or wiring, when the material is formed on the interconnection layer.

The invention finally relates to an electronic chip, comprising a stack comprising:

- a first layer, comprising first and second opposite surfaces;

- a matrix of pixels, formed on the first surface of the first layer; the stack having a first thickness and a first coefficient of thermal expansion;

the electronic chip being remarkable in that it comprises a material formed on the stack according to a second thickness, and so as to match the outline of the pixel matrix, the material having a second coefficient of thermal expansion strictly greater than the first coefficient thermal expansion;

and in that the stack is curved in a predetermined concave shape, oriented towards the material.

According to a characteristic of the invention, the stack comprises:

- an array of focusing lenses, formed on the second surface of the first layer;

- an interconnection layer, formed on the pixel matrix;

and the material is formed on the second surface of the first layer, around the matrix of focusing lenses, so as to follow the outline of the matrix of pixels.

Thus, an advantage obtained is to obtain an image sensor of the BSI (“Back Side Illuminated”) type where the incident light penetrates by the opposite side of the stack where the interconnection layer is arranged, this which prevents energy loss, and thereby increases the sensitivity of the image sensor.

According to a characteristic of the invention, the stack comprises:

- an interconnection layer, formed on the pixel matrix;

- an array of focusing lenses, formed on the interconnection layer; and the material is formed on the interconnection layer, around the matrix of focusing lenses, so as to follow the outline of the matrix of pixels.

Brief description of the drawings

Other characteristics and advantages will appear in the detailed description of different embodiments of the invention, the presentation being accompanied by examples and references to the attached drawings.

Figures la to 1j are schematic sectional views illustrating a first mode of implementation of a method according to the invention.

Figures 2a to 2g are schematic sectional views illustrating a second embodiment of a method according to the invention.

Figures 3a to 3f are schematic sectional views illustrating a third embodiment of a method according to the invention.

Figures 4a to 4f are schematic sectional views illustrating a fourth embodiment of a method according to the invention.

Figure 5 is a schematic perspective view (from the rear) of a portion of the injection mold illustrating the presence of pedestals.

Figure 6 is a schematic side view of the portion of the injection mold illustrated in Figure 5, turned over, in the functional position.

Figure 7 is a schematic perspective view illustrating a shape for the receiving area of the electronic chip on the first part of the injection mold.

Figure 8 is a schematic view illustrating the integration of an electronic chip according to the invention in an optical system.

It should be noted that the drawings described above are schematic and are not to scale for the sake of readability and to simplify their understanding.

Detailed description of the embodiments

Identical elements or ensuring the same function will have the same references for the different embodiments, for the sake of simplification. Curvature at the scale of the slice

An object of the invention is a method of collective curvature of a set of electronic chips P, comprising the steps:

a) provide for the set of electronic chips P, comprising:

- a stack comprising:

a first layer 1, comprising first and second opposite surfaces 10, 11,

a set of pixel arrays 2, formed at the first surface 10 of the first layer 1; the stack having a first thickness and a first coefficient of thermal expansion;

- a material 4, having a second thickness, a second coefficient of thermal expansion strictly greater than the first coefficient of thermal expansion, and a forming temperature, the material 4 being formed on the stack so as to match the outline of the pixel arrays 2;

b) cutting the electronic chips P so as to release the thermomechanical stresses undergone by the stack; the formation temperature, the ratio between the first and second coefficients of thermal expansion and the ratio between the first and second thicknesses being adapted so that at the end of step b), the stack is curved in a shape predetermined concave, oriented towards the material 4, at a given operating temperature of the electronic chips (P).

First layer

The first layer 1 is advantageously obtained from a first substrate 1 ′ thinned to promote the curvature of the electronic chips P. The first layer 1 advantageously has a thickness less than 500 gm, preferably less than 100 gm, more preferably less at 50 mm. Such a thickness range makes it possible to favor the curvature during step b). The first layer 1 is advantageously made of a semiconductor material, preferably silicon.

BSI image sensor

Step a) can be performed so that:

- the stack includes:

a set of matrices of focusing lenses 3, formed on the second surface 11 of the first layer 1,

an interconnection layer 5, formed on the pixel arrays 2; the material 4 is formed on the second surface 11 of the first layer 1, following the contour of the matrices of focusing lenses 3, so as to follow the contour of the matrices of pixels 2.

Thus, when the electronic chip P is an image sensor of BSI (“Bach Side Illuminated” in English) type, the incident light penetrates through the opposite side of the stack where the interconnection layer 5 is arranged, this which prevents energy loss, and thereby increases the sensitivity of the image sensor.

It should be noted that the matrices of focusing lenses 3 are optional for certain types of sensors, in particular for cooled infrared sensors.

FSI image sensor

Step a) can be performed so that:

- the stack includes:

an interconnection layer 5, formed on the pixel arrays 2,

a set of focusing lens arrays 3, formed on the interconnection layer 5;

- the material 4 is formed on the interconnection layer 5, following the contour of the matrices of focusing lenses 3, so as to match the contour of the matrixes of pixels

2.

Thus, when the electronic chip P is an image sensor of FSI (“Front Side Illuminated”) type, the incident light penetrates through the side of the stack where the interconnection layer 5 is arranged.

Interconnection layer

The interconnection layer 5 is a stack of interconnection levels comprising metallic tracks embedded in a dielectric material. By way of nonlimiting examples, the metal tracks can be made of copper or aluminum, and the dielectric material can be organic (a polymer such as a polyimide, or ALX sold by the company ASAHI GLASS) or inorganic (SiCh, SiN ...). The interconnection layer 5 can be a redistribution layer (RDL for “ReDistnbution Loyer”) of the electrical connections within an interposer. Pixel arrays

The pixels 2 can be photosensitive cells (also called photosites) in the case of an electronic chip P of an image sensor.

The pixels 2 can be light emitting cells (or emitting cells) in the case of an electronic chip P of a display.

When the electronic chip P is an image sensor, the pixel arrays 2 are advantageously provided with photodiodes (not shown). The pixel arrays 2 are advantageously provided with CMOS type circuits (“Complementary Metal Oxide Semiconductor” in English) configured to process the electrical signal generated by the photodiodes (signal amplification, pixel selection, etc.).

When the electronic chip P is a display, the pixel arrays 2 are advantageously provided with light-emitting diodes (not shown). The pixel arrays 2 are advantageously provided with CMOS type circuits configured to control the light-emitting diodes.

The pixel arrays 2 are advantageously provided with colored filters (not shown). When the electronic chip P is an image sensor, the color filters are advantageously arranged in a Bayer matrix. The color filters are interposed between the pixel arrays 2 and the focusing lens arrays 3.

Focusing lens arrays

In the case of an electronic chip P of an image sensor comprising arrays of focusing lenses 3, the focusing lenses 3 are convergent so as to concentrate the incident light towards the pixel arrays 2. Each focusing lens 3 is associated with a pixel. The focusing lenses 3 are preferably microlenses.

Material

The material 4 is mechanically secured to the stack. When the electronic chip P is a BSI image sensor, the material 4 is mechanically secured to the second surface 11 of the first layer 1. When the electronic chip P is an FSI image sensor, the material 4 is mechanically secured to the interconnection layer 5. For this purpose, the material 4 is chosen so as to have a satisfactory adhesion energy in order to obtain the curvature and to prevent its separation from the stack at the given operating temperature of the electronic chips P . The first and second coefficients of thermal expansion are advantageously chosen so that:

It is possible to measure the thermal expansion coefficient of the stack by a technique known to those skilled in the art, as described in chapter 2 of the document "ASM Ready Reference: Thermal Properties of Metals", ASM International, 2002, or also in the document B. Cassel et al., “Coejfiàent of Thermal Expansion Measurement using the TMA 4000”, PerkinElmer, Inc., 2013.

As a first approximation, the coefficient of thermal expansion of the stack is substantially equal to the coefficient of thermal expansion of the first layer 1 insofar as the thickness of the first layer 1 is predominant in the stack. When the first layer 1 is made of silicon, a ₁ is of the order of

, We will therefore choose the material 4 with a ₂ such that

preferentially

⁴ . The radius of curvature obtained at the end of step b) can be calculated as a function of a ₁ and a2 using the Stoney formula, known to those skilled in the art.

The material 4 advantageously has a Young's modulus greater than 100 MPa, preferably greater than 1 GPa, more preferably greater than 3 GPa.

The material 4 advantageously has a second thickness of between 120 μm and 600 mm. The material 4 can be single-layer or multi-layer. As a first approximation, the ratio between the first thickness (of the stack) and the second thickness (of material 4) which influences the curvature of the concave shape can be considered as governed by the ratio between the thickness of the first layer 1 and the second thickness insofar as the thickness of the first layer 1 is predominant in the stack. A second thickness of the material 4 will preferably be chosen of the order of 2.5 times greater than the thickness of the first layer 1 when the first layer 1 is made of silicon in order to optimize the curvature of the concave shape according to the intended application.

Step a) can be carried out so that the material 4 is a thermosetting polymer, preferably chosen from an epoxy resin and a polysiloxane resin. Where appropriate, the second coefficient of thermal expansion is the coefficient of thermal expansion of the cured polymer. By way of nonlimiting examples, the thermosetting polymer can be: - an epoxy resin, with a Young's modulus of the order of 9 GPa, has ₂ between 3.1

,, and a crosslinking temperature of the order of 71 ° C;

- a polysiloxane resin, with a Young's modulus of the order of 3.3 GPa, has ₂ between 2

, and a crosslinking temperature of the order of 180 ° C.

The thermosetting polymer has a formation temperature (e.g. crosslinking temperature) strictly higher than the given operating temperature of the electronic chips P.

The material 4 can be provided with interconnection holes 40. The material 4 is preferably a dielectric material.

Cutout of step b)

As non-limiting examples, step b) can be carried out using a precision circular saw, with a blade with a metallic core or with a diamond resinoid core.

The electronic chips P individualized after step b) are intended to be connected to an electronic card C by billing or wiring, as illustrated in FIGS. 1j, 2g, 3e, 3f and 8.

Pre-determined concave shape

The predetermined concave shape can have a constant or variable radius of curvature (of the same sign). The predetermined concave shape can be aspherical. The radius of curvature (constant or variable) is predetermined depending on the intended application.

Bending at the scale of the slice, mode n ° 1: application to the BSI image sensor

This mode of implementation is illustrated in Figures la to 1d.

Step a) can be carried out so that a temporary substrate 6 is assembled to the interconnection layer 5 (illustrated in FIG. Le). Step b) is advantageously preceded by the steps of:

- Assemble the set of electronic chips P to a support substrate 7, via the material 4, so that the matrices of focusing lenses 3 are facing the support substrate 7 (illustrated in Figure lg); then

- remove the temporary substrate 6 (illustrated in Figure lg).

The temporary substrate 6 can be a wafer of silicon or glass. The temporary substrate 6 can be assembled to the interconnection layer 5 using a temporary adhesive. Step b) is advantageously preceded by a step consisting in forming solder balls BS on the interconnection layer 5 after the removal of the temporary substrate 6 (illustrated in FIG. 1h).

The support substrate 7 can be an adhesive film, arranged on the side of the material 4, and sucked in by a vacuum holding plate of a wafer ("vacuum chuck" in English).

Step a) advantageously comprises the steps:

ai) providing a first substrate 1 ’, comprising first and second opposite surfaces 10, 11;

a ₂ ) forming the set of pixel arrays 2 at the first surface 10 of the first substrate 1 '; (illustrated in figure la)

a ₃ ) forming the interconnection layer 5 on the pixel arrays 2; (illustrated in figure lb)

a ₄ ) assembling the temporary substrate 6 to the interconnection layer 5; (illustrated in figure le)

as) thin the first substrate 1 ′ until the first layer 1 is obtained, preferably by chemical mechanical polishing; (illustrated in figure ld)

a ₆ ) forming the set of focusing lens arrays 3 at the second surface 11 of the first layer 1; (illustrated in Figure 1 e)

a ₇ ) forming the material 4 at the second surface 11 of the first layer 1, following the contour of the matrices of focusing lenses 3, so as to follow the contour of the matrices of pixels 2 (illustrated in FIG. 1f).

The use of the temporary substrate 6 allows the first substrate 1 to be thinned in order to ensure the mechanical strength of the stack.

Step a ₇ ) can be carried out by photolithography. Step a ₇ ) is advantageously carried out by molding, using an injection mold (not illustrated in FIG. 1f), so as to obtain better control of the thickness and of the shape of the material 4 The injection mold includes:

- a first part, adapted to receive the stack;

a second part, comprising imprints arranged to form the material 4 at the second surface 11 of the first layer 1, following the contour of the matrices of focusing lenses 3, so as to follow the contour of the matrices of pixels 2.

The first part of the injection mold advantageously includes pedestals arranged to perform the polarizing function, which makes it easier to align the electronic chips P with the optical axis of an optical system (eg a photographic objective) during their integration. Curvature at the slice scale, mode n ° 2: application to the FSI image sensor

This mode of implementation is illustrated in Figures 2a to 2g.

Step a) can be carried out so that a temporary substrate 6 is assembled to the material 4 and to the arrays of focusing lenses 3 (illustrated in FIG. 2d). Step b) is advantageously preceded by the steps of:

- Assemble the set of electronic chips P to a support substrate 7, via the second surface 11 of the first layer 1; (illustrated in Figure 2e) then

- remove the temporary substrate 6 (illustrated in Figure 2e).

The support substrate 7 may be an adhesive film, arranged on the side of the second surface 11 of the first layer 1, and sucked in by a plate for maintaining the vacuum of a wafer ("vacuum chuck" in English).

Step a) advantageously comprises the steps:

a’i) providing a first substrate 1 ’, comprising first and second opposite surfaces 10, 11;

a’2) form the set of pixel arrays 2 at the first surface 10 of the first substrate

1 ’; (illustrated in figure 2a)

a’3) forming the interconnection layer 5 on the pixel arrays 2; (illustrated in figure 2a)

a’4) forming the set of focusing lens arrays 3 on the interconnection layer 5; (illustrated in Figure 2b)

a’5) form the material 4 on the interconnection layer 5, following the outline of the focusing lens arrays 3, so as to match the outline of the pixel arrays

2; (illustrated in Figure 2c)

a7) assembling the temporary substrate 6 to the material 4 and to the matrices of focusing lenses 3; (illustrated in Figure 2d)

a ' ₇ ) thin the first substrate (1') until the first layer (1) is obtained, preferably by chemical mechanical polishing (illustrated in Figure 2d).

Before step a ' ₅ ), step a) may include a step consisting in forming interconnection holes 40 between the matrices of focusing lenses 3. To do this, metal pillars 40, preferably made of aluminum or made of copper, are formed on the interconnection layer 5, between the matrices of focusing lenses 3. More specifically, by way of example, a metallic germination layer (“seed rent” in English) can be deposited on the interconnection layer 5, allowing full plate electrical contact for the future electrochemical growth of the metal pillars 40. The germination layer may have a thickness of the order of 300 nm. Then, a photolithography resin can be deposited on the germination layer, then exposed to ultraviolet radiation through a mask so as to form patterns delimiting the future metal pillars 40. The thickness of the photolithography resin is chosen so to be equal to the height of the future metal pillars 40. The germination layer is then polarized in a dedicated bath allowing the electrochemical growth of the metal pillars 40. Finally, the photolithography resin is removed and the part of the germination layer s extending under the photolithography resin during electrochemical growth is etched. Step a's) can then be carried out by molding the material 4 around the metal pillars 40 so that the interconnection holes 40 form TMVs. TMVs can have a straight or conical shape. It is possible to form a protective layer of the matrices of focusing lenses 3 before molding the material 4 around the metal pillars 40. The molding of the material 4 can be followed by a step of flattening the material 4.

Due to the surface topology, step a /) is carried out by a particular technique, such as the CONDOx method known to a person skilled in the art, in particular described in document US 2017/0062278. The temporary substrate 6 may comprise a resin curable by ultraviolet rays (eg the ResiFlat resin sold by DISCO Corporation or the Temploc resin sold by DENKA), assembled with the material 4 and the matrices of focusing lenses 3 by means of a film. protective. Indeed, the material 4 and the matrices of focusing lenses 3 are previously covered with a protective film. The resin is assembled to the protective film using a support ensuring the mechanical strength of the resin, the support being able to be made of glass or polyethylene terephthalate (PET). The temporary substrate 6 can be removed later by first removing the resin and the support, then secondly removing the protective film by a suitable treatment, for example by ultraviolet radiation or by a chemical agent.

Bending at the edge of the slice, mode n ° 3: application to the FSI image sensor

This mode of implementation is illustrated in Figures 3a to 3f.

Step a) can include the steps:

a ”i) providing a first substrate 1 ′, comprising first and second opposite surfaces 10, 11; at." 2) forming the set of pixel arrays 2 at the first surface 10 of the first substrate 1 ';

a ”3) form the interconnection layer 5 on the pixel arrays 2;

a’h) forming the set of focusing lens arrays 3 on the interconnection layer 5; (illustrated in Figure 3c)

a ”5) forming the material 4 on the interconnection layer 5, following the outline of the focusing lens arrays 3, so as to match the outline of the pixel arrays 2; (illustrated in figure 3d)

a ” ₆ ) assembling a support substrate 7 to the material 4 so that the matrices of focusing lenses 3 are facing the support substrate 7; (illustrated in figure 3d)

a’7) thin the first substrate 1 ’until the first layer 1 is obtained, preferably by chemical mechanical polishing (illustrated in FIG. 3d).

As illustrated in FIG. 3b, before step a ”s), step a) may include a step consisting in forming interconnection holes 40 between the matrices of focusing lenses 3. To do this, metal pillars 40, preferably made of aluminum or copper, are formed on the interconnection layer 5, between the matrices of focusing lenses 3. More specifically, by way of example, a layer of metallic germination ("seed rent" in language ) can be deposited on the interconnection layer 5, allowing full plate electrical contact for the future electrochemical growth of the metal pillars 40. The germination layer can have a thickness of the order of 300 nm. Then, a photolithography resin can be deposited on the germination layer, then exposed to ultraviolet radiation through a mask so as to form patterns delimiting the future metal pillars 40. The thickness of the photolithography resin is chosen so to be equal to the height of the future metal pillars 40. The germination layer is then polarized in a dedicated bath allowing the electrochemical growth of the metal pillars 40. Finally, the photolithography resin is removed and the part of the germination layer s extending under the photolithography resin during electrochemical growth is etched. Step a ”s) can then be carried out by molding the material 4 around the metal pillars 40 so that the interconnection holes 40 form TMVs. TMVs can have a straight or conical shape. It is possible to form a protective layer of the matrices of focusing lenses 3 before the molding of the material 4 around the metal pillars 40. The molding of the material 4 can be followed by a step of flattening the material 4.

The support substrate 7 can be an adhesive film, arranged on the side of the material 4, and sucked in by a vacuum holding plate of a wafer (“vacuum chuck” in English). As illustrated in Figures 3e and 3f, the individualized electronic chips P are intended to be connected to an electronic card C by billing or wiring.

Simultaneous bending of a set of electronic chips

individualized

As illustrated in FIGS. 4a to 4f, an object of the invention is a method of collective bending of a set of electronic chips P, comprising the steps:

ao) provide for the set of electronic chips P, previously cut out, and each comprising a stack comprising:

- a first substrate 1 ′, thinned, comprising first and second opposite surfaces 10, 11;

- a matrix of pixels 2, formed on the first surface 10 of the first substrate 1 ’; the stack having a first thickness and a first coefficient of thermal expansion;

bo) provide an injection mold 8 of a material 4, the material 4 being a thermosetting polymer having a second coefficient of thermal expansion strictly greater than the first coefficient of thermal expansion and a formation temperature, the injection mold 8 comprising :

- A first part 80, adapted to receive all of the cut P electronic chips;

- A second part 81, comprising imprints 810 arranged to form the material 4 on the stack according to a second thickness, and so as to match the outline of the pixel matrix 2;

co) arranging the first substrate 1 ′ of each electronic chip P on the first part 80 of the injection mold 8; close the injection mold 8 by placing the second part 81 of the injection mold 8 on the first part 80 of the injection mold 8; then inject the material 4 into the injection mold 8;

do) apply a heat treatment to the formation temperature of the material 4, the ratio between the first and second coefficients of thermal expansion, the ratio between the first and second thicknesses, and the formation temperature being adapted so that the after step do), the stack of each electronic chip P is curved according to a predetermined concave shape, oriented towards the material 4, at a given operating temperature of the corresponding electronic chip P.

The technical characteristics described above for FSI / BSI image sensors, pixel arrays, focusing lens arrays, the interconnection layer, the material 4, the predetermined concave shape also apply for this embodiment.

BSI image sensor

Step ao) can be executed so that the stacking of each electronic chip P comprises:

- an array of focusing lenses 3, formed on the second surface 11 of the first substrate 1 ’;

- an interconnection layer 5, formed on the pixel matrix 2;

Step bo) is executed so that the imprints 810 are arranged to form the material 4 at the second surface 11 of the first substrate 1 ', around the matrix of focusing lenses 3, so as to follow the outline of the matrix of pixels 2.

It should be noted that the matrix of focusing lenses 3 is optional for certain types of sensors, in particular for cooled infrared sensors.

FSI image sensor

- an interconnection layer 5, formed on the pixel matrix 2;

- an array of focusing lenses 3, formed on the interconnection layer 5;

Step bo) is executed so that the imprints 810 are arranged to form the material 4 on the interconnection layer 5, around the focusing lens matrix 3, so as to match the outline of the pixel matrix 2 .

Injection mold

The injection mold 8 is made of a material refractory to the formation temperature (e.g. crosslinking temperature) of the thermosetting polymer. The injection mold 8 is preferably made of silicone.

Stage bo) is advantageously carried out so that the first part 80 of the injection mold 8 comprises:

- a first zone 800, intended to receive all of the electronic chips P;

- A second area 801, extending around the first area 800, and provided with PC contact pads intended to be electrically connected to the corresponding pixel matrix 2. The PC contact pads are made of a metallic material, such as Cu, Al. The PC contact pads are intended to be electrically connected to the pixel matrix 2 via the interconnection layer 5, preferably using '' wiring by F wires.

The second area 801 is advantageously curved in a suitable convex shape so that the contact pads PC are coplanar at the end of step do) in a horizontal plane. Thus, an advantage provided is to facilitate an electrical connection of the electronic chip P with an electronic card C, as shown diagrammatically in FIG. 8, by forming solder balls BS on the contact pads PC (FIG. 4f).

As illustrated in FIGS. 5 and 6, step bo) advantageously comprises a step consisting in resting the second zone 801 on pedestals 82, arranged so that the base of the pedestals 82 and the ends of the second curved zone 801 are coplanar in a horizontal plane at the end of step do). The pedestals 82 can provide the coding function making it possible to facilitate the alignment of the electronic chip P with the optical axis of an optical system A (eg a photographic objective) during their integration using a mount B , as shown in Figure 8.

As illustrated in FIG. 7, step bo) is advantageously carried out so that the first zone 800 has a surface topology in the form of a hollow rectangular parallelepiped.

The invention is not limited to the embodiments set out. A person skilled in the art is able to consider their technically effective combinations, and to substitute equivalents for them.

Claims

1. Method for collective bending of a set of electronic chips (P), comprising the steps:

a) provide the set of electronic chips (P), comprising:

- a stack comprising:

a first layer (1), comprising first and second opposite surfaces (10, 11),

a set of pixel arrays (2), formed on the first surface (10) of the first layer (1); the stack having a first thickness and a first coefficient of thermal expansion;

- a material (4), having a second thickness, a second coefficient of thermal expansion strictly greater than the first coefficient of thermal expansion, and a forming temperature, the material (4) being formed on the stack so as to follow the contour pixel arrays (2);

b) cutting the electronic chips (P) so as to release the thermomechanical stresses undergone by the stack; the formation temperature, the ratio between the first and second coefficients of thermal expansion and the ratio between the first and second thicknesses being adapted so that at the end of step b), the stack is curved in a shape predetermined concave, oriented towards the material (4), at a given operating temperature of the electronic chips (P).

2. Method according to claim 1, in which step a) is carried out so that:

- the stack includes:

a set of matrices of focusing lenses (3), formed on the second surface (11) of the first layer (1),

an interconnection layer (5), formed on the pixel arrays (2);

- the material (4) is formed on the second surface (11) of the first layer (1), following the contour of the matrices of focusing lenses (3), so as to match the contour of the matrixes of pixels (2) .

3. Method according to claim 2, wherein step a) is carried out so that a temporary substrate (6) is assembled to the interconnection layer (5);

and in which step b) is preceded by the steps consisting in: - Assemble the set of electronic chips (P) to a support substrate (7), via the material (4), so that the matrices of focusing lenses (3) are facing the support substrate (7); then

- remove the temporary substrate (6).

4. The method of claim 3, wherein step b) is preceded by a step of forming solder balls (BS) on the interconnection layer (5) after removal of the temporary substrate (6).

5. Method according to claim 3 or 4, in which step a) comprises the steps:

ai) providing a first substrate (1 ’), comprising first and second opposite surfaces (10, 11);

a2) forming the set of pixel arrays (2) at the first surface (10) of the first substrate (1 ’);

a ₃ ) forming the interconnection layer (5) on the pixel arrays (2);

a4) assembling the temporary substrate (6) to the interconnection layer (5);

as) thin the first substrate (1 ’) until the first layer (1) is obtained;

forming the set of focusing lens arrays (3) at the second surface (11) of the first layer (1);

a ₇ ) forming the material (4) on the second surface (11) of the first layer (1), following the contour of the matrices of focusing lenses (3), so as to follow the contour of the matrixes of pixels (2 ).

6. Method according to claim 1, in which step a) is carried out so that:

- the stack includes:

an interconnection layer (5), formed on the pixel arrays (2),

a set of focusing lens arrays (3), formed on the interconnection layer (5);

- the material (4) is formed on the interconnection layer (5), following the contour of the matrices of focusing lenses (3), so as to match the contour of the matrixes of pixels (2) ·

7. The method of claim 6, wherein step a) is performed so that a temporary substrate (6) is assembled to the material (4) and the arrays of focusing lenses (3); and in which step b) is preceded by the steps consisting in:

- Assemble the set of electronic chips (P) to a support substrate (7), via the second surface (11) of the first layer (1); then

- remove the temporary substrate (6).

8. Method according to claim 7, in which step a) comprises the steps:

a’i) providing a first substrate (1 ’), comprising first and second opposite surfaces (10, 11);

a’2) forming the set of pixel arrays (2) at the first surface (10) of the first substrate (1 ’);

a’3) forming the interconnection layer (5) on the pixel arrays (2);

a’4) forming the set of focusing lens arrays (3) on the interconnection layer (5);

a’5) forming the material (4) on the interconnection layer (5), following the outline of the focusing lens arrays (3), so as to match the outline of the pixel arrays (2);

a7) assembling the temporary substrate (6) to the material (4) and to the matrices of focusing lenses (3);

a’7) thin the first substrate (1 ’) until the first layer (1) is obtained.

9. Method according to claim 6, in which step a) comprises the steps:

a ”i) providing a first substrate (1’), comprising first and second opposite surfaces (10, 11);

a ”2) forming the set of pixel arrays (2) on the first surface (10) of the first substrate (1’);

a’3) forming the interconnection layer (5) on the pixel arrays (2);

a ”5) forming the material (4) on the interconnection layer (5), following the outline of the focusing lens arrays (3), so as to match the outline of the pixel arrays (2);

a ” ₆ ) assembling a support substrate (7) to the material (4) so that the focusing lens arrays (3) are facing the support substrate (7);

a ” ₇ ) thin the first substrate (1 ') until the first layer (1) is obtained.

10. Method according to one of claims 1 to 9, in which step a) is carried out so that the material (4) is a thermosetting polymer, preferably chosen from an epoxy resin and a polysiloxane resin.

11. The method of claim 10, wherein the thermosetting polymer has a formation temperature strictly higher than the given operating temperature.

12. Method of collective bending of a set of electronic chips (P), comprising the steps:

ao) provide the set of electronic chips (P), previously cut out, and each comprising a stack comprising:

- a first substrate (1 ’), thinned, comprising first and second opposite surfaces (10, 11);

- a matrix of pixels (2), formed on the first surface (10) of the first substrate (l ’); the stack having a first thickness and a first coefficient of thermal expansion;

bo) providing an injection mold (8) of a material (4), the material (4) being a thermosetting polymer having a second coefficient of thermal expansion strictly greater than the first coefficient of thermal expansion and a formation temperature, the injection mold (8) comprising:

- A first part (80), adapted to receive all of the cut electronic chips (P);

- a second part (81), comprising imprints (810) arranged to form the material (4) on the stack according to a second thickness, and so as to match the outline of the pixel matrix (2);

co) arranging the first substrate (1 ’) of each electronic chip (P) on the first part (80) of the injection mold (8); close the injection mold (8) by placing the second part (81) of the injection mold (8) on the first part (80) of the injection mold (8); then inject the material (4) into the injection mold (8);

do) applying a heat treatment to the formation temperature of the material (4), the ratio between the first and second coefficients of thermal expansion, the ratio between the first and second thicknesses, and the formation temperature being adapted so that after step do), the stack of each electronic chip (P) is curved according to a predetermined concave shape, oriented towards the material (4), at a given operating temperature of the corresponding electronic chip (P).

13. The method as claimed in claim 12, in which step ao) is executed so that the stacking of each electronic chip (P) comprises:

- an array of focusing lenses (3), formed on the second surface (11) of the first substrate (1 ’);

- an interconnection layer (5), formed on the pixel matrix (2);

and in which step bo) is executed so that the impressions (810) are arranged to form the material (4) on the second surface (11) of the first substrate (1 '), around the matrix of focusing lenses (3), so as to match the outline of the pixel matrix (2).

14. The method as claimed in claim 12, in which step ao) is executed so that the stacking of each electronic chip (P) comprises:

- an interconnection layer (5), formed on the pixel matrix (2);

- an array of focusing lenses (3), formed on the interconnection layer (5); and in which step bo) is executed so that the imprints (810) are arranged to form the material (4) on the interconnection layer (5), around the matrix of focusing lenses (3), so as to match the outline of the pixel matrix (2).

15. Method according to one of claims 12 to 14, in which step bo) is executed so that the first part (80) of the injection mold (8) comprises:

- a first zone (800), intended to receive the set of electronic chips (P);

- a second area (801), extending around the first area (800), and provided with contact pads (PC) intended to be electrically connected to the corresponding pixel matrix (2).

16. The method of claim 15, wherein the second area (801) is curved in a convex shape adapted so that the contact pads (PC) are coplanar at the end of step do) in a horizontal plane.

17. The method of claim 16, wherein step bo) comprises a step of resting the second area (801) on pedestals (82), arranged so that the base of the pedestals (82) and the ends of the second curved zone (801) are coplanar in a horizontal plane at the end of step do).

18. Method according to one of claims 15 to 17, in which step bo) is executed so that the first zone (800) has a surface topology in the form of a hollow rectangular parallelepiped.

19. Method according to one of claims 1 to 18, in which the first and second coefficients of thermal expansion are chosen so that:

preferably where:

- a ₁ is the coefficient of thermal expansion of the stack,

- a ₂ is the coefficient of thermal expansion of the material (4).

20. Method according to one of claims 1 to 19, in which the material (4) has a Young's modulus greater than 100 MPa, preferably greater than 1 GPa, more preferably greater than 3 GPa.

21. Method according to one of claims 1 to 20, wherein the material (4) is provided with interconnecting holes (40).

22. Electronic chip (P), comprising a stack comprising:

- a first layer (1), comprising first and second opposite surfaces (10, 11);

- a matrix of pixels (2), formed on the first surface (10) of the first layer (1); the stack having a first thickness and a first coefficient of thermal expansion;

the electronic chip (P) being characterized in that it comprises a material (4) formed on the stack according to a second thickness, and so as to match the outline of the pixel matrix (2), the material (4) having a second coefficient of thermal expansion strictly greater than the first coefficient of thermal expansion;

23. Electronic chip (P) according to claim 22, in which the stack comprises:

- an array of focusing lenses (3), formed on the second surface (11) of the first layer (1); - an interconnection layer (5), formed on the pixel matrix (2);

and in which the material (4) is formed on the second surface (11) of the first layer

(1), around the matrix of focusing lenses (3), so as to match the outline of the matrix of pixels (2).

24. Electronic chip (P) according to claim 22, in which the stack comprises:

- an interconnection layer (5), formed on the pixel matrix (2);

- an array of focusing lenses (3), formed on the interconnection layer (5); and in which the material (4) is formed on the interconnection layer (5), around the matrix of focusing lenses (3), so as to match the outline of the pixel matrix

(2) ·