WO2020137299A1 - Speaker device and signal processing circuit - Google Patents

Speaker device and signal processing circuit Download PDF

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Publication number
WO2020137299A1
WO2020137299A1 PCT/JP2019/045957 JP2019045957W WO2020137299A1 WO 2020137299 A1 WO2020137299 A1 WO 2020137299A1 JP 2019045957 W JP2019045957 W JP 2019045957W WO 2020137299 A1 WO2020137299 A1 WO 2020137299A1
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Prior art keywords
level
speaker device
amplifier
piezoelectric element
clipper
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PCT/JP2019/045957
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French (fr)
Japanese (ja)
Inventor
鈴木　伸和
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ソニー株式会社
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Publication of WO2020137299A1 publication Critical patent/WO2020137299A1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/181—Low-frequency amplifiers, e.g. audio preamplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G9/00—Combinations of two or more types of control, e.g. gain control and tone control
    • H03G9/02—Combinations of two or more types of control, e.g. gain control and tone control in untuned amplifiers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R3/00—Circuits for transducers, loudspeakers or microphones

Definitions

  • the present disclosure relates to a speaker device and a signal processing circuit.
  • Patent Document 1 describes a class D amplifier using a piezo element.
  • the maximum current flowing through the inductor of the class D amplifier is restricted by limiting the slew rate.
  • the present disclosure includes, for example, An amplifier, A protection circuit connected to the input side of the amplifier, With a capacitive load connected to the output side of the amplifier,
  • the protection circuit is A clipper that clips the level of the input signal to a level lower than a predetermined level,
  • a speaker device having a filter unit that removes harmonics included in the output of the clipper.
  • a clipper that clips the level of the input signal to a level lower than a predetermined level
  • a signal processing circuit having a filter unit that removes harmonics included in the output of the clipper.
  • FIG. 1 illustrates an external appearance example of a speaker device to which the signal processing circuit of the present disclosure can be applied.
  • FIG. 2A is a diagram referred to when describing a problem to be considered in the embodiment
  • FIG. 2B is a diagram illustrating a configuration example of a signal processing circuit according to the embodiment.
  • FIG. 3 is a diagram referred to when describing a problem to be considered in the embodiment.
  • FIG. 4 is a diagram referred to when describing a problem to be considered in the embodiment.
  • FIG. 5 is a diagram referred to when describing a configuration example of the DSP according to the embodiment.
  • FIG. 6 is a diagram showing a configuration example of the heat generation protection circuit according to the embodiment.
  • FIG. 1 illustrates an external appearance example of a speaker device to which the signal processing circuit of the present disclosure can be applied.
  • FIG. 2A is a diagram referred to when describing a problem to be considered in the embodiment
  • FIG. 2B is a diagram illustrating a configuration example
  • FIG. 7 is a diagram showing an example of temperature characteristics of the piezoelectric element according to the embodiment.
  • FIG. 8 is a diagram showing an example of an attenuation line set based on the temperature characteristics of the piezoelectric element according to the embodiment.
  • FIG. 9 is a diagram for explaining an example of the effect obtained by the embodiment.
  • FIG. 10 is a diagram referred to when explaining the attack time and the release time.
  • FIG. 11 is a diagram referred to when explaining that the maximum current does not change even when the voltage is clipped.
  • FIG. 12 is a diagram for explaining an example of the effect obtained by the embodiment.
  • FIG. 1 shows an external appearance example of a speaker device (speaker device 1) to which the signal processing circuit of the present disclosure can be applied.
  • the speaker device 1 has a truncated cone shape, a base 2 made of a metal material such as zinc, and a tubular shape.
  • the speaker device 1 includes a light-transmissive member such as an organic glass tube. It has a vibrating part 3 configured.
  • the speaker device 1 is used by placing the base 2 on an appropriate flat surface such as a floor or a desk.
  • the base 2 has a mounting portion 2A that projects to the opposite side from the mounting surface side on which the speaker device 1 is placed and has a hollow inside.
  • the end portion located below the vibrating portion 3 is housed inside the mounting portion 2A, whereby the vibrating portion 3 is supported by the base 2.
  • a dynamic type speaker unit (speaker unit 4) is housed so that the sound emitting direction is the upper side.
  • the sound reproduced from the dynamic type speaker unit 4 is radiated to the outside through the opening 5 provided at an appropriate position of the base 2.
  • a piezoelectric element is attached to one end face of the vibrating portion 3, specifically, the end face on the side housed inside the attaching portion 2A.
  • a drive signal corresponding to an audio signal is supplied to the piezoelectric element, and the piezoelectric element expands and contracts according to the drive signal.
  • the vibrating section 3 vibrates as the piezoelectric element expands and contracts. Sound is generated by the vibration of the vibrating unit 3.
  • the sound corresponding to the audio signal is reproduced by the vibration of the vibrating section 3 and the operation of the speaker unit 4.
  • the sound generated by the vibration of the vibrating section 3 and the sound reproduced from the speaker unit 4 are emitted in substantially the same direction, for example.
  • the present disclosure can be applied to the signal processing circuit of the piezoelectric element included in the speaker device 1 described above.
  • the signal processing circuit of the present disclosure can be applied to a signal processing circuit of another electronic device having a capacitive load.
  • the present disclosure can be configured as a signal processing circuit such as an IC (Integrated Circuit) chip instead of the speaker device.
  • FIG. 2A is a diagram showing a configuration example of a general signal processing circuit (signal processing circuit 10) that drives a piezoelectric element.
  • the signal processing circuit 10 has a DSP (Digital Signal Processor) 10A for performing various acoustic processes, a class D amplifier 10B, and a piezoelectric element 10C.
  • DSP Digital Signal Processor
  • the class D amplifier 10B has inductors 10D and 10D at the output stage.
  • the problem to be considered in such a circuit is the oscillation of the piezoelectric element. That is, resonance due to LC series connection of the piezoelectric element 10C(C) and the inductor 10D(L) (series resonance) is a problem to be considered. It is known that the piezoelectric element, which is one of the capacitive loads, has a lower impedance as the frequency increases. Therefore, when a signal with a high frequency is input, the piezoelectric element may reach a temperature exceeding the operation compensation range due to a large current. Either of these points causes deterioration of the reproduction quality of the audio signal. Therefore, in the general signal processing circuit 10, as shown in FIG. 2A, the protection elements 10E and 10E are connected between the class D amplifier 10B and the piezoelectric element 10C to protect the piezoelectric element 10C. ..
  • the piezoelectric element 10C can be protected by providing the protective resistors 10E and 10E, the protective resistors 10E and 10E are connected to the path through which the audio signal passes, so that the sound quality is deteriorated.
  • power consumption is increased due to heat generation in the protection resistors 10E and 10E.
  • the protection resistors 10E and 10E are used, the cost for configuring the signal processing circuit is high.
  • FIG. 2B shows a configuration example of the signal processing circuit (signal processing circuit 20) according to the embodiment.
  • the signal processing circuit 20 has a DSP 21, a class D amplifier 22, and a piezoelectric element 23.
  • the DSP 21 is connected to the input side of the class D amplifier 22.
  • a piezoelectric element 23 is connected to the output side of the class D amplifier 22.
  • the class D amplifier 22 has inductors 22A and 22A at its output stage.
  • the signal processing circuit 20 does not use a protective resistor, that is, the inductors 22A and 22A and the piezoelectric element 23 are directly connected (directly connected).
  • FIG. 3 shows an example of the simulation circuit.
  • the simulation circuit shown in FIG. 3 is a circuit that simulates one side of a BLT amplifier with a power supply voltage of 10 V, uses a sine wave signal of 11.4 kHz and 30 V as an input signal, and clips with a 4.7 V zener diode. Simulated. Further, the resonance point of the LC was set outside the reproduction band (for example, around 60 kHz).
  • FIG. 4 shows the result of a simulation using the simulated circuit shown in FIG.
  • the horizontal axis represents frequency.
  • the DSP 21 performs such protection operation. That is, in the embodiment, the DSP 21 functions as a protection circuit. Based on the above, the details of the signal processing circuit according to the embodiment of the present disclosure will be described.
  • the speaker device 1 also has a circuit and a configuration for supplying an audio signal to the speaker unit 4. As these circuits or the like, the circuits or the like described in detail below may be applied, or other known circuit configurations may be applied.
  • FIG. 5 is a diagram referred to when describing a configuration example of the DSP 21 according to the embodiment. Note that FIG. 5 illustrates a configuration example mainly relating to the protection operation of the DSP 21. Of course, the DSP 21 may perform other known audio signal processing (volume control, equalizing control, etc.).
  • the DSP 21 has, for example, a heat generation protection circuit 21A, a slew rate limiting unit 21B, a clipper 21C, and a filter unit 21D.
  • the heat generation protection circuit 21A is a circuit for preventing the piezoelectric element 23 from generating heat in a range exceeding the operation compensation temperature.
  • the slew rate limiting unit 21B is for limiting the current.
  • the clipper 21C clips the level of the audio signal input to the input terminal (audio In) so as to be equal to or lower than a predetermined level.
  • the filter unit 21D is a band limiting filter for removing harmonics.
  • FIG. 6 is a diagram showing a configuration example of the heat generation protection circuit 21A according to the embodiment.
  • the heat generation protection circuit 21A includes, for example, a high pass filter (HPF) 211, a low pass filter (LPF) 212, a high pass filter inverse characteristic calculation unit 213, a low pass filter inverse characteristic calculation unit 214, a DRC (Dynamic Range Control) calculation unit 215, and a multiplication unit. It has an adder 217 and an adder 217.
  • the high-pass filter inverse characteristic calculation unit 213 is hereinafter referred to as 1/HPF 213, and the low-pass filter inverse characteristic calculation unit 214 is hereinafter referred to as 1/LPF 214, as appropriate.
  • the high-pass filter 211 and the 1/HPF 213 are high-pass filters having the same characteristics
  • the low-pass filter 212 and the 1/LPF 214 are low-pass filters having different characteristics.
  • the high-pass filter 211 passes a signal having a frequency component higher than a predetermined frequency included in the input audio signal. Further, the low pass filter 212 passes a signal having a frequency component lower than a predetermined frequency included in the input audio signal.
  • the audio signal is divided into two frequency bands (two bands), and only one (for example, the high frequency component) is processed by the DRC calculation unit 215 described later. With this configuration, it is possible to prevent the level of the output audio signal from extremely increasing or decreasing.
  • the audio signal (audio signal AS1) output from the high-pass filter 211 is branched, and one is supplied to the multiplication unit 216 and the other is supplied to 1/HPF 213.
  • the 1/HPF 213 cancels the characteristic of the high-pass filter 211 by applying the inverse characteristic of the high-pass filter 211.
  • the characteristic of the high-pass filter 211 is canceled because the LPF characteristic of the 1/LPF 214 is set in consideration of the temperature characteristic of the piezoelectric element 23 in a wide frequency band, as described later.
  • 1/LPF 214 is a weighting filter that detects a signal by calculation using the inverse characteristic of LPF.
  • the DRC calculation unit 215 operates according to the weighting based on the calculation result.
  • the DRC operation unit 215 compresses the level of the audio signal so that the level falls within the threshold when the level of the audio signal exceeds a predetermined threshold. Although the details will be described later, this threshold value changes so as to become smaller as the frequency becomes higher than a predetermined frequency.
  • the multiplication unit 216 multiplies the audio signal AS1 output from the high-pass filter 211 by the coefficient calculated by the DRC calculation unit 215.
  • the adding unit 217 adds the audio signal AS2 output from the multiplying unit 216 and the audio signal AS3 output from the low-pass filter 212 and outputs the added signal.
  • FIG. 7 shows an example of the temperature characteristics of the piezoelectric element 23.
  • the horizontal axis represents frequency [kHz] and the vertical axis represents temperature rise (temperature change ( ⁇ t)) [° C.] of the piezoelectric element 23.
  • the temperature rise of 35° C. is set as the operation compensation range of the piezoelectric element 23.
  • the line LN1 in FIG. 7 shows the temperature characteristic of the piezoelectric element 23 when an audio signal of full scale, that is, 0 dB, is input.
  • a line LN2 in FIG. 7 shows the temperature characteristic of the piezoelectric element 23 when an audio signal of -3 dB is input.
  • a line LN3 in FIG. 7 shows the temperature characteristic of the piezoelectric element 23 when an audio signal of ⁇ 6 dB is input.
  • the line LN4 in FIG. 7 shows the temperature characteristic of the piezoelectric element 23 when an audio signal of -9 dB is input.
  • FIG. 8 shows an example of an attenuation line set based on the temperature characteristic of the piezoelectric element 23.
  • the temperature rises to 35° C. at about 4 kHz.
  • the piezoelectric element 23 has a low impedance in the high frequency band. Therefore, even with a -3 dB audio signal, the temperature rise may exceed 35° C. in the high frequency range.
  • an attenuation line that lowers the temperature of the piezoelectric element 23 from around 4 kHz and further lowers the temperature in a higher frequency region is obtained.
  • An example of such an attenuation line is shown by the line LN5 in FIG.
  • the characteristics of the LPF eg, cutoff frequency 10 kHz, first-order LPF
  • the characteristics of the LPF is set.
  • An example of the characteristics of the LPF is shown by the line LN6 in FIG.
  • the LPF having such characteristics is applied to the 1/LPF 214. That is, the 1/LPF 214 performs the calculation using the inverse characteristic of the LPF characteristic indicated by the line LN6 in FIG.
  • the weighting corresponding to the frequency of the audio signal is calculated based on the calculation by the 1/LPF 214, and the weighting when the DRC calculation unit 215 performs the level control is set.
  • the level is compressed when it exceeds a predetermined level (normal threshold value) in the low frequency range, and the level lower than the predetermined level (normal value) in the high frequency range.
  • Weighting is set in the DRC calculation unit 215 so as to compress the level when the threshold value is set smaller than the threshold value), and the DRC calculation unit 215 performs level control based on the weighting.
  • the DRC calculation unit 215 normally lowers the level of the audio signal when the level of the audio signal exceeds ⁇ 6 dB.
  • the frequency of the audio signal is in the low range (for example, about 1 kHz to 2 kHz), as described above, the DRC operation unit 215 operates when the level of the audio signal exceeds ⁇ 6 dB.
  • the frequency of the audio signal is in the high range (for example, about 4 kHz)
  • the DRC calculation unit 215 operates when the level of the audio signal exceeds a lower level (for example, -8 dB).
  • the level control by the DRC calculation unit 215 is easier to perform than in the low range. By such processing, it is possible to prevent the temperature of the piezoelectric element 23 from exceeding the operation compensation range.
  • FIG. 9 is a diagram for explaining an example of the effect when the above-described protection operation is performed. Similar to FIG. 7, the horizontal axis in the graph of FIG. 9 represents frequency [kHz], and the vertical axis represents temperature rise (temperature change ( ⁇ t)) [° C.] of the piezoelectric element 23.
  • a line LN11 shows a change in temperature rise of the piezoelectric element 23 when the above-mentioned protection operation is not performed, and a line LN12 shows a change in temperature rise of the piezoelectric element 23 when the above-mentioned protection operation is not performed. As shown by the line LN11 in FIG. 9, it is possible to prevent the temperature rise of the piezoelectric element 23 from exceeding the operation compensation range by the protection operation by the heat protection circuit 21A described above.
  • the attack time and release time in the DRC calculation unit 215 are made longer than usual.
  • the attack time and the release time will be described with reference to FIG.
  • the attack time means the time until the compression becomes completely effective when the level of the input audio signal exceeds the threshold (the period from TA to Ta in FIG. 10).
  • the release time is the time until the compression is completely disabled when the level of the input audio signal falls below the threshold (the period from TB to tb in FIG. 10).
  • the total of the attack time and the release time is set to be longer than the predetermined time.
  • the total attack time and release time is set to, for example, about several hundred msec.
  • the attack time and the release time time are generally set to be small when performing DRC control, and the DRC control is performed by following the level change of the audio signal. Is being done.
  • the level of a normal audio signal changes in a short time, there is little possibility that the temperature rise of the piezoelectric element 23 will be an extreme one exceeding the operation compensation range.
  • a stationary signal for example, a sine wave
  • the acoustic energy is high, and the temperature of the piezoelectric element 23 may increase extremely.
  • the DRC calculation unit 215 performs the DRC control. To be done. Such control can be realized by setting the total of the attack time and the release time in the DRC calculation unit 215 longer than a predetermined value.
  • the value of at least one of the inductor component of the inductor 22A and the capacitance component of the piezoelectric element 23 is adjusted so that the frequency f 0 is outside the reproduction band.
  • the inductor 22A and the piezoelectric element 23 are selected so that the frequency f 0 is 60 kHz. Since a signal outside the reproduction band is not input, it is possible to suppress adverse effects (generation of large current, etc.) due to series resonance.
  • the saturation of the class D amplifier 22 Another factor that causes a large current to flow in the piezoelectric element 23 is the saturation of the class D amplifier 22.
  • Saturation means that an excessive level of signal is input to the class D amplifier 22 to saturate and generate distortion. Therefore, the clipper 21C of the DPS 21 clips the audio signal at a low level that the class D amplifier 22 does not saturate. For example, clip the signal -1 dB below full scale. This prevents the class D amplifier 22 from being saturated.
  • the filter unit 21D arranged after the clipper 21C removes harmonics from the vicinity of the frequency f 0 at the series resonance point. This can prevent the class D amplifier 22 from shutting down due to overcurrent.
  • the charge Q stored in the capacitor is proportional to the potential V.
  • the charge Q can be expressed by the following equation 2.
  • the electric current I flowing through the piezoelectric element 23 can be expressed by the following mathematical formula 4.
  • FIG. 11 shows waveforms of a sine wave voltage in a predetermined simulation circuit and a current flowing in the circuit when the input signal is a sine wave.
  • the horizontal axis in FIG. 11 represents the time axis, and the vertical axis represents the magnitude of voltage [V] (axis labeled Y1) or current [ ⁇ A] (axis labeled Y2).
  • line LN21 in FIG. 11 indicates a change in sine wave voltage
  • line LN22 indicates a change in sine wave current
  • line LN23 indicates a change in sine wave voltage after clipping
  • line LN24 indicates a line after clipping. The change of the electric current of a sine wave is shown.
  • the slew rate limiting unit 21B limits the current.
  • the slew rate limiting unit 21B limits the current by applying a known method. For example, the control is performed such that the current is reduced by performing the control such that the temporal change of the voltage is reduced. As described above, protection against overcurrent is provided.
  • FIG. 12 shows the difference in power consumption depending on the presence or absence of the protection resistor.
  • the horizontal axis of the graph in FIG. 12 represents frequency [Hz] and the vertical axis represents power [W].
  • the line LN31 in the graph of FIG. 12 shows the power consumption for each frequency when the signal processing circuit has a protection resistor, and the line LN32 shows the power consumption for each frequency when the signal processing circuit has no protection resistor. ing. As can be seen from the graph of FIG. 12, the power consumption in the signal processing circuit is lower when there is no protection resistor.
  • the circuit configuration of the signal processing circuit described above can be appropriately changed without departing from the spirit of the present disclosure. Further, the signal processing circuit of the present disclosure can be applied to not only the speaker device but also a general signal processing circuit that drives a capacitive load.
  • the present disclosure can also take the following configurations.
  • An amplifier A protection circuit connected to the input side of the amplifier, And a capacitive load connected to the output side of the amplifier,
  • the protection circuit is A clipper that clips the level of the input signal to a level lower than a predetermined level
  • a speaker device comprising: a filter unit that removes harmonics included in the output of the clipper.
  • the amplifier has an inductor component in the output stage, The speaker device according to (1), wherein a series resonance point defined by the inductor component and the capacitive component of the capacitive load is set outside the reproduction band.
  • the protection circuit is When the level of the input signal exceeds a threshold value, it has a level control unit for compressing the level,
  • the speaker device any one of (1) to (3), wherein the threshold value is set to become smaller as the frequency becomes higher than a predetermined frequency.
  • the speaker device (4), wherein the threshold value changes based on an inverse characteristic of a filter characteristic set according to a temperature rise characteristic of the capacitive load.
  • the speaker device (4) or (5), wherein the attack time and the release time of the level control unit are set so that the level control unit operates when the input signal is a steady signal.
  • the speaker device according to (6), wherein the attack time and the release time are set to be larger than predetermined values.
  • the speaker device (8) The speaker device according to any one of (4) to (6), wherein the level control unit is performed on a signal obtained by performing a filtering process on the input signal with a high-pass filter. (9) The speaker device according to any one of (1) to (8), wherein the protection circuit includes a slew rate limiting unit that limits current. (10) The speaker device according to any one of (1) to (9), including a vibrating portion that vibrates when the capacitive load operates. (11) A clipper that clips the level of the input signal to a level lower than a predetermined level, A signal processing circuit, comprising: a filter unit that removes harmonics included in the output of the clipper.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
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Abstract

The present invention is a speaker device having: an amplifier; a protection circuit connected to an input side of the amplifier; and a capacitive load connected to an output side of the amplifier. The protection circuit has: a clipper for clipping the level of an input signal to a level lower than a prescribed level; and a filter unit for removing harmonics included in an output of the clipper.

Description

スピーカー装置及び信号処理回路Speaker device and signal processing circuit
　本開示は、スピーカー装置及び信号処理回路に関する。 The present disclosure relates to a speaker device and a signal processing circuit.
　発音デバイスとして、ピエゾ素子等の圧電素子を用いた装置が提案されている。例えば、下記特許文献１には、ピエゾ素子を用いたＤ級アンプが記載されている。特許文献１の記載のＤ級アンプでは、スルーレート制限を行うことにより、Ｄ級アンプのインダクタに流れる最大電流を制限するようにしている。 As a sounding device, a device using a piezoelectric element such as a piezo element has been proposed. For example, Patent Document 1 below describes a class D amplifier using a piezo element. In the class D amplifier described in Patent Document 1, the maximum current flowing through the inductor of the class D amplifier is restricted by limiting the slew rate.
特開２０１４－１６５６８９号公報JP, 2014-165689, A
　特許文献１に記載のＤ級アンプで電圧をクリップすると、クリップ時に発生する高調波がＬＣ直列共振点と重なることでオーバーカレントが発生し、当該オーバーカレントによりＤ級アンプがシャットダウンしてしまうという問題がある。 When the voltage is clipped by the class D amplifier described in Patent Document 1, a harmonic generated at the time of clipping overlaps with the LC series resonance point, which causes an overcurrent, which causes the class D amplifier to shut down. There is.
　従って、本開示は、Ｄ級アンプでクリップした際に生じるオーバーカレントにより当該Ｄ級アンプがシャットダウンしてしまうことを防止するスピーカー装置及び信号処理回路を提供することを目的の一つとする。 Therefore, it is an object of the present disclosure to provide a speaker device and a signal processing circuit that prevent the class D amplifier from shutting down due to an overcurrent generated when the class D amplifier is clipped.
　本開示は、例えば、
　アンプと、
　アンプの入力側に接続される保護回路と、
　アンプの出力側に接続される容量性負荷と
　を有し、
　保護回路は、
　入力信号のレベルを所定より低いレベルにクリップするクリッパと、
　クリッパの出力に含まれる高調波を除去するフィルタ部とを有する
　スピーカー装置である。 The present disclosure includes, for example,
An amplifier,
A protection circuit connected to the input side of the amplifier,
With a capacitive load connected to the output side of the amplifier,
The protection circuit is
A clipper that clips the level of the input signal to a level lower than a predetermined level,
A speaker device having a filter unit that removes harmonics included in the output of the clipper.
　また、本開示は、例えば、
　入力信号のレベルを所定より低いレベルにクリップするクリッパと、
　クリッパの出力に含まれる高調波を除去するフィルタ部とを有する
　信号処理回路である。 In addition, the present disclosure, for example,
A clipper that clips the level of the input signal to a level lower than a predetermined level,
A signal processing circuit having a filter unit that removes harmonics included in the output of the clipper.
図１は、本開示の信号処理回路が適用され得るスピーカー装置の外観例を示している。FIG. 1 illustrates an external appearance example of a speaker device to which the signal processing circuit of the present disclosure can be applied. 図２Ａは、実施の形態において考慮すべき問題を説明する際に参照される図であり、図２Ｂは、実施の形態にかかる信号処理回路の構成例を示す図である。FIG. 2A is a diagram referred to when describing a problem to be considered in the embodiment, and FIG. 2B is a diagram illustrating a configuration example of a signal processing circuit according to the embodiment. 図３は、実施の形態において考慮すべき問題を説明する際に参照される図である。FIG. 3 is a diagram referred to when describing a problem to be considered in the embodiment. 図４は、実施の形態において考慮すべき問題を説明する際に参照される図である。FIG. 4 is a diagram referred to when describing a problem to be considered in the embodiment. 図５は、実施の形態にかかるＤＳＰの構成例を説明する際に参照される図である。FIG. 5 is a diagram referred to when describing a configuration example of the DSP according to the embodiment. 図６は、実施の形態にかかる発熱保護回路の構成例を示す図である。FIG. 6 is a diagram showing a configuration example of the heat generation protection circuit according to the embodiment. 図７は、実施の形態にかかる圧電素子の温度特性の一例を示す図である。FIG. 7 is a diagram showing an example of temperature characteristics of the piezoelectric element according to the embodiment. 図８は、実施の形態にかかる圧電素子の温度特性に基づいて設定される減衰線の一例等を示す図である。FIG. 8 is a diagram showing an example of an attenuation line set based on the temperature characteristics of the piezoelectric element according to the embodiment. 図９は、実施の形態により得られる効果の一例を説明するための図である。FIG. 9 is a diagram for explaining an example of the effect obtained by the embodiment. 図１０は、アタックタイム及びリリースタイムを説明する際に参照される図である。FIG. 10 is a diagram referred to when explaining the attack time and the release time. 図１１は、電圧をクリップした場合でも最大電流が変化しないことを説明する際に参照される図である。FIG. 11 is a diagram referred to when explaining that the maximum current does not change even when the voltage is clipped. 図１２は、実施の形態により得られる効果の一例を説明するための図である。FIG. 12 is a diagram for explaining an example of the effect obtained by the embodiment.
　以下、本開示の実施の形態等について図面を参照しながら説明する。なお、説明は以下の順序で行う。
＜実施の形態＞
＜変形例＞
　以下に説明する実施の形態等は本開示の好適な具体例であり、本開示の内容がこれらの実施の形態等に限定されるものではない。 Hereinafter, embodiments and the like of the present disclosure will be described with reference to the drawings. The description will be given in the following order.
<Embodiment>
<Modification>
The embodiments and the like described below are preferred specific examples of the present disclosure, and the contents of the present disclosure are not limited to these embodiments and the like.
＜実施の形態＞
［本開示の適用例］
　始めに、本開示の適用例について説明する。本開示の信号処理回路は、例えば、スピーカー装置が有する容量性負荷を駆動する回路に適用され得る。図１は、本開示の信号処理回路が適用され得るスピーカー装置（スピーカー装置１）の外観例を示している。スピーカー装置１は、概略的には、円錐台状の形状を有し、亜鉛等の金属材料により構成されるベース２と、筒状の形状を有し、有機ガラス管等の光透過性部材により構成される振動部３とを有している。ベース２が床、机上等の適宜な平面に置かれることにより、スピーカー装置１が使用される。ベース２は、スピーカー装置１が置かれる載置面側とは、反対側に突出し、内部が中空の取付部２Ａを有している。取付部２Ａの内部に振動部３の下側に位置する端部が収容され、これにより、振動部３がベース２に支持される。 <Embodiment>
[Application example of the present disclosure]
First, an application example of the present disclosure will be described. The signal processing circuit of the present disclosure can be applied to, for example, a circuit that drives a capacitive load included in a speaker device. FIG. 1 shows an external appearance example of a speaker device (speaker device 1) to which the signal processing circuit of the present disclosure can be applied. The speaker device 1 has a truncated cone shape, a base 2 made of a metal material such as zinc, and a tubular shape. The speaker device 1 includes a light-transmissive member such as an organic glass tube. It has a vibrating part 3 configured. The speaker device 1 is used by placing the base 2 on an appropriate flat surface such as a floor or a desk. The base 2 has a mounting portion 2A that projects to the opposite side from the mounting surface side on which the speaker device 1 is placed and has a hollow inside. The end portion located below the vibrating portion 3 is housed inside the mounting portion 2A, whereby the vibrating portion 3 is supported by the base 2.
　ベース２の内部には、例えば、ダイナミック型のスピーカーユニット（スピーカーユニット４）が、音の放射方向が上側となるように収容されている。ダイナミック型のスピーカーユニット４から再生された音がベース２の適宜な位置に設けられた開口部５を介して外部に放射される。 Inside the base 2, for example, a dynamic type speaker unit (speaker unit 4) is housed so that the sound emitting direction is the upper side. The sound reproduced from the dynamic type speaker unit 4 is radiated to the outside through the opening 5 provided at an appropriate position of the base 2.
　一方、振動部３の一方の端面、具体的には、取付部２Ａ内部に収容される側の端面には、圧電素子が取り付けられている。圧電素子には、オーディオ信号に対応する駆動信号が供給され、駆動信号に応じて圧電素子が伸縮動作を行う。圧電素子の伸縮動作に伴って振動部３が振動する。振動部３の振動により音が発生する。図１に模式的に示すように、オーディオ信号に対応する音が、振動部３の振動及びスピーカーユニット４の動作により、再生される。図１の矢印により模式的に示すように、振動部３の振動により発生する音とスピーカーユニット４から再生される音の放射方向は、例えば、略同一方向とされる。 On the other hand, a piezoelectric element is attached to one end face of the vibrating portion 3, specifically, the end face on the side housed inside the attaching portion 2A. A drive signal corresponding to an audio signal is supplied to the piezoelectric element, and the piezoelectric element expands and contracts according to the drive signal. The vibrating section 3 vibrates as the piezoelectric element expands and contracts. Sound is generated by the vibration of the vibrating unit 3. As schematically shown in FIG. 1, the sound corresponding to the audio signal is reproduced by the vibration of the vibrating section 3 and the operation of the speaker unit 4. As schematically shown by arrows in FIG. 1, the sound generated by the vibration of the vibrating section 3 and the sound reproduced from the speaker unit 4 are emitted in substantially the same direction, for example.
　本開示は、上述したスピーカー装置１が有する圧電素子の信号処理回路に適用され得る。但し、本開示の信号処理回路は、スピーカー装置とは異なり、容量性負荷を有する他の電子機器の信号処理回路に対しても適用可能である。なお、本開示は、スピーカー装置ではなく、ＩＣ（Integrated Circuit）チップ等の信号処理回路として構成することも可能である。 The present disclosure can be applied to the signal processing circuit of the piezoelectric element included in the speaker device 1 described above. However, unlike the speaker device, the signal processing circuit of the present disclosure can be applied to a signal processing circuit of another electronic device having a capacitive load. Note that the present disclosure can be configured as a signal processing circuit such as an IC (Integrated Circuit) chip instead of the speaker device.
［考慮すべき問題］
　次に、本開示の理解を容易とするために、実施の形態において考慮すべき問題について説明する。図２Ａは、圧電素子を駆動する一般的な信号処理回路（信号処理回路１０）の構成例を示す図である。信号処理回路１０は、種々の音響処理を行うＤＳＰ(Digital Signal Processor)１０Ａ、Ｄ級アンプ１０Ｂ及び圧電素子１０Ｃを有している。圧電素子１０Ｃの信号処理回路におけるアンプとしては、圧電素子１０Ｃ専用のアンプを作製するにはコストがかかるため、一般に使用されているＤ級アンプ１０Ｂが適用される。Ｄ級アンプ１０Ｂは、出力段にインダクタ１０Ｄ、１０Ｄを有している。 [Issues to consider]
Next, problems that should be considered in the embodiments in order to facilitate understanding of the present disclosure will be described. FIG. 2A is a diagram showing a configuration example of a general signal processing circuit (signal processing circuit 10) that drives a piezoelectric element. The signal processing circuit 10 has a DSP (Digital Signal Processor) 10A for performing various acoustic processes, a class D amplifier 10B, and a piezoelectric element 10C. As the amplifier in the signal processing circuit of the piezoelectric element 10C, it is costly to manufacture an amplifier dedicated to the piezoelectric element 10C, and therefore a generally used class D amplifier 10B is applied. The class D amplifier 10B has inductors 10D and 10D at the output stage.
　かかる回路で考慮すべき問題としては、圧電素子の発振が挙げられる。即ち、圧電素子１０Ｃ（Ｃ）とインダクタ１０Ｄ（Ｌ）とのＬＣ直列接続による共振（直列共振）が、考慮すべき問題として挙げられる。また、容量性負荷の一つである圧電素子は、周波数が高くなるほどインピーダンスが低下することが知られている。従って、周波数が高い信号が入力された場合には、大電流により圧電素子が動作補償範囲を超える温度になってしまう虞がある。いずれの点もオーディオ信号の再生品質の劣化を招く。そこで、一般的な信号処理回路１０では、図２Ａに示すように、Ｄ級アンプ１０Ｂと圧電素子１０Ｃとの間に保護抵抗１０Ｅ、１０Ｅを接続することにより、圧電素子１０Ｃの保護を図っている。 The problem to be considered in such a circuit is the oscillation of the piezoelectric element. That is, resonance due to LC series connection of the piezoelectric element 10C(C) and the inductor 10D(L) (series resonance) is a problem to be considered. It is known that the piezoelectric element, which is one of the capacitive loads, has a lower impedance as the frequency increases. Therefore, when a signal with a high frequency is input, the piezoelectric element may reach a temperature exceeding the operation compensation range due to a large current. Either of these points causes deterioration of the reproduction quality of the audio signal. Therefore, in the general signal processing circuit 10, as shown in FIG. 2A, the protection elements 10E and 10E are connected between the class D amplifier 10B and the piezoelectric element 10C to protect the piezoelectric element 10C. ..
　しかしながら、保護抵抗１０Ｅ、１０Ｅを設けることにより、圧電素子１０Ｃの保護を図ることができるものの、オーディオ信号が通過するパスに保護抵抗１０Ｅ、１０Ｅが接続されているので、音質の劣化を招く。また、保護抵抗１０Ｅ、１０Ｅで生じる発熱に伴う消費電力の増大を招く。また、保護抵抗１０Ｅ、１０Ｅを使用するので、信号処理回路を構成する上でのコストがかかる。 However, although the piezoelectric element 10C can be protected by providing the protective resistors 10E and 10E, the protective resistors 10E and 10E are connected to the path through which the audio signal passes, so that the sound quality is deteriorated. In addition, power consumption is increased due to heat generation in the protection resistors 10E and 10E. Further, since the protection resistors 10E and 10E are used, the cost for configuring the signal processing circuit is high.
　図２Ｂは、実施の形態にかかる信号処理回路（信号処理回路２０）の構成例を示している。信号処理回路２０は、ＤＳＰ２１、Ｄ級アンプ２２及び圧電素子２３を有している。Ｄ級アンプ２２の入力側にＤＳＰ２１が接続されている。また、Ｄ級アンプ２２の出力側に圧電素子２３が接続されている。 FIG. 2B shows a configuration example of the signal processing circuit (signal processing circuit 20) according to the embodiment. The signal processing circuit 20 has a DSP 21, a class D amplifier 22, and a piezoelectric element 23. The DSP 21 is connected to the input side of the class D amplifier 22. A piezoelectric element 23 is connected to the output side of the class D amplifier 22.
　Ｄ級アンプ２２は、その出力段にインダクタ２２Ａ、２２Ａを有している。信号処理回路２０では、上述した点を考慮して、保護抵抗を用いない構成、即ち、インダクタ２２Ａ、２２Ａと圧電素子２３とは直接、接続されている（直結されている）。 The class D amplifier 22 has inductors 22A and 22A at its output stage. In consideration of the above points, the signal processing circuit 20 does not use a protective resistor, that is, the inductors 22A and 22A and the piezoelectric element 23 are directly connected (directly connected).
　かかる抵抗レスの構成にした場合に、Ｄ級アップでクリップするとクリップ時の高調波がＬＣ共振点で増幅され、その結果、発生するオーバーカレント（過電流）により、Ｄ級アンプがシャットダウンしてしまう虞がある点に留意する必要がある。 In the case of such a resistanceless configuration, if clipping is performed by increasing the class D, the higher harmonic wave at the time of clipping is amplified at the LC resonance point, and as a result, the overcurrent (overcurrent) generated shuts down the class D amplifier. It should be noted that there is a risk.
　この点について、図３及び図４を参照して具体的に説明する。なお、図３及び図４のそれぞれにより示されるシミュレーション回路及びその結果は、実施の形態において考慮すべき問題を説明するためのものであって、実施の形態にかかる信号処理回路が、シミュレーション回路に対応する構成を有することを意味するものではない。 This point will be specifically described with reference to FIGS. 3 and 4. It should be noted that the simulation circuits and the results thereof shown in FIG. 3 and FIG. 4 are for explaining the problems to be considered in the embodiment, and the signal processing circuit according to the embodiment is It does not mean that it has a corresponding configuration.
　図３は、シミュレーション回路の一例を示している。図３に示すシミュレーション回路は、電源電圧１０Ｖ、ＢＬＴアンプの片側のシミュレーションを行う回路であり、入力信号として、１１．４ｋＨｚ、３０Ｖの正弦波信号を使用し、４．７Ｖのツェナーダイオードでクリップをシミュレートした。また、ＬＣの共振点を再生帯域外（例えば、６０ｋＨｚ付近）に設定した。 FIG. 3 shows an example of the simulation circuit. The simulation circuit shown in FIG. 3 is a circuit that simulates one side of a BLT amplifier with a power supply voltage of 10 V, uses a sine wave signal of 11.4 kHz and 30 V as an input signal, and clips with a 4.7 V zener diode. Simulated. Further, the resonance point of the LC was set outside the reproduction band (for example, around 60 kHz).
　図４は、図３に示すシミュレート回路を使用したシミュレーションの結果を示している。図４のグラフにおける縦軸は電流（１ｍＶ＝１Ａとして換算した値）、横軸は周波数を示している。Ｄ級アンプのクリップにより発生した高調波（例えば、５次の高調波）がＬＣ共振点（６０ｋＨｚ付近）と重なりオーバーカレント（例えば、７Ａの過電流）が発生していることがわかる。オーバーカレントにより、Ｄ級アンプがシャットダウンしてしまう虞がある。詳細は後述するが、本実施の形態ではかかる現象を回避するため、Ｄ級アンプの前段で一旦、レベル制限させるためにクリッパでクリップさせ、その後、フィルタ部（例えば、ＬＰＦ(Low Pass Filter)）で高調波を除去する。 FIG. 4 shows the result of a simulation using the simulated circuit shown in FIG. In the graph of FIG. 4, the vertical axis represents current (value converted as 1 mV=1 A), and the horizontal axis represents frequency. It can be seen that the harmonic (for example, the fifth harmonic) generated by the clipping of the class D amplifier overlaps with the LC resonance point (around 60 kHz), and an overcurrent (for example, an overcurrent of 7 A) is generated. Overcurrent may shut down the class D amplifier. Although details will be described later, in order to avoid such a phenomenon in the present embodiment, the clipper is once clipped to limit the level before the class D amplifier, and then the filter unit (for example, LPF (Low Pass Filter)). To remove harmonics.
　また、圧電素子２３の発熱に対する保護が必要となる。本実施の形態では、かかる保護動作をＤＳＰ２１が行うようにしている。即ち、実施の形態では、ＤＳＰ２１が保護回路として機能する。以上を踏まえ、本開示の実施の形態にかかる信号処理回路の詳細について説明する。なお、図示は省略するが、スピーカー装置１は、スピーカーユニット４に対してオーディオ信号を供給する回路、構成も有している。これらの回路等としては、以下に詳細に説明する回路等が適用されても良いし、他の公知の回路構成が適用されても良い。 Also, it is necessary to protect the piezoelectric element 23 against heat generation. In the present embodiment, the DSP 21 performs such protection operation. That is, in the embodiment, the DSP 21 functions as a protection circuit. Based on the above, the details of the signal processing circuit according to the embodiment of the present disclosure will be described. Although not shown, the speaker device 1 also has a circuit and a configuration for supplying an audio signal to the speaker unit 4. As these circuits or the like, the circuits or the like described in detail below may be applied, or other known circuit configurations may be applied.
［ＤＳＰの構成例］
　図５は、実施の形態にかかるＤＳＰ２１の構成例を説明する際に参照される図である。なお、図５では、主にＤＳＰ２１の保護動作にかかる構成例を示している。勿論、ＤＳＰ２１が、その他の公知の音声信号処理（ボリューム制御やイコライジング制御等）を行うようにしても良い。 [Example of DSP configuration]
FIG. 5 is a diagram referred to when describing a configuration example of the DSP 21 according to the embodiment. Note that FIG. 5 illustrates a configuration example mainly relating to the protection operation of the DSP 21. Of course, the DSP 21 may perform other known audio signal processing (volume control, equalizing control, etc.).
　ＤＳＰ２１は、例えば、発熱保護回路２１Ａ、スルーレート制限部２１Ｂ、クリッパ２１Ｃ及びフィルタ部２１Ｄを有している。各部を概略的に説明する。発熱保護回路２１Ａは、圧電素子２３が動作補償温度を超えてしまう範囲で発熱してしまうことを防止するための回路である。スルーレート制限部２１Ｂは、電流を制限するためのものである。クリッパ２１Ｃは、入力端子（オーディオＩｎ）に入力されるオーディオ信号のレベルを所定のレベル以下となるようにクリップするものである。フィルタ部２１Ｄは、高調波を除去するための帯域制限フィルタである。以下、各部が行う保護動作を含め、それぞれの詳細について説明する。 The DSP 21 has, for example, a heat generation protection circuit 21A, a slew rate limiting unit 21B, a clipper 21C, and a filter unit 21D. Each part will be schematically described. The heat generation protection circuit 21A is a circuit for preventing the piezoelectric element 23 from generating heat in a range exceeding the operation compensation temperature. The slew rate limiting unit 21B is for limiting the current. The clipper 21C clips the level of the audio signal input to the input terminal (audio In) so as to be equal to or lower than a predetermined level. The filter unit 21D is a band limiting filter for removing harmonics. Hereinafter, the details of each part, including the protection operation, will be described.
（発熱保護回路について）
　図６は、実施の形態にかかる発熱保護回路２１Ａの構成例を示す図である。発熱保護回路２１Ａは、例えば、ハイパスフィルタ（ＨＰＦ）２１１、ローパスフィルタ（ＬＰＦ）２１２、ハイパスフィルタ逆特性演算部２１３、ローパスフィルタ逆特性演算部２１４、ＤＲＣ(Dynamic Range Control)演算部２１５、乗算部２１６及び加算部２１７を有している。なお、ハイパスフィルタ逆特性演算部２１３を以下、１／ＨＰＦ２１３、ローパスフィルタ逆特性演算部２１４を以下、１／ＬＰＦ２１４と適宜、称する。また、本実施の形態では、ハイパスフィルタ２１１及び１／ＨＰＦ２１３のそれぞれは、同じ特性を有するハイパスフィルタであり、ローパスフィルタ２１２及び１／ＬＰＦ２１４は異なる特性を有するローパスフィルタを想定している。 (About heat protection circuit)
FIG. 6 is a diagram showing a configuration example of the heat generation protection circuit 21A according to the embodiment. The heat generation protection circuit 21A includes, for example, a high pass filter (HPF) 211, a low pass filter (LPF) 212, a high pass filter inverse characteristic calculation unit 213, a low pass filter inverse characteristic calculation unit 214, a DRC (Dynamic Range Control) calculation unit 215, and a multiplication unit. It has an adder 217 and an adder 217. The high-pass filter inverse characteristic calculation unit 213 is hereinafter referred to as 1/HPF 213, and the low-pass filter inverse characteristic calculation unit 214 is hereinafter referred to as 1/LPF 214, as appropriate. Further, in the present embodiment, it is assumed that the high-pass filter 211 and the 1/HPF 213 are high-pass filters having the same characteristics, and the low-pass filter 212 and the 1/LPF 214 are low-pass filters having different characteristics.
　ハイパスフィルタ２１１は、入力オーディオ信号に含まれる所定の周波数より高い周波数成分の信号を通過させる。また、ローパスフィルタ２１２は、入力オーディオ信号に含まれる所定の周波数より低い周波数成分の信号を通過させる。このように、本実施の形態ではオーディオ信号を２つの周波数帯域（２バンド）に分け、一方（例えば、高周波成分）のみに後述するＤＲＣ演算部２１５等による処理を行うようにしている。かかる構成により、出力されるオーディオ信号のレベルが極端に大きくなってしまったり、小さくなってしまうことを防止することができる。 The high-pass filter 211 passes a signal having a frequency component higher than a predetermined frequency included in the input audio signal. Further, the low pass filter 212 passes a signal having a frequency component lower than a predetermined frequency included in the input audio signal. As described above, in the present embodiment, the audio signal is divided into two frequency bands (two bands), and only one (for example, the high frequency component) is processed by the DRC calculation unit 215 described later. With this configuration, it is possible to prevent the level of the output audio signal from extremely increasing or decreasing.
　ハイパスフィルタ２１１から出力されるオーディオ信号（オーディオ信号ＡＳ１）が分岐され、一方が乗算部２１６に、他方が１／ＨＰＦ２１３に供給される。１／ＨＰＦ２１３は、ハイパスフィルタ２１１の逆特性をかけることにより、ハイパスフィルタ２１１の特性をキャンセルする。ハイパスフィルタ２１１の特性をキャンセルするのは、後述するように、１／ＬＰＦ２１４におけるＬＰＦの特性が広い周波数帯域における圧電素子２３の温度特性を考慮して設定されているためである。 The audio signal (audio signal AS1) output from the high-pass filter 211 is branched, and one is supplied to the multiplication unit 216 and the other is supplied to 1/HPF 213. The 1/HPF 213 cancels the characteristic of the high-pass filter 211 by applying the inverse characteristic of the high-pass filter 211. The characteristic of the high-pass filter 211 is canceled because the LPF characteristic of the 1/LPF 214 is set in consideration of the temperature characteristic of the piezoelectric element 23 in a wide frequency band, as described later.
　１／ＬＰＦ２１４は、重み付けフィルタであり、ＬＰＦの逆特性を用いた演算により信号を検出する。演算結果に基づく重み付けに応じて、ＤＲＣ演算部２１５が動作する。 1/LPF 214 is a weighting filter that detects a signal by calculation using the inverse characteristic of LPF. The DRC calculation unit 215 operates according to the weighting based on the calculation result.
　ＤＲＣ演算部２１５は、オーディオ信号のレベルが所定の閾値を超えた場合に、当該レベルが閾値内となるように、オーディオ信号のレベルを圧縮する。詳細は後述するが、この閾値は、所定の周波数より高域になるにつれて小さくなるように変化する。 The DRC operation unit 215 compresses the level of the audio signal so that the level falls within the threshold when the level of the audio signal exceeds a predetermined threshold. Although the details will be described later, this threshold value changes so as to become smaller as the frequency becomes higher than a predetermined frequency.
　乗算部２１６は、ハイパスフィルタ２１１の出力であるオーディオ信号ＡＳ１に対して、ＤＲＣ演算部２１５により演算された係数を乗算する。 The multiplication unit 216 multiplies the audio signal AS1 output from the high-pass filter 211 by the coefficient calculated by the DRC calculation unit 215.
　加算部２１７は、乗算部２１６から出力されるオーディオ信号ＡＳ２と、ローパスフィルタ２１２から出力されるオーディオ信号ＡＳ３とを加算して出力する。 The adding unit 217 adds the audio signal AS2 output from the multiplying unit 216 and the audio signal AS3 output from the low-pass filter 212 and outputs the added signal.
　次に、発熱保護回路２１Ａの動作例について説明する。図７は、圧電素子２３の温度特性の一例を示している。図７のグラフにおける横軸は周波数［ｋＨｚ］、縦軸は圧電素子２３の温度上昇（温度変化（Δｔ））［℃］を示している。本実施の形態では、温度上昇３５℃を圧電素子２３の動作補償範囲としている。図７におけるラインＬＮ１は、フルスケール、即ち、０ｄＢのオーディオ信号が入力された場合の圧電素子２３の温度特性を示している。また、図７におけるラインＬＮ２は、－３ｄＢのオーディオ信号が入力された場合の圧電素子２３の温度特性を示している。また、図７におけるラインＬＮ３は、－６ｄＢのオーディオ信号が入力された場合の圧電素子２３の温度特性を示している。また、図７におけるラインＬＮ４は、－９ｄＢのオーディオ信号が入力された場合の圧電素子２３の温度特性を示している。 Next, an operation example of the heat generation protection circuit 21A will be described. FIG. 7 shows an example of the temperature characteristics of the piezoelectric element 23. In the graph of FIG. 7, the horizontal axis represents frequency [kHz] and the vertical axis represents temperature rise (temperature change (Δt)) [° C.] of the piezoelectric element 23. In the present embodiment, the temperature rise of 35° C. is set as the operation compensation range of the piezoelectric element 23. The line LN1 in FIG. 7 shows the temperature characteristic of the piezoelectric element 23 when an audio signal of full scale, that is, 0 dB, is input. A line LN2 in FIG. 7 shows the temperature characteristic of the piezoelectric element 23 when an audio signal of -3 dB is input. A line LN3 in FIG. 7 shows the temperature characteristic of the piezoelectric element 23 when an audio signal of −6 dB is input. The line LN4 in FIG. 7 shows the temperature characteristic of the piezoelectric element 23 when an audio signal of -9 dB is input.
　圧電素子２３の温度特性に基づいて、目標とする減衰線を求める。図８は、圧電素子２３の温度特性に基づいて設定される減衰線の一例等を示している。上述した温度特性を考察すると、フルスケールのオーディオ信号が入力された場合には、おおよそ４ｋＨｚ程度で、温度上昇が３５℃になる。また、上述したように、圧電素子２３は、高周波帯ではインピーダンスが低くなる。従って、－３ｄＢのオーディオ信号であっても、高域では温度上昇が３５℃を超えてしまう虞もある。以上を踏まえ、例えば、４ｋＨｚあたりから圧電素子２３の温度を低下させ、且つ、高域になるほどより大きく温度を低下させるような減衰線を求める。かかる減衰線の一例が、図８におけるラインＬＮ５により示されている。 Based on the temperature characteristics of the piezoelectric element 23, the target attenuation line is obtained. FIG. 8 shows an example of an attenuation line set based on the temperature characteristic of the piezoelectric element 23. Considering the temperature characteristics described above, when a full-scale audio signal is input, the temperature rises to 35° C. at about 4 kHz. Further, as described above, the piezoelectric element 23 has a low impedance in the high frequency band. Therefore, even with a -3 dB audio signal, the temperature rise may exceed 35° C. in the high frequency range. Based on the above, for example, an attenuation line that lowers the temperature of the piezoelectric element 23 from around 4 kHz and further lowers the temperature in a higher frequency region is obtained. An example of such an attenuation line is shown by the line LN5 in FIG.
　そして、ラインＬＮ５により示される減衰線に近似するＬＰＦ（例えば、カットオフ周波数１０ｋＨｚ、１次のＬＰＦ）の特性を設定する。ＬＰＦの特性の一例が、図８におけるラインＬＮ６により示されている。かかる特性を有するＬＰＦが１／ＬＰＦ２１４に適用される。つまり、図８のラインＬＮ６により示されるＬＰＦの特性の逆特性を用いた演算が１／ＬＰＦ２１４により行われる。 Then, the characteristics of the LPF (eg, cutoff frequency 10 kHz, first-order LPF) that approximates the attenuation line indicated by the line LN5 are set. An example of the characteristics of the LPF is shown by the line LN6 in FIG. The LPF having such characteristics is applied to the 1/LPF 214. That is, the 1/LPF 214 performs the calculation using the inverse characteristic of the LPF characteristic indicated by the line LN6 in FIG.
　１／ＬＰＦ２１４による演算に基づいてオーディオ信号の周波数に対応する重み付けが演算され、ＤＲＣ演算部２１５がレベル制御を行う際の重み付けが設定される。ラインＬＮ６により示されるＬＰＦの特性の逆特性を用いた演算により、低域では所定のレベル（通常の閾値）を超えた場合にレベルを圧縮し、高域では所定のレベルより低いレベル（通常の閾値より小さく設定された閾値）を超えた場合にレベルを圧縮するような重み付けがＤＲＣ演算部２１５に設定され、ＤＲＣ演算部２１５により重み付けに基づくレベル制御がなされる。 The weighting corresponding to the frequency of the audio signal is calculated based on the calculation by the 1/LPF 214, and the weighting when the DRC calculation unit 215 performs the level control is set. By the calculation using the inverse characteristic of the LPF characteristic indicated by the line LN6, the level is compressed when it exceeds a predetermined level (normal threshold value) in the low frequency range, and the level lower than the predetermined level (normal value) in the high frequency range. Weighting is set in the DRC calculation unit 215 so as to compress the level when the threshold value is set smaller than the threshold value), and the DRC calculation unit 215 performs level control based on the weighting.
　理解を容易とするために、具体例を挙げて説明する。ＤＲＣ演算部２１５が、通常は、オーディオ信号のレベルが－６ｄＢを超えた場合にオーディオ信号のレベルを下げる例を考える。オーディオ信号の周波数が低域（例えば、１ｋＨｚから２ｋＨｚ程度）の場合は、上述したように、オーディオ信号のレベルが－６ｄＢを超えた場合にＤＲＣ演算部２１５が動作する。オーディオ信号の周波数が高域（例えば、４ｋＨｚ程度）の場合は、オーディオ信号のレベルがより低いレベル（例えば、－８ｄＢ）を超えた場合にＤＲＣ演算部２１５が動作する。これにより、高域では、ＤＲＣ演算部２１５によるレベル制御が低域に比べてかかりやすくなる。かかる処理により、圧電素子２３が動作補償範囲を超える温度上昇となることを防止することができる。 　To make it easier to understand, we will explain using specific examples. Consider an example in which the DRC calculation unit 215 normally lowers the level of the audio signal when the level of the audio signal exceeds −6 dB. When the frequency of the audio signal is in the low range (for example, about 1 kHz to 2 kHz), as described above, the DRC operation unit 215 operates when the level of the audio signal exceeds −6 dB. When the frequency of the audio signal is in the high range (for example, about 4 kHz), the DRC calculation unit 215 operates when the level of the audio signal exceeds a lower level (for example, -8 dB). As a result, in the high range, the level control by the DRC calculation unit 215 is easier to perform than in the low range. By such processing, it is possible to prevent the temperature of the piezoelectric element 23 from exceeding the operation compensation range.
　図９は、上述した保護動作を行った場合の効果の一例を説明するための図である。図７と同様に、図９のグラフにおける横軸は周波数［ｋＨｚ］、縦軸は圧電素子２３の温度上昇（温度変化（Δｔ））［℃］を示している。ラインＬＮ１１は、上述した保護動作を行わない場合の圧電素子２３の温度上昇の変化を示し、ラインＬＮ１２は、上述した保護動作を行わない場合の圧電素子２３の温度上昇の変化を示している。図９のラインＬＮ１１に示すように、上述した発熱保護回路２１Ａによる保護動作により、圧電素子２３の温度上昇が動作補償範囲を超えてしまうことを防止することができる。 FIG. 9 is a diagram for explaining an example of the effect when the above-described protection operation is performed. Similar to FIG. 7, the horizontal axis in the graph of FIG. 9 represents frequency [kHz], and the vertical axis represents temperature rise (temperature change (Δt)) [° C.] of the piezoelectric element 23. A line LN11 shows a change in temperature rise of the piezoelectric element 23 when the above-mentioned protection operation is not performed, and a line LN12 shows a change in temperature rise of the piezoelectric element 23 when the above-mentioned protection operation is not performed. As shown by the line LN11 in FIG. 9, it is possible to prevent the temperature rise of the piezoelectric element 23 from exceeding the operation compensation range by the protection operation by the heat protection circuit 21A described above.
　なお、本実施の形態では、ＤＲＣ演算部２１５におけるアタックタイム及びリリースタイムを通常より大きくする。図１０を参照して、アタックタイム及びリリースタイムについて説明する。図１０に示すように、アタックタイムとは、入力オーディオ信号のレベルがスレッショルドを超えたときに圧縮が完全に有効になるまでの時間を意味する（図１０中、ＴＡ～Ｔａの期間）。また、リリースタイムとは、入力オーディオ信号のレベルがスレッショルドを下回ったときに、圧縮が完全に無効になるまでの時間である（図１０中、ＴＢ～ｔｂの期間）。アタックタイム及びリリースタイムの合計が、所定の時間より大きくなるように設定される。アタックタイム及びリリースタイムの合計は、例えば、数百ｍｓｅｃ程度に設定される。 Note that in the present embodiment, the attack time and release time in the DRC calculation unit 215 are made longer than usual. The attack time and the release time will be described with reference to FIG. As shown in FIG. 10, the attack time means the time until the compression becomes completely effective when the level of the input audio signal exceeds the threshold (the period from TA to Ta in FIG. 10). Further, the release time is the time until the compression is completely disabled when the level of the input audio signal falls below the threshold (the period from TB to tb in FIG. 10). The total of the attack time and the release time is set to be longer than the predetermined time. The total attack time and release time is set to, for example, about several hundred msec.
　通常のオーディオ信号は、速い時間でレベルが変化するため、一般的には、ＤＲＣ制御をする上でアタックタイム及びリリースタイムタイムが小さく設定されており、オーディオ信号のレベル変化に追従してＤＲＣ制御が行われるようになされている。また、通常のオーディオ信号は、速い時間でレベルが変化するため、圧電素子２３の温度上昇が動作補償範囲を超える程度の極端なものになってしまう虞は小さい。しかしながら、通常のオーディオ信号とは異なり、周期的なレベル変化を示す定常信号（例えば、サイン波）の場合は、音響エネルギーが高く、圧電素子２３の極端な温度上昇を招来する虞が高くなる。従って、本実施の形態では、通常のオーディオ信号とは異なり、入力されるオーディオ信号が極端な信号（例えば、サイン波のような定常信号）が入力された場合に、ＤＲＣ演算部２１５によるＤＲＣ制御が行われるようにする。かかる制御は、ＤＲＣ演算部２１５におけるアタックタイム及びリリースタイムの合計を所定より長く設定することにより実現することができる。 Since the level of a normal audio signal changes in a short time, the attack time and the release time time are generally set to be small when performing DRC control, and the DRC control is performed by following the level change of the audio signal. Is being done. In addition, since the level of a normal audio signal changes in a short time, there is little possibility that the temperature rise of the piezoelectric element 23 will be an extreme one exceeding the operation compensation range. However, unlike a normal audio signal, in the case of a stationary signal (for example, a sine wave) that exhibits a periodic level change, the acoustic energy is high, and the temperature of the piezoelectric element 23 may increase extremely. Therefore, in the present embodiment, unlike the normal audio signal, when the input audio signal is an extreme signal (for example, a stationary signal such as a sine wave), the DRC calculation unit 215 performs the DRC control. To be done. Such control can be realized by setting the total of the attack time and the release time in the DRC calculation unit 215 longer than a predetermined value.
（スルーレート制限部、クリッパ及びフィルタ部について）
　次に、スルーレート制限部２１Ｂ、クリッパ２１Ｃ及びフィルタ部２１Ｄについて説明する。スルーレート制限部２１Ｂ、クリッパ２１Ｃ及びフィルタ部２１Ｄが動作することにより、圧電素子２３に大電流が流れる問題を回避する保護動作が行われる。 (About slew rate limiter, clipper and filter)
Next, the slew rate limiting unit 21B, the clipper 21C, and the filter unit 21D will be described. By operating the slew rate limiting unit 21B, the clipper 21C, and the filter unit 21D, a protection operation for avoiding the problem of a large current flowing through the piezoelectric element 23 is performed.
　Ｄ級アンプ２２のインダクタ２２Ａと、圧電素子２３の容量成分とにより直列共振が生じる点については説明した。直列共振点の周波数ｆ0は、下記の式１により導出される。 It has been described that the inductor 22A of the class D amplifier 22 and the capacitive component of the piezoelectric element 23 cause series resonance. The frequency f 0 at the series resonance point is derived by the following equation 1.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
　本実施の形態では、インダクタ２２Ａのインダクタ成分及び圧電素子２３の容量成分の少なくとも一方の値を調整し、周波数ｆ0が再生帯域外となるようにする。例えば、再生帯域の上限が４０ｋＨｚである場合には、周波数ｆ0が６０ｋＨｚとなるように、インダクタ２２Ａ及び圧電素子２３を選定する。再生帯域外の信号は入力されないため、直列共振に起因する悪影響（大電流の発生等）を抑制することができる。 In the present embodiment, the value of at least one of the inductor component of the inductor 22A and the capacitance component of the piezoelectric element 23 is adjusted so that the frequency f 0 is outside the reproduction band. For example, when the upper limit of the reproduction band is 40 kHz, the inductor 22A and the piezoelectric element 23 are selected so that the frequency f 0 is 60 kHz. Since a signal outside the reproduction band is not input, it is possible to suppress adverse effects (generation of large current, etc.) due to series resonance.
　圧電素子２３に大電流が流れる他の要因としては、Ｄ級アンプ２２のサチュレーションが挙げられる。サチュレーションとは、Ｄ級アンプ２２に、過剰なレベルの信号が入力されることで飽和しひずみを発生することを意味する。そこで、ＤＰＳ２１のクリッパ２１Ｃは、Ｄ級アンプ２２がサチュレーションしない低いレベルでオーディオ信号をクリップする。例えば、フルスケールから－１ｄＢ下で信号をクリップする。これにより、Ｄ級アンプ２２がサチュレーションしてしまうことを防止する。 Another factor that causes a large current to flow in the piezoelectric element 23 is the saturation of the class D amplifier 22. Saturation means that an excessive level of signal is input to the class D amplifier 22 to saturate and generate distortion. Therefore, the clipper 21C of the DPS 21 clips the audio signal at a low level that the class D amplifier 22 does not saturate. For example, clip the signal -1 dB below full scale. This prevents the class D amplifier 22 from being saturated.
　上述したように、高調波が直列共振点と重なりオーバーカレントが発生する虞がある。そこで、本実施の形態では、クリッパ２１Ｃの後段に配されるフィルタ部２１Ｄが、高調波を直列共振点の周波数ｆ0近傍から除去する。これにより、オーバーカレントによりＤ級アンプ２２がシャットダウンしてしまうことを防止することができる。 As described above, the harmonics may overlap the series resonance points, and overcurrent may occur. Therefore, in the present embodiment, the filter unit 21D arranged after the clipper 21C removes harmonics from the vicinity of the frequency f 0 at the series resonance point. This can prevent the class D amplifier 22 from shutting down due to overcurrent.
　更に、クリッパ２１Ｃによるオーディオ信号のレベルのクリップが行われても、入力レベルに比例した電流が流れる。換言すれば、オーディオ信号のレベルのクリップが行われても、大電流が流れてしまう虞がある。この点について図１１を参照して説明する。 Furthermore, even if the clipper 21C clips the audio signal level, a current proportional to the input level flows. In other words, a large current may flow even if the audio signal level is clipped. This point will be described with reference to FIG.
　圧電素子２３をコンデンサと見なした場合、コンデンサに蓄えられる電荷Ｑは電位Ｖに比例する。比例定数をＣとすると、電荷Ｑは、下記の式２によって表すことができる。 When the piezoelectric element 23 is regarded as a capacitor, the charge Q stored in the capacitor is proportional to the potential V. When the constant of proportionality is C, the charge Q can be expressed by the following equation 2.
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
　数式２を微分すると、下記の数式３が得られる。 Differentiating Equation 2 yields Equation 3 below.
Figure JPOXMLDOC01-appb-M000003
Figure JPOXMLDOC01-appb-M000003
　電荷の時間変化は、電流に対応することから、圧電素子２３に流れる電流Ｉは、下記の数式４によって表すことができる。 Since the time change of the electric charge corresponds to the electric current, the electric current I flowing through the piezoelectric element 23 can be expressed by the following mathematical formula 4.
Figure JPOXMLDOC01-appb-M000004
Figure JPOXMLDOC01-appb-M000004
　図１１は、入力信号をサイン波とした場合に、所定のシミュレーション回路におけるサイン波の電圧及び当該回路に流れる電流の波形を示している。図１１における横軸は時間軸を示し、縦軸は電圧［Ｖ］（Ｙ１と記載されている軸）又は電流［μＡ］（Ｙ２と記載されている軸）の大きさを示している。また、図１１におけるラインＬＮ２１はサイン波の電圧の変化を示し、ラインＬＮ２２はサイン波の電流の変化を示し、ラインＬＮ２３はクリップ後のサイン波の電圧の変化を示し、ラインＬＮ２４はクリップ後のサイン波の電流の変化を示している。 FIG. 11 shows waveforms of a sine wave voltage in a predetermined simulation circuit and a current flowing in the circuit when the input signal is a sine wave. The horizontal axis in FIG. 11 represents the time axis, and the vertical axis represents the magnitude of voltage [V] (axis labeled Y1) or current [μA] (axis labeled Y2). In addition, line LN21 in FIG. 11 indicates a change in sine wave voltage, line LN22 indicates a change in sine wave current, line LN23 indicates a change in sine wave voltage after clipping, and line LN24 indicates a line after clipping. The change of the electric current of a sine wave is shown.
　上述した数式４に示すように、圧電素子２３に流れる電流は、電圧の時間的変化に依存する。従って、電圧をクリップした場合でも電圧の時間的変化が大きい（例えば、図９における参照符号ＡＡを付した箇所）と、最大電流は変わらない。かかる点を考慮して、スルーレート制限部２１Ｂは、電流を制限する。スルーレート制限部２１Ｂは、公知の方法を適用して電流を制限する。例えば、電圧の時間的変化が小さくなるような制御を行うことにより、電流が小さくなるような制御を行う。以上説明したようにして、オーバーカレントに対応する保護がなされる。 As shown in Equation 4 above, the current flowing through the piezoelectric element 23 depends on the temporal change in voltage. Therefore, even when the voltage is clipped, the maximum current does not change if the time-dependent change in the voltage is large (for example, the part indicated by reference numeral AA in FIG. 9). In consideration of this point, the slew rate limiting unit 21B limits the current. The slew rate limiting unit 21B limits the current by applying a known method. For example, the control is performed such that the current is reduced by performing the control such that the temporal change of the voltage is reduced. As described above, protection against overcurrent is provided.
　以上、本開示の実施の形態について説明した。本開示によれば、圧電素子の特性に起因する様々な問題に対して適切な保護動作を行うことが可能となる。具体的には、圧電素子の発熱、圧電素子の発振及びオーバーカレントによるＤ級アンプのシャットダウンに対して適切な保護動作を行うことが可能となる。 The embodiments of the present disclosure have been described above. According to the present disclosure, it is possible to perform an appropriate protection operation against various problems caused by the characteristics of the piezoelectric element. Specifically, it is possible to perform an appropriate protection operation against the heat generation of the piezoelectric element, the oscillation of the piezoelectric element, and the shutdown of the class D amplifier due to overcurrent.
　なお、本開示の信号処理回路に一般的な信号処理回路に用いられる保護抵抗が接続されていても良い。しかしながら、上述したように、保護抵抗を用いないことにより、消費電力の低減及びコストの低減を図ることができるので、保護抵抗を用いないことが好ましい。図１２は、保護抵抗の有無による消費電力の違いを示している。図１２のグラフの横軸は周波数［Ｈｚ］を示し、縦軸は電力［Ｗ］を示している。図１２のグラフにおけるラインＬＮ３１は、信号処理回路に保護抵抗が有る場合の周波数毎の消費電力を示しており、ラインＬＮ３２は、信号処理回路に保護抵抗がない場合の周波数毎の消費電力を示している。図１２のグラフからわかるように、保護抵抗がない場合の方が、信号処理回路における消費電力が低くなっている。 Note that a protection resistor used in a general signal processing circuit may be connected to the signal processing circuit of the present disclosure. However, as described above, since the power consumption and the cost can be reduced by not using the protective resistor, it is preferable not to use the protective resistor. FIG. 12 shows the difference in power consumption depending on the presence or absence of the protection resistor. The horizontal axis of the graph in FIG. 12 represents frequency [Hz] and the vertical axis represents power [W]. The line LN31 in the graph of FIG. 12 shows the power consumption for each frequency when the signal processing circuit has a protection resistor, and the line LN32 shows the power consumption for each frequency when the signal processing circuit has no protection resistor. ing. As can be seen from the graph of FIG. 12, the power consumption in the signal processing circuit is lower when there is no protection resistor.
＜変形例＞
　以上、本開示の実施の形態について具体的に説明したが、本開示の内容は上述した実施の形態に限定されるものではなく、本開示の技術的思想に基づく各種の変形が可能である。 <Modification>
Although the embodiments of the present disclosure have been specifically described above, the content of the present disclosure is not limited to the above-described embodiments, and various modifications can be made based on the technical idea of the present disclosure.
　上述した信号処理回路における回路構成は、本開示の趣旨を逸脱しない範囲で適宜、変更することができる。また、本開示の信号処理回路は、スピーカー装置だけでなく、容量性負荷を駆動する信号処理回路一般に対して適用することができる。 The circuit configuration of the signal processing circuit described above can be appropriately changed without departing from the spirit of the present disclosure. Further, the signal processing circuit of the present disclosure can be applied to not only the speaker device but also a general signal processing circuit that drives a capacitive load.
　上述の実施の形態において挙げた構成、方法、工程、形状、材料及び数値などはあくまでも例に過ぎず、必要に応じてこれと異なる構成、方法、工程、形状、材料及び数値などを用いてもよい。上述した実施の形態および変形例は、適宜組み合わせることができる。 The configurations, methods, steps, shapes, materials and numerical values mentioned in the above embodiments are merely examples, and different configurations, methods, steps, shapes, materials and numerical values may be used if necessary. Good. The above-described embodiments and modifications can be combined as appropriate.
　本開示は、以下の構成も採ることができる。
（１）
　アンプと、
　前記アンプの入力側に接続される保護回路と、
　前記アンプの出力側に接続される容量性負荷と
　を有し、
　前記保護回路は、
　入力信号のレベルを所定より低いレベルにクリップするクリッパと、
　前記クリッパの出力に含まれる高調波を除去するフィルタ部とを有する
　スピーカー装置。
（２）
　前記アンプは、出力段にインダクタ成分を有し、
　前記インダクタ成分と前記容量性負荷が有する容量成分とにより規定される直列共振点が再生帯域外となるように設定されている
　（１）に記載のスピーカー装置。
（３）
　前記アンプと前記容量性負荷とが直結されている
　（１）又は（２）に記載のスピーカー装置。
（４）
　前記保護回路は、
　前記入力信号のレベルが閾値を超えた場合に、当該レベルを圧縮するレベル制御部を有し、
　所定の周波数より高域になるにつれて、前記閾値が小さくなるように設定される
　（１）から（３）までの何れかに記載のスピーカー装置。
（５）
　前記容量性負荷の温度上昇特性に応じて設定されたフィルタ特性の逆特性に基づいて前記閾値が変化する
　（４）に記載のスピーカー装置。
（６）
　前記入力信号が定常的な信号である場合に前記レベル制御部が動作するように、前記レベル制御部のアタックタイム及びリリースタイムが設定されている
　（４）又は（５）に記載のスピーカー装置。
（７）
　前記アタックタイム及び前記リリースタイムが所定の値より大きく設定されている
　（６）に記載のスピーカー装置。
（８）
　前記レベル制御部は、前記入力信号に対してハイパスフィルタによるフィルタ処理が行われた信号に対して行われる
　（４）から（６）までの何れかに記載のスピーカー装置。
（９）
　前記保護回路は、電流を制限するスルーレート制限部を有する
　（１）から（８）までの何れかに記載のスピーカー装置。
（１０）
　前記容量性負荷が動作することにより振動する振動部を有する
　（１）から（９）までの何れかに記載のスピーカー装置。
（１１）
　入力信号のレベルを所定より低いレベルにクリップするクリッパと、
　前記クリッパの出力に含まれる高調波を除去するフィルタ部とを有する
　信号処理回路。 The present disclosure can also take the following configurations.
(1)
An amplifier,
A protection circuit connected to the input side of the amplifier,
And a capacitive load connected to the output side of the amplifier,
The protection circuit is
A clipper that clips the level of the input signal to a level lower than a predetermined level,
A speaker device comprising: a filter unit that removes harmonics included in the output of the clipper.
(2)
The amplifier has an inductor component in the output stage,
The speaker device according to (1), wherein a series resonance point defined by the inductor component and the capacitive component of the capacitive load is set outside the reproduction band.
(3)
The speaker device according to (1) or (2), wherein the amplifier and the capacitive load are directly connected.
(4)
The protection circuit is
When the level of the input signal exceeds a threshold value, it has a level control unit for compressing the level,
The speaker device according to any one of (1) to (3), wherein the threshold value is set to become smaller as the frequency becomes higher than a predetermined frequency.
(5)
The speaker device according to (4), wherein the threshold value changes based on an inverse characteristic of a filter characteristic set according to a temperature rise characteristic of the capacitive load.
(6)
The speaker device according to (4) or (5), wherein the attack time and the release time of the level control unit are set so that the level control unit operates when the input signal is a steady signal.
(7)
The speaker device according to (6), wherein the attack time and the release time are set to be larger than predetermined values.
(8)
The speaker device according to any one of (4) to (6), wherein the level control unit is performed on a signal obtained by performing a filtering process on the input signal with a high-pass filter.
(9)
The speaker device according to any one of (1) to (8), wherein the protection circuit includes a slew rate limiting unit that limits current.
(10)
The speaker device according to any one of (1) to (9), including a vibrating portion that vibrates when the capacitive load operates.
(11)
A clipper that clips the level of the input signal to a level lower than a predetermined level,
A signal processing circuit, comprising: a filter unit that removes harmonics included in the output of the clipper.
　１・・・スピーカー装置、３・・・振動部、２０・・・信号処理回路、２１・・・ＤＳＰ、２１Ａ・・・発熱保護回路、２１Ｂ・・・スルーレート制限部、２１Ｃ・・・クリッパ、２１Ｄ・・・フィルタ部、２２・・・Ｄ級アンプ、２３・・・圧電素子、２１１・・・ハイパスフィルタ、２１４・・・１／ＬＰＦ、２１５・・・ＤＲＣ演算部 DESCRIPTION OF SYMBOLS 1... Speaker device, 3... Vibrating section, 20... Signal processing circuit, 21... DSP, 21A... Heat generation protection circuit, 21B... Slew rate limiting section, 21C... Clipper , 21D... Filter section, 22... Class D amplifier, 23... Piezoelectric element, 211... High-pass filter, 214... 1/LPF, 215... DRC calculation section

Claims (11)

  1. 　アンプと、
    　前記アンプの入力側に接続される保護回路と、
    　前記アンプの出力側に接続される容量性負荷と
    　を有し、
    　前記保護回路は、
    　入力信号のレベルを所定より低いレベルにクリップするクリッパと、
    　前記クリッパの出力に含まれる高調波を除去するフィルタ部とを有する
    　スピーカー装置。     An amplifier,
    A protection circuit connected to the input side of the amplifier,
    And a capacitive load connected to the output side of the amplifier,
    The protection circuit is
    A clipper that clips the level of the input signal to a level lower than a predetermined level,
    A speaker device comprising: a filter unit that removes harmonics included in the output of the clipper.
  2. 　前記アンプは、出力段にインダクタ成分を有し、
    　前記インダクタ成分と前記容量性負荷が有する容量成分とにより規定される直列共振点が再生帯域外となるように設定されている
    　請求項１に記載のスピーカー装置。     The amplifier has an inductor component in the output stage,
    The speaker device according to claim 1, wherein a series resonance point defined by the inductor component and the capacitive component of the capacitive load is set to be outside a reproduction band.
  3. 　前記アンプと前記容量性負荷とが直結されている
    　請求項１に記載のスピーカー装置。     The speaker device according to claim 1, wherein the amplifier and the capacitive load are directly connected to each other.
  4. 　前記保護回路は、
    　前記入力信号のレベルが閾値を超えた場合に、当該レベルを圧縮するレベル制御部を有し、
    　所定の周波数より高域になるにつれて、前記閾値が小さくなるように設定される
    　請求項１に記載のスピーカー装置。     The protection circuit is
    When the level of the input signal exceeds a threshold value, it has a level control unit for compressing the level,
    The speaker device according to claim 1, wherein the threshold value is set to become smaller as the frequency becomes higher than a predetermined frequency.
  5. 　前記容量性負荷の温度上昇特性に応じて設定されたフィルタ特性の逆特性に基づいて前記閾値が変化する
    　請求項４に記載のスピーカー装置。     The speaker device according to claim 4, wherein the threshold value changes based on an inverse characteristic of a filter characteristic set according to a temperature increase characteristic of the capacitive load.
  6. 　前記入力信号が定常的な信号である場合に前記レベル制御部が動作するように、前記レベル制御部のアタックタイム及びリリースタイムが設定されている
    　請求項４に記載のスピーカー装置。     The speaker device according to claim 4, wherein an attack time and a release time of the level control unit are set so that the level control unit operates when the input signal is a steady signal.
  7. 　前記アタックタイム及び前記リリースタイムが所定の値より大きく設定されている
    　請求項６に記載のスピーカー装置。     The speaker device according to claim 6, wherein the attack time and the release time are set to be larger than predetermined values.
  8. 　前記レベル制御部は、前記入力信号に対してハイパスフィルタによるフィルタ処理が行われた信号に対して行われる
    　請求項４に記載のスピーカー装置。     The speaker device according to claim 4, wherein the level control unit is performed on a signal obtained by subjecting the input signal to a filtering process by a high-pass filter.
  9. 　前記保護回路は、電流を制限するスルーレート制限部を有する
    　請求項１に記載のスピーカー装置。     The speaker device according to claim 1, wherein the protection circuit includes a slew rate limiting unit that limits current.
  10. 　前記容量性負荷が動作することにより振動する振動部を有する
    　請求項１に記載のスピーカー装置。     The speaker device according to claim 1, further comprising a vibrating section that vibrates when the capacitive load operates.
  11. 　入力信号のレベルを所定より低いレベルにクリップするクリッパと、
    　前記クリッパの出力に含まれる高調波を除去するフィルタ部とを有する
    　信号処理回路。     A clipper that clips the level of the input signal to a level lower than a predetermined level,
    A signal processing circuit, comprising: a filter unit that removes harmonics included in the output of the clipper.
PCT/JP2019/045957 2018-12-26 2019-11-25 Speaker device and signal processing circuit WO2020137299A1 (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5737432A (en) * 1996-11-18 1998-04-07 Aphex Systems, Ltd. Split-band clipper
WO2007119362A1 (en) * 2006-03-22 2007-10-25 Nec Corporation Audio circuit
JP2009065427A (en) * 2007-09-06 2009-03-26 Yamaha Corp Power amplifier for audible signal
JP2012217026A (en) * 2011-03-31 2012-11-08 Nec Casio Mobile Communications Ltd Oscillation device and electronic apparatus
JP2012217010A (en) * 2011-03-31 2012-11-08 Nec Casio Mobile Communications Ltd Oscillation device and electronic apparatus
JP2018507608A (en) * 2015-01-19 2018-03-15 デヴィアレ Device for controlling loudspeakers with current limiting

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5737432A (en) * 1996-11-18 1998-04-07 Aphex Systems, Ltd. Split-band clipper
WO2007119362A1 (en) * 2006-03-22 2007-10-25 Nec Corporation Audio circuit
JP2009065427A (en) * 2007-09-06 2009-03-26 Yamaha Corp Power amplifier for audible signal
JP2012217026A (en) * 2011-03-31 2012-11-08 Nec Casio Mobile Communications Ltd Oscillation device and electronic apparatus
JP2012217010A (en) * 2011-03-31 2012-11-08 Nec Casio Mobile Communications Ltd Oscillation device and electronic apparatus
JP2018507608A (en) * 2015-01-19 2018-03-15 デヴィアレ Device for controlling loudspeakers with current limiting

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