WO2020134812A1 - 终端设备、转接器及充电方法 - Google Patents

终端设备、转接器及充电方法 Download PDF

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Publication number
WO2020134812A1
WO2020134812A1 PCT/CN2019/121219 CN2019121219W WO2020134812A1 WO 2020134812 A1 WO2020134812 A1 WO 2020134812A1 CN 2019121219 W CN2019121219 W CN 2019121219W WO 2020134812 A1 WO2020134812 A1 WO 2020134812A1
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WIPO (PCT)
Prior art keywords
pin
pins
interface
group
application processor
Prior art date
Application number
PCT/CN2019/121219
Other languages
English (en)
French (fr)
Inventor
黄业伟
Original Assignee
维沃移动通信有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 维沃移动通信有限公司 filed Critical 维沃移动通信有限公司
Priority to EP19904790.3A priority Critical patent/EP3905714A4/en
Publication of WO2020134812A1 publication Critical patent/WO2020134812A1/zh
Priority to US17/352,908 priority patent/US11860805B2/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R31/00—Coupling parts supported only by co-operation with counterpart
    • H01R31/06—Intermediate parts for linking two coupling parts, e.g. adapter
    • H01R31/065—Intermediate parts for linking two coupling parts, e.g. adapter with built-in electric apparatus
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/00032—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by data exchange
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0042—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by the mechanical construction
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0042—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by the mechanical construction
    • H02J7/0045—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by the mechanical construction concerning the insertion or the connection of the batteries
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • H04R1/1025—Accumulators or arrangements for charging
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • H04R1/1041—Mechanical or electronic switches, or control elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0042—Universal serial bus [USB]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/38—Universal adapter
    • G06F2213/3806—Mobile device
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J2207/30—Charge provided using DC bus or data bus of a computer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • H04R1/1033—Cables or cables storage, e.g. cable reels
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R2420/00—Details of connection covered by H04R, not provided for in its groups
    • H04R2420/05—Detection of connection of loudspeakers or headphones to amplifiers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R2420/00—Details of connection covered by H04R, not provided for in its groups
    • H04R2420/09—Applications of special connectors, e.g. USB, XLR, in loudspeakers, microphones or headphones

Definitions

  • the embodiments of the present disclosure relate to the field of communication technologies, and in particular, to a terminal device, an adapter, and a charging method.
  • the Type-C interface of mobile terminals has gradually been popularized. At the same time, the removal of the 3.5mm interface has become a trend.
  • the Type-C interface needs to output digital audio and analog audio, and also needs to meet the charging needs.
  • the way to output digital audio is digital analog
  • the conversion chip and the headphone amplifier chip are placed on the headset.
  • the headset is called a digital headset, or use the Type-C interface to 3.5mm interface adapter cable, the digital-analog conversion chip and the headphone amplifier chip are placed on the adapter line, and the 3.5mm interface is connected.
  • 3.5mm analog earphones are enough. Using digital earphones will completely occupy the Type-C interface and cannot be charged.
  • Most popular earphones on the market are mainly 3.5mm interfaces.
  • the one-to-two adapter When there is only a Type-C interface and no 3.5mm headphone jack, the one-to-two adapter is required for simultaneous charging and headphone functions.
  • This solution is for ordinary charging, and the charging speed is slow; the commonly used various fast charging methods need to occupy the interface At the D+, D- pin, and these two pins generally multiplex the left channel L pin of the audio output of the earphone and the right channel R pin of the audio output, so the fast charging mode cannot be used when the headphone function is affected.
  • User experience When there is only a Type-C interface and no 3.5mm headphone jack, the one-to-two adapter is required for simultaneous charging and headphone functions.
  • This solution is for ordinary charging, and the charging speed is slow; the commonly used various fast charging methods need to occupy the interface At the D+, D- pin, and these two pins generally multiplex the left channel L pin of the audio output of the earphone and the right channel R pin of the audio output, so the fast charging mode cannot be used
  • the purpose of the present disclosure is to provide a terminal device, an adapter, and a charging method to solve the problem that when a mobile terminal with a Type-C interface realizes the charging function and the headset function at the same time through the one-to-two adapter, the charging speed is slow problem.
  • an embodiment of the present disclosure provides a terminal device, including:
  • a first Type-C interface includes: a first group of pins and a second group of pins;
  • a first switching unit, the first group of pins is connected to an application processor headset interface or an application processor fast charging interface of the terminal device through the first switching unit;
  • a second switch unit, the second group of pins is connected to the application processor headset interface or the application processor fast charging interface of the terminal device through the second switch unit;
  • a controller controls the first switch unit to connect the first group of pins to the application processor headset interface when the impedance value of the first group of pins to ground is within a preset range And control the second switch unit to connect the second group of pins with the fast charging interface of the application processor;
  • control the second switch unit to connect the second group of pins to the application processor headset interface, and control the The first switch unit connects the first group of pins with the fast charging interface of the application processor.
  • an embodiment of the present disclosure also provides an adapter, including:
  • a second Type-C interface includes a headphone pin and a data transmission pin
  • the earphone pin is connected to the first group of pins of the terminal device, and the data transmission pin is connected to the second group of pins of the terminal device;
  • the earphone pin is connected to the second group of pins of the terminal device, and the data transmission pin is connected to the first group of pins of the terminal device.
  • an embodiment of the present disclosure also provides a charging method, which is applied to the terminal device described above, and the charging method includes:
  • the target pin includes a first group of pins and/or a second group of pins
  • the controller controls one of the first switch unit and the second switch unit to communicate with the application processor headset according to the impedance value of the first group of pins or the second group of pins to ground Interface, and control the remaining one switch unit to connect with the fast charge interface of the application processor, so that the user can use the headset function at the same time, but also in the fast charge mode for fast charging.
  • FIG. 1 is a schematic structural diagram of a terminal device and an adapter according to an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of a first Type-C interface in a terminal device according to an embodiment of the present disclosure
  • FIG. 3 is a schematic flowchart of a charging method in an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of connection of a terminal device, an adapter, a charger, and an earphone according to an embodiment of the present disclosure.
  • the DP pin and DN pin are occupied by the L and R pins, respectively, so that when using the headset, only the voltage bus (voltage bus) can be used.
  • VBUS ordinary charging, fast charging mode can not be used, and charging is not controlled, safety is affected.
  • an embodiment of the present disclosure provides a terminal device, as shown in FIG. 1, including:
  • the first Type-C interface is connected to the converter.
  • the first Type-C interface includes: a first group of pins and a second group of pins.
  • the first group of pins can be connected to the earphone interface or Type-C charging interface of the converter, and the second group of pins can be connected to the type-C charging interface or earphone interface of the converter.
  • the second group of pins is connected to the Type-C charging interface of the converter; when the first group of pins is connected to the Type-C charging interface of the converter, the second group of pins Connect to the headphone jack of the converter.
  • the first group of pins includes a first pin and a second pin
  • the second group of pins includes a third pin and a fourth pin
  • the first pin is used as the first pin A first headphone pin and a first data transmission pin of the Type-C interface
  • the second pin is used as a second headphone pin and a second data transmission pin of the first Type-C interface
  • the third pin is used as a first earphone pin and a first data transmission pin of the first Type-C interface
  • the fourth pin is used as a second earphone pin of the first Type-C interface And the second data transmission pin.
  • the first group of pins is the A6 and A7 pins of the first Type-C interface
  • the second group of pins is the B6 and B7 pins of the first Type-C interface
  • the first group of pins may also be B6 and B7 pins
  • the second group of pins may be A6 and A7 pins.
  • the A6 is the first pin, and the B6 is the third pin. Both A6 and B6 are used as the first headphone pin and the first data transmission pin of the first Type-C interface, specifically the DP/R lead A7 is the second pin and B7 is the fourth pin. Both A7 and B7 are used as the second headphone pin and the second data transmission pin of the first Type-C interface, specifically DN/L Pins. That is, the first data transmission pin (DP pin) multiplexes the first earphone pin (R pin), and the second data transmission pin (DN pin) multiplexes the second earphone pin (L pin).
  • the first Type-C interface shown in Figure 2 when plugging in digital headphones, the A6, A7, B6, and B7 pins output digital audio signals, and when plugging into a universal serial bus (USB) charger, A6, A7 , B6, B7 pin transfer USB signal, enter the fast charging mode.
  • the above-mentioned headphone jack is a 3.5mm headphone jack.
  • the first group of pins is connected to an application processor headset interface or an application processor fast charging interface of the terminal device through the first switching unit.
  • the second group of pins is connected to an application processor headset interface or an application processor fast charging interface of the terminal device through the second switch unit.
  • the application processor headset interface includes R pin and L pin.
  • the fast charging interface of the application processor can be quickly charged through the relevant fast charging protocol.
  • a controller when the impedance value of the first group of pins to the ground is within a preset range, the controller determines that the first group of pins is connected to the headphone interface of the converter, and controls the first switching unit Connecting the first group of pins with the application processor headset interface, and controlling the second switch unit to connect the second group of pins with the application processor fast charging interface;
  • the second switch unit is controlled to communicate with the second A group of pins and an earphone interface of the application processor, and controlling the first switch unit to connect the first group of pins with the fast charging interface of the application processor.
  • the first group of pins is determined to be the earphone pin, and the first switch unit is controlled to connect the first group of pins to the headphone interface of the application processor At this time, it is determined that the second group of pins are used as data transmission pins, and the second switch unit is controlled to connect the second group of pins with the application processor fast charging interface;
  • the second group of pins is determined to be the headphone pin, and the second switch unit is controlled to connect the second pin to the headphone interface of the application processor, and at this time , Determine the first group of pins as data transmission pins, and control the first switch unit to connect the first group of pins with the fast charge interface of the application processor.
  • the fast charging can be performed through the master control unit (MCU) according to the fast charging protocol, and the second group of pins is connected to the fast charging of the application processor.
  • the main control unit MCU can be used for fast charging according to the fast charging protocol.
  • the above controller may be specifically an application processor (application processor, AP) control module.
  • a group of pins is determined as a headphone pin among the first group of pins and the second group of pins, and then the remaining group of pins is used as a charging pin, so that the headphones can be realized simultaneously Function and fast charging function.
  • the controller controls one of the first switch unit and the second switch unit to connect to the application processor headset interface according to the impedance value of the first group of pins or the second group of pins to ground, and Control the remaining one switch unit to connect with the fast charging interface of the application processor, so that the user can use the headset function while performing fast charging in the fast charging mode.
  • the controller controls one of the first switch unit and the second switch unit to communicate with the application processor headset interface according to the ground impedance value of the first group of pins or the second group of pins , So that the remaining one switch unit can be connected to the fast charging interface of the application processor, thereby enabling the user to perform fast charging in the fast charging mode while using the headset function.
  • the first switch unit includes a first switch and a second switch
  • the second switch unit includes a third switch and a fourth switch
  • the first switch is respectively connected to the second pin (A7 pin) in the first group of pins and the first earphone pin (R pin) of the application processor earphone interface ) Connection, or the first switch is connected to the second pin (A7 pin) of the first group of pins and the first data transmission pin (DP lead) of the fast charge interface of the application processor Foot) connection;
  • the second switch (switch 02) is respectively connected to the first pin (A6 pin) in the first group of pins and the second headphone pin (L pin) of the application processor headphone interface Or, the second switch is connected to the first pin (A6 pin) of the first group of pins and the second data transmission pin (DN pin) of the fast charge interface of the application processor connection;
  • the third switch (switch 03) is respectively connected to the fourth pin (B7 pin) in the second group of pins and the first earphone pin (R pin) of the application processor earphone interface Or, the third switch is connected to the fourth pin (B7 pin) of the second group of pins and the first data transmission pin (DP pin) of the fast charge interface of the application processor connection;
  • the fourth switch (switch 04) is respectively connected to the third pin (B6 pin) in the second group of pins and the second headphone pin (L pin) of the application processor headphone interface Or, the fourth switch is connected to the third pin (B6 pin) of the second group of pins and the second data transmission pin (DN pin) of the fast charge interface of the application processor connection.
  • the first switch, the second switch, the third switch, and the fourth switch are all single-pole double-throw switches;
  • the fixed end of the first switch is connected to the second pin of the first group of pins, and the movable end of the first switch is connected to the first headset pin of the headset interface of the application processor or The first data transmission pin connection of the fast charging interface of the application processor;
  • the fixed end of the second switch is connected to the first pin of the first group of pins, and the movable end of the second switch is connected to the second headset pin of the headset interface of the application processor or The second data transmission pin of the fast charging interface of the application processor is connected;
  • the fixed end of the third switch is connected to the fourth pin of the second group of pins, and the movable end of the third switch is connected to the first headset pin of the headset interface of the application processor or The first data transmission pin connection of the fast charging interface of the application processor;
  • the fixed end of the fourth switch is connected to the third pin of the second group of pins, and the movable end of the fourth switch is connected to the second headphone pin of the headphone interface of the application processor or The second data transmission pin of the fast charging interface of the application processor is connected.
  • the A6 pin and the B7 pin of the first Type-C interface are separated and connected to different switch units, and the A7 pin and the B6 pin are separated and connected to different switch units,
  • the adapter separates the DP and R pins, DN and L pins separately, A6 and A7 are the DP and DN pins, B6 and B7 are the R and L pins, respectively, where A6 of the adapter Connect the A7 pin to the A6 and A7 pins of the Type-C female socket (Type-C charging interface) of the one-to-two conversion cable (you can also connect the B6 and B7 pins of the female socket at the same time), and the B6 of the one-to-two adapter Connect B7 to the R and L pins of the 3.5mm headphone socket (headphone jack).
  • the CC1 pin and the CC2 pin of the first Type-C interface are short-circuited to the ground, and the mobile terminal detects through the CC1 pin and the CC2 pin.
  • Determine whether the slave device is an analog headset For example, if the voltage of the CC1 pin and the CC2 pin is less than the preset voltage threshold, the slave device is determined to be an analog headset device; for the A6 pin, A7 pin, B6 pin and B7 pin For ground impedance detection, if it falls within the preset range, it is determined as the type of headset.
  • the switch is switched to Corresponding path, that is, the A6, A7 pin and the headphone interface of the application processor of the terminal device. If the impedance of the B6 and B7 pins falls outside the headphone type, the USB type is determined, and the control switch is switched to the corresponding path, which is connected to B6.
  • the headphone type channel is switched to the headphone output, and the USB type channel is switched to the USB channel; the charger will charge VBUS to the mobile terminal, and after the mobile terminal detects VBUS charging, turn on the fast Charging protocol charging, to achieve fast charging and headset functions.
  • an adapter including:
  • the second Type-C interface is an earphone interface and a Type-C charging interface respectively connected to the second Type-C interface.
  • the earphone interface is specifically a 3.5mm earphone interface, and the earphone is connected through the earphone interface.
  • the above Type-C charging interface is used to connect a charger, and fast charging can be achieved through the Type-C charging interface.
  • the earphone pin is connected to the earphone interface
  • the data transmission pin is connected to the Type-C charging interface
  • the second Type-C interface is connected to a terminal device.
  • the second Type-C interface includes the earphone pin and Data transmission pin.
  • the earphone pin is connected to the first group of pins of the terminal device, and the data transmission pin is connected to the second group of pins of the terminal device;
  • the earphone pin is connected to the second group of pins of the terminal device, and the data transmission pin is connected to the first group of pins of the terminal device.
  • the earphone pin includes a first earphone pin (R pin) and a second earphone pin (L pin), and the data transmission pin includes a first data transmission pin (DP pin) and a first Two data transmission pins (DN pins).
  • the second Type-C interface is specifically a Type-C male socket for connecting terminal equipment, and the above-mentioned first Type-C interface is specifically a Type-C female socket connected to the adapter.
  • the first group of pins is specifically the A6 and A7 pins of the first Type-C interface of the terminal device
  • the second group of pins is specifically the B6 and B7 pins of the first Type-C interface.
  • the first group The pins can also be the B6 and B7 pins of the first Type-C interface
  • the second group of pins are the A6 and A7 pins of the first Type-C interface.
  • the first earphone pin and the second earphone pin are respectively connected to two pins in the first group of pins in one-to-one correspondence, and the first data transmission pin and the second data transmission The pins are respectively connected to the two pins in the second group in a one-to-one correspondence.
  • the first earphone pin and the second earphone pin are respectively connected to two pins in the second group of pins in a one-to-one correspondence, and the first data transmission pin and the second earphone pin
  • the data transmission pins are respectively connected to the two pins in the first group of pins in a one-to-one correspondence.
  • the R pin is connected to the R pin
  • the L pin is connected to the L pin
  • the DP pin is connected to the DP pin
  • the DN pin is connected to the DN pin.
  • the adapter of the embodiment of the present disclosure separates the first data transmission pin (DP pin) and the first earphone pin (R pin) of the second Type-C interface, and separates the second data transmission pin ( DN pin) and the first headphone pin (L pin) are separated, connect the DP and DN pins to the Type-C charging interface, and connect the R pin and L pin to the headphone interface, correspondingly, the terminal device’s
  • the A6 pin and B7 pin of the first Type-C interface are separated and connected to different switch units, and the A7 pin and B6 pin are separated and connected to different switch units, so that the terminal device can achieve fast Charging function and earphone function.
  • Type-C charging interface includes: a first data transmission pin and a second data transmission pin;
  • the first data transmission pin of the Type-C charging interface is connected to the first data transmission pin of the second Type-C interface
  • the second data transmission pin of the Type-C charging interface is connected to the second data transmission pin of the second Type-C interface.
  • the first earphone pin of the earphone interface is connected to the first earphone pin of the second Type-C interface;
  • the second earphone pin of the earphone interface is connected to the second earphone pin of the second Type-C interface.
  • the DP pin of the Type-C charging interface is connected to the DP pin of the second Type-C interface
  • the DN pin of the Type-C charging interface is connected to the second Type-C interface DN pin connection
  • the R pin of the earphone interface is connected to the R pin of the second Type-C interface
  • the L pin of the earphone interface is connected to the L pin of the second Type-C interface.
  • the DP pin and R pin of the second Type-C interface of the adapter are separated, and the DN and L pins are separated.
  • the A6 and A7 pins of the adapter are the DP and DN pins
  • B6 and The B7 pins are R and L pins, respectively
  • the A6 and A7 pins of the adapter are connected to the A6 and A7 pins of the Type-C female socket (Type-C charging interface) of the one-to-two conversion cable (it can also be connected at the same time) (B6 and B7 pins of the female socket)
  • B6 and B7 of the one-to-two adapter are connected to the R and L pins of the 3.5mm headphone socket (headphone jack).
  • An embodiment of the present disclosure also provides a charging method, which is applied to the terminal device described above. As shown in FIG. 3, the charging method includes:
  • Step 301 Detect the impedance value of the target pin to ground to obtain a detection result.
  • the target pin includes a first group of pins and/or a second group of pins.
  • the terminal device is connected to the adapter, and this step may specifically include: detecting whether the external device connected to the adapter is a headset device.
  • the external device connected to the adapter is a headphone device
  • the impedance value of the target pin to ground is detected to obtain a detection result.
  • the target pin includes the first group of pins and/or the second group of pins .
  • the terminal device includes an application processor AP control module, an AP headset interface (including R pin and L pin), and an AP USB interface (including DP pin and DN pin), Switch module (first switch unit and second switch unit), first Type-C interface; the first Type-C interface is connected to a one-to-two adapter, the one-to-two adapter is connected to the charger and 3.5 respectively mm headphone connection.
  • AP control module including R pin and L pin
  • AP USB interface including DP pin and DN pin
  • Switch module first switch unit and second switch unit
  • first Type-C interface is connected to a one-to-two adapter
  • the one-to-two adapter is connected to the charger and 3.5 respectively mm headphone connection.
  • the AP control module is responsible for detecting the CC logic, judging the plug-in device, and controlling the state switching of the switch module.
  • AP headset interface output analog headset signal, generally codec part of codec.
  • AP USB interface Transmission charging protocol interface.
  • Switch module responsible for the switch of the left and right channel output of the headset and the USB port.
  • the AP control module pulls the CC1 pin and the CC2 pin to the ground. After the ground is pulled, the resistance is less than Ra, which is generally 1.2K. If the voltage of the CC1 pin and the CC2 pin is less than the preset voltage threshold, the external device is determined to be Headphone device, otherwise, make sure the external device is another device.
  • Step 302 When the detection result is that the impedance value of the first group of pins to the ground is within a preset range, control the first group of pins to be connected to the headphone interface of the application processor of the terminal device, and control the first The two groups of pins are connected to the fast charging interface of the application processor of the terminal device.
  • the first switch unit is controlled to connect the first group of pins to the application processor headset interface
  • the second switch unit is controlled to connect the second group of pins to the application processor fast charging interface.
  • Step 303 When the detection result is that the impedance value of the second group of pins to the ground is within a preset range, control the second group of pins to connect to the headphone jack of the application processor, and control the The first group of pins is connected to the fast charging interface of the application processor.
  • the second switch unit is controlled to connect the second group of pins to the application processor headset interface
  • the first switch unit is controlled to connect the first group of pins to the application processor fast charge interface
  • step 302 and step 303 are in a parallel relationship.
  • the charging method of the embodiment of the present disclosure detects whether the external device connected to the adapter is a headphone device; when the external device is a headphone device, the impedance value of the target pin to the ground is detected to obtain a detection result.
  • the target pin includes a first group of pins and/or a second group of pins; when the detection result is that the impedance value of the first group of pins to ground is within a preset range, the first group is determined
  • the pin is connected to the headphone interface of the converter, and the first group of pins is connected to the headphone interface of the application processor of the terminal device, and the second group of pins is connected to the fast charging interface of the application processor of the terminal device; or,
  • determine that the second group of pins is connected to the headphone interface of the converter, and control the second group of pins and The application processor earphone interface is connected, and the first group of pins is connected to the application
  • the terminal device of the embodiment of the present disclosure includes a device composed of radio frequency unit, network module, audio output unit, input unit, sensor, display unit, user input unit, interface unit, memory, processor, and power supply.

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Abstract

本公开提供一种终端设备、转接器及充电方法，本公开的终端设备包括：第一Type-C接口，第一Type-C接口包括：第一组引脚和第二组引脚；第一组引脚通过第一开关单元与终端设备的应用处理器耳机接口或应用处理器快充接口连接；第二组引脚通过第二开关单元与应用处理器耳机接口或应用处理器快充接口连接；控制器在第一组引脚的对地阻抗值位于预设范围内时，控制第一开关单元连通第一组引脚和应用处理器耳机接口，控制第二开关单元连通第二组引脚和应用处理器快充接口；或，在第二组引脚的对地阻抗值位于预设范围内时，控制第二开关单元连通第二组引脚和应用处理器耳机接口，控制第一开关单元连通第一组引脚和应用处理器快充接口。

Description

终端设备、转接器及充电方法
相关申请的交叉引用
本申请主张在2018年12月25日在中国提交的中国专利申请号No.201811593365.4的优先权，其全部内容通过引用包含于此。
技术领域
本公开实施例涉及通信技术领域，尤其涉及一种终端设备、转接器及充电方法。
背景技术
移动终端的Type-C接口已经逐渐普及开来，同时，3.5mm接口去除已经成为趋势，Type-C接口需要输出数字音频和模拟音频，也要满足充电需求，输出数字音频的方式是，数模转换芯片和耳机功放芯片放置在耳机上，该耳机称之为数字耳机，或者使用Type-C接口转3.5mm接口转接线，数模转换芯片和耳机功放芯片放置在转接线上，3.5mm接口接3.5mm模拟耳机即可，使用数字耳机会完全占用Type-C接口，不能充电，且市场上流行的耳机多以3.5mm接口为主。
在只有Type-C接口，没有3.5mm耳机接口时，同时充电和耳机功能需要使用一转二转接器，该方案为普通充电，充电速度慢；普遍应用的各种快速充电方式，需要占用接口处的D+，D-脚，而该两个脚一般复用了耳机的音频输出左声道L引脚和音频输出右声道R引脚，因此在耳机功能时，不能使用快充模式，影响了用户体验。
发明内容
本公开的目的在于提供一种终端设备、转接器及充电方法，用以解决带有Type-C接口的移动终端通过一转二转接器同时实现充电功能和耳机功能时，充电速度慢的问题。
为了解决上述技术问题，本公开实施例是这样实现的：
第一方面，本公开实施例提供了一种终端设备，包括：
第一Type-C接口，所述第一Type-C接口包括：第一组引脚和第二组引脚；
第一开关单元，所述第一组引脚通过所述第一开关单元与所述终端设备的应用处理器耳机接口或应用处理器快充接口连接；
第二开关单元，所述第二组引脚通过所述第二开关单元与所述终端设备的应用处理器耳机接口或应用处理器快充接口连接；
控制器，所述控制器在所述第一组引脚的对地阻抗值位于预设范围内时，控制所述第一开关单元连通所述第一组引脚和所述应用处理器耳机接口，并控制所述第二开关单元连通所述第二组引脚和所述应用处理器快充接口；
或，在所述第二组引脚的对地阻抗值位于预设范围内时，控制所述第二开关单元连通所述第二组引脚和所述应用处理器耳机接口，并控制所述第一开关单元连通所述第一组引脚和所述应用处理器快充接口。
第二方面，本公开实施例还提供了一种转接器，包括：
第二Type-C接口，所述第二Type-C接口包括耳机引脚和数据传输引脚；
分别与所述第二Type-C接口连接的耳机接口和Type-C充电接口，所述耳机引脚与所述耳机接口连接，所述数据传输引脚与所述Type-C充电接口连接；
其中，所述耳机引脚与终端设备的第一组引脚连接，所述数据传输引脚与终端设备的第二组引脚连接；
或者，所述耳机引脚与终端设备的第二组引脚连接，所述数据传输引脚与终端设备的第一组引脚连接。
第三方面，本公开实施例还提供了一种充电方法，应用于如上所述的终端设备，所述充电方法包括：
检测目标引脚的对地阻抗值，得到一检测结果，所述目标引脚包括第一组引脚和/或第二组引脚；
在所述检测结果为所述第一组引脚的对地阻抗值位于预设范围内时，控制所述第一组引脚与终端设备的应用处理器耳机接口连接，并控制第二组引脚与终端设备的应用处理器快充接口连接；
或者，在所述检测结果为所述第二组引脚的对地阻抗值位于预设范围内时，控制所述第二组引脚和所述应用处理器耳机接口连接，并控制所述第一组引脚和所述应用处理器快充接口连接。
本公开实施例具有以下有益效果：
本公开实施例的上述技术方案，控制器根据第一组引脚或第二组引脚的对地阻抗值，来控制第一开关单元和第二开关单元中的一个开关单元连通应用处理器耳机接口，并控制剩下的一个开关单元与应用处理器快充接口连接，进而使得用户在使用耳机功能的同时，还能在快充模式下进行快速充电。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对本公开实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本公开实施例的终端设备和转接器的结构示意图；
图2为本公开实施例的终端设备中第一Type-C接口的结构示意图；
图3为本公开实施例中充电方法的流程示意图；
图4为本公开实施例的终端设备、转接器以及充电器和耳机的连接示意图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完成地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
相关技术中的移动终端和实现一转二转接器(转充电和耳机)上，DP引脚和DN引脚分别被L和R脚占用，导致使用耳机时，只能使用电压总线(voltage bus，VBUS)普通充电，而不能使用快充模式，且充电不受控制，安全性受影响。
基于此，本公开实施例提供了一种终端设备，如图1所示，包括：
与第一Type-C接口，该第一Type-C接口与转换器连接，如图2所示，所述第一Type-C接口包括：第一组引脚和第二组引脚。该第一组引脚可以与所述转换器的耳机接口或Type-C充电接口连接，该第二组引脚可以与所述转换器的Type-C充电接口或耳机接口连接，在第一组引脚与转换器的耳机接口连接时，第二组引脚与转换器的Type-C充电接口连接；在第一组引脚与转换器的Type-C充电接口连接时，第二组引脚与转换器的耳机接口连接。
其中，上述第一组引脚包括第一引脚和第二引脚，上述第二组引脚包括第三引脚和第四引脚；其中，所述第一引脚用作所述第一Type-C接口的第一耳机引脚和第一数据传输引脚，所述第二引脚用作所述第一Type-C接口的第二耳机引脚和第二数据传输引脚；所述第三引脚用作所述第一Type-C接口的第一耳机引脚和第一数据传输引脚，所述第四引脚用作所述第一Type-C接口的第二耳机引脚和第二数据传输引脚。
例如，上述第一组引脚为第一Type-C接口的A6和A7引脚，上述第二组引脚为第一Type-C接口的B6和B7引脚。当然，上述第一组引脚也可为B6和B7引脚，上述第二组引脚为A6和A7引脚。
上述A6为第一引脚，上述B6为第三引脚，A6和B6均用作所述第一Type-C接口的第一耳机引脚和第一数据传输引脚，具体为DP/R引脚，上述A7为第二引脚，B7为第四引脚，A7和B7均用作所述第一Type-C接口的第二耳机引脚和第二数据传输引脚，具体为DN/L引脚。即第一数据传输引脚(DP引脚)复用第一耳机引脚(R引脚)，第二数据传输引脚(DN引脚)复用第二耳机引脚(L引脚)。图2所示的第一Type-C接口，插入数字耳机时，A6、A7、B6、B7引脚输出数字音频信号，插入通用串行总线(universal serial bus，USB)充电器时，A6、A7、B6、B7引脚传输USB信号，进入快速充电模式。且，上述耳机接口为3.5mm耳机接口。
第一开关单元，所述第一组引脚通过所述第一开关单元与所述终端设备的应用处理器耳机接口或应用处理器快充接口连接。
第二开关单元，所述第二组引脚通过所述第二开关单元与所述终端设备的应用处理器耳机接口或应用处理器快充接口连接。
该应用处理器耳机接口包括R引脚和L引脚。该应用处理器快充接口可通过相关快充协议进行快速充电。
控制器，所述控制器在所述第一组引脚的对地阻抗值位于预设范围内时，确定所述第一组引脚与转换器的耳机接口连接，控制所述第一开关单元连通所述第一组引脚和所述应用处理器耳机接口，并控制所述第二开关单元连通所述第二组引脚和所述应用处理器快充接口；
或，在所述第二组引脚的对地阻抗值位于预设范围内时，确定所述第二组引脚与转换器的耳机接口连接，控制所述第二开关单元连通所述第二组引脚和所述应用处理器耳机接口，并控制所述第一开关单元连通所述第一组引脚和所述应用处理器快充接口。
这里，在上述第一组引脚的对地阻抗值位于预设范围内时，确定该第一组引脚作为耳机引脚，控制第一开关单元连通第一组引脚和应用处理器耳机接口，而此时，确定第二组引脚作为数据传输引脚，并控制第二开关单元连通所述第二组引脚和所述应用处理器快充接口；
在上述第二组引脚的对地阻抗值位于预设范围时，确定该第二组引脚作为耳机引脚，控制第二开关单元连通第二引脚和应用处理器耳机接口，而此时，确定第一组引脚作为数据传输引脚，并控制所述第一开关单元连通所述第一组引脚和所述应用处理器快充接口。
上述在连通第一组引脚和应用处理器快充接口时，可通过主控单元(master control unit，MCU)根据快充协议进行快速充电，在连通第二组引脚和应用处理器快充接口时，可通过主控单元MCU根据快充协议进行快速充电。上述控制器可具体为应用处理器(application processor，AP)的控制模块。
本公开实施例的终端设备，先在第一组引脚和第二组引脚中确定一组引脚作为耳机引脚，然后剩下的一组引脚作为充电引脚，从而能够同时实现耳机功能和快速充电功能。
本公开实施例中，控制器根据第一组引脚或第二组引脚的对地阻抗值，来控制第一开关单元和第二开关单元中的一个开关单元连通应用处理器耳机接口，并控制剩下的一个开关单元与应用处理器快充接口连接，进而使得用 户在使用耳机功能的同时，还能在快充模式下进行快速充电。
本公开实施例的终端设备，控制器根据第一组引脚或第二组引脚的对地阻抗值，来控制第一开关单元和第二开关单元中的一个开关单元连通应用处理器耳机接口，使得剩下的一个开关单元可以与应用处理器快充接口连接，进而使得用户在使用耳机功能的同时，还能在快充模式下进行快速充电。
进一步地，所述第一开关单元包括第一切换开关和第二切换开关；
所述第二开关单元包括第三切换开关和第四切换开关；
其中，所述第一切换开关(开关01)分别与所述第一组引脚中的第二引脚(A7引脚)和所述应用处理器耳机接口的第一耳机引脚(R引脚)连接，或者，所述第一切换开关分别与所述第一组引脚中的第二引脚(A7引脚)和所述应用处理器快充接口的第一数据传输引脚(DP引脚)连接；
所述第二切换开关(开关02)分别与所述第一组引脚中的第一引脚(A6引脚)和所述应用处理器耳机接口的第二耳机引脚(L引脚)连接，或者，所述第二切换开关分别与所述第一组引脚中的第一引脚(A6引脚)和所述应用处理器快充接口的第二数据传输引脚(DN引脚)连接；
所述第三切换开关(开关03)分别与所述第二组引脚中的第四引脚(B7引脚)和所述应用处理器耳机接口的第一耳机引脚(R引脚)连接，或者，所述第三切换开关分别与所述第二组引脚中的第四引脚(B7引脚)和所述应用处理器快充接口的第一数据传输引脚(DP引脚)连接；
所述第四切换开关(开关04)分别与所述第二组引脚中的第三引脚(B6引脚)和所述应用处理器耳机接口的第二耳机引脚(L引脚)连接，或者，所述第四切换开关分别与所述第二组引脚中的第三引脚(B6引脚)和所述应用处理器快充接口的第二数据传输引脚(DN引脚)连接。
具体的，所述第一切换开关、所述第二切换开关、所述第三切换开关和所述第四切换开关均为单刀双掷开关；
所述第一切换开关的不动端与所述第一组引脚中的第二引脚连接，所述第一切换开关的动端与所述应用处理器耳机接口的第一耳机引脚或所述应用处理器快充接口的第一数据传输引脚连接；
所述第二切换开关的不动端与所述第一组引脚中的第一引脚连接，所述 第二切换开关的动端与所述应用处理器耳机接口的第二耳机引脚或所述应用处理器快充接口的第二数据传输引脚连接；
所述第三切换开关的不动端与所述第二组引脚中的第四引脚连接，所述第三切换开关的动端与所述应用处理器耳机接口的第一耳机引脚或所述应用处理器快充接口的第一数据传输引脚连接；
所述第四切换开关的不动端与所述第二组引脚中的第三引脚连接，所述第四切换开关的动端与所述应用处理器耳机接口的第二耳机引脚或所述应用处理器快充接口的第二数据传输引脚连接。
本公开实施例的终端设备，将第一Type-C接口的A6引脚和B7引脚分开，连接至不同的开关单元，并将A7引脚和B6引脚分开，连接至不同的开关单元，相应的，转接器将DP引脚和R引脚分开，DN和L引脚分开，A6，A7分别为DP和DN脚，B6和B7分别为R和L脚，其中，转接器的A6和A7脚接至一转二转接线Type-C母座(Type-C充电接口)的A6和A7脚(也可以同时接上母座的B6和B7脚)，一转二转接器的B6和B7接至3.5mm耳机座(耳机接口)的R脚和L脚。
本公开实施例中，通过转接器插入3.5mm模拟耳机和充电器后，第一Type-C接口的CC1引脚和CC2引脚短路到地，移动终端通过CC1引脚和CC2引脚检测，判断从设备是否为模拟耳机，例如，CC1引脚和CC2引脚电压小于预设电压阈值，则判断从设备为模拟耳机设备；对A6引脚，A7引脚，B6引脚和B7引脚进行对地阻抗检测，若落在预设范围内，则判断为耳机类型，例如，检测到A6，A7引脚的对地阻抗落在预设范围内，则判定为耳机类型，并控制开关切换到相应通路，即连通A6，A7引脚和终端设备的应用处理器耳机接口，B6，B7引脚的阻抗落在耳机类型外，则判定为USB类型，则控制开关切换到相应通路，即连通B6、B7引脚和应用处理器快充接口，耳机类型的通路切换到耳机输出，USB类型的通路切换到USB通路；充电器会对移动终端进行VBUS充电，移动终端检测到VBUS充电后，开启快充协议充电，实现快速充电和耳机功能。
如图1所示，本公开实施例还提供了一种转接器，包括：
第二Type-C接口，分别与所述第二Type-C接口连接的耳机接口和Type-C 充电接口。
上述耳机接口具体为3.5mm耳机接口，通过该耳机接口连接耳机。上述Type-C充电接口用于连接充电器，通过该Type-C充电接口可实现快速充电。
上述耳机引脚与所述耳机接口连接，上述数据传输引脚与所述Type-C充电接口连接，上述第二Type-C接口与终端设备连接，该第二Type-C接口包括耳机引脚和数据传输引脚。
其中，所述耳机引脚与终端设备的第一组引脚连接，所述数据传输引脚与终端设备的第二组引脚连接；
或者，所述耳机引脚与终端设备的第二组引脚连接，所述数据传输引脚与终端设备的第一组引脚连接。
具体的，该耳机引脚包括第一耳机引脚(R引脚)和第二耳机引脚(L引脚)，所述数据传输引脚包括第一数据传输引脚(DP引脚)和第二数据传输引脚(DN引脚)。该第二Type-C接口具体为用于接终端设备的Type-C公座，上述第一Type-C接口具体为与转接器连接的Type-C母座。
该第一组引脚具体为终端设备的第一Type-C接口的A6和A7引脚，第二组引脚具体为第一Type-C接口的B6和B7引脚，当然，上述第一组引脚也可为第一Type-C接口的B6和B7引脚，第二组引脚为第一Type-C接口的A6和A7引脚。
所述第一耳机引脚和所述第二耳机引脚分别与所述第一组引脚中的两个引脚一一对应连接，所述第一数据传输引脚和所述第二数据传输引脚分别与所述第二组引脚中的两个引脚一一对应连接。或者，所述第一耳机引脚和所述第二耳机引脚分别与所述第二组引脚中的两个引脚一一对应连接，所述第一数据传输引脚和所述第二数据传输引脚分别与所述第一组引脚中的两个引脚一一对应连接。
具体的，R引脚与R引脚连接，L引脚与L引脚连接，DP引脚与DP引脚连接，DN引脚与DN引脚连接。
本公开实施例的转接器，将第二Type-C接口的第一数据传输引脚(DP引脚)和第一耳机引脚(R引脚)分开，并将第二数据传输引脚(DN引脚)和第一耳机引脚(L引脚)分开，将DP和DN引脚连接至Type-C充电接口， 将R引脚和L引脚连接至耳机接口，相应的，终端设备的第一Type-C接口的A6引脚和B7引脚分开，连接至不同的开关单元，并将A7引脚和B6引脚分开，连接至不同的开关单元，使得终端设备能够实现能够同时实现快速充电功能和耳机功能。
进一步地，所述Type-C充电接口包括：第一数据传输引脚和第二数据传输引脚；
所述Type-C充电接口的第一数据传输引脚与所述第二Type-C接口的第一数据传输引脚连接；
所述Type-C充电接口的第二数据传输引脚与所述第二Type-C接口的第二数据传输引脚连接。
所述耳机接口的第一耳机引脚与所述第二Type-C接口的第一耳机引脚连接；
所述耳机接口的第二耳机引脚与所述第二Type-C接口的第二耳机引脚连接。
如图1所示，所述Type-C充电接口的DP引脚与所述第二Type-C接口的DP引脚连接，Type-C充电接口的DN引脚与所述第二Type-C接口的DN引脚连接，所述耳机接口的R引脚与第二Type-C接口的R引脚连接，所述耳机接口的L引脚与第二Type-C接口的L引脚连接。
本公开实施例中，转接器的第二Type-C接口DP引脚和R引脚分开，DN和L引脚分开，转接器的A6，A7引脚分别为DP和DN脚，B6和B7引脚分别为R和L脚，其中，转接器的A6和A7脚接至一转二转接线Type-C母座(Type-C充电接口)的A6和A7脚(也可以同时接上母座的B6和B7脚)，一转二转接器的B6和B7接至3.5mm耳机座(耳机接口)的R脚和L脚。
本公开实施例还提供了一种充电方法，应用于如上所述的终端设备，如图3所示，该充电方法包括：
步骤301：检测目标引脚的对地阻抗值，得到一检测结果，所述目标引脚包括第一组引脚和/或第二组引脚。
本公开实施例中，终端设备与转接器连接，该步骤可具体包括：检测与转接器连接的外部设备是否为耳机设备。在与转接器连接的外部设备为耳机 设备的情况下，检测目标引脚的对地阻抗值，得到一检测结果，所述目标引脚包括第一组引脚和/或第二组引脚。
如图4所示，本公开实施例中，终端设备包括应用处理器AP控制模块、AP耳机接口(包括R引脚和L引脚)、AP USB接口(包括DP引脚和DN引脚)，开关模块(第一开关单元和第二开关单元)、第一Type-C接口；该第一Type-C接口与一转二转接器连接，该一转二转接器分别与充电器和3.5mm耳机连接。
其中，AP控制模块负责检测CC逻辑，判断插入设备，控制开关模块状态切换等。
AP耳机接口：输出模拟耳机信号，一般是编译码器CODEC部分。
AP USB接口：传输充电协议接口。
开关模块：负责耳机左右声道输出和USB口的切换。
具体的，AP控制模块将CC1引脚和CC2引脚拉地，拉地后电阻小于Ra，一般为1.2K，若CC1引脚和CC2引脚的电压小于预设电压阈值，则确定外接设备为耳机设备，否则，确定外接设备为其他设备。
步骤302：在所述检测结果为所述第一组引脚的对地阻抗值位于预设范围内时，控制所述第一组引脚与终端设备的应用处理器耳机接口连接，并控制第二组引脚与终端设备的应用处理器快充接口连接。
具体的，控制第一开关单元连通所述第一组引脚和所述应用处理器耳机接口，并控制第二开关单元连通所述第二组引脚和所述应用处理器快充接口。
步骤303：在所述检测结果为所述第二组引脚的对地阻抗值位于预设范围内时，控制所述第二组引脚和所述应用处理器耳机接口连接，并控制所述第一组引脚和所述应用处理器快充接口连接。
具体的，控制第二开关单元连通所述第二组引脚和所述应用处理器耳机接口，并控制所述第一开关单元连通所述第一组引脚和所述应用处理器快充接口。
上述步骤302和步骤303为并列关系。
本公开实施例的上述技术方案，通过更改移动终端的Type-C接口外围电路结构，增加电子开关，分开Type-C耳机(L/R)通路和USB(DP/DN)通 路，并设计合理的系统逻辑，使得用户在插入相关设备后，能够同时实现快速充电功能和耳机功能。
本公开实施例的充电方法，检测与转接器连接的外部设备是否为耳机设备；在所述外部设备为耳机设备的情况下，检测目标引脚的对地阻抗值，得到一检测结果，所述目标引脚包括第一组引脚和/或第二组引脚；在所述检测结果为所述第一组引脚的对地阻抗值位于预设范围内时，确定所述第一组引脚与转换器的耳机接口连接，控制所述第一组引脚与终端设备的应用处理器耳机接口连接，并控制第二组引脚与终端设备的应用处理器快充接口连接；或者，在所述检测结果为所述第二组引脚的对地阻抗值位于预设范围内时，确定所述第二组引脚与转换器的耳机接口连接，控制所述第二组引脚和所述应用处理器耳机接口连接，并控制所述第一组引脚和所述应用处理器快充接口连接，使得用户在使用耳机功能的同时，还能在快充模式下进行快速充电。
本公开实施例的终端设备包括由射频单元、网络模块、音频输出单元、输入单元、传感器、显示单元、用户输入单元、接口单元、存储器、处理器、以及电源等部件构成的设备。
本说明书中的各个实施例均采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似的部分互相参见即可。
尽管已描述了本公开实施例的可选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例做出另外的变更和修改。所以，所附权利要求意欲解释为包括可选实施例以及落入本公开实施例范围的所有变更和修改。
最后，还需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者终端设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者终端设备所固有的要素。在没有更多限制的情况下，由语句“包括一 个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者终端设备中还存在另外的相同要素。
以上所述仅为本公开的较佳实施例而已，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (12)

  1. 一种终端设备，包括：
    第一Type-C接口，所述第一Type-C接口包括：第一组引脚和第二组引脚；
    第一开关单元，所述第一组引脚通过所述第一开关单元与所述终端设备的应用处理器耳机接口或应用处理器快充接口连接；
    第二开关单元，所述第二组引脚通过所述第二开关单元与所述终端设备的应用处理器耳机接口或应用处理器快充接口连接；
    控制器，所述控制器在所述第一组引脚的对地阻抗值位于预设范围内时，控制所述第一开关单元连通所述第一组引脚和所述应用处理器耳机接口，并控制所述第二开关单元连通所述第二组引脚和所述应用处理器快充接口；
    或，在所述第二组引脚的对地阻抗值位于预设范围内时，控制所述第二开关单元连通所述第二组引脚和所述应用处理器耳机接口，并控制所述第一开关单元连通所述第一组引脚和所述应用处理器快充接口。
  2. 根据权利要求1所述的终端设备，其中，所述第一组引脚包括第一引脚和第二引脚，所述第二组引脚包括第三引脚和第四引脚；
    其中，所述第一引脚用作所述第一Type-C接口的第一耳机引脚和第一数据传输引脚，所述第二引脚用作所述第一Type-C接口的第二耳机引脚和第二数据传输引脚；
    所述第三引脚用作所述第一Type-C接口的第一耳机引脚和第一数据传输引脚，所述第四引脚用作所述第一Type-C接口的第二耳机引脚和第二数据传输引脚。
  3. 根据权利要求2所述的终端设备，其中，
    所述第一开关单元包括第一切换开关和第二切换开关；
    所述第二开关单元包括第三切换开关和第四切换开关；
    其中，所述第一切换开关分别与所述第二引脚和所述应用处理器耳机接口的第一耳机引脚连接，或者，所述第一切换开关分别与所述第二引脚和所述应用处理器快充接口的第一数据传输引脚连接；
    所述第二切换开关分别与所述第一引脚和所述应用处理器耳机接口的第二耳机引脚连接，或者，所述第二切换开关分别与所述第一引脚和所述应用处理器快充接口的第二数据传输引脚连接；
    所述第三切换开关分别与所述第四引脚和所述应用处理器耳机接口的第一耳机引脚连接，或者，所述第三切换开关分别与所述第四引脚和所述应用处理器快充接口的第一数据传输引脚连接；
    所述第四切换开关分别与所述第三引脚和所述应用处理器耳机接口的第二耳机引脚连接，或者，所述第四切换开关分别与所述第三引脚和所述应用处理器快充接口的第二数据传输引脚连接。
  4. 根据权利要求3所述的终端设备，其中，所述第一切换开关、所述第二切换开关、所述第三切换开关和所述第四切换开关均为单刀双掷开关；
    所述第一切换开关的不动端与所述第二引脚连接，所述第一切换开关的动端与所述应用处理器耳机接口的第一耳机引脚或所述应用处理器快充接口的第一数据传输引脚连接；
    所述第二切换开关的不动端与所述第一引脚连接，所述第二切换开关的动端与所述应用处理器耳机接口的第二耳机引脚或所述应用处理器快充接口的第二数据传输引脚连接；
    所述第三切换开关的不动端与所述第四引脚连接，所述第三切换开关的动端与所述应用处理器耳机接口的第一耳机引脚或所述应用处理器快充接口的第一数据传输引脚连接；
    所述第四切换开关的不动端与所述第三引脚连接，所述第四切换开关的动端与所述应用处理器耳机接口的第二耳机引脚或所述应用处理器快充接口的第二数据传输引脚连接。
  5. 一种转接器，包括：
    第二Type-C接口，所述第二Type-C接口包括耳机引脚和数据传输引脚；
    分别与所述第二Type-C接口连接的耳机接口和Type-C充电接口，所述耳机引脚与所述耳机接口连接，所述数据传输引脚与所述Type-C充电接口连接；
    其中，所述耳机引脚与终端设备的第一组引脚连接，所述数据传输引脚 与终端设备的第二组引脚连接；
    或者，所述耳机引脚与终端设备的第二组引脚连接，所述数据传输引脚与终端设备的第一组引脚连接。
  6. 根据权利要求5所述的转接器，其中，所述耳机引脚包括：第一耳机引脚和第二耳机引脚，所述数据传输引脚包括第一数据传输引脚和第二数据传输引脚。
  7. 根据权利要求6所述的转接器，其中，所述第一耳机引脚和所述第二耳机引脚分别与所述第一组引脚中的两个引脚一一对应连接，所述第一数据传输引脚和所述第二数据传输引脚分别与所述第二组引脚中的两个引脚一一对应连接。
  8. 根据权利要求6所述的转接器，其中，所述第一耳机引脚和所述第二耳机引脚分别与所述第二组引脚中的两个引脚一一对应连接，所述第一数据传输引脚和所述第二数据传输引脚分别与所述第一组引脚中的两个引脚一一对应连接。
  9. 根据权利要求6所述的转接器，其中，所述Type-C充电接口的第一数据传输引脚与所述第二Type-C接口的第一数据传输引脚连接；
    所述Type-C充电接口的第二数据传输引脚与所述第二Type-C接口的第二数据传输引脚连接。
  10. 根据权利要求6所述的转接器，其中，所述耳机接口的第一耳机引脚与所述第二Type-C接口的第一耳机引脚连接；
    所述耳机接口的第二耳机引脚与所述第二Type-C接口的第二耳机引脚连接。
  11. 一种充电方法，应用于如权利要求1至4中任一项所述的终端设备，包括：
    检测目标引脚的对地阻抗值，得到一检测结果，所述目标引脚包括第一组引脚和/或第二组引脚；
    在所述检测结果为所述第一组引脚的对地阻抗值位于预设范围内时，控制所述第一组引脚与终端设备的应用处理器耳机接口连接，并控制第二组引脚与终端设备的应用处理器快充接口连接；
    或者，在所述检测结果为所述第二组引脚的对地阻抗值位于预设范围内时，控制所述第二组引脚和所述应用处理器耳机接口连接，并控制所述第一组引脚和所述应用处理器快充接口连接。
  12. 根据权利要求11所述的充电方法，其中，所述控制所述第一组引脚与终端设备的应用处理器耳机接口连接，并控制第二组引脚与终端设备的应用处理器快充接口连接，包括：
    控制第一开关单元连通所述第一组引脚和所述应用处理器耳机接口，并控制第二开关单元连通所述第二组引脚和所述应用处理器快充接口；
    所述控制所述第二组引脚和所述应用处理器耳机接口连接，并控制所述第一组引脚和所述应用处理器快充接口连接，包括：
    控制第二开关单元连通所述第二组引脚和所述应用处理器耳机接口，并控制所述第一开关单元连通所述第一组引脚和所述应用处理器快充接口。
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