WO2020134709A1

WO2020134709A1 - Time correction method, device, system, and storage medium

Info

Publication number: WO2020134709A1
Application number: PCT/CN2019/119273
Authority: WO
Inventors: 毕英明; 吴琼
Original assignee: 中兴通讯股份有限公司
Priority date: 2018-12-29
Filing date: 2019-11-18
Publication date: 2020-07-02
Also published as: CN111385049B; CN111385049A

Abstract

The present application relates to a time correction method, device, system, and storage medium, the method comprises: acquiring a first time setting message, the first time setting message carrying a time setting timestamp and a preset code; recording a first timestamp corresponding to the moment when the preset code is detected, and deleting the preset code in the first time setting message to obtain the original time setting message; extracting the time setting timestamp in the original time setting message; using the time setting timestamp and the first timestamp to correct the timestamp of the timestamp counter, so that the timestamp of the timestamp counter and the timestamp of the timestamp counter sending the first time setting message have the same value at the same moment.

Description

Time correction method, device, system and storage medium

cross reference

The present invention requires the priority of the Chinese patent application filed on December 29, 2018 in the Chinese Patent Office with the application number 201811641992.0 and the invention titled "a time correction method, device, system and storage medium". The content is incorporated by reference in the present invention.

Technical field

This application relates to the field of communications, and in particular to a time correction method, device, system, and storage medium.

Background technique

As operators' requirements for cross-subrack cross-capacity further increase, operators' demands for high-precision time transfer between service subracks are becoming stronger. In a traditional single subrack, the main control board passes the time information to each service board through the same 1pps backplane trace. In the cross-service sub-rack environment, in order to ensure the cross-communication between the service sub-racks and the local time stamp of each service sub-rack is the same, the transmission of high-precision time information between the sub-racks is a function that must be implemented .

In order to meet the requirement of high-precision time transfer between service subracks, in some cases, timestamp information is added to the Ethernet message, and the switch chip is used to send the Ethernet message. However, the switching chip has the problems of relatively large forwarding delay and unstable path delay. Therefore, it will cause the problem of inaccurate time information transmitted between service subracks.

Summary of the invention

This application provides a time correction method, device, system, and storage medium.

In a first aspect, an embodiment of the present application provides a time correction method, including: acquiring a first pair of time messages, the first pair of time messages carrying a time stamp and a preset code; recording and detecting the pre Set a first time stamp corresponding to the encoded moment, and delete the preset code in the first pair of time messages to obtain the original time message; extract the time stamp in the original time message; use the The time stamp and the first time stamp correct the time stamp of the time stamp counter so that the time stamp of the time stamp counter and the time stamp of the time stamp counter that sent the first pair of time messages are at the same time The value is the same.

In a second aspect, an embodiment of the present application provides a time correction method, including: when a timestamp counter is cleared at the second level, generating a second time stamp including a second timestamp corresponding to the timestamp reset time of the timestamp counter at the second level Timed message; insert a preset code into the second timed message to obtain the marked message; output the marked message.

In a third aspect, an embodiment of the present application provides a time correction device, including: a first message processing module and a user-defined code deletion module; the delete user-defined code module is connected to the first message processing module to To obtain a first pair of time messages, the first pair of time messages carries a time stamp and a preset code, records a first time stamp corresponding to the moment when the preset code is detected, and deletes the first The preset encoding in the time synchronization message to obtain an original time synchronization message; the first message processing module is used to extract the time synchronization time stamp in the original time synchronization message, and use the time synchronization time stamp and all Said first timestamp, correcting the timestamp of the timestamp counter so that the timestamp of the timestamp counter and the timestamp of the timestamp counter sending the first pair of time messages have the same value at the same time.

According to a fourth aspect, an embodiment of the present application provides a time correction device, including: a second message processing module and a module for inserting a custom code; the second message processing module is used to clear the timestamp counter at the second level , Generate a second pair of time messages including a second time stamp corresponding to the second time clearing time of the time stamp counter, and send the second pair of time messages to the module for inserting a custom code; the inserting a custom code The module is configured to receive the second pair of time messages sent by the second message processing module, insert a preset code into the second pair of time messages, obtain a marked message, and output the marked message.

According to a fifth aspect, an embodiment of the present application provides a time correction system. The system includes the time correction device according to any one of the third aspect and the time correction device according to any one of the fourth aspect.

According to a sixth aspect, an embodiment of the present application provides a computer-readable storage medium that stores computer instructions, and the computer instructions cause the computer to perform any one of the first aspect and the second aspect Describe the steps of the method.

According to a seventh aspect, an embodiment of the present application provides a computer program product. The computer program product includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions. When the program instructions When executed by a computer, the computer is caused to perform the methods described in the above aspects.

BRIEF DESCRIPTION

The drawings herein are incorporated in and constitute a part of the specification, show embodiments consistent with the invention, and are used to explain the principles of the invention together with the specification.

In order to more clearly explain the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required in the embodiments or the description of the prior art. Obviously, for those of ordinary skill in the art In other words, other drawings can be obtained based on these drawings without paying any creative labor.

1 is a schematic diagram of a first connection of a service board provided by an embodiment of this application;

2 is a schematic diagram of a second connection of a service board provided by an embodiment of this application;

3 is a flowchart of a time correction method provided by an embodiment of this application;

4 is a first schematic structural diagram of a time correction device provided by an embodiment of the present application;

FIG. 5 is a second schematic structural diagram of a time correction device provided by an embodiment of this application;

6 is a first schematic structural diagram of a time correction system provided by an embodiment of the present application;

7 is a second schematic structural diagram of a time correction system provided by an embodiment of the present application;

FIG. 8 is a schematic structural diagram of a server provided by an embodiment of the present application.

detailed description

To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without making creative efforts fall within the protection scope of the present application.

The present application provides a time correction method, device, system and storage medium, which can alleviate the problem of inaccurate time information transmitted between service subracks in the prior art, and improve the accuracy of time information transmitted between service subracks Sex.

First, a time correction method in the embodiments of the present application will be described in detail.

As shown in FIG. 1, the first service board 11 may be connected to the second service board 12, the third service board 13, and the fourth service board 14 through interfaces, respectively. The interface may be a GE interface (Gigabit Ethernet, Gigabit Ethernet interface). Among them, the second business board 12, the third business board 13 and the fourth business board 14 may be located in the same subrack, and the second business board 12, the third business board 13 and the fourth business board 14 may also be located in different subracks in. Exemplarily, the first service board 11 may be located in the first subrack, and the second service board 12, the third service board 13, and the fourth service board 14 may all be located in the second subrack. Alternatively, the first service board 11 may be located in the first subrack, the second service board 12 may be located in the second subrack, the third service board 13 may be located in the third subrack, and the fourth service board 14 may be located in the fourth In the subrack. Alternatively, the first service board 11 may be located in the first subrack, the second service board 12 and the third service board 13 may both be located in the second subrack, and the fourth service board 14 may be located in the third subrack. This is just an illustration. If the first business board 11 is connected to the second business board 12, the third business board 13, and the fourth business board 14 through the interface, then the first business board 11 is the main side, and the second business board 12, the third business board 13 Both the fourth service board 14 and the first service board 14 send time information to the second service board 12, the third service board 13, the fourth service board 14, the second service board 12, and the third service board 13 The fourth service board 14 uses the time information to correct the time stamps of the respective time stamp counters.

As shown in FIG. 2, the A business board 21 and the B business board 22 are connected. The master-slave relationship between the A business board 21 and the B business board 22 is configurable. If the A business board 21 is the main side, the B business board 21 22 is the slave side, the A service board 21 sends time information to the B service board 22, and the B service board 22 uses the time information to correct the time stamp of its own time stamp counter. If the B business board 22 is the master side, the A business board 21 is the slave side, and the B business board 22 sends time information to the A business board 21, and the A business board 21 uses the time information to correct the time stamp of its own time stamp counter.

The time correction method provided by the embodiment of the present application may be applied to the service board or device on the slave side.

As shown in FIG. 3, the time correction method may include steps S101 to S104:

S101. Acquire a first pair of time messages, where the first pair of time messages carry a time stamp and a preset code.

The first pair of time messages may be sent by a service board or device on the main side. The time-stamping time stamp may be recorded when the time stamp counter in the service board or device on the main side is cleared in seconds.

Among them, the preset encoding may include: a custom K code and a custom D code. Exemplarily, the custom K code may be K28.5. The custom D code can be D5.6.

S102: Record a first time stamp corresponding to the moment when the preset encoding is detected, and delete the preset encoding in the first pair of time-of-day messages to obtain the original time-of-day message.

S103: Extract the synchronization time stamp in the original synchronization message.

S104, using the time stamp and the first time stamp to correct the time stamp of the time stamp counter so that the time stamp of the time stamp counter and the time stamp of the time stamp counter that sent the first pair of time messages The values are the same at the same time.

Specifically, the difference between the time stamp and the first time stamp is obtained. If the absolute value of the difference is greater than the absolute value threshold, the time stamp of the local time stamp counter is updated. The update formula can be:

t=t ₃ +t ₁ -t ₂

Where t is the time stamp of the updated local time stamp counter, t ₃ is the time stamp of the local time stamp counter corresponding to the update time, t ₁ is the time stamp, and t ₂ is the first time stamp.

Furthermore, the absolute threshold can be set to 16ns.

An embodiment of the present application provides a time correction method. The method includes: acquiring a first pair of time messages, the first pair of time messages carrying a time stamp and a preset code; recording and detecting the preset code A first timestamp corresponding to the time, and deleting the preset code in the first pair of time-of-day messages to obtain an original time-of-day message; extracting the time-of-day timestamp in the original time-of-day message; using the time-of-day The timestamp and the first timestamp, correct the timestamp of the timestamp counter so that the timestamp of the timestamp counter and the timestamp of the timestamp counter sending the first pair of time messages have the same value at the same time, Therefore, the time correction method provided by the present application can use the time stamp and the first time stamp to correct the time stamp of the time stamp counter so that the time stamp of the time stamp counter and the first pair of time reports are sent The timestamp of the text timestamp counter has the same value at the same time. Even if the switching chip has a large forward delay and the path delay is unstable, the timestamp of the local timestamp counter will be corrected. Therefore, this method The problem of inaccurate time information transmitted between service subracks in the prior art can be alleviated, and the accuracy of time information transmitted between service subracks can be improved.

In the process of time correction, there may be a case where the preset code in the first pair of time messages is to be deleted. In the process of deleting the preset code, there may be a situation where the throughput of both ends of the FIFO memory is inconsistent, making the FIFO memory The waterline becomes lower, therefore, the speed and stability of data transmission may be reduced. In order to solve this problem, in another embodiment of the present application, on the basis of the foregoing embodiments of steps S101 to S104, step S103 may be Including step S1031 to step S1033: S1031, the first waterline data of the first first-in first-out FIFO memory is obtained, and the first FIFO memory is used to store the first time stamp and the original time synchronization message.

S1032: If the first waterline data is less than the first waterline threshold, insert an idle frame in the data stream composed of the first time stamp and the original time synchronization message.

The first waterline threshold can be set according to actual needs. The number of idle frames inserted each time can also be set according to actual needs.

Further, step S1032 may also be: if the first waterline data is less than the first waterline threshold and a continuous idle frame is detected in the data stream composed of the first timestamp and the original time synchronization message, then Insert idle frames in the data stream.

S1033: Extract the synchronization timestamp from the data stream inserted into the idle frame.

In the embodiment of the present application, on the basis of the foregoing embodiments from step S101 to step S105, the extracting the time synchronization timestamp in the original time synchronization message includes: obtaining the first FIFO memory first Waterline data, the first FIFO memory is used to store the first timestamp and the original time synchronization message; if the first waterline data is less than the first waterline threshold, then the first time Insert a free frame into the data stream composed of the stamp and the original time synchronization message; extract the time synchronization time stamp from the data stream inserted into the idle frame. Therefore, the problem of lowering the speed and stability of data transmission due to the lower waterline of the FIFO memory can be avoided, and the technical effect of ensuring the speed and stability of data transmission is achieved.

In yet another embodiment of the present application, on the basis of the foregoing embodiments of steps S1031 to S1033, the time correction method may further include steps S11 to S14: S11 to obtain message data transmitted by parallel communication.

Among them, the interface and the optical module can be used to obtain the message data transmitted by the parallel communication method. Specifically, the interface may be a GE port.

S12. Convert the message data into a byte-unaligned message transmitted by serial communication.

S13: Align the bytes in the byte-unaligned message to obtain an undecoded message.

Specifically, the byte sliding method may be used to align the bytes in the byte unaligned message.

S14. Decode the undecoded message to obtain the first pair of time messages.

Specifically, the 8B/10B coding standard may be used to decode the undecoded message from 8 bits to 10 bits.

In yet another embodiment of the present application, a time correction method in the embodiment of the present application is described in detail. The time correction method provided in the embodiment of the present application may be applied to a service board or device on the main side. The time correction method may include steps S21 to S23: S21, when the timestamp counter is cleared at the second level, a second time-of-day message including a second timestamp corresponding to the second time cleared time of the timestamp counter is generated.

S22. Insert a preset code into the second pair of time messages to obtain the marked message.

S23, output the marked message.

An embodiment of the present application provides a time correction method. The method includes: when a timestamp counter is cleared at the second level, generating a second time-of-day message including a second timestamp corresponding to the second time cleared time of the timestamp counter ; Insert the preset code into the second pair of time messages to get the marked message; output the marked message, so you can use the marked message to the time stamp of the slave time stamp counter connected to the time stamp counter Correction, even if the switching chip connecting the timestamp counter and the slave timestamp counter has a problem that the forwarding delay is relatively large and the path delay is unstable, the timestamp of the slave timestamp counter will be corrected finally, so this method can alleviate The problem of inaccurate time information transmitted between service subracks in the prior art improves the accuracy of time information transmitted between service subracks.

In the process of time correction, the preset code is inserted into the second pair of time messages. During the process of inserting the preset code, there may be a situation where the throughput of both ends of the FIFO memory is inconsistent, making the FIFO memory waterline higher. Therefore, the speed and stability of data transmission may be reduced. In order to solve this problem, in another embodiment of the present application, on the basis of the foregoing embodiments of step S21 to step S23, step S23 may include step S231 to step S233: S231, acquiring second waterline data of a second FIFO memory, where the second FIFO memory is used to store the marked message.

S232: If the second waterline data is greater than the second waterline threshold, delete idle frames from the marked message.

The second waterline threshold can be set according to actual needs. The number of idle frames deleted each time can also be set according to actual needs. Exemplarily, the number of idle frames deleted each time may be set to one.

Further, step S232 may also be: if the second waterline data is greater than the second waterline threshold and continuous idle frames are detected in the marked message, the idle frame is deleted from the marked message .

S233, the marked packet output of the idle frame will be deleted.

In the embodiment of the present application, on the basis of the foregoing embodiments from step S21 to step S23, the outputting the marked message includes: acquiring the second waterline data of the second FIFO memory, and the second FIFO memory It is used to store the marked message; if the second waterline data is greater than the second waterline threshold, delete the idle frame from the marked message; delete the idle frame and output the marked message. Therefore, the problem of reducing the speed and stability of data transmission due to the increased waterline of the FIFO memory can be avoided, and the technical effect of ensuring the speed and stability of data transmission is achieved.

In another embodiment of the present application, on the basis of the foregoing embodiments of steps S231 to S233, step S233 may include steps S2331 to S2332: S2331, encoding the marked messages for deleting idle frames to obtain the encoding After the time message.

Among them, the 8B/10B coding standard can be used to encode 8-bit to 10-bit messages for marked messages with idle frames deleted.

S2332. Use the parallel communication mode to output the encoded time-of-day message.

Wherein, the interface and the optical module can be used to output the encoded time synchronization message according to the parallel communication mode.

In yet another embodiment of the present application, a time correction device on the slave side in the embodiment of the present application is described in detail. As shown in FIG. 4, the time correction device includes: a first message processing module 41 and a Definition code module 42.

The delete custom code module 42 is connected to the first message processing module 41, and is used to obtain a first pair of time messages. The first pair of time messages carries a time stamp and a preset code for recording and detection. The first timestamp corresponding to the moment of the preset encoding, and deleting the preset encoding in the first pair of time-of-day messages to obtain the original time-of-day message.

Wherein, the delete custom code module 42 is further configured to generate a first pulse signal and send the first pulse signal to the first message processing module 41 if it is detected that the first pair of time messages contains a preset code.

The first message processing module 41 is used to extract the time stamp in the original time stamp message, and use the time stamp and the first time stamp to correct the time stamp of the time stamp counter, so that The time stamp of the time stamp counter and the time stamp of the time stamp counter that sent the first pair of time messages have the same value at the same time.

The first message processing module 41 is also used to receive the first pulse signal sent by the delete custom code module 42. If the first pulse signal is received, the first time stamp is determined as valid data. If the first time stamp is valid data, the first time stamp is used to correct the time stamp of the time stamp counter. In this way, the accuracy and validity of the time stamp of the corrected time stamp counter can be improved.

An embodiment of the present application provides a time correction device. The time correction device includes a first message processing module 41 and a custom code deletion module 42. The delete custom code module 42 is connected to the first message processing module 41, and is used to obtain a first pair of time messages. The first pair of time messages carries a time stamp and a preset code for recording and detection. The first timestamp corresponding to the moment of the preset encoding, and deleting the preset encoding in the first pair of time-of-day messages to obtain the original time-of-day message. The first message processing module 41 is used to extract the time stamp in the original time stamp message, and use the time stamp and the first time stamp to correct the time stamp of the time stamp counter, so that The timestamp of the timestamp counter and the timestamp of the timestamp counter that sent the first pair of time messages have the same value at the same time. Therefore, the time correction device provided by the embodiment of the present application can use the timestamp And the first timestamp, correct the timestamp of the timestamp counter so that the timestamp of the timestamp counter and the timestamp counter of the timestamp counter sending the first pair of time messages have the same value at the same time, even if they are exchanged The chip has the problems that the forwarding delay is relatively large and the path delay is unstable. Finally, the timestamp of the local timestamp counter is also corrected. Therefore, the inaccurate time information transmitted between service subracks in the prior art can be alleviated To improve the accuracy of time information transmitted between business subracks.

In yet another embodiment of the present application, as shown in FIG. 4, on the basis of the time correction device including the first message processing module 41 and the custom code deletion module 42, the time correction device may further include: a first FIFO The memory 43 and the insert idle frame module 44.

Among them, the time correction device in the embodiment of the present application is located on the slave side.

The first FIFO memory 43 is respectively connected to the insert idle frame module 44 and the first message processing module 41, and is used to store the first time stamp and the original time synchronization message.

The insert idle frame module 44 and the delete custom code module 42 are connected to obtain the first waterline data of the first FIFO memory, if the first waterline data is less than the first waterline threshold, then Insert an idle frame in the data stream composed of the first time stamp and the original time synchronization message.

The first message processing module 41 is also used to extract the time-stamping time stamp from the data stream inserted into the idle frame.

In yet another embodiment of the present application, as shown in FIG. 4, on the basis of the time correction device including the first FIFO memory 43 and the inserted idle frame module 44, the time correction device may further include: a byte alignment module 45, Decoding module 46 and first optical port processing module 47.

The first optical port processing module 47 and the byte alignment module 45 are connected to obtain message data transmitted by parallel communication, and convert the message data into bytes transmitted by serial communication. Align the message, and send the byte unaligned message to the byte alignment module 45.

Among them, the first optical port processing module 47 may adopt an IP core to perform serial/parallel communication mode conversion and communicate with the optical module.

The byte alignment module 45 and the decoding module 46 are connected to receive the byte unaligned message sent by the first optical port processing module 47, and align words in the byte unaligned message Section, get the undecoded message, and send the undecoded message to the decoding module 46.

The decoding module 46 is configured to receive the undecoded message sent by the byte alignment module 45, decode the undecoded message, and obtain the first pair of time messages.

Specifically, the decoding module 46 may be an 8B/10B decoding module.

In yet another embodiment of the present application, a time correction device in the embodiment of the present application is described in detail. As shown in FIG. 5, the time correction device may include: a second message processing module 51 and a custom code insertion module 52.

Among them, the time correction device in the embodiment of the present application is located on the main side.

The second message processing module 51 is used to generate a second pair of time messages including a second time stamp corresponding to the second time of the time stamp counter when the time stamp counter is cleared at the second level, and send the The second pair of time messages is inserted into the custom code module 52.

The second message processing module 51 is also used to generate a second pulse signal when the time stamp counter is cleared at the second level, and send the second pulse signal to the custom code module 52.

The inserting custom code module 52 is used to receive the second pair of time messages sent by the second message processing module 51, insert a preset code into the second pair of time messages, obtain the marked message, and output The marked message.

The custom code insertion module 52 is also used to receive the second pulse signal sent by the second message processing module 51. If the second pulse signal is received, a preset code is inserted into the second pair of time messages.

In the embodiment of the present application, the time correction device includes: a second message processing module and a module for inserting a custom code; the second message processing module is used for generating and including the time when the timestamp counter is cleared at the second level A second time-stamp message corresponding to the second timestamp corresponding to the second-time zero-stamping time of the counter, and sending the second time-stamp message to the insert custom code module; the insert custom code module is used to receive the The second pair of time messages sent by the second message processing module inserts a preset code into the second pair of time messages, obtains the marked message, and outputs the marked message. Therefore, the time correction device can use the marked message to correct the timestamp of the slave timestamp counter connected to the timestamp counter. Even if the switching chip connecting the timestamp counter and the slave timestamp counter has a relatively large forward delay, the path delay Time stability problem, the timestamp of the subordinate timestamp counter will be corrected finally. Therefore, this method can alleviate the problem of inaccurate time information transmission between cross-service subracks in the prior art, and improve cross-service subracks The accuracy of the time information passed between.

In yet another embodiment of the present application, as shown in FIG. 5, on the basis of the time correction device including the second message processing module 51 and the custom code module 52, the time correction device may further include: a second FIFO The memory 53 and the delete idle frame module 54.

The second FIFO memory 53 is connected to the inserted custom code module 52 for storing the marked message.

The delete idle frame module 54 is connected to the second message processing module 51 and the second FIFO memory 53 respectively, and is used to obtain the second waterline data of the second FIFO memory 53, if the second If the waterline data is greater than the second waterline threshold, the idle frame is deleted from the marked message.

The inserting custom code module 52 is also used to output the marked message with the idle frames deleted.

In yet another embodiment of the present application, as shown in FIG. 5, on the basis of the time correction device including the second FIFO memory 53 and the idle frame deletion module 54, the time correction device may further include: an encoding module 55 and a second Optical port processing module 56.

The encoding module 55 is connected to the inserted custom code module 52 and the second optical port processing module 56 respectively, and is used to encode the marked messages with idle frames deleted. After the encoding, the time-of-day message is sent to the second optical port processing module 56.

Specifically, the encoding module 55 may be an 8B/10B encoding module.

The second optical port processing module 56 is configured to receive the encoded time synchronization message sent by the encoding module 55, and output the encoded time synchronization message using parallel communication.

Among them, the second optical port processing module 56 may adopt an IP (Internet Protocol) core to perform serial/parallel communication mode conversion and communicate with the optical module.

In yet another embodiment of the present application, a time correction system in the embodiment of the present application is described in detail. The system includes: a time correction device on the slave side and a time correction device on the master side.

Exemplarily, as shown in FIG. 6, the time correction system may include: a time correction device 61 and a time correction device 62. The time correction device 61 may be a time correction device located on the main side. The time correction device 62 may be a time correction device on the slave side.

Exemplarily, as shown in FIG. 7, the time correction system may include: a time correction device 71, a time correction device 72, a time correction device 73 and a time correction device 74. The time correction device 71 is connected to the time correction device 72, the time correction device 73, and the time correction device 74, respectively. The time correction device 71 may be a time correction device located on the main side. The time correction device 72, the time correction device 73, and the time correction device 74 may be time correction devices on the slave side, respectively.

In another embodiment of the present application, a server in the embodiment of the present application is described in detail. As shown in FIG. 8, the server may include: a processor 801, a memory 802, a communication interface 803, and a bus 804.

The processor 801, the memory 802, and the communication interface 803 communicate with each other through the bus 804.

The communication interface 803 is used for information transmission between external devices.

Exemplarily, the external device may be user equipment UE.

The processor 801 is configured to call program instructions in the memory 802 to execute the steps of the time correction method described in any one of the foregoing embodiments.

Specifically, the processor 801 is used to execute a time correction program to achieve the following steps: acquiring a first pair of time messages, the first pair of time messages carrying a time stamp and a preset encoding; recording and detection A first timestamp corresponding to the moment of the preset encoding, and deleting the preset encoding in the first pair of time messages to obtain an original time stamp; extracting the time stamp in the original time stamp Using the time stamp and the first time stamp to correct the time stamp of the time stamp counter so that the time stamp of the time stamp counter and the time stamp of the time stamp counter that sent the first pair of time messages are at The value at the same moment is the same.

Specifically, the processor 801 is used to execute a time correction program to implement the following steps: when the timestamp counter is cleared at the second level, a second time stamp including a time corresponding to the timestamp reset time of the timestamp counter is generated A second pair of time messages; insert a preset code into the second pair of time messages to obtain a marked message; and output the marked message.

In yet another embodiment of the present application, a computer-readable storage medium in an embodiment of the present application is described in detail. The computer-readable storage medium stores computer instructions, and the computer instructions cause the computer to execute any of the above The steps of the time correction method according to an embodiment.

Wherein, the computer-readable storage medium may store one or more computer instructions. The computer-readable storage medium may include volatile memory, such as random access memory; the computer-readable storage medium may also include non-volatile memory, such as read-only memory, flash memory, hard disk, or solid-state hard disk; The computer-readable storage medium may also include a combination of the aforementioned types of memory.

Specifically, the computer instruction causes the computer to perform the following steps: obtain a first pair of time messages, the first pair of time messages carrying a time stamp and a preset code; recording and detecting the preset code The first timestamp corresponding to the moment of time, and deleting the preset code in the first pair of time-of-day messages to obtain the original time-of-day message; extracting the time-of-day timestamp in the original time-of-day message; using the pair The timestamp and the first timestamp, correct the timestamp of the timestamp counter so that the timestamp of the timestamp counter and the timestamp of the timestamp counter sending the first pair of time messages have the same value at the same time .

Specifically, the computer instruction causes the computer to perform the following steps: when the time stamp counter is cleared at the second level, a second pair of time stamps including a second time stamp corresponding to the time at which the time stamp counter is cleared at the second level is generated Text; insert a preset code into the second pair of time messages to get the marked message; output the marked message.

In yet another embodiment of the present application, a computer program product is provided. The computer program product includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions. When the program instructions are executed by a computer, the computer is caused to execute the method in any of the above method embodiments.

It can be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For hardware implementation, the processing unit can be implemented in one or more application specific integrated circuits (Application Specific Integrated Circuits, ASIC), digital signal processor (Digital Signal Processing, DSP), digital signal processing device (DSPDevice, DSPD), programmable logic Device (Programmable Logic Device, PLD), Field-Programmable Gate Array (FPGA), general-purpose processor, controller, microcontroller, microprocessor, others used to perform the functions described in this application Electronic unit or its combination.

For software implementation, the techniques described herein may be implemented through units that perform the functions described herein. The software codes can be stored in memory and executed by the processor. The memory may be implemented in the processor or external to the processor.

Persons of ordinary skill in the art may realize that the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed in hardware or software depends on the specific application of the technical solution and design constraints. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

Those skilled in the art can clearly understand that for the convenience and conciseness of the description, the specific working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiments, which will not be repeated here.

In the embodiments provided in this application, it should be understood that the disclosed device and method may be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented. In addition, the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical, or other forms.

The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.

If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solutions of the embodiments of the present invention may essentially be a part that contributes to the existing technology or a part of the technical solution may be embodied in the form of a software product, and the computer software product is stored in a storage medium , Including several instructions to enable a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage media include various media that can store program codes, such as a U disk, a mobile hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.

It should be noted that in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply these There is any such actual relationship or order between entities or operations. Moreover, the terms "include", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also those not explicitly listed Or other elements that are inherent to this process, method, article, or equipment. Without more restrictions, the element defined by the sentence "include one..." does not exclude that there are other identical elements in the process, method, article or equipment that includes the element.

The above are only specific embodiments of the present invention, so that those skilled in the art can understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to these embodiments shown in this document, but should conform to the widest scope consistent with the principles and novel features applied in this document.

Claims

A time correction method, which includes:

Acquiring a first pair of time messages, the first pair of time messages carrying a time stamp and a preset code;

Recording a first timestamp corresponding to the moment when the preset encoding is detected, and deleting the preset encoding in the first pair of time-of-day messages to obtain the original time-of-day message;

Extracting the time synchronization timestamp in the original time synchronization message;

Using the time stamp and the first time stamp to correct the time stamp of the time stamp counter so that the time stamp of the time stamp counter and the time stamp of the time stamp counter that sent the first pair of time messages are the same The value at the moment is the same.
The time correction method according to claim 1, wherein the extracting the time synchronization time stamp in the original time synchronization message comprises:

Acquiring first waterline data of a first first-in first-out FIFO memory, where the first FIFO memory is used to store the first timestamp and the original time synchronization message;

If the first waterline data is less than the first waterline threshold, insert an idle frame in the data stream composed of the first time stamp and the original time synchronization message;

From the data stream inserted into the idle frame, extract the time stamp.
The time correction method according to claim 2, wherein the method further comprises:

Obtain message data transmitted by parallel communication;

Converting the message data into byte-unaligned messages transmitted by serial communication;

Align the bytes in the byte unaligned message to obtain an undecoded message;

Decoding the undecoded message to obtain the first pair of time messages.
A time correction method, which includes:

When the timestamp counter is cleared at the second level, a second pair of time messages including a second timestamp corresponding to the second time cleared time of the timestamp counter is generated;

Insert a preset code into the second pair of time messages to obtain the marked message;

Output the marked message.
The time correction method according to claim 4, wherein the outputting the marked message includes:

Acquiring second waterline data of a second FIFO memory, where the second FIFO memory is used to store the marked message;

If the second waterline data is greater than the second waterline threshold, delete idle frames from the marked message;

The marked message output of idle frames will be deleted.
The time correction method according to claim 5, wherein the output of the marked message that will delete idle frames includes:

Encode the marked messages with idle frames deleted, and get the timed messages after encoding;

Use the parallel communication mode to output the encoded time-aligned message.
A time correction device, including: a first message processing module and a module for deleting a custom code;

The delete custom code module is connected to the first message processing module, and is used to obtain a first pair of time messages. The first pair of time messages carries a time stamp and a preset code. A first time stamp corresponding to the moment of the preset encoding, and deleting the preset encoding in the first pair of time messages to obtain the original time stamp message;

The first message processing module is used to extract the time stamp in the original time stamp message, and use the time stamp and the first time stamp to correct the time stamp of the time stamp counter so that all The time stamp of the time stamp counter and the time stamp of the time stamp counter sending the first pair of time messages have the same value at the same time.
The time correction device according to claim 7, wherein the device further comprises: a first FIFO memory and an idle frame insertion module;

The first FIFO memory is respectively connected to the inserted idle frame module and the first message processing module, and is used to store the first time stamp and the original time synchronization message;

The insert idle frame module and the delete custom code module are connected to obtain the first waterline data of the first FIFO memory, if the first waterline data is less than the first waterline threshold, then the Inserting an idle frame into the data stream composed of the first time stamp and the original time synchronization message;

The first message processing module is also used to extract the time-stamping time stamp from the data stream inserted into the idle frame.
The time correction device according to claim 7 or 8, wherein the device further comprises: a byte alignment module, a decoding module and a first optical port processing module;

The first optical port processing module is connected to the byte alignment module, and is used to obtain the message data transmitted by the parallel communication method, and convert the message data into a byte unaligned message transmitted by the serial communication method Send the byte unaligned message to the byte alignment module;

The byte alignment module and the decoding module are connected to receive the byte unaligned message sent by the first optical port processing module, and align the bytes in the byte unaligned message to obtain Undecoded message, send the undecoded message to the decoding module;

The decoding module is configured to receive the undecoded message sent by the byte alignment module, decode the undecoded message, and obtain the first pair of time messages.
A time correction device, including: a second message processing module and a module for inserting a custom code;

The second message processing module is used to generate a second time-of-day message including a second time stamp corresponding to the second time of the time stamp counter when the time stamp counter is cleared at the second level, and send the second Two pairs of time messages are inserted into the custom code module;

The inserting a custom code module is used to receive the second pair of time messages sent by the second message processing module, insert a preset code into the second pair of time messages, obtain a marked message, and output the Message marked.
The time correction device according to claim 10, wherein the device further comprises: a second FIFO memory and a module for deleting idle frames;

The second FIFO memory is connected to the inserted custom code module, and is used to store the marked message;

The delete idle frame module is respectively connected to the second message processing module and the second FIFO memory, and is used to obtain the second waterline data of the second FIFO memory, if the second waterline data is greater than The second waterline threshold, then delete idle frames from the marked message;

The module for inserting a custom code is also used to output the marked message with idle frames deleted.
The time correction device according to claim 11, wherein the device further comprises: an encoding module and a second optical port processing module;

The encoding module is respectively connected to the inserted custom code module and the second optical port processing module, and is used to encode the marked messages with idle frames deleted, obtain the encoded time-of-day messages, and send the encoded Time synchronization message to the second optical port processing module;

The second optical port processing module is configured to receive the encoded time synchronization message sent by the encoding module, and output the encoded time synchronization message using parallel communication.
A time correction system, wherein the system includes the time correction device according to any one of claims 7 to 9 and the time correction device according to any one of claims 10 to 12.
A computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions that cause the computer to perform the steps of the method according to any one of claims 1 to 6.