WO2020124604A1

WO2020124604A1 - Display panel and driving method thereof, display device, and terminal

Info

Publication number: WO2020124604A1
Application number: PCT/CN2018/122882
Authority: WO
Inventors: 管曦萌
Original assignee: 深圳市柔宇科技有限公司
Priority date: 2018-12-21
Filing date: 2018-12-21
Publication date: 2020-06-25
Also published as: CN112639941A

Abstract

The present invention relates to a display panel and a driving method thereof, a display device, and a terminal. The display panel comprises a panel substrate, and a display region provided on the panel substrate; the display region comprises m parallel sub-display regions and m region selection lines extending in a first direction and provided corresponding to the m parallel sub-display regions. When any one or more of the m region selection lines are gated, the sub-display regions provided corresponding to the gated region selection lines are gated, and a data signal is written; for the ungated sub-display regions among the m parallel sub-display regions, a data signal is not written. The present invention effectively reduces the dynamic power consumption and delay of a data line.

Description

Display panel and its driving method, display device and terminal

Technical field

The present invention relates to the field of display technology, and more particularly, to a display panel and its driving method, display device, and terminal.

Background technique

The power consumption of the display panel of the display panel includes static power consumption and dynamic power consumption. The static power consumption is, for example, power consumption caused by leakage current and light emission, and the dynamic power consumption is, for example, power consumption caused by driving. When the screen size and resolution increase, The fastest increase in the components of power consumption is the dynamic power consumption on the data line, which is an increase of N ^3. This is because the number of data lines operating simultaneously is proportional to N, and the capacitive load on each data line is proportional to N. Data The line action frequency is proportional to N, where N is the number of pixels in the horizontal direction of the screen. The light-emitting power consumption is proportional to N ² , this is because the number of pixels is proportional to N ² ; the line scan power consumption is proportional to N ² , this is because the capacitance load on each row line is proportional to N, and the row-line scanning frequency is proportional to N, while The number of scanned lines is only 1~2; therefore, when the screen size and resolution increase, the dynamic power consumption on the data line increases the fastest.

The solution to consider the super-large screen formed by the simultaneous growth of resolution and size can be achieved in the following ways:

The display panel can be manufactured by splicing, or it can be manufactured together on the whole surface; the most ideal seamless splicing method is: the data line, power supply line, GOA are connected at the interface, and the external drive is unified.

However, in many cases, the screen works in partial refresh mode, that is, only a small part of the area displays a dynamic picture, and the remaining part maintains a constant background or even a dark picture. Therefore, the static part of the pixels causes a huge contribution to the load of the data line. Consume.

technical problem

The technical problem to be solved by the present invention is to provide a display panel, a driving method thereof, a display device, and a terminal in view of the above-mentioned defects of the prior art.

Technical solution

The technical solution adopted by the present invention to solve its technical problem is to provide a display panel, including: a panel substrate, a display area provided on the panel substrate, the display area including m sub-display areas in parallel; and M area selection lines extending along the first direction corresponding to the m sub-display areas parallel to each other;

When any one or more of the m area selection lines are selected, the sub display area corresponding to the selected area selection line is selected, and a data signal is written; the m parallel sub-elements In the display area of the unselected sub-display area, no data signal is written; where m is a positive integer greater than or equal to 1.

The present invention also provides a driving method for driving the foregoing display panel, including:

Divide the display area of the display panel into m parallel sub-display areas;

In the data writing stage, any one or more sub-display areas of the m sub-display areas are gated, and a data signal is written; at the same time, the unselected sub-display areas of the m sub-display areas are closed without writing Data signal.

The invention also provides a display device including the aforementioned display panel.

The present invention also provides a terminal, including the foregoing display device.

Beneficial effect

The invention divides the display area of the display panel into m parallel sub-display areas, and strobes the corresponding sub-display area by the area selection line according to the actual display requirements of the display area, thereby enabling the data signal to be written through the global data line Entering the selected sub-display area can effectively reduce the dynamic power consumption and delay of the data line, thereby greatly reducing the overall power consumption of the display panel.

BRIEF DESCRIPTION

The present invention will be further described below with reference to the drawings and embodiments. In the drawings:

1 is a schematic diagram of a circuit principle of a display panel provided by an embodiment of the present invention;

2 is a schematic diagram of a display area of a display panel provided by an embodiment of the present invention;

3 is a schematic diagram of the circuit principle of a GOA unit provided by an embodiment of the present invention;

4 is a schematic structural diagram of an embodiment of a display panel provided by the present invention;

5 is a schematic structural diagram of another embodiment of a display panel provided by the present invention;

6 is a schematic diagram of an N×M display panel;

7 is a schematic diagram of a display example expanded from the N×M display panel of FIG. 6 to 2N×2M;

8 is a schematic diagram of another display example expanded from the N×M display panel of FIG. 6 to 2N×2M;

9 is a schematic flowchart of an embodiment of a driving method of a display panel provided by the present invention;

10 is a schematic flowchart of another embodiment of a driving method of a display panel provided by the present invention;

FIG. 11 is a schematic diagram of a display implementation expanded from the N×M display panel of FIG. 6 to 4N×4M.

Best Mode of the Invention

The technical solutions in the embodiments of the present invention will be described clearly and completely in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present invention.

In order to solve the problem of huge power consumption and delay caused by the load of the data line in the static area of the existing display screen, the present invention provides a new display panel. The display panel can divide the display area into multiple sub-display areas. The control of multiple sub-display areas realizes that the data signal is only written to the sub-display area of the dynamic screen, and the sub-display area of the static screen does not write the data signal, so that the sub-display area of the static screen does not contribute to the load of the data line and does not generate additional The power consumption, without adding additional delay, achieves the purpose of greatly reducing the dynamic power consumption and delay of the data line, and further reduces the overall power consumption and design challenges of the display panel.

Specifically, referring to FIG. 2, an embodiment of the present invention provides a display panel including: a panel substrate 100 and a display area 10 provided on the panel substrate 100.

Further, as shown in FIG. 1, the display area 10 of the display panel includes m parallel sub-display areas 11; and further includes: n global data lines 12 extending in the second direction and parallel to the m parallel display areas The sub display area 11 corresponds to m set area selection lines 13 extending along the first direction. Among them, when any one or more of the m area selection lines 13 are gated, the sub display area 11 corresponding to the selected area selection line 13 is gated and the data signal is written; m parallel In the undisplayed sub-display area 11 of the sub-display area 11, no data signal is written.

Each sub-display area 11 includes n pixel units 110 corresponding to n global data lines 12. Each pixel unit 110 includes a pixel module 112 and a gate control switch 111. The pixel module 112 communicates with the corresponding global data through the gate control switch 111 Line 12 is connected.

Specifically, when any one or more of the m area selection lines 13 are selected, the sub display area 11 corresponding to the selected area selection line 13 is selected, and the selected sub display area 11 is selected. The gate control switch 111 of each pixel unit 110 in is turned on, and the data signal is written into the gated sub-display area 11 through the global data line 12; wherein, m and n are positive integers greater than or equal to 1. At the same time, the gate control switches 111 in the unselected sub-display areas 11 of the m parallel sub-display areas 11 are all in the off state, and the data signal cannot be written.

As shown in FIG. 1, it is assumed that according to the display requirements, the #2 sub-display area 11 needs to be displayed on the dynamic screen, and the other sub-display areas 11 are static screens. At this time, control is performed according to the display requirements so that the #2 sub-display area 11 The #2 area selection line 13 correspondingly received receives the strobe signal, and the strobe signal is transmitted to each gate control switch 111 in the #2 sub-display area 11, each gate control switch 111 is turned on, at this time, n The data signals on the global data lines 12 respectively flow through the gate switches 111 corresponding to them through the respective global data lines 12, and the corresponding gate switches 111 are written into the corresponding pixel units 110, so that the ## Two sub-display areas 11 can write data signals.

It should be noted here that the number n of the global data lines 12 of the embodiment of the present invention depends on the number of pixel columns of the display area 10, that is, as many columns as there are in the display area 10, as many global data lines 12 as possible. Further, the number of pixel units 110 is the same as the number of global data lines 12, that is to say, in each sub-display area 11, n pixel units 110 are correspondingly connected to n global lines.

As shown in FIG. 1, when the #2th sub-display area 11 is gated, data signals are written through the #1, #2, #3, ..., #n global data lines 12 respectively In the pixel unit 110 corresponding thereto.

Of course, it can be understood that at this time, the other sub-display areas 11 do not need to write data signals because there is no dynamically refreshed picture or because of the timing sequence. Therefore, at this time, it is possible to control the other area selection lines 13 except the #2th area selection line 13 among the m area selection lines 13 to be disabled. At this time, the gate control switches 111 in the other sub-display areas 11 are all in In the off state, the data signal cannot be written into the pixel unit 110 in the other sub-display areas 11, so that the pixel unit 110 in the other sub-display areas 11 does not contribute to the load of the global data line 12 and does not generate additional power consumption.

In the embodiment of the present invention, optionally, the gate control switch 111 is a high mobility transistor. Specifically, the gate control switch 111 of the embodiment of the present invention includes a first electrode, a second electrode, and a third electrode.

The first electrode of the gate control switch 111 is connected to the corresponding global data line 12, the second electrode of the gate control switch 111 is connected to the pixel module 112, and the third electrode of the gate control switch 111 is connected to the corresponding area selection line 13. Further, the third electrode of the gate control switch 111 is the gate of the transistor. Therefore, by controlling the voltage of the third electrode of the gate control switch 111, the gate control switch 111 can be controlled to be turned on or off, and then by controlling the gate control switch 111 to be turned on or off to control the data signal to be written to the corresponding pixel unit 110 or not to be written Corresponding pixel unit 110.

Further, the gate control switch 111 of the embodiment of the present invention includes a P-type transistor or an N-type transistor. That is, the gate control switch 111 of the embodiment of the present invention may be a P-type transistor or an N-type transistor. When the gate control switch 111 selects a P-type transistor, the signal that controls its opening is a low-level signal; when the gate control switch 111 selects an N-type transistor, the signal that controls its opening is a high-level signal; that is, when the gate control switch 111 When it is a P-type transistor, the signal received by the selected area selection line 13 is a low-level signal, and when the gate control switch 111 is an N-type transistor, the signal received by the selected area selection line 13 is a high-level signal .

Further, since the gates of all the gating switches 111 in the same sub-display area 11 are connected to the same area selection line 13, the types of all the gating switches 111 in the same sub-display area 11 are the same; that is, the same sub All the gate switches 111 in the display area 11 are P-type transistors or all the gate switches 111 in the same sub-display area 11 are N-type transistors.

Optionally, in the embodiment of the present invention, each pixel module 112 includes a local data line 1121 and a plurality of pixel circuits 1122; each pixel circuit 1122 includes a sub-data line, and the sub-data lines are all connected to the local data line 1121, And the second electrode of the gate control switch 111 is connected through the local data line 1121.

Further, since the sub-display area 11 is divided according to the row pixel circuits 1122 in the display area 10 and adjacent sub-display areas 11 are parallel to each other, each pixel module 112 in each sub-display area 11 The number of pixel circuits 1122 is the same.

Optionally, in the embodiment of the present invention, the number of gate control switches 111 in each sub-display area 11 is the same as the number of pixel units 110, that is, each pixel unit 110 is configured with one gate control switch 111.

Optionally, the width of each sub-display area 11, that is, the number of rows of pixel circuits 1122 included, depends on specific design requirements, and the present invention does not perform on the number of rows of pixel circuits 1122 included in each sub-display area 11. Specific restrictions. Understandably, the smaller the width of each sub-display area 11, that is, the fewer the number of rows of pixel circuits 1122 included, the finer the control. However, the greater the number of gated switches 111 at this time, each piece of global data The larger the fixed load on the line 12, the greater the power consumption, and the greater the number of area selection lines 13 and the larger the occupied area, so the number of rows of pixel circuits 1122 included in each sub-display area 11 (That is, the number of pixel circuits 1122 included in each pixel module 112) needs to be set according to specific design requirements to achieve a better power saving effect.

Further, the display panel of the embodiment of the present invention further includes: driver ICs independently connected to the m area selection lines 13 respectively. The driver IC is used to output a selection signal to gate any one or more of the m area selection lines 13. Optionally, the selection signal output by the driver IC is a high and low level signal. Understandably, when the gate control switch 111 is a P-type transistor, the selection signal output by the drive IC is a low-level signal; when the gate control switch 111 is an N-type transistor, the selection signal output by the drive IC is a high-level signal.

Further, the display panel of the embodiment of the present invention is characterized by further comprising: a GOA circuit 14 provided on the panel substrate 100 and used to output a scan driving signal.

Optionally, in the embodiment of the present invention, the GOA circuit 14 is a randomly addressable GOA circuit 14.

Further, the GOA circuit 14 of the embodiment of the present invention includes a plurality of GOA units 141 independent of each other.

Further, the display panel of the embodiment of the present invention further includes a plurality of row scanning lines corresponding to the GOA unit 141, and each row scanning line is respectively connected to the pixel circuit 1122 of the row corresponding to each pixel module 112 for connecting the GOA unit The scan driving signal output by 141 is transmitted to the pixel circuit 1122 of the corresponding row to drive the pixel circuit 1122 of the corresponding row to work.

Specifically, in the GOA circuit 14 of the embodiment of the present invention, the trigger between the GOA unit 141 of each stage is not caused by the output of the previous stage, but caused by the input address. Therefore, by changing the range of the input address, Change the range of lines that actually output scan pulses; that is, by changing the range of input addresses, and then change the range of lines of scan pulses output by the GOA unit 141 actually output in the GOA circuit 14, thereby controlling the corresponding line scan lines to output scan drive signals To the corresponding row pixel circuit 1122, in order to achieve spatially separated sub-display areas 11 with dynamic display screens, continuous scan in time, while other sub-display areas 11 without dynamic display screens are not scanned, and there is a dynamic display screen The sub-display area 11 changes dynamically according to usage requirements.

As shown in FIG. 2, it is a schematic diagram of a specific division of a display area of a display panel according to an embodiment of the invention.

The example of FIG. 2 is that the display area 10 is divided into 10 sub-display areas 11, respectively a1, a2, a3, a4, a5, a6, a7, a8, a9, a10. In this embodiment, the display panel includes a GOA circuit 14 that is disposed in the frame area. As shown in FIG. 2, when a2, a5, and a6 have dynamic display screens, the area selection line 13 corresponding to a2, a5, and a6 is selected, and the gate control switches 111 in a2, a5, and a6 are turned on, and global data The data signals on line 12 are written into a2, a5 and a6 respectively, and at the same time, the scan drive signals output by GOA circuit 14 drive the corresponding rows in a2, a5 and a6 respectively, while the other sub-display areas 11 (a1, a3, a4 , A7, a8, a9, a10) are not written with data signals, which greatly reduces the dynamic power consumption of the data line.

As shown in FIG. 3, further, in the embodiment of the present invention, each GOA unit 141 includes an enable module 1401, a reset module 1402, and a drive module 1403.

The enable module 1401 includes an address input terminal for receiving a row address signal and an enable signal output terminal for outputting an enable signal according to the row address signal; the reset module 1402 and the driving module 1403 are respectively connected to the enable signal output terminal, The driving module 1403 is used to receive the enable signal output from the enable signal output terminal, and according to the enable signal to output the scan driving signal to the corresponding row scanning line; the reset module 1402 is used to output the drive signal from the driving module 1403 and After driving the pixel circuits 1122 of the corresponding row, the enable module 1401 is reset.

Further, the driving module 1403 includes an input terminal and an output terminal. The input terminal of the driving module 1403 is connected to the enable signal output terminal of the enabling module 1401, and the output terminal of the driving module 1403 is connected to the corresponding row scanning line.

Further, in the display panel of the embodiment of the present invention, the GOA circuit 14 provided on the panel substrate 100 includes one.

Specifically, as shown in FIG. 4, the display area 10 is located in the middle of the panel substrate 100, the area between the periphery of the display area 10 and the edge of the panel substrate 100 forms a frame area, and the GOA circuit 14 is disposed in the frame area.

Further, as shown in FIG. 5, in the display panel of the embodiment of the present invention, the GOA circuit 14 provided on the panel substrate 100 includes two GOAs.

As shown in FIG. 5, the display area 10 is located in the middle of the panel substrate 100. The area between the periphery of the display area 10 and the edge of the panel substrate 100 forms a bezel area. The two GOA circuits 14 are respectively disposed on the opposite sides of the display area. Within the border area on the side.

Referring to FIG. 6, it is a schematic structural diagram of a screen with a resolution of N×M. Consider the increase in power consumption from an N×M screen to a 2N×2M screen.

7 is a schematic structural view of a display panel with a resolution of 2N×2M adopting the present invention.

As shown in FIG. 7, in the 2N×2M display area, only the image of the area of N×M size changes dynamically, as shown by 701 in FIG. 7, and the other areas have a non-uniform background, as shown in FIG. 7 The 702 is shown. It is assumed that the write power consumption of the global data line 12 of FIG. 6 is 1 unit.

If the conventional design is adopted, the write power consumption of the global data line 12 under the display screen is 8 times of the write power consumption of the global data line 12 of FIG. 6. Among them, the power consumption of the dynamically changing number of global data lines 12 is twice that of FIG. 6, and the power consumption of the actual capacitive load on each global data line 12 is twice that of FIG. 6, dynamically changing global data The power consumption of the operating frequency of the line 12 is twice that of FIG. 6; therefore, the write power consumption of the conventional design is 8 times that of FIG. With the display panel of the present invention, the write power consumption of the global data line 12 under this display screen is only about twice that of FIG. 6. Among them, the power consumption consumed by the number of dynamically changing global data lines 12 is about twice that of FIG. 6, and the power consumption consumed by the actual capacitive load on each global data line 12 is twice that of FIG. 6. The power consumption of the operating frequency of the data line 12 is double that of FIG. 6; therefore, the write power consumption of the global data line 12 using the present invention is only twice that of FIG. 6. At this time, only N rows of pixel circuits 1122 need to be scanned. Therefore, under the same refresh rate, the time for writing data in each row is twice that of the conventional case, and the power consumption can be effectively saved by 75% or more.

Alternatively, as shown in FIG. 7, it is assumed that the other sub-display areas 702 are black screens.

In the conventional design, the data writing power consumption of the global data line 12 is twice that of FIG. 6. Among them, the power consumption of the dynamically changing number of global data lines 12 is double that of FIG. 6. At this time, the data line of 702 has been written to the same low voltage, so there is no actual change; the actual value of each global data line 12 The power consumption consumed by the capacitive load is twice that of FIG. 6; the power consumption consumed by the operating frequency of the dynamically changing global data line 12 is double that of FIG. 6, when scanning N rows that are not dynamically changing, the global data line The same low voltage is written on 12, so there is no effective voltage variation; therefore, under the traditional design, the data writing power consumption of the global data line 12 is twice that of FIG. 6 in total. With the display panel of the present invention, the write power consumption of the global data line 12 under this display screen is double that of FIG. 6. Among them, the power consumption of the dynamically changing number of global data lines 12 is double that of FIG. 6; the power consumption of the actual capacitive load on each global data line 12 is double that of FIG. 6, which is not dynamic. The sub-display area 11 is not connected to the data signal; the dynamic frequency of the global data line 12 operating frequency consumes twice the power consumption of FIG. 6, at this time, only N rows need to be scanned, so at the same refresh frequency, every The time for writing row data is twice that of the traditional case, which can effectively save 50% power consumption.

Further, as shown in FIG. 8, the dynamic change areas are 801 and 802, and the static area is 803. Among them, 801 and 802 are in the same horizontal position (the same GOA address range), and the remaining area 803 is a non-uniform background.

The data writing power consumption under the traditional design is 8 times that of FIG. 6, where the power consumption of the dynamically changing number of global data lines 12 is twice that of FIG. 6; the actual capacitive load on each global data line 12 is The power consumption consumed is twice that of FIG. 6; the power consumption consumed by the operating frequency of the dynamically changing global data line 12 is twice that of FIG. With the display panel of the present invention, under the display screen, the power consumption of the data writing power consumption of the global data line 12 is twice that of FIG. 6. Among them, the power consumption of the dynamically changing number of global data lines 12 is twice that of FIG. 6; the power consumption of the actual capacitive load on each global data line 12 is double that of FIG. 6, and the non-dynamically changing sub The display area 11 is not connected to the global data line 12; the power consumption of the operating frequency of each global data line 12 is double that of FIG. 6; therefore, the total power consumption is only twice that of FIG. At this time, only N lines need to be scanned, so under the same refresh rate, the time to finalize each line of data is twice that of the traditional case, which can effectively save 75% of power consumption.

As shown in FIG. 9, further, the present invention also provides a driving method for driving the aforementioned display panel. The driving method includes the following steps:

Step S901: Divide the display area 10 of the display panel into m parallel sub-display areas 11;

Step S902, in the data writing stage, gate any one or more sub-display areas 11 of the m sub-display areas 11 and write a data signal; at the same time, turn off the unselected sub-display areas 11 of the m sub-display areas 11, No data signal is written.

Optionally in this step, step S902 includes:

Step S9021: A selection signal is output to the area selection line 13 corresponding to any one or more of the m sub-display areas 11.

Step S9022. The gate control switch 111 in any one or more sub-display areas 11 of the m sub-display areas 11 is turned on according to the selection signal, so that any one or more sub-display areas 11 in the m sub-display areas 11 are gated.

In step S9023, the data signal flows through the opened gate control switch 111 through the global data line 12, and is written into the pixel unit 110 connected to the opened gate control switch 111.

Further, as shown in FIG. 10, in the embodiment of the present invention, the driving method further includes the following steps:

In the continuous data writing stage:

In step S110, the display order of the m sub-display areas 11 is preset.

In step S111, one sub-display area 11 is sequentially selected and written with data signals according to the display order, and the other sub-display areas 11 are closed without writing data signals while one sub-display area 11 is selected.

Specifically, as shown in FIG. 11, consider a 4N×4M screen, in which the data writing power consumption in FIG. 6 is 1 unit. Using the solution of the present invention, the 4N×4M display area 10 shown in FIG. 11 is divided into four sub-display areas 11, and each sub-display area 11 includes N rows of pixels. Assuming that the data writing order is from the first row to the 4Nth row, at this time, the first sub-display area 11 to the fourth sub-display area 11 are sequentially gated in the order of the first line to the 4Nth line, and the data signals are sequentially written And, while one sub-display area 11 is gated, the other sub-display areas 11 are closed, and no data signal is written.

That is, as shown in FIG. 11, when the data signal is written into the first row to the Nth row, the first sub display area 11 is gated, and the second to fourth sub display areas 11 are closed; the data signal is written to the N+1 line to At the 2Nth row, the second sub-display area 11 is gated, the first sub-display area 11, the third sub-display area 11 and the fourth sub-display area 11 are closed; when the data signal is written to the 2N+1th line to the 3Nth line , The third sub-display area 11 is gated, the first sub-display area 11, the second sub-display area 11 and the fourth sub-display area 11 are turned off; when the data signal is written to the 3N+1 line to the 4N line, the gate The four sub-display areas 11, the first sub-display area 11, the second sub-display area 11 and the third sub-display area 11 are closed. It can be seen that even with full-screen scanning, only 25% of the capacitor is connected to the global data line 12, which can effectively save 75% of the power consumption; at the same time, because only 25% of the capacitor is connected to the global data line 12, the global data The RC delay on line 12 is reduced, which greatly reduces the difficulty of meeting the timing requirements, and further improves the accuracy of writing data on time and the panel yield.

Further, the present invention also provides a display device, including the aforementioned display panel. Optionally, the display panel provided by the present invention includes but is not limited to a TFT-LCD display panel and an OLED display panel.

Further, a terminal includes the foregoing display device. Optionally, the terminal provided by the present invention includes but is not limited to a mobile phone, a tablet computer and the like.

The above embodiments are only for explaining the technical concept and features of the present invention, and the purpose thereof is to enable those familiar with the technology to understand the contents of the present invention and implement them accordingly, and cannot limit the protection scope of the present invention. Any changes and modifications made within the scope of the claims of the present invention shall fall within the scope of the claims of the present invention.

It should be understood that those of ordinary skill in the art can make improvements or changes based on the above description, and all such improvements and changes should fall within the protection scope of the appended claims of the present invention.

Claims

A display panel, comprising: a panel substrate, a display area provided on the panel substrate, the display area includes m sub-display areas parallel to each other; and the m sub-displays parallel to each other The area corresponding to m area selection lines extending along the first direction;

When any one or more of the m area selection lines are selected, the sub display area corresponding to the selected area selection line is selected, and a data signal is written; the m parallel sub-elements In the display area of the unselected sub-display area, no data signal is written; where m is a positive integer greater than or equal to 1.
The display panel according to claim 1, further comprising: n global data lines extending in the second direction, and each of the sub-display areas includes n corresponding to the n global data lines Pixel units, each of the pixel units includes a pixel module and a gate control switch, the pixel module is connected to a corresponding global data line through the gate control switch; any one or more of the m area selection lines When being gated, the gate switch of each pixel unit in the gated sub-display area is turned on, and a data signal is written into the gated sub-display area through the global data line; where n is greater than or equal to Positive integer of 1.
The display panel according to claim 2, wherein the gate control switch is a high mobility transistor, and the gate control switch includes a first electrode, a second electrode, and a third electrode;

The first electrode of the gate control switch is connected to the corresponding global data line, the second electrode of the gate control switch is connected to the pixel module, and the third electrode of the gate control switch is connected to the corresponding area selection line.
The display panel according to claim 2, wherein the gate control switch comprises a P-type transistor or an N-type transistor.
The display panel according to claim 2, wherein each pixel module includes a local data line and a plurality of pixel circuits;

Each pixel circuit includes a sub-data line, and the sub-data lines are all connected to the local data line, and are connected to the second electrode of the gate control switch through the local data line.
The display panel according to claim 5, wherein the number of pixel circuits of each pixel module is the same.
The display panel according to claim 1, further comprising: a driver IC independently connected to the m area selection lines; the drive IC is used to output a selection signal to gate the m area selection Any one or more of the lines.
The display panel according to claim 2, further comprising: a GOA circuit provided on the panel substrate and used for outputting a scan driving signal.
The display panel according to claim 8, wherein the GOA circuit is a randomly addressable GOA circuit.
The display panel according to claim 8, wherein the GOA circuit includes a plurality of mutually independent GOA units;

The display panel further includes a plurality of row scanning lines corresponding to the GOA unit, and each row scanning line is respectively connected to a pixel circuit of a row corresponding to each of the pixel modules for outputting the GOA unit The scan drive signal is transmitted to the pixel circuit of the corresponding row to drive the pixel circuit of the corresponding row to work.
The display panel according to claim 10, wherein each GOA unit includes an enable module, a reset module, and a drive module;

The enable module includes an address input terminal for receiving a row address signal and an enable signal output terminal for outputting an enable signal according to the row address signal;

The reset module and the drive module are respectively connected to the enable signal output terminal, wherein the drive module is configured to receive an enable signal output from the enable signal output terminal and output a scan according to the enable signal Drive signal to the corresponding set line scan line;

The reset module is used to reset the enable module after the drive module outputs a drive signal and drives the pixel circuits of the corresponding row.
The display panel according to claim 11, wherein the drive module includes an input terminal and an output terminal, and the input terminal of the drive module is connected to an enable signal output terminal of the enable module, and the The output terminal is connected to the corresponding set line scanning line.
The display panel according to claim 8, wherein the GOA circuit includes a GOA circuit;

The display area is located in the middle of the panel substrate, the area between the periphery of the display area and the edge of the panel substrate forms a bezel area, and the GOA circuit is provided in the bezel area.
The display panel according to claim 8, wherein the GOA circuit includes two GOA circuits;

The display area is located in the middle of the panel substrate, the area between the periphery of the display area and the edge of the panel substrate forms a bezel area, and the two GOA circuits are respectively provided on opposite sides of the display area Within the border area.
A driving method for driving a display panel is characterized in that it includes:

Divide the display area of the display panel into m parallel sub-display areas;

In the data writing stage, any one or more sub-display areas of the m sub-display areas are gated, and a data signal is written; at the same time, the unselected sub-display areas of the m sub-display areas are closed without writing Data signal.
The driving method according to claim 15, wherein in the data writing stage, any one or more sub-display areas of the m sub-display areas are gated, and the writing data signal includes:

Output a selection signal to an area selection line corresponding to any one or more of the m sub-display areas;

The gating switch in any one or more sub-display areas of the m sub-display areas is opened according to the selection signal, so that any one or more sub-display areas in the m sub-display areas are gated;

The data signal flows through the opened gate switch and the pixel unit connected to the opened gate switch through the global data line.
The driving method according to claim 15, comprising:

Continuous data writing stage:

Preset the display order of m sub-display areas;

According to the display sequence, one sub-display area is sequentially gated and data signals are written, and while the one sub-display area is gated, the other sub-display areas are closed without writing data signals.
A display device, comprising the display panel according to any one of claims 1-14.
A terminal, characterized by comprising the display device according to claim 18.