WO2020119560A1 - Method for improving signal transmission rate and display panel - Google Patents

Method for improving signal transmission rate and display panel Download PDF

Info

Publication number
WO2020119560A1
WO2020119560A1 PCT/CN2019/123093 CN2019123093W WO2020119560A1 WO 2020119560 A1 WO2020119560 A1 WO 2020119560A1 CN 2019123093 W CN2019123093 W CN 2019123093W WO 2020119560 A1 WO2020119560 A1 WO 2020119560A1
Authority
WO
WIPO (PCT)
Prior art keywords
data
binary data
memory
transmission rate
voltage signal
Prior art date
Application number
PCT/CN2019/123093
Other languages
French (fr)
Chinese (zh)
Inventor
单剑锋
Original Assignee
惠科股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Publication of WO2020119560A1 publication Critical patent/WO2020119560A1/en

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the present application relates to the technical field of display panels, and in particular, to a method and display panel for increasing a signal transmission rate.
  • TCON timing controller
  • PTG signal generator
  • driver driver
  • TCON reads data directly from the EEPROM (memory), which will be related
  • the settings are sent to the driver.
  • the transmission rate of TCON and EEPROM is generally around 100k ⁇ 200kHz, and during this period, the panel has been in a black screen. If this rate can be increased, the black time of the panel can be shortened.
  • the main purpose of the present application is to provide a method for increasing the signal transmission rate, which aims to increase the transmission rate when the timing controller reads data directly from the memory, and shorten the long time of the panel black screen.
  • the present application provides a method for increasing the signal transmission rate.
  • An encoder is provided in the controller, and a decoder matching the encoder is provided in the memory.
  • the controller is signal-connected to the memory
  • the method for increasing the signal transmission rate includes:
  • the sub-data is encoded to generate a corresponding voltage signal, wherein each of the voltage signals is transferred to the memory in the order of the sub-data in the binary data.
  • the grouping rule includes the number of binary data in the sub-data.
  • the step of grouping the binary data to be transmitted according to the grouping rule to obtain sub-data includes:
  • the binary data to be transmitted is grouped according to the coding frequency to obtain sub-data.
  • the coding frequency includes at least one of 2 times frequency and 3 times frequency.
  • the coding frequency is 3 times the frequency.
  • the coding frequency is twice the frequency.
  • the grouping rule is to use two adjacent binary data as a group of sub-data in the order in which the binary data is to be transmitted.
  • the step of encoding the sub-data to generate a corresponding voltage signal includes:
  • the voltage signal corresponding to the sub-data is generated according to the relationship comparison table.
  • the method further includes:
  • the method further includes:
  • the relationship comparison table is sent to the memory.
  • the method further includes:
  • the voltage signal is transmitted to the memory through a serial data bus.
  • the binary data includes output permission, latch input, line start, and polarity inversion data.
  • the controller divides each binary data into multiple batches and transmits them to the memory, and the number of the binary data in each batch is eight.
  • the voltage signal represents multiple binary data.
  • the present application also provides a display panel
  • the display panel includes a processor, a controller, a memory, and a program to increase the signal transmission rate, and the program to increase the signal transmission rate is stored on the memory
  • the controller is provided with an encoder
  • the memory is provided with a decoder matching the encoder
  • the controller is connected to the memory signal
  • the The encoder is configured to encode the binary data to be transmitted into a voltage signal
  • the decoder decodes the voltage signal into binary data when detecting the voltage signal.
  • An embodiment of the present application provides a method and a display panel for increasing the signal transmission rate.
  • the controller of the display panel is provided with an encoder, and the memory of the display panel is provided with a decoder matching the encoder to increase the signal transmission rate.
  • the method includes: encoding binary data to be transmitted in the controller into a voltage signal; transmitting the voltage signal to the memory, and the decoder in the memory decodes the voltage signal into binary data when detecting the voltage signal.
  • This application encodes the binary data to be transmitted in the controller into a voltage signal. After the voltage signal is transmitted to the memory, the memory decodes the voltage signal into binary data.
  • the transmission voltage is diversified to improve the controller
  • the transfer rate with the memory reduces the black screen time of the panel.
  • FIG. 1 is a schematic diagram of a terminal structure of a hardware operating environment involved in an embodiment of the present application
  • FIG. 2 is a schematic flowchart of one embodiment of a method for increasing a signal transmission rate of this application
  • FIG. 3 is a schematic flowchart of another embodiment of a method for increasing a signal transmission rate of the present application.
  • the main solution of the embodiment of the present application is to: encode the binary data to be transmitted in the controller into a voltage signal; transmit the voltage signal to the memory, and when the decoder in the memory detects the voltage signal, The voltage signal is decoded into binary data.
  • the transfer rate between the controller and the memory in the panel is low, resulting in a long black screen time during the boot process of the panel.
  • the present application provides a solution by encoding the binary data to be transmitted in the controller into a voltage signal. After the voltage signal is transmitted to the memory, the memory decodes the voltage signal into binary data to increase the diversity of the transmission voltage through the encoding process In order to improve the transmission rate between the controller and the memory, shorten the black screen time of the panel.
  • FIG. 1 is a schematic diagram of a terminal structure of a hardware operating environment involved in a solution of an embodiment of the present application.
  • the terminal may be a data extraction device for data signals, a television, or a computer.
  • the terminal may include: a processor 1001, such as a CPU, a memory 1002, a communication bus 1003, and a data driver (Data Driver) 1004, chip (TCON IC) 1005.
  • the communication bus 1003 is configured to implement connection communication between the components in the terminal.
  • the memory 1002 may be a high-speed RAM memory or a stable memory (non-volatile memory), such as disk storage.
  • the memory 1002 may optionally also be a storage device independent of the aforementioned processor 1001.
  • the data driver 1004 performs data signal processing, and may include at least one of a frequency judgment unit, a potential judgment unit, and an internal processing module.
  • the chip 1005 is configured to generate and transmit data signals and clock signals.
  • FIG. 1 does not constitute a limitation on the terminal in the embodiments of the present application, and may include more or fewer components than those illustrated, or combine certain components, or different components Layout.
  • the memory 1002 as a computer storage medium may include a program to increase the signal transmission rate.
  • the processor 1001 may be set to call a program for increasing the signal transmission rate stored in the memory 1002, and perform the following operations:
  • the voltage signal is transmitted to the memory, and the decoder in the memory decodes the voltage signal into binary data when detecting the voltage signal.
  • the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
  • the sub-data is encoded to generate a corresponding voltage signal, wherein each of the voltage signals is transferred to the memory in the order of the sub-data in the binary data.
  • the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
  • the grouping rule includes the number of binary data in the sub-data.
  • the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
  • the binary data to be transmitted is grouped according to the coding frequency to obtain sub-data.
  • the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
  • the coding frequency includes at least one of a double frequency and a triple frequency.
  • the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
  • the voltage signal corresponding to the sub-data is generated according to the relationship comparison table.
  • the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
  • the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
  • the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
  • the voltage signal is transmitted to the memory through the serial data bus.
  • a schematic flowchart of an embodiment of a method for increasing a signal transmission rate of the present application includes:
  • Step S10 encoding the binary data to be transmitted in the controller into a voltage signal
  • the controller After the display panel is powered off, the controller reads the data directly from the memory.
  • the controller needs to send the relevant output permission, latch input, line start, and polarity reversal signals to the driver, and the transfer rate between the controller and the memory
  • the transmission rate is generally between 100k ⁇ 200kHz, and the panel has been in a black screen during this period. If the transmission rate between the controller and the memory can be increased, the time for the panel to be black can be shortened and the use effect of the panel can be improved. .
  • the controller when the controller transmits binary data to the memory, different data will only be reflected in the time and two voltage signals, that is, the voltage signal transmitted in a time period can only represent one binary data, in this application
  • the method for increasing the signal transmission rate should be set in the display panel. It can be understood that the method for increasing the signal transmission rate can also be set for other terminals, such as mobile phones and computers, which are not limited herein.
  • the encoder controller of the display panel is provided with an encoder, and the memory of the display panel is provided with a decoder that matches the encoder.
  • the controller is connected to the memory signal by passing Binary data is encoded into corresponding voltage signals, so that the voltage signal transmitted by the controller to the memory can represent multiple binary data.
  • the binary data to be transmitted in the controller is reflected in the time and more than four voltage signals, This improves the efficiency of the controller to transfer binary data to the memory.
  • 0V represents 0 in binary data
  • 3.3V represents 1 in binary data
  • 0V represents 00 in binary data
  • 1V represents 01, 2V in binary data. It represents 10 in binary data
  • 3V represents 11 in binary data.
  • step S20 the voltage signal is transmitted to the memory, and when the decoder in the memory detects the voltage signal, the voltage signal is decoded into binary data.
  • the memory is provided with a decoder that matches the encoder.
  • the display panel passes the voltage signal encoded by the controller to the memory.
  • the decoder in the memory detects the voltage signal, it decompresses the detected voltage signal into the corresponding binary Data, thus completing the data transmission from the controller to the memory, the voltage signal encoded by the controller is transmitted to the memory on the SDA (Serial Data Bus) line.
  • SDA Serial Data Bus
  • the controller when the controller transmits binary data to the memory, it often takes the eight binary data as a batch, and then passes the eight binary data to the memory to determine whether the memory has received the eight binary data. After confirming that the memory receives the batch of binary data, the controller sends the next batch of binary data to the memory.
  • the binary data to be transmitted is composed of more than four voltage signals It means that when the decoder detects a voltage signal, it decodes the voltage signal into corresponding binary data, and one voltage signal corresponds to multiple binary data.
  • the voltage signal transmitted by the controller to the memory represents only one binary data at the same time, while the voltage signal transmitted in this application represents multiple binary data, thereby improving the data between the controller and the memory
  • the transmission rate of the computer which in turn reduces the black screen time of the display panel during startup, improves the experience of setting the panel.
  • FIG. 3 is another embodiment of the air conditioner control method. Based on the first embodiment, the step S10 includes:
  • Step S11 obtaining the grouping rule of the encoder
  • Step S12 Group the binary data to be transmitted according to the grouping rule to obtain sub-data
  • Step S13 Encode the sub-data to generate a corresponding voltage signal.
  • the display panel first obtains the grouping rules of the encoder, that is, the data to be transmitted in the controller is distinguished according to several data as a group, and the binary data to be transmitted can be divided after the grouping rules are determined Group to obtain the sub-data to be transmitted.
  • the grouping rule is to use two binary data as a group
  • the sub-data obtained after grouping the binary data to be transmitted includes: 00, 01, 10, 11, and it should be noted that in the process of grouping the sub-data , According to the order of the binary data to be transmitted, the two adjacent binary data as a group of sub-data. Encode the sub-data to generate the corresponding voltage signal.
  • each voltage signal is transmitted to the memory in the order of the sub-data in the binary data.
  • the grouping rule includes the number of binary data in the sub-data, for example, each sub-data contains two binary data or three binary data or multiple binary data, etc., which is not limited herein.
  • the step of grouping the binary data to be transmitted according to the grouping rule to obtain sub-data includes: determining the encoding frequency of the encoder according to the grouping rule; and the binary to be transmitted according to the encoding frequency The data is grouped to obtain sub-data.
  • the encoder determines the grouping rules, it determines the frequency of the encoder to encode the binary data according to the grouping rules, adjusts the working frequency of the encoder to the encoding frequency, and then the encoder groups the binary data to be transmitted Get subdata.
  • the encoding frequency includes at least one of 2 times frequency and 3 times frequency, where 2 times frequency means that the sub data includes two binary data, and the signal transmission rate between the controller and the memory is The single binary data is transmitted twice; the triple frequency means that the sub-data includes three binary data, and the signal transmission rate between the controller and the memory is three times that of the single binary data transmission. It can be understood that the coding frequency may also be other high-frequency frequencies, which is not limited herein.
  • the step of encoding the sub-data to generate a corresponding voltage signal includes: obtaining a relationship table between the sub-data and the voltage signal; generating the sub-data according to the relationship table Corresponding voltage signal.
  • the encoder obtains a relationship table between the sub data and the voltage signal, and generates a voltage signal corresponding to the sub data according to the relationship table.
  • the relationship between the sub-data and the voltage signal is as follows: Subdata 00 01 10 11 Voltage signal (V) 0 1 2 3
  • the sub-data contains three binary data.
  • the relationship between the sub-data and the voltage signal is as follows Subdata 000 001 010 011 100 101 110 111 Voltage signal (V) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
  • the voltage signal is set by the user, as long as the voltage signal corresponding to each sub-data is inconsistent, no limitation is made here.
  • relationship table between the sub-data and the voltage signal may be preset for the controller, or determined by the worker according to the actual use of the panel.
  • the method further includes: sending the grouping rule to the memory.
  • the voltage signal and the grouping rule are preferably sent to the memory together.
  • the decoder in the memory decodes the voltage signal according to the grouping rule to restore the voltage signal to the corresponding binary data. It can be understood that the grouping rule It can be preset in the encoder and decoder, so that there is no need to send the grouping rules to the memory without the controller.
  • relationship table between the sub-data and the voltage signal can be preset in the encoder and the decoder, or the relationship table between the sub-data and the voltage signal and the grouping rules are The encoder is sent to the decoder in the memory.
  • the method further includes: when the number of binary data to be transmitted does not satisfy the grouping rule, adding a binary at a preset position Number, so that the number of the binary data meets the grouping rule.
  • the encoder adds a binary number at a preset position, which may be the first of the sub-data The position or the last position, so that the number of binary data satisfies the grouping rule, so that the binary data to be transmitted is divided into several sub-data.
  • the grouping rule is a group of three binary data
  • a binary number 1 or 0 can be added at the end, so that the binary data to be transmitted can be divided into sub data.
  • the binary data added at the preset position should be eliminated to avoid errors in the signal transmitted between the controller and the memory.
  • the present application also provides a display panel, which includes a processor, a controller, a memory, and a program to increase the signal transmission rate, and the program to increase the signal transmission rate is stored on the memory and is available on the processor Running, the controller is provided with an encoder, the memory is provided with a decoder that matches the encoder, the controller is connected to the memory signal, and the encoder is configured to be transmitted The binary data is encoded into a voltage signal. When the decoder detects the voltage signal, the voltage signal is decoded into binary data.
  • the binary data is encoded into a voltage signal and transmitted to the memory, and then decoded by the memory
  • the voltage signal is decoded into binary data to increase the signal transmission rate between the controller and the memory, thereby shortening the black time of the display panel and improving the performance of the display panel.
  • the methods in the above embodiments can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware, but in many cases the former is optional ⁇ Implementation.
  • the technical solution of the present application can be embodied in the form of a software product in essence or part that contributes to the exemplary technology, and the computer software product is stored in a storage medium (such as ROM/RAM) as described above , Disk, CD), including several instructions to make a terminal device (which can be a mobile phone, computer, server, air conditioner, or network equipment, etc.) to perform the method described in each embodiment of the present application.

Abstract

A method for improving a signal transmission rate and a display panel. The method for improving a signal transmission rate comprises: encoding binary data to be transmitted in a controller into a voltage signal (S10); and transmitting the voltage signal to a memory (1002), and upon detecting the voltage signal by a decoder in the memory (1002), decoding the voltage signal into binary data (S20).

Description

提升信号传输速率的方法及显示面板 Method for improving signal transmission rate and display panel The
相关申请Related application
本申请要求2018年12月11日申请的,申请号为201811514095.3,名称为“提升信号传输速率的方法及显示面板”的中国专利申请的优先权,在此将其全文引入作为参考。This application requires the priority of the Chinese patent application with the application number 201811514095.3, entitled "Method and Display Panel for Increasing Signal Transmission Rate", which was filed on December 11, 2018. The entire content of which is hereby incorporated by reference.
技术领域Technical field
本申请涉及显示面板技术领域,尤其涉及一种提升信号传输速率的方法及显示面板。The present application relates to the technical field of display panels, and in particular, to a method and display panel for increasing a signal transmission rate.
背景技术Background technique
这里的陈述仅提供与本申请有关的背景信息,而不必然地构成现有技术。随着液晶显示领域的发展,液晶显示器已经在电视、移动通讯、医疗等领域得到了广泛的应用,在TFT-LCD(薄膜晶体管液晶显示器)驱动电路设计中,TCON(时序控制器)会发送相关PTG(信号产生器)(如输出允许、锁存输入、行开始、极性反转)等信号给driver(驱动程序),它们的属性及相对关系可由使用者根据应用要求进行对应的修改,这部分数据整合成TCON code的bin文档,由PC机发起,经由各厂商的TCON治具及配线,烧录进TCON外围器件EEPROM元件里,断电上电后,TCON直接向EEPROM(存储器)读取数据,将相关设置发送给driver。TCON与EEPROM传输速率一般在100k~200kHz左右,而在这段时间内,面板一直处于黑屏,若能提高这速率,面板黑屏时间就可缩短。The statements here only provide background information related to the present application and do not necessarily constitute prior art. With the development of the liquid crystal display field, liquid crystal displays have been widely used in TV, mobile communications, medical and other fields. In the design of TFT-LCD (thin film transistor liquid crystal display) drive circuits, TCON (timing controller) will send related PTG (signal generator) (such as output enable, latch input, line start, polarity inversion) and other signals to the driver (driver), their attributes and relative relationships can be modified by the user according to the application requirements, this Part of the data is integrated into TCON The bin file of the code is initiated by the PC and burned into the EEPROM components of TCON peripheral devices through TCON fixtures and wiring of various manufacturers. After power off and power on, TCON reads data directly from the EEPROM (memory), which will be related The settings are sent to the driver. The transmission rate of TCON and EEPROM is generally around 100k~200kHz, and during this period, the panel has been in a black screen. If this rate can be increased, the black time of the panel can be shortened.
发明内容Summary of the invention
本申请的主要目的在于提供一种提升信号传输速率的方法,旨在提高时序控制器直接向存储器读取数据时传输速率,缩短面板黑屏时间长。The main purpose of the present application is to provide a method for increasing the signal transmission rate, which aims to increase the transmission rate when the timing controller reads data directly from the memory, and shorten the long time of the panel black screen.
为实现上述目的,本申请提供一种提升信号传输速率的方法,控制器中设有编码器,存储器中设有与所述编码器相匹配的解码器,所述控制器与所述存储器信号连接,所述提升信号传输速率的方法包括:To achieve the above purpose, the present application provides a method for increasing the signal transmission rate. An encoder is provided in the controller, and a decoder matching the encoder is provided in the memory. The controller is signal-connected to the memory The method for increasing the signal transmission rate includes:
将控制器中待传输的二进制数据编码成电压信号;Encode the binary data to be transmitted in the controller into a voltage signal;
将所述电压信号传输给存储器,存储器中的解码器在检测到所述电压信号时,将所述电压信号解码为二进制数据Transmitting the voltage signal to the memory, and when the decoder in the memory detects the voltage signal, it decodes the voltage signal into binary data
可选地,获取编码器的分组规则;Optionally, obtain the grouping rules of the encoder;
根据所述分组规则对待传输的二进制数据进行分组得到子数据;Group the binary data to be transmitted according to the grouping rule to obtain sub-data;
对所述子数据进行编码以生成相应的电压信号,其中,各个所述电压信号按照所述子数据在所述二进制数据中的顺序传输至所述存储器。The sub-data is encoded to generate a corresponding voltage signal, wherein each of the voltage signals is transferred to the memory in the order of the sub-data in the binary data.
可选地,所述分组规则包括子数据中二进制数据的个数。Optionally, the grouping rule includes the number of binary data in the sub-data.
可选地,所述根据所述分组规则对待传输的二进制数据进行分组得到子数据的步骤包括:Optionally, the step of grouping the binary data to be transmitted according to the grouping rule to obtain sub-data includes:
根据所述分组规则确定编码器的编码频率;Determine the encoding frequency of the encoder according to the grouping rule;
根据所述编码频率对待传输的二进制数据进行分组得到子数据。The binary data to be transmitted is grouped according to the coding frequency to obtain sub-data.
可选地,所述编码频率包括2倍频率和3倍频率中的至少一种。Optionally, the coding frequency includes at least one of 2 times frequency and 3 times frequency.
可选地,在所述子数据中的二进制数据为三个时,所述编码频率为3倍频率。Optionally, when there are three binary data in the sub-data, the coding frequency is 3 times the frequency.
可选地,在所述子数据中的二进制数据为二个时,所述编码频率为2倍频率。Optionally, when there are two binary data in the sub-data, the coding frequency is twice the frequency.
可选地,所述分组规则为按照二进制数据待传输的顺序将相邻的两个二进制数据作为一组子数据。Optionally, the grouping rule is to use two adjacent binary data as a group of sub-data in the order in which the binary data is to be transmitted.
可选地,所述对所述子数据进行编码以生成相应的电压信号的步骤包括:Optionally, the step of encoding the sub-data to generate a corresponding voltage signal includes:
获取子数据与电压信号之间的关系对照表;Obtain a comparison table between the relationship between sub-data and voltage signals;
根据所述关系对照表生成所述子数据所对应的电压信号。The voltage signal corresponding to the sub-data is generated according to the relationship comparison table.
可选地,所述将控制器中待传输的二进制数据编码成电压信号的步骤之后,还包括:Optionally, after the step of encoding the binary data to be transmitted in the controller into a voltage signal, the method further includes:
将所述分组规则发送给存储器。Send the grouping rule to the memory.
可选地,所述将控制器中待传输的二进制数据编码成电压信号的步骤之后,还包括:Optionally, after the step of encoding the binary data to be transmitted in the controller into a voltage signal, the method further includes:
将所述关系对照表发送给存储器。The relationship comparison table is sent to the memory.
可选地,所述根据所述分组规则对待传输的二进制数据进行分组得到子数据的步骤之后,还包括:Optionally, after the step of grouping the binary data to be transmitted according to the grouping rule to obtain sub-data, the method further includes:
在待传输的二进制数据的个数不满足所述分组规则时,在预设位置增加二进制数,以使所述二进制数据的个数满足所述分组规则。When the number of binary data to be transmitted does not satisfy the grouping rule, increase the binary number at a preset position, so that the number of the binary data meets the grouping rule.
可选地,所述电压信号通过串行数据总线传输至存储器。Optionally, the voltage signal is transmitted to the memory through a serial data bus.
可选地,所述二进制数据包括输出允许、锁存输入、行开始以及极性反转数据。Optionally, the binary data includes output permission, latch input, line start, and polarity inversion data.
可选地,所述控制器将各个二进制数据分为多个批次向所述存储器传输,各个所述批次中的所述二进制数据的数量为八个。Optionally, the controller divides each binary data into multiple batches and transmits them to the memory, and the number of the binary data in each batch is eight.
可选地,所述电压信号表示多个二进制数据。Optionally, the voltage signal represents multiple binary data.
此外,为实现上述目的,本申请还提供一种显示面板,所述显示面板包括处理器、控制器、存储器和提升信号传输速率的程序,所述提升信号传输速率的程序存储在所述存储器上并可在所述处理器上运行,所述控制器中设有编码器,所述存储器中设有与所述编码器相匹配的解码器,所述控制器与所述存储器信号连接,所述编码器设置为将待传输的二进制数据编码成电压信号,所述解码器在检测到所述电压信号时,将所述电压信号解码为二进制数据。In addition, in order to achieve the above object, the present application also provides a display panel, the display panel includes a processor, a controller, a memory, and a program to increase the signal transmission rate, and the program to increase the signal transmission rate is stored on the memory And can run on the processor, the controller is provided with an encoder, the memory is provided with a decoder matching the encoder, the controller is connected to the memory signal, the The encoder is configured to encode the binary data to be transmitted into a voltage signal, and the decoder decodes the voltage signal into binary data when detecting the voltage signal.
本申请实施例提出的一种提升信号传输速率的方法及显示面板,显示面板的控制器中设有编码器,显示面板的存储器中设有与编码器相匹配的解码器,提升信号传输速率的方法包括:将控制器中待传输的二进制数据编码成电压信号;将电压信号传输给存储器,存储器中的解码器在检测到电压信号时,将电压信号解码为二进制数据。本申请通过对控制器中待传输的二进制数据编码成电压信号,电压信号在传输至存储器后,由存储器将电压信号解码为二进制数据,通过编码的过程提高传输电压的多样化,从而提高控制器与存储器之间的传输速率,缩短面板的黑屏时间。An embodiment of the present application provides a method and a display panel for increasing the signal transmission rate. The controller of the display panel is provided with an encoder, and the memory of the display panel is provided with a decoder matching the encoder to increase the signal transmission rate. The method includes: encoding binary data to be transmitted in the controller into a voltage signal; transmitting the voltage signal to the memory, and the decoder in the memory decodes the voltage signal into binary data when detecting the voltage signal. This application encodes the binary data to be transmitted in the controller into a voltage signal. After the voltage signal is transmitted to the memory, the memory decodes the voltage signal into binary data. Through the encoding process, the transmission voltage is diversified to improve the controller The transfer rate with the memory reduces the black screen time of the panel.
附图说明BRIEF DESCRIPTION
图1是本申请实施例方案涉及的硬件运行环境的终端结构示意图;FIG. 1 is a schematic diagram of a terminal structure of a hardware operating environment involved in an embodiment of the present application;
图2为本申请提升信号传输速率的方法其中一个实施例的流程示意图;2 is a schematic flowchart of one embodiment of a method for increasing a signal transmission rate of this application;
图3为本申请提升信号传输速率的方法另一实施例的流程示意图。FIG. 3 is a schematic flowchart of another embodiment of a method for increasing a signal transmission rate of the present application.
本申请目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。The implementation, functional characteristics and advantages of the present application will be further described in conjunction with the embodiments and with reference to the drawings.
具体实施方式detailed description
应当理解,此处所描述的具体实施例仅仅用以解释本申请,并不设置为限定本申请。It should be understood that the specific embodiments described herein are only used to explain the present application, and are not intended to limit the present application.
本申请实施例的主要解决方案是:将控制器中待传输的二进制数据编码成电压信号;将所述电压信号传输给存储器,存储器中的解码器在检测到所述电压信号时,将所述电压信号解码为二进制数据。The main solution of the embodiment of the present application is to: encode the binary data to be transmitted in the controller into a voltage signal; transmit the voltage signal to the memory, and when the decoder in the memory detects the voltage signal, The voltage signal is decoded into binary data.
由于示例性技术,面板中控制器与存储器之间的传输速率较低,导致面板在开机过程之中黑屏时间长。Due to the exemplary technology, the transfer rate between the controller and the memory in the panel is low, resulting in a long black screen time during the boot process of the panel.
本申请提供一种解决方案,通过对控制器中待传输的二进制数据编码成电压信号,电压信号在传输至存储器后,由存储器将电压信号解码为二进制数据,通过编码的过程提高传输电压的多样化,从而提高控制器与存储器之间的传输速率,缩短面板的黑屏时间。The present application provides a solution by encoding the binary data to be transmitted in the controller into a voltage signal. After the voltage signal is transmitted to the memory, the memory decodes the voltage signal into binary data to increase the diversity of the transmission voltage through the encoding process In order to improve the transmission rate between the controller and the memory, shorten the black screen time of the panel.
如图1所示,图1是本申请实施例方案涉及的硬件运行环境的终端结构示意图。As shown in FIG. 1, FIG. 1 is a schematic diagram of a terminal structure of a hardware operating environment involved in a solution of an embodiment of the present application.
本申请实施例终端可以是一种数据信号的数据提取装置,也可以是电视机,也可以是计算机。In the embodiment of the present application, the terminal may be a data extraction device for data signals, a television, or a computer.
如图1所示,该终端可以包括:处理器1001,例如CPU,存储器1002,通信总线1003,数据驱动器(Data Driver)1004,芯片(TCON IC)1005。其中,通信总线1003设置为实现该终端中各组成部件之间的连接通信。存储器1002可以是高速RAM存储器,也可以是稳定的存储器(non-volatile memory),例如磁盘存储器。存储器1002可选地还可以是独立于前述处理器1001的存储装置。数据驱动器1004进行数据信号的处理,可以是包括频率判断单元、电位判断单元和内部处理模块中的至少一个。芯片1005,设置为生成并发送数据信号以及时钟信号。As shown in FIG. 1, the terminal may include: a processor 1001, such as a CPU, a memory 1002, a communication bus 1003, and a data driver (Data Driver) 1004, chip (TCON IC) 1005. Among them, the communication bus 1003 is configured to implement connection communication between the components in the terminal. The memory 1002 may be a high-speed RAM memory or a stable memory (non-volatile memory), such as disk storage. The memory 1002 may optionally also be a storage device independent of the aforementioned processor 1001. The data driver 1004 performs data signal processing, and may include at least one of a frequency judgment unit, a potential judgment unit, and an internal processing module. The chip 1005 is configured to generate and transmit data signals and clock signals.
本领域技术人员可以理解,图1中示出的终端的结构并不构成对本申请实施例终端的限定,可以包括比图示更多或更少的部件,或者组合某些部件,或者不同的部件布置。Those skilled in the art may understand that the structure of the terminal shown in FIG. 1 does not constitute a limitation on the terminal in the embodiments of the present application, and may include more or fewer components than those illustrated, or combine certain components, or different components Layout.
如图1所示,作为一种计算机存储介质的存储器1002中可以包括提升信号传输速率的程序。As shown in FIG. 1, the memory 1002 as a computer storage medium may include a program to increase the signal transmission rate.
在图1所示的服务器中,处理器1001可以设置为调用存储器1002中存储的提升信号传输速率的程序,并执行以下操作:In the server shown in FIG. 1, the processor 1001 may be set to call a program for increasing the signal transmission rate stored in the memory 1002, and perform the following operations:
将控制器中待传输的二进制数据编码成电压信号;Encode the binary data to be transmitted in the controller into a voltage signal;
将所述电压信号传输给存储器,存储器中的解码器在检测到所述电压信号时,将所述电压信号解码为二进制数据。The voltage signal is transmitted to the memory, and the decoder in the memory decodes the voltage signal into binary data when detecting the voltage signal.
可选地,处理器1001可以设置为调用存储器1002中存储的提升信号传输速率的程序,并执行以下操作:Alternatively, the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
获取编码器的分组规则;Get the grouping rules of the encoder;
根据所述分组规则对待传输的二进制数据进行分组得到子数据;Group the binary data to be transmitted according to the grouping rule to obtain sub-data;
对所述子数据进行编码以生成相应的电压信号,其中,各个所述电压信号按照所述子数据在所述二进制数据中的顺序传输至所述存储器。The sub-data is encoded to generate a corresponding voltage signal, wherein each of the voltage signals is transferred to the memory in the order of the sub-data in the binary data.
可选地,处理器1001可以设置为调用存储器1002中存储的提升信号传输速率的程序,并执行以下操作:Alternatively, the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
所述分组规则包括子数据中二进制数据的个数。The grouping rule includes the number of binary data in the sub-data.
可选地,处理器1001可以设置为调用存储器1002中存储的提升信号传输速率的程序,并执行以下操作:Alternatively, the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
根据所述分组规则确定编码器的编码频率;Determine the encoding frequency of the encoder according to the grouping rule;
根据所述编码频率对待传输的二进制数据进行分组得到子数据。The binary data to be transmitted is grouped according to the coding frequency to obtain sub-data.
可选地,处理器1001可以设置为调用存储器1002中存储的提升信号传输速率的程序,并执行以下操作:Alternatively, the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
所述编码频率包括2倍频率和3倍频率中的至少一种。The coding frequency includes at least one of a double frequency and a triple frequency.
可选地,处理器1001可以设置为调用存储器1002中存储的提升信号传输速率的程序,并执行以下操作:Alternatively, the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
获取子数据与电压信号之间的关系对照表;Obtain a comparison table between the relationship between sub-data and voltage signals;
根据所述关系对照表生成所述子数据所对应的电压信号。The voltage signal corresponding to the sub-data is generated according to the relationship comparison table.
可选地,处理器1001可以设置为调用存储器1002中存储的提升信号传输速率的程序,并执行以下操作:Alternatively, the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
将所述分组规则发送给存储器。Send the grouping rule to the memory.
可选地,处理器1001可以设置为调用存储器1002中存储的提升信号传输速率的程序,并执行以下操作:Alternatively, the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
在待传输的二进制数据的个数不满足所述分组规则时,在预设位置增加二进制数,以使所述二进制数据的个数满足所述分组规则。When the number of binary data to be transmitted does not satisfy the grouping rule, increase the binary number at a preset position, so that the number of the binary data meets the grouping rule.
可选地,处理器1001可以设置为调用存储器1002中存储的提升信号传输速率的程序,并执行以下操作:Alternatively, the processor 1001 may be set to call a program stored in the memory 1002 to increase the signal transmission rate, and perform the following operations:
所述电压信号通过串行数据总线传输至存储器。The voltage signal is transmitted to the memory through the serial data bus.
基于上述硬件构架,提出本申请提升信号传输速率的方法的实施例。Based on the above hardware architecture, an embodiment of the method for increasing the signal transmission rate of the present application is proposed.
参照图2,本申请提升信号传输速率的方法其中一个实施例的流程示意图,所述提升信号传输速率的方法包括: Referring to FIG. 2, a schematic flowchart of an embodiment of a method for increasing a signal transmission rate of the present application, the method for increasing a signal transmission rate includes:
步骤S10,将控制器中待传输的二进制数据编码成电压信号;Step S10, encoding the binary data to be transmitted in the controller into a voltage signal;
显示面板在断电后控制器直接向存储器读取数据,控制器需要将相关输出允许、锁存输入、行开始以及极性反转的信号发送给驱动器,而控制器与存储器之间的传输速率较低,传输速率一般在100k~200kHz之间,而这段时间内面板一直处于黑屏状态,若能提高控制器与存储器之间的传输速率,则能缩短面板黑屏的时间,提高面板的使用效果。After the display panel is powered off, the controller reads the data directly from the memory. The controller needs to send the relevant output permission, latch input, line start, and polarity reversal signals to the driver, and the transfer rate between the controller and the memory The transmission rate is generally between 100k~200kHz, and the panel has been in a black screen during this period. If the transmission rate between the controller and the memory can be increased, the time for the panel to be black can be shortened and the use effect of the panel can be improved. .
示例性技术中,控制器在向存储器传输二进制数据时,不同的数据只会体现在时间和两个电压信号上,即一个时间段内传输的电压信号只能代表一个二进制数据,在本申请中,提升信号传输速率的方法应设置为显示面板中,可以理解的是,该提升信号传输速率的方法也可以设置为其他终端,例如手机、电脑,在此不做限制。显示面板的编码器控制器中设有编码器,显示面板的存储器中设有与所述编码器相匹配的解码器,所述控制器与所述存储器信号连接,通过对控制器中待传输的二进制数据编码成相应的电压信号,使得控制器向存储器传输的电压信号能代表多个二进制数据,在本申请中,将控制器中待传输的二进制数据体现在时间和四个以上电压信号中,从而提高了控制器向存储器传输二进制数据的效率。例如,示例性技术中,0V就代表二进制数据中的0,3.3V就代表二进制数据中的1,在本申请中,0V就代表二进制数据中的00,1V就代表二进制数据中的01,2V就代表二进制数据中的10,3V就代表二进制数据中的11。In the exemplary technology, when the controller transmits binary data to the memory, different data will only be reflected in the time and two voltage signals, that is, the voltage signal transmitted in a time period can only represent one binary data, in this application The method for increasing the signal transmission rate should be set in the display panel. It can be understood that the method for increasing the signal transmission rate can also be set for other terminals, such as mobile phones and computers, which are not limited herein. The encoder controller of the display panel is provided with an encoder, and the memory of the display panel is provided with a decoder that matches the encoder. The controller is connected to the memory signal by passing Binary data is encoded into corresponding voltage signals, so that the voltage signal transmitted by the controller to the memory can represent multiple binary data. In this application, the binary data to be transmitted in the controller is reflected in the time and more than four voltage signals, This improves the efficiency of the controller to transfer binary data to the memory. For example, in the exemplary technology, 0V represents 0 in binary data, 3.3V represents 1 in binary data, and in this application, 0V represents 00 in binary data, and 1V represents 01, 2V in binary data. It represents 10 in binary data, and 3V represents 11 in binary data.
步骤S20,将所述电压信号传输给存储器,存储器中的解码器在检测到所述电压信号时,将所述电压信号解码为二进制数据。In step S20, the voltage signal is transmitted to the memory, and when the decoder in the memory detects the voltage signal, the voltage signal is decoded into binary data.
存储器中设有与编码器相匹配的解码器,显示面板将由控制器编码后的电压信号传递给存储器,存储器中的解码器在检测到电压信号时,将检测到的电压信号解压为相应的二进制数据,从而完成控制器向存储器之间的数据传输,控制器编码成的电压信号在SDA(串行数据总线)线传输至存储器。The memory is provided with a decoder that matches the encoder. The display panel passes the voltage signal encoded by the controller to the memory. When the decoder in the memory detects the voltage signal, it decompresses the detected voltage signal into the corresponding binary Data, thus completing the data transmission from the controller to the memory, the voltage signal encoded by the controller is transmitted to the memory on the SDA (Serial Data Bus) line.
需要说明的是,控制器在向存储器传输二进制数据时往往是将八个二进制数据作为一批,再将这八个二进制数据传递至存储器后,确定存储器是否有接收到这八个二进制数据,在确定存储器接收到这批二进制数据后,控制器再向存储器发送下一批二进制数据。It should be noted that when the controller transmits binary data to the memory, it often takes the eight binary data as a batch, and then passes the eight binary data to the memory to determine whether the memory has received the eight binary data. After confirming that the memory receives the batch of binary data, the controller sends the next batch of binary data to the memory.
在本实施例提供的技术方案中,通过在控制器中设置编码器,然后将控制器中待传输的二进制数据编码成相应的电压信号,使得待传输的二进制数据由四个以上的电压信号来代表,解码器检测到电压信号时,将电压信号解码成相应的二进制数据,一个电压信号对应多个二进制数据。相比示例性技术,同一时间内,控制器向存储器传递的电压信号中只代表一个二进制数据,而本申请中传递的电压信号代表多个二进制数据,从而提高了控制器与存储器之间的数据的传输速率,进而降低显示面板开机过程中黑屏的时间,提高设置为对面板的使用体验。In the technical solution provided by this embodiment, by setting an encoder in the controller, and then encoding the binary data to be transmitted in the controller into a corresponding voltage signal, the binary data to be transmitted is composed of more than four voltage signals It means that when the decoder detects a voltage signal, it decodes the voltage signal into corresponding binary data, and one voltage signal corresponds to multiple binary data. Compared with the exemplary technology, the voltage signal transmitted by the controller to the memory represents only one binary data at the same time, while the voltage signal transmitted in this application represents multiple binary data, thereby improving the data between the controller and the memory The transmission rate of the computer, which in turn reduces the black screen time of the display panel during startup, improves the experience of setting the panel.
参照图3,图3为空调器的控制方法的另一实施例,基于第一实施例,所述步骤S10包括:Referring to FIG. 3, FIG. 3 is another embodiment of the air conditioner control method. Based on the first embodiment, the step S10 includes:
步骤S11,获取编码器的分组规则;Step S11, obtaining the grouping rule of the encoder;
步骤S12,根据所述分组规则对待传输的二进制数据进行分组得到子数据;Step S12: Group the binary data to be transmitted according to the grouping rule to obtain sub-data;
步骤S13,对所述子数据进行编码以生成相应的电压信号。Step S13: Encode the sub-data to generate a corresponding voltage signal.
本实施例提供的技术方案中,显示面板首先获取编码器的分组规则,即将控制器中待传输的数据按照几个数据为一组进行区分,在确定分组规则后便可将待传输的二进制数据进行分组,从而得到待传输的子数据。例如,若分组规则是将两个二进制数据作为一组,则对待传输的二进制数据分组后得到的子数据包括:00,01,10,11,需要说明的是,在分组得到子数据的过程中,按照二进制数据待传输的顺序将相邻的两个二进制数据作为一组子数据。对子数据进行编码,以生成相应的电压信号,之后将电压信号传输至存储器后,由存储器进行解码还原成相应的二进制数据,从而提高了控制器与存储器之间的传输效率。需要说明的是,各个电压信号按照所述子数据在二进制数据中的顺序传输至所述存储器。In the technical solution provided in this embodiment, the display panel first obtains the grouping rules of the encoder, that is, the data to be transmitted in the controller is distinguished according to several data as a group, and the binary data to be transmitted can be divided after the grouping rules are determined Group to obtain the sub-data to be transmitted. For example, if the grouping rule is to use two binary data as a group, the sub-data obtained after grouping the binary data to be transmitted includes: 00, 01, 10, 11, and it should be noted that in the process of grouping the sub-data , According to the order of the binary data to be transmitted, the two adjacent binary data as a group of sub-data. Encode the sub-data to generate the corresponding voltage signal. After the voltage signal is transmitted to the memory, the memory decodes and restores it to the corresponding binary data, thereby improving the transmission efficiency between the controller and the memory. It should be noted that each voltage signal is transmitted to the memory in the order of the sub-data in the binary data.
需要说明的是,所述分组规则包括子数据中二进制数据的个数,例如,每个子数据中含有两个二进制数据或者三个二进制数据或者多个二进制数据等等,在此不作限制。It should be noted that the grouping rule includes the number of binary data in the sub-data, for example, each sub-data contains two binary data or three binary data or multiple binary data, etc., which is not limited herein.
可选地,所述步骤S12,根据所述分组规则对待传输的二进制数据进行分组得到子数据的步骤,包括:根据所述分组规则确定编码器的编码频率;根据所述编码频率对待传输的二进制数据进行分组得到子数据。本申请中,在编码器确定好分组规则后,便根据分组规则确定编码器对二进制数据进行编码的频率,将编码器的工作频率调节为编码频率,然后由编码器对待传输的二进制数据进行分组得到子数据。需要说明的是,所述编码频率包括2倍频率和3倍频率中的至少一种,其中,2倍频率是指子数据包括两个二进制数据,此时控制器与存储器之间信号传输速率是单个二进制数据进行传输的两倍;3倍频率是指子数据包括三个二进制数据,此时控制器与存储器之间信号传输速率是单个二进制数据进行传输的三倍。可以理解的是,编码频率还可以为其他高倍频率,在此不作限制。Optionally, in step S12, the step of grouping the binary data to be transmitted according to the grouping rule to obtain sub-data includes: determining the encoding frequency of the encoder according to the grouping rule; and the binary to be transmitted according to the encoding frequency The data is grouped to obtain sub-data. In this application, after the encoder determines the grouping rules, it determines the frequency of the encoder to encode the binary data according to the grouping rules, adjusts the working frequency of the encoder to the encoding frequency, and then the encoder groups the binary data to be transmitted Get subdata. It should be noted that the encoding frequency includes at least one of 2 times frequency and 3 times frequency, where 2 times frequency means that the sub data includes two binary data, and the signal transmission rate between the controller and the memory is The single binary data is transmitted twice; the triple frequency means that the sub-data includes three binary data, and the signal transmission rate between the controller and the memory is three times that of the single binary data transmission. It can be understood that the coding frequency may also be other high-frequency frequencies, which is not limited herein.
可选地,所述步骤S13,对所述子数据进行编码以生成相应的电压信号的步骤包括:获取子数据与电压信号之间的关系对照表;根据所述关系对照表生成所述子数据所对应的电压信号。在本申请中,编码器获取子数据与电压信号之间的关系对照表,并根据关系对照表生成子数据相对应的电压信号。例如,当编码器采用2倍频率进行编码时,子数据中含有两个二进制数据,此时,子数据与电压信号之间的关系对照表如下:
子数据 00 01 10 11
电压信号(V) 0 1 2 3
Optionally, in step S13, the step of encoding the sub-data to generate a corresponding voltage signal includes: obtaining a relationship table between the sub-data and the voltage signal; generating the sub-data according to the relationship table Corresponding voltage signal. In this application, the encoder obtains a relationship table between the sub data and the voltage signal, and generates a voltage signal corresponding to the sub data according to the relationship table. For example, when the encoder uses 2 times the frequency for encoding, the sub-data contains two binary data. At this time, the relationship between the sub-data and the voltage signal is as follows:
Subdata 00 01 10 11
Voltage signal (V) 0 1 2 3
当编码器采用3倍频率进行编码时,子数据中含有三个二进制数据,此时,子数据与电压信号之间的关系对照表如下
子数据 000 001 010 011 100 101 110 111
电压信号(V) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
When the encoder uses 3 times the frequency for encoding, the sub-data contains three binary data. At this time, the relationship between the sub-data and the voltage signal is as follows
Subdata 000 001 010 011 100 101 110 111
Voltage signal (V) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
可以理解的是,电压信号由用户设定,只要各个子数据所对应的电压信号不一致便可,在此不做限制。It can be understood that the voltage signal is set by the user, as long as the voltage signal corresponding to each sub-data is inconsistent, no limitation is made here.
需要说明的是,子数据与电压信号之间的关系对照表可以为控制器预设的,或者为工人根据面板的实际使用情况确定。It should be noted that the relationship table between the sub-data and the voltage signal may be preset for the controller, or determined by the worker according to the actual use of the panel.
可选地,在所述步骤S10,即步骤将控制器中待传输的二进制数据编码成电压信号之后,还包括:将所述分组规则发送给存储器。本申请中,电压信号与分组规则最好是一起发送给存储器,在存储器中的解码器根据分组规则对电压信号进行解码,从而将电压信号还原为相应的二进制数据,可以理解的是,分组规则可以预设在编码器与解码器中,这样便不用控制器便不用将分组规则发送给存储器了。可以理解的是,子数据与电压信号之间的关系对照表可以预设在编码器与解码器中,或者,子数据与电压信号之间的关系对照表和分组规则一起,由控制器中的编码器发送给存储器中的解码器。Optionally, after the step S10, that is, the step of encoding the binary data to be transmitted in the controller into a voltage signal, the method further includes: sending the grouping rule to the memory. In this application, the voltage signal and the grouping rule are preferably sent to the memory together. The decoder in the memory decodes the voltage signal according to the grouping rule to restore the voltage signal to the corresponding binary data. It can be understood that the grouping rule It can be preset in the encoder and decoder, so that there is no need to send the grouping rules to the memory without the controller. It can be understood that the relationship table between the sub-data and the voltage signal can be preset in the encoder and the decoder, or the relationship table between the sub-data and the voltage signal and the grouping rules are The encoder is sent to the decoder in the memory.
可选地,在根据所述分组规则对待传输的二进制数据进行分组得到子数据的步骤之后,还包括:在待传输的二进制数据的个数不满足所述分组规则时,在预设位置增加二进制数,以使所述二进制数据的个数满足所述分组规则。本申请中,待传输的数据在分组之后还剩下的二进制数据的个数不满足分组要求时,编码器在预设的位置增加二进制数,所述预设位置可以子数据中的第一个位置或者是最后一个位置,以使二进制数据的个数满足分组规则,从而完成将待传输的二进制数据分为若干个子数据。例如,在分组规则为三个二进制数据为一组时,若最后只剩下两个二进制数据,此时可以在最后补充一个二进制数1或0,使得待传输的二进制数据均能被分为子数据。需要说明的是,在编码器对电压信号进行解压之后,应将在预设位置新增的二进制数据剔除,避免控制器与存储器之间传输的信号出现误差。Optionally, after the step of grouping the binary data to be transmitted according to the grouping rule to obtain sub-data, the method further includes: when the number of binary data to be transmitted does not satisfy the grouping rule, adding a binary at a preset position Number, so that the number of the binary data meets the grouping rule. In this application, when the number of binary data remaining after grouping of data to be transmitted does not meet the grouping requirements, the encoder adds a binary number at a preset position, which may be the first of the sub-data The position or the last position, so that the number of binary data satisfies the grouping rule, so that the binary data to be transmitted is divided into several sub-data. For example, when the grouping rule is a group of three binary data, if only two binary data are left at the end, a binary number 1 or 0 can be added at the end, so that the binary data to be transmitted can be divided into sub data. It should be noted that after the encoder decompresses the voltage signal, the binary data added at the preset position should be eliminated to avoid errors in the signal transmitted between the controller and the memory.
本申请还提供一种显示面板,所述显示面板包括处理器、控制器、存储器和提升信号传输速率的程序,所述提升信号传输速率的程序存储在所述存储器上并可在所述处理器上运行,所述控制器中设有编码器,所述存储器中设有与所述编码器相匹配的解码器,所述控制器与所述存储器信号连接,所述编码器设置为将待传输的二进制数据编码成电压信号,所述解码器在检测到所述电压信号时,将所述电压信号解码为二进制数据,通过将二进制数据进行编码成电压信号后传输至存储器,然后又由存储器解码将电压信号解码成二进制数据,提高控制器与存储器之间的信号传输速率,从而缩短显示面板的黑屏时间,提高显示面板的使用性能。The present application also provides a display panel, which includes a processor, a controller, a memory, and a program to increase the signal transmission rate, and the program to increase the signal transmission rate is stored on the memory and is available on the processor Running, the controller is provided with an encoder, the memory is provided with a decoder that matches the encoder, the controller is connected to the memory signal, and the encoder is configured to be transmitted The binary data is encoded into a voltage signal. When the decoder detects the voltage signal, the voltage signal is decoded into binary data. The binary data is encoded into a voltage signal and transmitted to the memory, and then decoded by the memory The voltage signal is decoded into binary data to increase the signal transmission rate between the controller and the memory, thereby shortening the black time of the display panel and improving the performance of the display panel.
需要说明的是,在本文中,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者系统不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者系统所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括该要素的过程、方法、物品或者系统中还存在另外的相同要素。It should be noted that in this article, the terms "include", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system that includes a series of elements includes not only those elements, It also includes other elements that are not explicitly listed, or include elements inherent to this process, method, article, or system. Without more restrictions, the element defined by the sentence "include one..." does not exclude that there are other identical elements in the process, method, article or system that includes the element.
上述本申请实施例序号仅仅为了描述,不代表实施例的优劣。The sequence numbers of the above embodiments of the present application are for description only, and do not represent the advantages and disadvantages of the embodiments.
通过以上的实施方式的描述,本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现,当然也可以通过硬件,但很多情况下前者是可选地实施方式。基于这样的理解,本申请的技术方案本质上或者说对示例性技术做出贡献的部分可以以软件产品的形式体现出来,该计算机软件产品存储在如上所述的一个存储介质(如ROM/RAM、磁碟、光盘)中,包括若干指令用以使得一台终端设备(可以是手机,计算机,服务器,空调器,或者网络设备等)执行本申请各个实施例所述的方法。Through the description of the above embodiments, those skilled in the art can clearly understand that the methods in the above embodiments can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware, but in many cases the former is optional地实施方式。 Implementation. Based on such an understanding, the technical solution of the present application can be embodied in the form of a software product in essence or part that contributes to the exemplary technology, and the computer software product is stored in a storage medium (such as ROM/RAM) as described above , Disk, CD), including several instructions to make a terminal device (which can be a mobile phone, computer, server, air conditioner, or network equipment, etc.) to perform the method described in each embodiment of the present application.
以上仅为本申请的可选实施例,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。The above are only optional embodiments of the present application and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by the description and drawings of this application, or directly or indirectly used in other related technologies In the field, the same reason is included in the scope of patent protection of this application.

Claims (17)

  1. 一种提升信号传输速率的方法,其中,控制器中设有编码器,存储器中设有与所述编码器相匹配的解码器,所述控制器与所述存储器信号连接,所述提升信号传输速率的方法包括: A method for increasing signal transmission rate, wherein an encoder is provided in a controller, a decoder matching the encoder is provided in a memory, the controller is connected to the memory signal, and the increased signal is transmitted Rate methods include:
    将控制器中待传输的二进制数据编码成电压信号;Encode the binary data to be transmitted in the controller into a voltage signal;
    将所述电压信号传输给存储器,存储器中的解码器在检测到所述电压信号时,将所述电压信号解码为二进制数据。The voltage signal is transmitted to the memory, and the decoder in the memory decodes the voltage signal into binary data when detecting the voltage signal.
  2. 如权利要求1所述的提升信号传输速率的方法,其中,所述将控制器中待传输的二进制数据编码成电压信号的步骤包括:The method for increasing the signal transmission rate according to claim 1, wherein the step of encoding the binary data to be transmitted in the controller into a voltage signal comprises:
    获取编码器的分组规则;Get the grouping rules of the encoder;
    根据所述分组规则对待传输的二进制数据进行分组得到子数据;Group the binary data to be transmitted according to the grouping rule to obtain sub-data;
    对所述子数据进行编码以生成相应的电压信号,其中,各个所述电压信号按照所述子数据在所述二进制数据中的顺序传输至所述存储器。The sub-data is encoded to generate a corresponding voltage signal, wherein each of the voltage signals is transferred to the memory in the order of the sub-data in the binary data.
  3. 如权利要求2所述的提升信号传输速率的方法,其中,所述分组规则包括子数据中二进制数据的个数。The method for increasing the signal transmission rate according to claim 2, wherein the grouping rule includes the number of binary data in the sub-data.
  4. 如权利要求3所述的提升信号传输速率的方法,其中,所述根据所述分组规则对待传输的二进制数据进行分组得到子数据的步骤包括:The method for increasing the signal transmission rate according to claim 3, wherein the step of grouping the binary data to be transmitted according to the grouping rule to obtain sub-data includes:
    根据所述分组规则确定编码器的编码频率;Determine the encoding frequency of the encoder according to the grouping rule;
    根据所述编码频率对待传输的二进制数据进行分组得到子数据。The binary data to be transmitted is grouped according to the coding frequency to obtain sub-data.
  5. 如权利要求4所述的提升信号传输速率的方法,其中,所述编码频率包括2倍频率和3倍频率中的至少一种。The method of increasing the signal transmission rate according to claim 4, wherein the coding frequency includes at least one of a 2x frequency and a 3x frequency.
  6. 如权利要求4所述的提升信号传输速率的方法,其中,在所述子数据中的二进制数据为三个时,所述编码频率为3倍频率。The method of increasing the signal transmission rate according to claim 4, wherein, when there are three binary data in the sub-data, the encoding frequency is 3 times the frequency.
  7. 如权利要求4所述的提升信号传输速率的方法,其中,在所述子数据中的二进制数据为二个时,所述编码频率为2倍频率。The method for increasing the signal transmission rate according to claim 4, wherein, when there are two binary data in the sub-data, the coding frequency is twice the frequency.
  8. 如权利要求2所述的提升信号传输速率的方法,其中,所述分组规则为按照二进制数据待传输的顺序将相邻的两个二进制数据作为一组子数据。The method for increasing the signal transmission rate according to claim 2, wherein the grouping rule is to use two adjacent binary data as a group of sub-data in the order in which the binary data is to be transmitted.
  9. 如权利要求2所述的提升信号传输速率的方法,其中,所述对所述子数据进行编码以生成相应的电压信号的步骤包括:The method for increasing the signal transmission rate according to claim 2, wherein the step of encoding the sub-data to generate a corresponding voltage signal comprises:
    获取子数据与电压信号之间的关系对照表;Obtain a comparison table between the relationship between sub-data and voltage signals;
    根据所述关系对照表生成所述子数据所对应的电压信号。The voltage signal corresponding to the sub-data is generated according to the relationship comparison table.
  10. 如权利要求9所述的提升信号传输速率的方法,其中,所述将控制器中待传输的二进制数据编码成电压信号的步骤之后,还包括:The method for increasing the signal transmission rate according to claim 9, wherein after the step of encoding the binary data to be transmitted in the controller into a voltage signal, the method further comprises:
    将所述分组规则发送给存储器。Send the grouping rule to the memory.
  11. 如权利要求9所述的提升信号传输速率的方法,其中,所述将控制器中待传输的二进制数据编码成电压信号的步骤之后,还包括:The method for increasing the signal transmission rate according to claim 9, wherein after the step of encoding the binary data to be transmitted in the controller into a voltage signal, the method further comprises:
    将所述关系对照表发送给存储器。The relationship comparison table is sent to the memory.
  12. 如权利要求4所述的提升信号传输速率的方法,其中,所述根据所述分组规则对待传输的二进制数据进行分组得到子数据的步骤之后,还包括:The method for increasing the signal transmission rate according to claim 4, wherein after the step of grouping the binary data to be transmitted according to the grouping rule to obtain sub-data, the method further comprises:
    在待传输的二进制数据的个数不满足所述分组规则时,在预设位置增加二进制数,以使所述二进制数据的个数满足所述分组规则。When the number of binary data to be transmitted does not satisfy the grouping rule, increase the binary number at a preset position, so that the number of the binary data meets the grouping rule.
  13. 如权利要求1所述的提升信号传输速率的方法,其中,所述电压信号通过串行数据总线传输至存储器。The method of increasing the signal transmission rate according to claim 1, wherein the voltage signal is transmitted to the memory through a serial data bus.
  14. 如权利要求1所述的提升信号传输速率的方法,其中,所述二进制数据包括输出允许、锁存输入、行开始以及极性反转数据。The method of increasing the signal transmission rate according to claim 1, wherein the binary data includes output enable, latch input, line start, and polarity inversion data.
  15. 如权利要求1所述提升信号传输速率的方法,其中,所述控制器将各个二进制数据分为多个批次向所述存储器传输,各个所述批次中的所述二进制数据的数量为八个。The method for increasing the signal transmission rate according to claim 1, wherein the controller divides each binary data into a plurality of batches and transmits them to the memory, and the number of the binary data in each batch is eight Pcs.
  16. 如权利要求1所述的提升信号的传输速率的方法,其中,所述电压信号表示多个二进制数据。The method of increasing the transmission rate of a signal according to claim 1, wherein the voltage signal represents a plurality of binary data.
  17. 一种显示面板,其中,所述显示面板包括处理器、控制器、存储器和提升信号传输速率的程序,所述提升信号传输速率的程序存储在所述存储器上并可在所述处理器上运行,所述控制器中设有编码器,所述存储器中设有与所述编码器相匹配的解码器,所述控制器与所述存储器信号连接,所述编码器设置为将待传输的二进制数据编码成电压信号,所述解码器在检测到所述电压信号时,将所述电压信号解码为二进制数据。 A display panel, wherein the display panel includes a processor, a controller, a memory, and a program to increase the signal transmission rate, and the program to increase the signal transmission rate is stored on the memory and can be run on the processor , An encoder is provided in the controller, a decoder matching the encoder is provided in the memory, the controller is signal-connected to the memory, and the encoder is set to binary to be transmitted The data is encoded into a voltage signal, and when the decoder detects the voltage signal, the voltage signal is decoded into binary data. The
PCT/CN2019/123093 2018-12-11 2019-12-04 Method for improving signal transmission rate and display panel WO2020119560A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811514095.3 2018-12-11
CN201811514095.3A CN109308885A (en) 2018-12-11 2018-12-11 The method and display panel of promotion signal transmission rate

Publications (1)

Publication Number Publication Date
WO2020119560A1 true WO2020119560A1 (en) 2020-06-18

Family

ID=65223486

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/123093 WO2020119560A1 (en) 2018-12-11 2019-12-04 Method for improving signal transmission rate and display panel

Country Status (2)

Country Link
CN (1) CN109308885A (en)
WO (1) WO2020119560A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109308885A (en) * 2018-12-11 2019-02-05 惠科股份有限公司 The method and display panel of promotion signal transmission rate

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5963053A (en) * 1997-10-09 1999-10-05 Pericom Semiconductor Corp. Self-biasing CMOS PECL receiver with wide common-mode range and multi-level-transmit to binary decoder
CN101365130A (en) * 2007-08-08 2009-02-11 联咏科技股份有限公司 Clock and data codependent high transmission rate interface
CN103118251A (en) * 2012-05-08 2013-05-22 友达光电股份有限公司 Multi-level data transmission method and system
CN103208306A (en) * 2012-01-16 2013-07-17 慧荣科技股份有限公司 Method, memory controller and system for reading data stored in flash memory
CN103391092A (en) * 2013-03-01 2013-11-13 友达光电股份有限公司 Method for multi-level data transmission
CN109308885A (en) * 2018-12-11 2019-02-05 惠科股份有限公司 The method and display panel of promotion signal transmission rate

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1254919C (en) * 2002-07-31 2006-05-03 中国科学院过程工程研究所 Coding method of binary numerical signal and its signal transmission method and circuit
CN105991196B (en) * 2015-02-17 2019-04-19 华为技术有限公司 A kind of data precoding device, system and coding method
CN105791850B (en) * 2016-03-10 2018-08-03 京东方科技集团股份有限公司 A kind of encoder and its coding method, decoder and its coding/decoding method
CN108092690A (en) * 2016-11-22 2018-05-29 河南蓝信科技股份有限公司 A kind of transponder and its method
CN106531113B (en) * 2017-01-03 2019-05-03 京东方科技集团股份有限公司 A kind of display panel, drive circuit and its driving method, display device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5963053A (en) * 1997-10-09 1999-10-05 Pericom Semiconductor Corp. Self-biasing CMOS PECL receiver with wide common-mode range and multi-level-transmit to binary decoder
CN101365130A (en) * 2007-08-08 2009-02-11 联咏科技股份有限公司 Clock and data codependent high transmission rate interface
CN103208306A (en) * 2012-01-16 2013-07-17 慧荣科技股份有限公司 Method, memory controller and system for reading data stored in flash memory
CN103118251A (en) * 2012-05-08 2013-05-22 友达光电股份有限公司 Multi-level data transmission method and system
CN103391092A (en) * 2013-03-01 2013-11-13 友达光电股份有限公司 Method for multi-level data transmission
CN109308885A (en) * 2018-12-11 2019-02-05 惠科股份有限公司 The method and display panel of promotion signal transmission rate

Also Published As

Publication number Publication date
CN109308885A (en) 2019-02-05

Similar Documents

Publication Publication Date Title
WO2014189275A1 (en) Apparatus and method of recognizing external device in a communication system
WO2018076865A1 (en) Data sharing method, device, storage medium, and electronic device
WO2020048009A1 (en) Overcurrent protection driving circuit and display device
WO2012096546A2 (en) Method and apparatus for transmitting user input from a sink device to a source device in a wi-fi direct communication system
WO2018076841A1 (en) Data sharing method, apparatus, storage medium and server
WO2016060447A2 (en) Device and method for transmitting and receiving data using hdmi
WO2020062551A1 (en) Display-panel driving circuit and display device
WO2018049777A1 (en) High-power region-based dimming control method, control device and television
WO2017122980A1 (en) Electronic device and method for authenticating identification information thereof
WO2020093538A1 (en) Protection circuit of memory in display panel and display apparatus
WO2020155537A1 (en) Standby mode switching method and device, electronic apparatus, and storage medium
WO2016123898A1 (en) Short message managing method and mobile terminal thereof
EP3596817A1 (en) Voltage converter circuit, electronic device including the same and voltage conversion method
WO2018161601A1 (en) Screen backlight adjusting method, device, storage medium and electronic device
WO2016192587A1 (en) Wireless communication method and apparatus
WO2020119560A1 (en) Method for improving signal transmission rate and display panel
WO2020135049A1 (en) Display panel overcurrent protection method and display device
WO2020062554A1 (en) Data reading method for memory, display apparatus, and computer readable storage medium
WO2021060758A1 (en) Lossless data compression device and method therefor
WO2015161645A1 (en) Multimedia content change detection method, device, and resource propagation system
WO2012163216A1 (en) Method and apparatus for controlling input of mobile terminal for java program
WO2021017332A1 (en) Voice control error reporting method, electrical appliance and computer-readable storage medium
WO2020113679A1 (en) Spectrum spreading method, chip, display panel and readable storage medium
WO2018171570A1 (en) Method for loading driver during terminal startup process and terminal device
WO2012022036A1 (en) Terminal, and i/o extension apparatus, method and system

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19896774

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 03.11.2021)

122 Ep: pct application non-entry in european phase

Ref document number: 19896774

Country of ref document: EP

Kind code of ref document: A1