WO2020119559A1

WO2020119559A1 - Driving architecture and method for display panel

Info

Publication number: WO2020119559A1
Application number: PCT/CN2019/123092
Authority: WO
Inventors: 胡云川; 赵文勤
Original assignee: 惠科股份有限公司
Priority date: 2018-12-12
Filing date: 2019-12-04
Publication date: 2020-06-18
Also published as: CN109389959A; CN109389959B

Abstract

A driving architecture for a display panel, wherein the driving architecture for a display panel comprises a control circuit board (CB) and a horizontal circuit board (XB); a timing controller chip (TCON) is provided in the control circuit board (CB); a flash memory (Flash2) for storing operation data of the timing controller chip (TCON) and optical compensation data of the display panel is provided in the horizontal circuit board (XB).

Description

Driving structure and method of display panel The

Related application

This application requires the priority of the Chinese patent application with the application number 201811522481.7 and the name "drive structure and method of the display panel", which was applied on December 12, 2018. The entire content of which is hereby incorporated by reference.

Technical field

The present application relates to the field of liquid crystal display, in particular to a driving structure and method of a display panel.

Background technique

The statements here only provide background information related to the present application and do not necessarily constitute prior art.

LCD( LCD) has the advantages of light, thin and low power consumption, and is generally recognized by the market and consumers. In order to meet people's high image quality requirements for displaying images on the LCD screen, the Mura erasing technology (De-mura technology) is applied to the LCD screen to improve the uniformity of the screen display brightness.

Generally, the control circuit board of the LCD screen and the horizontal direction circuit panel are separately manufactured and sold. In the existing application architecture (see FIG. 1) applicable to the LCD screen, the control circuit board (CB, Control The flash memory 1 (Flash1) on the board) stores the control chip, such as the initialization parameters and digital gamma of the timing controller (TCON, Timing Controller) Gamma) and over-driving technology (over driving) display lookup table (LUT, Look up Table). Since the actual situation of each display panel does not pass, the optical compensation data generated by the De-mura technology is stored on the horizontal direction circuit board (XB, referred to as X- Flash memory 2 (Flash2) of the board). After the TCON is powered on, the data stored in the flash memory (Flash1 and Flash2) is obtained through the interfaces (SPI1 and SPI2).

According to market demand, Flash manufacturers provide Flash products with capacity specifications of 2 Mbit and 8Mbit, if you want to buy other specifications of Flash, you need to order, the price is higher. The total size of the data stored in the above Flash1 is less than 2 Mbit, the optical compensation data generated by De-mura technology is about 4 Mbit, the capacity of Flash1 is 2 Mbit Flash, and the capacity of Flash2 is 8 Mbit Flash. Using 8 Mbit Flash2 to store about 4 Mbit of data results in a waste of flash memory capacity.

Summary of the invention

The main purpose of the present application is to provide a driver-side architecture and method for a display panel, which aims to avoid a waste of flash memory capacity in the driver-side architecture of the display panel.

In order to achieve the above object, the present application provides a driving architecture for a display panel. The driving architecture of the display panel has a control circuit board and a horizontal direction circuit board. The control circuit board has a control chip in the horizontal direction circuit board. A flash memory that stores the operation data of the control chip and the optical compensation data of the display panel.

Optionally, the control chip is connected to the flash memory through an interface.

Optionally, the interface is a serial external interface.

Optionally, the flash memory includes a first address and a second address. The operation data of the control chip is stored in the first address; the optical compensation data of the display panel is stored in the first address and the first address In the second address.

Optionally, the read priority of the first address is higher than that of the second address.

Optionally, the first address is a low address, and the second address is a high address.

Optionally, the operation data of the control chip includes at least one of initialization parameters of the control chip and a display lookup table of the function module.

Optionally, the functional module includes at least one of digital gamma and overvoltage driving technology.

Optionally, the driving structure of the display panel has a control circuit board and a horizontal direction circuit board;

The control circuit board has a timing control chip;

The horizontal circuit board has a flash memory that stores operation data of the timing control chip and optical compensation data of the display panel;

The timing control chip is connected to the flash memory through an interface.

Optionally, the flash memory includes a first address and a second address;

The operation data of the timing control chip is stored in the first address;

And, the optical compensation data of the display panel is stored in the first address and the second address.

Optionally, the operation data of the control chip includes at least one of the initialization parameters of the timing control chip and the display look-up table of the function module.

In addition, in order to achieve the above object, the present application also provides a driving method of a display panel, wherein the driving method of the display panel is based on a driving structure of the display panel, wherein the driving structure of the display panel has a control circuit board and a level A direction circuit board, the control circuit board has a control chip, and the horizontal direction circuit board has a flash memory that stores the operation data of the control chip and the optical compensation data of the display panel, and the driving method of the display panel includes The following steps:

When a power-on signal is detected, sequentially obtain the operation data of the control chip in the flash memory and the optical compensation data of the display panel;

According to the operation data and the optical compensation data, the display panel is controlled to display images.

Optionally, the operation data of the control chip and the optical compensation data stored in the flash memory are sequentially acquired through a serial external interface, wherein the operation data of the control chip and the optical compensation data are stored in Among the first address and the second address of the flash memory, the read priority of the first address is higher than that of the second address.

A driving structure and method for a display panel proposed in the embodiments of the present application, when the control chip is powered on, first obtain the operation data of the control chip stored in the flash memory, restore the working capacity of the control chip, and then obtain the storage in the flash memory The optical compensation data of the display panel to overcome the defect of uneven display brightness in the display panel. Furthermore, the display panel is controlled to display the received screen based on the acquired operation data and optical compensation data. Store the operation data of the control chip and the optical compensation data of the display panel in the same flash memory, and store the data stored in the two flash memories in the exemplary technology in the flash memory in the horizontal circuit board, which can reasonably use the capacity of the flash memory, To avoid the waste of flash memory capacity, while reducing one flash memory, saving the production cost of the display panel.

BRIEF DESCRIPTION

FIG. 1 is a schematic diagram of a driving structure of a display panel in an exemplary technology;

2 is a schematic diagram of a driving architecture in an embodiment of a driving architecture of a display panel of the present application;

FIG. 3 is a schematic flowchart of an embodiment of a method for driving a display panel of the present application.

The implementation, functional characteristics and advantages of the present application will be further described in conjunction with the embodiments and with reference to the drawings.

detailed description

It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.

The main solutions of the embodiments of this application are:

Since the exemplary technology adopts a large-capacity flash memory to store data with a small occupied capacity, it leads to a waste of flash memory capacity.

This application provides a solution, when the control chip is powered on, first obtain the operation data of the control chip stored in the flash memory, restore the working capacity of the control chip, and then obtain the optical compensation data of the display panel stored in the flash memory To overcome the defect of uneven display brightness in the display panel. Furthermore, the display panel is controlled to display the received screen based on the acquired operation data and optical compensation data. Store the operation data of the control chip and the optical compensation data of the display panel in the same flash memory, and store the data stored in the two flash memories in the exemplary technology in the flash memory in the horizontal circuit board, which can reasonably use the capacity of the flash memory, To avoid the waste of flash memory capacity, while reducing one flash memory, saving the production cost of the display panel.

2, a schematic structural diagram of a driving frame in an embodiment of a driving frame of a display panel of the present application. As shown in FIG. 2, the driving structure of the display panel includes a control circuit board (CB, Control board) and horizontal circuit board (XB, X-board). There are control chips in the control circuit board, such as timing control chips (TOCN, Timing Controller), etc., with flash memory (Flash2) in the horizontal circuit board. In Flash2, the operation data for the operation of the control chip and the optical compensation data matched with the display panel are stored.

Due to the integrated circuit (IC, Integrated) of the control chip circuit) does not have a storage function, so the configuration parameters and other data required to control the chip work are stored in a specific storage integrated circuit, such as flash memory. At the same time, the brightness display uniformity of each display panel and the display area are different, so the display panel is equipped with its applicable optical compensation data. When the image is displayed, the control chip reads the optical compensation data can effectively overcome the display panel brightness. The defects are uniform and improve the picture quality.

The operation data of the control chip mainly includes the initialization parameters of the control chip and the display look-up table (LUT, Look up) of the function modules of the control chip Table). The functional modules shown at least include digital gamma and over-voltage driving technology (over Driving). The human visual system generally has a logarithmic relationship to the brightness or perception of the display, but a non-linear relationship. In order to ensure that the image presented by the display is the same as the original image, gamma correction needs to be introduced into the display. Through the gamma correction of the digital gamma, the gray scale curve of the display is debugged to achieve the best visual effect. Gamma correction is implemented using a brightness look-up table. The brightness address is stored in the look-up table. The gray scale of the picture is adjusted according to the look-up table to eliminate uneven brightness of the image and improve the image quality. The look-up table is displayed through voltage drive technology The driven gray scale can be obtained according to the input gray scale corresponding to the current frame image and the previous frame image, and the gray scale is output to the display panel to display the image.

The optical compensation data of the display panel is the Ram erasure compensation data generated by the algorithm of the Ram erasure technology (De-mura technology).

Generally, the storage size of the operating data of the control chip is about 4Mbit, the optical compensation data of the display panel is less than 2Mbit, and the capacity of the flash memory (Flash2) in the horizontal direction circuit board is 8 Mbit. Therefore, in this application, the operation data of the control chip and the optical compensation data of the display panel configuration are stored in the flash memory (Flash 2) located on the horizontal circuit board, which can reasonably use the capacity of the flash memory and directly eliminate the need for exemplary technologies The flash memory (Flash1) on the control circuit board in the drive frame of the display panel (as shown in FIG. 1) in the system saves the production cost of the display panel.

The control chip in the control circuit board is connected to the flash memory (Flash 2) in the horizontal circuit board through the interface. When the control chip is powered on, the operating data of the control chip and the optical compensation data of the display panel are obtained from the flash memory through the interface to realize the display The image display function of the panel. Among them, the operation data of the control chip is stored in the first address of the flash memory (Flash2), the optical compensation data of the display panel is stored in the second address of the flash memory (Flash2), when the control chip reads the data, the first After the operation data in the address is restored, the optical compensation data of the display panel in the second address is acquired after the operation capability of the control chip is restored, so as to eliminate the uneven brightness of the display panel. Therefore, the read priority of the first address is higher than that of the second address.

In addition, due to the serial external interface (SPI, Serial Peripheral interface) has the advantages of supporting duplex operation, simple operation and high data transmission rate. When the control chip reads the data stored in the flash memory through the interface, the interface used is preferably a serial external interface.

Compared with the exemplary technology, the display panel driving architecture provided by the present application reduces the flash memory (Flash1) located in the control circuit board, and stores the operation data of the control chip in the flash memory (Flash2) of the horizontal circuit board, thereby There is no need to connect the interface between the control chip and Flash1 (SPI1), so that the interface in the drive architecture is reduced from two to one (only SPI2 connected to Flash2 is required). Select a program with only one set of SPI block functions to make the integrated circuit (TOCN) of the control chip IC) The package area is reduced. As we all know, the smaller the chip size, the lower the price, thereby reducing the number of interfaces, reducing the cost of the integrated circuit of the control chip, and improving the economic benefits of the display panel.

In this embodiment, the driving architecture of the display panel has a control circuit board and a horizontal direction circuit board, the control circuit board has a control chip, and the horizontal direction circuit board has a flash memory, and the operating data of the control chip and all The optical compensation data of the display panel is described. By storing the data stored in the two flash memories in the exemplary technology in the flash memory in the horizontal circuit board, the capacity of the flash memory can be reasonably utilized to avoid the waste of the flash memory capacity, while reducing one flash memory, thereby saving the production cost of the display panel.

Referring to FIG. 2, in another embodiment of the display panel driving architecture of the present application, the display panel driving architecture includes a control circuit board (CB, Control board) and horizontal circuit board (XB, X-board). There are timing control chips (TOCN, Timing) in the control circuit board Controller), with flash memory (Flash2) in the horizontal circuit board. In Flash2, the operation data for the operation of the timing control chip and the optical compensation data matched with the display panel are stored. Due to the integrated circuit (IC, Integrated) of the timing control chip circuit) does not have a storage function, therefore, the timing control chip is connected to the Flash 2 through the interface, so that the flash memory stores configuration parameters and other data required by the timing control chip.

At the same time, the brightness display uniformity of each display panel and the display area are different, so the display panel is equipped with its applicable optical compensation data. During image display, the timing control chip reads the optical compensation data can effectively overcome the display panel brightness Uneven defects improve picture quality.

The operation data of the timing control chip mainly includes the initialization parameters of the control chip and the display lookup table (LUT, Look) of the function module of the timing control chip up Table). The functional modules shown at least include digital gamma and over-voltage driving technology (over Driving). The human visual system generally has a logarithmic relationship to the brightness or perception of the display, but a non-linear relationship. In order to ensure that the image presented by the display is the same as the original image, gamma correction needs to be introduced into the display. Through the gamma correction of the digital gamma, the gray scale curve of the display is debugged to achieve the best visual effect. Gamma correction is implemented using a brightness look-up table. The brightness address is stored in the look-up table. The gray scale of the picture is adjusted according to the look-up table to eliminate uneven brightness of the image and improve the image quality. The look-up table is displayed through voltage drive technology The driven gray scale can be obtained according to the input gray scale corresponding to the current frame image and the previous frame image, and the gray scale is output to the display panel to display the image.

The timing control chip in the control circuit board is connected to the flash memory (Flash2) in the horizontal direction circuit board through the interface. When the timing control chip is powered on, the operation data of the timing control chip and the optical compensation data of the display panel are obtained from the flash memory through the interface To realize the image display function of the display panel. Among them, the operation data of the timing control chip is stored in the first address of the flash memory (Flash2), and the optical compensation data of the display panel is stored in the second address of the flash memory (Flash2). When the control chip reads the data, the first After recovering the operation data of the timing control chip from the operating data in one address, the optical compensation data of the display panel in the second address is acquired to eliminate the uneven brightness of the display panel. Therefore, the read priority of the first address is higher than that of the second address.

In addition, due to the serial external interface (SPI, Serial Peripheral interface) has the advantages of supporting duplex operation, simple operation and high data transmission rate. When the sequential control chip reads the data stored in the flash memory through the interface, the interface used is preferably a serial external interface.

Compared with the exemplary technology, a display panel driving architecture provided by the present application reduces the flash memory (Flash1) in the control circuit board, and stores the operation data of the timing control chip in the flash memory (Flash2) of the horizontal circuit board, There is no need to connect the interface between the timing control chip and Flash1 (SPI1), so that the interface in the drive architecture is reduced from two to one (only SPI2 that needs to be connected to Flash2). Choose a program with only one set of SPI block functions to make the integrated circuit (TOCN) of the timing control chip IC) The package area is reduced. As we all know, the smaller the chip size, the lower the price, thereby reducing the number of interfaces, reducing the cost of the integrated circuit of the timing control chip, and improving the economic benefits of the display panel.

In this embodiment, the driving structure of the display panel has a control circuit board and a horizontal direction circuit board, a timing control chip is provided in the control circuit board, a flash memory is provided in the horizontal direction circuit board, and the operating data of the control chip is stored in the flash memory and Optical compensation data of the display panel. The timing control chip is connected with Flash2 through the interface, so that the configuration parameters and other data required by the timing control chip are stored in the flash memory. By storing the data stored in the two flash memories in the exemplary technology in the flash memory in the horizontal circuit board, the capacity of the flash memory can be reasonably utilized to avoid the waste of the flash memory capacity, while reducing one flash memory, thereby saving the production cost of the display panel.

Referring to FIG. 3, an embodiment of a driving method of a display panel of the present application, the driving method of the display panel includes:

Step S10: When the power-on signal is detected, sequentially obtain the operation data of the control chip in the flash memory and the optical compensation data of the display panel.

In the driving structure of the display panel in the exemplary technology (see FIG. 1), the driving structure includes a control circuit board (CB) and a horizontal direction circuit board (XB), and a control chip is stored in flash memory 1 (Flash1) on the control circuit board (TCON) initialization parameters, digital gamma (Digital gamma) and over-voltage drive technology (over Driving) display lookup table (LUT). The optical compensation data generated by the De-mura technology is stored in the flash memory 2 (Flash 2) of the horizontal circuit board. As shown in FIG. 2, the driving architecture of the display panel provided by the present application includes a control circuit board and a horizontal direction circuit board. There is a control chip (TOCN) in the control circuit board, and a flash memory (Flash2) in the horizontal direction circuit board. In Flash2, the operation data for the operation of the control chip and the optical compensation data matched with the display panel are stored.

Since the integrated circuit of the control chip (TOCN IC) does not have a storage function, so the configuration parameters and other data required to control the chip work are stored in a specific storage integrated circuit, such as flash memory. At the same time, the brightness display uniformity and display area of each display panel are different, so the display panel is equipped with its applicable optical compensation data. When the image is displayed, the control chip reads the optical compensation data can effectively overcome the display panel brightness. The defects are uniform and improve the picture quality.

When the control chip detects the power-on signal, it sequentially obtains the operation data from the flash memory (Flash2) to realize the basic operation function of the control chip and the optical compensation data of the display panel to overcome the uneven brightness of the display panel defect.

Further, the operation data of the control chip is stored in the first address of the flash memory (Flash2), and the optical compensation data of the horizontal direction circuit board is stored in the second address of the flash memory (Flash2), so that the control chip reads the Operating data and the optical compensation data. Set the read priority of the first address to be higher than the second address, so that after the control chip is powered on, it first reads the operating data in the first address, and then obtains the optical compensation data of the display panel in the second address to eliminate The brightness of the display panel is uneven.

The control chip (TOCN) in the control circuit board is connected to the flash memory (Flash2) in the horizontal direction circuit board through the interface. Due to the serial external interface (SPI, Serial Peripheral interface) has the advantages of supporting duplex operation, simple operation and high data transmission rate. When the control chip reads the data stored in the flash memory through the interface, the interface used is preferably a serial external interface.

In step S20, the display panel is controlled to display images according to the operation data and the optical compensation data.

The operation data of the control chip mainly includes the initialization parameters of the control chip and the display look-up table of the function modules of the control chip. The functional modules shown include at least, digital gamma (Digital gamma) and over-voltage drive technology (over Driving). The human visual system has a logarithmic relationship to the brightness or perception of the display, but a non-linear relationship. In order to ensure that the image presented by the display is the same as the original image, gamma correction needs to be introduced into the display. Through the gamma correction of the digital gamma, the gray scale curve of the display is debugged to achieve the best visual effect. Gamma correction is implemented using a brightness look-up table. The brightness address is stored in the look-up table, and the gray scale of the picture is adjusted according to the look-up table to eliminate uneven brightness of the image and improve the image quality. The look-up table is displayed through voltage drive technology The driven gray scale can be obtained according to the input gray scale corresponding to the current frame image and the previous frame image, and the gray scale is output to the display panel to display the image. The optical compensation data of the display panel is the Ram erasure compensation data generated by the algorithm of the Ram erasure technology (De-mura technology).

After the control chip obtains the operation data, the basic working capacity of the control chip is started according to the initialization parameters of the control chip in the operation data, and then the screen display is realized according to the display lookup table of the function module in the operation data and the optical compensation data of the display panel.

In this embodiment, when the control chip is powered on, it first obtains the operation data of the control chip stored in the flash memory, restores the working capability of the control chip, and then obtains the optical compensation data of the display panel stored in the flash memory to Overcome the defect of uneven display brightness in the display panel. Furthermore, the display panel is controlled to display the received screen based on the acquired operation data and optical compensation data. Store the operation data of the control chip and the optical compensation data of the display panel in the same flash memory, and store the data stored in the two flash memories in the exemplary technology in the flash memory in the horizontal circuit board, which can reasonably use the capacity of the flash memory, To avoid the waste of flash memory capacity, while reducing one flash memory, saving the production cost of the display panel.

It should be noted that in this article, the terms "include", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system that includes a series of elements includes not only those elements, It also includes other elements that are not explicitly listed, or include elements inherent to this process, method, article, or system. Without more restrictions, the element defined by the sentence "include one..." does not exclude that there are other identical elements in the process, method, article or system that includes the element.

The sequence numbers of the above embodiments of the present application are for description only, and do not represent the advantages and disadvantages of the embodiments.

Through the description of the above embodiments, those skilled in the art can clearly understand that the methods in the above embodiments can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware, but in many cases the former is better Implementation. Based on such an understanding, the technical solution of the present application can be embodied in the form of a software product in essence or part that contributes to the exemplary technology, and the computer software product is stored in a storage medium (such as ROM/RAM) as described above , Disk, CD), including several instructions to make a terminal device (which can be a mobile phone, computer, server, air conditioner, or network equipment, etc.) to perform the method described in each embodiment of the present application.

The above are only optional embodiments of the present application and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by the description and drawings of this application, or directly or indirectly used in other related technologies In the field, the same reason is included in the scope of patent protection of this application.

Claims

A driving structure of a display panel, wherein the driving structure of the display panel has a control circuit board and a horizontal direction circuit board;

The control circuit board has a control chip;

The horizontal direction circuit board has a flash memory that stores operation data of the control chip and optical compensation data of the display panel.
The driving structure of the display panel according to claim 1, wherein the control chip is connected to the flash memory through an interface.
The driving structure of the display panel according to claim 2, wherein the interface is a serial external interface.
The driving structure of the display panel according to claim 1, wherein the flash memory includes a first address and a second address;

The operation data of the control chip is stored in the first address;

And, the optical compensation data of the display panel is stored in the first address and the second address.
The driving structure of the display panel according to claim 4, wherein the read priority of the first address is higher than that of the second address.
The driving structure of the display panel according to claim 5, wherein the first address is a low address and the second address is a high address.
The driving structure of the display panel according to claim 1, wherein the operation data of the control chip includes at least one of initialization parameters of the control chip and a display look-up table of the function module.
The driving structure of the display panel according to claim 7, wherein the functional module comprises at least one of digital gamma and over-voltage driving technology.
The driving structure of the display panel according to claim 2, wherein the operation data of the control chip includes at least one of initialization parameters of the control chip and a display look-up table of the function module.
The driving structure of the display panel according to claim 4, wherein the operation data of the control chip includes at least one of initialization parameters of the control chip and a display look-up table of the function module. The
A driving structure of a display panel, wherein the driving structure of the display panel has a control circuit board and a horizontal direction circuit board;

The control circuit board has a timing control chip;

The horizontal circuit board has a flash memory that stores operation data of the timing control chip and optical compensation data of the display panel;

And, the timing control chip is connected to the flash memory through an interface.
The driving structure of the display panel according to claim 11, wherein the flash memory includes a first address and a second address;

The operation data of the timing control chip is stored in the first address;

And, the optical compensation data of the display panel is stored in the first address and the second address.
The driving structure of the display panel according to claim 11, wherein the operation data of the control chip includes at least one of initialization parameters of the timing control chip and a display look-up table of the function module.
A driving method of a display panel, wherein the driving method of the display panel is based on a driving architecture of the display panel, wherein the driving architecture of the display panel has a control circuit board and a horizontal direction circuit board, and the control circuit board has A control chip, the horizontal direction circuit board has a flash memory that stores the operation data of the control chip and the optical compensation data of the display panel, and the driving method of the display panel includes the following steps:

When a power-on signal is detected, sequentially obtain the operation data of the control chip in the flash memory and the optical compensation data of the display panel;

According to the operation data and the optical compensation data, the display panel is controlled to display images.
The driving method of the display panel according to claim 14, wherein the operation data of the control chip and the optical compensation data stored in the flash memory are sequentially acquired through a serial external interface, wherein the control chip The operation data and the optical compensation data storage are respectively stored in the first address and the second address of the flash memory, and the read priority of the first address is higher than the second address.
The driving method of the display panel according to claim 15, wherein the operation data of the control chip includes at least one of initialization parameters of the control chip and a display lookup table of the function module.
The driving method of a display panel as claimed in claim 16, wherein the functional module includes at least one of digital gamma and over-voltage driving technology. The