WO2020114572A1

WO2020114572A1 - Devices, methods and computer programs for spatial diversity via enhanced rate matching in wireless communications

Info

Publication number: WO2020114572A1
Application number: PCT/EP2018/083344
Authority: WO
Inventors: Xiaohui Liu; Neng Wang
Original assignee: Huawei Technologies Co., Ltd.
Priority date: 2018-12-03
Filing date: 2018-12-03
Publication date: 2020-06-11

Abstract

It is an objective to improve spatial diversity in wireless communication systems. A network device may determine if a preconfigured condition is satisfied by a relation. If the preconfigured condition is satisfied, a repeated bit in the circular buffer may be mapped to a different antenna port than a corresponding original bit in the circular buffer. If the preconfigured condition is not satisfied, the network device may modify a circular buffer or bit read from the circular buffer. A network device, a method, and a computer program are disclosed.

Description

DEVICES, METHODS AND COMPUTER PROGRAMS FOR SPATIAL DIVERSITY VIA ENHANCED RATE MATCHING IN WIRELESS COMMUNICATIONS

TECHNICAL FIELD

The present disclosure relates to the field of wireless communications, and more particularly to a network device, and a related method and a computer program product.

BACKGROUND

In wireless communication, spatial diversity may be utilized to improve the reli ability of wireless communication. In spatial diversity, a signal can be transmitted using multi ple transmission paths using, for example, multiple antennas. Thus, if a signal path suffers from, for example, fading, co-channel interference, dispersion effects in time and frequency, or path loss effects, the signal can still be transferred using another path that may not suffer from these effects.

SUMMARY

This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

It is an object of the invention to provide improved spatial diversity in wireless communications .

This can be done via enhanced rate matching.

The foregoing and other objects are achieved by the features of the independent claims. Further implementation forms are apparent from the dependent claims, the description and the figures.

According to a first aspect, a network device is provided. The network device comprises at least one processor configured to: determine a number of non-NULL bits, D', in a circular buffer; determine a number of antenna ports, N_L, available for physical shared channel transport of wireless data transfer; determine if a preconfigured condition is satisfied by a relation, wherein the relation comprises at least the N_L and the D' , and wherein if the preconfigured con dition is satisfied, a repeated bit in the circular buffer is mapped to a different antenna port than a corresponding original bit in the circular buffer; and in response to the preconfigured condi tion not being satisfied, perform at least one of: modify the circular buffer so that the precon figured condition is satisfied; and read bits from the circular buffer, and modify the read bits so that the preconfigured condition is satisfied for the read bits.

With these configurations, the network device can, for example, ensure that repeated bits are mapped to different antenna ports and/or layers.

In an implementation form of the first aspect, the at least one processor is further configured to: perform the modifying the read bits by performing at least one of: puncturing at least one bit in the circular buffer; and repeating at least one bit in the read bits. With these configurations, the network device can, for example, efficiently ensure that the condition is satisfied.

In a further implementation form of the first aspect, the at least one processor is further configured to: puncture the at least one bit at a preconfigured location in the read bits. With these configurations, the network device can, for example, ensure that the read bits satisfy the condition without needing to modify the circular buffer.

In a further implementation form of the first aspect, the at least one processor is further configured to: repeat the at least one bit at a first preconfigured location in the read bits to a second preconfigured location in the read bits. With these configurations, the network de vice can, for example, ensure that the read bits satisfy the condition without needing to modify the circular buffer.

In a further implementation form of the first aspect, the at least one processor is further configured to: perform the modifying the circular buffer by modifying a length of the circular buffer. With these configurations, the network device can, for example, ensure that the read bits satisfy the condition by modifying the circular buffer.

In a further implementation form of the first aspect, the at least one processor is further configured to: perform the modifying the circular buffer by puncturing at least one bit in the circular buffer. With these configurations, the network device can, for example, effi ciently modify the length of the circular buffer.

In a further implementation form of the first aspect, wherein the preconfigured condition comprises at least one of: D' mod N_L = T, where T is an integer between 1 and N_L— 1; D' mod N_L = N_L— T, where T is an integer between 1 and N_L— 1; and D'mod N_L ¹ 0. With these configurations, the network device can, for example, efficiently determine, if re peated bits are mapped to different antenna ports. In a further implementation form of the first aspect, the at least one processor is further configured to: determine a starting position k₀ in the circular buffer, wherein the k₀ is dependent on the N_L; and determine a rate matching output length E; and wherein the relation further comprises the k₀ and the E. With these configurations, the network device can, for ex ample, utilise k₀ and E in ensuring that repeated bits are mapped to different antenna ports.

In a further implementation form of the first aspect, the k₀ comprises a bit index in the circular buffer. With these configurations, the network device can, for example, take into account the starting position in the circular buffer in determining if repeated bits are mapped to different antenna ports.

In a further implementation form of the first aspect, the at least one processor is further configured to: determine a preconfigured value T_rv and determine the k₀ according to k₀ mod N_L = T_rv. With these configurations, the network device can, for example, determine the starting position in the circular buffer so that repeated bits are mapped to different antenna ports.

In a further implementation form of the first aspect, the at least one processor is further configured to: determine the preconfigured value T_rv for each redundancy version, RV. With these configurations, the network device can, for example, ensure that as the bits are re transmitted via different RVs, repeated bits are mapped to different antenna ports.

In a further implementation form of the first aspect, the at least one processor is further configured to: assign T_rv = 0. With these configurations, the network device can, for example, efficiently determine a starting position.

In a further implementation form of the first aspect, the preconfigured condition comprises at least one of: k₀ + E— D' is greater than a preconfigured integer threshold; and k₀ + E— D')/E is greater than a preconfigured real value threshold. With these configura tions, the network device can, for example, ensure that the repeated bits are mapped to a differ ent antenna port also in retransmission.

According to a second aspect, a method is provided. The method comprises determining a number of non-NULL bits, D', in a circular buffer; determining a number of antenna ports, N_l, available for physical shared channel transport of wireless data transfer; determining if a preconfigured condition is satisfied by a relation, wherein the relation comprises at least the N_L and the D' , and wherein if the preconfigured condition is satisfied, a repeated bit in the circular buffer is mapped to a different antenna port than a corresponding original bit in the circular buffer; and in response to the preconfigured condition not being satisfied, performing at least one of: modifying the circular buffer so that the preconfigured condition is satisfied; and read ing bits from the circular buffer, and modifying the read bits so that the preconfigured condition is satisfied for the read bits. With this method it can be ensured that repeated bits are mapped to different antenna ports and/or layers.

In an implementation form of the second aspect, the method further comprises: performing the modifying the read bits by performing at least one of: puncturing at least one bit in the circular buffer; and repeating at least one bit in the read bits. With this method, it can be efficiently ensured that the condition is satisfied.

In a further implementation form of the second aspect, the method further com prises: puncturing the at least one bit at a preconfigured location in the read bits. With this method, it can be ensured that the read bits satisfy the condition without needing to modify the circular buffer.

In a further implementation form of the second aspect, the method further com prises: repeating the at least one bit at a second preconfigured location in the read bits to a second preconfigured location in the read bits. With this method, it can be ensured that the read bits satisfy the condition without needing to modify the circular buffer.

In a further implementation form of the second aspect, the method further com prises: performing the modifying the circular buffer by modifying a length of the circular buffer. With this method, it can be ensured that the read bits satisfy the condition by modifying the circular buffer.

In a further implementation form of the second aspect, the method further com prises: performing the modifying the circular buffer by puncturing at least one bit in the circular buffer. With this method the length of the circular buffer can be efficiently modified.

In a further implementation form of the second aspect, wherein the preconfig ured condition comprises at least one of: D' mod N_L = T, where T is an integer between 1 and N_L— 1; D' mod N_L = N_L— T, where T is an integer between 1 and N_L— 1; and D'mod N_L ¹ 0. With this method it can be efficiently determined, if repeated bits are mapped to different antenna ports.

In a further implementation form of the second aspect, the method further com prises: determining a starting position k₀ in the circular buffer, wherein the k₀ is dependent on the N_l; and determining a rate matching output length E; and wherein the relation further com prises the k₀ and the E. With this method k₀ and E can be utilised in ensuring that repeated bits are mapped to different antenna ports. In a further implementation form of the second aspect, k_Q comprises a bit index in the circular buffer. With method, the starting position in the circular buffer can be taken into account in determining if repeated bits are mapped to different antenna ports.

In a further implementation form of the second aspect, the method further com prises: determining a preconfigured value T_rv ; and determining the k₀ according to k₀ mod N_L = T_rv. With this method, the starting position in the circular buffer can be deter mined so that repeated bits are mapped to different antenna ports.

In a further implementation form of the second aspect, the method further com prises: determining the preconfigured value T_rv for each redundancy version, RV. With this method, it can be ensured that as the bits are retransmitted via different RVs, repeated bits are mapped to different antenna ports.

In a further implementation form of the second aspect, the method further com prises: assigning T_rv = 0. With this method, a starting position can be efficiently determined.

In a further implementation form of the second aspect, wherein the preconfig ured condition comprises at least one of: k₀ + E— D' is greater than a preconfigured integer threshold; and (k₀ + E— D')/E is greater than a preconfigured real value threshold. With this method, it can be ensured that the repeated bits are mapped to a different antenna port also in retransmission.

According to a third aspect, a computer program product is provided. The com puter program product comprises program code configured to perform the method according to the second aspect, when the computer program product is executed on a computer.

Many of the attendant features will be more readily appreciated as they become better understood by reference to the following detailed description considered in connection with the accompanying drawings.

DESCRIPTION OF THE DRAWINGS

In the following, example embodiments are described in more detail with refer ence to the attached figures and drawings, in which:

Fig. 1 is a block diagram illustrating a network device;

Fig. 2 is a processing diagram illustrating PDSCH processing;

Fig. 3 is a diagram illustrating bit mapping from a circular buffer to antenna ports;

Fig. 4 is another diagram illustrating bit mapping from a circular buffer to antenna ports; Fig. 5 is a flow diagram illustrating circular buffer bit processing for transmission; Fig. 6 is another flow diagram illustrating circular buffer bit processing for trans- mission;

Fig. 7 is another flow diagram illustrating circular buffer bit processing for trans- mission;

Fig. 8 is another flow diagram illustrating circular buffer bit processing for trans mission;

Fig. 9 is another diagram illustrating bit mapping from a circular buffer to antenna ports;

Fig. 10 is a graph illustrating simulation results;

Fig. 11 is another diagram illustrating bit mapping from a circular buffer to an tenna ports in retransmission;

Fig. 12 is a flow diagram illustrating circular buffer bit processing for retransmis sion;

Fig. 13 is another diagram illustrating bit mapping from a circular buffer to an tenna ports in retransmission; and

Fig. 14 is a flow diagram illustrating a method.

In the following, identical reference signs refer to identical or at least functionally equivalent features.

DETAILED DESCRIPTION

In the following description, reference is made to the accompanying drawings, which form part of the disclosure, and in which are shown, by way of illustration, specific aspects in which the invention may be placed. It is understood that other aspects may be utilized and structural or logical changes may be made without departing from the scope of the inven tion. The following detailed description, therefore, is not to be taken in a limiting sense, as the scope of the invention is defined be the appended claims.

For instance, it is understood that a disclosure in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa. For example, if a specific method step is described, a corresponding device may include a unit to perform the described method step, even if such unit is not explic itly described or illustrated in the figures. On the other hand, for example, if a specific apparatus is described based on functional units, a corresponding method may include a step performing the described functionality, even if such step is not explicitly described or illustrated in the figures. Further, it is understood that the features of the various example aspects described herein may be combined with each other, unless specifically noted otherwise.

The invention can solve the problem of lack of spatial diversity for repeated bits in a circular buffer. More specifically, this invention can map the repeated bits to the spatial layers (or antenna ports) in a cyclic way compared with its previous copy. The invention can be applied in both first transmission and retransmission.

Except for very small block lengths where block coding is preferred, low density parity check (LDPC) and polar codes are adopted for shared channel (SCH) and broadcast/con- trol channels (BCH/CCH), respectively, in fifth generation (5G) or so called new radio (NR) wireless networks. This scheme replaces turbo and tail biting convolutional codes (TBCC) pre viously used in long term evolution (LTE).

For polar and small block coding, the coded bits can be mapped to a single spatial layer and antenna port. For LDPC coding, however, the coded bits can be mapped to multiple spatial layers and antenna ports after rate matching, code block concatenation, scrambling and modulation. These processing steps are presented in Fig. 2 in relation to physical downlink shared channel (PDSCH) processing.

In coding 201, channel coding can be performed. Channel coding may also be referred to as forward error control coding. In channel coding 201, data may be mapped to new code words using an error correcting code, such as an LDPC code or a polar code. Coding 201 produces a bit sequence d₀, d , ... , d_N- of length N.

The bit sequence produced by the coding step 201 can be fed into a circular buffer

202. The length N_cb of the circular buffer 202 can be obtained from parameter computation

203. The circular buffer 202 can output a bit sequence d₀, d , ... , d_Ncb_ ₁ of length N_cb.

The output of the circular buffer 202 can be fed into bit selection 204. The bit selection 204 can produce a bit sequence e₀, b_L , ... , e_E® of length E, where E may be referred to as a rate matching output sequence length. E may be obtained from parameter computation 203. The combination of the circular buffer 202 and bit selection 204 may also be referred to as bit selection 208.

The output of bit selection 204 can be fed into bit interleaving 205. In bit inter leaving 205, bits from the bit selection 204 are written into a matrix column by column and read out row by row. Bit interleaving 205 produces a bit sequence

—, f_E- i of length E. The combination of circular buffer 202, bit selection 204, and bit interleaving 205 may be re ferred to as rate matching 207. Furthermore, coding 201 and rate matching 207 can be per formed for each code block 206.

After coding 201 and rate matching 207, the code blocks 206 can be concatenated in code block concatenation 209. The number of code blocks fed into the code block concate nation 209 may be referred to as C. The code block concatenation 209 produces a bit sequence 3o_> 3i_> 3_G—_I of length G.

In scrambling 210, the output from the code concatenation 209 can be scrambled, producing a bit sequence b^(q) (0), ... , b^(q) — l of length .

In modulation 211, the scrambled bit sequence can be modulated into one or more complex- valued sequences

... , d^(q) {M^_mb— l) of length M^_mb. The modulation may comprise, for example, quadrature amplitude modulation (QAM). Each such sequence may be referred to as a code word, and q = 0, 1, 2, ... refers to the code word index. The afore mentioned processing steps may be performed independently for each code word.

The code words can be fed into layer mapping 212. The layer mapping 212 maps the complex symbols comprised in the code words into a plurality of layers. Output of the layer mapping 212 may be represented as a vector x(i) = [x⁽⁰⁾ (t) ... ^^{v_1 )} (/)] , where the v ele ments of the vector x(i) correspond to the layers.

In antenna port mapping 213, the complex symbols of each layer can be mapped to antenna ports. Antenna port mapping 213 produces a vector y(i) =

[ ^(p°⁾ ( ... ⁽Pv-

complex symbols. The number of antenna ports may not be equal to the number of layers.

An antenna port may not correspond to a physical antenna. An antenna port can be defined such that the channel over which a symbol on the antenna port is conveyed can be inferred from the channel over which another symbol on the same antenna port is conveyed. There can be one resource grid per antenna port. The antenna ports used for transmission of a physical channel or signal can depend on the number of antenna ports configured for the phys ical channel or signal. Each antenna port can represent a specific channel model.

A processing chain substantially similar to that presented in Fig. 2 for PDSCH may also be used to describe the functionality of physical uplink shared channel, PUSCH. The invention may be applied to both downlink and uplink communication, such as PDSCH and PUSCH. Fig. 3 illustrates an example of bit mapping from the circular buffer 202 to antenna ports. Herein, the terms“layer” and“antenna port” may be used interchangeably. A layer may also be referred to as a spatial layer. Fig. 3 illustrates a problem with lack of spatial diversity for repeated bits in the circular buffer 202, because repeated bits may be mapped into the same layer as the original copy of the bit.

For example, as illustrated in Fig. 3, the first bit 302 in the circular buffer 202 is mapped into the first antenna port 103 1. When the end of the circular buffer 202 is reached, the filling of the bit interleaver 205 is continued again from the beginning of the circular buffer 202. Thus, as the number of bits in a transmission can be higher than the number of bits avail able in the circular buffer 202, a copy 302’ of the first bit 302 may also be added to the bit interleaver 205. As can be seen from Fig. 3, this copy 302’ may also be mapped to the same first antenna port 103 1. Thus, the first bit 302 and the copy 302’ o f the first bit may be mapped to the same antenna port. Similarly, the second bit 303 in the circular buffer 202 and a copy 303’ of the second bit can be mapped to the second antenna port 103 2. The first bit 302 and second bit 303 are only examples, and the same issue may apply to other, or even all, bits in the circular buffer 202. Thus, spatial diversity is not utilized for the repeated bits 302’, 303’. Similar issue may exist in both first or initial transmission and retransmission(s).

A problem of the existing solutions is possible performance loss for bits repeated in the circular buffer due to lack of spatial diversity. This may be the case e.g. for low modula tion and coding schemes (MCSs). For example, repetition may happen in MCS 0,1,2,4,10 in case of highest modulation of 64QAM and in MCS 0,1,2 in case of highest modulation of 256QAM according to NR release 15.

Fig. 4 illustrates an example of bit mapping from the circular buffer 202 to antenna ports in retransmission(s). Two cases are illustrated in Fig. 4 with different effective code block lengths N^_b ^ULL = N_cb— count NULL), rate matching output sequence lengths E, and starting positions of retransmission k₀. Here, N_cb is the circular buffer length, NULL indicates dummy filler bits which will not be transmitted, and count(*) is a function that counts the number of NULL bits in the circular buffer 202. It should be noted that small values of N_cb and E have been assumed in the examples for simplicity, while practical values may be significantly greater.

In the first example, in the upper part of Fig. 4, N^_b ^ULL = 24 ,E = 24. In the first transmission 401, the circular buffer 401 is read starting from the 0^th bit (i.e. k₀ = 0). The first transmission may also be referred to as RYO, wherein RV stands for redundancy version. Since N_C ^LL = E = 24, all bits from the circular buffer are read to the bit interleaver 205. From the bit interleaver 205, every alternate bit is mapped to the first layer 103 1 and the other bits are mapped to the second antenna port 103 2. In the retransmission 402, also referred to as RV1, reading the circular buffer 202 is started from the 6^th bit, since k₀ = 6. As can be seen from Fig. 4, the bits are mapped similarly in the retransmission 402 as in the first transmission 401. Thus, spatial diversity is not utilized for the retransmission 402.

In the second example in the lower part of Fig. 4, N^_b ^ULL = 32, E = 24, k₀ = 0 and k₀ = 7 in the first and second transmission respectively. In this example, contrary to the example above, the retransmitted bits are mapped to a different layer from their first transmis sion. For example, bits 8, 10, and 12 are mapped to the first antenna port 103 1 in the first transmission 401, while in the second transmission these bits are mapped to the second antenna port 103 2. Considering the time correlation of channels, a design which may map retransmit ted bits to a different layer than the first transmission may be desirable.

It is noted that the concatenated bits or quadrature amplitude modulation (QAM) symbols can be mapped firstly on spatial layer (up to 4 layers) and then frequency and time resources. Thus, compared to the original copy, the repeated bits (when E > N_cb— count NULL) ) may be mapped into the same layer/antenna port if ( N_cb— count

mod N_L = 0, where mod is the modulo operation. However, from diversity perspective, it may be preferable to map repeated bits into a different layer than the original bit.

In the following, example embodiments of a network device 100 are described based on Fig. 1. Some of the features of the described device are optional features which provide further advantages. Furthermore, functionalities of the network device 100 for wireless com munication according to embodiments of the invention will be described later in more detail in the following descriptions of Fig. 3 to Fig. 14.

Fig. 1 is a block diagram that illustrates the network device 100. According to an embodiment, the network device 100 comprises at least one processor or a processing unit 101 and optionally a memory 102 coupled to the at least one processor 101, which may be used to implement the functionalities described later in more detail. The network device 100 may also comprise antenna ports 103 coupled to the at least one processor 101.

According to an embodiment, the at least one processor 101 is configured to: determine a number of non-NULL bits, D' , in a circular buffer and determine a number of an tenna ports, N_l, available for physical shared channel transport of wireless data transfer. The at least one processor 101 is further configured to determine if a preconfigured condition is satis fied by a relation, wherein the relation comprises at least the N_L and the D', and wherein if the preconfigured condition is satisfied, a repeated bit in the circular buffer is mapped to a different antenna port than a corresponding original bit in the circular buffer. The at least one processor 101 is further configured to in response to the preconfigured condition not being satisfied, per form at least one of: modify the circular buffer so that the preconfigured condition is satisfied; and read bits from the circular buffer, and modify the read bits so that the preconfigured condi tion is satisfied for the read bits.

The at least one processor 101 may comprise, for example, one or more of various processing devices, such as a co-processor, a microprocessor, a controller, a digital signal pro cessor (DSP), a processing circuitry with or without an accompanying DSP, or various other processing devices including integrated circuits such as, for example, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a microcontroller unit (MCU), a hardware accelerator, a special-purpose computer chip, or the like.

The memory 102 may be configured to store, for example, computer programs and the like. The circular buffer may be implemented in the memory 102. The memory 102 may include one or more volatile memory devices, one or more non-volatile memory devices, and/or a combination of one or more volatile memory devices and non-volatile memory devices. For example, the memory may be embodied as magnetic storage devices (such as hard disk drives, floppy disks, magnetic tapes, etc.), optical magnetic storage devices, and semiconductor memories (such as mask ROM, PROM (programmable ROM), EPROM (erasable PROM), flash ROM, RAM (random access memory), etc.).

The network device 100 may be configured to communicate signals between the antenna ports 103 and at least one antenna port of a second network device. The second network device may be, for example, a client device, if the network device 100 is a base station, or vice versa.

As a person skilled in the art can appreciate, when the network device 100 is con figured to implement some functionality, some component and/or components of the network device 100, such as the at least one processor 101 and/or the memory 102, may be configured to implement this functionality. Furthermore, when the at least one processor 101 is configured to implement some functionality, this functionality may be implemented using program code comprised, for example, in the memory 102.

The base station may include e.g. a macro-eNodeB, a pico-eNodeB, a home eNodeB, a fifth-generation base station (gNB) or any such device providing an air interface for client devices to connect to the wireless network via wireless transmissions. The client device may be any of various types of devices used directly by an end user entity and capable of com munication in a wireless network, such as user equipment (UE). Such devices include but are not limited to smartphones, tablet computers, smart watches, lap top computers, Intemet-of- Things (IoT) devices etc.

According to an embodiment, the at least one processor 101 may be further con figured: perform the modifying the read bits by performing at least one of: puncturing at least one bit in the circular buffer; and repeating at least one bit in the read bits.

According to another embodiment, the at least one processor 101 is further con figured to puncture the at least one bit at a preconfigured location in the read bits.

According to another embodiment, the at least one processor 101 is further con figured to repeat the at least one bit at a first preconfigured location in the read bits to a second preconfigured location in the read bits.

According to another embodiment, the at least one processor 101 is further con figured to perform the modifying the circular buffer by modifying a length of the circular buffer.

According to another embodiment, the at least one processor 101 is further con figured to perform the modifying the circular buffer by puncturing at least one bit in the circular buffer.

In the bit selection block 204, the network device 100 may first count the number of non-NULL bits D' = N^_b ^ULL = N_cb— count (NULL) in the circular buffer and then check if D' mod N_L satisfies a condition. It should be noted that D' > N_L may be guaranteed according in NR. Puncturing or repetition can be performed, if the condition is not satisfied. Different conditions may be used and different bit patterns may be punctured and/or repeated.

In an embodiment, the condition may be

D' mod N_L = T,

where T = 1,2, ... , N_L— 1 is a preconfigured value. If the condition is not satisfied, the network device 100 may puncture X (X < N_L, e.g. X = ( D '— T ) mod N_L) bits with predefined indices (e.g. at head, tail or others), or repeat X (X < N_L, e.g. X = (N_L— D' mod N_L + T ) mod N_L) bits with predefined indices (e.g. head, tail or others) to another places with predefined indices (e.g. head, tail or others). More specifically, puncture (a), repetition (b) or both (c) can be ap plied to any bits indices, i.e.:

a. Puncture X bits at tail, head or other locations

b. Repeat X bits at tail, head or other locations to tail, head or other locations i. For example, repeat X bits at head of circular buffer to the tail of the buffer

c. Dynamically choose (a) if X_a < X_b, otherwise (b), where X_a and X_b are X values computed in a and b respectively

Fig. 5 illustrates a flow diagram according to an embodiment. In this embodiment, T = 1 for the condition and the network device 100 punctures the tail.

In step 501, variables j and k are set to zero. In step 502, the value of j is com pared to N_cb. If j < N_cb, the procedure moves to step 503. In step 503, if d_{(kf +j) mod Ncb} ¹< NULL > , the procedure moves to step 504. In other words, step 503 checks if the current bit, at the index indicated by j, in the circular buffer is NULL. If the bit is NULL, the procedure moves to step 506. In step 504, kth bit in a second buffer d' is set to be equal to d_{(kf +j) mod N} . Thus, bit at the index (/c₀ + j) mod N_cb in the circular buffer d is copied to the kth bit in the second buffer d'. In step 505, the value of k is incremented by one, and in step 506, the value of j is incremented by one. After step 506, the procedure moves to step 502.

The steps 502 - 506 are repeated until the whole circular buffer d has been in dexed, i.e. when j = N_cb. The steps 502 - 506, cause non-NULL bits copied from the circular buffer to the second buffer d'.

When j ³ N_cb in step 502, the procedure moves to step 507. In step 507, D' is assigned to be equal to k, and in step 508, k is assigned to zero. Thus, D' is equal to the number of non-NULL bits in the circular buffer, which is also the length of the second buffer d'.

In step 509, k is compared to (D'— 1) mod N_L . If k < (D'— 1) mod N_L , the procedure moves to step 510. In step 510, bit at the index D'— 1— k is punctured from d' . In step 511 , k is incremented by one. From step 511 , the procedure moves to step 509. Thus, steps 509 - 511 puncture bits from the tail of d' until k = (J)'— 1) mod N_L.

It should be appreciated that in the flow diagram 500 or in any flow diagram pre sented in herein, the procedure may end or terminate at any decision step, if the condition indi cated in the decision step is not satisfied and no further step is indicated for such a case. For example in Fig. 5, if the condition is not satisfied in step 509, the procedure may end, since the flow diagram 500 does not indicate a next step for such a case.

A similar effect to the condition presented above can be achieved via two different conditions T and T' with T + T' = N_L. This may allow a more relaxed version of the condition presented above in order to puncture or repeat less bits. In an embodiment, the condition may be

D' mod N_L = T or D' mod N_L = N_L— T,

where T = 1,2, ... , [N_L/2\— 1 is a predefined value. |xj is the floor function. The or operator may be a non-exclusive or. This condition comprises two conditions combined with the or op erator. The conditions comprised in the condition may be referred to as subconditions. The condition is satisfied, if the first subcondition, the second subcondition, or both subconditions are satisfied.

If the condition is not satisfied, the network device 100 may puncture X (X < N_l, e.g. X = min((D'— T)mod N_L, ( D ' + T ) mod iV_L)) bits with preconfigured indices (e.g. at head, tail or others), or repeat X ( X < N_L , e.g. X =

D' mod N_L + T ) mod N_l, (2 N_L— D ' mod N_L— T ) mod N_L)) bits with preconfigured indices (e.g. head, tail or others) to another places with preconfigured indices (e.g. head, tail or others). Puncture, rep etition or both can be applied to any bit indices.

According to an embodiment, the preconfigured condition comprises at least one of: D' mod N_L = T, where T is an integer between 1 and N_L— 1; D' mod N_L = N_L— T, where T is an integer between 1 and N_L— 1; and D'mod N_L ¹ 0. The condition may comprise one or more subconditions of the form D' mod N_L = T, wherein the value of T may be different for each subconditions.

Fig. 6 illustrates a flow diagram 600 for implementing a condition comprising two subconditions according an embodiment with T = 1 and puncture at the tail. Similarly to the embodiment of Fig. 5, in steps 501 - 506, non-NULL bits of the circular buffer are copied to the second buffer d'. The discussion above in relation to steps 507, 508, 510, and 511 also applies to this embodiment. However, the step 601 is different from the corresponding step 509 in the previous embodiment. In step 601, the condition

modd NL

moA N_L)

is checked min chooses the smaller of the two quantities comprised in the brackets. If the con dition is satisfied, the procedure moves to step 510.

In addition to the conditions presented in the embodiments above, the condition may comprise more subconditions. For example, a condition may be formulated as:

D' mod N_L = T or

D' mod N_L = T₂ or

D' mod N_L = T₃ ·, where T_lt T₂, T₃ ··· £ {1,2, ... , /V_L— 1} and T₁ ¹ T₂ ¹ T₃ ···. A condition may comprise any number of such subconditions. Furthermore, any conditions may be used as a subconditions, and new conditions may be formulated by combining such subconditions. The subconditions may be combined using logical operators, such as and, or, and xor. Corresponding puncture and/or repetition may also performed accordingly to satisfy these conditions. Puncture, repeti tion, or both can be applied to any bits indices.

In an embodiment, the condition may be

D' mod N_L ¹ 0.

If the condition is not satisfied, the network device 100 may puncture X (X < N_L, e.g. X = 1) bits with preconfigured indices (e.g. at head, tail or others), or repeat s (X < N_L, e.g. X = 1) bits with preconfigured indices (e.g. head, tail or others) to another places with preconfigured indices (e.g. head, tail or others).

Fig. 7 illustrates a flow diagram 700 for implementing the condition presented above with T = 1 and puncture at the tail. Similarly to the embodiments of Fig. 5 and Fig. 6, in steps 501 - 506, non-NULL bits of the circular buffer are copied to the second buffer d' . The discussion above about steps 507, 508, 510, and 511 also applies to this embodiment. However, the step 701 is different from the corresponding steps 509 and 601 in the previous embodiments. In this embodiment, the condition D' mod N_L = 0 in step 701 is checked only once. If the con ditions is satisfied, a single bit is punctured from d' at step 702. It should be noted that only one punctured or repeated bit may be needed.

A procedure similar to that presented in Fig. 7 can be implemented, for example, using the following pseudocode:

k = 0; ; = 0;

while k < E

k = k + 1

end if

j = 7 + 1

end while

where d' is a bit sequence comprising non-NULL bits of d, and N^_b ^ULL is the length of d'. Alternatively, a similar objective can be achieved by determining the parameter N_cb instead of dynamic puncturing and/or repetition in bit selection. N_cb may be determined by two parameters N and N_ref according to

_N _ ( ILBRM ⁼ 0

c^b— (min

otherwise'

where I_LBRM indicates, if limited-buffer rate matching (LBRM) is enabled. A further check and modification of N_cb can be performed according to the conditions presented above.

Fig. 8 illustrates a flow diagram 800 for determining the parameter N_cb accord ing to an embodiment. This embodiment may be similar to the embodiment of Fig. 5. Steps 501 - 507 in the embodiment of Fig. 8 are similar to those in the embodiment of Fig. 5. In step 801, both j and k are assigned to zero. In step 509, a similar condition is checked as in the embodi ment of Fig. 5. If the condition is satisfied, the procedure moves to step 802. In operation 802, if bit at index D— 1— j of the circular buffer is NULL, the procedure moves to step 803. D = N'_cb is the length of buffer d. Otherwise, the procedure moves to step 511. In step 511, k is incremented by one. In step 803, j is incremented by one and N_cb is decremented by one.

A similar procedure may be implemented by the following pseudocode:

k = N'_cb - 1;

while d_k ==< NULL >

k = k— 1

end while

N_cb = k

end if

where N'_cb = N^_b ^ULL + N^_b ^ULL, N^_b ^ULL is the number of NULL bits and N^_b ^ULL is number of non-NULL bits.

The network device 100 may implement a N_L dependent starting position k₀ as shown in the table below, where [*] is a predefined floor, ceiling or rounding operation, and N_C ^LL is the number of non-NULL bits in the circular buffer (e.g. N^_b ^LL = N_cb— count NULL)). Real numbers s₁ ¹ s₂ ¹ s₃ ... satisfying

0 < s₍ < 1} are parameters that define a nominal position of different redundancy versions (RVs) r v₀, rv₁, rv₂ ... respec tively. N_L is the number of layers adopted for each code word in corresponding transmission, and predefined integers o₁ = o₂ = o₃ ... = o₀ or o₁ ¹ o₂ ¹ o₃ ... ¹ o₀ E {1,2, ... N_L— 1} are N_L dependent offset values. Starting position of different redundancy versions

For example, with 4 redundancy versions (rv_id), the starting position of different redundancy versions may be assigned according to the table below.

Starting position of different redundancy versions with N_L = 4

For example, with 2 redundancy versions (rv_id), the starting position of different redundancy versions may be assigned according to the table below.

Starting position of different redundancy versions with N_L = 2

Fig. 9 illustrates an example 900 of bit mapping from the circular buffer 202 to antenna ports according to an embodiment. As can be seen in Fig. 9, due to the invention, re peated bits can be mapped to a different layer from the original copy. For example, the first bit 302 is mapped to the first antenna port 103 1, and the corresponding repeated bit 302’ is mapped to the second antenna port 103 2. A similar observation can be done about the second bit 303 and the corresponding copy 303’ . These bits are only examples, and similar observations can be done also for other bits in the circular buffer 202.

It should be appreciated that although the invention may be illustrated in some figures for a certain number of antenna ports 103, the invention may be applicable for any number of antenna ports 103.

Fig. 10 illustrates simulated performance in a 2x2 spatial channel in a situation where the signal-to-interference-plus-noise ratio (SINR) of one of the spatial layers is very weak. Similar SINR mismatch can exist in cases of spatially selective interference or channel blockage. In this case, for each code block, there are 8448 bits transmitted over 2 layers with a circular buffer length of 5200 (40 NULL bits), so there are 8448— (5200— 40) = 3288 bits repeated. As can be seen from Fig. 10, the invention, represented by curve 1001, can achieve signal-to -noise ratio (SNR) improvements compared to the baseline, represented by curve 1002.

When more bits are transmitted than the length of the circular buffer, further con siderations may be needed in order to utilize spatial diversity.

Fig. 11 illustrates an example 1100 of bit mapping from the circular buffer 202 to antenna ports in first transmission 401 and retransmission 402. In this example, 16QAM and 2 layers are assumed, N^_b ^ULL = 23, E = 24, k ⁰ = 0, and k ^vl = 7. It should be noted that simple and impractical N^_b ^ULL and E are used in this example for clarity purposes. In this ex ample, two redundancy versions (RV) are used. In RV0, also referred to as first transmission 401, the whole content of the circular buffer is transmitted, since E > N^_b ^ULL. In RV1, also re ferred to as retransmission 402, the transmission is started at the 7^th bit. As can be seen from Fig. 11 , in the retransmission 402, bits 7 to 22 are transmitted via different layer than in the first transmission 401 due to following the condition presented in the embodiments above.

However, bits 0 to 7 are transmitted via the same layer in the retransmission 402 as in the first transmission 401. The bits 0 to 7 may be referred to as additional bits 1 101. The additional bits 1101 are added to the bit interleaver 205, when in the retransmission 402 the end of the circular buffer 202 is reached, and reading of the circular buffer 202 is started again from the beginning.

To ensure spatial diversity in cases similar to the example of Fig. 11, the network device 100 may puncture or repeat a small part of bits in the circular buffer depending on the relationship among E, N^_b ^ULL and N_L. The conditions are listed below for to determining if puncturing or repetition is required or not. According to an embodiment, the at least one processor 101 is further configured to: determine a starting position k₀ in the circular buffer, wherein the k₀ is dependent on the

N_L.

According to an embodiment, the at least one processor 101 is further configured to: determine a rate matching output length E and wherein the relation further comprises the k₀ and the E. In some embodiments, k₀ comprises a bit index in the circular buffer. The net work device 100 may be configured to start the retransmission from a bit indicated by k₀. NULL bits may be ignored or included when calculating k₀. Thus, k₀ may indicate a bit index with respect to non-NULL bits or with respect to all bits in the circular buffer 202.

According to an embodiment, the at least one processor 101 is further configured to: determine a preconfigured value T_rv; and determine the k₀ according to k₀ mod N_L = T_rv. In some embodiments, the at least one processor 101 is further configured to: determine the preconfigured value T_rv for each redundancy version, RV. In some embodiment, the at least one processor 101 may be configured to assign T_rv = 0.

In some embodiments, the at least one processor 101 may be configured to com pare the rate matching output sequence length E and the circular buffer length N^_b ^ULL . The con dition may be, for example,

k_Q + E— N_c ^N _b ^ULL > T_l

where T is an integer threshold. k₀ + E— N^_b ^ULL may indicate how many additional bits are transmitted.“Additional bits” may refer to bits that are retransmitted when reading of the cir cular buffer is started again from the beginning after reaching the end of the circular buffer.

In some embodiments, the at least one processor 101 may be configured to com pute a ratio comprising the rate matching output sequence length E and the circular buffer length N^_b ^ULL . The condition may be, for example,

k₀ + E - N, NULL

cb

> T₂,

E

where T₂ is a real value threshold.

In some embodiments, the at least one processor 101 may be configured to check if the additional transmitted bits are mapped to a preferred layer. The condition may be, for example,

N_c ^N _b ^ULL mod N_L ¹ T₃, or

N_c ^N _b ^ULL mod N_L ¹ T₄, or

mod N_L ¹ T_5> ... where T₃ ¹ T₄ ¹ T₅ ... £ {0,1,2, ... N_L— 1). A single condition (e.g. T₃) or multiple subcondi tions (e.g. T₃, T₄, T₅, ... ) can be applied.

According to an embodiment, the preconfigured condition comprises at least one of: k₀ + E— D' is greater than a preconfigured integer threshold; and ( [k₀ + E— D')/E is greater than a preconfigured real value threshold.

If the condition is not satisfied, the network device 100 may puncture X (X < N_L) bits with predefined indices (e.g. tail of circular buffer without NULL), or repeat X (X < N_L ) bits with predefined indices (e.g. head, tail or others of circular buffer without NULL) to another places with predefined indices (e.g. tail of circular buffer without NULL). More specifically, puncture (a), repetition (b) or both (c) can be applied, e.g.:

a. Puncture X bits at tail of circular buffer without NULL

b. Repeat X bits at tail, head or other locations to tail of circular buffer without

NULL

c. Dynamically choose (a) if X_a < X_b, otherwise (b), where X_a and X_b are X value computed in a and b respectively

Fig. 12 illustrates a flow diagram 1200 for implementing two conditions k₀ + E—

mod N_L ¹ 0.

In step 501, variables j and k are set to zero. In step 502, the value of j is com pared to N_cb. If j < N_cb, the procedure moves to step 503. In step 503, if d_{(kf +j) mod Ncb} ¹< NULL > , the procedure moves to step 1201. From step 1201, the procedure moves to step 1202, if the yth bit in the circular buffer is non-NULL. Otherwise, the procedure moves to step 506. In step 1202, the yth bit of the circular buffer is copied to kt bit in second buffer d'. In step 505, k is incremented by one, and in step 506, y is incremented by one. After step 506, the procedure moves to step 502. Thus, the steps 502 - 506 are repeated until j = N_cb . At this point, all non-NULL bits have been copied from the circular buffer d to the second buffer d' .

In operation 1203, since k is equal to the number of non-NULL bits in the circular buffer, this quantity is saved to variable N^_b ^ULL, and k is set to be equal to zero. In step 1204, the values of k₀, E, N^N _c ^LL, and T are compared. If k₀ + E— N^_b ^ULL > T, the procedure moves to step 1205. As a person skilled in the art can appreciate, this condition may be expressed in various equivalent forms. From step 1205, the procedure moves to step 1206, if N_c ^N _b ^ULL mod N_L ¹ 0. In step 1206, a bit is punctured from d' at index N^_b ^LL— 1— k. In step 1207, N_c ^N _b ^ULL is decremented by one. In step 1208, k is incremented by one. From step 1208, the procedure moves to step 1205. According to an embodiment, the starting position k_Q in first transmission (RVO) and retransmissions may be determined, for example, using the following table.

Starting position of different redundancy versions

In some embodiments, several bits may be punctured at the tail of the circular buffer to meet a predefined condition between N^_b ^ULL and N_L. This may be implemented, for example, using the following pseudocode:

k = 0; while k < E

mod ([N^/N_L\N_l)’ k = k + 1 end while where d! is a bit sequence comprising non-NULL bits of d, and N^_b ^ULL is the length of d! .

Fig. 13 illustrates bit mapping from the circular buffer 202 to antenna ports 103 according to an embodiment. In this embodiment, 16QAM and 2 layers are used, N_cb = 23, E = 24, k*^vo = 0 and k ¹ = 7. It should be noted that these N_cb and E values are used in this example for clear illustration and these values may not be useful in practical situations.

As can be seen from FIG. 13, in retransmission 402, all bits are transmitted via a different layer 103 than in the first transmission 401. This also applies to the additional bits 1101 that were mapped to the same layer 103 in the example of FIG. 11, where the invention was not used. It should be noted that bit 22 is punctured in retransmission 402. Fig. 14 shows a diagram 1400 of an example method according to an embodiment.

The method 1400 comprises determining a number of non-NULL bits, D', in a circular buffer, step 1401.

The method 1400 further comprises determining a number of antenna ports, N_L, available for physical shared channel transport of wireless data transfer, step 1402.

The method 1400 further comprises determining if a preconfigured condition is satisfied by a relation, wherein the relation comprises at least the N_L and the D' , and wherein if the preconfigured condition is satisfied, a repeated bit in the circular buffer is mapped to a different antenna port than a corresponding original bit in the circular buffer, step 1403.

The method 1400 further comprises in response to the preconfigured condition not being satisfied, performing at least one of: modifying the circular buffer so that the precon figured condition is satisfied; and reading bits from the circular buffer, and modifying the read bits so that the preconfigured condition is satisfied for the read bits, step 1404.

The method 1400 can be performed by the network device 100. The steps 1401, 1402, 1403, and 1404 can, for example, be performed by the at least one processor 101 and the memory 102. Further features of the method 1400 directly result from the functionality of the network device 100. The method 1400 can be performed by a computer program product.

The functionality described herein can be performed, at least in part, by one or more computer program product components such as software components. According to an embodiment, the network device 100 comprise at least one processor configured by the program code when executed to execute the embodiments of the operations and functionality described. Alternatively, or in addition, the functionality described herein can be performed, at least in part, by one or more hardware logic components. For example, and without limitation, illustra tive types of hardware logic components that can be used include Field-programmable Gate Arrays (FPGAs), Program-specific Integrated Circuits (ASICs), Program-specific Standard Products (ASSPs), System-on-a-chip systems (SOCs), Complex Programmable Logic Devices (CPLDs), and Graphics Processing Units (GPUs).

Any range or device value given herein may be extended or altered without losing the effect sought. Also any embodiment may be combined with another embodiment unless explicitly disallowed.

Although the subject matter has been described in language specific to structural features and/or acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as examples of implementing the claims and other equivalent features and acts are intended to be within the scope of the claims.

It will be understood that the benefits and advantages described above may relate to one embodiment or may relate to several embodiments. The embodiments are not limited to those that solve any or all of the stated problems or those that have any or all of the stated benefits and advantages. It will further be understood that reference to 'an' item may refer to one or more of those items.

The steps of the methods described herein may be carried out in any suitable order, or simultaneously where appropriate. Additionally, individual blocks may be deleted from any of the methods without departing from the spirit and scope of the subject matter described herein. Aspects of any of the embodiments described above may be combined with aspects of any of the other embodiments described to form further embodiments without losing the effect sought.

The term 'comprising' is used herein to mean including the method, blocks or el- ements identified, but that such blocks or elements do not comprise an exclusive list and a method or apparatus may contain additional blocks or elements.

It will be understood that the above description is given by way of example only and that various modifications may be made by those skilled in the art. The above specification, examples and data provide a complete description of the structure and use of exemplary em- bodiments. Although various embodiments have been described above with a certain degree of particularity, or with reference to one or more individual embodiments, those skilled in the art could make numerous alterations to the disclosed embodiments without departing from the spirit or scope of this specification.

Claims

CLAIMS:

1. A network device (100) comprising at least one processor (101) configured to: determine a number of non-NULL bits, D', in a circular buffer (202);

determine a number of antenna ports (103), N_L, available for physical shared channel transport of wireless data transfer;

determine if a preconfigured condition is satisfied by a relation, wherein the relation comprises at least the N_L and the D' , and wherein if the preconfigured condition is satisfied, a repeated bit in the circular buffer (202) is mapped to a different antenna port (103) than a cor responding original bit in the circular buffer (202); and

in response to the preconfigured condition not being satisfied, perform at least one of: modify the circular buffer (202) so that the preconfigured condition is satisfied; and

read bits from the circular buffer, and modify the read bits so that the preconfig ured condition is satisfied for the read bits.

2. The network device (100) according to claim 1, wherein the at least one processor (101) is further configured to:

perform the modifying the read bits by performing at least one of:

puncturing at least one bit in the circular buffer; and

repeating at least one bit in the read bits.

3. The network device (100) according claim 2, wherein the at least one processor (101) is further configured to:

puncture the at least one bit at a preconfigured location in the read bits.

4. The network device (100) according to claim 2, wherein the at least one processor (101) is further configured to:

repeat the at least one bit at a first preconfigured location in the read bits to a second preconfigured location in the read bits.

5. The network device (100) according to any preceding claim, wherein the at least one processor (101) is further configured to:

perform the modifying the circular buffer by modifying a length of the circular buffer.

6. The network device (100) according to claim 5, wherein the at least one processor (101) is further configured to:

perform the modifying the circular buffer by puncturing at least one bit in the circular buffer.

7. The network device (100) according to any preceding claim, wherein the preconfig ured condition comprises at least one of:

D' mod N_L = T, where T is an integer between 1 and N_L— 1;

D' mod N_L = N_L— T, where T is an integer between 1 and N_L— 1; and

D'mod N_L ¹ 0.

8. The network device (100) according to any preceding claim, wherein the at least one processor (101) is further configured to:

determine a starting position k₀ in the circular buffer, wherein the k₀ is dependent on the N_l; and

determine a rate matching output length E

and wherein the relation further comprises the k₀ and the E.

9. The network device (100) according to claim 8, wherein the k₀ comprises a bit index in the circular buffer.

10. The network device (100) according to claim 8 or 9, wherein the at least one pro cessor (101) is further configured to: determine a preconfigured value T_rv and

determine the k₀ according to k₀ mod N_L = T_rv.

11. The network device (100) according to claim 10, wherein the at least one processor (101) is further configured to:

determine the preconfigured value T_rv for each redundancy version, RV.

12. The network device (100) according to claim 10 or 11, wherein the at least one processor (101) is further configured to:

assign T_rv = 0.

13. The network device (100) according to any claim 8 to 11, wherein the preconfigured condition comprises at least one of:

k₀ + E— D' is greater than a preconfigured integer threshold; and

k₀ + E— D')/E is greater than a preconfigured real value threshold.

14. A method (1400), comprising: determining (1401) a number of non-NULL bits, D', in a circular buffer;

determining (1402) a number of antenna ports, N_L, available for physical shared channel transport of wireless data transfer; determining (1403) if a preconfigured condition is satisfied by a relation, wherein the relation comprises at least the N_L and the D' , and wherein if the preconfigured condition is sat isfied, a repeated bit in the circular buffer is mapped to a different antenna port than a corre sponding original bit in the circular buffer; and

in response to the preconfigured condition not being satisfied, performing ( 1404) at least one of:

modifying the circular buffer so that the preconfigured condition is satisfied; and reading bits from the circular buffer, and modifying the read bits so that the preconfig ured condition is satisfied for the read bits.

15. A computer program product comprising program code configured to perform the method according to claim 14, when the computer program product is executed on a computer.