WO2020113780A1 - Gate drive circuit based on temperature compensation and display device - Google Patents
Gate drive circuit based on temperature compensation and display device Download PDFInfo
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- WO2020113780A1 WO2020113780A1 PCT/CN2019/071761 CN2019071761W WO2020113780A1 WO 2020113780 A1 WO2020113780 A1 WO 2020113780A1 CN 2019071761 W CN2019071761 W CN 2019071761W WO 2020113780 A1 WO2020113780 A1 WO 2020113780A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/041—Temperature compensation
Definitions
- the present application relates to the display field, and in particular to a gate drive circuit and a display based on temperature compensation.
- GOA Gate Driver Array
- Chinese full name integrated gate drive circuit
- the on-state current of the thin film transistor will decrease significantly as the temperature decreases, resulting in the GOA drive circuit not working properly.
- temperature compensation is currently used.
- the resistance of the thermal unit increases, and the power chip uses this to increase the gate drive voltage, which increases the on-state current.
- the use of thermal units will increase the cost.
- the purpose of the present application is to provide a gate drive circuit and a liquid crystal display based on temperature compensation, which has the beneficial effect of reducing costs.
- the present application provides a gate drive circuit based on temperature compensation, which is applied to a display panel, and includes: a DC voltage source, a voltage dividing unit, an amorphous silicon thin film transistor, a power management module, and a gate drive module;
- One end of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, the drain of the amorphous silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, and the amorphous silicon thin film transistor Is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, the power management module is connected to the voltage dividing unit and the amorphous silicon The common node of the thin film transistor is connected, and the power management module is connected to the gate drive module;
- the power management module adjusts the voltage value output to the gate driving module according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel;
- the positive electrode of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor ,
- the negative electrode of the DC voltage source is connected to the voltage dividing unit and grounded.
- the voltage dividing unit is a voltage dividing resistor.
- the voltage dividing unit is a voltage dividing transistor.
- the amorphous silicon thin film transistor is an NMOS tube.
- the power management module includes a temperature compensation unit, a digital-to-analog conversion unit, a comparator, and a logic control unit;
- the gate drive module includes a switch unit and Gate voltage output unit;
- the input terminal of the gate voltage output unit is connected to a preset voltage, and the output terminal of the gate voltage output unit is connected to the input terminal of the switch unit;
- the input terminal of the temperature compensation unit is connected to the common node of the voltage dividing unit and the amorphous silicon thin film transistor, and the output terminal of the temperature compensation unit is connected to the input terminal of the digital-to-analog conversion unit.
- the output end of the digital-to-analog conversion unit is connected to the comparison voltage end of the comparator, the output end of the comparator is connected to the logic control unit, and the logic control unit is connected to the control end of the switch unit.
- the output of the switch unit is grounded.
- the gate drive module includes an inductor, a diode, and a capacitor, one end of the inductor is connected to the preset voltage, and the other end of the inductor,
- the input terminal of the switch unit is connected to the anode of the diode, the cathode of the diode serves as the output port of the gate drive module, one end of the capacitor is connected to the cathode of the diode, and the other of the capacitor One end is grounded.
- the switching unit is an NMOS field effect transistor.
- the present application also provides a gate drive circuit based on temperature compensation, which is applied to a display panel and is characterized by including: a DC voltage source, a voltage dividing unit, an amorphous silicon thin film transistor, a power management module, and a gate drive Module
- One end of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, the drain of the amorphous silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, and the amorphous silicon thin film transistor Is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, the power management module is connected to the voltage dividing unit and the amorphous silicon The common node of the thin film transistor is connected, and the power management module is connected to the gate drive module;
- the power management module adjusts the voltage value output to the gate driving module according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel.
- the voltage dividing unit is a voltage dividing resistor.
- the voltage dividing unit is a voltage dividing transistor.
- the amorphous silicon thin film transistor is an NMOS tube.
- the positive electrode of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, and the negative electrode of the DC voltage source is connected to the voltage dividing unit And ground.
- the power management module includes a temperature compensation unit, a digital-to-analog conversion unit, a comparator, and a logic control unit;
- the gate drive module includes a switch unit and Gate voltage output unit;
- the input terminal of the gate voltage output unit is connected to a preset voltage, and the output terminal of the gate voltage output unit is connected to the input terminal of the switch unit;
- the input terminal of the temperature compensation unit is connected to the common node of the voltage dividing unit and the amorphous silicon thin film transistor, and the output terminal of the temperature compensation unit is connected to the input terminal of the digital-to-analog conversion unit.
- the output end of the digital-to-analog conversion unit is connected to the comparison voltage end of the comparator, the output end of the comparator is connected to the logic control unit, and the logic control unit is connected to the control end of the switch unit.
- the output of the switch unit is grounded.
- the gate drive module includes an inductor, a diode, and a capacitor, one end of the inductor is connected to the preset voltage, and the other end of the inductor,
- the input terminal of the switch unit is connected to the anode of the diode, the cathode of the diode serves as the output port of the gate drive module, one end of the capacitor is connected to the cathode of the diode, and the other of the capacitor One end is grounded.
- the switching unit is an NMOS field effect transistor.
- the present application also provides a display, which includes a gate drive circuit based on temperature compensation.
- the gate drive circuit based on temperature compensation is applied to a display panel and includes: a DC voltage source, a voltage dividing unit, and an amorphous Silicon thin film transistor, power management module and gate drive module;
- One end of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, the drain of the amorphous silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, and the amorphous silicon thin film transistor Is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, the power management module is connected to the voltage dividing unit and the amorphous silicon The common node of the thin film transistor is connected, and the power management module is connected to the gate drive module;
- the power management module adjusts the voltage value output to the gate driving module according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel.
- the voltage dividing unit is a voltage dividing resistor.
- the voltage dividing unit is a voltage dividing transistor.
- the gate drive circuit and the display based on temperature compensation adopt an amorphous silicon thin film transistor to induce temperature change, and use one end of a DC voltage source to connect to the drain of the amorphous silicon thin film transistor.
- the drain of the crystalline silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, the source of the amorphous silicon thin film transistor is connected to one end of the voltage dividing unit, and the other end of the voltage dividing unit is connected to the The other end of the DC voltage source is connected, the power management module is connected to the common node of the voltage dividing unit and the amorphous silicon thin film transistor, and the power management module is connected to the gate drive module;
- temperature compensation is achieved, which has the beneficial effect of reducing costs.
- FIG. 1 is a schematic structural diagram of a gate drive circuit based on temperature compensation in an embodiment of the present application.
- FIG. 2 is a schematic structural diagram of a power management module and a gate drive module in the gate drive circuit based on temperature compensation shown in FIG. 1.
- FIG. 3 is a schematic diagram of a circuit principle of a gate driving circuit based on temperature compensation in an embodiment of the present application.
- first and second are used for description purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated.
- features defined as “first” and “second” may explicitly or implicitly include one or more of the features.
- the meaning of “plurality” is two or more, unless otherwise specifically limited.
- FIG. 1 is a schematic structural diagram of a gate driving circuit based on temperature compensation in an embodiment of the present application.
- the gate drive circuit based on temperature compensation according to an embodiment of the present application is applied to a display panel and includes a DC voltage source 101, a voltage dividing unit 102, an amorphous silicon thin film transistor 103, a power management module 104, and Gate drive module 105.
- One end of the DC voltage source 101 is connected to the drain of the amorphous silicon thin film transistor 103, the drain of the amorphous silicon thin film transistor 103 is connected to the gate of the amorphous silicon thin film transistor 103, and the source of the amorphous silicon thin film transistor 103 It is connected to one end of the voltage dividing unit 102, the other end of the voltage dividing unit 102 is connected to the other end of the DC voltage source 101, the power management module 104 is connected to the common node of the voltage dividing unit 102 and the amorphous silicon thin film transistor 103, and the power management The module 104 is connected to the gate driving module 105; the power management module 104 adjusts the voltage value output to the gate driving module 105 according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel. Wherein, when the voltage of the common node decreases, the voltage output by the power management module to the gate driving module increases.
- the voltage dividing unit 102 may be a voltage dividing resistor.
- other common voltage dividing elements may also be used, such as a voltage dividing transistor.
- the amorphous silicon thin film transistor 103 is an NMOS tube.
- the anode of the DC voltage source 101 is connected to the drain of the amorphous silicon thin film transistor 103, and the cathode of the DC voltage source 101 is connected to the voltage dividing unit 102 and grounded.
- FIG. 2 is a schematic structural diagram of a power management module and a gate drive module in the gate drive circuit based on temperature compensation shown in FIG. 1.
- the power management module 104 includes a temperature compensation unit 1041, a digital-to-analog conversion unit 1042, a comparator 1043, and a logic control unit 1044;
- the gate drive module 105 includes a switching unit 1052 and a gate voltage output unit 1051.
- the input terminal of the gate voltage output unit 1051 is connected to the preset voltage AVdd, the output terminal of the gate voltage output unit 1051 is connected to the input terminal of the switching unit 1052; the input terminal of the temperature compensation unit 1041 is connected to the voltage dividing unit 102 and the non-voltage
- the common node of the crystalline silicon thin film transistor 103 is connected, the output terminal of the temperature compensation unit 1041 is connected to the input terminal of the digital-analog conversion unit 1042, and the output terminal of the digital-analog conversion unit 1042 is connected to the comparison voltage terminal of the comparator 1043,
- the output terminal is connected to the logic control unit 1044, the logic control unit 1044 is connected to the control terminal of the switch unit 1052, and the output terminal of the switch unit 1052 is grounded.
- the logic control unit 1044 can control the duty ratio of the switch unit 1052 to adjust the size of the gate driving voltage output by the gate voltage output unit 1051. When the temperature is low, the duty ratio is increased, and when the temperature is high, Reduce
- the comparison voltage terminal of the comparator 1043 is connected to the reference voltage.
- the gate voltage output unit 1051 includes an inductor L1, a diode D1, and a capacitor C1. One end of the inductor L1 is connected to a predetermined voltage AVdd, the other end of the inductor L1, the input terminal of the switching unit 1052, and the anode of the diode D1 are connected, and the diode D1 The negative electrode of is used as the output port of the gate voltage output unit 1052, one end of the capacitor C1 is connected to the negative electrode of the diode D1, and the other end of the capacitor C1 is grounded.
- the switching unit 1052 is an NMOS field effect transistor Q1.
- the comparator 1043 obtains the reference voltage from the output terminal of the gate voltage output unit 1051 through a voltage divider circuit.
- the voltage divider circuit includes a resistor R1 and a resistor R2, wherein one end of the resistor R1 and the output end of the gate voltage output unit 1051 are also That is, the cathode of the diode D1 is connected, the other end of the resistor R1 is connected to one end of the resistor R2, the other end of the resistor R2 is grounded, the comparison voltage end of the comparator 1043 is connected to the common node of the resistor R1 and the resistor R2 to obtain the reference voltage,
- the magnitude of the reference voltage can be controlled by controlling the resistance of the resistor R1 and the resistor R2.
- the gate drive circuit and the display based on temperature compensation adopt an amorphous silicon thin film transistor to sense the temperature change, and use one end of a DC voltage source to connect to the drain of the amorphous silicon thin film transistor. Is connected to the gate of the amorphous silicon thin film transistor, the source of the amorphous silicon thin film transistor is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, and the power management module is connected to The voltage divider unit and the common node of the amorphous silicon thin film transistor are connected, and the power management module is connected to the gate drive module; thereby achieving temperature compensation and having the beneficial effect of reducing costs.
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Abstract
A gate drive circuit based on temperature compensation and a display device, the gate drive circuit being used in a liquid crystal panel, and comprising: a direct current voltage source (101), a voltage division unit (102), an amorphous silicon thin film transistor (103), a power source management module (104), and a gate drive module (105); the power source management module (104) adjusts the voltage value outputted to the gate drive module (105) on the basis of the voltage change of a common node, thereby adjusting the gate drive voltage of the pixel units of the display panel.
Description
本申请涉及显示领域,具体涉及一种基于温度补偿的栅极驱动电路及显示器。The present application relates to the display field, and in particular to a gate drive circuit and a display based on temperature compensation.
随着薄膜晶体管性能的提升,GOA( 英文全称:Gate Driver on Array
,中文全称:集成栅极驱动电路) 驱动技术目前已经普遍应用于显示面板中。With the improvement of the performance of thin film transistors, GOA (English full name: Gate Driver Array
, Chinese full name: integrated gate drive circuit) Drive technology has been widely used in display panels.
然而,薄膜晶体管的开态电流会随着温度的降低而显著下降,导致GOA驱动电路无法正常工作。为了使GOA能在低温下正常工作,目前通常采用温度补偿的做法,随着外部温度的降低,热敏单元阻值增大,电源芯片以此来提高栅极驱动电压,使得开态电流升高,保证GOA驱动电路正常工作。但是采用热敏单元,会带来成本的增加。However, the on-state current of the thin film transistor will decrease significantly as the temperature decreases, resulting in the GOA drive circuit not working properly. In order to make GOA work normally at low temperature, temperature compensation is currently used. As the external temperature decreases, the resistance of the thermal unit increases, and the power chip uses this to increase the gate drive voltage, which increases the on-state current. , To ensure that the GOA drive circuit works normally. However, the use of thermal units will increase the cost.
因此,现有技术存在缺陷,急需改进。Therefore, the existing technology has defects and needs to be improved urgently.
本申请的目的是提供一种基于温度补偿的栅极驱动电路及液晶显示器,具有降低成本的有益效果。The purpose of the present application is to provide a gate drive circuit and a liquid crystal display based on temperature compensation, which has the beneficial effect of reducing costs.
本申请提供了一种基于温度补偿的栅极驱动电路,应用于显示面板中,其包括:直流电压源、分压单元、非晶硅薄膜晶体管、电源管理模组以及栅极驱动模组;The present application provides a gate drive circuit based on temperature compensation, which is applied to a display panel, and includes: a DC voltage source, a voltage dividing unit, an amorphous silicon thin film transistor, a power management module, and a gate drive module;
所述直流电压源的一端与所述非晶硅薄膜晶体管的漏极连接,所述非晶硅薄膜晶体管的漏极与所述非晶硅薄膜晶体管的栅极连接,所述非晶硅薄膜晶体管的源极与所述分压单元的一端连接,所述分压单元的另一端与所述直流电压源的另一端连接,所述电源管理模组与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述电源管理模组与所述栅极驱动模组连接;One end of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, the drain of the amorphous silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, and the amorphous silicon thin film transistor Is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, the power management module is connected to the voltage dividing unit and the amorphous silicon The common node of the thin film transistor is connected, and the power management module is connected to the gate drive module;
所述电源管理模组根据所述公共节点的电压变化调整输出给所述栅极驱动模组的电压值,从而调整所述显示面板的各个像素单元的栅极驱动电压;The power management module adjusts the voltage value output to the gate driving module according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel;
其中,所述公共节点的电压降低时,所述电源管理模组输出给所述栅极驱动模组的电压升高;所述直流电压源的正极与所述非晶硅薄膜晶体管的漏极连接,所述直流电压源的负极与所述分压单元连接并接地。Wherein, when the voltage of the common node decreases, the voltage output by the power management module to the gate driving module increases; the positive electrode of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor , The negative electrode of the DC voltage source is connected to the voltage dividing unit and grounded.
在本申请所述的基于温度补偿的栅极驱动电路中,所述分压单元为分压电阻。In the gate drive circuit based on temperature compensation described in this application, the voltage dividing unit is a voltage dividing resistor.
在本申请所述的基于温度补偿的栅极驱动电路中,所述分压单元为分压三极管。In the gate drive circuit based on temperature compensation described in this application, the voltage dividing unit is a voltage dividing transistor.
在本申请所述的基于温度补偿的栅极驱动电路中,所述非晶硅薄膜晶体管为NMOS管。In the gate drive circuit based on temperature compensation described in this application, the amorphous silicon thin film transistor is an NMOS tube.
在本申请所述的基于温度补偿的栅极驱动电路中,所述电源管理模组包括温度补偿单元、数模转换单元、比较器以及逻辑控制单元;所述栅极驱动模组包括开关单元以及栅极电压输出单元;In the gate drive circuit based on temperature compensation described in this application, the power management module includes a temperature compensation unit, a digital-to-analog conversion unit, a comparator, and a logic control unit; the gate drive module includes a switch unit and Gate voltage output unit;
所述栅极电压输出单元的输入端接入预设电压,所述栅极电压输出单元的输出端与所述开关单元的输入端连接;The input terminal of the gate voltage output unit is connected to a preset voltage, and the output terminal of the gate voltage output unit is connected to the input terminal of the switch unit;
所述温度补偿单元的输入端与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述所述温度补偿单元的输出端与所述数模转换单元的输入端连接,所述数模转换单元的输出端与所述比较器的比较电压端连接,所述比较器的输出端与所述逻辑控制单元连接,所述逻辑控制单元与所述开关单元的控制端连接,所述开关单元的输出端接地。The input terminal of the temperature compensation unit is connected to the common node of the voltage dividing unit and the amorphous silicon thin film transistor, and the output terminal of the temperature compensation unit is connected to the input terminal of the digital-to-analog conversion unit. The output end of the digital-to-analog conversion unit is connected to the comparison voltage end of the comparator, the output end of the comparator is connected to the logic control unit, and the logic control unit is connected to the control end of the switch unit. The output of the switch unit is grounded.
在本申请所述的基于温度补偿的栅极驱动电路中,所述栅极驱动模组包括电感、二极管以及电容,所述电感的一端接入所述预设电压,所述电感的另一端、所述开关单元的输入端以及所述二极管的正极连接,所述二极管的负极作为所述栅极驱动模组的输出端口,所述电容的一端与所述二极管的负极连接,所述电容的另一端接地。In the gate drive circuit based on temperature compensation according to the present application, the gate drive module includes an inductor, a diode, and a capacitor, one end of the inductor is connected to the preset voltage, and the other end of the inductor, The input terminal of the switch unit is connected to the anode of the diode, the cathode of the diode serves as the output port of the gate drive module, one end of the capacitor is connected to the cathode of the diode, and the other of the capacitor One end is grounded.
在本申请所述的基于温度补偿的栅极驱动电路中,所述开关单元为NMOS场效应晶体管。In the gate drive circuit based on temperature compensation described in this application, the switching unit is an NMOS field effect transistor.
本申请还提供了一种基于温度补偿的栅极驱动电路,应用于显示面板中,其特征在于,包括:直流电压源、分压单元、非晶硅薄膜晶体管、电源管理模组以及栅极驱动模组;The present application also provides a gate drive circuit based on temperature compensation, which is applied to a display panel and is characterized by including: a DC voltage source, a voltage dividing unit, an amorphous silicon thin film transistor, a power management module, and a gate drive Module
所述直流电压源的一端与所述非晶硅薄膜晶体管的漏极连接,所述非晶硅薄膜晶体管的漏极与所述非晶硅薄膜晶体管的栅极连接,所述非晶硅薄膜晶体管的源极与所述分压单元的一端连接,所述分压单元的另一端与所述直流电压源的另一端连接,所述电源管理模组与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述电源管理模组与所述栅极驱动模组连接;One end of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, the drain of the amorphous silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, and the amorphous silicon thin film transistor Is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, the power management module is connected to the voltage dividing unit and the amorphous silicon The common node of the thin film transistor is connected, and the power management module is connected to the gate drive module;
所述电源管理模组根据所述公共节点的电压变化调整输出给所述栅极驱动模组的电压值,从而调整所述显示面板的各个像素单元的栅极驱动电压。The power management module adjusts the voltage value output to the gate driving module according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel.
在本申请所述的基于温度补偿的栅极驱动电路中,所述分压单元为分压电阻。In the gate drive circuit based on temperature compensation described in this application, the voltage dividing unit is a voltage dividing resistor.
在本申请所述的基于温度补偿的栅极驱动电路中,所述分压单元为分压三极管。In the gate drive circuit based on temperature compensation described in this application, the voltage dividing unit is a voltage dividing transistor.
在本申请所述的基于温度补偿的栅极驱动电路中,所述公共节点的电压降低时,所述电源管理模组输出给所述栅极驱动模组的电压升高。In the gate drive circuit based on temperature compensation described in this application, when the voltage of the common node decreases, the voltage output by the power management module to the gate drive module increases.
在本申请所述的基于温度补偿的栅极驱动电路中,所述非晶硅薄膜晶体管为NMOS管。In the gate drive circuit based on temperature compensation described in this application, the amorphous silicon thin film transistor is an NMOS tube.
在本申请所述的基于温度补偿的栅极驱动电路中,所述直流电压源的正极与所述非晶硅薄膜晶体管的漏极连接,所述直流电压源的负极与所述分压单元连接并接地。In the gate drive circuit based on temperature compensation according to the present application, the positive electrode of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, and the negative electrode of the DC voltage source is connected to the voltage dividing unit And ground.
在本申请所述的基于温度补偿的栅极驱动电路中,所述电源管理模组包括温度补偿单元、数模转换单元、比较器以及逻辑控制单元;所述栅极驱动模组包括开关单元以及栅极电压输出单元;In the gate drive circuit based on temperature compensation described in this application, the power management module includes a temperature compensation unit, a digital-to-analog conversion unit, a comparator, and a logic control unit; the gate drive module includes a switch unit and Gate voltage output unit;
所述栅极电压输出单元的输入端接入预设电压,所述栅极电压输出单元的输出端与所述开关单元的输入端连接;The input terminal of the gate voltage output unit is connected to a preset voltage, and the output terminal of the gate voltage output unit is connected to the input terminal of the switch unit;
所述温度补偿单元的输入端与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述所述温度补偿单元的输出端与所述数模转换单元的输入端连接,所述数模转换单元的输出端与所述比较器的比较电压端连接,所述比较器的输出端与所述逻辑控制单元连接,所述逻辑控制单元与所述开关单元的控制端连接,所述开关单元的输出端接地。The input terminal of the temperature compensation unit is connected to the common node of the voltage dividing unit and the amorphous silicon thin film transistor, and the output terminal of the temperature compensation unit is connected to the input terminal of the digital-to-analog conversion unit. The output end of the digital-to-analog conversion unit is connected to the comparison voltage end of the comparator, the output end of the comparator is connected to the logic control unit, and the logic control unit is connected to the control end of the switch unit. The output of the switch unit is grounded.
在本申请所述的基于温度补偿的栅极驱动电路中,所述栅极驱动模组包括电感、二极管以及电容,所述电感的一端接入所述预设电压,所述电感的另一端、所述开关单元的输入端以及所述二极管的正极连接,所述二极管的负极作为所述栅极驱动模组的输出端口,所述电容的一端与所述二极管的负极连接,所述电容的另一端接地。In the gate drive circuit based on temperature compensation according to the present application, the gate drive module includes an inductor, a diode, and a capacitor, one end of the inductor is connected to the preset voltage, and the other end of the inductor, The input terminal of the switch unit is connected to the anode of the diode, the cathode of the diode serves as the output port of the gate drive module, one end of the capacitor is connected to the cathode of the diode, and the other of the capacitor One end is grounded.
在本申请所述的基于温度补偿的栅极驱动电路中,所述开关单元为NMOS场效应晶体管。In the gate drive circuit based on temperature compensation described in this application, the switching unit is an NMOS field effect transistor.
本申请还提供一种显示器,其包括一基于温度补偿的栅极驱动电路,所述基于温度补偿的栅极驱动电路,应用于显示面板中,其包括:直流电压源、分压单元、非晶硅薄膜晶体管、电源管理模组以及栅极驱动模组;The present application also provides a display, which includes a gate drive circuit based on temperature compensation. The gate drive circuit based on temperature compensation is applied to a display panel and includes: a DC voltage source, a voltage dividing unit, and an amorphous Silicon thin film transistor, power management module and gate drive module;
所述直流电压源的一端与所述非晶硅薄膜晶体管的漏极连接,所述非晶硅薄膜晶体管的漏极与所述非晶硅薄膜晶体管的栅极连接,所述非晶硅薄膜晶体管的源极与所述分压单元的一端连接,所述分压单元的另一端与所述直流电压源的另一端连接,所述电源管理模组与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述电源管理模组与所述栅极驱动模组连接;One end of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, the drain of the amorphous silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, and the amorphous silicon thin film transistor Is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, the power management module is connected to the voltage dividing unit and the amorphous silicon The common node of the thin film transistor is connected, and the power management module is connected to the gate drive module;
所述电源管理模组根据所述公共节点的电压变化调整输出给所述栅极驱动模组的电压值,从而调整所述显示面板的各个像素单元的栅极驱动电压。The power management module adjusts the voltage value output to the gate driving module according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel.
在本申请所述的显示器中,所述分压单元为分压电阻。In the display described in this application, the voltage dividing unit is a voltage dividing resistor.
在本申请所述的显示器中,所述分压单元为分压三极管。In the display described in this application, the voltage dividing unit is a voltage dividing transistor.
在本申请所述的显示器中,所述公共节点的电压降低时,所述电源管理模组输出给所述栅极驱动模组的电压升高。In the display described in this application, when the voltage of the common node decreases, the voltage output by the power management module to the gate drive module increases.
本申请提供的基于温度补偿的栅极驱动电路及显示器,通过采用非晶硅薄膜晶体管来感应温度变换,并采用直流电压源的一端与所述非晶硅薄膜晶体管的漏极连接,所述非晶硅薄膜晶体管的漏极与所述非晶硅薄膜晶体管的栅极连接,所述非晶硅薄膜晶体管的源极与所述分压单元的一端连接,所述分压单元的另一端与所述直流电压源的另一端连接,所述电源管理模组与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述电源管理模组与所述栅极驱动模组连接;从而实现温度补偿,具有降低成本的有益效果。The gate drive circuit and the display based on temperature compensation provided by the present application adopt an amorphous silicon thin film transistor to induce temperature change, and use one end of a DC voltage source to connect to the drain of the amorphous silicon thin film transistor. The drain of the crystalline silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, the source of the amorphous silicon thin film transistor is connected to one end of the voltage dividing unit, and the other end of the voltage dividing unit is connected to the The other end of the DC voltage source is connected, the power management module is connected to the common node of the voltage dividing unit and the amorphous silicon thin film transistor, and the power management module is connected to the gate drive module; Thereby, temperature compensation is achieved, which has the beneficial effect of reducing costs.
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly explain the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, without paying any creative work, other drawings can be obtained based on these drawings.
图1为本申请实施例中的基于温度补偿的栅极驱动电路的结构示意图。FIG. 1 is a schematic structural diagram of a gate drive circuit based on temperature compensation in an embodiment of the present application.
图2为图1所示的基于温度补偿的栅极驱动电路中的电源管理模组与栅极驱动模组的结构示意图。FIG. 2 is a schematic structural diagram of a power management module and a gate drive module in the gate drive circuit based on temperature compensation shown in FIG. 1.
图3为本申请实施例中的基于温度补偿的栅极驱动电路的电路原理示意图。FIG. 3 is a schematic diagram of a circuit principle of a gate driving circuit based on temperature compensation in an embodiment of the present application.
下面详细描述本申请的实施方式,所述实施方式的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性的,仅用于解释本申请,而不能理解为对本申请的限制。The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the drawings, in which the same or similar reference numerals indicate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary, and are only used to explain the present application, and cannot be construed as limiting the present application.
在本申请的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。In the description of this application, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", " Back, "Left", "Right", "Vertical", "Horizontal", "Top", "Bottom", "Inner", "Outer", "Clockwise", "Counterclockwise" etc. The positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, Therefore, it cannot be understood as a limitation to this application. In addition, the terms “first” and “second” are used for description purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise specifically limited.
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开,下文中对特定例子的部件和设置进行描述。当然,它们仅仅为示例,并且目的不在于限制本申请。此外,本申请可以在不同例子中重复参考数字和/或参考字母,这种重复是为了简化和清楚的目的,其本身不指示所讨论各种实施方式和/或设置之间的关系。此外,本申请提供了的各种特定的工艺和材料的例子,但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。The following disclosure provides many different implementations or examples for implementing different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit this application. In addition, the present application may repeat reference numerals and/or reference letters in different examples. Such repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and/or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and/or the use of other materials.
请参照图1,图1为本申请实施例中的基于温度补偿的栅极驱动电路的结构示意图。如图1所示,本申请实施例的基于温度补偿的栅极驱动电路应用于显示面板中,包括:直流电压源101、分压单元102、非晶硅薄膜晶体管103、电源管理模组104以及栅极驱动模组105。Please refer to FIG. 1, which is a schematic structural diagram of a gate driving circuit based on temperature compensation in an embodiment of the present application. As shown in FIG. 1, the gate drive circuit based on temperature compensation according to an embodiment of the present application is applied to a display panel and includes a DC voltage source 101, a voltage dividing unit 102, an amorphous silicon thin film transistor 103, a power management module 104, and Gate drive module 105.
其中,直流电压源101的一端与非晶硅薄膜晶体管103的漏极连接,非晶硅薄膜晶体管103的漏极与非晶硅薄膜晶体管103的栅极连接,非晶硅薄膜晶体管103的源极与分压单元102的一端连接,分压单元102的另一端与直流电压源101的另一端连接,电源管理模组104与分压单元102以及非晶硅薄膜晶体管103的公共节点连接,电源管理模组104与栅极驱动模组105连接;电源管理模组104根据公共节点的电压变化调整输出给栅极驱动模组105的电压值,从而调整显示面板的各个像素单元的栅极驱动电压。其中,公共节点的电压降低时,电源管理模组输出给所述栅极驱动模组的电压升高。One end of the DC voltage source 101 is connected to the drain of the amorphous silicon thin film transistor 103, the drain of the amorphous silicon thin film transistor 103 is connected to the gate of the amorphous silicon thin film transistor 103, and the source of the amorphous silicon thin film transistor 103 It is connected to one end of the voltage dividing unit 102, the other end of the voltage dividing unit 102 is connected to the other end of the DC voltage source 101, the power management module 104 is connected to the common node of the voltage dividing unit 102 and the amorphous silicon thin film transistor 103, and the power management The module 104 is connected to the gate driving module 105; the power management module 104 adjusts the voltage value output to the gate driving module 105 according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel. Wherein, when the voltage of the common node decreases, the voltage output by the power management module to the gate driving module increases.
其中,在一些实施例中,分压单元102可以为分压电阻,当然也可以采用其他常见的分压元件,例如分压三极管。In some embodiments, the voltage dividing unit 102 may be a voltage dividing resistor. Of course, other common voltage dividing elements may also be used, such as a voltage dividing transistor.
其中,在一些实施例中,非晶硅薄膜晶体管103为NMOS管。In some embodiments, the amorphous silicon thin film transistor 103 is an NMOS tube.
其中,直流电压源101的正极与非晶硅薄膜晶体管103的漏极连接,直流电压源101的负极与分压单元102连接并接地。The anode of the DC voltage source 101 is connected to the drain of the amorphous silicon thin film transistor 103, and the cathode of the DC voltage source 101 is connected to the voltage dividing unit 102 and grounded.
具体地,请参照图2,图2为图1所示的基于温度补偿的栅极驱动电路中的电源管理模组与栅极驱动模组的结构示意图。如图2所示,电源管理模组104包括温度补偿单元1041、数模转换单元1042、比较器1043以及逻辑控制单元1044;所述栅极驱动模组105包括开关单元1052以及栅极电压输出单元1051。Specifically, please refer to FIG. 2, which is a schematic structural diagram of a power management module and a gate drive module in the gate drive circuit based on temperature compensation shown in FIG. 1. As shown in FIG. 2, the power management module 104 includes a temperature compensation unit 1041, a digital-to-analog conversion unit 1042, a comparator 1043, and a logic control unit 1044; the gate drive module 105 includes a switching unit 1052 and a gate voltage output unit 1051.
其中,栅极电压输出单元1051的输入端接入预设电压AVdd,栅极电压输出单元1051的输出端与开关单元1052的输入端连接;温度补偿单元1041的输入端与分压单元102以及非晶硅薄膜晶体管103的公共节点连接,温度补偿单元1041的输出端与数模转换单元1042的输入端连接,数模转换单元1042的输出端与比较器1043的比较电压端连接,比较器1043的输出端与逻辑控制单元1044连接,逻辑控制单元1044与开关单元1052的控制端连接,开关单元1052的输出端接地。其中,可以通过逻辑控制单元1044控制开关单元1052的占空比从而调整栅极电压输出单元1051的输出的栅极驱动电压的大小,在温度较低时,提高占空比,温度较高时,降低占空比。The input terminal of the gate voltage output unit 1051 is connected to the preset voltage AVdd, the output terminal of the gate voltage output unit 1051 is connected to the input terminal of the switching unit 1052; the input terminal of the temperature compensation unit 1041 is connected to the voltage dividing unit 102 and the non-voltage The common node of the crystalline silicon thin film transistor 103 is connected, the output terminal of the temperature compensation unit 1041 is connected to the input terminal of the digital-analog conversion unit 1042, and the output terminal of the digital-analog conversion unit 1042 is connected to the comparison voltage terminal of the comparator 1043, The output terminal is connected to the logic control unit 1044, the logic control unit 1044 is connected to the control terminal of the switch unit 1052, and the output terminal of the switch unit 1052 is grounded. Wherein, the logic control unit 1044 can control the duty ratio of the switch unit 1052 to adjust the size of the gate driving voltage output by the gate voltage output unit 1051. When the temperature is low, the duty ratio is increased, and when the temperature is high, Reduce the duty cycle.
比较器1043的比较电压端接入基准电压。The comparison voltage terminal of the comparator 1043 is connected to the reference voltage.
请同时参照图3,图3为本申请实施例中的基于温度补偿的栅极驱动电路的电路原理示意图。其中,栅极电压输出单元1051包括电感L1、二极管D1以及电容C1,电感L1的一端接入预设电压AVdd,电感L1的另一端、开关单元1052的输入端以及二极管D1的正极连接,二极管D1的负极作为栅极电压输出单元1052的输出端口,电容C1的一端与二极管D1的负极连接,电容C1的另一端接地。开关单元1052为NMOS场效应晶体管Q1。Please also refer to FIG. 3, which is a schematic diagram of a circuit principle of a gate driving circuit based on temperature compensation in an embodiment of the present application. The gate voltage output unit 1051 includes an inductor L1, a diode D1, and a capacitor C1. One end of the inductor L1 is connected to a predetermined voltage AVdd, the other end of the inductor L1, the input terminal of the switching unit 1052, and the anode of the diode D1 are connected, and the diode D1 The negative electrode of is used as the output port of the gate voltage output unit 1052, one end of the capacitor C1 is connected to the negative electrode of the diode D1, and the other end of the capacitor C1 is grounded. The switching unit 1052 is an NMOS field effect transistor Q1.
其中,比较器1043通过分压电路从栅极电压输出单元1051的输出端获取基准电压,分压电路包括电阻R1以及电阻R2,其中,电阻R1的一端与栅极电压输出单元1051的输出端也即是二极管D1的负极连接,电阻R1的另一端与该电阻R2的一端连接,电阻R2的另一端接地,比较器1043的比较电压端与电阻R1以及电阻R2的公共节点连接以获取基准电压,通过控制电阻R1以及电阻R2的阻值即可控制基准电压的大小。Among them, the comparator 1043 obtains the reference voltage from the output terminal of the gate voltage output unit 1051 through a voltage divider circuit. The voltage divider circuit includes a resistor R1 and a resistor R2, wherein one end of the resistor R1 and the output end of the gate voltage output unit 1051 are also That is, the cathode of the diode D1 is connected, the other end of the resistor R1 is connected to one end of the resistor R2, the other end of the resistor R2 is grounded, the comparison voltage end of the comparator 1043 is connected to the common node of the resistor R1 and the resistor R2 to obtain the reference voltage, The magnitude of the reference voltage can be controlled by controlling the resistance of the resistor R1 and the resistor R2.
本申请提供的基于温度补偿的栅极驱动电路及显示器通过,采用非晶硅薄膜晶体管来感应温度变换,并采用直流电压源的一端与非晶硅薄膜晶体管的漏极连接,非晶硅薄膜晶体管的漏极与非晶硅薄膜晶体管的栅极连接,非晶硅薄膜晶体管的源极与分压单元的一端连接,分压单元的另一端与直流电压源的另一端连接,电源管理模组与分压单元以及非晶硅薄膜晶体管的公共节点连接,电源管理模组与栅极驱动模组连接;从而实现温度补偿,具有降低成本的有益效果。The gate drive circuit and the display based on temperature compensation provided by the present application adopt an amorphous silicon thin film transistor to sense the temperature change, and use one end of a DC voltage source to connect to the drain of the amorphous silicon thin film transistor. Is connected to the gate of the amorphous silicon thin film transistor, the source of the amorphous silicon thin film transistor is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, and the power management module is connected to The voltage divider unit and the common node of the amorphous silicon thin film transistor are connected, and the power management module is connected to the gate drive module; thereby achieving temperature compensation and having the beneficial effect of reducing costs.
在本说明书的描述中,参考术语“一个实施方式”、“某些实施方式”、“示意性实施方式”、“示例”、“具体示例”、或“一些示例”等的描述意指结合所述实施方式或示例描述的具体特征、结构、材料或者特点包含于本申请的至少一个实施方式或示例中。在本说明书中,对上述术语的示意性表述不一定指的是相同的实施方式或示例。而且,描述的具体特征、结构、材料或者特点可以在任何的一个或多个实施方式或示例中以合适的方式结合。In the description of this specification, the descriptions referring to the terms "one embodiment", "certain embodiments", "schematic embodiments", "examples", "specific examples", or "some examples" mean that The specific features, structures, materials, or characteristics described in the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic expression of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
综上所述,虽然本申请已以优选实施例揭露如上,但上述优选实施例并非用以限制本申请,本领域的普通技术人员,在不脱离本申请的精神和范围内,均可作各种更动与润饰,因此本申请的保护范围以权利要求界定的范围为准。In summary, although the present application has been disclosed as preferred embodiments above, the above preferred embodiments are not intended to limit the present application. Those of ordinary skill in the art can make various changes without departing from the spirit and scope of the present application Such changes and retouching, so the scope of protection of this application shall be subject to the scope defined by the claims.
Claims (20)
- 一种基于温度补偿的栅极驱动电路,应用于显示面板中,其包括:直流电压源、分压单元、非晶硅薄膜晶体管、电源管理模组以及栅极驱动模组;A gate drive circuit based on temperature compensation, which is applied to a display panel, includes: a DC voltage source, a voltage dividing unit, an amorphous silicon thin film transistor, a power management module, and a gate drive module;所述直流电压源的一端与所述非晶硅薄膜晶体管的漏极连接,所述非晶硅薄膜晶体管的漏极与所述非晶硅薄膜晶体管的栅极连接,所述非晶硅薄膜晶体管的源极与所述分压单元的一端连接,所述分压单元的另一端与所述直流电压源的另一端连接,所述电源管理模组与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述电源管理模组与所述栅极驱动模组连接;One end of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, the drain of the amorphous silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, and the amorphous silicon thin film transistor Is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, the power management module is connected to the voltage dividing unit and the amorphous silicon The common node of the thin film transistor is connected, and the power management module is connected to the gate drive module;所述电源管理模组根据所述公共节点的电压变化调整输出给所述栅极驱动模组的电压值,从而调整所述显示面板的各个像素单元的栅极驱动电压;The power management module adjusts the voltage value output to the gate driving module according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel;其中,所述公共节点的电压降低时,所述电源管理模组输出给所述栅极驱动模组的电压升高;所述直流电压源的正极与所述非晶硅薄膜晶体管的漏极连接,所述直流电压源的负极与所述分压单元连接并接地。Wherein, when the voltage of the common node decreases, the voltage output by the power management module to the gate driving module increases; the positive electrode of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor , The negative electrode of the DC voltage source is connected to the voltage dividing unit and grounded.
- 根据权利要求1所述的基于温度补偿的栅极驱动电路,其中,所述分压单元为分压电阻。The gate drive circuit based on temperature compensation according to claim 1, wherein the voltage dividing unit is a voltage dividing resistor.
- 根据权利要求1所述的基于温度补偿的栅极驱动电路,其中,所述分压单元为分压三极管。The gate drive circuit based on temperature compensation according to claim 1, wherein the voltage dividing unit is a voltage dividing transistor.
- 根据权利要求1所述的基于温度补偿的栅极驱动电路,其中,所述非晶硅薄膜晶体管为NMOS管。The gate drive circuit based on temperature compensation according to claim 1, wherein the amorphous silicon thin film transistor is an NMOS tube.
- 根据权利要求1所述的基于温度补偿的栅极驱动电路,其中,所述电源管理模组包括温度补偿单元、数模转换单元、比较器以及逻辑控制单元;所述栅极驱动模组包括开关单元以及栅极电压输出单元;The gate drive circuit based on temperature compensation according to claim 1, wherein the power management module includes a temperature compensation unit, a digital-to-analog conversion unit, a comparator, and a logic control unit; the gate drive module includes a switch Unit and gate voltage output unit;所述栅极电压输出单元的输入端接入预设电压,所述栅极电压输出单元的输出端与所述开关单元的输入端连接;The input terminal of the gate voltage output unit is connected to a preset voltage, and the output terminal of the gate voltage output unit is connected to the input terminal of the switch unit;所述温度补偿单元的输入端与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述所述温度补偿单元的输出端与所述数模转换单元的输入端连接,所述数模转换单元的输出端与所述比较器的比较电压端连接,所述比较器的输出端与所述逻辑控制单元连接,所述逻辑控制单元与所述开关单元的控制端连接,所述开关单元的输出端接地。The input terminal of the temperature compensation unit is connected to the common node of the voltage dividing unit and the amorphous silicon thin film transistor, and the output terminal of the temperature compensation unit is connected to the input terminal of the digital-to-analog conversion unit. The output end of the digital-to-analog conversion unit is connected to the comparison voltage end of the comparator, the output end of the comparator is connected to the logic control unit, and the logic control unit is connected to the control end of the switch unit. The output of the switch unit is grounded.
- 根据权利要求5所述的基于温度补偿的栅极驱动电路,其中,所述栅极驱动模组包括电感、二极管以及电容,所述电感的一端接入所述预设电压,所述电感的另一端、所述开关单元的输入端以及所述二极管的正极连接,所述二极管的负极作为所述栅极驱动模组的输出端口,所述电容的一端与所述二极管的负极连接,所述电容的另一端接地。The gate drive circuit based on temperature compensation according to claim 5, wherein the gate drive module includes an inductor, a diode, and a capacitor, one end of the inductor is connected to the preset voltage, and the other of the inductor One end, the input end of the switch unit and the anode of the diode are connected, the cathode of the diode is used as the output port of the gate drive module, and one end of the capacitor is connected to the cathode of the diode, the capacitor The other end is grounded.
- 根据权利要求6所述的基于温度补偿的栅极驱动电路,其中,所述开关单元为NMOS场效应晶体管。The gate drive circuit based on temperature compensation according to claim 6, wherein the switching unit is an NMOS field effect transistor.
- 一种基于温度补偿的栅极驱动电路,应用于显示面板中,其包括:直流电压源、分压单元、非晶硅薄膜晶体管、电源管理模组以及栅极驱动模组;A gate drive circuit based on temperature compensation, which is applied to a display panel, includes: a DC voltage source, a voltage dividing unit, an amorphous silicon thin film transistor, a power management module, and a gate drive module;所述直流电压源的一端与所述非晶硅薄膜晶体管的漏极连接,所述非晶硅薄膜晶体管的漏极与所述非晶硅薄膜晶体管的栅极连接,所述非晶硅薄膜晶体管的源极与所述分压单元的一端连接,所述分压单元的另一端与所述直流电压源的另一端连接,所述电源管理模组与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述电源管理模组与所述栅极驱动模组连接;One end of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, the drain of the amorphous silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, and the amorphous silicon thin film transistor Is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, the power management module is connected to the voltage dividing unit and the amorphous silicon The common node of the thin film transistor is connected, and the power management module is connected to the gate drive module;所述电源管理模组根据所述公共节点的电压变化调整输出给所述栅极驱动模组的电压值,从而调整所述显示面板的各个像素单元的栅极驱动电压。The power management module adjusts the voltage value output to the gate driving module according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel.
- 根据权利要求8所述的基于温度补偿的栅极驱动电路,其中,所述分压单元为分压电阻。The gate drive circuit based on temperature compensation according to claim 8, wherein the voltage dividing unit is a voltage dividing resistor.
- 根据权利要求8所述的基于温度补偿的栅极驱动电路,其中,所述分压单元为分压三极管。The gate drive circuit based on temperature compensation according to claim 8, wherein the voltage dividing unit is a voltage dividing transistor.
- 根据权利要求8所述的基于温度补偿的栅极驱动电路,其中,所述公共节点的电压降低时,所述电源管理模组输出给所述栅极驱动模组的电压升高。The gate drive circuit based on temperature compensation according to claim 8, wherein the voltage output by the power management module to the gate drive module increases when the voltage of the common node decreases.
- 根据权利要求8所述的基于温度补偿的栅极驱动电路,其中,所述非晶硅薄膜晶体管为NMOS管。The gate drive circuit based on temperature compensation according to claim 8, wherein the amorphous silicon thin film transistor is an NMOS tube.
- 根据权利要求8所述的基于温度补偿的栅极驱动电路,其中,所述直流电压源的正极与所述非晶硅薄膜晶体管的漏极连接,所述直流电压源的负极与所述分压单元连接并接地。The gate drive circuit based on temperature compensation according to claim 8, wherein the positive electrode of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, and the negative electrode of the DC voltage source is connected to the divided voltage The unit is connected and grounded.
- 根据权利要求8所述的基于温度补偿的栅极驱动电路,其中,所述电源管理模组包括温度补偿单元、数模转换单元、比较器以及逻辑控制单元;所述栅极驱动模组包括开关单元以及栅极电压输出单元;The gate drive circuit based on temperature compensation according to claim 8, wherein the power management module includes a temperature compensation unit, a digital-to-analog conversion unit, a comparator, and a logic control unit; the gate drive module includes a switch Unit and gate voltage output unit;所述栅极电压输出单元的输入端接入预设电压,所述栅极电压输出单元的输出端与所述开关单元的输入端连接;The input terminal of the gate voltage output unit is connected to a preset voltage, and the output terminal of the gate voltage output unit is connected to the input terminal of the switch unit;所述温度补偿单元的输入端与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述所述温度补偿单元的输出端与所述数模转换单元的输入端连接,所述数模转换单元的输出端与所述比较器的比较电压端连接,所述比较器的输出端与所述逻辑控制单元连接,所述逻辑控制单元与所述开关单元的控制端连接,所述开关单元的输出端接地。The input terminal of the temperature compensation unit is connected to the common node of the voltage dividing unit and the amorphous silicon thin film transistor, and the output terminal of the temperature compensation unit is connected to the input terminal of the digital-to-analog conversion unit. The output end of the digital-to-analog conversion unit is connected to the comparison voltage end of the comparator, the output end of the comparator is connected to the logic control unit, and the logic control unit is connected to the control end of the switch unit. The output of the switch unit is grounded.
- 根据权利要求14所述的基于温度补偿的栅极驱动电路,其中,所述栅极驱动模组包括电感、二极管以及电容,所述电感的一端接入所述预设电压,所述电感的另一端、所述开关单元的输入端以及所述二极管的正极连接,所述二极管的负极作为所述栅极驱动模组的输出端口,所述电容的一端与所述二极管的负极连接,所述电容的另一端接地。The gate drive circuit based on temperature compensation according to claim 14, wherein the gate drive module includes an inductor, a diode, and a capacitor, one end of the inductor is connected to the preset voltage, and the other of the inductor One end, the input end of the switch unit and the anode of the diode are connected, the cathode of the diode is used as the output port of the gate drive module, and one end of the capacitor is connected to the cathode of the diode, the capacitor The other end is grounded.
- 根据权利要求15所述的基于温度补偿的栅极驱动电路,其中,所述开关单元为NMOS场效应晶体管。The gate drive circuit based on temperature compensation according to claim 15, wherein the switching unit is an NMOS field effect transistor.
- 一种显示器,其包括一基于温度补偿的栅极驱动电路,所述基于温度补偿的栅极驱动电路,应用于显示面板中,其包括:直流电压源、分压单元、非晶硅薄膜晶体管、电源管理模组以及栅极驱动模组;A display includes a gate drive circuit based on temperature compensation. The gate drive circuit based on temperature compensation is applied to a display panel, and includes: a DC voltage source, a voltage dividing unit, an amorphous silicon thin film transistor, Power management module and gate drive module;所述直流电压源的一端与所述非晶硅薄膜晶体管的漏极连接,所述非晶硅薄膜晶体管的漏极与所述非晶硅薄膜晶体管的栅极连接,所述非晶硅薄膜晶体管的源极与所述分压单元的一端连接,所述分压单元的另一端与所述直流电压源的另一端连接,所述电源管理模组与所述分压单元以及所述非晶硅薄膜晶体管的公共节点连接,所述电源管理模组与所述栅极驱动模组连接;One end of the DC voltage source is connected to the drain of the amorphous silicon thin film transistor, the drain of the amorphous silicon thin film transistor is connected to the gate of the amorphous silicon thin film transistor, and the amorphous silicon thin film transistor Is connected to one end of the voltage dividing unit, the other end of the voltage dividing unit is connected to the other end of the DC voltage source, the power management module is connected to the voltage dividing unit and the amorphous silicon The common node of the thin film transistor is connected, and the power management module is connected to the gate drive module;所述电源管理模组根据所述公共节点的电压变化调整输出给所述栅极驱动模组的电压值,从而调整所述显示面板的各个像素单元的栅极驱动电压。The power management module adjusts the voltage value output to the gate driving module according to the voltage change of the common node, thereby adjusting the gate driving voltage of each pixel unit of the display panel.
- 根据权利要求17所述的显示器,其中,所述分压单元为分压电阻。The display according to claim 17, wherein the voltage dividing unit is a voltage dividing resistor.
- 根据权利要求17所述的基于温度补偿的栅极驱动电路,其中,所述分压单元为分压三极管。The gate drive circuit based on temperature compensation according to claim 17, wherein the voltage dividing unit is a voltage dividing transistor.
- 根据权利要求17所述的显示器,其中,所述公共节点的电压降低时,所述电源管理模组输出给所述栅极驱动模组的电压升高。The display according to claim 17, wherein when the voltage of the common node decreases, the voltage output by the power management module to the gate driving module increases.
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CN109377958B (en) | 2020-04-28 |
CN109377958A (en) | 2019-02-22 |
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