WO2020108158A1

WO2020108158A1 - Instruction data processing method and apparatus, and device and storage medium

Info

Publication number: WO2020108158A1
Application number: PCT/CN2019/111729
Authority: WO
Inventors: 徐东伟; 石金锋; 姚克奇; 朱智华
Original assignee: 深圳市中兴微电子技术有限公司
Priority date: 2018-11-28
Filing date: 2019-10-17
Publication date: 2020-06-04
Also published as: CN111240682A

Abstract

Disclosed in embodiments of the present application are an instruction data processing method and apparatus, and a device and a storage medium. The method comprises: if it is determined that there are fields of the same type among instructions before compilation, during the compilation, storing said fields to a specified encoding location; generating a corresponding operation code according to the type of each of the instructions before compilation and the attribute information of said fields; storing the operation code in the instructions after compilation; and outputting the instructions after compilation.

Description

Method, device, equipment and storage medium for processing instruction data

Technical field

The embodiments of the present application relate to a computer system, but not limited to a method, device, device, and storage medium for processing instruction data.

Background technique

The network processor is a processor specially used for network data processing. It is mainly used in network products such as switches and routers, and is mostly used to process messages in the network; it has high processing performance, programmable, flexible expansion, and short development cycle. Advantage. It is precisely because of the difference between the processing of network business data and ordinary system programs and their characteristic requirements that the instruction set design of network processors must have the characteristics of high instruction execution efficiency, strong instruction scalability, and rich instruction set.

At the same time, on the basis of satisfying the forwarding performance, it is necessary to reduce the complexity of logic design, reduce chip resources and reduce power consumption. These characteristics require not only to consider each process from the instruction set design, but also to consider all the processes as a whole, so the instruction set design and processing of the network processor is very complicated.

Summary of the invention

In view of this, the embodiments of the present application provide a method, device, device, and storage medium for processing instruction data in order to solve at least one problem in the prior art.

The technical solutions of the embodiments of the present application are implemented as follows:

Optionally, an embodiment of the present application provides a method for processing instruction data. The method includes: if it is determined that there are fields of the same type between the instructions before compilation, the fields of the same type are stored to the designated during compilation Coding position; generate the corresponding operation code according to the type of each pre-compiled instruction and the attribute information of the field of the same type; store the operation code in the compiled instruction; output the compiled instruction.

Optionally, an embodiment of the present application provides a method for processing instruction data. The method includes: determining an operation code in a compiled instruction; and according to the operation code, determining the type of the instruction and the instruction The attribute information of the field of; the field of the corresponding type is determined from the specified coding position in the instruction according to the attribute information of the field; the corresponding operand is obtained according to the field of the corresponding type, and the operand is output.

Optionally, an embodiment of the present application provides an instruction data processing apparatus. The apparatus includes: a first storage unit configured to: if it is determined that there are fields of the same type between instructions before compilation, compile the The fields of the same type are stored to the designated coding position; the generating unit is configured to generate a corresponding operation code according to the type of each pre-compiled instruction and the attribute information of the fields of the same type; the second storage unit is configured as Storing the operation code in the compiled instruction; the first output unit is configured to output the compiled instruction.

Optionally, an embodiment of the present application provides an instruction data processing apparatus. The apparatus includes: a first determination unit configured to determine an operation code in a compiled instruction; a second determination unit configured to The operation code determines the type of the instruction and the attribute information of the field in the instruction; the third determination unit is configured to determine the field of the corresponding type from the specified coding position in the instruction according to the attribute information of the field; The second output unit is configured to obtain a corresponding operand according to the corresponding type of field and output the operand.

Optionally, an embodiment of the present application provides a computer device, the computer device at least includes: a processor and a storage medium configured to store executable instructions, wherein: the processor is configured to execute the stored executable instructions, the The executable instruction is configured to execute the processing method of the instruction data provided by the above embodiment.

Optionally, an embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored, and the computer-executable instructions are configured to execute the instruction data processing method provided in the foregoing embodiments A step of.

Embodiments of the present application provide an instruction data processing method and apparatus, device, and storage medium, where the method includes: if it is determined that there is a field of the same type between instructions before compilation, the same type is used during compilation Store the field in the specified coding position; generate the corresponding operation code according to the type of each pre-compiled instruction and the attribute information of the field of the same type; store the operation code in the compiled instruction; output The compiled instruction. In this way, the operation code is directly related to the type of the instruction and the number and type of the instruction source operands, so that the classification and acquisition of the instruction source operands is completed according to the instruction operation code.

BRIEF DESCRIPTION

1 is a schematic flowchart 1 of a method for processing instruction data provided by an embodiment of the present application;

2 is a second schematic flowchart of a method for processing instruction data provided by an embodiment of the present application;

3 is a schematic flowchart of a method for processing an instruction source operand of a network processor according to an embodiment of the present application;

FIG. 4 is a schematic structural diagram of a processing device for a network processor instruction source operand provided by an embodiment of the present application; FIG.

FIG. 5 is a schematic structural diagram 1 of a structure of an instruction data processing device provided by an embodiment of the present application; FIG.

FIG. 6 is a second schematic structural diagram of a composition of a device for processing instruction data provided by an embodiment of the present application; FIG.

7 is a schematic structural diagram of a computer device according to an embodiment of the present application.

detailed description

In the related art, when designing the instruction set of the network processor, several key technologies such as instruction encoding, storage, retrieval, and decoding need to be considered. Among them, instruction encoding and decoding are the basis of instruction set design, which directly determines the complexity of instruction set processing. At the same time, in order to be able to process various business data in the network, it is necessary to design a plurality of instructions with different functions and a large-capacity instruction space. Therefore, if there is no corresponding good design solution for instruction encoding and decoding, the complexity of the logic design is often high, and it will occupy a large amount of chip memory and the power consumption is also very high.

The instruction set design of the traditional network processor adopts instruction pipeline decoding technology similar to Reduced Instruction Set (Computer for short, RISC). The instruction encoding adopts fixed-length encoding. Since the opcode field of the instruction is encoded only according to the functional operation of each instruction, when acquiring the source operand in the decoding stage, it is necessary to determine the type of each instruction first, and then encode the instruction according to the source operand recorded by each instruction To obtain the field information such as the number and address of the source operand.

The number of instructions based on the network processor is very large. Obtaining source operands in this way not only requires additional chip memory resources for storing the source operand information of each instruction; but also greatly increases the logic complexity of the chip core .

In order to make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the specific technical solutions of the invention will be described in further detail in conjunction with the drawings in the embodiments of the present application. The following embodiments are used to illustrate this application, but are not used to limit the scope of this application.

An embodiment of the present application provides a method for processing instruction data. The method is applied to a computer device. The functions implemented by the method can be implemented by a processor in a computer device calling program code. Of course, the program code can be stored in a computer storage medium It can be seen that the computer device includes at least a processor and a storage medium.

FIG. 1 is a schematic flowchart 1 of a method for processing instruction data according to an embodiment of the present application. As shown in FIG. 1, the method includes:

In step S11, if it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored to the designated coding position.

Here, at least one instruction is acquired from a preset instruction set. Since the function and role of each instruction are preset, the same type of fields between the instructions before compilation can be determined according to the acquired instruction, and then compiled by the compilation unit At this time, each instruction can be divided into several sections according to the corresponding rules, each section occupies a preset position and corresponding byte length, and the preset position and corresponding byte length are set to the corresponding encoding position, During compilation, fields of the same type between each instruction can be stored to the designated encoding position, and the established encoding position can be preset as needed. For example, instruction set has instruction A and instruction B, instruction A has fields A1, A2, A3, instruction B has fields B1, B2, B3, if A3 and B3 are the same type of fields, the compilation unit will put the A3 field of instruction A , And the B3 field of instruction B are placed in the same bit position of their respective codes.

In step S12, according to the type of each pre-compiled instruction and the attribute information of the field of the same type, a corresponding operation code is generated.

Here, the operation code is used to indicate the operation to be completed by the instruction, and the length of the operation code may be fixed or may vary. In the embodiment of the present application, the type information of the instruction before compilation and the attribute information of the field of the same type can be obtained, the type of the instruction before compilation and the attribute information of the field of the same type are respectively marked, and the corresponding Opcode. Here, the types of instructions may be: logic calculation instructions, data upload/download instructions, jump instructions, and some special instructions, etc., which can be preset as needed. Fields of the same type can be different source operands, destination operands, or other fields.

In step S13, the operation code is stored in the compiled instruction.

Here, the compiling unit may store the operation code generated according to the above steps to the corresponding coding position in the compiled instruction.

Step S14, output the compiled instruction.

In the embodiment of the present application, if it is determined that there are fields of the same type between the instructions before compilation, the fields of the same type are stored to the specified coding position during compilation, according to the type of each instruction before compilation and the attributes of the fields of the same type Information, generate the corresponding operation code, store the operation code in the compiled instruction, and output the compiled instruction. The operation code can be directly related to the type of the instruction and the attribute information of the field, so as to realize the classification and acquisition of the corresponding operand of the field according to the instruction operation code.

An embodiment of the present application also provides another method for processing instruction data. The method includes:

In step S101, if it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored to the designated coding position.

In step S102, if it is determined that the field of the same type includes the source operation digital field, the number and type of the source operation digital field are determined.

Here, the instruction may include one or more source operation digital fields. In the embodiment of the present application, if it is determined that the fields of the same type include the source operation digital field, the number and type of the source operation digital field are determined.

In step S103, a corresponding operation code is generated according to the type of each pre-compiled instruction and the number and type of the source operand fields.

Here, the type of the instruction before compilation and the number and type of source operation digital fields can be obtained, the type of the instruction before compilation, the number and type of source operation digital fields are respectively marked, and the corresponding code is generated according to the identification code generated by the mark Opcode. Mark the number and type of the source operand field separately, including: determining the number and type of source operands, and generating a mark based on the number and type of source operands. For example: no source operand or immediate value is required to be marked as 000; a register that only needs to operate on a condition is marked as 001 and so on.

The above steps S102 to S103 provide a way to implement the step of “generating a corresponding operation code according to the type of each pre-compiled instruction and the attribute information of the field of the same type”. In this mode, if it is determined that the field of the same type includes the source operation digital field, the number and type of the source operation digital field are determined, according to the type of each instruction before compilation and the number of the source operation digital field And type, generate the corresponding opcode. The operation code can be directly related to the type of the instruction and the number and type of source operation digital fields, so as to realize the classification and acquisition of the instruction source operand according to the instruction operation code.

Step S104: Store the operation code in the compiled instruction.

Step S105, output the compiled instruction.

Step S201: Classify the instruction before compilation according to the function to be executed by each instruction before compilation, and obtain a classification result.

Here, the instructions before compilation can be classified into at least one category according to the functions to be performed by the instructions. Among them, the classification result can be: logic calculation instructions, data upload/download instructions, jump instructions and some special instructions.

In step S202, if it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored to the designated coding position.

In step S203, if it is determined that the field of the same type includes the source operation digital field, the number and type of the source operation digital field are determined according to the classification result.

Here, it can be determined whether the instruction requires a source operand according to the function to be executed by the instruction before compilation, and if the source operand is required, the number and type of source operands required. Take the example of dividing instructions into logic calculation instructions, data upload/download instructions, and jump instructions. Among them, logic calculation instructions usually have destination registers, ordinary register source operand one, ordinary register source operand two or immediate source operand second fields, etc.; data upload/download instructions usually have destination register, conditional register source operation Number two, memory source operand number one or memory source operand two, immediate source source operand second class, etc.; jump class instructions usually have tags, condition register source operand class two; special class instructions usually complete network service checks Tables, co-processing, etc. do not require source operands. Among them, the source operand one refers to the source operand in the first place when there is one operand, or there are two operands; the source operand two refers to the second place in the second place when there are two operands Source operand.

In step S204, a corresponding operation code is generated according to the type of each pre-compilation instruction, the number and type of the source operand fields.

Step S205: Store the operation code in the compiled instruction.

Step S206, output the compiled instruction.

Step S301: Classify the instruction before compilation according to the function to be executed by each instruction before compilation, and obtain a classification result.

Step S302, if it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored to the designated coding position.

Step S303, if it is determined that the field of the same type includes the source operation digital segment, the number and type of the source operation digital segment are determined according to the classification result.

Step S304: Mark the type of each instruction before compilation to generate a first identification code corresponding to each instruction before compilation.

Here, marking the type of instruction means that the compilation unit generates a corresponding identification code according to the type of instruction. For example, instructions can be divided into four types: logic calculation instructions, data upload/download instructions, jump instructions, and special instructions, and then generate four corresponding marks according to the four types, respectively corresponding to logic calculation instructions The first identification code one 00, the data upload/download instruction corresponds to the first identification code two 01, the jump instruction corresponds to the first identification code three 10, and the special instruction corresponds to the first identification code four 11. Use the above identification code as the first part of the opcode field encoding of the corresponding instruction.

Step S305: Generate a corresponding second identification code according to the number and type of the source operation digital field.

Here, according to the number and type of source operands, the instructions are divided into logical calculation instructions, data upload/download instructions, jump instructions and special instructions. The four types are divided into eight types as an example. Respectively: instructions that do not require source operands or immediate operands are of type one; instructions that only need to operate on a source register in the form of a condition register are of type two; only need to operate on a source operation in the form of an ordinary register The instruction of the number is type three; the instruction that only needs to operate a source operand in the form of memory is type four; the instruction that needs to operate a source operand in the form of a common register and a source operand in the form of memory is type five; The instructions of the source operand in the form of a common register and the source operand in the form of a condition register are of type six; the instruction of the source operand in the form of two ordinary registers is of type seven; the source operand in the form of a memory and one The instruction of the source operand in the form of a condition register is type eight.

The compilation unit classifies the instructions according to the number and type of source operands to obtain a classification result, and obtains a corresponding identification code for the classification result. Taking the above eight types as examples, type one corresponds to the second identification code one 000, type two corresponds to the second identification code two 001, type three corresponds to the second identification code three 010, type four corresponds to the second identification code four 011, and type five Corresponding to the second identification code five 100, type six corresponds to the second identification code six 101, type seven corresponds to the second identification code seven 110, and type eight corresponds to the second identification code eight 111. Use the above identification code as the second part of the opcode field encoding of the corresponding instruction.

Step S306: Combine the first identification code and the second identification code to generate a corresponding operation code.

Here, the first part of the opcode field code generated through the above steps and the second part of the opcode field code may be combined to generate a corresponding opcode.

The above steps S304 to S306 provide a way to realize the step of “generating a corresponding operation code according to the type of each pre-compilation instruction, the number and type of the source operand fields”. In this way, it is possible to directly associate the operation code with the type of the instruction and the number and type of source operation digit fields, so as to realize the classification and acquisition of the instruction source operand according to the instruction operation code.

In step S307, the operation code is stored in the compiled instruction.

Step S308, output the compiled instruction.

FIG. 2 is a second schematic flowchart of a method for processing instruction data provided by an embodiment of the present application. As shown in FIG. 2, the method includes:

Step S21: Determine the operation code in the compiled instruction.

Here, after receiving the compiled instruction, the decoding unit may determine the corresponding operation code from the compiled instruction.

Step S22: Determine the type of the instruction and the attribute information of the field in the instruction according to the operation code.

Here, the decoding unit obtains the compiled instruction, and can parse out the corresponding operation code from the instruction, and according to the operation code, determine the type of the instruction and the attribute information of the field in the instruction.

In step S23, according to the attribute information of the field, the corresponding type of field is determined from the specified coding position in the instruction.

Here, the field is a designated encoding position stored in the compiled instruction, and the decoding unit may directly determine the corresponding type of field from the designated encoding position according to the attribute information of the field.

Step S24: Obtain the corresponding operand according to the corresponding type of field, and output the operand.

Here, after the field of the corresponding type is determined based on the above steps, the corresponding operand can be directly obtained from the corresponding register, and the obtained operand can be processed accordingly.

In the embodiment of the present application, the operation code in the compiled instruction is determined, according to the operation code, the type of the instruction and the attribute information of the field in the instruction are determined, and according to the attribute information of the field, the corresponding type is determined from the specified coding position in the instruction Field, get the corresponding operand according to the corresponding type of field, and output the operand. The decoding unit can directly intercept the corresponding operand from the compiled instruction without determining the type of the instruction, and then determine the corresponding operand according to the type of the instruction, which can reduce the judgment step and the complexity of processing the operand.

Step S401: Determine the operation code in the compiled instruction.

Step S402, if it is detected that the instruction needs to obtain the source operation digital segment, the operation code corresponding to the instruction that needs to obtain the source operation digital segment is parsed to obtain a parsing result.

Here, the decoding unit determines whether the source operand needs to be obtained according to the operation code. When the source operand needs to be obtained, the operation code corresponding to the instruction that needs to obtain the source operation digit field is parsed to obtain the analysis result.

Step S403: According to the analysis result, determine the type of the instruction and the attribute information of the source operation digital field.

Here, since the operation code includes the first identification code and the second identification code, the type of the instruction may be determined according to the first identification code, and the attribute information of the source operation digital field may be determined according to the second identification code.

The above steps S402 to S403 provide a way to implement the step of “determining the type of the instruction and the attribute information of the field in the instruction according to the operation code”. In this mode, if an instruction needs to be acquired for the source operation digital segment, the operation code corresponding to the instruction for the source operation digital segment needs to be obtained for analysis, and the analysis result is obtained. Based on the analysis result, the type of the instruction and the attribute information of the source operation digital segment are determined. By parsing the opcode, you can directly obtain the type of instruction and the attribute information of the source operand field, which can reduce the complexity of decoding.

Step S404, according to the attribute information of the field, determine the corresponding type of field from the specified coding position in the instruction.

Step S405: Obtain the corresponding operand according to the corresponding type of field, and output the operand.

Step S501: Determine the operation code in the compiled instruction.

Step S502, if it is detected that the instruction needs to obtain the source operation digital segment, the operation code corresponding to the instruction that needs to obtain the source operation digital segment is parsed to obtain a parsing result.

Step S503: According to the analysis result, determine the type of the instruction and the attribute information of the source operation digital field.

Step S504: Determine the type of the instruction according to the first identification code parsed from the operation code.

Here, the decoding unit parses the first part of the operation code, that is, the first identification code of the operation code, to determine the type of the instruction.

Step S505: Determine the number and type of the source operation digital field according to the second identification code parsed from the operation code.

Here, the decoding unit parses the second part of the operation code, that is, parses the second identification code of the operation code, and can determine the number and type of source operation digital fields.

Step S506, according to the number and type of the source operation digital field, determine the field of the corresponding type from the designated coding position in the instruction.

Here, the field of the corresponding type can be determined from the designated coding position in the instruction according to the number and type of source operation digital fields. For example, for the source operand one is divided into three cases: the instruction does not need to obtain the source operand one, the instruction is transparently transmitted to the reading unit; the instruction needs to obtain the source operand one, and the source register number and the source code need to be intercepted from the instruction code Address; the instruction needs to get the source operand one, and the read address is fixed without other decoding operations. The source operand is divided into four cases: the instruction does not need to obtain the source operation two, and it is directly transmitted to the reading unit; the instruction needs to obtain the source operand two, and the number and address of the source register need to be intercepted from the instruction code; the instruction needs Obtain the source operand two, and the required source register is intercepted from the instruction code and converted; the instruction needs to obtain the source operand two, and the read address is fixed without other decoding operations.

The above steps S504 to S506 provide a way to implement the step of “determining a field of a corresponding type from a specified coding position in the instruction according to the attribute information of the field”. In this mode, the type of the instruction is determined according to the first identification code parsed from the operation code; the number and type of source operation digits are determined according to the second identification code parsed from the operation code; And type, determine the source operand field from the specified coding position in the instruction. The source operation digital segment can be directly determined from the designated encoding position in the instruction according to the number and type of the source operation digital segment, which can reduce the complexity of decoding.

Step S507: Acquire the corresponding operand according to the corresponding type of field, and output the operand.

Step S601: Determine the operation code in the compiled instruction.

Step S602, if it is detected that the instruction needs to obtain the source operation digital segment, the operation code corresponding to the instruction that needs to obtain the source operation digital segment is parsed to obtain a parsing result.

Step S603: According to the analysis result, determine the type of the instruction and the attribute information of the source operation digital field.

Step S604: Determine the type of the instruction according to the first identification code parsed from the operation code.

Step S605: Determine the number and type of the source operation digital field according to the second identification code parsed from the operation code.

Step S606: Determine the field of the corresponding type from the specified coding position in the instruction according to the number and type of the source operation digital field.

In step S607, according to the number and type of the source operation digital segment, the corresponding source operation digital segment is obtained from the designated coding position in the instruction.

Step S608: Determine the number and address of the source operand according to the source operand field.

Here, the decoding unit determines the source operation number segment according to the fixed position of the source operation number segment in the instruction encoding, and obtains the number and address of the source operation number and sends it to the reading unit.

Step S609: Acquire the source operand according to the number and address of the source operand, and output the source operand.

The above steps S608 to S609 provide a way to realize the step of “acquiring the corresponding operand according to the corresponding type of field and outputting the operand”. In this mode, the number and address of the source operand are determined according to the source operand field; according to the number and address of the source operand, the source operand is obtained and the source operand is output. According to the number and type of source operation digital segment, the source operation digital segment can be directly determined from the designated coding position in the instruction, and then the corresponding source operand can be directly obtained according to the source operation digital segment, which can reduce the complexity of decoding.

In other embodiments, the function of the instruction is determined according to the type of instruction, and the source operand is processed according to the function of the instruction.

FIG. 3 is a schematic flowchart of a method for processing an instruction source operand of a network processor according to an embodiment of the present application. As shown in FIG. 3, the method includes the following steps:

In step S31, the compilation unit places the same field between the instructions in a fixed position in the instruction code.

Here, first, the instructions are encoded using fixed-length encoding, and then each encoded instruction in the instruction set is segmented, and the instructions in the instruction set are classified according to function. Generally, the instructions of the network processor are divided into logical calculation types Instruction, data upload/download instruction, jump instruction and some special instructions. Then, according to the function of each type of instruction, confirm the field type required by each instruction.

In the embodiment of the present application, by adopting the fixed-length encoding method, the instructions can be converted into a format that is convenient for the compilation unit to store, and the decoding unit does not need to record the storage location and length of the instructions, and directly obtains the encoded instructions in the storage memory.

Among them, logical calculation instructions: usually have a destination register operation number field, ordinary register source operand one field, ordinary register source operand two field, immediate data source operand two field, etc.; data upload/download instructions: usually have a purpose Register operand field, conditional register source operand two field, memory source operand one field, memory source operand two field, immediate source operand two field, etc.; jump instruction: usually have label, condition register source operand Second-class fields; special instructions: usually complete operations such as network business table lookup, co-processing, etc., do not need the source to operate the digital field.

In step S32, the compilation unit judges and marks the type of the instruction and the source operand of the instruction, and generates an operation code corresponding to the instruction according to the marking.

Here, the compilation unit completes the judgment and marking of the type of instruction and the source operand of the instruction, and generates the corresponding instruction opcode, which is directly related to the type of instruction and the number and type of instruction source operands. The instruction opcode completes the classification and acquisition of instruction source operands.

Among them, judging the type of the instruction means: dividing the instruction into at least one type according to the function operation. For example, instructions can be divided into four types: logic calculation instructions, data upload/download instructions, jump instructions, and some special instructions.

Marking the type of instruction means that the compilation unit generates a corresponding mark according to the type of instruction. For example, instructions can be divided into four types: logic calculation instructions, data upload/download instructions, jump instructions, and special instructions, and then generate four corresponding marks according to the four types, respectively corresponding to logic calculation instructions Mark one 00, data upload/download instruction corresponds to marker two 01, jump instruction corresponds to marker three 10, and special instruction corresponds to marker four 11 as the first part of the opcode field encoding of the instruction.

Judging the source operand of an instruction refers to classifying the instruction according to the number and type of source operands.

Based on the number and type of source operands, the instructions are divided into logic calculation instructions, data upload/download instructions, jump instructions and special instructions. The four types are divided into eight types for example. The types are: : Instructions that do not require source operands or immediate operands are of type one; instructions that only need to operate on a source register in the form of a conditional register are of type two; those that only need to operate on a source register in the form of an ordinary register The instruction is type three; the instruction that only needs to operate a source operand in the form of memory is type four; the instruction that needs to operate a source operand in the form of an ordinary register and a source operand in the form of memory is type five; The source operand in the form of a condition register and the source operand in the form of a condition register are of type six; the instruction that needs to operate the source operand in the form of two ordinary registers is type seven; The form of source operand instructions is type eight.

The marking of the source operand of the instruction means that the compilation unit classifies the instruction according to the number and type of source operands, obtains a classification result, and marks the classification result. Taking the above eight types as an example, type one corresponds to mark 000, type two to mark two 001, type three to mark three 010, type four to mark four 011, type five to mark five 100, and type six to mark six 101, Type seven corresponds to mark seven 110, and type eight corresponds to mark eight 111, as the second part of the opcode field encoding of the instruction.

Step S33, the decoding unit determines whether the source operand needs to be obtained according to the operation code. When the source operand needs to be obtained, using the fixed position of the source operand in the instruction encoding, the decoding unit directly intercepts the source operand obtained in the instruction Number and address.

In the embodiment of the present application, the decoding unit judges the second part of the operation code, and the source operand is divided into three cases: the instruction does not need to obtain the source operand one, and the reading unit is directly transparently transmitted, which corresponds to the operation code The two parts of 000, 001 and 011; the instruction needs to obtain the source operand one, and the number and address of the source register need to be intercepted from the instruction code, corresponding to the 010, 100, 101 and 110 of the second part of the operation code of step S32 above; If the instruction needs to obtain the source operand one and the read address is fixed without other decoding operations, it corresponds to 111 in the second part of the operation code in step S32 above.

The source operand is divided into four cases: the instruction does not need to obtain the source operation two, and the read unit is directly transparently transmitted, which corresponds to 000 and 010 in the second part of the operation code of step S32 above; the instruction needs to obtain the source operand two, and If the source register number and address are intercepted from the instruction code, it corresponds to 110 in the second part of the opcode in step S32 above; the instruction needs to obtain the source operand two, and the required source register is intercepted from the instruction code and converted. The 001, 101 and 111 of the second part of the operation code of step S32 above; the instruction needs to obtain the source operand two, and the read address is fixed without other decoding operations, corresponding to 111 of the second part of the operation code of step S32 above.

The decoding unit needs to include three operation modes, in which, when intercepting the number and address of the source operation, the source operand two condition register of some instructions needs to be converted into an ordinary register operation.

In step S34, the decoding unit obtains the data of the source operand in the kernel register according to the number and address of the source operand, and sends it to the execution unit.

After the processing of the decoding unit is completed, the obtained number and address of the source operand are sent to the reading unit. The reading unit obtains the data of the source operand in the kernel register and sends it to the execution unit. Transparent transmission to the execution unit.

In step S35, after the execution of the execution unit is completed, the processing result is stored in the kernel register.

Here, the execution unit processes the instruction according to the instruction function and the source operand. After the processing is successful, the result is rewritten into the kernel register.

FIG. 4 is a schematic structural diagram of a device for processing an instruction source operand of a network processor according to an embodiment of the present application. As shown in FIG. 4, the device includes:

The compiling unit 41 is used to put the same field between instructions in a fixed position in the instruction code; to judge and mark the type of the instruction and the source operation of the instruction, and generate an operation code corresponding to the instruction according to the mark.

The decoding unit 42 is used to determine whether the instruction needs to obtain the source operation according to the operation code of the instruction. When the instruction needs to obtain the source operand, according to the fixed position of the source operand in the instruction encoding, complete The number and address of the source operand in the form are obtained and sent to the reading unit.

The reading unit 43 is configured to obtain the data of the source operand in the kernel register according to the number and address of the source operand of the instruction.

The execution unit 44 is configured to process the source operand according to the instruction function.

The output unit 45 is used to store the processing result in the kernel register.

In the embodiment of the present application, when the compiler converts the instruction into binary encoding, the same field between the instructions is placed in a fixed position in the instruction encoding to ensure that the same field between the instructions is aligned and encoded, so that when decoding the instruction , The decoding unit can directly intercept the number and address of the source operand, without first distinguishing each instruction type, and then obtain the source operand in the instruction encoding, so that the decoding unit does not need additional judgment logic, nor need to record the source operand in each instruction The location of the device greatly reduces the logic complexity of the decoding unit and saves chip resources.

Based on the foregoing embodiments, embodiments of the present application provide an apparatus for processing instruction data. The units included in the device and the subunits included in each unit can be implemented by a processor in a computer device; of course, it can also be implemented by a logic circuit; in the implementation process, the processor may be central Processor (CPU), microprocessor (MPU), digital signal processor (DSP) or field programmable gate array (FPGA), etc.

FIG. 5 is a schematic structural diagram 1 of a structure of an instruction data processing device provided by an embodiment of the present application. As shown in FIG. 5, the device includes:

The first storage list 51 is configured to, if it is determined that there are fields of the same type between instructions before compilation, during compilation, store the fields of the same type to a specified coding position.

The generating unit 52 is configured to generate a corresponding operation code according to the type of each instruction before compilation and the attribute information of the field of the same type.

The second storage unit 53 is configured to store the operation code in the compiled instruction.

The first output unit 54 is configured to output the compiled instruction.

In other embodiments, the generating unit is further configured to: if it is determined that the field of the same type includes a source operation digital field, determine the number and type of the source operation digital field; according to each The type of the instruction, the number and type of the source operation digital field, and generate the corresponding operation code.

In other embodiments, the apparatus further includes: a classification unit configured to classify the instructions before compilation according to the function to be performed by each instruction before compilation, and obtain a classification result; correspondingly, the The generating unit is further configured to: if it is determined that the field of the same type includes a source operation digital segment, determine the number and type of the source operation digital segment according to the classification result.

In other embodiments, the generating unit is further configured to: mark the type of each instruction before compilation, and generate a first identification code corresponding to each instruction before compilation; according to the The number and type of source operation digital fields generate a corresponding second identification code; the first identification code and the second identification code are combined to generate a corresponding operation code.

FIG. 6 is a second schematic structural diagram of a structure of an instruction data processing device provided by an embodiment of the present application. As shown in FIG. 6, the device includes:

The first determining unit 61 is configured to determine the operation code in the compiled instruction.

The second determining unit 62 is configured to determine the type of the instruction and the attribute information of the field in the instruction according to the operation code.

The third determining unit 63 is configured to determine the corresponding type of field from the specified encoding position in the instruction according to the attribute information of the field.

The second output unit 64 is configured to obtain a corresponding operand according to the corresponding type of field and output the operand.

In other embodiments, the second determining unit is further configured to: if it is detected that the instruction needs to obtain the source operation digital field, parse the operation code corresponding to the instruction that needs to obtain the source operation digital field to obtain the analysis result ; According to the analysis result, determine the type of the instruction and the attribute information of the source operation digital field.

In other embodiments, the third determining unit is further configured to: according to the first identification code parsed from the operation code, determine the type of the instruction; according to the parsed from the operation code The second identification code determines the number and type of the source operation digital field; according to the number and type of the source operation digital field, the source operation digital field is determined from the designated coding position in the instruction.

In other embodiments, the second output unit is further configured to: determine the number and address of the source operand according to the source operand field; and obtain the number based on the number and address of the source operand Describe the source operand, and output the source operand.

It should be noted that, in the embodiments of the present application, if the above instruction data processing method is implemented in the form of a software function module and sold or used as an independent product, it may also be stored in a computer-readable storage medium. Based on such an understanding, the technical solutions of the embodiments of the present application can be embodied in the form of software products in essence or part of contributions to the prior art. The computer software products are stored in a storage medium and include several instructions for A computer device is allowed to perform all or part of the methods described in the embodiments of the present application. The foregoing storage media include various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (Read Only Memory, ROM), a magnetic disk, or an optical disk. In this way, the embodiments of the present application are not limited to any specific combination of hardware and software.

Correspondingly, an embodiment of the present application provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the steps in the method for processing instruction data provided in the foregoing embodiments are implemented.

The description of the device embodiments of the present application is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the device embodiments of the present application, please refer to the description of the method embodiments of the present application for understanding.

It should be noted here that the above description of the storage medium and device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium and device embodiments of the present application, please refer to the description of the method embodiments of the present application for understanding.

It should be noted that FIG. 7 is a schematic structural diagram of a computer device according to an embodiment of the present application. As shown in FIG. 7, the computer device 70 includes at least a processor 71, a communication interface 72, and a memory 73.

The processor 71 generally controls the overall operation of the computer device 70.

The communication interface 72 can enable the computer device to communicate with other computer devices or servers through the network.

The memory 73 is configured to store instructions and applications executable by the processor 71, and may also cache data to be processed or processed by the modules in the processor 71 and the computer device 70 (for example, image data, audio data, voice communication data, and Video communication data) can be achieved through flash memory (FLASH) or random access memory (Random Access Memory, RAM).

Of course, the devices in the embodiments of the present application may also have other similar protocol interaction implementation cases. Without departing from the spirit and essence of the present application, those skilled in the art may make various corresponding responses according to the embodiments of the present application Changes and deformations, but these corresponding changes and deformations shall fall within the scope of protection of the claims appended to the method of this application.

Those skilled in the art should understand that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware. Moreover, the present application may take the form of a computer program product implemented on one or more computer usable storage media (including but not limited to disk storage and optical storage, etc.) containing computer usable program code.

This application is described with reference to flowcharts and/or block diagrams of methods, devices (systems), and computer program products according to embodiments of the application. It should be understood that each flow and/or block in the flowchart and/or block diagram and a combination of the flow and/or block in the flowchart and/or block diagram may be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, special-purpose computer, embedded processing machine, or other programmable data processing device to produce a machine that enables the generation of instructions executed by the processor of the computer or other programmable data processing device A device for realizing the functions specified in one block or multiple blocks of one flow or multiple flows of a flowchart and/or one block or multiple blocks of a block diagram.

These computer program instructions may also be stored in a computer readable memory that can guide a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including the instruction device, the instructions The device implements the functions specified in one block or multiple blocks in the flowchart one flow or multiple flows and/or block diagrams.

These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operating steps are performed on the computer or other programmable device to produce computer-implemented processing, which is executed on the computer or other programmable device The instructions provide steps for implementing the functions specified in one block or multiple blocks of the flowchart one flow or multiple flows and/or block diagrams.

It should be understood that “one embodiment” or “one embodiment” mentioned throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of the present application. Therefore, “in one embodiment” or “in one embodiment” appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics may be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the sequence numbers of the above processes does not mean that the execution order is sequential, and the execution order of each process should be determined by its function and inherent logic, and should not correspond to the embodiments of the present application The implementation process constitutes no limitation. The sequence numbers of the above embodiments of the present application are for description only, and do not represent the advantages and disadvantages of the embodiments.

It should be noted that in this article, the terms "include", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, It also includes other elements that are not explicitly listed, or include elements inherent to such processes, methods, objects, or devices. Without more restrictions, the element defined by the sentence "include one..." does not exclude that there are other identical elements in the process, method, article or device that includes the element.

In the several embodiments provided in this application, it should be understood that the disclosed device and method may be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the modules is only a division of logical functions. In actual implementation, there may be other divisions, for example, multiple modules or components may be combined, or Can be integrated into another system, or some features can be ignored, or not implemented. In addition, the coupling or direct coupling or communication connection between the displayed or discussed components may be indirect coupling or communication connection through some interfaces, devices or modules, and may be electrical, mechanical or other forms of.

The modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules; they may be located in one place or distributed to multiple network modules; Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

The above is only the implementation of this application, but the scope of protection of this application is not limited to this. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in this application. Covered within the scope of protection of this application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Industrial applicability

Embodiments of the present application provide an instruction data processing method and apparatus, device, and storage medium, where the method includes: if it is determined that there is a field of the same type between instructions before compilation, the same type is used during compilation Store the field in the specified coding position; generate the corresponding operation code according to the type of each pre-compiled instruction and the attribute information of the field of the same type; store the operation code in the compiled instruction; output The compiled instruction. In this way, the operation code is directly related to the type of the instruction and the number and type of the instruction source operand, so as to realize the classification and acquisition of the instruction source operand according to the instruction operation code.

Claims

An instruction data processing method, the method includes:

If it is determined that there are fields of the same type between the instructions before compilation, during compilation, the fields of the same type are stored to the specified coding position;

Generate a corresponding operation code according to the type of each instruction before compilation and the attribute information of the field of the same type;

Store the operation code in the compiled instruction;

Output the compiled instruction.
The method according to claim 1, wherein the generating the corresponding operation code according to the type of each instruction before compilation and the attribute information of the field of the same type includes:

If it is determined that the field of the same type includes the source operation digital field, determine the number and type of the source operation digital field;

According to the type of each pre-compiled instruction, the number and type of the source operand fields, a corresponding operation code is generated.
The method of claim 2, wherein the method further comprises:

Classify the pre-compilation instruction according to the function to be performed by each pre-compilation instruction, and obtain a classification result;

Correspondingly, if it is determined that the field of the same type includes a source operation digital field, determining the number and type of the source operation digital field includes:

If it is determined that the field of the same type includes the source operation digital field, the number and type of the source operation digital field are determined according to the classification result.
The method according to claim 3, wherein generating a corresponding operation code according to the type of each pre-compiled instruction and the number and type of the source operand fields includes:

Marking the type of each instruction before compilation to generate a first identification code corresponding to each instruction before compilation;

Generate a corresponding second identification code according to the number and type of the source operation digital field;

Combining the first identification code and the second identification code to generate a corresponding operation code.
An instruction data processing method, the method includes:

Determine the opcode in the compiled instruction;

According to the operation code, determine the type of the instruction and the attribute information of the field in the instruction;

According to the attribute information of the field, determine the corresponding type of field from the specified coding position in the instruction;

Obtain the corresponding operand according to the corresponding type of field, and output the operand.
The method according to claim 5, wherein the determining the type of the instruction and the attribute information of the field in the instruction according to the operation code includes:

If it is detected that the instruction needs to obtain the source operation digital segment, parse the operation code corresponding to the instruction that needs to obtain the source operation digital segment to obtain the analysis result;

According to the analysis result, the type of the instruction and the attribute information of the source operation digital segment are determined.
The method according to claim 6, wherein the determining the corresponding type of field from the specified coding position in the instruction according to the attribute information of the field includes:

Determine the type of the instruction according to the first identification code parsed from the operation code;

Determine the number and type of the source operation digital field according to the second identification code parsed from the operation code;

According to the number and type of the source operation digital field, the source operation digital field is determined from the designated coding position in the instruction.
The method according to claim 7, wherein the obtaining the corresponding operand according to the corresponding type of field and outputting the operand includes:

Determine the number and address of the source operand according to the source operand field;

According to the number and address of the source operand, the source operand is obtained, and the source operand is output.
An instruction data processing device, the device includes:

The first storage unit is configured to, if it is determined that there is a field of the same type between instructions before compilation, store the field of the same type to a specified coding position during compilation;

A generating unit configured to generate a corresponding operation code according to the type of each instruction before compilation and the attribute information of the field of the same type;

A second storage unit configured to store the operation code in the compiled instruction;

The first output unit is configured to output the compiled instruction.
An instruction data processing device, the device includes:

The first determining unit is configured to determine the operation code in the compiled instruction;

A second determining unit configured to determine the type of the instruction and the attribute information of the field in the instruction according to the operation code;

The third determining unit is configured to determine the corresponding type of field from the specified coding position in the instruction according to the attribute information of the field;

The second output unit is configured to obtain a corresponding operand according to the corresponding type of field and output the operand.
A computer device, the computer device at least includes a processor and a storage medium configured to store executable instructions, wherein:

The processor is configured to execute the stored executable instructions, and the executable instructions are configured to execute the processing method of the instruction data provided in any one of claims 1 to 10 above.
A computer-readable storage medium having computer-executable instructions stored therein, the computer-executable instructions configured to perform steps in a method for processing instruction data provided in any one of claims 1 to 10 above.