WO2020105135A1

WO2020105135A1 - Power supply device

Info

Publication number: WO2020105135A1
Application number: PCT/JP2018/042963
Authority: WO
Inventors: 暁▲チン▼ 張; 俊秀中野
Original assignee: 東芝三菱電機産業システム株式会社
Priority date: 2018-11-21
Filing date: 2018-11-21
Publication date: 2020-05-28
Also published as: JPWO2020105135A1; CN111771320B; JP6666526B1; US11245337B2; KR102382136B1; US20210057997A1; CN111771320A; KR20200106205A

Abstract

In this power supply device, a switch circuit (11) includes n (n ≧ 2) switching elements (SW) connected in series between an input node (N1) and an output node (N2). If an abnormality of at least one of an AC power supply (1) and the switch circuit (11) is detected in a state in which conduction commands to the n switching elements (SW) are output, a control device (20) controls a power converter (12) to convert the DC power of a power storage device (3) to an AC power synchronized with the AC power supplied from the AC power supply (1) during normal time and supplies the converted AC power to the output node (N2). The control device (20) further generates interruption commands for interrupting the n switching elements (SW) while the power converter (12) is performing power conversion, and detects, during the generation of the interruption commands, an abnormality of the interruption of the switch circuit (11) on the basis of the inter-terminal voltages of the n switching elements (SW).

Description

Power supply

This invention relates to a power supply device.

Japanese Patent Laying-Open No. 2-106158 (Patent Document 1) discloses a power conversion device having a circuit configured by connecting a plurality of self-turn-off type semiconductor switching elements in series. In Patent Document 1, detection means for detecting the inability to cut off is provided for each semiconductor switching element. The detection means is configured to detect the inability to cut off by using the voltage across the terminals of a GTO (Gate Turn-Off thyristor) which is a semiconductor switching element.

JP-A-2-106158

There is an instantaneous power failure compensation device (Multiple Power Compensator) as a power supply device for supplying AC power to a load. An instantaneous power failure compensator is generally connected between an AC power supply and a load, and supplies stable AC power to the load without interruption even when a power failure or an instantaneous voltage drop occurs in the AC power supply. Can be configured.

In the instantaneous power failure compensator, a switch circuit configured by connecting a plurality of semiconductor switching elements in series is provided between the AC power supply and the load. Normally, the AC power of the AC power supply is supplied to the load by turning on the plurality of semiconductor switching elements. On the other hand, when a power failure or momentary voltage drop occurs or a control abnormality occurs, the semiconductor switching elements are shut off (OFF) to shut off the AC power supply, and the bidirectional converter supplies power from the power storage device to the load. Start.

In such a power supply device, when one of the plurality of semiconductor switching elements cannot be shut off, the voltage difference between the input terminal and the output terminal of the switch circuit is partially turned off inside the switch circuit. It may be applied intensively to the device. Therefore, a means for detecting the inability to cut off the semiconductor switching element is required.

However, when the switch circuit is cut off in the power supply device, the output voltage of the switch circuit is supplied with an AC voltage that is synchronized with the AC voltage applied to the input side of the switch circuit, under the control of the bidirectional converter. Therefore, the input voltage and the output voltage of the switch circuit may be at the same voltage level. In such a case, a significant voltage difference does not occur between the terminals of the normally-off semiconductor switching element inside the switch circuit. Therefore, as described in the above-mentioned Patent Document 1, if the terminal voltage of the semiconductor switching element is used, there is a concern that the interruption failure may be erroneously detected.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to prevent an abnormality in a power supply device from interrupting a switch circuit having a plurality of semiconductor switching elements connected in series. It is to detect accurately.

According to the present invention, the power supply device that supplies power to the load includes a switch circuit, a power converter, and a control device that controls the switch circuit and the power converter. The switch circuit has an input node connected to the AC power supply and an output node connected to the load. The power converter is configured to perform bidirectional power conversion between AC power output to the output node and DC power input to and output from the power storage device. The switch circuit includes n (n is an integer of 2 or more) switching elements connected in series between an input node and an output node. The control device controls the electric power converter to control the electric power when an abnormality is detected in at least one of the AC power supply and the switch circuit in a state in which a conduction command for conducting the n switching elements is output. It is configured to convert the DC power of the storage device to AC power that is synchronized with the AC power supplied from the AC power supply during normal operation and supply the AC power to the output node. The control device further generates a cutoff command for cutting off the n switching elements during execution of the power conversion in the power converter, and the inter-terminal voltage of the n switching elements is generated during the cutoff command. Based on this, an abnormality regarding the cutoff of the switch circuit is detected.

According to the present invention, in the power supply device, it is possible to accurately detect an abnormality regarding interruption of a switch circuit having a plurality of semiconductor switching elements connected in series.

It is a figure which shows schematic structure of the power supply device according to Embodiment 1 of this invention. It is a figure for demonstrating the electric power supply path at the time of normal. It is a figure for explaining a power supply course at the time of abnormalities. 6 is a flowchart illustrating a control process of the power supply device according to the first embodiment. It is a block diagram for demonstrating the 1st structural example of the determination part which performs the disconnection abnormality determination process shown to step S05 of FIG. It is a block diagram for demonstrating the 2nd structural example of the determination part which performs the disconnection abnormality determination process shown to step S05 of FIG. It is a block diagram for demonstrating the 3rd example of a structure of the determination part which performs the interruption | blocking abnormality determination process shown to step S05 of FIG. It is a figure which shows the result of having compared the aspect of the disconnection abnormality which the determination part of the 1st-3rd control structural example can detect. It is a block diagram for demonstrating the 4th structural example of the determination part which performs the disconnection abnormality determination process shown to step S05 of FIG. 9 is a flowchart illustrating a control process of the power supply device according to the fourth embodiment.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings will be denoted by the same reference numerals, and the description thereof will not be repeated in principle.

[Embodiment 1]
1 is a diagram showing a schematic configuration of a power supply device according to a first embodiment of the present invention.

Referring to FIG. 1, power supply device 10 is connected between AC power supply 1 and load 2, and is configured to receive AC power from AC power supply 1 and supply AC power to load 2. The power supply device 10 is applied to, for example, a device (for example, a momentary power failure compensation device) that supplies stable AC power to the load 2 without interruption in the event of a power failure or an instantaneous voltage drop of the AC power supply 1. obtain. Although only the portion related to one-phase AC power is shown in FIG. 1, the power supply device 10 may receive three-phase AC power and output three-phase AC power.

The AC power supply 1 is typically a commercial AC power supply, and supplies AC power having a commercial frequency to the power supply device 10. The load 2 is driven by AC power of commercial frequency supplied from the power supply device 10.

As shown in FIG. 1, the power supply device 10 includes an input terminal T1, an output terminal T2, a DC terminal T3, a switch circuit 11, a bidirectional converter 12,

voltage detectors

14, 16 and 18, and a control device 20.

The input terminal T1 is electrically connected to the AC power supply 1 and receives the AC power of the commercial frequency supplied from the AC power supply 1. The output terminal T2 is connected to the load 2. The DC terminal T3 is connected to the battery 3. The battery 3 corresponds to an example of “power storage device” that stores DC power. As the power storage device, an electric double layer capacitor may be connected to the DC terminal T3 instead of the battery 3.

The switch circuit 11 is connected between the input terminal T1 and the output terminal T2, and is configured to switch electrical connection and disconnection between the AC power supply 1 and the load 2. Specifically, the switch circuit 11 has an input node N1 and an output node N2, and n (n is an integer of 2 or more) semiconductor switching elements SW1 to SWn. The input node N1 is connected to the input terminal T1 and the output node N2 is connected to the output terminal T2.

The n semiconductor switching elements SW1 to SWn are connected in series between the input node N1 and the output node N2. Conduction (ON) and interruption (OFF) of the semiconductor switching elements SW1 to SWn are controlled by control signals S1 to Sn input from the control device 20, respectively. Hereinafter, when the semiconductor switching elements SW1 to SWn are collectively described, they are also simply referred to as “semiconductor switching elements SW”, and when the control signals S1 to Sn are collectively described, they are simply referred to as “control signal S”. Also called.

The semiconductor switching element SW is turned on by the control signal S of H (logical high) level and turned off by the control signal S of L (logical low) level. That is, the control signal S of H level corresponds to an ON command (conduction command) for turning on the semiconductor switching element SW, and the control signal S of L level is an OFF command (interruption command) for turning off the semiconductor switching element SW. Equivalent to.

For the semiconductor switching element SW, FWD (Freewheeling Diode) should be connected in anti-parallel to any self-extinguishing type switching element such as IGBT (Insulated Gate Bipolar Transistor), GCT (Gate Commutated Turn-off) thyristor. Can be configured by. In the present embodiment, the semiconductor switching element is used as the “switching element” in the switch circuit 11. However, if the control device 20 controls ON / OFF to control passage and interruption of current, other switching elements are used. Can be used instead of the semiconductor switching element SW.

The bidirectional converter 12 is connected between the output node N2 of the switch circuit 11 and the DC terminal T3. Bidirectional converter 12 is configured to perform bidirectional power conversion between AC power output to output node N2 and DC power input / output to / from battery 3. The bidirectional converter 12 corresponds to an example of “a power converter”.

The bidirectional converter 12 converts the AC power from the AC power supply 1 into DC power and stores the DC power in the battery 3 during normal operation when the AC power is supplied from the AC power supply 1. On the other hand, in the event of a power outage in which the supply of AC power from the AC power supply 1 is stopped or an instantaneous voltage drop of the AC power supply 1 occurs, the bidirectional converter 12 converts the DC power of the battery 3 into AC power of commercial frequency, and AC power is applied to the load 2.

The bidirectional converter 12 has a plurality of semiconductor switching elements, although not shown. ON / OFF of the plurality of semiconductor switching elements is controlled by a control signal generated by the control device 20. The control signal is a pulse signal train and is a PWM (Pulse Width Modulation) signal. The bidirectional converter 12 turns on or off a plurality of semiconductor switching elements at a predetermined timing in response to a control signal to generate AC power output at the output node N2 and DC power input / output at the DC terminal T3. Bi-directional power conversion can be performed between.

The voltage detector 14 detects an AC voltage (hereinafter, also referred to as “input voltage Vin”) input to the input node N1 of the switch circuit 11. The voltage detector 16 detects an AC voltage (hereinafter, also referred to as “output voltage Vout”) output to the output node N2 of the switch circuit 11.

The voltage detector 18 detects the terminal voltage of the semiconductor switching element SW. In the example of FIG. 1, voltage detector 18 is configured to detect the voltage across the collector and emitter terminals of the IGBT. The detected values V1 to Vn detected by the voltage detector 18 correspond to the inter-terminal voltages of the semiconductor switching elements SW1 to SWn, respectively. In the following, when the inter-terminal voltages V1 to Vn are collectively described, they are also simply referred to as “inter-terminal voltage V”.

The controller 20 turns on / off the switch circuit 11 (semiconductor switching element SW) and turns on / off the bidirectional converter 12 by using a command from a host controller (not shown) or a detection signal input from the

voltage detectors

14, 16 and 18. Control driving. The control device 20 can be composed of, for example, a microcomputer. As an example, the control device 20 includes a CPU (Central Processing Unit) and a memory (not shown), and executes the control operation described below by software processing by the CPU executing a program stored in advance in the memory. You can Alternatively, part or all of the control operation can be realized by hardware processing using a built-in dedicated electronic circuit or the like instead of software processing.

Next, the operation of power supply device 10 according to the present embodiment will be described with reference to FIGS. 2 and 3.

FIG. 2 is a diagram for explaining the power supply path during normal times.
Referring to FIG. 2, in a normal state in which power is normally supplied from AC power supply 1, control device 20 controls semiconductor switching elements SW1 to SWn forming switch circuit 11 to control signals S1 to Sn at H level. (Conduction command) is given respectively. When the semiconductor switching elements SW1 to SWn are turned on, the switch circuit 11 is turned on, and the AC power supply 1 and the load 2 are electrically connected. As a result, the AC power from the AC power supply 1 is supplied to the load 2 via the switch circuit 11 as indicated by the arrow in the figure.

The AC power from the AC power supply 1 is further converted into DC power by the bidirectional converter 12 and stored in the battery 3. When the voltage between the terminals of the battery 3 reaches a predetermined charging stop voltage, the control device 20 stops the operation of the bidirectional converter 12.

FIG. 3 is a diagram for explaining the power supply path at the time of abnormality.
Referring to FIG. 3, when a power failure occurs when the supply of AC power from AC power supply 1 is stopped, or when an instantaneous voltage drop occurs in which the supply voltage of AC power supply 1 instantaneously drops, the DC power of battery 3 is It is converted into AC power by the directional converter 12, and the AC power is supplied to the load 2 via the output terminal T2.

At this time, in the control device 20, the AC voltage (output voltage Vout) output from the bidirectional converter 12 to the output node N2 is input to the input node N1 from the AC power supply 1 before the abnormality occurs (input voltage Vin ), The power conversion in the bidirectional converter 12 is controlled. According to this, it is possible to prevent the voltage from fluctuating or being instantaneously interrupted when the power supply path is switched.

During the operation of the bidirectional converter 12, the control device 20 gives the L level control signals S1 to Sn (cutoff command) to the semiconductor switching elements SW1 to SWn of the switch circuit 11, respectively. When the semiconductor switching elements SW1 to SWn are turned off, the switch circuit 11 is turned off, and the AC power supply 1 and the load 2 are electrically cut off.

As a result, when an abnormality occurs, the DC power of the battery 3 is supplied to the load 2 via the bidirectional converter 12 as indicated by the arrow in the figure. When the voltage between terminals of battery 3 drops to a predetermined discharge stop voltage, control device 20 stops the operation of bidirectional converter 12.

Even when an element failure or control abnormality occurs in the switch circuit 11, the bidirectional converter 12 is operated and the switch circuit 11 is turned off, so that the load 2 is connected to the load 2 using the power supply path shown in FIG. It is possible to continue supplying stable power. As a result, even when an abnormality occurs in the AC power supply 1 or the switch circuit 11, it is possible to continuously supply stable power to the load 2 without interruption.

However, in the case where an abnormality that makes it impossible to cut off occurs in some of the semiconductor switching elements SW1 to SWn, during the generation of the cutoff command, some of the semiconductor switching elements SW do not turn off, and while maintaining the on state, There may be a non-uniform state in which the remaining semiconductor switching elements SW are turned off. When an irregular state occurs in the semiconductor switching elements SW1 to SWn connected in series as described above, the voltage difference between the input node N1 and the output node N2 is intensively applied to the remaining semiconductor switching elements SW in the off state. Will be done. Therefore, there is a concern that an overvoltage is applied to the remaining semiconductor switching elements SW.

Therefore, in the present embodiment, the control device 20 is configured to detect an abnormality regarding the disconnection of the switch circuit 11 during the generation of the disconnection command. FIG. 4 is a flowchart illustrating a control process of power supply device 10 according to the first embodiment. The control device 20 periodically executes the control process shown in FIG.

Referring to FIG. 4, in step S01, control device 20 determines whether or not the voltage drop of AC power supply 1 has occurred. Specifically, control device 20 determines whether a power failure or an instantaneous voltage drop has occurred in AC power supply 1, based on the detected value of input voltage Vin by voltage detector 14. For example, control device 20 determines whether a power failure or an instantaneous voltage drop has occurred by comparing the maximum value (or effective value) of the detected values of voltage detector 14 with a predetermined reference value.

When the voltage drop of the AC power supply 1 has not occurred (NO determination in S01), the control device 20 determines in step S02 whether or not the switch circuit 11 is abnormal. For example, when a control abnormality occurs due to a failure of at least one semiconductor switching element SW or a failure of an IGBT gate drive circuit included in the semiconductor switching element SW, the control device 20 determines that the switch circuit 11 is abnormal.

When the switch circuit 11 is normal (when NO is determined in S02), the control device 20 gives a conduction instruction to the semiconductor switching element SW of the switch circuit 11 in step S06.

On the other hand, when the voltage drop of the AC power supply 1 is occurring (when YES is determined in S01) or when the abnormality of the switch circuit 11 is occurring (when YES is determined in S02), the control device 20 performs the steps. Proceeding to S03, the DC power of the battery 3 is converted into AC power of commercial frequency by the control of the bidirectional converter 12, and the AC power is given to the load 2. In the control device 20, the AC voltage (output voltage Vout) output from the bidirectional converter 12 to the output node N2 is synchronized with the AC voltage (input voltage Vin) applied to the input node N1 from the AC power supply 1 before the voltage drop. In such a manner, the power conversion in the bidirectional converter 12 is controlled. The battery 3 is switched from charging by the AC power from the AC power supply 1 to discharging for supplying power to the load 2.

During the operation of the bidirectional converter 12, the control device 20 issues a cutoff command to the semiconductor switching elements SW1 to SWn of the switch circuit 11 in step S04. During the generation of the cutoff command, in step S05, control device 20 executes a cutoff abnormality determination process for determining whether there is an abnormality in the cutoff of switch circuit 11.

FIG. 5 is a block diagram for explaining a first configuration example of a determination unit that executes the disconnection abnormality determination processing shown in step S05 of FIG. The function of each block shown in FIG. 5 can be realized by software processing and / or hardware processing by the control device 20.

Referring to FIG. 5, the determination unit 22A includes a subtractor 30, a comparator 32, n comparators 34_1 to 34_n, a logical sum circuit 36, and a logical product circuit 38.

The subtractor 30 calculates the voltage difference between the detected value of the input voltage Vin by the voltage detector 14 and the detected value of the output voltage Vout by the voltage detector 16. The comparator 32 compares the voltage difference between the input voltage Vin and the output voltage Vout with the threshold value Vth1, and outputs a signal indicating the comparison result. When the voltage difference is larger than the threshold value Vth1, the output signal of the comparator 32 becomes H level, and when the voltage difference is smaller than the threshold value Vth1, the output signal of the comparator 32 becomes L level. The threshold value Vth1 corresponds to an example of “first threshold value”.

The n comparators 34_1 to 34_n receive the inter-terminal voltages V1 to Vn of the semiconductor switching element by the n voltage detectors 18, respectively. When the comparators 34_1 to 34_n are collectively described, they are also simply referred to as “comparators 34”. The comparator 34 compares the inter-terminal voltage V of the corresponding semiconductor switching element SW with the reference value Vref1 and outputs a signal indicating the comparison result. When the terminal voltage V is smaller than the reference value Vref1, the output signal of the comparator 34 becomes H level, and when the terminal voltage V is larger than the reference value Vref1, the output signal of the comparator 34 becomes L level. The reference value Vref1 corresponds to an example of the “reference value”.

The logical sum circuit 36 calculates the logical sum (OR) of the output signals of the comparators 34_1 to 34_n and outputs a signal indicating the calculation result.

The logical product circuit 38 calculates the logical product (AND) of the output signal of the comparator 32 and the output signal of the logical sum circuit 36, and outputs a signal indicating the calculation result. The output signal of the AND circuit 38 is output to the outside of the power supply device 10 (for example, the host controller) as the detection signal DET.

According to the determination unit 22A, when the voltage difference between the input voltage Vin and the output voltage Vout is larger than the threshold value Vth1, p (1 ≦ p ≦ n) semiconductor switching elements out of the n semiconductor switching elements SW1 to SWn. When the voltage V between the terminals of SW is smaller than the reference value Vref1, the H-level detection signal DET is output.

According to this, when the input voltage Vin decreases due to the abnormality of the AC power supply 1 and the bidirectional converter 12 generates the output voltage Vout, the voltage difference between the input voltage Vin and the output voltage Vout becomes larger than the threshold value Vth1. In this state, a cutoff command is given to the n semiconductor switching elements SW1 to SWn. When the semiconductor switching element SW is normally turned off in accordance with the cutoff command, the terminal voltage V of the semiconductor switching element SW becomes larger than the reference value Vref1. On the other hand, when the semiconductor switching element SW has an abnormality such that the semiconductor switching element SW cannot be shut off, the semiconductor switching element SW maintains the ON state, so that the inter-terminal voltage V becomes smaller than the reference value Vref1.

When p semiconductor switching elements SW (1 ≦ p ≦ n) that cannot be interrupted are included among the n semiconductor switching elements SW1 to SWn, the determination unit 22A outputs the H-level detection signal DET. ..

According to the disconnection abnormality determination processing by the determination unit 22A, when the voltage difference between the input voltage Vin and the output voltage Vout is smaller than the threshold value Vth1, the voltage across the terminals of the semiconductor switching element SW that is normally turned off is significant. Since there is no voltage difference, it is not possible to detect the disconnection abnormality.

More specifically, the output voltage Vout is generated by the bidirectional converter 12 due to the occurrence of an abnormality in the switch circuit 11 (however, the AC power supply 1 is normal) (S03 in FIG. 4), and a cutoff command is sent to the switch circuit 11. When output (S04 in FIG. 4), since the input voltage Vin and the output voltage Vout are at the same level, the inter-terminal voltage V of the normally-off semiconductor switching element SW becomes a value close to zero voltage. .. Therefore, a significant difference does not appear between the terminal voltage V of the semiconductor switching element SW that cannot be interrupted and the terminal voltage V of the semiconductor switching element SW that is in the OFF state, and as a result, the disconnection abnormality can be detected. Becomes difficult.

However, in such a situation, the situation in which an overvoltage is applied to the semiconductor switching element SW that is in the off state does not occur, so it is considered that there is no problem due to the fact that the disconnection abnormality cannot be detected.

It should be noted that, according to the conventional technique for detecting the disconnection abnormality for each semiconductor switching element based on the voltage between the terminals, when the voltage between the terminals of the semiconductor switching element SW that is normally turned off is small, the semiconductor switching element SW cannot be disconnected. May be falsely detected. On the other hand, the determination unit 22A is configured to detect the disconnection abnormality based on the inter-terminal voltages V1 to Vn of the n semiconductor switching elements SW1 to SWn, and thus such erroneous detection can be avoided.

As described above, according to the power supply device 10 according to the first embodiment, it is possible to accurately detect the abnormality regarding the interruption of the semiconductor switching element forming the switch circuit.

[Embodiment 2]
In the second embodiment, a second configuration example of the determination unit that executes the cutoff abnormality determination process will be described.

FIG. 6 is a block diagram for explaining a second configuration example of the determination unit that executes the disconnection abnormality determination processing shown in step S05 of FIG. The function of each block shown in FIG. 6 can be realized by software processing and / or hardware processing by the control device 20.

Referring to FIG. 6, the determination unit 22B includes n comparators 40_1 to 40_n, a logical sum circuit 42, and

logical product circuits

44 and 46.

The n comparators 40_1 to 40_n receive the inter-terminal voltages V1 to Vn of the semiconductor switching element by the n voltage detectors 18, respectively. When the comparators 40_1 to 40_n are collectively described, they are also simply referred to as “comparators 40”. The comparator 40 compares the terminal voltage V of the corresponding semiconductor switching element SW with the reference value Vref2, and outputs a signal indicating the comparison result. When the terminal voltage V is higher than the reference value Vref2, the output signal of the comparator 40 becomes H level, and when the terminal voltage V is smaller than the reference value Vref2, the output signal of the comparator 40 becomes L level. The reference value Vref2 corresponds to an example of the “reference value”.

The logical sum circuit 42 calculates the logical sum (OR) of the output signals of the comparators 40_1 to 40_n and outputs a signal indicating the calculation result.

The logical product circuit 44 calculates the logical product (AND) of the output signals of the comparators 40_1 to 40_n and outputs a signal indicating the calculation result.

The logical product circuit 46 calculates the logical product of the output signal of the logical sum circuit 42 and the inverted signal of the output signal of the logical product circuit 44, and outputs a signal indicating the calculation result. .. The output signal of the AND circuit 46 is output to the outside of the power supply device 10 (for example, the host controller) as the detection signal DET.

For example, q (1 ≦ q ≦ n−1) semiconductor switching elements SW cannot be turned off and the remaining (n−q) semiconductor switching elements SW1 to SWn are turned off. It is assumed that each semiconductor switching element SW is normally turned off.

In this case, the inter-terminal voltage V of the q semiconductor switching elements SW becomes smaller than the reference value Vref2, while the inter-terminal voltage V of the (n−q) semiconductor switching elements SW becomes larger than the reference value Vref2. .. Therefore, the logical sum circuit 42 outputs an H level signal and the logical product circuit 44 outputs an L level signal. As a result, the logical product circuit 46 outputs the H level detection signal DET. Is output.

That is, according to the determination unit 22B, when the inter-terminal voltage V of the q (1 ≦ q ≦ n−1) semiconductor switching elements SW out of the n semiconductor switching elements SW1 to SWn is smaller than the reference value Vref2. Then, the H-level detection signal DET is output.

According to the disconnection abnormality determination processing by the determination unit 22B, when all the n semiconductor switching elements SW1 to SWn cannot be disconnected, the detection signal DET is received by receiving the L level output signal of the AND circuit 42. Since it becomes L level, it is not possible to detect the disconnection abnormality. Considering that the probability that the n semiconductor switching elements SW cannot be interrupted at the same time is extremely low, it is considered that there is no defect due to the inability to detect the disconnection abnormality.

Further, according to the disconnection abnormality determination processing by the determination unit 22B, similarly to the determination unit 22A, when the voltage difference between the input voltage Vin and the output voltage Vout is small, the voltage V between the terminals of the semiconductor switching element SW that cannot be interrupted. And a voltage V between the terminals of the semiconductor switching element SW that has been normally turned off do not appear to be significantly different, which makes it difficult to detect the disconnection abnormality. However, in such a situation, a situation in which an overvoltage is applied to the semiconductor switching element SW that is in the off state does not occur, and thus it is considered that there is no problem due to the detection of the disconnection abnormality.

In the conventional technique for detecting the disconnection abnormality for each semiconductor switching element based on the voltage across the terminals, when the voltage V between the terminals of the semiconductor switching element SW that is normally turned off is small, the semiconductor switching element SW cannot be disconnected. May be erroneously detected. On the other hand, the determination unit 22B is configured to detect the disconnection abnormality based on the inter-terminal voltages V1 to Vn of the n semiconductor switching elements SW1 to SWn, and thus such erroneous detection can be avoided.

As described above, according to the power supply device 10 according to the second embodiment, it is possible to accurately detect the abnormality regarding the interruption of the semiconductor switching element forming the switch circuit.

[Third Embodiment]
In the third embodiment, a third configuration example of the determination unit that executes the cutoff abnormality determination process will be described.

FIG. 7 is a block diagram for explaining a third configuration example of the determination unit that executes the disconnection abnormality determination processing shown in step S05 of FIG. The function of each block shown in FIG. 7 can be realized by software processing and / or hardware processing by the control device 20.

Referring to FIG. 7, the determination unit 22C includes n comparators 50_1 to 50_n, n AND circuits 52_1 to 52_n, and an OR circuit 54.

The n comparators 40_1 to 40_n receive the inter-terminal voltages V1 to Vn of the semiconductor switching element by the n voltage detectors 18, respectively. When the comparators 40_1 to 40_n are collectively described, they are also simply referred to as “comparators 40”. The comparator 40 compares the terminal voltage V of the corresponding semiconductor switching element SW with the reference value Vref2, and outputs a signal indicating the comparison result. When the terminal voltage V is higher than the reference value Vref2, the output signal of the comparator 40 becomes H level, and when the terminal voltage V is smaller than the reference value Vref2, the output signal of the comparator 40 becomes L level.

The n logical product circuits 52_1 to 52_n calculate the logical product of the output signals of the n comparators 50_1 to 50_n, and output the signal tail indicating the calculation result. When the logical product circuits 52_1 to 52_n are collectively described, they are also simply referred to as the “logical product circuit 52”. In each AND circuit 52, one of the output signals of the n comparators 50 receives the inverted signal thereof. Regarding which comparator 50 output signal is inverted, the n AND circuits 52 are different from each other.

The logical sum circuit 54 calculates the logical sum (OR) of the output signals of the logical product circuits 52_1 to 52_n and outputs a signal indicating the calculation result. The output signal of the OR circuit 54 is output to the outside of the power supply device 10 (for example, the host controller) as the detection signal DET.

For example, in the state where the cutoff command is given to the n semiconductor switching elements SW1 to SWn, one of the semiconductor switching elements SW cannot be cut off, and the remaining (n-1) semiconductor switching elements SW are Suppose that it is turned off normally.

When any one of the above semiconductor switching elements SW is the semiconductor switching element SW1, the comparator 50_1 outputs an L level signal and the comparators 50_2 to 50_n output an H level signal. Accordingly, the AND circuit 52_1 receives the inverted signal of the output signal of the comparator 50_1 and the output signals of the comparators 50_2 to 50_n and outputs a signal of H level. On the other hand, each of the AND circuits 52_2 to 52_n receives the output signal of the comparator 50_1 and the output signals of the comparators 50_2 to 50_n (one of them is an inverted signal) and outputs an L level signal. As a result, the AND circuit 54 outputs the H-level detection signal DET.

That is, according to the determination unit 22C, when the inter-terminal voltage V of any one of the n semiconductor switching elements SW1 to SWn is smaller than the reference value Vref2, the H level detection signal is detected. DET will be output.

According to the disconnection abnormality determination processing by the determination unit 22C, when the two or more semiconductor switching elements SW cannot be shut off, the output signals of the n AND circuits 52 are all at the L level. Abnormality cannot be detected. Therefore, it is preferable that the disconnection abnormality determination processing by the determination unit 22C be applied to the power supply device 10 in which the plurality of semiconductor switching elements SW are unlikely to be unable to be disconnected at the same time.

Further, according to the disconnection abnormality determination processing by the determination unit 22C, similarly to the

determination units

22A and 22B, when the voltage difference between the input voltage Vin and the output voltage Vout is small, the terminals of the semiconductor switching element SW that cannot be shut off are disconnected. Since there is no significant difference between the voltage V and the voltage V between the terminals of the semiconductor switching element SW that has been normally turned off, it is difficult to detect the disconnection abnormality. However, in such a situation, a situation in which an overvoltage is applied to the semiconductor switching element SW that is in the off state does not occur, so it is considered that there is no problem due to the detection of the disconnection abnormality.

In the conventional technique for detecting the disconnection abnormality for each semiconductor switching element based on the voltage across the terminals, when the voltage V between the terminals of the semiconductor switching element SW that is normally turned off is small, the semiconductor switching element SW cannot be disconnected. May be erroneously detected. On the other hand, since the determination unit 22C is configured to detect the disconnection abnormality based on the inter-terminal voltages V1 to Vn of the n semiconductor switching elements SW1 to SWn, such erroneous detection can be avoided.

As described above, according to the power supply device 10 according to the third embodiment, it is possible to accurately detect an abnormality regarding interruption of the semiconductor switching element forming the switch circuit.

Here, the results of comparison of the forms of the cutoff abnormality that can be detected by the determination units 22A to 22C of the above-described first to third control configuration examples will be shown. FIG. 8 is a tabular form showing a summary of modes of disconnection abnormality that can be detected by each of the determination units 22A to 22C when the total number of semiconductor switching elements SW is n = 4.

V1 to V4 in the table represent the voltage across the terminals of the semiconductor switching elements SW1 to SW4. The value (H or L) of V1 to V4 indicates the output signal level of the comparator to which V1 to V4 is input.

For example, in the determination unit 22A, when the inter-terminal voltage V1 of the semiconductor switching element SW1 is smaller than the reference value Vref1 (V1 <Vref1), that is, when the semiconductor switching element SW1 cannot be shut off, the output signal of the corresponding comparator 34_1 Becomes H level. On the other hand, when the inter-terminal voltage V1 of the semiconductor switching element SW1 is larger than the reference value Vref1 (V1> Vref1), that is, when the semiconductor switching element SW1 is normally turned off, the output signal of the comparator 34_1 becomes L level.

In the determination unit 22B (or 22C), when the inter-terminal voltage V1 of the semiconductor switching element SW1 is smaller than the reference value Vref2 (V1 <Vref2), that is, when the semiconductor switching element SW1 cannot be shut off, the corresponding comparator 40_1 ( Alternatively, the output signal of 50_1) becomes L level. On the other hand, when the inter-terminal voltage V1 of the semiconductor switching element SW1 is larger than the reference value Vref2 (V1> Vref2), that is, when the semiconductor switching element SW1 is normally turned off, the output signal of the comparator 40_1 (or 50_1) is L. It becomes a level.

In FIG. 8, when any one of the four semiconductor switching elements SW1 to SW4 cannot be cut off (the number of abnormal elements = 1), two or more semiconductor switching elements SW cannot be cut off, and 1 When at least two semiconductor switching elements are normal (abnormal element number ≧ 2 and normal element number ≧ 1), when all four semiconductor switching elements SW cannot be shut off (total number abnormality), the determination unit 22A 22C indicate whether or not the disconnection abnormality can be detected. “OK” indicates that the determination unit can detect the disconnection abnormality, and “NG” indicates that the determination unit cannot detect the disconnection abnormality.

As shown in FIG. 8, according to the determination unit 22A, the disconnection abnormality is detected in the case where the number of abnormal elements = 1, the number of abnormal elements ≧ 2 and the number of normal elements ≧ 1, and all the cases of abnormalities. can do.

On the other hand, the determination unit 22B can detect the disconnection abnormality when the number of abnormal elements = 1 and when the number of abnormal elements ≧ 2 and the number of normal elements ≧ 1. It cannot be detected.

Further, according to the determination unit 22C, the cutoff abnormality can be detected when the number of abnormal elements = 1, but when the number of abnormal elements ≧ 2 and the number of normal elements ≧ 1 or when the total number is abnormal, the cutoff abnormality is detected. It cannot be detected.

As described above, the determination units 22A to 22C differ in the form of the cutoff abnormality that can be detected. Therefore, the determination units 22A to 22C can be selected depending on what kind of mode is desired to be detected. Alternatively, any one of the determination units 22A to 22C may be selected according to the total number n of the semiconductor switching elements SW included in the switch circuit 11. For example, when n is a relatively large value and it is determined that there is a low possibility that 100% abnormality will occur, the

determination unit

22B or 22C can be applied. Further, when it is determined that it is unlikely that two or more semiconductor switching elements SW cannot be shut off at the same time, the determination unit 22C can be applied. On the other hand, the determination unit 22A can be applied when there is a possibility that a total number of abnormalities will occur regardless of the size of n.

FIG. 9 is a block diagram for explaining a fourth configuration example of the determination unit that executes the disconnection abnormality determination processing shown in step S05 of FIG. With reference to FIG. 9, the determination unit 22 includes determination units 22A to 22C and a selection unit 24 for selecting any one of these determination units. The selection unit 24 is provided with a selection signal for selecting a determination unit to be used in the disconnection abnormality determination process from the host controller. The selection unit 24 is configured to output the detection signals of the

voltage detectors

14, 16, 18 to the determination unit selected by the selection signal.

[Embodiment 4]
According to the disconnection abnormality determination processing by the determination units 22A to 22C of the above-described first to third control configuration examples, when the voltage difference between the input voltage Vin and the output voltage Vout is small, the semiconductor switching element SW that cannot be interrupted. Since there is no significant difference between the inter-terminal voltage V and the inter-terminal voltage V of the semiconductor switching element SW that is normally turned off, it becomes difficult to detect the disconnection abnormality.

Therefore, as shown in FIG. 10, when the voltage difference between the input voltage Vin and the output voltage Vout is small, the configuration may be such that the cutoff abnormality is not detected.

FIG. 10 is a flowchart illustrating a control process of power supply device 10 according to the fourth embodiment. The flowchart of FIG. 10 is obtained by adding the process of step S07 to the flowchart of FIG.

Referring to FIG. 10, during the operation of bidirectional converter 12, control device 20 issues a cutoff command to semiconductor switching elements SW1 to SWn of switch circuit 11 in step S04.

During the generation of the interruption command, in step S06, control device 20 determines whether or not the voltage difference (| Vin−Vout |) between input voltage Vin and output voltage Vout is larger than threshold value Vth2. When | Vin−Vout |> Vth2 (when YES is determined in S07), the control device 20 proceeds to step S05, and executes a disconnection abnormality determination process that determines whether or not there is an abnormality in the disconnection of the switch circuit 11. On the other hand, when | Vin−Vout | ≦ Vth2 (when NO is determined in S07), control device 20 does not perform the disconnection abnormality determination process.

According to the power supply device 10 according to the fourth embodiment, when the voltage difference (| Vin−Vout |) is small, the voltage V between the terminals of the semiconductor switching element SW that is normally turned off is small. It is possible to avoid the possibility of being erroneously determined to be unblockable. In particular, since the

determination units

22B and 22C are configured to determine the disconnection abnormality by using only the inter-terminal voltage V of the semiconductor switching element SW, by applying the control processing of the fourth embodiment, the disconnection abnormality is erroneously made. Can be prevented from being detected.

It should be noted that in a situation where the voltage difference (| Vin−Vout |) is small, the situation in which an overvoltage is applied to the semiconductor switching element SW that is in the off state does not occur, so there is no problem due to the detection of the disconnection abnormality. Conceivable.

It should be noted that, regarding the plurality of embodiments described above, including the combinations not mentioned in the specification, the configurations described in the respective embodiments are appropriately combined within a range that does not cause inconsistency or contradiction. Is scheduled from the beginning of application.

The embodiments disclosed this time are to be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description but by the scope of the claims, and is intended to include meanings equivalent to the scope of the claims and all modifications within the scope.

1 AC power supply, 2 load, 3 battery (power storage device), 10 power supply device, 11 switch circuit, 12 bidirectional converter (power converter), 14, 16, 18 voltage detector, 20 control device, 22, 22A, 22B, 22C determination unit, 24 selection unit, 30 subtractor, 32, 34_1 to 34_n, 38, 40_1 to 40_n, 46, 50_1 to 50_n comparator, 52_1 to 52_n AND circuit, 36, 42, 54 OR circuit, DET detection signal, N1 input node, N2 output node, SW1 to SWn semiconductor switching element (switching element).

Claims

A power supply device for supplying power to a load,
A switch circuit having an input node connected to an AC power supply and an output node connected to the load;
A power converter configured to perform bidirectional power conversion between AC power output to the output node and DC power input to and output from a power storage device;
A controller for controlling the switch circuit and the power converter,
The switch circuit includes n (n is an integer of 2 or more) switching elements connected in series between the input node and the output node,
The control device outputs the electric power converter when an abnormality is detected in at least one of the AC power supply and the switch circuit in a state where a conduction command for conducting the n switching elements is output. By the control of, the direct current power of the power storage device is configured to be converted to alternating current power that is synchronized with the alternating current power supplied from the alternating current power source and supplied to the output node during normal operation,
The control device further generates a cutoff command for cutting off the n switching elements during execution of power conversion in the power converter, and the n switching elements during generation of the cutoff command. A power supply device that detects an abnormality regarding interruption of the switch circuit based on the voltage between the terminals.
In the case where the voltage difference between the input node and the output node exceeds a first threshold value, the control device sets p (1 ≦ p ≦ n) switching elements out of the n switching elements. The power supply device according to claim 1, wherein when the voltage between the terminals is smaller than a reference value, an abnormality regarding interruption of the switch circuit is detected.
The control device interrupts the switching circuit when the inter-terminal voltage of q (1 ≦ q ≦ (n−1)) switching elements among the n switching elements is smaller than a reference value. The power supply device according to claim 1, wherein the abnormality is detected.
The control device detects an abnormality regarding interruption of the switch circuit when a voltage between terminals of any one of the n switching elements becomes smaller than a reference value. 1. The power supply device according to 1.
The control device includes the following (a) when the voltage difference between the input node and the output node exceeds a first threshold value, and m (1 ≦ m ≦) of the n switching elements are used. n) a process of detecting an abnormality regarding interruption of the switch circuit when the voltage between the terminals of the switching element is smaller than a reference value;
(B) When the inter-terminal voltage of q switching elements (1 ≦ q ≦ (n−1)) of the n switching elements is smaller than a reference value, an abnormality regarding disconnection of the switch circuit is detected. Processing to detect,
(C) a process of detecting an abnormality regarding interruption of the switch circuit when a voltage between terminals of any one of the n switching elements becomes smaller than a reference value,
The power supply device according to claim 1, wherein any one of the above is selectively executed.
The control device does not detect an abnormality regarding the cutoff of the switch circuit when the voltage difference between the input node and the output node is smaller than a second threshold during the generation of the cutoff command. The power supply device according to any one of 5 above.