WO2020103926A1 - 发送信息的方法和装置 - Google Patents

发送信息的方法和装置

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Publication number
WO2020103926A1
WO2020103926A1 PCT/CN2019/120244 CN2019120244W WO2020103926A1 WO 2020103926 A1 WO2020103926 A1 WO 2020103926A1 CN 2019120244 W CN2019120244 W CN 2019120244W WO 2020103926 A1 WO2020103926 A1 WO 2020103926A1
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WO
WIPO (PCT)
Prior art keywords
bit
constellation
bits
bit sequence
interleaving
Prior art date
Application number
PCT/CN2019/120244
Other languages
English (en)
French (fr)
Inventor
王坚
张华滋
李榕
王俊
杜颖钢
吴艺群
陈雁
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Publication of WO2020103926A1 publication Critical patent/WO2020103926A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0006Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0002Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
    • H04L1/0003Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate by switching between different modulation schemes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0033Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the transmitter
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0076Distributed coding, e.g. network coding, involving channel coding

Definitions

  • the present application relates to the field of communication technology, and more specifically, to a method and device for sending information.
  • a base station In wireless communication, a base station can usually communicate with multiple terminal devices. However, several terminal devices can send signals to the base station on the same radio resource. This transmission method is called alias transmission. Alias transmission may cause collisions between signals between terminal devices, but it helps to increase system capacity.
  • Non-orthogonal multiple access (non-orthogonal multiple access, NoMA) technology is an implementation of alias transmission, which is to superimpose multiple data streams of one or more terminal devices on multiple sub-carriers to send, Wherein, each data stream is mapped on the multiple sub-carriers. When the number of data streams is greater than the number of subcarriers, it can effectively improve the capacity and spectrum efficiency of the network and the number of users that the system can access.
  • This application provides a method and device for sending information, which can improve the performance of a communication system based on NoMA technology.
  • the present application provides a method for transmitting information.
  • the method includes: performing channel coding on an information bit sequence to obtain a coded bit sequence; performing K times of transmission processing on the coded bit sequence respectively and then transmitting in K times, wherein
  • the transmission process includes interleaving, modulation, and resource mapping. At least two of the K transmission processes are different, and K ⁇ 2 and K is an integer.
  • the mth transmission The processing includes modulating the coded bit sequence or the interleaved coded bit sequence using the first constellation
  • the nth transmission process includes using the second constellation map to modulate the coded bit sequence or the interleaved coded bit sequence, 1 ⁇ m ⁇ K, 1 ⁇ n ⁇ K, and m and n are integers, m ⁇ n; or, the mth transmission process includes interleaving the encoded bit sequence using the first interleaving method, and the nth transmission process includes using The second interleaving method interleaves the coded bit sequence; or, the mth transmission process includes resource mapping of modulation symbols using the first resource mapping pattern, and the nth transmission process includes modulation symbols using the second resource mapping pattern Resource mapping.
  • the method further includes: grouping bits included in the encoded bit sequence to obtain multiple bit groups, where the multiple bit groups include the first bit group And the second bit group; the m-th transmission process specifically includes interleaving the multiple bit groups, and combining the multiple bit sequences obtained after the interleaving to obtain a first bit sequence, and using the first constellation to One bit sequence is modulated so that the bits in the first bit group are mapped to the strongly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation map, so that the bits in the second bit group are mapped on the first The weakly protected bit positions of the modulation symbols corresponding to the constellation points on a constellation diagram, 1 ⁇ m ⁇ K, and m is an integer; the nth transmission process specifically includes interleaving the multiple bit groups separately, and Combine the multiple bit sequences obtained after interleaving to obtain a second bit sequence, and modulate the second bit sequence using the first constellation map, so that the bits in the first
  • the first constellation diagram and the second constellation diagram have equal orders, and the constellation points on the first constellation diagram correspond to the q One bit position corresponds to the strongly protected q second bit positions of the modulation symbol corresponding to the constellation point on the second constellation, and the q first bit positions and the q second bit positions are strongly protected
  • the degree is complementary, 2 ⁇ q ⁇ t, t is the number of bits that can be represented by the modulation symbol corresponding to the constellation point on the first constellation, q and t are both integers, and the complementarity includes the q
  • the order in which the first bit positions are each strongly protected is different from the order in which the q second bit positions are each strongly protected.
  • the method further includes: grouping bits included in the encoded bit sequence to obtain multiple bit groups, where the multiple bit groups include the first bit group And the second bit group, the first bit group includes v coded bits, and the second bit group includes w coded bits; the multiple bit groups are interleaved separately, and the multiple bit sequences obtained by the interleaving are combined to obtain the first One bit sequence; the m-th transmission process specifically includes modulating the first bit sequence using the first constellation map so that the v coded bits in the first bit group are mapped to the modulation corresponding to the constellation point of the first constellation map Q bit positions of the symbol that are strongly protected, so that the w encoded bits in the second bit group are mapped to the weakly protected (tq) bit positions of the modulation symbol corresponding to the constellation point of the first constellation; n The second transmission process specifically includes modulating the first bit sequence using the second constellation diagram, so that the v coded bits in the first bit group are mapped to the
  • the grouping of the bits included in the encoded bit sequence to obtain multiple bit groups includes: according to the importance level of the bits included in the first bit sequence, Group the bits included in the first bit sequence to obtain the multiple bit groups.
  • the bits included in the first bit group are system bits, and the bits included in the second bit group are check bits.
  • the present application provides a communication device for sending information, for performing the method in the first aspect or any possible implementation manner of the first aspect.
  • the communication device includes a unit that performs the method in the first aspect or any possible implementation manner of the first aspect.
  • the functions of the communication device may be partially or fully realized by software.
  • the communication device may include one or more memories and one or more processors, wherein the one or more memories are used to store computer programs, and the one or more processors are used from all The computer program is read and executed in one or more memories to execute the method in the first aspect or any possible implementation manner of the first aspect.
  • the communication device includes one or more processors, and the memory for storing the computer program is located outside the communication device, and the one or more processors are connected to the memory through circuits / wires.
  • the communication device may be a chip or an integrated circuit.
  • the present application provides a transmitter device, including a transceiver, a processor, and a memory.
  • the processor is used to control the transceiver to receive and send signals
  • the memory is used to store a computer program
  • the processor is used to call and run the computer program stored in the memory, so that the transmitting device performs the method in the first aspect and any possible implementation manner of the first aspect .
  • transceiver there may be one or more of the transceiver, processor and memory.
  • the present application provides a computer-readable storage medium having instructions stored in the computer-readable storage medium, which when executed on a computer, causes the computer to perform the first aspect or any possible implementation manner of the first aspect Methods.
  • the present application provides a chip, including a memory and a processor, the memory is used to store a computer program, and the processor is used to call and run the computer program from the memory to perform the first aspect and any possible aspects of the first aspect Implementation method.
  • the present application provides a computer program product.
  • the computer program product includes computer program code.
  • the computer program product causes the computer to perform the method in the first aspect or any possible implementation manner thereof.
  • the present application also provides a communication device, including at least one processor, the at least one processor is coupled to at least one memory, and the at least one processor is configured to execute a computer stored in the at least one memory A program or an instruction, so that the communication device performs the corresponding operation and / or processing performed by the transmitting end in the first aspect or any possible implementation manner of the first aspect.
  • the present application also provides a communication device, including a processor and an interface circuit, the interface circuit is used to receive computer code or instructions, and transmitted to the processor, the processor is used to run the computer code Or instructions to perform the corresponding operations and / or processing performed by the transmitting end in the first aspect or any possible implementation manner of the first aspect.
  • the present application also provides a communication device, including a processor and a communication interface, where the communication interface is used to receive computer code or instructions and transmit it to the processor, where the processor is used to run the computer code Or instructions to perform the corresponding operations and / or processing performed by the transmitting end in the first aspect or any possible implementation manner of the first aspect.
  • each transmission can improve the communication system by performing different transmission processing on the information (for example, one or more of interleaving, modulation, and resource mapping are different). Performance, for example, demodulation performance, decoding performance, etc.
  • Fig. 1 is the processing flow of the transmitting end of the communication system based on NoMA technology.
  • FIG. 2 is a flowchart of a method for sending information provided by this application.
  • FIG. 3 is a schematic diagram of balanced protection of coded bits.
  • FIG. 4 is a schematic diagram of differentiated protection and balanced protection according to important levels of coded bits.
  • FIG. 5 is a schematic diagram of differential protection for bits of different importance levels and bit equalization protection of the same importance level.
  • FIG. 6 is an example of grouping the coded bit sequence.
  • FIG. 7 is a schematic diagram of different resource mapping methods.
  • FIG. 8 is a schematic diagram of using different mappers for multiple transmissions of information for a single user.
  • FIG. 10 is a processing method of the receiving end provided by the present application.
  • FIG. 11 is another processing method of the receiving end provided by the present application.
  • FIG. 12 is another processing method of the receiving end provided by the present application.
  • Fig. 13 is a performance comparison chart of a communication system.
  • FIG. 14 is a schematic block diagram of an apparatus for sending information provided by this application.
  • 15 is a schematic structural diagram of a terminal device provided by this application.
  • 16 is a schematic structural diagram of a network device provided by this application.
  • non-orthogonal multiple access non-orthogonal multiple access
  • NoMA non-orthogonal multiple access
  • the processing flow of the transmitting end can be referred to FIG. 1, which is the processing flow of the transmitting end of the communication system based on the NoMA technology.
  • the processing flow at the transmitter mainly includes channel coding, modulation, and resource mapping.
  • channel coding includes channel coding and rate matching in a general communication system, and may also include operations such as interleaving and scrambling of coded bits obtained after channel coding.
  • the modulation can be general two-phase phase-shift keying (BPSK), quadrature phase-shift keying (QPSK), or quadrature amplitude modulation (QAM), or it can also It is another specially designed modulation method.
  • the resource map may be a sparse map or a non-sparse map. Sparse mapping means that the actual resources used only occupy a part of the allocated resources.
  • the technical solution of the present application can also be applied to application scenarios where information needs to be sent multiple times. For example, it is applied to the scenario of repeated transmission or HARQ.
  • Repeated transmission can refer to transmitting the same data packet K times, K ⁇ 1 and K is an integer.
  • repeated transmission may include time-domain repetition, frequency-domain repetition, and space-domain repetition. Among them, the repeated transmission generally refers to time-domain repetition.
  • repeated transmission can be understood as that the transmitter transmits again when it has not received the ACK or NACK fed back by the receiver.
  • FIG. 2 is a flowchart of a method 200 for sending information provided by the present application. Steps 210-220 of method 200 may be performed by the transmitting end.
  • bit sequences in the following embodiments such as “first bit sequence”, “second bit sequence”, and “third bit sequence” is only for distinguishing different bit sequences, and should not be The technical solution constitutes no limitation.
  • the transmitter performs channel coding on the information bit sequence to obtain a coded bit sequence.
  • the transmitting end performs K-time transmission processing on the coded bit sequence, and then transmits the K-times in K times.
  • One-time transmission processing includes one or more of interleaving, modulation, and resource mapping.
  • each of the K times of transmission processing corresponds to the process of one transmission.
  • the information bit sequence is first channel-coded to obtain the coded bit sequence. After that, the encoded bit sequence is transmitted.
  • Each transmission process may include one or more of interleaving, modulation, and resource mapping.
  • the m-th transmission process and the n-th transmission process among the K-time transmission processes are taken as examples to describe the method of transmitting information provided by the present application. Among them, 1 ⁇ m ⁇ K, 1 ⁇ n ⁇ K, and m and n are integers, m is not equal to n.
  • the mth transmission process includes modulating the coded bit sequence using the first constellation
  • the nth transmission process includes modulating the coded bit sequence using the second constellation
  • first constellation and the second constellation are different.
  • first constellation diagram and the second constellation diagram may be different constellation diagrams of the same order, or different constellation diagrams of different orders.
  • FIG. 3 is a schematic diagram of balanced protection of coded bits.
  • the mth transmission process uses the first constellation diagram to modulate the encoded bit sequence
  • the nth transmission process uses the second constellation diagram to modulate the encoded bit sequence.
  • the first constellation diagram it is assumed that the 2 bits mapped on the second bit position and the fourth bit position of the modulation symbol are strongly protected, and the bits mapped on the remaining two bit positions of the modulation symbol are Weak protection.
  • the two bits mapped at the first bit position and the third bit position of the modulation symbol are strongly protected.
  • the bits mapped to the remaining two bit positions of the modulation symbol are weakly protected.
  • the encoded bits mapped at the second and fourth bit positions of the modulation symbol are strongly protected, and the encoded bits mapped at the first and third bit positions Weakly protected.
  • the codes mapped at the first bit position and the third bit position are strongly protected, and the coded bits mapped at the second bit position and the fourth bit position are weakly protected. From the perspective of multiple transmissions, the protection of the 4 bits sent by the transmitter is balanced. For example, in the case of two transmission processes, each coded bit is strongly protected once and weakly protected once.
  • the importance of the coded bits output from the channel coding is different, for example, the importance of systematic bits is higher than the importance of check bits.
  • the coded bit sequence includes a total of 6 bits, including 2 systematic bits and 4 check bits. In terms of importance, 2 of these 6 bits have the highest level of importance and need to be strongly protected.
  • the importance level of these 4 parity bits is next, and it can be weakly protected relative to the system bits. At the same time, the importance levels of the two system bits are the same, so they should be balanced for protection. Similarly, the importance levels of the 4 parity bits are the same, so they should be balanced for protection.
  • this application has designed a first constellation diagram and a second constellation diagram that meet the following characteristics:
  • the q first bit positions of the strongly protected modulation symbols corresponding to the constellation points on the first constellation map correspond to the strongly protected q second bit positions of the modulation symbols corresponding to the constellation points on the second constellation diagram
  • the degree of strong protection of q first bit positions and q second bit positions is complementary, 2 ⁇ q ⁇ t, t is the number of bits that can be represented by the modulation symbol corresponding to the constellation point on the first constellation , Q and t are both integers, and the complementarity includes the order of the degree of strong protection of the q first bit positions, which is different from the order of the degree of strong protection of the q second bit positions.
  • the order of the first constellation diagram and the second constellation diagram are equal.
  • FIG. 4 is a schematic diagram of differentiated protection and equalization protection of coded bits according to important levels.
  • the mth transmission process uses the first constellation diagram.
  • the first bit position and the second bit position of the 4 bits that can be represented by the modulation symbols corresponding to the constellation points on the first constellation are strongly protected, as shown in the bit positions corresponding to a and b in FIG. 4 . That is, the modulation symbol corresponding to the constellation point on the first constellation diagram includes two strongly protected bit positions.
  • the strongly protected bit position of the modulation symbol corresponding to the constellation point on the first constellation is called the first bit position, and the number of the first bit position is denoted by q.
  • the nth transmission process uses the second constellation.
  • the first bit position and the second bit position of the 4 bits that can be represented by the modulation symbols corresponding to the constellation points on the second constellation are strongly protected, as shown in the bit positions corresponding to b and a in FIG. 4 .
  • the strongly protected bit positions of the modulation symbols corresponding to the constellation points on the second constellation diagram are called second bit positions, and the number of second bit positions is denoted by q.
  • q first bit positions and q second bit positions are corresponding.
  • the order of q bits that can be represented by the modulation symbols corresponding to the constellation points on the respective constellation diagrams of the q first bit positions and the q second bit positions is different.
  • the q first bit positions are ranked according to the degree of strong protection
  • the q second bit positions are ordered according to the degree of strong protection. The two orders are different.
  • the arrangement of the degree of q first bit positions being strongly protected is opposite to the order of the degree of q second bit positions being strongly protected.
  • the strongly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation diagram and the second constellation diagram are the first bit position and the second bit position, but in their respective constellations In the figure, the ordering of the two bit positions is reversed.
  • the sending process specifically includes the following steps 301-303.
  • the grouping can be based on the importance level (or importance) of the bits in the coded bit sequence.
  • LDPC low density parity check code
  • system bits are more important than check bits. Therefore, the system bits can be grouped together, and the parity bits can be grouped together.
  • the bits with the highest importance level may be divided into a group, followed by the importance level into a group, and the remaining bits into a group.
  • This application does not limit the basis and method for grouping.
  • the multiple bit groups include a first bit group and a second bit group.
  • the first bit group includes v coded bits
  • the second bit group includes w coded bits.
  • v and w are integers greater than or equal to 1.
  • multiple bit groups include the first bit group and the second bit group, and the multiple bit groups may include only the first bit group and the second bit group, that is, the bits in the encoded bit sequence are divided into two groups.
  • multiple bit groups may include a first bit group, a second bit group, and other bit groups.
  • the K-time sending process includes:
  • the m-th transmission process specifically includes modulating the second bit sequence using the first constellation, so that the v coded bits in the first bit group are mapped to the modulation symbols corresponding to the constellation points of the first constellation.
  • Q protected bit positions so that the w encoded bits in the second bit group are mapped to the weakly protected (tq) bit positions of the modulation symbols corresponding to the constellation points on the first constellation diagram;
  • the nth transmission process specifically includes modulating the first bit sequence using the second constellation map, so that the v coded bits in the first bit group are mapped on the modulation symbols corresponding to the constellation points on the second constellation map.
  • Q bit positions of strong protection so that w bits in the second bit group are mapped to weakly protected (tq) bit positions of modulation symbols corresponding to constellation points of the second constellation.
  • the length of the information bit sequence is 200 and the code rate is 1/5
  • the length of the encoded bit sequence after channel coding is 1000.
  • the system bits are 200 and the parity bits are 800.
  • t is the number of bits that can be represented by the modulation symbol corresponding to the constellation point on a constellation diagram
  • q is the number of strongly protected bits of the modulation symbol corresponding to the constellation point on the constellation diagram.
  • the bits in the first bit group and the second bit group are interleaved separately, and finally the bit sequences obtained after the interleaving are combined to obtain a third bit sequence.
  • modulating the bits in the third bit sequence it is necessary to map 200 systematic bits in the first bit group to 200 bit positions among the 500 strongly protected bit positions. For multiple transmission processes, each transmission process may select a different 200 bit positions from the 500 strongly protected bit positions, or may have a different order of the strongly protected 200 bit positions.
  • this application provides another transmission processing method, which can serve the purpose of differentiating protection for bits of different importance levels and balancing protection of bits of the same importance level when multiple transmissions use the same constellation, The effect is the same as that of using the first constellation diagram and the second constellation diagram satisfying the above characteristics.
  • the sending process may include steps 401-403.
  • the specific manner of grouping is not limited here.
  • the grouping can be based on the importance of the bits.
  • the m-th transmission process specifically includes separately interleaving multiple bit groups, combining the multiple bit sequences obtained after interleaving to obtain a first bit sequence, and modulating the first bit sequence using a first constellation diagram, so that The bits in the first bit group are mapped to the strongly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation map, so that the bits in the second bit group are mapped to the constellation points on the first constellation map
  • the weakly protected bit position of the modulation symbol of, 1 ⁇ m ⁇ K, and m is an integer;
  • the nth transmission process specifically includes interleaving the multiple bit groups separately, combining the multiple bit sequences obtained after the interleaving to obtain a second bit sequence, and modulating the second bit sequence using the first constellation diagram, so that The bits in the first bit group are mapped to the strongly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation map, so that the bits in the second bit group are mapped to the constellation points on the first constellation map
  • the weakly protected bit position of the modulation symbol of, 1 ⁇ n ⁇ K, and n is an integer, m ⁇ n,
  • the interleaving method adopted by the m-th transmission process for at least one bit group of the plurality of bit groups is different from the interleaving method adopted by the n-th transmission process for at least one bit group of the plurality of bit groups.
  • the mth and nth transmission processes use the same constellation diagram, for example, the first constellation diagram.
  • the mth transmission process combines the bit sequences obtained by interleaving each bit group to obtain the first bit sequence
  • the nth transmission process combines the bit sequences obtained by interleaving each bit group to obtain the second Bit sequence.
  • the bits in the first bit group When the m-th transmission process modulates the first bit sequence, it is necessary to map the bits in the first bit group to the strongly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation map, and make the The bits in the two-bit group are mapped to the weakly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation.
  • the bits in the first bit group need to be set to the strongly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation diagram, and The bits in the second bit group are mapped to the weakly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation.
  • the bits in the first bit group are mapped to the strongly protected bit positions of the modulation symbol in both transmissions, and the bits in the second bit group are both transmitted in both transmissions It is mapped to the weakly protected bit position of the modulation symbol, therefore, the bits in the first bit group are always strongly protected, and the bits in the second bit group are always weakly protected, which achieves the purpose of differential protection of different important levels of bits . Further, by interleaving before modulation, the order of bits in the first bit group during the mth transmission process and the order of bits in the first bit group during the nth transmission process can be made different.
  • the order of the bits in the second bit group at the mth transmission process is different from the order of the bits in the second bit group at the nth transmission process, so that the bits in the first bit group are at the mth time
  • the transmission process and the n-th transmission process are mapped to different strongly protected bit positions, respectively. Therefore, the bits in the first bit group can be balanced and protected in multiple transmissions, and at the same time, the bits in the second bit group are also balanced and protected in multiple transmissions.
  • the multiple bit groups may each use different interleaving methods, or some bit groups use the same interleaving method. Alternatively, multiple bit groups all use the same interleaving method.
  • the nth transmission process interleaves multiple bit groups, the multiple bit groups may each use different interleaving methods, or some bit groups may use the same interleaving method. Alternatively, multiple bit groups all use the same interleaving method.
  • the m-th transmission process uses the same interleaving method for multiple bit groups, and the n-time transmission process uses the same interleaving method for multiple bit groups, the m-th transmission The processing and the nth transmission processing should be different.
  • FIG. 5 is a schematic diagram of differential protection for bits of different importance levels and bit equalization protection of the same importance level.
  • the process shown in FIG. 5 can be summarized as the following steps 501-503.
  • the transmitting end may group according to the importance level (or importance) of the encoded bits. For example, in the coded bits of the LDPC code output of NR, in contrast, systematic bits are more important than check bits, so the systematic bits can be divided into a group and the check bits can be divided into a group. As shown in FIG. 5, the coded bit sequence is divided into n bit groups, n ⁇ 1 and an integer.
  • the multiple bit groups are interleaved separately, and the bit sequences obtained after the interleaving are combined to obtain a first bit sequence.
  • the multiple bit groups are interleaved separately, and the bit sequences obtained after the interleaving are combined to obtain a second bit sequence.
  • the first bit group is interleaved using the interleaver 11
  • the second bit group is interleaved using the interleaver 12, ...
  • the nth bit group is interleaved using the interleaver 1n.
  • the interleaved bit sequence is obtained.
  • the n bit sequences are merged, for example, sequentially merged to obtain the first bit sequence.
  • the first bit group is interleaved using the interleaver 21
  • the second bit group is interleaved using the interleaver 22, ...
  • the n-th bit group is interleaved using the interleaver 2n.
  • the interleaved bit sequence is obtained.
  • the n bit sequences are combined to obtain a second bit sequence. Modulate the second bit sequence to obtain a modulation symbol, and then send the modulation symbol to the second transmission after resource mapping.
  • the interleaved and combined bit sequence obtained after each transmission is modulated and resource mapped for transmission.
  • the first bit sequence is modulated to obtain modulation symbols, and then the modulation symbols are subjected to resource mapping for the first transmission. Modulate the second bit sequence to obtain a modulation symbol, and then send the modulation symbol to the second transmission after resource mapping.
  • the same modulation method may be used, that is, the same constellation diagram may be used.
  • different constellations may be used.
  • the same resource mapping pattern may be used, or different resource mapping patterns may also be used. There is no limitation in this application.
  • FIG. 6 is an example of grouping the coded bit sequence.
  • the bit importance levels in the coded bit sequence are the same, and at this time, the coded bits in the coded bit sequence may be divided into a bit group by default.
  • the coded bit sequence is sequentially interleaved and then transmitted after modulation and resource mapping.
  • the second transmission process parity interleaving is performed on the coded bit sequence, and then transmitted after modulation and resource mapping.
  • the coded bit sequence is interleaved.
  • the mth transmission process includes interleaving the coded bit sequence using the first interleaving method, and the nth transmission process includes interleaving the coded bit sequence using the second interleaving method.
  • the channel coding process shown in FIG. 1 may include interleaving, and in the mth transmission process, the first interleaving method may be used to interleave the encoded bit sequence. In the nth transmission process, the coded bit sequence is interleaved using the second interleaving method.
  • the first interleaving method and the second interleaving method are different.
  • the first interleaving method uses sequential interleaving
  • the second interleaving method uses parity interleaving
  • the first interleaving method uses row-column interleaving
  • the second interleaving method uses random interleaving.
  • mode 2 and mode 1 may be combined, that is, the coded bit sequence is interleaved first, and then the interleaved coded bit sequence is modulated.
  • the first interleaving method is used to interleave the encoded bit sequence, and then the first constellation is used to modulate the interleaved encoded bit sequence. Finally, the modulation symbols are sent after resource mapping.
  • the second intermediate interleaving method is used to interleave the encoded bit sequence, and then the second constellation diagram is used to modulate the interleaved encoded bit sequence. Finally, the modulation symbols are sent after resource mapping.
  • the m-th transmission process includes resource mapping of the first modulation symbol using the first resource mapping pattern
  • the n-th transmission process includes resource mapping of the second modulation symbol using the second resource mapping pattern
  • the resource mapping pattern determines how the modulation symbols are mapped to physical resource blocks.
  • the mapping method determines the collision between users, which in turn can affect the performance of the communication system.
  • Figure 7 shows two different resource mapping patterns. 7 is a schematic diagram of different resource mapping methods. As shown in FIG. 7, in resource mapping pattern 1, each UE or each modulation symbol uses 2 REs. In the resource mapping pattern 2, each UE or each modulation symbol uses 1 RE.
  • mapping methods in multiple transmissions can make the collision between users more uniform and random, which can avoid the fixed collision of some users from becoming the bottleneck of the system performance, and can also enable different users to use different subcarriers to obtain separation.
  • FIG. 8 is a schematic diagram of using different mappers for multiple transmissions of information for a single user.
  • the user's information is subjected to channel coding, modulation and other operations, and then is mapped using a different mapper and then transmitted.
  • the first transmission uses the mapper
  • the second transmission uses the mapper 2.
  • the resource mapping patterns of the mapper 1 and the mapper 2 are different.
  • FIG. 9 shows a possibility of two transmissions.
  • (B) in FIG. 9 shows another possibility of two transmissions.
  • each column corresponds to a mapper.
  • the above-mentioned method 1, method 2 and method 3 may be used alone, or the method 1, method 2 and method 3 may be arbitrarily combined.
  • the method 200 further includes step 230.
  • the receiving end decodes the information received K times to obtain the decoding result.
  • the above is the way to improve system performance from the perspective of the transmitter.
  • the following provides several processing methods provided by this application from the perspective of the receiving end, which helps to further improve the performance of the system.
  • the implementation of the embodiments described in steps 210 and 220 above by the transmitting end can improve the performance of the system, such as demodulation performance and decoding performance.
  • the receiver uses several processing methods provided below to further improve system performance.
  • the transmitter uses the method for sending information provided in this application to send the information after sending processing.
  • the receiving end may use an existing decoding method to perform decoding.
  • the receiving end may also use the processing method provided below for decoding. If the transmission processing of the transmitting end and the decoding processing of the receiving end provided in this application are used in combination, the system performance can be maximized.
  • the receiving end receives the information sent by the transmitter K times, and combines the LLRs obtained by the K times demodulation to decode.
  • FIG. 10 is a processing manner of the receiving end provided by the present application.
  • the receiver 1 receives the information sent by the transmitter for the first time, and obtains the LLR after demodulation processing.
  • the receiver 2 receives the information sent by the transmitter for the second time, and obtains the LLR after demodulation processing.
  • the two LLRs are combined and input into the channel decoder for decoding.
  • the receiving end may have two receivers, such as receiver 1 and receiver 2 in FIG. 10.
  • the receiving end may also have only one receiver.
  • the receiver respectively receives the information sent by the transmitting end twice, and performs demodulation processing on the information received twice to obtain the LLR. Combine the LLRs twice.
  • the LLRs obtained after demodulating each bit each time should be combined. For example, suppose that the transmitter sends 4 bits, and the receiver receives the information sent by the transmitter for the first time, and after demodulation, obtains the LLRs of these 4 bits. The receiving end receives the information sent by the transmitting end for the second time, and obtains the LLRs of the four bits after demodulation processing. The receiving end separately combines the two LLRs of each of these 4 bits, and then inputs the combined LLR into the channel decoder to make a hard decision on each bit.
  • the process of method A is relatively simple. Further, through the combination of LLRs, a combination gain can be obtained to improve the decoding performance of the system.
  • the receiving end directly performs channel decoding on the information sent by the transmitting end for the first time, and judges whether the decoding result can pass the cyclic redundancy check (cyclic redundancy check, CRC).
  • CRC cyclic redundancy check
  • FIG. 11 is another processing method of the receiving end provided by the present application.
  • the receiver 1 receives the information sent by the transmitter for the first time. Perform channel decoding on the received information and determine whether the decoding result passes the CRC. If the channel decoding result passes the CRC, the decoding result is directly output as the final decoding result. If the decoding result of the first time does not pass the CRC, the LLR demodulated by the receiver 1 and the receiver 2 demodulate the information sent by the second time to obtain the LLR, and then input the combined LLR into the channel decoder To decode.
  • Method B When the channel conditions are good, try to receive and decode a small number of times to decode the information bits sent by the transmitter, without waiting for the subsequent information to be sent again, and the delay is shorter.
  • receiver 1 and receiver 2 shown in mode B can also be combined into one receiver. This is just an example.
  • the receiving end inputs the information received multiple times to the same receiver for processing, and then obtains the LLR to perform channel decoding.
  • FIG. 12 is another processing method of the receiving end provided by the present application.
  • the information sent by the transmitter for the first time and the information sent for the second time are received by the same receiver after passing through the channel.
  • the receiver processes the two times of information, obtains LLR, and performs channel decoding.
  • Method C can obtain diversity gain and noise randomization gain by combining the information sent by the transmitter multiple times, which can improve the decoding performance of the system.
  • FIG. 13 is a comparison diagram of the system performance when the transmitting end adopts the mode 2 and the system performance adopting the existing scheme. It can be seen that compared with the scheme without repeated transmission, the existing scheme can obtain an energy gain of 3 dB. Compared with the existing solution, the solution of the present application obtains an additional energy gain of 1 dB.
  • the existing scheme mentioned here refers to the use of different constellations for each transmission.
  • FIG. 14 is a schematic block diagram of an apparatus 800 for sending information provided by this application.
  • the device 800 includes a processing unit 810 and a transceiver unit 820.
  • the processing unit 810 is configured to perform channel coding on the information bit sequence to obtain an encoded bit sequence, and perform K-time transmission processing on the encoded bit sequence, where the transmission processing includes one of interleaving, modulation, and mapping or For multiple items, at least two of the K-time transmission processes are different, K ⁇ 2 and K is an integer;
  • the transceiving unit 820 is configured to separately transmit the information obtained after the K processing of the processing unit is transmitted K times.
  • processing unit 810 is also used to:
  • the m-th transmission process specifically includes interleaving the multiple bit groups separately, combining the multiple bit sequences obtained after the interleaving to obtain a first bit sequence, and modulating the first bit sequence using a first constellation diagram, So that the bits in the first bit group are mapped to the strongly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation map, so that the bits in the second bit group are mapped on the constellation on the first constellation map
  • the weakly protected bit position of the modulation symbol corresponding to the point, 1 ⁇ m ⁇ K, and m is an integer;
  • the nth transmission process specifically includes interleaving the plurality of bit groups separately, combining the multiple bit sequences obtained after the interleaving to obtain a second bit sequence, and modulating the second bit sequence using the first constellation diagram, So that the bits in the first bit group are mapped to the strongly protected bit positions of the modulation symbols corresponding to the constellation points on the first constellation map, so that the bits in the second bit group are mapped on the first constellation map
  • the weakly protected bit position of the modulation symbol corresponding to the constellation point on, 1 ⁇ n ⁇ K, and n is an integer, m ⁇ n.
  • the m-th transmission process uses an interleaving method for at least one bit group of the plurality of bit groups and the n-th transmission process uses an interleaving method for at least one bit group of the plurality of bit groups The way is different.
  • the orders of the first constellation diagram and the second constellation diagram are equal, the strongly protected q first bit positions of the modulation symbol corresponding to the constellation points on the first constellation diagram and the second constellation
  • the strongly protected q second bit positions of the modulation symbols corresponding to the constellation points on the graph correspond to each other, and the degree of strong protection of q first bit positions and q second bit positions are complementary, 2 ⁇ q ⁇ t , T is the number of bits that can be represented by the modulation symbol corresponding to the constellation point on the first constellation, q and t are both integers, and the complementation includes the order of the degree to which the q first bit positions are strongly protected , And the order of the degree to which the q second bit positions are each strongly protected is different.
  • processing unit 810 is used to:
  • the bits contained in the coded bit sequence to obtain multiple bit groups include a first bit group and a second bit group, the first bit group includes v coded bits, and the second bit group includes w coded bits;
  • the m-th transmission process specifically includes modulating the third bit sequence using the first constellation diagram, so that the v coded bits in the first bit group are mapped on the modulation symbols corresponding to the constellation points on the first constellation diagram.
  • Q first bit positions of strong protection so that the w coded bits in the second bit group are mapped to the weakly protected (tq) bit positions of modulation symbols corresponding to the constellation points on the first constellation;
  • the nth transmission process specifically includes modulating the first bit sequence using the second constellation map, so that the v coded bits in the first bit group are mapped on the modulation symbols corresponding to the constellation points on the second constellation map.
  • the q second bit positions of strong protection so that the w bits in the second bit group are mapped on the weakly protected (tq) bit positions of the modulation symbols corresponding to the constellation points on the second constellation diagram.
  • the bits included in the encoded bit sequence are grouped to obtain multiple bit groups, including: according to the importance level of the bits included in the first bit sequence, the bits included in the first bit sequence Perform grouping to obtain the multiple bit groups.
  • the bits included in the first bit group are system bits, and the bits included in the second bit group are parity bits.
  • the device 800 corresponds exactly to the transmitting end of the method 200, and the corresponding units of the device 800 are respectively used to perform the corresponding steps and / or processes performed by the transmitting end in the method 200 or its embodiments.
  • the processing unit 810 is used to execute the steps implemented by the transmitter in the method 200 or its embodiments.
  • the processing unit 810 may be a processor.
  • the transceiver unit 520 may be a transceiver.
  • the transceiver includes a receiver and a transmitter, and has both receiving and transmitting functions.
  • the processing unit 510 may be a processing device, and the above-mentioned functions of the processing device may be partially or fully implemented by software.
  • the processing device may include a memory and a processor, where the memory is used to store a computer program, and the processor reads and runs the computer program from the memory to perform the method 200 and its embodiments by transmitting Corresponding operations and / or processes performed by the client.
  • the processing device when part or all of the processing device is implemented by software, the processing device includes a processor.
  • the memory for storing the computer program is located outside the processing device, and the processor is connected to the memory through a circuit / wire to read and execute the computer program stored in the memory.
  • the processing device when part or all of the above functions of the processing device are implemented by hardware, the processing device includes: an input interface circuit for receiving the input information bit sequence; a logic circuit for channel encoding the information bit sequence To get the coded bit sequence and send the coded bit sequence; output interface circuit is used to output the information processed by the logic circuit.
  • the processing device may be a chip or an integrated circuit.
  • the transmitting end is a network device (for example, a base station).
  • the terminal device is the transmitting end. Therefore, this application also provides a terminal device and a network device.
  • FIG. 15 is a schematic structural diagram of a terminal device 900 provided by the present application.
  • the terminal device 900 includes: one or more processors 901, one or more memories 902, and one or more transceivers 903.
  • the processor 901 is used to control the transceiver 903 to send and receive signals
  • the memory 902 is used to store a computer program
  • the processor 901 is used to call and run the computer program from the memory 902 to perform the method 200 for sending information provided by the present application and its various The corresponding processes and / or operations performed by the transmitting end in the embodiments.
  • FIG. 16 is a schematic structural diagram of a network device 3000 provided by the present application. As shown in FIG. 16, the network device 3000 has the function of the transmitting end described in the method embodiment of the present application.
  • the network device 3000 may include one or more radio frequency units, such as a remote radio unit (RRU) 3100 and one or more baseband units (BBU).
  • the baseband unit may also be referred to as a digital unit (DU) 3200.
  • the RRU 3100 may be referred to as a transceiver unit, which corresponds to the communication unit 620 in FIG. 9.
  • the transceiver unit 3100 may also be called a transceiver, a transceiver circuit, or a transceiver, etc., which may include at least one antenna 3101 and a radio frequency unit 3102.
  • the transceiving unit 3100 may include a receiving unit and a transmitting unit, the receiving unit may correspond to a receiver (or receiver, receiving circuit), and the transmitting unit may correspond to a transmitter (or transmitter, transmitting circuit).
  • the RRU 3100 part is mainly used for the transmission and reception of radio frequency signals and the conversion of radio frequency signals and baseband signals, for example, for sending configuration information of the first random access resource to the terminal device.
  • the BBU 3200 part is mainly used for baseband processing and control of the base station.
  • the RRU 3100 and the BBU 3200 may be physically arranged together, or may be physically separated, that is, distributed base stations.
  • the BBU 3200 is the control center of the network device 3000, and may also be called a processing unit, which is mainly used to complete baseband processing functions, such as channel coding, multiplexing, modulation, and spread spectrum.
  • the BBU (processing unit) configures the plurality of RNTIs.
  • it may correspond to the processing unit 510 in FIG. 16.
  • it corresponds to the processing unit 710 in FIG. 18.
  • the BBU 3200 may be composed of one or more boards, and multiple boards may jointly support a wireless access network (for example, an LTE network) of a single access standard, or may support different access standards respectively Wireless access network (for example, LTE network, 5G network or other networks).
  • the BBU 3200 also includes a memory 3201 and a processor 3202.
  • the memory 3201 is used to store necessary instructions and data.
  • the processor 3202 is used to control the network device 3000 to perform necessary actions, for example, to control the network device 3000 to perform the operation process performed by the network device in the foregoing method embodiment.
  • the memory 3201 and the processor 3202 may serve one or more single boards. In other words, the memory and the processor can be set separately on each board. It is also possible that multiple boards share the same memory and processor. In addition, each board can also be provided with necessary circuits.
  • the above-mentioned BBU 3200 can be used to perform the actions internally implemented by the transmitting end in the above method embodiment, and the RRU3100 can be used to perform the transmitting or receiving actions of the transmitting end in the above method embodiment.
  • the chip described in the embodiments of the present application may be a field-programmable gate array (field-programmable gate array, FPGA), a dedicated integrated chip (application specific integrated circuit, ASIC), a system chip (system on chip, SoC), central Processor (central processor), CPU, network processor (NP), digital signal processing circuit (digital signal processor, DSP), or microcontroller (micro controller), MCU, programmable controller ( programmable logic device (PLD) or other integrated chips.
  • field-programmable gate array field-programmable gate array
  • ASIC application specific integrated circuit
  • SoC system chip
  • central processor central processor
  • CPU central processor
  • NP network processor
  • DSP digital signal processing circuit
  • microcontroller microcontroller
  • MCU programmable controller
  • PLD programmable logic device
  • the processor in the embodiment of the present application may be an integrated circuit chip, which has a signal processing capability.
  • each step of the foregoing method embodiment may be completed by an integrated logic circuit of hardware in a processor or instructions in the form of software.
  • the aforementioned processor may be a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), FPGA or other programmable logic device, discrete gate or transistor logic device, discrete Hardware components.
  • the general-purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
  • the steps of configuring RNTI in method 200 or method 300 disclosed in the embodiments of the present application may also be performed by a hardware processor, or by The combination of hardware and software modules is completed.
  • the software module may be located in a mature storage medium in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, and registers.
  • the storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.
  • the memory in the embodiment of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory can be read-only memory (read-only memory, ROM), programmable read-only memory (programmable ROM, PROM), erasable programmable read-only memory (erasable PROM, EPROM), electronically Erasable programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
  • the volatile memory may be a random access memory (random access memory, RAM), which is used as an external cache.
  • RAM random access memory
  • SRAM static random access memory
  • DRAM dynamic random access memory
  • synchronous RAM synchronous dynamic random access memory
  • SDRAM double data rate synchronous dynamic random access memory
  • double data SDRAM double data SDRAM
  • DDR SDRAM enhanced synchronous dynamic random access memory
  • ESDRAM synchronous connection dynamic random access memory
  • direct RAMbus RAM direct RAMbus RAM
  • the aforementioned memory and the memory may be physically independent units, or the memory may be integrated with the processor.
  • the present application also provides a computer-readable storage medium that stores computer instructions, and when the computer instructions run on the computer, the computer executes the method 200 and each method embodiment is executed by the transmitting end Corresponding operations and / or processes.
  • the present application also provides a computer program product, the computer program product comprising computer program code, when the computer program code runs on the computer, the computer is allowed to perform the method 200 and the corresponding operations performed by the transmitting end in each method embodiment and / or Process.
  • the present application also provides a chip, including a memory and a processor.
  • the memory is used to store a computer program.
  • the processor is used to call and run the computer program from the memory to execute the method 200 and the corresponding method executed by the transmitter in each method embodiment. Operations and / or processes.
  • the present application also provides a communication device, including at least one processor, the at least one processor is coupled to at least one memory, and the at least one processor is configured to execute a computer program or instruction stored in the at least one memory, In order for the communication device to perform the corresponding operation and / or processing performed by the transmitting end in each method embodiment.
  • the present application also provides a communication device, including a processor and an interface circuit, the interface circuit is used to receive computer code or instructions, and transmitted to the processor, the processor is used to run the computer code or instructions, Perform corresponding operations and / or processing performed by the transmitting end in each method embodiment.
  • the present application also provides a communication device, including a processor and a communication interface, the communication interface is used to receive computer code or instructions, and transmitted to the processor, the processor is used to run the computer code or instructions, Perform corresponding operations and / or processing performed by the transmitting end in each method embodiment.
  • the above memory, processor, processing circuit, and communication interface may all be one or more, and are not limited.
  • the disclosed system, device, and method may be implemented in other ways.
  • the device embodiments described above are only schematic.
  • the division of the unit is only a logical function division, and in actual implementation, there may be another division manner, for example, multiple units or components may be combined Or it can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the embodiments of the present application.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium.
  • the technical solution of the present application essentially or part of the contribution to the existing technology or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to enable a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application.

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Abstract

本申请提供一种发送信息的方法,能够提升基于NoMA技术的通信系统的性能。该方法包括:对信息比特序列进行信道编码,得到编码比特序列;对编码比特序列分别进行K次的发送处理后分K次进行发送,其中,发送处理包括交织、调制和资源映射,所述K次的发送处理中至少有两次的发送处理不同,K≥2且K为整数。

Description

发送信息的方法和装置
本申请要求于2018年11月23日提交中国国家知识产权局、申请号为201811406112.1、申请名称为“发送信息的方法和装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信技术领域,更具体地,涉及一种发送信息的方法和装置。
背景技术
在无线通信中,一个基站通常可以与多个终端设备进行通信。而若干个终端设备可以在相同的无线资源上向基站发送信号,这种传输方式称为混叠传输。混叠传输可能或导致终端设备之间的信号发生碰撞,但是有助于提升系统容量。非正交多址接入(non-orthogonal multiple access,NoMA)技术是混叠传输的一种实现方式,它是将一个或多个终端设备的多个数据流叠加在多个子载波上进行发送,其中,每个数据流都映射在该多个子载波上。当数据流的数量大于子载波的数量时,可以有效提升网络的容量和频谱效率以及系统可接入的用户数量。
随着通信系统的演进,未来的通信系统对于通信的可靠度要求越来越高,例如新空口(new radio,NR)的低时延高可靠性传输(ultra reliable and low latency communications,URLLC)场景。针对可靠度的要求,重复传输的概念被提出。重复传输通常是指针对同一个数据包进行多次传输。在重复传输中,为了对多次传输的信息比特进行均衡保护,现有方案提出每次传输更换不同的调制映射星座图(以下简称星座图),这样不会使得一些比特在多次传输中始终被强保护,而另一些比特在多次传输中使用被弱保护,可以避免这些始终被弱保护的比特成为系统性能的瓶颈。
但是通过每次传输更换星座图对系统性能的提升是有限的,甚至在一些场景下,并不适合对传输的比特进行均衡保护。因此,如何通过重复传输来提升基于NoMA技术的通信系统的性能,是一个亟待解决的问题。
发明内容
本申请提供一种发送信息的方法和装置,能够提升基于NoMA技术的通信系统的性能。
第一方面,本申请提供一种发送信息的方法,该方法包括:对信息比特序列进行信道编码,得到编码比特序列;对编码比特序列分别进行K次的发送处理后分K次进行发送,其中,所述发送处理包括交织、调制和资源映射,所述K次的发送处理中至少有两次的发送处理不同,K≥2且K为整数。
结合第一方面,在第一方面的某些实现方式中,所述K次的发送处理中至少有两次的 发送处理不同,包括如下情况下中的一项或多项:第m次的发送处理包括使用第一星座图对编码比特序列或交织后的编码比特序列进行调制,第n次的发送处理包括使用第二星座图对编码比特序列或交织后的编码比特序列进行调制,1≤m≤K,1≤n≤K,且m和n均为整数,m≠n;或者,第m次的发送处理包括采用第一交织方式对编码比特序列进行交织,第n次的发送处理包括采用第二交织方式对编码比特序列进行交织;或者,第m次的发送处理包括使用第一资源映射图样对调制符号进行资源映射,第n次的发送处理包括使用第二资源映射图样对调制符号进行资源映射。
结合第一方面,在第一方面的某些实现方式中,该方法还包括:对编码比特序列中包含的比特进行分组,得到多个比特组,所述多个比特组中包括第一比特组和第二比特组;第m次的发送处理具体包括对所述多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第一比特序列,以及使用第一星座图对第一比特序列进行调制,以使第一比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被强保护的比特位置,使第二比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤m≤K,且m为整数;第n次的发送处理具体包括对所述多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第二比特序列,以及使用第一星座图对第二比特序列进行调制,以使第一比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被强保护的比特位置,使第二比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤n≤K,且n为整数,m≠n其中,第m次的发送处理对所述多个比特组中的至少一个比特组所采用的交织方式与第n次的发送处理对所述多个比特组中的至少一个比特组所采用的交织方式不同。
结合第一方面,在第一方面的某些实现方式中,第一星座图和第二星座图的阶数相等,第一星座图上的星座点对应的调制符号的被强保护的q个第一比特位置和第二星座图上的星座点对应的调制符号的被强保护的q个第二比特位置对应,且所述q个第一比特位置和所述q个第二比特位置被强保护的程度是互补的,2≤q≤t,t为第一星座图上的星座点对应的调制符号所能表示的比特的个数,q和t均为整数,所述互补包括所述q个第一比特位置各自被强保护的程度高低的排序,与所述q个第二比特位置各自被强保护的程度高低的排序不同。
结合第一方面,在第一方面的某些实现方式中,该方法还包括:对编码比特序列中包含的比特进行分组,得到多个比特组,所述多个比特组中包括第一比特组和第二比特组,第一比特组包括v个编码比特,第二比特组包括w个编码比特;对所述多个比特组分别进行交织,并将交织得到的多个比特序列合并,得到第一比特序列;第m次的发送处理具体包括使用第一星座图对第一比特序列进行调制,以使第一比特组中的v个编码比特被映射在第一星座图的星座点对应的调制符号的被强保护的q个比特位置,使第二比特组中的w个编码比特被映射在第一星座图的星座点对应的调制符号的被弱保护的(t-q)个比特位置;第n次的发送处理具体包括使用第二星座图对第一比特序列进行调制,以使第一比特组中的v个编码比特被映射在第二星座图的星座点对应的调制符号的被强保护的q个比特位置,使第二比特组中的w个比特被映射在第二星座图的星座点对应的调制符号的被弱保护的(t-q)个比特位置。
结合第一方面,在第一方面的某些实现方式中,所述对编码比特序列中包含的比特进 行分组,得到多个比特组,包括:根据第一比特序列中包含的比特的重要等级,对第一比特序列中包含的比特进行分组,得到所述多个比特组。
结合第一方面,在第一方面的某些实现方式中,第一比特组中包括的比特为系统比特,第二比特组中包括的比特为校验比特。
第二方面,本申请提供一种发送信息的通信装置,用于执行第一方面或第一方面的任意可能的实现方式中的方法。具体地,该通信装置包括执行第一方面或第一方面的任意可能的实现方式中的方法的单元。
可选地,该通信装置的功能可以部分或全部通过软件实现。当全部通过软件实现时,该通信装置可以包括一个或多个存储器以及一个或多个处理器,其中,所述一个或多个存储器用于存储计算机程序,所述一个或多个处理器从所述一个或多个存储器中读取并运行该计算机程序,以执行第一方面或第一方面任意可能的实现方式中的方法。
可选地,该通信装置包括一个或多个处理器,该用于存储计算机程序的存储器位于该通信装置之外,所述一个或多个处理器通过电路/电线与该存储器连接。
可选地,该通信装置可以为芯片或集成电路。
第三方面,本申请提供一种发射端设备,包括收发器、处理器和存储器。处理器用于控制收发器收发信号,存储器用于存储计算机程序,处理器用于调用并运行存储器中存储的计算机程序,使得发射端设备执行第一方面及其第一方面任意可能的实现方式中的方法。
可选地,所述收发器、处理器和存储器均可以为一个或多个。
第四方面,本申请提供一种计算机可读存储介质,计算机可读存储介质中存储有指令,当指令在计算机上运行时,使得计算机执行上述第一方面或第一方面任意可能的实现方式中的方法。
第五方面,本申请提供一种芯片,包括存储器和处理器,存储器用于存储计算机程序,处理器用于从存储器中调用并运行计算机程序,以执行上述第一方面及其第一方面任意可能的实现方式中的方法。
第六方面,本申请提供一种计算机程序产品,计算机程序产品包括计算机程序代码,当计算机程序代码在计算机上运行时,使得计算机执行上述第一方面或其任意可能的实现方式中的方法。
第七方面,本申请还提供一种通信装置,包括至少一个处理器,所述至少一个处理器与至少一个存储器耦合,所述至少一个处理器,用于执行所述至少一个存储器中存储的计算机程序或指令,以使得所述通信装置执行第一方面或第一方面任意可能的实现方式中由发射端执行的相应操作和/或处理。
第八方面,本申请还提供一种通信装置,包括处理器和接口电路,所述接口电路用于接收计算机代码或指令,并传输至所述处理器,所述处理器用于运行所述计算机代码或指令,以执行第一方面或第一方面任意可能的实现方式中由发射端执行的相应操作和/或处理。
第九方面,本申请还提供一种通信装置,包括处理器和通信接口,所述通信接口用于接收计算机代码或指令,并传输至所述处理器,所述处理器用于运行所述计算机代码或指令,以执行第一方面或第一方面任意可能的实现方式中由发射端执行的相应操作和/或处 理。
本申请的技术方案,在多次发送信息的场景下,每次发送通过对信息进行不同的发送处理(例如,交织、调制和资源映射中的一项或多项不同),可以提高通信系统的性能,例如,解调性能、译码性能等。
附图说明
图1是基于NoMA技术的通信系统的发射端的处理流程。
图2是本申请提供的发送信息的方法的流程图。
图3是对编码比特进行均衡保护的示意图。
图4是对编码比特按照重要等级区别保护和均衡保护的示意图。
图5是对重要等级不同的比特区别保护和对重要等级相同的比特均衡保护的示意图。
图6是对编码比特序列进行分组处理的一个示例。
图7是不同的资源映射方式的示意图。
图8是单个用户的信息的多次发送使用不同的映射器的示意图。
图9中(a)和(b)表示两次发送处理的资源映射的示例。
图10是本申请提供的接收端的一种处理方式。
图11是本申请提供的接收端的另一种处理方式。
图12是本申请提供的接收端的再一种处理方式。
图13是通信系统的性能对比图。
图14是本申请提供的发送信息的装置的示意性框图。
图15是本申请提供的终端设备的示意性结构图。
图16是本申请提供的网络设备的示意性结构图。
具体实施方式
下面将结合附图,对本申请中的技术方案进行描述。
在无线通信中,若干个终端设备与基站通信时,一些终端设备可以在相同的无线资源上传输信号,称为混叠传输。这种方式会导致终端设备之间的信号发生碰撞,但是有可能提升系统容量。特别是在在上行传输中,非正交多址接入(non-orthogonal multiple access,NoMA)技术是混叠传输的一种实现方式,它将一个或多个终端设备的M个数据流叠加到N个子载波上发送。其中,每个数据流的每个数据映射到N个子载波上,M和N均是不小于1的整数。当M的取值大于N时,可以有效提升网络容量,包括系统可接入用户数和频谱效率等。
在NoMA技术中,发射端的处理流程可以参见图1,图1是基于NoMA技术的通信系统的发射端的处理流程。如图1所示,发射端的处理流程主要包括信道编码、调制和资源映射。通常,信道编码包括一般通信系统中的信道编码和速率匹配,还可以包括对信道编码后的得到的编码比特的交织、加扰等操作。调制可以是一般的二相相移键控(binary phase shift keying,BPSK)、正交相移键控(quadrature phase shift keying,QPSK)或正交振幅调制(quadrature amplitude modulation,QAM),或者还可以是其它特殊设计的调制方式。资源映射可以是稀疏映射或非稀疏映射。稀疏映射是指实际所使用的资源只占所分配的资 源的一部分。
本申请的技术方案也可以应用于需要将信息进行多次发送的应用场景。例如,应用于重复传输或HARQ的场景等。
在一些对可靠度要求较高的场景,例如高可靠低延时(ultra reliable low latency,URLLC)场景,可以通过重复传输实现可靠度的提升。重复传输可以指将同一个数据包传输K次,K≥1且K为整数。通常,重复传输可以包括时域重复、频域重复和空域重复等。其中,一般所说的重复传输是指时域重复。
与HARQ相比,重复传输可以理解为发射机在还未收到接收机反馈的ACK或NACK时即再次进行传输。
下面对本申请提供的发送信息的方法200进行说明。参见图2,图2是本申请提供的发送信息的方法200的流程图。方法200的步骤210-220可以由发射端执行。
需要说明的是,下文实施例中对比特序列的编号,例如“第一比特序列”、“第二比特序列”以及“第三比特序列”仅仅是为了区分不同的比特序列,不应该对本申请的技术方案构成任何限定。
210、发射端对信息比特序列进行信道编码,得到编码比特序列。
220、发射端对编码比特序列分别进行K次的发送处理后分K次进行发送。
其中,该K次的发送处理中至少有两次的发送处理不同,K≥2且K为整数。一次发送处理包括交织、调制和资源映射中的一项或多项。
应理解,本申请中的K次发送处理对应K次发送。如上文所述,本申请的技术方案也可以应用需要将信息进行多次发送的应用场景。因此,K次的发送处理中的每一次发送处理,对应一次发送的过程。对于每一次发送,首先对信息比特序列进行信道编码,得到编码比特序列。之后,对编码比特序列进行发送处理。每一次的发送处理可以包括交织、调制和资源映射中的一项或多项。
下面以这K次的发送处理中的第m次的发送处理和第n次的发送处理作为示例,对本申请提供的发送信息的方法进行说明。其中,1≤m≤K,1≤n≤K,且m和n均为整数,m不等于n。
方式1
第m次的发送处理包括使用第一星座图对编码比特序列进行调制,第n次的发送处理包括使用第二星座图对编码比特序列进行调制。
这里,第一星座图和第二星座图不同。具体地,第一星座图和第二星座图可以是相同阶数的不同星座图,或者,是不同阶数的不同星座图。
考虑到在高阶调制中,每个调制符号所表示的多个比特的受保护程度不同,如果每次发送都使用相同的星座图,信息比特序列中的一些比特总是被映射在调制符号的被强保护的比特位置,而另一些总是被映射在调制符号的被弱保护的比特位置。因此,被强保护的比特在这K次的发送中总是被强保护,而被弱保护的比特在这K次的发送中总是被弱保护。这样会使得被弱保护的比特的错误概率成为系统性能的瓶颈。因此,在本申请实施例中,多次发送处理使用不同的星座图,可以使编码比特序列中的编码比特在保护程度上随机化,从而起到均衡保护的作用,以提高系统性能。
参见图3所示,图3是对编码比特进行均衡保护的示意图。如图3所示,第m次的 发送处理使用第一星座图对编码比特序列进行调制,第n次的发送处理使用第二星座图对编码比特序列进行调制。其中,在第一星座图上,假设被映射在调制符号的第2个比特位置和第4个比特位置上的2个比特被强保护,被映射在调制符号的其余两个比特位置的比特被弱保护。在第二星座图上,被映射在调制符号的第1个比特位置和第3个比特位置的2个比特被强保护。而被映射在调制符号的其余两个比特位置的比特被弱保护。因此,在第m次的发送中,被映射在调制符号的第2个比特位置和第4个比特位置的编码比特被强保护,被映射在第1个比特和第3个比特位置的编码比特被弱保护。而在第n次的发送中,被映射在第1个比特位置和第3个比特位置的编码被强保护,被映射在第2个比特位置和第4个比特位置的编码比特被弱保护。从多次发送的角度来看,发射端发送的4个比特的受保护程度是均衡的。例如,以两次发送处理来说,每个编码比特都被强保护一次,被弱保护一次。
进一步地,考虑到信道编码输出的编码比特的重要性不同,例如,系统比特的重要性高于校验比特的重要性。为了获得更好的性能,需要对重要等级不同的比特区别保护。例如,对重要等级比较高的比特进行强保护,而对重要等级次之的比特进行弱保护。同时,对重要等级相同或相近的比特进行均衡保护。
例如,编码比特序列共包括6个比特,其中包括2个系统比特和4个校验比特。从重要程度上来说,这6个比特中的2个系统比特重要等级最高,需要被强保护。而这4个校验比特的重要等级次之,相对系统比特而言,可以被弱保护。同时,2个系统比特的重要等级相同,因此应该均衡保护。类似的,4个校验比特的重要等级也相同,因此也应该均衡保护。
为了达到上述按照比特的重要等级进行区分保护。同时对重要等级相同或相近的比特进行均衡保护的目的,本申请设计了满足如下特点的第一星座图和第二星座图:
第一星座图上的星座点对应的调制符号的被强保护的q个第一比特位置和第二星座图上的星座点对应的调制符号的被强保护的q个第二比特位置对应,且q个第一比特位置和q个第二比特位置被强保护的程度是互补的,2≤q≤t,t为第一星座图上的星座点对应的调制符号所能表示的比特的个数,q和t均为整数,所述互补包括q个第一比特位置各自被强保护的程度高低的排序,与q个第二比特位置各自被强保护的程度高低的排序不同。
可选地,第一星座图和第二星座图的阶数相等。
在两次发送处理中,分别采用满足如上特点的第一星座图和第二星座图,可以达到上述目的。下面结合图4进行说明,图4是对编码比特按照重要等级区别保护和均衡保护的示意图。
如图4所示,第m次的发送处理采用第一星座图。第一星座图上的星座点对应的调制符号所能表示的4个比特中的第1个比特位置和第2个比特位置被强保护,如图4中所示的a和b对应的比特位置。也即,第一星座图上的星座点对应的调制符号包括2个被强保护的比特位置。本申请中,将第一星座图上的星座点对应的调制符号的被强保护的比特位置称为第一比特位置,第一比特位置的个数记作q。第n次的发送处理采用第二星座图。第二星座图上的星座点对应的调制符号所能表示的4个比特中的第1个比特位置和第2个比特位置被强保护,如图4中所示的b和a对应的比特位置。同样地,第二星座图上的星座点对应的调制符号的被强保护的比特位置称为第二比特位置,第二比特位置的个数记作 q。可以看出,q个第一比特位置和q个第二比特位置是对应的。同时,q个第一比特位置和q个第二比特位置在各自的星座图上的星座点对应的调制符号所能表示的t个比特中的排序是不同的。换句话说,将q个第一比特位置按照被强保护的程度高低排列,将q个第二比特位置按照被强保护的程度高低排序,两个排序不同。
可选地,q个第一比特位置被强保护的程度高低的排列,和q个第二比特位置被强保护的程度高低的排序相反。
例如,在图4中,第一星座图和第二星座图上的星座点对应的调制符号的被强保护的比特位置均是第1个比特位置和第2个比特位置,但是在各自的星座图上,这两个比特位置的排序是相反的。
在采用满足上述特点的第一星座图和第二星座图时,发送处理的过程具体包括如下步骤301-303。
301、对编码比特序列中包含的比特进行分组,得到多个比特组。
这里,可以根据编码比特序列中比特的重要等级(或者说,重要程度)进行分组。以低密度奇偶校验码(low density parity check code,LDPC)为例,系统比特的重要程度高于校验比特。因此,可以将系统比特分为一组,将校验比特分为一组。
可选地,也可以根据其它的划分方式,将重要等级最高的比特划分为一组,将重要等级次之的划分为一组,将其余的比特划分为一组等。本申请不限定采用何种依据和何种方式进行分组。
其中,该多个比特组包括第一比特组和第二比特组。第一比特组包括v个编码比特,第二比特组包括w个编码比特。其中,v和w均为大于或等于1的整数。
应理解,多个比特组包括第一比特组和第二比特组,可以是多个比特组仅包括第一比特组和第二比特组,也即将编码比特序列中的比特分为了两组。或者,也可以是多个比特组包括第一比特组、第二比特组以及其它的比特组。
302、对该多个比特组分别进行交织,并将交织得到的多个比特序列合并,得到第一比特序列。
303、所述K次的发送处理包括:
第m次的发送处理具体包括使用第一星座图对第二比特序列进行调制,以使第一比特组中的v个编码比特被映射在第一星座图的星座点对应的调制符号的被强保护的q个比特位置,使第二比特组中的w个编码比特被映射第一星座图上的星座点对应的调制符号的被弱保护的(t-q)个比特位置;
第n次的发送处理具体包括使用第二星座图对第一比特序列进行调制,以使第一比特组中的v个编码比特被映射在第二星座图上的星座点对应的调制符号的被强保护的q个比特位置,使第二比特组中的w个比特被映射在第二星座图的星座点对应的调制符号的被弱保护的(t-q)个比特位置。
为了便于理解,下面举例进行说明。
假定信息比特序列的长度为200,码率为1/5,则信道编码之后的编码比特序列的长度为1000。假定采用LDPC编码,则系统比特为200,校验比特为800。假定将编码比特序列中的比特按照系统比特和校验比特分成两个比特组,并假定第一比特组为系统比特,第二比特组为校验比特。则,第一比特组中系统比特的个数v=200,第二比特组中校验比 特的个数w=800。t是一个星座图上的星座点对应的调制符号所能表示的比特数,q是一个星座图上的星座点对应的调制符号的被强保护的比特数。
以16QAM为例,t=4,q=2。将上述的长度为1000的编码比特序列进行调制时,将会得到250个调制符号,每个调制符号对应星座图上的一个星座点。由于q=2,那么250个调制符号也就对应了500个被强保护的比特位置。剩余的500个比特位置是被弱保护的比特位置。根据本申请上述的处理方法,通过对第一比特组和第二比特组中的比特分别进行交织,最后将交织后得到的比特序列合并,得到第三比特序列。在对第三比特序列中的比特进行调制时,需要使得第一比特组中的200个系统比特被映射在上述500个被强保护的比特位置中的200个比特位置上。对于多次的发送处理,每一次的发送处理可以从500个被强保护的比特位置中选择不同的200个比特位置,也可以是被强保护的200个比特位置的顺序不同。
但是,考虑到通信标准中可能仅采用一个标准的星座图,因而在多次发送时只能使用同一个星座图。为此,本申请提供另一种发送处理的方式,可以在多次发送使用同一个星座图的情况下,起到对重要等级不同的比特区别保护,对重要等级相同的比特均衡保护的目的,与采用满足上述特点的第一星座图和第二星座图的效果相同。
发送处理的过程可以包括步骤401-403。
401、对编码比特序列中包含的比特进行分组,得到多个比特组,所述多个比特组中包括第一比特组和第二比特组。
与步骤301类似,这里不限定分组的具体方式。例如,可以根据比特的重要程度进行分组。
402、K次的发送处理中至少有两次的发送处理,包括:
第m次的发送处理具体包括对多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第一比特序列,以及使用第一星座图对第一比特序列进行调制,以使第一比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被强保护的比特位置,使第二比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤m≤K,且m为整数;
第n次的发送处理具体包括对多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第二比特序列,以及使用第一星座图对第二比特序列进行调制,以使第一比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被强保护的比特位置,使第二比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤n≤K,且n为整数,m≠n,
其中,第m次的发送处理对多个比特组中的至少一个比特组所采用的交织方式与第n次的发送处理对多个比特组中的至少一个比特组所采用的交织方式不同。
在本实施例中,第m次和第n次的发送处理采用同一个星座图,例如,第一星座图。但是,为了根据比特的重要等级对比特进行区别保护,同时对重要等级相同或近似的比特进行均衡保护,需要对编码比特序列进行交织。假定第m次的发送处理对每个比特组分别进行交织后得到的比特序列合并得到第一比特序列,第n次的发送处理对每个比特组分别进行交织后得到的比特序列合并得到第二比特序列。第m次的发送处理对第一比特序列进行调制时,需要使第一比特组中的比特被映射在第一星座图上的星座点对应的调制符 号的被强保护的比特位置,并使第二比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被弱保护的比特位置。第n次的发送处理对第二比特序列进行调制时,需要使第一比特组中的比特被应设在第一星座图上的星座点对应的调制符号的被强保护的比特位置,并使第二比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被弱保护的比特位置。可以看出,在采用一个星座图时,第一比特组中的比特在两次发送中都被映射在调制符号的被强保护的比特位置,第二比特组中的比特在两次发送中都被映射在调制符号的被弱保护的比特位置,因此,第一比特组中的比特始终被强保护,第二比特组中的比特始终被弱保护,达到了不同重要等级的比特区别保护的目的。进一步地,通过调制之前的交织,可以使第m次的发送处理时的第一比特组中的比特的排序和第n次的发送处理时的第一比特组中的比特的排序不同。同时,第m次的发送处理时第二比特组中的比特的排序和第n次的发送处理时的第二比特组中的比特的排序不同,从而第一比特组中的比特在第m次发送处理中和第n次发送处理中分别被映射在不同的被强保护的比特位置上。因此,第一比特组中的比特在多次发送中可以被均衡保护,同时,第二比特组中的比特在多次发送中也被均衡保护。
需要说明是,第m次的发送处理对多个比特组分别进行交织时,多个比特组可以各自采用不同的交织方式,或者部分比特组采用相同的交织方式。或者,多个比特组均采用相同的交织方式。类似地,第n次的发送处理对多个比特组分别进行交织时,多个比特组可以各自采用不同的交织方式,或者部分比特组采用相同的交织方式。或者,多个比特组均采用相同的交织方式。但是,如果第m次的发送处理时,如果多个比特组均采用相同的交织方式,且第n次的发送处理时,多个比特组也都采用相同的交织方式,则第m次的发送处理和第n次的发送处理应当不同。
参见图5,图5是对重要等级不同的比特区别保护和对重要等级相同的比特均衡保护的示意图。如图5所示的过程可以概括为如下步骤501-503。
501、对编码比特序列中包含的编码比特进行分组,得到多个比特组。
可选地,发射端可以根据编码比特的重要等级(或者说重要程度)进行分组。例如,NR的LDPC编码的输出的编码比特中,相比之下,系统比特比校验比特更重要,因此可以将系统比特分为一组,将校验比特分为一组。图5中所示将编码比特序列分为n个比特组,n≥1且为整数。
502、对于第1次发送,对这多个比特组分别进行交织,并将交织后得到的比特序列合并,得到第一比特序列。对于第2次发送,对这多个比特组分别进行交织,并将交织后得到的比特序列合并,得到第二比特序列。
例如,对于第1次的发送处理,第1比特组使用交织器11进行交织,第2比特组使用交织器12进行交织,…,第n比特组使用交织器1n进行交织。每个比特组进行交织后,得到交织后的比特序列。将这n个比特序列进行合并,例如,顺序合并,得到第一比特序列。对于第2次的发送处理,第1比特组使用交织器21进行交织,第2比特组使用交织器22进行交织,…,第n比特组使用交织器2n进行交织。每个比特组进行交织后,得到交织后的比特序列。将这n个比特序列进行合并,得到第二比特序列。对第二比特序列进行调制,得到调制符号,再将调制符号经过资源映射后进行第2次发送。
503、对于多次发送,每次发送将交织且合并后得到的比特序列经过调制和资源映射 后进行发送。
以2次发送为例,对第一比特序列进行调制,得到调制符号,再将调制符号经过资源映射后进行第1次发送。对第二比特序列进行调制,得到调制符号,再将调制符号经过资源映射后进行第2次发送。
可选地,第1次的发送处理和第2次的发送处理中,可以采用相同的调制方式,也即使用相同的星座图。或者,也可以采用不同的星座图。进一步可选地,第1次的发送处理和第2次的发送处理中,可以采用相同的资源映射图样,或者也可以使用不同的资源映射图样。本申请中不作限定。
参见图6,图6是对编码比特序列进行分组处理的一个示例。
例如,编码比特序列中的比特重要等级相同,此时可以默认为将编码比特序列中的编码比特分为一个比特组。继续以2次发送为例,两次发送中使用16QAM进行调制。在第一次发送处理中,对编码比特序列进行顺序交织,然后经过调制和资源映射进行发送。在第二次发送处理中,对编码比特序列进行奇偶交织,然后经过调制和资源映射进行发送。
可选地,在第n次的发送处理中,在进行调制之前,对编码比特序列进行交织。
方式2
第m次的发送处理包括采用第一交织方式对编码比特序列进行交织,第n次的发送处理包括采用第二交织方式对编码比特序列进行交织。
如上文所述,图1所示的信道编码流程中可以包括交织,第m次的发送处理中,可以使用第一交织方式对编码比特序列进行交织。在第n次的发送处理中,使用第二交织方式对编码比特序列进行交织。
这里,第一交织方式和第二交织方式不同。例如,第一交织方式采用顺序交织,第二交织方式采用奇偶交织。又例如,第一交织方式采用行列交织,第二交织方式采用随机交织等。本申请中不作限定。
在另一种实现方式中,在K次的发送处理中,可以将方式2和方式1结合,也即先对编码比特序列进行交织,再对交织后的编码比特序列进行调制。
具体地,在第m次的发送处理中,采用第一种交织方式对编码比特序列进行交织,再使用第一星座图对交织后的编码比特序列进行调制。最后将调制符号经过资源映射后发送。在n次的发送处理器中,采用第二中交织方式对编码比特序列进行交织,再使用第二星座图对交织后的编码比特序列进行调制。最后将调制符号经过资源映射后发送。
方式3
第m次的发送处理包括使用第一资源映射图样对第一调制符号进行资源映射,第n次的发送处理包括使用第二资源映射图样对第二调制符号进行资源映射。
资源映射图样决定了调制符号到物理资源块的映射方式。映射方式决定了用户间碰撞的情况,进而可以影响通信系统的性能。图7中给出了两个不同的资源映射图样。图7是不同的资源映射方式的示意图。如图7所示,在资源映射图样1中,每个UE或者每个调制符号使用2个RE。在资源映射图样2中,每个UE或者每个调制符号使用1个RE。
在多次的发送中使用不同的映射方式,可以使用户间的碰撞更加均匀随机,能够避免某些用户的固定碰撞成为系统性能的瓶颈,也可以使不同的用户使用不同的子载波,以获得分集。
在实际中,单个用户的信息的多次发送可以通过使用不同的映射器来实现。参见图8,图8是单个用户的信息的多次发送使用不同的映射器的示意图。如图8所示,以2次发送为例,在每次传输时,用户的信息经过信道编码、调制等操作后,使用不同的映射器进行资源映射后发送。例如,第1次发送使用映射器,第2次发送使用映射器2。其中,映射器1和映射器2各自的资源映射图样不同。
以上述图7中所示的资源映射图样1为例,考虑4个用户的通信系统,使用图7中所示的资源映射图样1,2次发送使用不同的映射器的可能如图9所示。图9中的(a)表示两次发送的一种可能。图9中的(b)表示两次发送的另一种可能。在(a)和(b)中,从左至右,每一列分别对应一个映射器。
方式4
方式1、方式2和方式3的任意组合。
在对编码比特序列进行发送处理时,上述的方式1、方式2和方式3可以单独使用,也可以将方式1、方式2和方式3任意组合。
进一步地,方法200还包括步骤230。
230、接收端对K次接收到的信息进行译码处理,得到译码结果。
上文是从发射端的角度给出的提升系统性能的处理方式。下文从接收端的角度,给出本申请提供的几种处理方法,有助于进一步提升系统的性能。
需要说明的是,发射端执行上述步骤210和步骤220中描述的各实施例,可以提升系统的性能,例如解调性能、译码性能等。接收端采用下文提供的几种处理方式,可以进一步地提升系统性能。换句话说,发射端采用本申请提供的发送信息的方法,对信息进行发送处理后发送。可选地,接收端可以采用现有的译码方法进行译码。或者,接收端也可以采用下文中提供的处理方式进行译码。如果本申请提供的发射端的发送处理和接收端的译码处理结合使用,可以最大程度地提升系统性能。
方式A
接收端接收发射端K次发送的信息,并将K次解调得到的LLR合并后进行译码。
参见图10,图10是本申请提供的接收端的一种处理方式。参见图10,以2次发送为例,接收机1接收发射端第1次发送的信息,解调处理后得到LLR。接收机2接收发射端第2次发送的信息,解调处理之后得到LLR。将两次的LLR合并后输入信道译码器进行译码。
需要说明的是,针对发射端每一次发送的信息,接收端可以分别采用不同的接收机进行接收。以2次发送为例,接收端可以有2个接收机,如图10中的接收机1和接收机2。接收端也可以只有一个接收机。当接收端只有一个接收机时,接收机分别接收发射端2次发送的信息,并将2次接收到的信息分别进行解调处理后得到LLR。再将2次的LLR进行合并。
应理解,合并LLR时,应当是将每个比特各次解调后得到的LLR进行合并。例如,假设发射端发送4个比特,接收机端接收发射端第1次发送的信息,解调处理后得到这4个比特各自的LLR。接收端接收发射端第2次发送的信息,解调处理后得到这4个比特各自的LLR。接收端分别将这4个比特的每个比特的两个LLR进行合并,然后将合并后的LLR输入信道译码器,以对每个比特进行硬判决。
方式A的处理过程比较简单。进一步地,通过LLR的合并,可以获得合并增益,提升系统的译码性能。
方式B
接收端对发射端第1次发送的信息直接进行信道译码,并判决译码结果是否可以通过循环冗余校验(cyclic redundancy check,CRC)。在译码结果未通过CRC时,将第1次接收到的信息解调得到的LLR和后几次接收到的信息解调得到的LLR进行合并,并将合并后的LLR再次进行信道译码。
参见图11,图11是本申请提供的接收端的另一种处理方式。参见图11,以2次发送为例,接收机1接收发射端第1次发送的信息。对接收到的信息进行信道译码,并判断译码结果是否通过CRC。如果信道译码的结果通过了CRC,则将译码结果直接输出,作为最终的译码结果。如果第1次的译码结果未通过CRC,将接收机1解调得到的LLR和接收机2对第2次发送的信息进行解调得到LLR合并,再将合并后的LLR输入信道译码器进行译码。
方式B在信道条件较好时,尝试少量次数的接收和译码即可译码获得发射机发送的信息比特,无需等待后续再发送的信息,时延较短。
与方式A类似,方式B中所示的接收机1和接收机2也可以合并为一个接收机。这里仅是作为示例。
方式C
接收端将多次接收到的信息输入同一个接收机进行处理,得到LLR后进行信道译码。
参见图12,图12是本申请提供的接收端的再一种处理方式。在图12中,发射端第1次发送的信息和第2次发送的信息经过信道后被同一个接收机接收。该接收机对这2次的信息进行处理,得到LLR后进行信道译码。
方式C通过将发射端多次发送的信息进行合并处理,可以获得分集增益和噪声随机化增益,能够提升系统的译码性能。
本申请的技术方案提供的发送信息的方法,可以提升系统的性能。参见图13,图13是系统性能的对比图。在图13中,TDLA30表示信道模型,1T2R表示发射端的天线数为1,接收端天线数为2。6UE表示6个用户SCMA表示副载波多路接入(subcarrier multiple access),是一种NOMA方案。SF4表示SCMA方案使用的扩频长度为4。图13是发射端采用方式2时的系统性能与采用现有方案的系统性能的对比图。可以看到,现有方案与无重复发送的方案相比,可以获得3dB的能量增益。而本申请的方案与现有的方案相比,额外获得1dB的能量增益。这里所说的现有方案是指每次传输采用不同的星座图。
以上对申请提供的发送信息的方法作了详细说明。下面对本申请提供的发送信息的装置进行说明。
参见图14,图14是本申请提供的发送信息的装置800的示意性框图。装置800包括处理单元810和收发单元820。
处理单元810,用于对信息比特序列进行信道编码,得到编码比特序列,并对所述编码比特序列进行K次的发送处理,其中,所述发送处理包括交织、调制和映射中的一项或多项,所述K次的发送处理中有至少两次的发送处理不同,K≥2且K为整数;
收发单元820,用于将所述处理单元的K次的发送处理后得到的信息分K次分别进行 发送。
可选地,处理单元810还用于:
对编码比特序列中包含的比特进行分组,得到多个比特组,所述多个比特组包括第一比特组和第二比特组;
第m次的发送处理具体包括对所述多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第一比特序列,以及使用第一星座图对第一比特序列进行调制,以使第一比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被强保护的比特位置,使第二比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤m≤K,且m为整数;
第n次的发送处理具体包括对所述多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第二比特序列,以及使用第一星座图对第二比特序列进行调制,以使述第一比特组中的比特被映射在第一星座图上的星座点对应的调制符号的被强保护的比特位置,使第二比特组中的比特被映射在所述第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤n≤K,且n为整数,m≠n。
其中,第m次的发送处理对所述多个比特组中的至少一个比特组所采用的交织方式与第n次的发送处理对所述多个比特组中的至少一个比特组所采用的交织方式不同。
可选地,作为一个实施例,第一星座图和第二星座图的阶数相等,第一星座图上的星座点对应的调制符号的被强保护的q个第一比特位置和第二星座图上的星座点对应的调制符号的被强保护的q个第二比特位置对应,且q个第一比特位置和q个第二比特位置被强保护的程度是互补的,2≤q≤t,t为第一星座图上的星座点对应的调制符号所能表示的比特的个数,q和t均为整数,所述互补包括q个第一比特位置各自被强保护的程度高低的排序,与q个第二比特位置各自被强保护的程度高低的排序不同。
可选地,作为一个实施例,处理单元810用于:
对编码比特序列中包含的比特进行分组,得到多个比特组,所述多个比特组中包括第一比特组和第二比特组,第一比特组包括v个编码比特,第二比特组包括w个编码比特;
对所述多个比特组分别进行交织,并将交织得到的多个比特序列合并,得到第三比特序列;
第m次的发送处理具体包括使用第一星座图对第三比特序列进行调制,以使第一比特组中的v个编码比特被映射在第一星座图上的星座点对应的调制符号的被强保护的q个第一比特位置,使第二比特组中的w个编码比特被映射在第一星座图上的星座点对应的调制符号的被弱保护的(t-q)个比特位置;
第n次的发送处理具体包括使用第二星座图对第一比特序列进行调制,以使第一比特组中的v个编码比特被映射在第二星座图上的星座点对应的调制符号的被强保护的q个第二比特位置,使第二比特组中的w个比特被映射在第二星座图上的星座点对应的调制符号的被弱保护的(t-q)个比特位置。
可选地,作为一个实施例,对编码比特序列中包含的比特进行分组,得到多个比特组,包括:根据第一比特序列中包含的比特的重要等级,对第一比特序列中包含的比特进行分组,得到所述多个比特组。
可选地,第一比特组中包括的比特为系统比特,第二比特组中包括的比特为校验比特。
装置800和方法200中的发射端完全对应,装置800的相应单元分别用于执行方法200或其各实施例中由发射端执行的相应步骤和/或流程。其中,处理单元810用于执行方法200或其各实施例中由发射端的内部实现的步骤。
这里,处理单元810可以是处理器。收发单元520可以收发器。收发器包括接收器和发射器,同时具有接收和发射的功能。
可选地,处理单元510可以是一个处理装置,处理装置的上述功能可以部分或全部通过软件实现。当全部通过软件实现时,处理装置可以包括存储器和处理器,其中,存储器用于存储计算机程序,处理器从存储器中读取并运行该计算机程序,以执行方法200及其各实施例中由发射端执行的相应操作和/或流程。
在一个可能的设计中,处理装置的部分或全部通过软件实现时,处理装置包括处理器。用于存储计算机程序的存储器位于处理装置之外,处理器通过电路/电线与存储器连接,用于读取并执行存储器中存储的计算机程序。
在一个可能的设计中,处理装置的上述功能的部分或全部通过硬件实现时,处理装置包括:输入接口电路,用于接收输入的信息比特序列;逻辑电路,用于对信息比特序列进行信道编码,得到编码比特序列,以及对编码比特序列进行发送处理;输出接口电路,用于输出逻辑电路处理后的信息。
在具体实现时,该处理装置可以为芯片或集成电路。
在无线通信系统中,下行传输时,发射端为网络设备(例如,基站)。在上行传输时,终端设备为发射端。因此,本申请还提供一种终端设备和网络设备。
参见图15,图15是本申请提供的终端设备900的示意性结构图。如图15所示,终端设备900包括:一个或多个处理器901,一个或多个存储器902,一个或多个收发器903。处理器901用于控制收发器903收发信号,存储器902用于存储计算机程序,处理器901用于从存储器902中调用并运行该计算机程序,以执行本申请提供的发送信息的方法200及其各实施例中由发射端执行的相应流程和/或操作。
参见图16,图16是本申请提供的网络设备3000的示意性结构图。如图16所示,网络设备3000具有本申请的方法实施例中描述的发射端的功能。
网络设备3000可以包括一个或多个射频单元,如远端射频单元(remote radio unit,RRU)3100和一个或多个基带单元(baseband unit,BBU)。基带单元也可以称为数字单元(digital unit,DU)3200。所述RRU 3100可以称为收发单元,与图9中的通信单元620对应。可选地,该收发单元3100还可以称为收发机、收发电路、或者收发器等等,其可以包括至少一个天线3101和射频单元3102。可选地,收发单元3100可以包括接收单元和发送单元,接收单元可以对应于接收器(或称接收机、接收电路),发送单元可以对应于发射器(或称发射机、发射电路)。所述RRU 3100部分主要用于射频信号的收发以及射频信号与基带信号的转换,例如,用于向终端设备发送第一随机接入资源的配置信息。所述BBU 3200部分主要用于进行基带处理,对基站进行控制等。所述RRU 3100与BBU 3200可以是物理上设置在一起,也可以物理上分离设置的,即分布式基站。
所述BBU 3200为网络设备3000的控制中心,也可以称为处理单元,主要用于完成基带处理功能,如信道编码,复用,调制,扩频等。例如所述BBU(处理单元)配置所述多个RNTI。例如,可以与图16中的处理单元510对应。或者,与图18中的处理单元 710对应。
在一个示例中,所述BBU 3200可以由一个或多个单板构成,多个单板可以共同支持单一接入制式的无线接入网(例如,LTE网),也可以分别支持不同接入制式的无线接入网(例如,LTE网、5G网或其它网)。所述BBU 3200还包括存储器3201和处理器3202。所述存储器3201用以存储必要的指令和数据。所述处理器3202用于控制网络设备3000进行必要的动作,例如,用于控制网络设备3000执行上述方法实施例中由网络设备执行的操作流程。所述存储器3201和处理器3202可以服务于一个或多个单板。也就是说,可以每个单板上单独设置存储器和处理器。也可以是多个单板共用相同的存储器和处理器。此外每个单板上还可以设置有必要的电路。
上述BBU 3200可以用于执行上文方法实施例中由发射端内部实现的动作,而RRU3100可以用于执行上文方法实施例中发射端的发送或接收的动作。
本申请实施例中所述的芯片,可以是现场可编程门阵列(field-programmable gate array,FPGA)、专用集成芯片(application specific integrated circuit,ASIC)、系统芯片(system on chip,SoC)、中央处理器(central processor unit,CPU)、网络处理器(network processor,NP)、数字信号处理电路(digital signal processor,DSP),还可以是微控制器(micro controller unit,MCU、可编程控制器(programmable logic device,PLD)或其它集成芯片。
本申请实施例中的处理器可以是一种集成电路芯片,具有信号的处理能力。在实现过程中,上述方法实施例的各步骤可以通过处理器中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器可以是通用处理器、数字信号处理器(digital signal processor,DSP)、专用集成电路(application specific integrated circuit,ASIC)、FPGA或其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。本申请实施例公开的方法200或方法300中配置RNTI的步骤(例如,方法200中的步骤210,方法300中的步骤310-340)也可以由硬件处理器执行完成,或者由处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器,闪存、只读存储器,可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器,处理器读取存储器中的信息,结合其硬件完成上述方法的步骤。
本申请实施例中的存储器可以是易失性存储器或非易失性存储器,或可包括易失性和非易失性存储器两者。其中,非易失性存储器可以是只读存储器(read-only memory,ROM)、可编程只读存储器(programmable ROM,PROM)、可擦除可编程只读存储器(erasable PROM,EPROM)、电可擦除可编程只读存储器(electrically EPROM,EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory,RAM),其用作外部高速缓存。通过示例性但不是限制性说明,许多形式的RAM可用,例如静态随机存取存储器(static RAM,SRAM)、动态随机存取存储器(dynamic RAM,DRAM)、同步动态随机存取存储器(synchronous DRAM,SDRAM)、双倍数据速率同步动态随机存取存储器(double data rate SDRAM,DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM,ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM,SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM,DR RAM)。应注意,本文描述的系统和方法的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
可选的,上述的存储器与存储器可以是物理上相互独立的单元,或者,存储器也可以和处理器集成在一起。
此外,本申请还提供一种计算机可读存储介质,该计算机可读存储介质中存储有计算机指令,当计算机指令在计算机上运行时,使得计算机执行方法200以及各方法实施例中由发射端执行的相应操作和/或流程。
本申请还提供一种计算机程序产品,该计算机程序产品包括计算机程序代码,当计算机程序代码在计算机上运行时,使得计算机执行方法200以及各方法实施例中由发射端执行的相应操作和/或流程。
本申请还提供一种芯片,包括存储器和处理器,存储器用于存储计算机程序,处理器用于从存储器中调用并运行该计算机程序,以执行方法200以及各方法实施例中由发射端执行的相应操作和/或流程。
本申请还提供一种通信装置,包括至少一个处理器,所述至少一个处理器与至少一个存储器耦合,所述至少一个处理器,用于执行所述至少一个存储器中存储的计算机程序或指令,以使得所述通信装置执行各方法实施例中由发射端执行的相应操作和/或处理。
本申请还提供一种通信装置,包括处理器和接口电路,所述接口电路用于接收计算机代码或指令,并传输至所述处理器,所述处理器用于运行所述计算机代码或指令,以执行各方法实施例中由发射端执行的相应操作和/或处理。
本申请还提供一种通信装置,包括处理器和通信接口,所述通信接口用于接收计算机代码或指令,并传输至所述处理器,所述处理器用于运行所述计算机代码或指令,以执行各方法实施例中由发射端执行的相应操作和/或处理。
以上存储器、处理器、处理电路以及通信接口均可以为一个或多个,不作限定。
本领域普通技术人员可以意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,能够以电子硬件、或者计算机软件和电子硬件的结合来实现,具体取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到,上述描述的系统、装置和单元的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。
在本申请所提供的几个实施例中,所揭露的系统、装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例也仅仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本申请实施例的目的。
另外,在本申请各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时,可以存储 在一个计算机可读取存储介质中。基于这样的理解,本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。
以上所述,仅为本申请的具体实施方式。任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到的变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以权利要求的保护范围为准。

Claims (19)

  1. 一种发送信息的方法,其特征在于,包括:
    对信息比特序列进行信道编码,得到编码比特序列;
    对所述编码比特序列分别进行K次的发送处理后分K次进行发送,其中,所述发送处理包括交织、调制和资源映射中的一项或多项,所述K次的发送处理中至少有两次的发送处理不同,K≥2且K为整数。
  2. 根据权利要求1所述的方法,其特征在于,所述K次的发送处理中至少有两次的发送处理不同,包括如下情况下中的一项或多项:
    第m次的发送处理包括使用第一星座图对所述编码比特序列或交织后的编码比特序列进行调制,所述第n次的发送处理包括使用第二星座图对所述编码比特序列或交织后的编码比特序列进行调制,1≤m≤K,1≤n≤K,且m和n均为整数,m≠n;或者,
    所述第m次的发送处理包括采用第一交织方式对所述编码比特序列进行交织,所述第n次的发送处理包括采用第二交织方式对所述编码比特序列进行交织;或者,
    所述第m次的发送处理包括使用第一资源映射图样对调制符号进行资源映射,所述第n次的发送处理包括使用第二资源映射图样对调制符号进行资源映射。
  3. 根据权利要求1所述的方法,其特征在于,所述方法还包括:
    对所述编码比特序列中包含的比特进行分组,得到多个比特组,所述多个比特组中包括第一比特组和第二比特组;
    以及,所述K次的发送处理中至少有两次的发送处理,包括:
    第m次的发送处理具体包括对所述多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第一比特序列,以及使用第一星座图对所述第一比特序列进行调制,以使所述第一比特组中的比特被映射在所述第一星座图上的星座点对应的调制符号的被强保护的比特位置,使所述第二比特组中的比特被映射在所述第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤m≤K,且m为整数;
    第n次的发送处理具体包括对所述多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第二比特序列,以及使用所述第一星座图对所述第二比特序列进行调制,以使所述第一比特组中的比特被映射在所述第一星座图上的星座点对应的调制符号的被强保护的比特位置,使所述第二比特组中的比特被映射在所述第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤n≤K,且n为整数,m≠n,
    其中,所述第m次的发送处理对所述多个比特组中的至少一个比特组所采用的交织方式与所述第n次的发送处理对所述多个比特组中的至少一个比特组所采用的交织方式不同。
  4. 根据权利要求2所述的方法,其特征在于,所述第一星座图和所述第二星座图的阶数相等,所述第一星座图上的星座点对应的调制符号的被强保护的q个第一比特位置和所述第二星座图上的星座点对应的调制符号的被强保护的q个第二比特位置对应,且所述q个第一比特位置和所述q个第二比特位置被强保护的程度是互补的,2≤q≤t,t为所述第一星座图上的星座点对应的调制符号所能表示的比特的个数,q和t均为整数,所述互补 包括所述q个第一比特位置各自被强保护的程度高低的排序,与所述q个第二比特位置各自被强保护的程度高低的排序不同。
  5. 根据权利要求4所述的方法,其特征在于,所述方法还包括:
    对所述编码比特序列中包含的比特进行分组,得到多个比特组,所述多个比特组中包括第一比特组和第二比特组,所述第一比特组包括v个编码比特,所述第二比特组包括w个编码比特;
    对所述多个比特组分别进行交织,并将交织得到的多个比特序列合并,得到第三比特序列;
    所述第m次的发送处理具体包括使用所述第一星座图对所述第三比特序列进行调制,以使所述第一比特组中的v个编码比特被映射在所述第一星座图上的星座点对应的调制符号的被强保护的q个第一比特位置,使所述第二比特组中的w个编码比特被映射在所述第一星座图上的星座点对应的调制符号的被弱保护的(t-q)个比特位置;
    所述第n次的发送处理具体包括使用所述第二星座图对所述第三比特序列进行调制,以使所述第一比特组中的v个编码比特被映射在所述第二星座图上的星座点对应的调制符号的被强保护的q个第二比特位置,使所述第二比特组中的w个比特被映射在所述第二星座图上的星座点对应的调制符号的被弱保护的(t-q)个比特位置。
  6. 根据权利要求5所述的方法,其特征在于,所述对所述编码比特序列中包含的比特进行分组,得到多个比特组,包括:
    根据所述第一比特序列中包含的比特的重要等级,对所述第一比特序列中包含的比特进行分组,得到所述多个比特组。
  7. 根据权利要求5或6所述的方法,其特征在于,所述第一比特组中包括的比特为系统比特,所述第二比特组中包括的比特为校验比特。
  8. 一种发送信息的装置,其特征在于,包括:
    处理单元,用于对信息比特序列进行信道编码,得到编码比特序列,以及对所述编码比特序列分别进行K次的发送处理,其中,所述发送处理包括交织、调制和资源映射中的一项或多项,所述K次的发送处理中有至少两次的发送处理不同,K≥2且K为整数;
    收发单元,用于将所述处理单元的K次的发送处理后得到的信息分K次进行发送。
  9. 根据权利要求8所述的装置,其特征在于,所述K次的发送处理中至少有两次的发送处理不同,包括如下情况下中的一项或多项:
    第m次的发送处理包括使用第一星座图对所述编码比特序列或交织后的编码比特序列进行调制,所述第n次的发送处理包括使用第二星座图对所述编码比特序列或交织后的编码比特序列进行调制,1≤m≤K,1≤n≤K,且m和n均为整数,m≠n;或者,
    所述第m次的发送处理包括采用第一交织方式对所述编码比特序列进行交织,所述第n次的发送处理包括采用第二交织方式对所述编码比特序列进行交织;或者,
    所述第m次的发送处理包括使用第一资源映射图样对调制符号进行资源映射,所述第n次的发送处理包括使用第二资源映射图样对调制符号进行资源映射。
  10. 根据权利要求8所述的装置,其特征在于,所述处理单元还用于:
    对所述编码比特序列中包含的比特进行分组,得到多个比特组,所述多个比特组中包括第一比特组和第二比特组;
    以及,所述处理单元用于:
    第m次的发送处理具体包括对所述多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第一比特序列,以及使用第一星座图对所述第一比特序列进行调制,以使所述第一比特组中的比特被映射在所述第一星座图上的星座点对应的调制符号的被强保护的比特位置,使所述第二比特组中的比特被映射在所述第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤m≤K,且m为整数;
    第n次的发送处理具体包括对所述多个比特组分别进行交织,并将交织后得到的多个比特序列合并得到第二比特序列,以及使用所述第一星座图对所述第二比特序列进行调制,以使所述第一比特组中的比特被映射在所述第一星座图上的星座点对应的调制符号的被强保护的比特位置,使所述第二比特组中的比特被映射在所述第一星座图上的星座点对应的调制符号的被弱保护的比特位置,1≤n≤K,且n为整数,m≠n
    其中,所述第m次的发送处理对所述多个比特组中的至少一个比特组所采用的交织方式与所述第n次的发送处理对所述多个比特组中的至少一个比特组所采用的交织方式不同。
  11. 根据权利要求9所述的装置,其特征在于,所述第一星座图和所述第二星座图的阶数相等,所述第一星座图上的星座点对应的调制符号的被强保护的q个第一比特位置和所述第二星座图上的星座点对应的调制符号的被强保护的q个第二比特位置对应,且所述q个第一比特位置和所述q个第二比特位置被强保护的程度是互补的,2≤q≤t,t为所述第一星座图上的星座点对应的调制符号所能表示的比特的个数,q和t均为整数,所述互补包括所述q个第一比特位置各自被强保护的程度高低的排序,与所述q个第二比特位置各自被强保护的程度高低的排序不同。
  12. 根据权利要求11所述的装置,其特征在于,所述处理单元还用于:
    对所述编码比特序列中包含的比特进行分组,得到多个比特组,所述多个比特组中包括第一比特组和第二比特组,所述第一比特组包括v个编码比特,所述第二比特组包括w个编码比特;
    对所述多个比特组分别进行交织,并将交织得到的多个比特序列合并,得到第三比特序列;
    以及,所述处理单元用于:
    所述第m次的发送处理具体包括使用所述第一星座图对所述第三比特序列进行调制,以使所述第一比特组中的v个编码比特被映射在所述第一星座图上的星座点对应的调制符号的被强保护的q个第一比特位置,使所述第二比特组中的w个编码比特被映射在所述第一星座图上的星座点对应的调制符号的被弱保护的(t-q)个比特位置;
    所述第n次的发送处理具体包括使用所述第二星座图对所述第三比特序列进行调制,以使所述第一比特组中的v个编码比特被映射在所述第二星座图上的星座点对应的调制符号的被强保护的q个第二比特位置,使所述第二比特组中的w个比特被映射在所述第二星座图上的星座点对应的调制符号的被弱保护的(t-q)个比特位置。
  13. 根据权利要求12所述的装置,其特征在于,所述处理单元用于根据所述第一比特序列中包含的比特的重要等级,对所述第一比特序列中包含的比特进行分组,得到所述多个比特组。
  14. 根据权利要求12或13所述的装置,其特征在于,所述第一比特组中包括的比特为系统比特,所述第二比特组中包括的比特为校验比特。
  15. 一种计算机可读存储介质,其特征在于,所述计算机可读存储介质中存储有计算机指令,当所述计算机指令在计算机上运行时,使得计算机执行如权利要求1-7中任一项所述的方法。
  16. 一种芯片,其特征在于,包括一个或多个存储器以及一个或多个处理器,所述一个或多个存储器用于存储计算机程序,所述一个或多个处理器用于读取并执行所述一个或多个存储器中存储器的所述计算机程序,以执行如权利要求1-7中任一项所述的方法。
  17. 一种通信装置,其特征在于,所述通信装置包括至少一个处理器,所述至少一个处理器与至少一个存储器耦合,所述至少一个处理器,用于执行所述至少一个存储器中存储的计算机程序或指令,以使得所述通信装置执行如权利要求1-7中任一项所述的方法。
  18. 一种通信装置,其特征在于,包括处理器和接口电路,所述接口电路用于接收计算机代码或指令,并传输至所述处理器,所述处理器用于运行所述计算机代码或指令,以执行如权利要求1-7中任一项所述的方法。
  19. 一种通信装置,其特征在于,包括处理器和通信接口,所述通信接口用于接收计算机代码或指令,并传输至所述处理器,所述处理器用于运行所述计算机代码或指令,以执行如权利要求1-7中任一项所述的方法。
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