WO2020103614A1 - 报文的处理方法及装置 - Google Patents

报文的处理方法及装置

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Publication number
WO2020103614A1
WO2020103614A1 PCT/CN2019/111491 CN2019111491W WO2020103614A1 WO 2020103614 A1 WO2020103614 A1 WO 2020103614A1 CN 2019111491 W CN2019111491 W CN 2019111491W WO 2020103614 A1 WO2020103614 A1 WO 2020103614A1
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WO
WIPO (PCT)
Prior art keywords
board
arp
processor
message
arp entry
Prior art date
Application number
PCT/CN2019/111491
Other languages
English (en)
French (fr)
Inventor
林宁
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to EP19887079.2A priority Critical patent/EP3886381A4/en
Publication of WO2020103614A1 publication Critical patent/WO2020103614A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L61/00Network arrangements, protocols or services for addressing or naming
    • H04L61/09Mapping addresses
    • H04L61/10Mapping addresses of different types
    • H04L61/103Mapping addresses of different types across network layers, e.g. resolution of network layer into physical layer addresses or address resolution protocol [ARP]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/66Layer 2 routing, e.g. in Ethernet based MAN's
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/74Address processing for routing
    • H04L45/745Address table lookup; Address filtering
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/15Interconnection of switching modules
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2101/00Indexing scheme associated with group H04L61/00
    • H04L2101/60Types of network addresses
    • H04L2101/618Details of network addresses
    • H04L2101/622Layer-2 addresses, e.g. medium access control [MAC] addresses

Definitions

  • the present disclosure relates to the field of communications, and in particular, to a message processing method and device.
  • the mechanism of address resolution protocol (ARP) synchronization for distributed network devices is implemented in the following way: when a board in the device receives an ARP message, the device writes the ARP entry to the board Card. At the same time, in order to ensure that each board can correctly find the forwarding path to this ARP, the device CPU will synchronously write this ARP entry to all boards to inform other boards of the forwarding path of this ARP entry.
  • ARP address resolution protocol
  • the above design means that a board with a larger ARP carrying capacity is required, so the equipment cost is high. In the process of writing messages, it is necessary to ensure that the maximum ARP carrying capacity of each board in the device can meet the demand. If the maximum ARP carrying capacity of one of the boards cannot meet the demand, the entire device will be affected by the barrel effect.
  • the embodiments of the present disclosure provide a message processing method and device to at least solve the problem of high cost of network equipment, low efficiency of use, and inability to meet user needs caused by the ARP synchronization mechanism in the related art.
  • a packet processing method which includes: when the first board of a device receives an ARP packet, the processor of the device writes an ARP entry formed according to the ARP packet Into the first board; when the second board of the device receives a data message directed to the ARP entry, the processor synchronizes the ARP entry to the second board.
  • a packet processing apparatus which is located in a processor of a device and includes: a learning module configured to, when the first board of the device receives an ARP packet, The ARP entry formed by the packet is written to the first board; the synchronization module is configured to, when the second board of the device receives a packet directed to the ARP entry, the processor synchronizes the ARP entry to all Describe the second board.
  • a storage medium in which a computer program is stored, wherein the computer program is configured to execute the steps in any one of the above method embodiments during runtime.
  • an electronic device including a memory and a processor, the memory stores a computer program, the processor is configured to run the computer program to perform any of the above The steps in the method embodiment.
  • the board card when the board card performs ARP learning, only the board card learning the ARP is issued only without synchronizing other board cards, therefore, it can solve the problems caused by the ARP synchronization mechanism in the related art
  • the cost of network equipment is high, the use efficiency is low, and the problem of not meeting user needs is achieved, which achieves the effect of optimizing the utilization rate of network equipment and saving network costs.
  • FIG. 1 is a block diagram of a hardware structure of a mobile terminal to which a message processing method according to an embodiment of the present disclosure is applied;
  • FIG. 2 is a flowchart of a message processing method according to an embodiment of the present disclosure
  • FIG. 3 is a structural block diagram of a message processing apparatus according to an embodiment of the present disclosure.
  • FIG. 1 is a block diagram of a hardware structure of a mobile terminal to which a packet processing method according to an embodiment of the present disclosure is applied.
  • the mobile terminal 10 may include one or more (only one is shown in FIG. 1) processor 102 (the processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA, etc. ) And a memory 104 for storing data.
  • the above mobile terminal may further include a transmission device 106 for communication functions and an input and output device 108.
  • FIG. 1 is merely an illustration, which does not limit the structure of the mobile terminal described above.
  • the mobile terminal 10 may also include more or fewer components than those shown in FIG. 1, or have a different configuration from that shown in FIG.
  • the memory 104 may be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the message processing method in the embodiments of the present disclosure, and the processor 102 runs the computer program stored in the memory 104, thereby Implementation of various functional applications and data processing, that is, to achieve the above method.
  • the memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory.
  • the memory 104 may further include memories remotely provided with respect to the processor 102, and these remote memories may be connected to the mobile terminal 10 through a network. Examples of the above network include but are not limited to the Internet, intranet, local area network, mobile communication network, and combinations thereof.
  • the transmission device 106 is used to receive or send data via a network.
  • the specific example of the network described above may include a wireless network provided by a communication provider of the mobile terminal 10.
  • the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC for short), which can be connected to other network devices through the base station to communicate with the Internet.
  • the transmission device 106 may be a radio frequency (Radio Frequency, RF for short) module, which is used to communicate with the Internet in a wireless manner.
  • RF Radio Frequency
  • FIG. 2 is a flowchart of a method for processing a message according to an embodiment of the present disclosure. As shown in FIG. 2, The process includes the following steps:
  • Step S202 when the first board of the device receives the ARP message, the processor of the device writes the ARP entry formed according to the ARP message into the first board;
  • Step S204 when the second board of the device receives the data message directed to the ARP entry, the processor synchronizes the ARP entry to the second board.
  • the processor writing the ARP entry formed according to the ARP message into the first board includes: the processor generating the ARP after receiving the ARP message Entry; based on the port number of the ARP message, the processor determines the first board and sends the ARP entry to the first board.
  • the processor synchronizing the ARP entry to the second board includes: the processor receiving the data message sent by the second board through a subnet route, wherein the subnet The route is a route determined by the second board in the device after the host route corresponding to the data message is not found; after determining that the outlet of the data message is the first board, the The processor sends the data message to the first board through software forwarding; the processor synchronizes the ARP entry to the second board.
  • the second board receives the data packet (for example, ARP traffic), if it finds that the second board does not learn the ARP entry corresponding to the data packet, then the second board will search for and The subnet routing table related to the data message. And send the data message to the queried subnet route, so that the subnet route sends the data message to the processor.
  • the data packet for example, ARP traffic
  • the processor finds that the datagram text should be forwarded to the first board, that is, the outlet is the port of the first board. However, it is sent to the first board through soft armor forwarding. At the same time, the processor will also determine whether it is necessary to synchronize to the second board, and if necessary, send the ARP entry corresponding to the data packet to the second board. If it is not necessary, no other operations will be performed.
  • the second board when the second board receives the data message again, the second board sends the data message to the first board in the form of hardware forwarding.
  • the method further includes: the processor determining whether the ARP entry of the second board is hit by the data packet during an aging time; if the determination result is negative, the processing The device instructs the second board to delete the ARP entry.
  • the processor resynchronizes the ARP entry to the second board.
  • the method further includes: when the ARP entry of the first board is not hit by the data packet within an aging time, the processor instructs the first board to delete all Describe the ARP entry.
  • the method further includes: the processor queries a synchronization status of a third board, wherein the third board is a synchronized board that synchronizes the ARP entry of the first board; When it is determined that the third board in the synchronization board synchronizes the ARP entry, the processor instructs the third board to delete the ARP entry.
  • the processor writes the ARP entry formed according to the ARP message to the first board, further comprising: the processor writes the ARP exit port information and MAC information To the first board.
  • the distributed equipment board A receives 10.10.10.1 ARP learning on port a (there is a layer 3 interface on port a, and the IP address is configured as 10.10.10.2255.255.255.0).
  • Device card A port a receives 10.10.10.1 ARP packets.
  • Device board A reports this ARP message to the CPU, forming the 10.10.10.1 software ARP entry on the CPU.
  • the CPU delivers the ARP 10.10.10.1 and the ARP-related egress information port a and other MAC-related information to the board A according to the APR entry from the board A.
  • the device no longer synchronizes this ARP information to other boards, ending the ARP learning process.
  • IP packet with a destination address of 10.10.10.1 is received on port B of the distributed equipment board B, and Layer 3 forwarding is required
  • An IP packet with a destination address of 10.10.10.1 is received on port b of device board B.
  • Board B looks up the hardware host routing table and fails to find the host route of 10.10.10.1, but it can find the subnet route of 10.10.10.0255.255.255.0.
  • the device CPU finds that the exit of 10.10.10.1 in the software ARP table is port a of board A, and then softly transfers the message out.
  • the device CPU synchronizes this ARP entry 10.10.10.1 to the source board B of this data packet.
  • the hardware ARP entry of 10.10.10.1 can be queried on board B and directly forwarded by hardware.
  • the ARP aging time of 10.10.10.1 on port A of the distributed equipment board A is aging (ARP is aging according to the global situation)
  • the ARP of 10.10.10.1 on board A reaches the aging time. If there is no ARP response, aging is required.
  • the CPU deletes the 10.10.10.1 ARP entry on board A.
  • the CPU determines that the ARP entry 10.10.10.1 on board B is hit by the packet.
  • the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware, but in many cases the former Better implementation.
  • the technical solution of the present disclosure can be embodied in the form of a software product in essence or part that contributes to the existing technology, and the computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk,
  • the CD-ROM includes several instructions to enable a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the embodiments of the present disclosure.
  • a packet processing device is also provided.
  • the device is used to implement the above-mentioned embodiments and preferred implementations, and those that have already been described will not be repeated.
  • the term "module” may implement a combination of software and / or hardware that performs predetermined functions.
  • the devices described in the following embodiments are preferably implemented in software, implementation of hardware or a combination of software and hardware is also possible and conceived.
  • FIG. 3 is a structural block diagram of a packet processing apparatus according to an embodiment of the present disclosure. As shown in FIG. 3, it is located in the processor of the device and includes:
  • the learning module 32 is configured to, when the first board of the device receives the ARP message, write the ARP entry formed according to the ARP message into the first board;
  • the synchronization module 34 is configured to, when the second board of the device receives a packet directed to the ARP entry, the processor synchronizes the ARP entry to the second board.
  • the above modules can be implemented by software or hardware, and the latter can be implemented by the following methods, but not limited to this: the above modules are all located in the same processor; or, the above modules can be combined in any combination The forms are located in different processors.
  • An embodiment of the present disclosure also provides a storage medium in which a computer program is stored, wherein the computer program is configured to execute any of the steps in the above method embodiments during runtime.
  • the above storage medium may be set to store a computer program for performing the following steps:
  • the processor synchronizes the ARP entry to the second board.
  • the above storage medium may include, but is not limited to: a USB flash drive, a read-only memory (Read-Only Memory, ROM for short), a random access memory (Random Access Memory, RAM for short)
  • ROM Read-Only Memory
  • RAM Random Access Memory
  • Various media that can store computer programs such as removable hard disks, magnetic disks, or optical disks.
  • An embodiment of the present disclosure also provides an electronic device, including a memory and a processor, where the computer program is stored in the memory, and the processor is configured to run the computer program to perform any of the steps in the above method embodiments.
  • the electronic device may further include a transmission device and an input-output device, wherein the transmission device is connected to the processor, and the input-output device is connected to the processor.
  • the foregoing processor may be configured to perform the following steps through a computer program:
  • the processor synchronizes the ARP entry to the second board.
  • modules or steps of the present disclosure can be implemented by a general-purpose computing device, and they can be concentrated on a single computing device or distributed in a network composed of multiple computing devices
  • they can be implemented with program code executable by the computing device, so that they can be stored in the storage device to be executed by the computing device, and in some cases, can be in a different order than here
  • the steps shown or described are performed, or they are made into individual integrated circuit modules respectively, or multiple modules or steps among them are made into a single integrated circuit module to achieve. In this way, the present disclosure is not limited to any specific combination of hardware and software.

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  • Computer Networks & Wireless Communication (AREA)
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Abstract

本公开提供了一种报文的处理方法及装置。报文的处理方法包括:当设备的第一板卡收到ARP报文时,所述设备的处理器将根据ARP报文形成的ARP条目写入所述第一板卡;当设备的第二板卡收到指向所述ARP条目的数据报文时,所述处理器将该ARP条目同步至所述第二板卡。通过本公开所提供的方案,解决了相关技术中ARP同步机制所导致的网络设备成本高,使用效率低,不能够满足用户需求的问题,达到了优化网络设备的利用率,并节省网络成本的效果。

Description

报文的处理方法及装置 技术领域
本公开涉及通信领域,具体而言,涉及一种报文的处理方法及装置。
背景技术
相关技术中,分布式网络设备的地址解析协议(Address Resolution Protocol,简称ARP)同步的机制通过以下方式实现:当设备中某个板卡收到ARP报文,设备将此ARP条目写入此板卡中。同时,为了保证每个板卡都可以正确的寻找到到这个ARP的转发路径,设备CPU会把这个ARP条目向所有的板卡进行同步写入,告知其他板卡此ARP条目的转发路径。然而通过上述的方法可以看出的是,每一个写入的ARP条目都会同步到其他的板卡中。如果存在多个ARP报文写入不同的板卡的话,那么每一个板卡上写入的ARP报文都会同步到其他的板卡中。然而板卡的承载能力有限,如果有重要的数据信息需要同步到其他报文时,很可能因此存储满的情况导致拒绝,会给用户造成极大的困扰。此外上述设计意味着需要更大的ARP承载能力的板卡,因此设备成本很高。再而在报文写入过程中,需要保证设备中每一个板卡的最大ARP承载能力都能够满足需求。如果其中一个板卡的最大ARP承载能力不能够满足需求的话,那么整个设备会受到木桶效应的影响。
公开内容
本公开实施例提供了一种报文的处理方法及装置,以至少解决相关技术中的ARP同步机制所带来的网络设备成本高,使用效率低,不能够满足用户需求的问题。
根据本公开的一个实施例,提供了一种报文的处理方法,包括:当设备的第一板卡收到ARP报文时,所述设备的处理器将根据ARP报文形成的ARP条目写入所述第一板卡;当设备的第二板卡收到指向所述ARP条 目的数据报文时,所述处理器将该ARP条目同步至所述第二板卡。
根据本公开的另一个实施例,提供了一种报文的处理装置,位于设备的处理器中,包括:学习模块,设置为当设备的第一板卡收到ARP报文时,将根据ARP报文形成的ARP条目写入所述第一板卡;同步模块,设置为当设备的第二板卡收到指向所述ARP条目的报文时,所述处理器将该ARP条目同步至所述第二板卡。
根据本公开的又一个实施例,还提供了一种存储介质,所述存储介质中存储有计算机程序,其中,所述计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
根据本公开的又一个实施例,还提供了一种电子装置,包括存储器和处理器,所述存储器中存储有计算机程序,所述处理器被设置为运行所述计算机程序以执行上述任一项方法实施例中的步骤。
通过本公开,由于在板卡进行ARP学习的时候,仅仅只对学习此ARP的板卡进行ARP条目的下发而不进行其他板卡的同步,因此,可以解决相关技术中ARP同步机制所导致的网络设备成本高,使用效率低,不能够满足用户需求的问题,达到了优化网络设备的利用率,并节省网络成本的效果。
附图说明
此处所说明的附图用来提供对本公开的进一步理解,构成本申请的一部分,本公开的示意性实施例及其说明用于解释本公开,并不构成对本公开的不当限定。在附图中:
图1是本公开实施例的一种报文的处理方法所应用的移动终端的硬件结构框图;
图2是根据本公开实施例的一种报文的处理方法的流程图;
图3是根据本公开实施例的一种报文的处理装置的结构框图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本公开。需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。
需要说明的是,本公开的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。
实施例1
本申请实施例所提供的方法可以在移动终端、计算机终端或者类似的运算装置中执行。以运行在移动终端上为例,图1是本公开实施例的一种报文的处理方法所应用的移动终端的硬件结构框图。如图1所示,移动终端10可以包括一个或多个(图1中仅示出一个)处理器102(处理器102可以包括但不限于微处理器MCU或可编程逻辑器件FPGA等的处理装置)和用于存储数据的存储器104,可选地,上述移动终端还可以包括用于通信功能的传输设备106以及输入输出设备108。本领域普通技术人员可以理解,图1所示的结构仅为示意,其并不对上述移动终端的结构造成限定。例如,移动终端10还可包括比图1中所示更多或者更少的组件,或者具有与图1所示不同的配置。
存储器104可用于存储计算机程序,例如,应用软件的软件程序以及模块,如本公开实施例中的报文的处理方法对应的计算机程序,处理器102通过运行存储在存储器104内的计算机程序,从而执行各种功能应用以及数据处理,即实现上述的方法。存储器104可包括高速随机存储器,还可包括非易失性存储器,如一个或者多个磁性存储装置、闪存、或者其他非易失性固态存储器。在一些实例中,存储器104可进一步包括相对于处理器102远程设置的存储器,这些远程存储器可以通过网络连接至移动终端10。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
传输装置106用于经由一个网络接收或者发送数据。上述的网络具体 实例可包括移动终端10的通信供应商提供的无线网络。在一个实例中,传输装置106包括一个网络适配器(Network Interface Controller,简称为NIC),其可通过基站与其他网络设备相连从而可与互联网进行通讯。在一个实例中,传输装置106可以为射频(Radio Frequency,简称为RF)模块,其用于通过无线方式与互联网进行通讯。
在本实施例中提供了一种运行于上述移动终端的一种报文的处理方法,图2是根据本公开实施例的一种报文的处理方法的流程图,如图2所示,该流程包括如下步骤:
步骤S202,当设备的第一板卡收到ARP报文时,所述设备的处理器将根据ARP报文形成的ARP条目写入所述第一板卡;
步骤S204,当设备的第二板卡收到指向所述ARP条目的数据报文时,所述处理器将该ARP条目同步至所述第二板卡。
可选地,所述处理器将根据所述ARP报文形成的所述ARP条目写入所述第一板卡,包括:所述处理器在接收到所述ARP报文后,生成所述ARP条目;根据所述ARP报文的端口号,所述处理器确定所述第一板卡并将所述ARP条目发送至所述第一板卡。
可选地,所述处理器将所述ARP条目同步至所述第二板卡包括:所述处理器接收第二板卡通过子网路由发送的所述数据报文,其中,所述子网路由为所述设备中所述第二板卡在未查到所述数据报文对应的主机路由后确定的路由;在确定所述数据报文的出口为所述第一板卡后,所述处理器将所述数据报文通过软件转发的形式发送至所述第一板卡;所述处理器将所述ARP条目同步至所述第二板卡。
具体而言,如果第二板卡收到数据报文中(例如ARP的流量),如果发现第二板卡本地没有学习到该数据报文对应的ARP条目,那么第二板卡会去查找与该数据报文相关的子网路由表。并向查询到的子网路由发送该数据报文,使得子网路由将数据报文发送至处理器当中。
具体而言,处理器会根据自身保存的ARP表,查询到该数据报文本 应该转发到第一板卡,即出口是第一板卡的端口。然而通过软甲转发的方式发送至第一板卡。同时处理器还会判断是否有必要同步到第二板卡上,如果有必要的话,则将数据报文对应的ARP条目发送给第二板卡。如果没有必要的话,则不会进行其他的操作。
可选地,在所述第二板卡再次接收到所述数据报文时,所述第二板卡通过硬件转发的形式将所述数据报文发送至所述第一板卡。
可选地,所述方法还包括:所述处理器判断在老化时间是否所述第二板卡的所述ARP条目被所述数据报文命中;在判断结果为否的情况下,所述处理器指示所述第二板卡删除所述ARP条目。
可选地,在所述第二板卡再次接收到所述数据报文时,所述处理器将所述ARP条目重新同步至所述第二板卡。
可选地,所述方法还包括:在老化时间内所述第一板卡的所述ARP条目未被所述数据报文命中的情况下,所述处理器指示所述第一板卡删除所述ARP条目。
可选地,所述方法还包括:所述处理器查询第三板卡的同步情况,其中,所述第三板卡为同步了所述第一板卡的所述ARP条目的同步板卡;当确定所述同步板卡中第三板卡同步了所述ARP条目时,所述处理器指示所述第三板卡删除所述ARP条目。
可选地,所述处理器将根据所述ARP报文形成的所述ARP条目写入所述第一板卡,还包括:所述处理器将所述ARP的出口端口信息以及MAC信息写入到所述第一板卡。
具体而言,在本实施例中还提供了如下的实施例,以便更好的理解技术方案:
场景1:
分布式设备板卡A端口a上收到10.10.10.1的ARP学习(端口a上有三层接口,IP地址配置为10.10.10.2 255.255.255.0)。
1、设备板卡A端口a收到10.10.10.1的ARP报文。
2、设备板卡A上报此ARP报文给CPU,形成CPU上的软件ARP表项10.10.10.1条目。
3、CPU根据此APR条目是来自于板卡A,则下发ARP 10.10.10.1和此ARP相关的出口信息端口a以及其他MAC相关信息给板卡A。
4、设备不再将此ARP信息同步给其他板卡,结束ARP学习过程。
场景2:
分布式设备板卡B端口b上收到目的地址是10.10.10.1的IP报文,需要进行三层转发
1、设备板卡B端口b上收到目的地址是10.10.10.1的IP报文。
2、板卡B查找硬件主机路由表,未能找到10.10.10.1的主机路由,但是可以找到10.10.10.0 255.255.255.0的子网路由。
3、10.10.10.0 255.255.255.0的子网路由将此报文上送CPU
4、设备CPU在软件ARP表中查询到10.10.10.1的出口是板卡A的端口a,则将此报文软转出去。
5、设备CPU将此ARP表项10.10.10.1,同步到此数据报文的来源板卡B上。
6、后续的数据流量,在板卡B上可以查询到10.10.10.1的硬件ARP条目,直接硬件转发。
场景3:
分布式设备板卡A端口a上10.10.10.1的ARP老化时间到达被老化(ARP按全局情况老化)
1、板卡A上10.10.10.1的ARP到达老化时间没有ARP应答则需要进行老化。
2、CPU删除板卡A上10.10.10.1的ARP条目。
3、查询此ARP条目在其他板卡上的同步情况,发现板卡B也下发了此ARP条目,则删除板卡B的ARP条目10.10.10.1。
场景4:
分布式设备板卡B端口b上10.10.10.1的流量消失(ARP按流量命中情况老化)
1、板卡B上10.10.10.1的流量已经消失。
2、CPU判断板卡B上的ARP条目10.10.10.1的表项被报文命中情况。
3、若持续一段时间此ARP条目没有被命中,则板卡B上按需将此ARP条目删除。
4、若再有流量再次触发此10.10.10.1的ARP条目,则重新下发此条目。
5、若10.10.10.1的ARP条目在A板卡上被老化,则按照场景3的方法全局删除。
通过上述步骤,解决了相关技术中ARP同步机制所导致的网络设备成本高,使用效率低,不能够满足用户需求的问题,达到了优化网络设备的利用率,并节省网络成本的效果。
通过以上的实施方式的描述,本领域的技术人员可以清楚地了解到根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现,当然也可以通过硬件,但很多情况下前者是更佳的实施方式。基于这样的理解,本公开的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中,包括若干指令用以使得一台终端设备(可以是手机,计算机,服务器,或者网络设备等)执行本公开各个实施例所述的方法。
实施例2
在本实施例中还提供了一种报文的处理装置,该装置用于实现上述实 施例及优选实施方式,已经进行过说明的不再赘述。如以下所使用的,术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置较佳地以软件来实现,但是硬件,或者软件和硬件的组合的实现也是可能并被构想的。
图3是根据本公开实施例的一种报文的处理装置的结构框图,如图3所示,位于设备的处理器中,包括:
学习模块32,设置为当设备的第一板卡收到ARP报文时,将根据ARP报文形成的ARP条目写入所述第一板卡;
同步模块34,设置为当设备的第二板卡收到指向所述ARP条目的报文时,所述处理器将该ARP条目同步至所述第二板卡。
需要说明的是,上述各个模块是可以通过软件或硬件来实现的,对于后者,可以通过以下方式实现,但不限于此:上述模块均位于同一处理器中;或者,上述各个模块以任意组合的形式分别位于不同的处理器中。
实施例3
本公开的实施例还提供了一种存储介质,该存储介质中存储有计算机程序,其中,该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
可选地,在本实施例中,上述存储介质可以被设置为存储用于执行以下步骤的计算机程序:
S1,当设备的第一板卡收到ARP报文时,所述设备的处理器将根据ARP报文形成的ARP条目写入所述第一板卡;
S2,当设备的第二板卡收到指向所述ARP条目的数据报文时,所述处理器将该ARP条目同步至所述第二板卡。
可选地,在本实施例中,上述存储介质可以包括但不限于:U盘、只读存储器(Read-Only Memory,简称为ROM)、随机存取存储器(Random Access Memory,简称为RAM)、移动硬盘、磁碟或者光盘等各种可以存 储计算机程序的介质。
本公开的实施例还提供了一种电子装置,包括存储器和处理器,该存储器中存储有计算机程序,该处理器被设置为运行计算机程序以执行上述任一项方法实施例中的步骤。
可选地,上述电子装置还可以包括传输设备以及输入输出设备,其中,该传输设备和上述处理器连接,该输入输出设备和上述处理器连接。
可选地,在本实施例中,上述处理器可以被设置为通过计算机程序执行以下步骤:
S1,当设备的第一板卡收到ARP报文时,所述设备的处理器将根据ARP报文形成的ARP条目写入所述第一板卡;
S2,当设备的第二板卡收到指向所述ARP条目的数据报文时,所述处理器将该ARP条目同步至所述第二板卡。
可选地,本实施例中的具体示例可以参考上述实施例及可选实施方式中所描述的示例,本实施例在此不再赘述。
显然,本领域的技术人员应该明白,上述的本公开的各模块或各步骤可以用通用的计算装置来实现,它们可以集中在单个的计算装置上,或者分布在多个计算装置所组成的网络上,可选地,它们可以用计算装置可执行的程序代码来实现,从而,可以将它们存储在存储装置中由计算装置来执行,并且在某些情况下,可以以不同于此处的顺序执行所示出或描述的步骤,或者将它们分别制作成各个集成电路模块,或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样,本公开不限制于任何特定的硬件和软件结合。
以上所述仅为本公开的优选实施例而已,并不用于限制本公开,对于本领域的技术人员来说,本公开可以有各种更改和变化。凡在本公开的原则之内,所作的任何修改、等同替换、改进等,均应包含在本公开的保护范围之内。

Claims (12)

  1. 一种报文的处理方法,包括:
    当设备的第一板卡收到地址解析协议ARP报文时,所述设备的处理器将根据ARP报文形成的ARP条目写入所述第一板卡;
    当设备的第二板卡收到指向所述ARP条目的数据报文时,所述处理器将该ARP条目同步至所述第二板卡。
  2. 根据权利要求1所述的方法,其中,所述处理器将根据所述ARP报文形成的所述ARP条目写入所述第一板卡,包括:
    所述处理器在接收到所述ARP报文后,生成所述ARP条目;
    根据所述ARP报文的端口号,所述处理器确定所述第一板卡并将所述ARP条目发送至所述第一板卡。
  3. 根据权利要求1所述的方法,其中,所述处理器将所述ARP条目同步至所述第二板卡包括:
    所述处理器接收第二板卡通过子网路由发送的所述数据报文,其中,所述子网路由为所述设备中所述第二板卡在未查到所述数据报文对应的主机路由后确定的路由;
    在确定所述数据报文的出口为所述第一板卡后,所述处理器将所述数据报文通过软件转发的形式发送至所述第一板卡;
    所述处理器将所述ARP条目同步至所述第二板卡。
  4. 根据权利要求3所述的方法,其中,在所述第二板卡再次接收到所述数据报文时,所述第二板卡通过硬件转发的形式将所述数据报文发送至所述第一板卡。
  5. 根据权利要求3或4所述的方法,还包括:
    所述处理器判断在老化时间是否所述第二板卡的所述ARP条目 被所述数据报文命中;
    在判断结果为否的情况下,所述处理器指示所述第二板卡删除所述ARP条目。
  6. 根据权利要求5所述的方法,还包括:在所述第二板卡再次接收到所述数据报文时,所述处理器将所述ARP条目重新同步至所述第二板卡。
  7. 根据权利要求5所述的方法,还包括:
    在老化时间内所述第一板卡的所述ARP条目未被所述数据报文命中的情况下,所述处理器指示所述第一板卡删除所述ARP条目。
  8. 根据权利要求7所述的方法,还包括:
    所述处理器查询第三板卡的同步情况,其中,所述第三板卡为同步了所述第一板卡的所述ARP条目的同步板卡;
    当确定所述同步板卡中第三板卡同步了所述ARP条目时,所述处理器指示所述第三板卡删除所述ARP条目。
  9. 根据权利要求1-8任一项所述的方法,其中,所述处理器将根据所述ARP报文形成的所述ARP条目写入所述第一板卡,还包括:
    所述处理器将所述ARP的出口端口信息以及MAC信息写入到所述第一板卡。
  10. 一种报文的处理装置,位于设备的处理器中,所述报文的处理装置包括:
    学习模块,设置为当设备的第一板卡收到地址解析协议ARP报文时,将根据ARP报文形成的ARP条目写入所述第一板卡;
    同步模块,设置为当设备的第二板卡收到指向所述ARP条目的报 文时,所述处理器将该ARP条目同步至所述第二板卡。
  11. 一种存储介质,所述存储介质中存储有计算机程序,其中,所述计算机程序被设置为运行时执行所述权利要求1至9任一项中所述的方法。
  12. 一种电子装置,包括存储器和处理器,所述存储器中存储有计算机程序,所述处理器被设置为运行所述计算机程序以执行所述权利要求1至9任一项中所述的方法。
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