WO2020098003A1

WO2020098003A1 - Pixel driving architecture, display panel and display device

Info

Publication number: WO2020098003A1
Application number: PCT/CN2018/118571
Authority: WO
Inventors: 胡云川; 纪飞林
Original assignee: 惠科股份有限公司
Priority date: 2018-11-14
Filing date: 2018-11-30
Publication date: 2020-05-22
Also published as: CN109240009B; CN109240009A

Abstract

A pixel driving architecture, a display panel and a display device, the pixel driving architecture comprising: first in-plane data lines and second in-plane data lines, wherein virtual data lines are provided between the first in-plane data lines and the second in-plane data lines, and the first in-plane data lines and the second in-plane data lines are connected to corresponding pixel units respectively; first-type driving chips, which are correspondingly connected to the first in-plane data lines by means of first output data lines respectively; and second-type driving chips, which are correspondingly connected to the virtual data lines and the second in-plane data lines in sequence by means of second output data lines.

Description

Pixel driving structure, display panel and display device

This application requires priority to be submitted to the Chinese Patent Office on November 14, 2018, with the application number 201811353492.7 and the priority of the Chinese patent application titled "Pixel Drive Architecture, Display Panel and Display Device", the entire contents of which are incorporated by reference in this document Applying.

Technical field

The present application relates to the field of display technology, in particular to a pixel driving architecture, a display panel, and a display device.

Background technique

The statements here only provide background information related to the present application and do not necessarily constitute prior art. Liquid crystal display (Liquid Crystal) (LCD) is widely used in the display screen of notebook computers, mobile phones, etc. due to its advantages such as lightness, thinness, power saving and no radiation. Full HD LCD panels often use flip pixel structure. In order to avoid color shift, the horizontal polarity is often set to 1 + 2line form (ie +-++-+).

In the flip-pixel drive architecture of a traditional full HD LCD panel, the output chip of the drive signal includes S1-S6, where S1-S5 all have 960 drive signal outputs, and the polarity corresponding to each four drive signals is positive, negative, negative, positive Repeated arrangement, and S6 has 966 drive signal outputs, which can not achieve the same polarity arrangement as S1-S5, resulting in discontinuous horizontal polarity at the junction of S5 and S6, so that the corresponding display panel at the junction of S5 and S6 Stripes are apt to appear during display. Therefore, the display driving effect of the inverted pixel driving structure of the conventional full high-definition display panel is poor.

Application content

According to various embodiments of the present application, a pixel driving architecture, a display panel, and a display device are provided.

A pixel driving architecture, the architecture includes:

Data cable in the first plane;

A second in-plane data line, a virtual data line is provided between the first in-plane data line and the second in-plane data line, the first in-plane data line and the second in-plane data line are respectively Connect the corresponding pixel unit;

A first type of driving chip, the first type of driving chip is respectively connected to the first in-plane data line through a first output data line;

And a second-type driver chip, the second-type driver chip is sequentially connected to the virtual data line and the second in-plane data line through a second output data line.

A display panel including:

A pixel driving architecture, the pixel driving architecture includes a first in-plane data line; a second in-plane data line, a virtual data line is provided between the first in-plane data line and the second in-plane data line, so The first in-plane data line and the second in-plane data line are respectively connected to corresponding pixel units; a first type of driving chip, the first type of driving chip is respectively connected to the first in-plane through the first output data line Data lines are correspondingly connected; and a second type of driving chip, the second type of driving chip is sequentially connected to the virtual data line and the second in-plane data line through the second output data line;

A first substrate, the first in-plane data line and the second in-plane data line are placed on the first substrate;

A second substrate, the first substrate being opposite to the second substrate; and

A liquid crystal layer, the liquid crystal layer is interposed between the first substrate and the second substrate.

A display device includes a backlight module and a display panel. The display panel includes:

A pixel driving architecture, the pixel driving architecture includes a first in-plane data line; a second in-plane data line, a virtual data line is provided between the first in-plane data line and the second in-plane data line, so The first in-plane data line and the second in-plane data line are respectively connected to corresponding pixel units; a first type of driving chip, the first type of driving chip is connected to the first in-plane through the first output data line Data lines are correspondingly connected; and a second type of driving chip, the second type of driving chip is sequentially connected to the virtual data line and the second in-plane data line through the second output data line;

The details of one or more embodiments of the application are set forth in the drawings and description below. Other features, objects, and advantages of this application will become apparent from the description, drawings, and claims.

BRIEF DESCRIPTION

In order to more clearly explain the embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required in the embodiments or the description of the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present application. For those of ordinary skill in the art, without paying any creative work, other drawings may be obtained based on these drawings.

FIG. 1 is a schematic diagram of a pixel driving architecture in an embodiment;

2 is a schematic diagram of a pixel driving architecture in another embodiment;

FIG. 3 is a schematic diagram of the correspondence between the polarity and the in-plane data line, the driving chip, and the output data line in an embodiment.

detailed description

In order to facilitate understanding of the present application, the present application will be described more fully below with reference to related drawings. The drawings show alternative embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present application more thorough and comprehensive.

Referring to FIG. 1, a pixel driving architecture includes: a first in-plane data line 100; a second in-plane data line 200, and dummy data is provided between the first in-plane data line 100 and the second in-plane data line 200 Line 500, the first in-plane data line 100 and the second in-plane data line 200 are respectively connected to corresponding pixel units; the first type driving chip 300, the first type driving chip 300 respectively communicates with the first surface through the first output data line 310 The internal data lines 100 are correspondingly connected; the second type of driving chip 400, which is correspondingly connected to the virtual data line 500 and the second in-plane data line 200 in sequence through the second output data line 410.

Specifically, the in-plane data line refers to a data line that transmits the driving signal output from the driving chip (that is, the first type driving chip and the second type driving chip) to the corresponding pixel unit, and is connected to the pixel unit. The type of drive control chip that provides the drive signal divides the in-plane data line into a first in-plane data line 100 and a second in-plane data line 200. In the display panel, scan lines arranged in the first direction and in-plane data lines arranged in the second direction (ie, the first in-plane data line 100 and the second in-plane data line 200) are often provided on the substrate. A plurality of pixel units arranged in an array are defined at the intersection with the in-plane data line insulation. The array substrate row drive (Gate Driver on Array, GOA) circuit is connected to the scanning line to provide scanning signals for the pixel unit; the first type of driving chip 300 is connected to the first in-plane data line 100 through the first output data line 310, the first The second-type driving chip 400 is connected to the second in-plane data line 200 through the second output data line 410 to provide driving data signals for the pixel unit, and then displays the corresponding image on the display panel.

In the traditional Full High Definition (FHD, resolution 1920 * 1080) liquid crystal display panel, in order to achieve a good display effect, a flip-pixel structure is often used between the in-plane data line and the pixel unit Format, so that the number of in-plane data lines in the full HD LCD panel will be one more than the number of pixel columns. If the same type of driver chip is used to drive the pixel unit, it will cause an in-plane data line to fail Receiving the corresponding driving data signal, therefore, the driving slice in the full high-definition liquid crystal display panel includes the first type driving chip and the second type driving chip. Since the number of output signals of the first type drive chip and the output signal of the second type drive chip are inconsistent, the corresponding output polarities of the first type drive chip and the second type drive chip in the horizontal direction will also be inconsistent, resulting in the first The horizontal polarities corresponding to the junctions of the driver chips of the second type and the driver chips of the second type are discontinuous, and stripes are generated when the pixel unit performs display. By inserting a dummy data line between the in-plane data line corresponding to the first-type driver chip and the in-plane data line corresponding to the second-type driver chip, the corresponding The data lines in the two planes are connected to the dummy data line, and the inserted dummy data line will not drive the pixel unit, and the output signal of horizontal polarity discontinuity will be suspended, making the output signal of the pixel unit drive in the horizontal direction It skips the second output data line connected to the virtual output data line, and forms a continuous polarity in the horizontal direction to avoid the occurrence of stripes at the part during display. Compared with the traditional pixel driving method, it has a better display driving effect.

Please refer to FIG. 1. In one embodiment, the number of virtual data lines 500 is two. Specifically, in this embodiment, the polarities of the driving signals output by the first type driving chip 300 are repeatedly arranged in a unit of "+-+", which can effectively avoid the occurrence of color shift problems. The output driving signal of the first type driving chip 300 is an integer multiple of four, that is, the polarity of the driving signal output by the first type driving chip 300 in the horizontal direction can be kept continuous. However, due to the flipped pixel architecture, the number of in-plane data line lines is one more than that of the pixel columns, and the corresponding number of driving signals output by the corresponding second type driving chip 400 should be greater than the number of driving signals output by the first type driving chip 300. It can ensure that each pixel unit has a corresponding driving signal input. At this time, in order to ensure that the polarities of the second type driving chip 400 and the first type driving chip 300 in the horizontal direction are consistent (that is, the polarities in the horizontal direction are continuous), the data line 100 in the first plane and the data in the second plane Two virtual data lines 500 are inserted between the lines 200. Normally, the horizontal polarity corresponding to the driving signal output by the second type driving chip 400 is "-++-++-++ ......", and the first The horizontal polarity of the first-type driver chip 300 adjacent to the second-type driver chip 400 is "+-+", in order to keep the polarity in the horizontal direction consistent with the first-type driver chip 300, that is, the second type The polarity of the water product in the driving chip 400 adjacent to the first type driving chip 300 is also "+-+", and the output signal of the second type driving chip 400 is closer to the portion of the first type driving chip 300 The second output data lines 410 corresponding to the horizontal polarity "-+" are respectively connected to the virtual data lines 500, and the drive signal corresponding to the "-+" polarity is short-circuited. Therefore, the horizontal polarity corresponding to the output signals of the first type driving chip 300 and the second type driving chip 400 is "+-+" "+-++-++ ......", thereby ensuring the level The polarity in the direction is continuous.

In one embodiment, the number of the first type driving chips 300 is two or more, and the number of the second type driving chips 400 is one. Specifically, in different display panels, the number and arrangement of pixel units are inconsistent, so that in different types of display panels, the number of driving chips used to provide drive data signals for the pixel units is not unique of. In addition, in the inverted pixel architecture, due to the setting of the driving inversion method, the number of in-plane data lines is one more than the number of pixel columns, and thus the types of driving chips that provide driving signals for pixel units are also inconsistent, that is, the first type of driving The number of driving signals output by the chip 300 does not match the number of driving signals output by the second type driving chip 400. In one embodiment, the amount of output data corresponding to the second type drive chip 400 is greater than the amount of output data of the first type drive chip 300, and correspondingly connects a portion of the second output data line 410 corresponding to the second type drive chip 400 to The dummy data line 500 outputs the output signal corresponding to the discontinuous polarity through the dummy data line 500 without driving the pixel unit, and keeps the output signal for driving the pixel unit in the first type driving chip 300 and the second type driving chip 400 Keep it continuous to avoid streaking.

It should be noted that, referring to FIG. 2, in one embodiment, the number of the first type of driving chips 300 is five. Specifically, the number of the first-type driving chips 300 is five, and the horizontal polarity corresponding to the driving signal of each first-type driving chip 300 is repeatedly arranged in a unit of "+-+" to ensure that the first The horizontal polarity in one direction is continuous. The number of output signals of the second type driving chip 400 and the first type driving chip 300 are inconsistent, and the second output data line 410 adjacent to the horizontal polarity is connected to the virtual data line 500 by connecting the virtual data line 500, so that the horizontal Keep the polarity continuous in the direction.

Further, in one embodiment, the number of first output data lines 310 corresponding to each first-type driving chip 300 is 960, and the number of second output data lines 410 is 966. Specifically, in the full high-definition liquid crystal display panel, there are 960 driving signals output by the first type driving chip 300, and each driving signal is transmitted to the first in-plane data line 100 via a first output data line 310 respectively for corresponding The driving of the pixel unit; there are 966 driving signals output by the second type of driving chip 400, but the number of corresponding data lines 200 in the second plane is only 961, if the traditional second output data line 410 is directly used Corresponding to the second in-plane data line 200, the remaining second output data lines 410 that are not connected to the second in-plane data line 200 are directly suspended, and the corresponding five output drive signals do not drive the pixel unit, which will result in Streaks are easily generated during display. Referring to FIG. 3, the second output data line 410 far from the boundary between the first in-plane data line 100 and the second in-plane data line 200 is the second output data line S966, the second output data line S965, and the second output From the data line S964 to the second output data line S1, the second in-plane data line 200 in the same direction is the second in-plane data line D961, the second in-plane data line D960, and the second in-plane data line D959 ... to the second in-plane data line D1; in order to avoid the occurrence of stripes, two dummy data lines 500 (dummy) are inserted between the second in-plane data line D961 and the first in-plane data line 100, and the second The output data line S966 and the second output data line S965 are respectively connected to the virtual data line 500, the second output data line S964 is connected to the second in-plane data line D961, and the second output data line 410 and the second The data cable 200 is connected on both sides. By the above method, the driving signals output by the second type driving chip 400 through the second output data line 410 are kept continuous in the horizontal direction.

It should be noted that, in one embodiment, after the second output data line 410 is sequentially connected to the virtual data line 500 and the second in-plane data line 200, the remaining second output data line 410 is suspended. Similarly, taking the number of first output data lines 310 of each first-type driver chip 300 as 960 and the number of second output data lines 410 as 966 as an example, the second output data lines S966 and the second The output data lines S965 are respectively connected to the virtual data lines 500, the second output data lines S964 are connected to the second in-plane data lines D961, and the second output data lines S963 are connected to the second in-plane data lines D960 until the second output data lines S4 is connected to the second in-plane data line D1, and the remaining second output data line S3, second output data line S2, and second output data line S1 are directly suspended without any connection, that is, the corresponding output drive signal will not be The driving of the pixel unit ensures the corresponding connection between one second output data line 410 and one second in-plane data line 200 to complete the effective driving of all pixel units.

In one embodiment, referring to FIG. 2, the pixel driving architecture further includes a logic board 600, and the first type driving chip 300 and the second type driving chip 400 are respectively connected to the logic board 600.

Specifically, the logic board 600 (Timer Control Register, TCON) is also called a screen driver board or a central control board. The function of the logic board 600 is to convert the LVDS (Low Voltage Differential Signaling) image input signals (including RGB data signals, clock signals, and control signals) transmitted by the digital board through the logic board 600 and convert them into energy. Drive the LVDS signal of the LCD screen, and then send it to the LVDS receiver chip of the LCD screen. It should be noted that, in one embodiment, taking a full HD liquid crystal display panel as an example, the first type driving chip 300 includes a first type driving chip S1, a first type driving chip S2, a first type driving chip S3, a first Class 4 driver chip S4, Class 1 driver chip S5, Class 2 driver chip S6, where TCON uses a two-port miniature differential signal interface to transmit LVDS signals for Class 1 driver chip 300 and Class 2 driver chip 400, respectively. (Ie 1port) LVDS is transmitted to the first type driver chip S1, the first type driver chip S2 and the first type driver chip S3, and then outputs the corresponding drive signal to drive the pixel unit; the second port (ie 2port) LVDS Transmitted to the first type drive chip S4, the first type drive chip S4 and the second type drive chip S6, and then output the corresponding drive signal to drive the pixel unit.

In the above pixel driving architecture, a dummy data line 500 is inserted between the first in-plane data line 100 and the second in-plane data line 200, and the second type of driving chip 400 is connected to the dummy data line 500 and the second in turn through the second output data line 410 The in-plane data line 200 connects the second output data line 410 adjacent to the first output data line 310 to the dummy data line 500 without driving the pixel unit, thereby ensuring the second output data line driving the pixel unit The horizontal polarity corresponding to 410 is consistent with the horizontal polarity of the first output data line 310 for driving the pixel unit, to avoid the occurrence of stripes during display, and has a good display driving effect compared with the conventional pixel driving method.

A display panel includes the above pixel driving structure, and: a first substrate, a first in-plane data line and a second in-plane data line are placed on the first substrate; a second substrate, the first substrate and the second substrate are oppositely arranged; The liquid crystal layer is disposed between the first substrate and the second substrate. It can be understood that the pixel driving architecture may specifically be the pixel driving architecture described in any of the foregoing embodiments, and the specific structure has been explained in detail in the foregoing embodiments, and will not be repeated here.

Specifically, the in-plane data line refers to a data line that transmits the driving signal output by the driving chip to the corresponding pixel unit and is connected to the pixel unit, and divides the in-plane data line according to the type of the drive control chip that provides the driving signal It is the first in-plane data line and the second in-plane data line. In one embodiment, the display panel further includes pixel units arranged in an array, and the pixel units are disposed on the first substrate. In the display panel, scan lines arranged in the first direction and in-plane data lines arranged in the second direction (ie, first in-plane data lines and second in-plane data lines) are often provided on the first substrate. A plurality of pixel units arranged in an array are defined at the intersection with the in-plane data line insulation. The row drive circuit of the array substrate is connected to the scanning line to provide scanning signals for the pixel unit; the first type of driving chip is connected to the first in-plane data line through the first output data line, and the second type of driving chip is connected to the second output data line The second in-plane data line is connected to provide driving data signals for the pixel unit, and then the corresponding image is displayed on the display panel.

By inserting a dummy data line between the in-plane data line corresponding to the first-type driver chip and the in-plane data line corresponding to the second-type driver chip, the corresponding The data lines in the two planes are connected to the dummy data line, and the inserted dummy data line will not drive the pixel unit, and the output signal of horizontal polarity discontinuity will be suspended, making the output signal of the pixel unit drive in the horizontal direction It skips the second output data line connected to the virtual output data line to form a continuous polarity in the horizontal direction, avoids the occurrence of stripes at the part during display, and has a better display driving effect.

In one embodiment, the pixel unit includes a red (Red, R) color pixel unit, a green (Green, G) color pixel unit, a blue (Blue, B) color pixel unit, and a white (White, W) color pixel unit. The pixel unit of the array substrate is set to four colors of RGBW, which is applied to the display device, and only the white pixel unit needs to be provided with a corresponding transparent area on the color filter, which can improve the light transmittance of the color filter and reduce the backlight Energy consumption of the module. The specific arrangement of the RGBW four-color pixel units can be arranged according to actual usage. For example, in one embodiment, the pixel units in each pixel row are arranged in a RGBW four-color cycle. It can be understood that, in other embodiments, the pixel unit includes a red pixel unit, a green pixel unit, and a blue pixel unit, and the pixel units may also be arranged in a cyclic manner of RGB three-color pixel units.

It should be noted that, in one embodiment, the first substrate is an array substrate, and the second substrate is a color filter substrate. Further, in one embodiment, the array substrate is a thin film transistor array substrate. Color filter is a kind of optical filter substrate that expresses color. It can accurately select the light passing through a certain wavelength range and reflect the light of other wavelengths. The basic structure of the color film substrate is composed of a glass substrate (Glass Substrate), a black matrix (Black Matrix), a color layer (Color Layer), a protective layer (Over Coat) and an ITO conductive film. Liquid crystal refers to the fact that after the molten state or the solvent is dissolved, the rigidity of the solid substance is lost, and the fluidity of the liquid is obtained, and the anisotropic order of the molecules of some crystalline substances is retained, forming a kind of crystal and Substances in the liquid state that are intermediate in nature. A liquid crystal layer formed by liquid crystal molecules is arranged between the array substrate and the color filter substrate. When the power is turned on, the arrangement becomes orderly, so that the light passes easily; when the power is not turned on, the arrangement is disordered to prevent the light from passing.

In one embodiment, the display panel is a full high definition liquid crystal display panel (FHD). In the pixel driving architecture of the full high definition liquid crystal display panel, the in-plane data line corresponding to the first type driving chip 300 and the second type driving chip 400 A virtual data line 500 is inserted between the corresponding in-plane data lines, and the corresponding second in-plane data line 200 at the junction of the first in-plane data line 100 and the second in-plane data line 200 is connected to the virtual data line 500, and the inserted The virtual data line 500 does not drive the pixel unit, and the output signal with horizontal polarity discontinuity is about to float, so that the horizontal polarity of the output signal for driving the pixel unit skips the second output connected to the virtual output data line 500 The data line 200 is formed with continuous polarities in the horizontal direction to avoid the occurrence of stripes in the area during display.

In the above display panel, in the pixel driving architecture, a dummy data line is inserted between the first in-plane data line and the second in-plane data line, and the second type of driving chip sequentially connects the dummy data line and the second side through the second output data line Internal data line, connect the second output data line adjacent to the first output data line to the dummy data line, and do not drive the pixel unit, thereby ensuring that the horizontal polarity corresponding to the second output data line driving the pixel unit is The horizontal polarity of the first output data line driven by the pixel unit remains the same, avoids the generation of stripes during display, and has a good display effect.

A display device includes a backlight module and the above display panel. It can be understood that the display panel may specifically be the display panel described in any of the foregoing embodiments, and the specific structure has been explained in detail in the foregoing embodiments, and will not be repeated here. Specifically, the in-plane data line refers to a data line that transmits the driving signal output by the driving chip to the corresponding pixel unit and is connected to the pixel unit, and divides the in-plane data line according to the type of the drive control chip that provides the driving signal It is the first in-plane data line and the second in-plane data line. In the display panel, scan lines arranged in the first direction and in-plane data lines arranged in the second direction (ie, first in-plane data lines and second in-plane data lines), scan lines and planes are often provided on the substrate A plurality of pixel units arranged in an array are defined at the insulation intersections of the inner data lines. The row drive circuit of the array substrate is connected to the scanning line to provide scanning signals for the pixel unit; the first type of driving chip is connected to the first in-plane data line through the first output data line, and the second type of driving chip is connected to the second output data line The second in-plane data line is connected to provide driving data signals for the pixel unit, and then the corresponding image is displayed on the display panel.

In one embodiment, the display device further includes a first polarizer disposed on the side of the first substrate away from the liquid crystal layer, and a second polarizer disposed on the side of the second substrate away from the liquid crystal layer.

Specifically, the liquid crystal material is placed between two pieces of transparent conductive glass attached with a polarizer with a vertical optical axis, and liquid crystal molecules are distributed parallel to the transparent conductive glass when no voltage is applied, and the two pieces of transparent conductive glass are respectively equipped with For alignment films that are oriented perpendicular to each other, the liquid crystal molecules are sequentially arranged in accordance with the direction of the fine grooves of the alignment film. If no electric field is applied, the light enters from the second polarizer and its polarization direction rotates 90 degrees according to the arrangement of the liquid crystal molecules. The first polarizer is emitted and is now in a bright state. If after two pieces of conductive glass are energized, an electric field will be formed between the two pieces of conductive glass, which will affect the arrangement of liquid crystal molecules between them. When the voltage is large enough, the molecules are arranged vertically along the electric field, the polarization direction of the light does not change, and the light cannot penetrate , And then the light source is blocked, so that a dark state is formed when voltage is applied.

In one embodiment, the backlight module is an edge-lit backlight module. Specifically, the edge-lit backlight module means that the light source (Edge) is disposed on the side of the light guide plate, and the light guide plate illuminates the light evenly behind the liquid crystal panel. The design of the edge-lit backlight module makes the display device have the advantages of light weight, thin, narrow frame and low power consumption. It can be understood that, in other embodiments, the backlight module may also be a direct type backlight module or a hollow type backlight module, as long as it can provide a corresponding light source for the display device.

In the above-mentioned display device, in the pixel driving architecture, a dummy data line is inserted between the first in-plane data line and the second in-plane data line, and the second type of driving chip sequentially connects the dummy data line and the second plane through the second output data line Internal data line, connect the second output data line adjacent to the first output data line to the dummy data line, and do not drive the pixel unit, thereby ensuring that the horizontal polarity corresponding to the second output data line driving the pixel unit is The horizontal polarity of the first output data line driven by the pixel unit remains the same, avoids the generation of stripes during display, and has a good display effect. Two virtual data lines are inserted between the first in-plane data line and the second in-plane data line, namely a virtual data line and a virtual data line. The second output data line of the second type driver chip is in turn connected with the virtual data line and the virtual The data line is connected to the second in-plane data line, so that the output signals of the two second output data at the junction are connected to the virtual data line, and the pixel unit is not driven, thereby ensuring that the pixel unit driving part of the second data line corresponds The horizontal polarity of is consistent with the horizontal polarity of the first output data line, which avoids the occurrence of stripes at the boundary during display and has a good display effect.

The technical features of the above-mentioned embodiments can be combined arbitrarily. To simplify the description, all possible combinations of the technical features in the above-mentioned embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, All should be considered within the scope of this description.

The above-mentioned embodiments only express several implementation manners of the present application, and their descriptions are more specific and detailed, but they should not be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which all fall within the protection scope of the present application. Therefore, the protection scope of the patent of this application shall be subject to the appended claims.

Claims

A pixel driving architecture, the architecture includes:

Data cable in the first plane;

A second in-plane data line, a virtual data line is provided between the first in-plane data line and the second in-plane data line, the first in-plane data line and the second in-plane data line are respectively Connect the corresponding pixel unit;

A first-type driver chip, the first-type driver chip respectively correspondingly connected to the first in-plane data line through a first output data line; and

A second type driving chip, the second type driving chip is sequentially connected to the virtual data line and the second in-plane data line through a second output data line.
The pixel driving architecture according to claim 1, wherein the number of the virtual data lines is two.
The pixel driving architecture according to claim 2, wherein the number of the first type driving chips is two or more, and the number of the second type driving chips is one.
The pixel driving architecture according to claim 3, wherein the number of the first type driving chips is five.
The pixel driving architecture according to claim 3, wherein after the second output data line is sequentially connected to the dummy data line and the second in-plane data line, the remaining second output data line is suspended.
The pixel driving architecture according to claim 1, wherein the number of first output data lines corresponding to the first type driving chip is 960, and the number of second output data lines corresponding to the second type driving chip is 966.
The pixel driving architecture according to claim 1, further comprising a logic board, and the first type driving chip and the second type driving chip are respectively connected to the logic board.
The pixel driving architecture according to claim 7, wherein the interface connected to the first type driving chip and the second type driving chip in the logic board is a two-port miniature differential signal interface.
A display panel including:

A pixel driving architecture, the pixel driving architecture includes a first in-plane data line; a second in-plane data line, a virtual data line is provided between the first in-plane data line and the second in-plane data line, so The first in-plane data line and the second in-plane data line are respectively connected to corresponding pixel units; a first type of driving chip, the first type of driving chip is respectively connected to the first in-plane through the first output data line Data lines are correspondingly connected; and a second type of driving chip, the second type of driving chip is sequentially connected to the virtual data line and the second in-plane data line through the second output data line;

A first substrate, the first in-plane data line and the second in-plane data line are placed on the first substrate;

A second substrate, the first substrate being opposite to the second substrate; and

A liquid crystal layer, the liquid crystal layer is interposed between the first substrate and the second substrate.
The display panel according to claim 9, wherein the display panel further comprises pixel units arranged in an array, the pixel units being disposed on the first substrate.
The display panel of claim 10, wherein the pixel unit includes a red pixel unit, a green pixel unit, a blue pixel unit, and a white pixel unit.
The display panel of claim 10, wherein the pixel unit includes a red pixel unit, a green pixel unit, and a blue pixel unit.
The display panel according to claim 9, wherein the display panel is a full high-definition liquid crystal display panel.
The display panel according to claim 9, wherein the first substrate is an array substrate, and the second substrate is a color filter substrate.
The display panel of claim 14, wherein the array substrate is a thin film transistor array substrate.
A display device includes a backlight module and a display panel. The display panel includes:

A pixel driving architecture, the pixel driving architecture includes a first in-plane data line; a second in-plane data line, a virtual data line is provided between the first in-plane data line and the second in-plane data line, so The first in-plane data line and the second in-plane data line are respectively connected to corresponding pixel units; a first type of driving chip, the first type of driving chip is respectively connected to the first in-plane through the first output data line Data lines are correspondingly connected; and a second type of driving chip, the second type of driving chip is sequentially connected to the virtual data line and the second in-plane data line through the second output data line;

A first substrate, the first in-plane data line and the second in-plane data line are placed on the first substrate;

A second substrate, the first substrate being opposite to the second substrate; and

A liquid crystal layer, the liquid crystal layer is interposed between the first substrate and the second substrate.
The display device according to claim 16, wherein the display device further comprises a first polarizer disposed on a side of the first substrate away from the liquid crystal layer, and a liquid crystal disposed on the second substrate away from the liquid crystal layer The second polarizer on the side of the layer.
The display device according to claim 16, wherein the backlight module is an edge-lit backlight module.