WO2020086646A1 - Buffer layers for photovoltaic devices with group v doping - Google Patents

Buffer layers for photovoltaic devices with group v doping Download PDF

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Publication number
WO2020086646A1
WO2020086646A1 PCT/US2019/057542 US2019057542W WO2020086646A1 WO 2020086646 A1 WO2020086646 A1 WO 2020086646A1 US 2019057542 W US2019057542 W US 2019057542W WO 2020086646 A1 WO2020086646 A1 WO 2020086646A1
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WO
WIPO (PCT)
Prior art keywords
layer
photovoltaic device
buffer layer
buffer
absorber
Prior art date
Application number
PCT/US2019/057542
Other languages
French (fr)
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WO2020086646A8 (en
Inventor
Le Chen
Sachit GROVER
Jason KEPHART
Sergei Kniajanski
Chungho Lee
Xiaoping Li
Feng LIAO
Dingyuan LU
Rajni MALLICK
Wenming Wang
Gang Xiong
Wei Zhang
Original Assignee
First Solar, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by First Solar, Inc. filed Critical First Solar, Inc.
Priority to EP19804918.1A priority Critical patent/EP3857611B1/en
Priority to JP2021522517A priority patent/JP7362734B2/en
Priority to US17/287,988 priority patent/US20210376177A1/en
Priority to CN201980086001.3A priority patent/CN113261116A/en
Publication of WO2020086646A1 publication Critical patent/WO2020086646A1/en
Publication of WO2020086646A8 publication Critical patent/WO2020086646A8/en
Priority to JP2023172249A priority patent/JP2023171911A/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1828Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIBVI compounds, e.g. CdS, ZnS, CdTe
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264Inorganic materials
    • H01L31/0296Inorganic materials including, apart from doping material or other impurities, only AIIBVI compounds, e.g. CdS, ZnS, HgCdTe
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H01L31/03925Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including AIIBVI compound materials, e.g. CdTe, CdS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/073Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising only AIIBVI compound semiconductors, e.g. CdS/CdTe solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/543Solar cells from Group II-VI materials

Definitions

  • the present specification generally relates to photovoltaic devices having a buffer layer compatible with group V dopants and, more specifically, photovoltaic devices having a buffer layer compatible with group V dopants adjacent to an absorber layer doped p- type with a group V dopant.
  • a photovoltaic device generates electrical power by converting light into direct current electricity using semiconductor materials that exhibit the photovoltaic effect.
  • Certain types of semiconductor material can be difficult to manufacture.
  • thin film layers provided adjacent to semiconductor material can lead to inoperability or instability of the photovoltaic device.
  • group V elements as a dopant for a p-type semiconductor material can be particularly difficult
  • FIG. 1 schematically depicts a cross-sectional view of a photovoltaic device according to one or more embodiments shown and described herein;
  • FIG.2 schematically depicts a substrate according to one or more embodiments shown and described herein;
  • FIG. 4 schematically depicts a buffer layer according to one or more embodiments shown and described herein;
  • FIG. 5 schematically depicts a process for annealing a layer stack according to one or more embodiments shown and described herein;
  • Embodiments of photovoltaic devices having a buffer layer compatible with group V dopants are provided.
  • Various embodiments of the photovoltaic device, as well as, methods for forming the photovoltaic device will be described in more detail herein.
  • the photovoltaic device 100 can be configured to receive light and transform light into electrical signals, e.g., photons can be absorbed from the light and transformed into electrical signals via the photovoltaic effect. Accordingly, the photovoltaic device 100 can define an energy side 102 configured to be exposed to a light source such as, for example, the sun. The photovoltaic device 100 can also define an opposing side 104 offset from the energy side 102 such as, for example, by a plurality of material layers.
  • the photovoltaic device 100 can include a plurality of layers disposed between the energy side 102 and the opposing side 104.
  • the term“layer” refers to a thickness of material provided upon a surface. Each layer can cover all (i.e., a continuous layer) or any portion (i.e., a discontinuous layer) of the surface.
  • the layers of the photovoltaic device 100 can include a substrate 110 configured to facilitate the transmission of light into the photovoltaic device 100.
  • the substrate 110 can be disposed at the energy side 102 of the photovoltaic device 100.
  • the substrate 110 can have a first surface 112 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 114 substantially facing the opposing side 104 of the photovoltaic device 100.
  • One or more layers of material can be disposed between the first surface 112 and the second surface 114 of the substrate 110.
  • the substrate 110 can include a transparent layer 120 having a first surface 122 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 124 substantially facing the opposing side 104 of the photovoltaic device 100.
  • the second surface 124 of the transparent layer 120 can form the second surface 114 of the substrate 110.
  • the transparent layer 120 can be formed from a substantially transparent material such as, for example, glass. Suitable glass can include soda-lime glass, or any glass with reduced iron content.
  • the transparent layer 120 can have any suitable transmittance, including about 250 nm to about 1,300 nm in some embodiments, or about 250 nm to about 950 nm in other embodiments.
  • the transparent layer 120 may also have any suitable transmission percentage, including, for example, more than about 50% in one embodiment, more than about 60% in another embodiment, more than about 70% in yet another embodiment, more than about 80% in a further embodiment, or more than about 85% in still a further embodiment
  • transparent layer 120 can be farmed from a glass with about 90% transmittance, or more.
  • the substrate 110 can include a coating 126 applied to the first surface 122 of the transparent layer 120.
  • the coating 126 can be configured to interact with light or to improve durability of the substrate 110 such as, but not limited to, an antireflective coating, an antisoiling coating, or a combination thereof.
  • the photovoltaic device 100 can include a barrier layer
  • the barrier layer 130 configured to mitigate diffusion of contaminants (e.g. sodium) from the substrate 110, which could result in degradation or delamination.
  • the barrier layer 130 can have a first surface 132 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 134 substantially feeing the opposing side 104 of the photovoltaic device 100.
  • the barrier layer 130 can be provided adjacent to the substrate 110.
  • the first surface 132 of the barrier layer 130 can be provided upon the second surface 114 of the substrate 100.
  • the phrase "adjacent to,” as used herein, means that two layers are disposed contiguously and without any intervening materials between at least a portion of the layers.
  • the barrier layer 130 can be substantially transparent, thermally stable, with a reduced number of pin holes and having high sodium-blocking capability, and good adhesive properties. Alternatively or additionally, the barrier layer 130 can be configured to apply color suppression to light.
  • the barrier layer 130 can include one or more layers of suitable material, including, but not limited to, tin oxide, silicon dioxide, aluminum-doped silicon oxide, silicon oxide, silicon nitride, or aluminum oxide.
  • the barrier layer 130 can have any suitable thickness bounded by the first surface 132 and the second surface 134, including, for example, more than about 100 A in one embodiment, more than about 150 A in another embodiment, or less than about 200 A in a further embodiment.
  • the photovoltaic device 100 can include a transparent conductive oxide (TCO) layer 140 configured to provide electrical contact to transport charge carriers generated by the photovoltaic device 100.
  • the TCO layer 140 can have a first surface 142 substantially feeing the energy side 102 of the photovoltaic device 100 and a second surface 144 substantially feeing the opposing side 104 of the photovoltaic device 100.
  • the TCO layer 140 can be provided adjacent to the barrier layer 130.
  • the first surface 142 of the TCO layer 140 can be provided upon the second surface 134 of the barrier layer 130.
  • the TCO layer 140 can be formed from one or more layers of n-type semiconductor material that is substantially transparent and has a wide band gap.
  • the wide band gap can have a larger energy value compared to the energy of the photons of the light, which can mitigate undesired absorption of light.
  • the TCO layer 140 can include one or more layers of suitable material, including, but not limited to, tin oxide, fluorine doped tin oxide (e.g., F:SnO, F:SnOz, or F:SnO x ), indium tin oxide, or cadmium stannate.
  • the photovoltaic device 100 can include a buffer layer 150 configured to provide a less conductive layer between the TCO layer 140 and any adjacent semiconductor layers.
  • the buffer layer 150 can have a first surface 152 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 154 substantially facing the opposing side 104 of the photovoltaic device 100.
  • the buffer layer 150 can be provided adjacent to the TCO layer 140.
  • the first surface 152 of the buffer layer 150 can be provided upon the second surface 144 of the TCO layer 140.
  • the buffer layer 140 may include material having higher resistivity than the TCO later 140, including, but not limited to, intrinsic tin oxide (SnO, SnO 2 , or SnO x ), magnesium oxide (MgO), zinc magnesium oxide (e.g., Zn 1-x MgxO), silicon dioxide (SiO 2 ), manganese oxide (MnO x ), silicon nitride (SiN x ), or any combination thereof.
  • manganese oxide (MnOx) includes a compound of manganese and oxygen where the manganese is present in any suitable oxidation state.
  • the x of MnOx can be in greater than or equal to about 1 such as, but not limited to, greater than or equal to about 1 and less than or equal to about 2.
  • the exemplary MnOx compounds can be present as a single phase or as a mixture of multiple phases, which can each be present with or with or without some amorphous component of Mn and O.
  • the material of the buffer layer 140 can be configured to substantially match the band gap of an adjacent semiconductor layer (e.g., an absorber).
  • the buffer layer 150 may have a thickness 156 between the first surface 152 and the second surface 154.
  • the thickness 156 can span any suitable distance, including, for example, more than about 0.5 Nanometer (nm) in one embodiment, between about 1 nm and about 200 nm in another embodiment, between about 1 nm and about 100 nm in another embedment, or between about 1 nm and about 10 nm in a further embodiment, or between about 1 nm and about 3 nm in still a further embodiment
  • the buffer layer 150 or layers thereof can be discontinuous.
  • the buffer layer 150 can include a layer of MnO x , which is substantially discontinuous.
  • the layer of MnO x can be characterized using Inductively Coupled Plasma-Optical Emission Spectroscopy (ICP- OES).
  • the layer of MnO* can have a dosage of Mn that is at least about 0.05 pg/cm 2 such as, for example, greater than or equal to about 0.05 pg/cm 2 and less than or equal to about 15 pg/cm 2 in one embodiment, greater than or equal to about 0.1 pg/cm 2 and less than or equal to about 12 pg/cm 2 in another embodiment, or greater than or equal to about 0.2 pg/cm 2 and less than or equal to about 6 pg/cm 2 in a further embodiment
  • the buffer layer 150 can comprise a plurality of layers 200.
  • the plurality of layers 200 of the buffer layer 150 can comprise a base layer 210 that is disposed at the first surface 152 of the buffer layer 150.
  • the base layer 210 can be provided adjacent to the TCO layer 140.
  • the first surface 152 of the buffer layer 150 can be a surface of the base layer 210.
  • the base layer 210 can have a second surface 214 substantially facing the opposing side 104 of the photovoltaic device 100.
  • the base layer 210 can have a thickness 216 between the first surface 152 and the second surface 214. In some embodiments, the thickness 216 of the base layer 210 can be span a majority of the thickness 156 of the buffer layer 150.
  • the plurality of layers 200 of the buffer layer 150 can comprise an interface layer 220 that is disposed at the second surface 154 of the buffer layer 150.
  • the interface layer 220 can be located further away from the energy side 102 of the photovoltaic device relative to the base layer 210.
  • the interface layer 220 can have a first surface 224 substantially facing the energy side 102 of the photovoltaic device 100.
  • the second surface 154 of the buffer layer 150 can be a surface of the interface layer 220.
  • the interface layer 220 can have a thickness 226 between the first surface 222 and the second surface 154. In some embodiments, the thickness 226 of the interface layer 220 can be smaller than tiie thickness 216 of the base layer 210.
  • the base layer 210 and the interface layer 220 can be composed of different materials,
  • the base layer 210 can comprise tin oxide (SnO, SnCfe, or SnO x )
  • the interface layer 220 can comprise one of magnesium oxide (MgO), zinc magnesium oxide (e.g., Zni- x Mg x O), silicon dioxide (SiCh), manganese oxide (MnO x ), and silicon nitride (SiN x ).
  • MgO magnesium oxide
  • Zni- x Mg x O zinc magnesium oxide
  • SiCh silicon dioxide
  • MnO x manganese oxide
  • SiN x silicon nitride
  • the absorber layer 160 can be formed from a p-type semiconductor material having an excess of positive charge carriers, i.e., holes or acceptors.
  • the absorber layer 160 can include any suitable p-type semiconductor material such as group II- VI semiconductors. Specific examples include, but are not limited to, semiconductor materials comprising cadmium, tellurium, selenium, or any combination thereof. Suitable examples include, but are not limited to, ternaries of cadmium, selenium and tellurium (e.g., CdSe x Te 1-x ), or a compound comprising cadmium, selenium, tellurium, and one or more additional element.
  • the atomic percent of the selenium in the absorber layer 160 can be greater than about 0 atomic percent and less or equal to than about 25 atomic percent such as, for example, greater than about 1 atomic percent and less than about 20 atomic percent in one embodiment, greater than about 1 atomic percent and less than about 15 atomic percent in another embodiment, or greater than about 1 atomic percent and less than about 8 atomic percent in a further embodiment It is noted that the concentration of tellurium, selenium, or both can vary through the thickness of the absorber layer 160.
  • Suitable examples of a nitrogen-containing metal layer can include aluminum nitride, nickel nitride, titanium nitride, tungsten nitride, selenium nitride, tantalum nitride, or vanadium nitride.
  • the partially formed photovoltaic device 240 can be annealed within a processing chamber 244 that provides a reduced ambient environment 246, i.e., an environments having less than 500 parts per million of oxygen.
  • the absorber layer 160 can be contacted with an annealing compound 248 that comprises cadmium chloride (CdC1 ⁇ 2).
  • the annealing process includes heating the absorber layer 160 (e.g., polycrystalline semiconductor material) for sufficient time and temperature to facilitate re-crystallization of the absorber layer 160.
  • the MnOx can include an amorphous component of Mn and O.
  • the at least a portion of the MnO* can change oxidation state, which can be evidenced by the presence of a different MnO x compound.
  • the interface region 158 can start from the first surface 152 ofthe buffer layer 150 and extend into the absorber layer 160.
  • the interface region 158 can have a thickness of less than or equal to about 500 nm such as, for example, be between about 0.5 nm and 500 nm in one embodiment, or between about 1 nm and 100 nm in another embodiment
  • the buffer layer 150 performs in an unexpected manner. Without being bound to theory, it is believed that the chemical nature of the buffer layer 150 and the absorber layer 160 can lead to undesired defects within the interface region 158. Many chemical compositions can be more prone to defects such as, for example, during dopant activation in the reduced ambient environment 246. Such defects can decrease efficiency of the photovoltaic device 100.
  • Efficiency of the photovoltaic device 100 can be improved by including a layer of MnO x within the buffer layer 150.
  • Example 1 was formed in the same manner as the Comparative
  • Example 2 was formed in the same manner as the Comparative Example with the buffer layer modified to have a base layer of tin oxide and an interface layer of S1O2.
  • Example 3 was formed in the same manner as the Comparative Example with the buffer layer modified to have a base layer of tin oxide, an intermediate layer of Zm -x MgxO, and an interface layer of SiOa.
  • Example 4 was formed in the same manner as the Comparative Example with the buffer layer modified to have a base layer of tin oxide and an interface layer of MnO*.
  • Example 5 was formed in the same manner as the Comparative Example with the buffer layer modified to have a base layer of Zm -x MgxO, and an interface layer of SiCfe. Multiple samples of the Comparative Example and the Examples were prepared and characterized using Secondary-Ion Mass Spectrometry (SIMS).
  • SIMS Secondary-Ion Mass Spectrometry
  • photoluminescence spectroscopy was utilized to characterize recombination at the interface of the buffer layer and the absorber layer of Comparative Example and Examples 1-4.
  • a higher intensity of luminescence in response to light injected into the energy side 102 can correspond to less carrier recombination at interface of the buffer layer and the absorber layer. Accordingly, a higher intensity can correspond to higher efficiency of the photovoltaic device 100.
  • Examples 1-4 are depicted in FIG. 6. Specifically, PLI spectrum 250 corresponds to the
  • PLI spectrum 252 corresponds to Example 1
  • PLI spectrum 254 corresponds to Example 2
  • PLI spectrum 256 corresponds to Example 3
  • PLI spectrum 258 corresponds to Example 4.
  • Each of the spectra 250, 252, 254, 256, 258 are normalized to the peak value of the PLI spectrum 250.
  • PLI spectrum 252, PLI spectrum 254, PLI spectrum 256, and PLI spectrum 258 demonstrate increased performance of Examples 1-4 relative to the Comparative Example.
  • PLI spectrum 252 corresponds to an improvement in peak intensity of about 700% for Example 1 relative to the Comparative Example.
  • PLI spectrum 254 corresponds to an improvement in peak intensity of about 1,000% for Example 2 relative to the Comparative Example.
  • PLI spectra 256, 258 correspond to an improvement in peak intensity of about 1,500% for Examples 3 and 4 relative to the Comparative Example. Further testing demonstrated a similar performance improvement for Example 5 as depicted for Example 3.
  • Example 4 Various instances of Example 4 were analyzed using X-ray diffraction (XRD) to determine the composition of the buffer layer 150 before and after the annealing process.
  • the buffer layer 150 included M113O4 before the annealing process and included MnO and M113O4 after the annealing process.
  • the buffer layer 150 included M112O3 before the annealing process and included M113O4 after the annealing process.
  • the buffer layer 150 included MnCh and MmCU before the annealing process and included Mn 3 04 (without MnCfe) after the annealing process.
  • the buffer layer 150 included MnC1 ⁇ 2 before the annealing process and included MnCfe and MTI3O4 after the annealing process.

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Abstract

According to the embodiments provided herein, a photovoltaic device can include a buffer layer adjacent to an absorber layer doped p-type with a group V dopant. The buffer layer can have a plurality of layers compatible with group V dopants.

Description

BUFFER LAYERS FOR PHOTOVOLTAIC DEVICES WITH GROUP V DOPING
BACKGROUND
[0001] The present specification generally relates to photovoltaic devices having a buffer layer compatible with group V dopants and, more specifically, photovoltaic devices having a buffer layer compatible with group V dopants adjacent to an absorber layer doped p- type with a group V dopant.
[0002] A photovoltaic device generates electrical power by converting light into direct current electricity using semiconductor materials that exhibit the photovoltaic effect. Certain types of semiconductor material can be difficult to manufacture. For example, thin film layers provided adjacent to semiconductor material can lead to inoperability or instability of the photovoltaic device. The use of group V elements as a dopant for a p-type semiconductor material can be particularly difficult
[0003] Accordingly, a need exists for alternative buffer layers for use with an absorber layer doped with a group V p-type dopant
SUMMARY
[0004] The embodiments provided herein relate to photovoltaic devices having a buffer layer compatible with group V dopants. These and additional features provided by the embodiments described herein will be more fully understood in view of the following detailed description, in conjunction with the drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0005] The embodiments set forth in the drawings are illustrative and exemplary in nature and not intended to limit the subject matter defined by the claims. The following detailed description of the illustrative embodiments can be understood when read in conjunction with the following drawings, where like structure is indicated with like reference numerals and in which:
[0006] FIG. 1 schematically depicts a cross-sectional view of a photovoltaic device according to one or more embodiments shown and described herein; [0007] FIG.2 schematically depicts a substrate according to one or more embodiments shown and described herein;
[0008] FIG. 3 schematically depicts a buffer layer according to one or more embodiments shown and described herein;
[0009] FIG. 4 schematically depicts a buffer layer according to one or more embodiments shown and described herein;
[0010] FIG. 5 schematically depicts a process for annealing a layer stack according to one or more embodiments shown and described herein; and
[0011] FIG. 6 graphically depicts normalized photoluminescence spectra according to one or more embodiments shown and described herein.
DETAILED DESCRIPTION
[0012] Embodiments of photovoltaic devices having a buffer layer compatible with group V dopants are provided. Various embodiments of the photovoltaic device, as well as, methods for forming the photovoltaic device will be described in more detail herein.
[0013] Referring now to FIG. 1, an embodiment of a photovoltaic device 100 is schematically depicted. The photovoltaic device 100 can be configured to receive light and transform light into electrical signals, e.g., photons can be absorbed from the light and transformed into electrical signals via the photovoltaic effect. Accordingly, the photovoltaic device 100 can define an energy side 102 configured to be exposed to a light source such as, for example, the sun. The photovoltaic device 100 can also define an opposing side 104 offset from the energy side 102 such as, for example, by a plurality of material layers. It is noted that the term“light” can refer to various wavelengths of the electromagnetic spectrum such as, but not limited to, wavelengths in the ultraviolet (UV), infrared (IR), and visible portions of the electromagnetic spectrum.“Sunlight,” as used herein, refers to light emitted by the sun. The photovoltaic device 100 can include a plurality of layers disposed between the energy side 102 and the opposing side 104. As used herein, the term“layer” refers to a thickness of material provided upon a surface. Each layer can cover all (i.e., a continuous layer) or any portion (i.e., a discontinuous layer) of the surface. For example, a continuous layer can be substantially uninterrupted, and a discontinuous layer can have one or more voids formed through the layer occupied by a different material. [0014] Referring collectively to FIGS. 1 and 2, the layers of the photovoltaic device 100 can include a substrate 110 configured to facilitate the transmission of light into the photovoltaic device 100. The substrate 110 can be disposed at the energy side 102 of the photovoltaic device 100. The substrate 110 can have a first surface 112 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 114 substantially facing the opposing side 104 of the photovoltaic device 100. One or more layers of material can be disposed between the first surface 112 and the second surface 114 of the substrate 110.
[0015] The substrate 110 can include a transparent layer 120 having a first surface 122 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 124 substantially facing the opposing side 104 of the photovoltaic device 100. In some embodiments, the second surface 124 of the transparent layer 120 can form the second surface 114 of the substrate 110. The transparent layer 120 can be formed from a substantially transparent material such as, for example, glass. Suitable glass can include soda-lime glass, or any glass with reduced iron content. The transparent layer 120 can have any suitable transmittance, including about 250 nm to about 1,300 nm in some embodiments, or about 250 nm to about 950 nm in other embodiments. The transparent layer 120 may also have any suitable transmission percentage, including, for example, more than about 50% in one embodiment, more than about 60% in another embodiment, more than about 70% in yet another embodiment, more than about 80% in a further embodiment, or more than about 85% in still a further embodiment In one embodiment, transparent layer 120 can be farmed from a glass with about 90% transmittance, or more. Optionally, the substrate 110 can include a coating 126 applied to the first surface 122 of the transparent layer 120. The coating 126 can be configured to interact with light or to improve durability of the substrate 110 such as, but not limited to, an antireflective coating, an antisoiling coating, or a combination thereof.
[0016] Referring again to FIG. 1 , the photovoltaic device 100 can include a barrier layer
130 configured to mitigate diffusion of contaminants (e.g. sodium) from the substrate 110, which could result in degradation or delamination. The barrier layer 130 can have a first surface 132 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 134 substantially feeing the opposing side 104 of the photovoltaic device 100. In some embodiments, the barrier layer 130 can be provided adjacent to the substrate 110. For example, the first surface 132 of the barrier layer 130 can be provided upon the second surface 114 of the substrate 100. The phrase "adjacent to," as used herein, means that two layers are disposed contiguously and without any intervening materials between at least a portion of the layers.
[0017] Generally, the barrier layer 130 can be substantially transparent, thermally stable, with a reduced number of pin holes and having high sodium-blocking capability, and good adhesive properties. Alternatively or additionally, the barrier layer 130 can be configured to apply color suppression to light. The barrier layer 130 can include one or more layers of suitable material, including, but not limited to, tin oxide, silicon dioxide, aluminum-doped silicon oxide, silicon oxide, silicon nitride, or aluminum oxide. The barrier layer 130 can have any suitable thickness bounded by the first surface 132 and the second surface 134, including, for example, more than about 100 A in one embodiment, more than about 150 A in another embodiment, or less than about 200 A in a further embodiment.
[0018] Referring still to FIG. 2, the photovoltaic device 100 can include a transparent conductive oxide (TCO) layer 140 configured to provide electrical contact to transport charge carriers generated by the photovoltaic device 100. The TCO layer 140 can have a first surface 142 substantially feeing the energy side 102 of the photovoltaic device 100 and a second surface 144 substantially feeing the opposing side 104 of the photovoltaic device 100. In some embodiments, the TCO layer 140 can be provided adjacent to the barrier layer 130. For example, the first surface 142 of the TCO layer 140 can be provided upon the second surface 134 of the barrier layer 130. Generally, the TCO layer 140 can be formed from one or more layers of n-type semiconductor material that is substantially transparent and has a wide band gap. Specifically, the wide band gap can have a larger energy value compared to the energy of the photons of the light, which can mitigate undesired absorption of light. The TCO layer 140 can include one or more layers of suitable material, including, but not limited to, tin oxide, fluorine doped tin oxide (e.g., F:SnO, F:SnOz, or F:SnOx), indium tin oxide, or cadmium stannate.
[0019] The photovoltaic device 100 can include a buffer layer 150 configured to provide a less conductive layer between the TCO layer 140 and any adjacent semiconductor layers. The buffer layer 150 can have a first surface 152 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 154 substantially facing the opposing side 104 of the photovoltaic device 100. In some embodiments, the buffer layer 150 can be provided adjacent to the TCO layer 140. For example, the first surface 152 of the buffer layer 150 can be provided upon the second surface 144 of the TCO layer 140. The buffer layer 140 may include material having higher resistivity than the TCO later 140, including, but not limited to, intrinsic tin oxide (SnO, SnO2, or SnOx), magnesium oxide (MgO), zinc magnesium oxide (e.g., Zn1-xMgxO), silicon dioxide (SiO2), manganese oxide (MnOx), silicon nitride (SiNx), or any combination thereof. As used herein, manganese oxide (MnOx) includes a compound of manganese and oxygen where the manganese is present in any suitable oxidation state. In some embodiments, the x of MnOx can be in greater than or equal to about 1 such as, but not limited to, greater than or equal to about 1 and less than or equal to about 2. Accordingly, exemplary MnOx compounds include, but are not limited to, MnO (corresponding to x = 1), MnO2 (corresponding to x = 2), Mn2 O3 (corresponding to x = 1.5), or Mn 3O4 (corresponding to x = 1.3). The exemplary MnOx compounds can be present as a single phase or as a mixture of multiple phases, which can each be present with or with or without some amorphous component of Mn and O.
[0020] In some embodiments, the material of the buffer layer 140 can be configured to substantially match the band gap of an adjacent semiconductor layer (e.g., an absorber). The buffer layer 150 may have a thickness 156 between the first surface 152 and the second surface 154. The thickness 156 can span any suitable distance, including, for example, more than about 0.5 Nanometer (nm) in one embodiment, between about 1 nm and about 200 nm in another embodiment, between about 1 nm and about 100 nm in another embedment, or between about 1 nm and about 10 nm in a further embodiment, or between about 1 nm and about 3 nm in still a further embodiment In some embodiments, the buffer layer 150 or layers thereof can be discontinuous. For example, the buffer layer 150 can include a layer of MnOx, which is substantially discontinuous. When the layer of MnOx is discontinuous, the layer of MnO* can be characterized using Inductively Coupled Plasma-Optical Emission Spectroscopy (ICP- OES). Specifically, the layer of MnO* can have a dosage of Mn that is at least about 0.05 pg/cm2 such as, for example, greater than or equal to about 0.05 pg/cm2 and less than or equal to about 15 pg/cm2 in one embodiment, greater than or equal to about 0.1 pg/cm2 and less than or equal to about 12 pg/cm2 in another embodiment, or greater than or equal to about 0.2 pg/cm2 and less than or equal to about 6 pg/cm2 in a further embodiment
[0021] Referring collectively to FIGS. 1 and 3, the buffer layer 150 can comprise a plurality of layers 200. Specifically, the plurality of layers 200 of the buffer layer 150 can comprise a base layer 210 that is disposed at the first surface 152 of the buffer layer 150. Accordingly, the base layer 210 can be provided adjacent to the TCO layer 140. In some embodiments, the first surface 152 of the buffer layer 150 can be a surface of the base layer 210. The base layer 210 can have a second surface 214 substantially facing the opposing side 104 of the photovoltaic device 100. The base layer 210 can have a thickness 216 between the first surface 152 and the second surface 214. In some embodiments, the thickness 216 of the base layer 210 can be span a majority of the thickness 156 of the buffer layer 150.
[0022] The plurality of layers 200 of the buffer layer 150 can comprise an interface layer 220 that is disposed at the second surface 154 of the buffer layer 150. Generally, the interface layer 220 can be located further away from the energy side 102 of the photovoltaic device relative to the base layer 210. The interface layer 220 can have a first surface 224 substantially facing the energy side 102 of the photovoltaic device 100. In some embodiments, the second surface 154 of the buffer layer 150 can be a surface of the interface layer 220. The interface layer 220 can have a thickness 226 between the first surface 222 and the second surface 154. In some embodiments, the thickness 226 of the interface layer 220 can be smaller than tiie thickness 216 of the base layer 210.
[0023] According to the embodiments provided herein, the base layer 210 and the interface layer 220 can be composed of different materials, For example, in some embodiments, the base layer 210 can comprise tin oxide (SnO, SnCfe, or SnOx), and the interface layer 220 can comprise one of magnesium oxide (MgO), zinc magnesium oxide (e.g., Zni-xMgxO), silicon dioxide (SiCh), manganese oxide (MnOx), and silicon nitride (SiNx).
[0024] Referring collectively to FIGS. 1 and 4, the plurality of layers 200 of the buffer layer 150 can comprise one or more intermediate layers 230 disposed between the base layer 210 and the interface layer 220. The one or more intermediate layers 230 can have a first surface 232 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 234 substantially facing the opposing side 104 of the photovoltaic device 100. The one or more intermediate layers 230 can be provided adjacent to the base layer 210 and the interface layer 220. Accordingly, the first surface 232 of the one or more intermediate layers 230 can be provided upon the second surface 214 of the base layer 210 and the second surface 234 of the one or more intermediate layers 230 can be provided upon the first surface 224 of the interface layer 210. The one or more intermediate layers 230 can have a thickness 236 between the first surface 232 and the second surface 234. In some embodiments, the thickness 236 of the one or more intermediate layers 230 can be smaller than the thickness 216 of the base layer 210.
[0025] According to the embodiments of the present disclosure, the one or more intermediate layers 230 can be composed of different materials than the base layer 210 and the interface layer 220. For example, in some embodiments, the one or more intermediate layers 230 can comprise zinc magnesium oxide (e.g., Zni-xMg,0).
[0026] Referring again to FIG. 1, the photovoltaic device 100 can include an absorber layer 160 configured to cooperate with another layer and form a p-n junction within the photovoltaic device 100. Accordingly, absorbed photons of the light can free electron-hole pairs and generate carrier flow, which can yield electrical power. The absorber layer 160 can have a first surface 162 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 164 substantially facing the opposing side 104 of the photovoltaic device 100. A thickness of the absorber layer 160 can be defined between the first surface 162 and the second surface 164. The thickness of the absorber layer 160 can be between about 0.5 mth to about 10 mih such as, for example, between about 1 mth to about 7 mth in one embodiment, or between about 1.5 pm to about 4 pm in another embodiment.
[0027] According to the embodiments described herein, the absorber layer 160 can be formed from a p-type semiconductor material having an excess of positive charge carriers, i.e., holes or acceptors. The absorber layer 160 can include any suitable p-type semiconductor material such as group II- VI semiconductors. Specific examples include, but are not limited to, semiconductor materials comprising cadmium, tellurium, selenium, or any combination thereof. Suitable examples include, but are not limited to, ternaries of cadmium, selenium and tellurium (e.g., CdSexTe1-x), or a compound comprising cadmium, selenium, tellurium, and one or more additional element.
[0028] In embodiments where the absorber layer 160 comprises tellurium and cadmium, the atomic percent of the tellurium can be greater than or equal to about 25 atomic percent and less than or equal to about 50 atomic percent such as, for example, greater than about 30 atomic percent and less than about 50 atomic percent in one embodiment, greater than about 40 atomic percent and less than about 50 atomic percent in a further embodiment, or greater than about 47 atomic percent and less than about 50 atomic percent in yet another embodiment. Alternatively or additionally, the atomic percent of the tellurium in the absorber layer 160 can be greater than about 45 atomic percent such as, for example, greater than about 49% in one embodiment It is noted that the atomic percent described herein is representative of the entirety of the absorber layer 160, the atomic percentage of material at a particular location within the absorber layer 160 can vary with thickness compared to the overall composition of the absorber layer 160. [0029] In embodiments where the absorber layer 160 comprises selenium and tellurium, the atomic percent of the selenium in the absorber layer 160 can be greater than about 0 atomic percent and less or equal to than about 25 atomic percent such as, for example, greater than about 1 atomic percent and less than about 20 atomic percent in one embodiment, greater than about 1 atomic percent and less than about 15 atomic percent in another embodiment, or greater than about 1 atomic percent and less than about 8 atomic percent in a further embodiment It is noted that the concentration of tellurium, selenium, or both can vary through the thickness of the absorber layer 160. For example, when the absorber layer 160 comprises a compound including selenium at a mole fraction of x and tellurium at a mole fraction of 1-x (ScxTei-x), x can vary in the absorber layer 160 with distance from the first surface 162 of the absorber layer 160.
[0030] Referring still to FIG. 1, the absorber layer 160 can be doped with a dopant configured to manipulate the charge carrier concentration. In some embodiments, the absorber layer 160 can be doped with a group I or V dopant such as, for example, copper, arsenic, phosphorous, antimony, or a combination thereof. The total density of the dopant within the absorber layer 160 can be controlled. In some embodiments, the absorber layer 160 can have an average concentration of a single group V dopant of at least about 1 x 1016 atoms/cm3 such as for example, at least about 5 x 1016 atoms/cm3 in one embodiment, between about 9 x 1016 atoms/cm3 and about 7 x 1018 atoms/cm3 in another embodiment, or between about 1 x 1017 atoms/cm3 and about 4 x 1018 atoms/cm3 in a further embodiment. Alternatively or additionally, in some embodiments, the peak concentration of the group V dopant within the absorber layer 160 can be at least about 1 x 1016 atoms/cm3. Alternatively or additionally, the amount of the dopant can vary with distance from the first surface 162 of the absorber layer 160.
[0031] According to the embodiments provided herein, the p-n junction can be formed by providing the absorber layer 160 sufficiently close to a portion of the photovoltaic device
100 having an excess of negative charge carriers, i.e., electrons or donors, In some embodiments, the absorber layer 160 can be provided adjacent to n-type semiconductor material. Alternatively, one or more intervening layers can be provided between the absorber layer 160 and n-type semiconductor material. In some embodiments, the absorber layer 160 can be provided adjacent to the buffer layer 150. For example, the first surface 162 of the absorber layer 160 can be provided upon the second surface 154 of the buffer layer 150.
[0032] The photovoltaic device 100 can include a back contact layer 180 configured to mitigate undesired alteration of the dopant and to provide electrical contact to the absorber layer 160. The back contact layer 180 can have a first surface 182 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 184 substantially facing the opposing side 104 of the photovoltaic device 100. A thickness of the back contact layer 180 can be defined between the first surface 182 and the second surface 184. The thickness of the back contact layer 180 can be between about 5 nm to about 200 nm such as, for example, between about 10 nm to about 50 nm in one embodiment.
[0033] In some embodiments, the back contact layer 180 can be provided adjacent to the absorber layer 160. For example, the first surface 182 of the back contact layer 180 can be provided upon the second surface 164 of the absorber layer 160. In some embodiments, the back contact layer 180 can include binary or ternary combinations of materials from groups I, II, VI, such as for example, one or more layers containing zinc, copper, cadmium and tellurium in various compositions. Further exemplary materials include, but are not limited to, zinc telluride doped with copper telluride, or zinc telluride alloyed with copper telluride.
[0034] The photovoltaic device 100 can include a conducting layer 190 configured to provide electrical contact with the absorber layer 160. The conducting layer 190 can have a first surface 192 substantially facing the energy side 102 of the photovoltaic device 100 and a second surface 194 substantially facing the opposing side 104 of the photovoltaic device 100. In some embodiments, the conducting layer 190 can be provided adjacent to the back contact layer 180. For example, the first surface 192 of the conducting layer 190 can be provided upon the second surface 184 of the back contact layer 180. The conducting layer 190 can include any suitable conducting material such as, for example, one or more layers of nitrogen- containing metal, silver, nickel, copper, aluminum, titanium, palladium, chrome, molybdenum, gold, or the like. Suitable examples of a nitrogen-containing metal layer can include aluminum nitride, nickel nitride, titanium nitride, tungsten nitride, selenium nitride, tantalum nitride, or vanadium nitride.
[0035] The photovoltaic device 100 can include a back support 196 configured to cooperate with the substrate 110 to form a housing for the photovoltaic device 100. The back support 196 can be disposed at the opposing side 102 of the photovoltaic device 100. For example, the back support 196 can be formed adjacent to the conducting layer 190. The back support 196 can include any suitable material, including, for example, glass (e.g., soda-lime glass). [0036] Referring collectively to FIGS. 1 and 5, manufacturing of the photovoltaic device 100 generally includes sequentially disposing functional layers or layer precursors in a
“stack” of layers through one or more thin film deposition processes, including, but not limited to, sputtering, spray, evaporation, molecular beam deposition, pyrolysis, closed space sublimation (CSS), pulse laser deposition (PLD), chemical vapor deposition (CVD), electrochemical deposition (BCD), atomic layer deposition (ALD), or vapor transport deposition (VTD). In some embodiments, a partially formed photovoltaic device 240 can be subjected to an annealing process to improve the functioning of the absorber layer 160. For example, the partially formed photovoltaic device 240 can comprise the absorber layer 160 adjacent to a layer stack 204. The layer stack 204 can include one or more of the layers of the photovoltaic device 100 disposed between the absorber layer 160 and the energy side 102.
[0037] The partially formed photovoltaic device 240 can be annealed within a processing chamber 244 that provides a reduced ambient environment 246, i.e., an environments having less than 500 parts per million of oxygen. During the annealing process, the absorber layer 160 can be contacted with an annealing compound 248 that comprises cadmium chloride (CdC½). Generally, the annealing process includes heating the absorber layer 160 (e.g., polycrystalline semiconductor material) for sufficient time and temperature to facilitate re-crystallization of the absorber layer 160. Additionally, the hearing, the reduced ambient environment 246 and annealing compound 248 can cooperate to facilitate grain growth in the absorber layer 160 and activation of group V dopants such as, for example, nitrogen (N), phosphorous (P), arsenic (As), antimony (Sb), bismuth (Bi), or a combination thereof. In some embodiments, the oxidation state of compounds (e.g., MnOx) in the buffer layer 150 can change during the annealing process. Specifically, before annealing, the MnOx can be present as, for example, MnOi (corresponding to x = 2), Mn304 (corresponding to x = 1.3), or a combination thereof. Alternatively or additionally, before annealing, the MnOx can include an amorphous component of Mn and O. After annealing, the at least a portion of the MnO* can change oxidation state, which can be evidenced by the presence of a different MnOx compound.
[0038] In some instances, the buffer layer 150 can also be doped with the group V dopant. For example, the group V dopant can diffuse into the buffer layer 150. Accordingly, in some embodiments, the peak concentration of the group V dopant within the buffer layer 150 can be at least about 1 x 1016 atoms/cm3. Thus, a layer of MnOx can comprise the Group V dopant. In alternative embodiments, one or more of the layers of the buffer layer 150 can be free of the group V dopant, i.e., diffusion can be mitigated. [0039] An interface region 158 can include the interface of the first surface 162 of the absorber layer 160 and the second surface 154 of the buffer layer 150. For example, the interface region 158 can start from the first surface 152 ofthe buffer layer 150 and extend into the absorber layer 160. The interface region 158 can have a thickness of less than or equal to about 500 nm such as, for example, be between about 0.5 nm and 500 nm in one embodiment, or between about 1 nm and 100 nm in another embodiment Applicant has discovered that when subjected to the annealing process, the buffer layer 150 performs in an unexpected manner. Without being bound to theory, it is believed that the chemical nature of the buffer layer 150 and the absorber layer 160 can lead to undesired defects within the interface region 158. Many chemical compositions can be more prone to defects such as, for example, during dopant activation in the reduced ambient environment 246. Such defects can decrease efficiency of the photovoltaic device 100.
[0040] Efficiency of the photovoltaic device 100 can be improved by including a layer of MnOx within the buffer layer 150. For example, the layer of MnOx adjacent to the first surface 162 of the absorber layer 160 or sufficiently close to the first surface 162 of the absorber layer 160. That is one or more of the plurality of layers 200 ofthe buffer layer can be interposed between the layer of MnOx and the to the first surface 162 of the absorber layer 160. Accordingly, the layer of MnOx can be within about 200 nm of the first surface 162 of the absorber layer 160 such as, for example, less than about 100 nm in one embodiment, less than about 80 nm in another embodiment, less than about 35 nm in yet another embodiment, of less than about 15 nm in a further embodiment
[0041] Examples
[0042] Comparative Example: a film stack was prepared over a glass substrate. The film stack included a TCO layer of fluorine doped tin oxide formed over the glass substrate, a buffer layer of tin oxide formed over the TCO layer, and an absorber layer of As:CdSeTe. The stack was annealed with an annealing compound that comprised cadmium chloride (CdCh) in a reduced ambient environment
[0043] Examples: Example 1 was formed in the same manner as the Comparative
Example with the buffer layer modified to have a base layer of tin oxide and an interface layer of Zm-xMgxO. Example 2 was formed in the same manner as the Comparative Example with the buffer layer modified to have a base layer of tin oxide and an interface layer of S1O2. Example 3 was formed in the same manner as the Comparative Example with the buffer layer modified to have a base layer of tin oxide, an intermediate layer of Zm-xMgxO, and an interface layer of SiOa. Example 4 was formed in the same manner as the Comparative Example with the buffer layer modified to have a base layer of tin oxide and an interface layer of MnO*. Example 5 was formed in the same manner as the Comparative Example with the buffer layer modified to have a base layer of Zm-xMgxO, and an interface layer of SiCfe. Multiple samples of the Comparative Example and the Examples were prepared and characterized using Secondary-Ion Mass Spectrometry (SIMS).
[0044] Table 1
Figure imgf000014_0001
[0045] Referring collectively to FIGS. 1 and 6, photoluminescence spectroscopy was utilized to characterize recombination at the interface of the buffer layer and the absorber layer of Comparative Example and Examples 1-4. Generally, a higher intensity of luminescence in response to light injected into the energy side 102 (FIG. 1) can correspond to less carrier recombination at interface of the buffer layer and the absorber layer. Accordingly, a higher intensity can correspond to higher efficiency of the photovoltaic device 100.
[0046] The photoluminescence intensities (PLI) for the Comparative Example and
Examples 1-4 are depicted in FIG. 6. Specifically, PLI spectrum 250 corresponds to the
Comparative Example, PLI spectrum 252 corresponds to Example 1, PLI spectrum 254 corresponds to Example 2, PLI spectrum 256 corresponds to Example 3, and PLI spectrum 258 corresponds to Example 4. Each of the spectra 250, 252, 254, 256, 258 are normalized to the peak value of the PLI spectrum 250. PLI spectrum 252, PLI spectrum 254, PLI spectrum 256, and PLI spectrum 258 demonstrate increased performance of Examples 1-4 relative to the Comparative Example. Specifically, PLI spectrum 252 corresponds to an improvement in peak intensity of about 700% for Example 1 relative to the Comparative Example. PLI spectrum 254 corresponds to an improvement in peak intensity of about 1,000% for Example 2 relative to the Comparative Example. PLI spectra 256, 258 correspond to an improvement in peak intensity of about 1,500% for Examples 3 and 4 relative to the Comparative Example. Further testing demonstrated a similar performance improvement for Example 5 as depicted for Example 3.
[004h Various instances of Example 4 were analyzed using X-ray diffraction (XRD) to determine the composition of the buffer layer 150 before and after the annealing process. In one instance, the buffer layer 150 included M113O4 before the annealing process and included MnO and M113O4 after the annealing process. In another instance, the buffer layer 150 included M112O3 before the annealing process and included M113O4 after the annealing process. In a further instance, the buffer layer 150 included MnCh and MmCU before the annealing process and included Mn304 (without MnCfe) after the annealing process. In still a further instance, the buffer layer 150 included MnC½ before the annealing process and included MnCfe and MTI3O4 after the annealing process.
[0048] According to the embodiments provided herein, a photovoltaic device can include an absorber layer disposed over a buffer layer. The absorber layer can have a first surface and a second surface. The absorber layer the absorber layer can include cadmium and tellurium. The absorber layer can be doped with a group V dopant The buffer layer can include a layer of MnOx.
[0049] According to the embodiments provided herein, method for annealing a partially formed photovoltaic device can include contacting the absorber layer with an annealing compound that includes cadmium chloride. The partially formed photovoltaic device can include an absorber layer disposed over a buffer layer. The absorber layer can include cadmium and tellurium. The buffer layer can include a layer of MnOx. The method can include heating the absorber layer for sufficient time and temperature to facilitate re-crystallization of the absorber layer. The method can include diffusing a group V dopant through the absorber layer and into the buffer layer.
[0050] It is noted that the terms "substantially" and "about" may be utilized herein to represent the inherent degree of uncertainty that may be attributed to any quantitative comparison, value, measurement, or other representation. These terms are also utilized herein to represent the degree by which a quantitative representation may vary from a stated reference without resulting in a change in the basic function of the subject matter at issue. [0051] While particular embodiments have been illustrated and described herein, it should be understood that various other changes and modifications may be made without departing from the spirit and scope of the claimed subject matter. Moreover, although various aspects of the claimed subject matter have been described herein, such aspects need not be utilized in combination. It is therefore intended that the appended claims cover all such changes and modifications that are within the scope of the claimed subject matter.

Claims

What is claimed is:
1. A photovoltaic device comprising an absorber layer disposed over a buffer layer, wherein:
the absorber layer has a first surface and a second surface;
the absorber layer comprises cadmium and tellurium;
the absorber layer is doped with a group V dopant; and
the buffer layer comprises a layer of MnOx.
2. The photovoltaic device of claim 1, wherein the layer of MnOx is adjacent to the first surface of the absorber layer.
3. The photovoltaic device of claim 1, wherein the layer of MnOx has a thickness of between 1 nm to 3 nm.
4. The photovoltaic device of claim 1, wherein a peak concentration of the group V dopant within the absorber layer is at least 1 x 1016 atoms/cm3.
5. The photovoltaic device of claim 1, wherein:
the buffer layer has a first surface and a second surface adjacent to the absorber layer,
the buffer layer comprises a base layer disposed at the first surface of the buffer layer, and an interface layer that is disposed at the second surface of the buffer layer; the base layer of the buffer layer comprises tin oxide; and
the interface layer of the buffer layer is composed of a different material than the base layer of the buffer layer.
6. The photovoltaic device of claim 5, wherein the interface layer of the buffer layer comprises magnesium oxide.
7. The photovoltaic device of claim 5, wherein the interface layer of the buffer layer comprises zinc magnesium oxide.
8. The photovoltaic device of claim 5, wherein the interface layer of the buffer layer comprises silicon dioxide.
9. The photovoltaic device of claim 5, wherein the interface layer of the buffer layer is the layer of MnOx.
10. The photovoltaic device of claim 5, wherein the interface layer of the buffer layer comprises silicon nitride.
11. The photovoltaic device of claim 5, wherein the base layer of the buffer layer is thicker than tiie interface layer of the buffer layer.
12. The photovoltaic device of claim 5, wherein:
the buffer layer comprises an intermediate layers disposed between the base layer of the buffer layer and the interface layer of the buffer layer; and
the intermediate layers of the buffer layer is composed of a different material than the base layer of the buffer layer and the interface layer of the buffer layer.
13. The photovoltaic device of claim 12, wherein the base layer ofthe buffer layer is thicker than the intermediate layer of the buffer layer.
14. The photovoltaic device of claim 12, wherein the intermediate layer of the buffer layer comprises zinc magnesium oxide.
15. The photovoltaic device of claim 14, wherein the interface layer of the buffer layer comprises silicon dioxide.
16. The photovoltaic device of claim 1, wherein the layer of MnO* is within 200 nm of the first surface of the absorber layer.
17. The photovoltaic device of claim 1, wherein the layer of MnO* is discontinuous.
18. The photovoltaic device of claim 17, wherein the layer of MnOx has a dosage of Mn that is at least 0.05 pg/cm2.
19. The photovoltaic device of claim 1, wherein the layer of MnOx comprises MnOa.
20. The photovoltaic device of claim 1, wherein the layer of MnOx comprises M112O3.
21. The photovoltaic device of claim 1, wherein the layer of MnO* comprises M113O4.
22. The photovoltaic device of claim 1, wherein the layer of MnOx has a thickness of between 1 nm to 10 nm.
23. The photovoltaic device of claim 1, wherein x ofthe layer ofMnOx is greater than or equal to 1 and less than or equal to 2.
24. The photovoltaic device of claim 1, wherein the buffer layer is provided adjacent to a transparent conductive oxide layer.
25. The photovoltaic device of claim 24, wherein the transparent conductive oxide layer comprises cadmium stannate, and wherein the layer of MnOx is adjacent to the absorber layer.
26. The photovoltaic device of claim 24, wherein the transparent conductive oxide layer comprises fluorine doped tin oxide, and wherein the layer of MnOx is adjacent to the absorber layer.
27. The photovoltaic device of claim 24, wherein:
the transparent conductive oxide layer comprises fluorine doped tin oxide; the buffer layer has a first surface and a second surface adjacent to the absorber layer,
the buffer layer comprises a base layer disposed at the first surface of the buffer layer, and an interface layer that is disposed at the second surface of the buffer layer; the base layer of the buffer layer comprises tin oxide; and
the interface layer of the buffer layer is the layer of MnOx.
28. The photovoltaic device of claim 24, wherein:
the transparent conductive oxide layer comprises fluorine doped tin oxide; the buffer layer has a first surface and a second surface adjacent to the absorber layer,
the buffer layer courses a base layer disposed at the first surface of the buffer layer, and an interface layer that is disposed at the second surface of the buffer layer; the buffer layer comprises an intermediate layers disposed between the base layer of the buffer layer and the interface layer of the buffer layer;
the base layer of the buffer layer comprises tin oxide; and
the intermediate layer of the buffer layer is the layer of MnOx; and the interface layer of the buffer layer comprises silicon dioxide.
29. The photovoltaic device of claim 24, wherein the transparent conductive oxide layer comprises indium tin oxide, and wherein the layer of MnOx is adjacent to the absorber layer.
30. The photovoltaic device of claim 29, wherein:
the buffer layer has a first surface and a second surface adjacent to the absorber layer,
the buffer layer comprises a base layer disposed at the first surface of the buffer layer, and
the base layer comprises zinc magnesium oxide.
31. A method for annealing a partially formed photovoltaic device, the partially farmed photovoltaic device comprising an absorber layer disposed over a buffer layer, wherein the absorber layer comprises cadmium and tellurium, and the buffer layer comprises a layer of MnOx, the method comprising:
contacting the absorber layer with an annealing compound that comprises cadmium chloride; and
heating the absorber layer for sufficient time and temperature to facilitate re- crystallization of the absorber layer; and
diffusing a group V dopant through the absorber layer and into the buffer layer.
32. The method of claim 31 , comprising changing an oxidation state of the layer of MnO*.
33. The photovoltaic device or method of any of claims 1 and 31-32, wherein the layer of
MnOx is adjacent to the first surface of the absorber layer.
34. The photovoltaic device or method of any of claims 1 and 31-33, wherein the layer of MnOx has a thickness of between 1 nm to 3 nm.
35. The photovoltaic device or method of any of claims 1 and 31-34, wherein a peak concentration of the group V dopant within the absorber layer is at least 1 x 1016 atoms/cm3.
36. The photovoltaic device or method of any of claims 1 and 31-35, wherein:
the buffer layer has a first surface and a second surface adjacent to the absorber layer, the buffer layer comprises a base layer disposed at the first surface of the buffer layer, and an interface layer that is disposed at the second surface of the buffer layer;
the base layer of the buffer layer comprises tin oxide; and
the interface layer of the buffer layer is composed of a different material than the base layer of the buffer layer.
37. The photovoltaic device or method of claim 36, wherein the interface layer of the buffer layer comprises magnesium oxide.
38. The photovoltaic device or method of claim 36, wherein the interface layer of the buffer layer comprises zinc magnesium oxide.
39. The photovoltaic device or method of claim 36, wherein the interface layer of the buffer layer comprises silicon dioxide.
40. The photovoltaic device or method of claim 36, wherein the interface layer of the buffer layer is the layer of MnOx.
41. The photovoltaic device or method of claim 36, wherein the interface layer of the buffer layer comprises silicon nitride.
42. The photovoltaic device or method of claim 36, wherein the base layer of the buffer layer is thicker than the interface layer of the buffer layer.
43. The photovoltaic device or method of any of claims 36-42, wherein:
the buffer layer comprises an intermediate layers disposed between the base layer of the buffer layer and the interface layer of the buffer layer; and
the intermediate layers of the buffer layer is composed of a different material than the base layer of the buffer layer and the interface layer of the buffer layer.
44. The photovoltaic device or method of claim 43, wherein the base layer of the buffer layer is thicker than the intermediate layer of the buffer layer.
45. The photovoltaic device or method of any of claims 43-44, wherein the intermediate layer of the buffer layer comprises zinc magnesium oxide.
46. The photovoltaic device or method of any of claims 1 and 31-45, wherein the layer of MnOx is within 200 nm of the first surface of the absorber layer.
47. The photovoltaic device or method of any of claims 1 and 31-46, wherein the layer of
MnOx is discontinuous.
48. The photovoltaic device or method of any of claims 1 and 31-47, wherein the layer of MnOx has a dosage of Mn that is at least 0.05 pgZcm2.
49. The photovoltaic device or method of any of claims 1 and 31-48, wherein the layer of MnOx comprises MnO.
50. The photovoltaic device or method of any of claims 1 and 31 -48, wherein the layer of
MnOx comprises Mn02.
51. The photovoltaic device or method of any of claims 1 and 31-48, wherein the layer of MnOx comprises Mn 2O3.
52. The photovoltaic device or method of any of claims 1 and 31-48, wherein the layer of
MnOx comprises M1 3O4.
53. The photovoltaic device or method of any of claims 1 and 31-52, wherein the absorber layer comprises selenium.
54. The photovoltaic device or method of any of claims 1, 31-33, and 35-53, wherein the layer of MnOx has a thickness of between 1 nm to 10 nm.
55. The photovoltaic device or method of any of claims 1, 31-48, and 53-54, wherein x of the layer of MnOx is greater than or equal to 1 and less than or equal to 2.
56. The photovoltaic device or method of any of claims 1, 31-35, and 46-55, wherein the buffer layer is provided adjacent to a transparent conductive oxide layer.
57. The photovoltaic device or method of claim 56, wherein the transparent conductive oxide layer comprises cadmium stannate, and wherein the layer of MnO* is adjacent to the absorber layer.
58. The photovoltaic device or method of claim 56, wherein the transparent conductive oxide layer comprises fluorine doped tin oxide, and wherein the layer of MnOx is adjacent to the absorber layer.
59. The photovoltaic device or method of claim 56, wherein:
the transparent conductive oxide layer comprises fluorine doped tin oxide; the buffer layer has a first surface and a second surface adjacent to the absorber layer,
the buffer layer comprises a base layer disposed at the first surface of the buffer layer, and an interface layer that is disposed at the second surface of the buffer layer; the base layer of the buffer layer comprises tin oxide; and
the interface layer of the buffer layer is the layer of MnOx.
60. The photovoltaic device or method of claim 56, wherein:
the transparent conductive oxide layer comprises fluorine doped tin oxide; the buffer layer has a first surface and a second surface adjacent to the absorber layer,
the buffer layer comprises a base layer disposed at the first surface of the buffer layer, and an interface layer that is disposed at the second surface of the buffer layer; the buffer layer comprises an intermediate layers disposed between the base layer of the buffer layer and the interface layer of the buffer layer; the base layer of the buffer layer comprises tin oxide; and
the intermediate layer of the buffer layer is the layer of MnOx; and the interface layer of the buffer layer comprises silicon dioxide.
61. The photovoltaic device or method of claim 56, wherein the transparent conductive oxide layer comprises fluorine doped tin oxide, and wherein the layer of MnOx is adjacent to the absorber layer.
62. The photovoltaic device or method of claim 56, wherein:
the transparent conductive oxide layer comprises fluorine doped tin oxide; the buffer layer has a first surface and a second surface adjacent to the absorber layer,
the buffer layer comprises a base layer disposed at the first surface of the buffer layer, and an interface layer that is disposed at the second surface of the buffer layer; the base layer of the buffer layer comprises tin oxide; and
the interlace layer of the buffer layer is the layer of MnOx.
63. The photovoltaic device or method of claim 56, wherein the transparent conductive oxide layer comprises indium tin oxide, and wherein the layer of MnOx is adjacent to the absorber layer.
64. The photovoltaic device or method of claim 63, wherein:
the buffer layer has a first surface and a second surface adjacent to the absorber layer,
the buffer layer comprises a base layer disposed at the first surface of the buffer layer, and
the base layer comprises zinc magnesium oxide.
65. The photovoltaic device or method of any of claims 1 and 31-64, wherein the layer of MnOx comprises the group V dopant
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US17/287,988 US20210376177A1 (en) 2018-10-24 2019-10-23 Buffer Layers for Photovoltaic Devices with Group V Doping
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Citations (3)

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US20090194166A1 (en) * 2007-11-02 2009-08-06 First Solar, Inc. Photovoltaic devices including doped semiconductor films
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