WO2020080248A1

WO2020080248A1 - Circuit structure and electrical junction box

Info

Publication number: WO2020080248A1
Application number: PCT/JP2019/039990
Authority: WO
Inventors: 池田　潤; 慶一佐々木; 純也愛知
Original assignee: 住友電装株式会社
Priority date: 2018-10-16
Filing date: 2019-10-10
Publication date: 2020-04-23
Also published as: US20210368618A1; JP2020064941A; CN112889352A; DE112019005172T5

Abstract

A circuit structure which is provided with a plurality of FETs (13), each having a source terminal (132) and a gate terminal (133). This circuit structure is provided with: a substrate part (31) to which the source terminal (132) and the gate terminal (133) are connected; and through holes (16) which are formed in the substrate part (31) in positions corresponding to the FETs (13), and which penetrate through the substrate part (31) in the thickness direction.

Description

Circuit structure and electrical junction box

The present invention relates to a circuit structure including a plurality of semiconductor elements and an electric junction box.
This application claims priority based on Japanese application No. 2018-195245 filed on October 16, 2018, and incorporates all the contents described in the Japanese application.

Conventionally, a circuit structure in which a conductive member (also called a bus bar or the like) that constitutes a circuit for conducting a relatively large current is mounted is generally known.

On the other hand, in Patent Document 1, heat generated from an electric component provided in the casing is quickly discharged to the outside of the casing, and outside air is taken into the casing to cool the electric component. Electronic devices having holes are disclosed.

Japanese Patent Laid-Open No. 2018-063982

A circuit structure according to an aspect of the present disclosure is a circuit structure including a plurality of semiconductor elements having a first terminal and a second terminal, and a substrate part to which the first terminal and the second terminal are connected, and a semiconductor element. And a through hole that is formed in the substrate portion for each and penetrates the substrate portion in the thickness direction.

An electrical junction box according to an aspect of the present disclosure includes the above-described circuit structure, a heat dissipation recess portion that covers the plurality of semiconductor elements, and a heat conductive material that is interposed between each semiconductor element and the heat dissipation recess portion. Prepare

3 is a front view of the electric device according to the first embodiment. FIG. 3 is an exploded view of the electric device according to the first embodiment. FIG. 3 is a schematic view of the circuit structure of the electric device according to the first embodiment as viewed from below. FIG. It is an enlarged view which expands and shows the part enclosed with the broken line in FIG. FIG. 5 is a schematic vertical sectional view taken along line VV of FIG. 4. FIG. 5 is a schematic vertical sectional view taken along line VI-VI of FIG. 4. FIG. 6 is a partial vertical cross-sectional view showing the relationship between the FET and the recess in the electric device according to the second embodiment.

[Problems to be solved by the present disclosure]
In the circuit structure as described above, a large current flows through an electronic component such as a semiconductor element, so that a large amount of heat is generated not only by the electronic component but also by the conductive member. The heat thus generated may cause malfunction of the electronic components, and may also cause secondary thermal damage to surrounding electronic components and the like.

In the electronic device of Patent Document 1, in order to address such a problem, a hole is formed in the housing, but since the hole is formed in the housing, dust, water, etc. may enter the housing from the outside. is there. In the electronic device of Patent Document 1, a filter is separately provided in order to prevent this, and as a result, there is a problem that the structure becomes complicated and the manufacturing cost increases.

Therefore, it is an object of the present invention to provide a circuit structure and an electrical junction box that can improve the heat dissipation of the heat generated by a semiconductor element with a simple structure.

[Effect of the present disclosure]
According to one aspect of the present disclosure, it is possible to enhance the heat dissipation of heat generated by a semiconductor element with a simple configuration.

[Description of Embodiments of the Present Invention]
First, embodiments of the present disclosure will be listed and described. Further, at least a part of the embodiments described below may be arbitrarily combined.

(1) A circuit structure according to an aspect of the present disclosure is a circuit structure including a plurality of semiconductor elements having a first terminal and a second terminal, and a substrate part to which the first terminal and the second terminal are connected. A through hole formed in the substrate portion for each semiconductor element and penetrating the substrate portion in the thickness direction.

In this aspect, a through hole that penetrates the substrate portion in the thickness direction is formed in the substrate portion for each semiconductor element. Therefore, when the semiconductor element emits heat, such heat can be transferred from one surface side of the substrate section to the other surface side of the substrate section through the through hole, and a heat dissipation effect is achieved.

(2) In the circuit structure according to one aspect of the present disclosure, a current smaller than the first terminal flows through the second terminal, a conductive plate connected to the first terminals of the plurality of semiconductor elements, and each semiconductor. The plurality of current-carrying members connected to the second terminal of the element are provided, and the through hole is formed in the vicinity of the second terminal.

In this aspect, the through hole is formed in the vicinity of the conducting member to which the second terminal through which the current smaller than the first terminal flows is connected. By forming the through hole in the vicinity of the second terminal (current-carrying member) through which a smaller current flows, it is possible to prevent the resistance from increasing due to the through hole.

(3) In the circuit structure according to an aspect of the present disclosure, the conductive plate has a recess in which one end of the current-carrying member is arranged, and an edge of the recess and an end of the current-carrying member. A resin portion is formed in between, and the through hole is formed in the resin portion.

In this aspect, one end of the current-carrying member is arranged inside the recess of the conductive plate with the resin portion sandwiched therebetween, and the through hole is formed in the resin portion. Since the through hole is formed in the resin portion in this way, it is possible to prevent an increase in resistance due to forming the through hole in the current-carrying member or the conductive plate and to easily form the through hole.

(4) An electrical junction box according to an aspect of the present disclosure is provided with any one of the above-described circuit structures, a heat dissipation recess portion that covers the plurality of semiconductor elements, and between each semiconductor element and the heat dissipation recess portion. And an intervening heat conductive material.

In this aspect, the heat conductive material is interposed between the semiconductor element and the discharge recess. The heat-conducting material is in contact with the inner surfaces of the semiconductor element and the heat dissipation recess, and quickly transfers the heat generated from the semiconductor element to the heat dissipation recess. Therefore, the heat generated by the semiconductor element can be effectively dissipated.

(5) The electrical junction box according to an aspect of the present disclosure includes a heat dissipation fin that is provided outside the heat dissipation recess and that acquires heat from the heat dissipation recess and dissipates the heat.

In this aspect, the heat dissipation fins are provided outside the heat dissipation recess. Therefore, the heat conductive material transfers the heat generated from the semiconductor element to the heat dissipation recess, and the heat transferred to the heat dissipation recess is air-cooled through the heat dissipation fins. Therefore, the heat generated by the semiconductor element can be effectively dissipated.

[Details of the embodiment of the present invention]
The present invention will be specifically described based on the drawings showing the embodiments. A circuit structure and an electric junction box according to an embodiment of the present disclosure will be described below with reference to the drawings. It should be noted that the present invention is not limited to these exemplifications, and is shown by the scope of the claims, and is intended to include meanings equivalent to the scope of the claims and all modifications within the scope.

(Embodiment 1)
In the following, an electric device (electric junction box) including the circuit structure according to the first embodiment will be described as an example. FIG. 1 is a front view of the electric device 1 according to the first embodiment, and FIG. 2 is an exploded view of the electric device 1 according to the first embodiment.
The electric device 1 is an electric connection box that is arranged in a power supply path between a power source such as a battery provided in a vehicle and a load such as a vehicle electric component such as a lamp and a wiper or a motor. The electric device 1 is used as an electronic component such as a DC-DC converter or an inverter.

In the first embodiment, for convenience, “front”, “rear”, “left”, “right”, “top”, “bottom” of the electric device 1 are defined by the front, rear, left, right, and upper and lower directions shown in FIGS. 1 and 2. Is defined. Hereinafter, the configuration of the electric device 1 will be described using the front, rear, left, right, and upper and lower directions defined in this way.

The electric device 1 includes a circuit structure 10, a circuit board 12 having a circuit pattern, and a support member 20 that supports the circuit structure 10.
The circuit structure 10 includes a bus bar that constitutes a power circuit, a circuit board, and electronic components mounted on the bus bar. The electronic component is appropriately mounted according to the use of the electric device 1, and includes a switching element such as a FET (Field Effect Transistor), a resistor, a coil, a capacitor, and the like.

The support member 20 sandwiches the base portion 21 having a support surface 211 for supporting the circuit structure 10 on the upper surface, the heat dissipation portion 22 provided on the surface (lower surface 212) opposite to the support surface 211, and the heat dissipation portion 22. And a plurality of leg portions 23 provided at both left and right ends of the base portion 21. The base portion 21, the heat radiation portion 22, and the leg portion 23 included in the support member 20 are integrally formed by die casting using a metal material such as aluminum or aluminum alloy.

The base 21 is a rectangular flat plate member having an appropriate thickness. The circuit structure 10 is fixed to the support surface 211 of the base portion 21 by a known method such as adhesion, screwing, or soldering.

The heat dissipating section 22 includes a plurality of heat dissipating fins 221 projecting downward from the lower surface 212 of the base section 21, and dissipates heat generated from the circuit structure 10 to the outside. The plurality of heat radiation fins 221 extend in the left-right direction and are arranged in parallel in the front-rear direction at intervals. Further, in the heat dissipation portion 22, a recess 222 (heat dissipation recess) that covers the FET 13 described later is formed, and the heat dissipation fin 221 is provided outside the recess 222.

Legs 23 are provided on both left and right ends of the base 21. One or a plurality of leg portions 23 are provided on the left and right sides of the base portion 21, respectively.

The circuit board 12 has, for example, a substantially rectangular insulating board. A control circuit (not shown) including electronic components such as resistors, coils, capacitors, and diodes is mounted on this insulating substrate, and a circuit pattern for electrically connecting these electronic components is formed. The control circuit of the circuit board 12 gives an ON / OFF signal to the power circuit 30 described later to control the power circuit 30. The circuit board 12 and the power circuit 30 are housed in the housing unit 11.

FIG. 3 is a schematic view of the circuit structure 10 of the electric device 1 according to the first embodiment as viewed from below. That is, FIG. 3 is a diagram showing the circuit structure 10 when viewed from the direction of the arrow in FIG.

The circuit structure 10 includes a power circuit 30. The power circuit 30 includes at least bus bars 111 to 113, and a semiconductor switching element 13 (semiconductor element) that switches energization / de-energization based on the input control signal when a control signal from the circuit board 12 is input.

The semiconductor switching element 13 is, for example, an FET (more specifically, a surface mounting type power MOSFET), and is mounted on the lower surface side of the bus bars 111 to 113. In addition to the semiconductor switching element 13 (hereinafter referred to as FET 13), electronic components such as a Zener diode may be mounted on the lower surface side of the bus bars 111 to 112.

The FET 13 includes, for example, a drain terminal 131 on one main surface of the element body, and the drain terminal 131 protrudes on one side surface side of the element body. Further, the FET 13 includes a source terminal 132 (first terminal) and a gate terminal 133 (second terminal) on the other side surface facing the one side surface. FIG. 3 illustrates the case where the six FETs 13a to 13f are mounted in the power circuit 30, but the present invention is not limited to this. Hereinafter, the FETs 13a to 13f are also referred to as the FET 13.

The drain terminal 131 of the FET 13 is soldered to the bus bar 111. Hereinafter, the bus bar 111 will be referred to as the drain bus bar 111. The source terminal 132 of the FET 13 is soldered to the bus bar 112 (conductive plate). Hereinafter, the bus bar 112 will be referred to as the source bus bar 112.
The drain bus bar 111 and the source bus bar 112 are conductive plate members formed of a metal material such as copper or copper alloy.

On the other hand, the gate terminal 133 of the FET 13 carries a smaller current than the source terminal 132 and the drain terminal 131, and is soldered to the bus bar 113 (current-carrying member). Hereinafter, the bus bar 113 will be referred to as the gate bus bar 113. The gate bus bar 113 is a conductive member made of a metal material such as copper or a copper alloy.

A resin portion 114 of an insulating resin material is interposed between the drain bus bar 111, the source bus bar 112, and the gate bus bar 113, and the drain bus bar 111, the source bus bar 112, and the gate bus bar 113 are integrated with the resin portion 114. Thus, the substrate portion 31 is formed.

The board portion 31 has a substantially rectangular shape when viewed from above and below, and has a flat surface on the lower side. The FETs 13a to 13f are mounted on the lower side surface of the board portion 31. The FETs 13a to 13f are arranged in a line along the longitudinal direction (left-right direction) of the substrate portion 31.

The resin portion 114 is manufactured by insert molding using an insulating resin material such as phenol resin or glass epoxy resin. For example, the resin part 114 and the housing part 11 are integrally formed in one step. Further, the housing portion 11 supports the peripheral portion of the circuit board 12 from the lower surface side by ribs (not shown) formed on the inner peripheral surface of the peripheral wall.

The resin portion 114 integrates the drain bus bar 111, the source bus bar 112, and the gate bus bar 113 by engaging them. Further, a part of the resin portion 114 is arranged between the drain bus bar 111, the source bus bar 112, and the gate bus bar 113 to insulate the bus bars from each other.

A cylindrical housing 5 that protects the outer ends of connector terminals (not shown) is attached to the outside of the right side wall of the housing 11.

4 is an enlarged view showing an enlarged portion surrounded by a broken line in FIG. 3, FIG. 5 is a schematic vertical sectional view taken along line VV of FIG. 4, and FIG. FIG. 6 is a schematic vertical sectional view taken along line VI-VI.

The drain bus bar 111 is larger than the source bus bar 112 and the gate bus bar 113, and has a rectangular plate shape. That is, the drain bus bar 111 has the largest exposed area in the substrate portion 31, and occupies most of the front side. The FETs 13a to 13f are fixed to the drain bus bar 111 by soldering the drain terminals 131 to the drain bus bar 111, respectively.

The resin portion 114b of the resin portion 114 is interposed between the drain bus bar 111 and the source bus bar 112. That is, the drain bus bar 111 and the source bus bar 112 face each other with the resin portion 114b interposed therebetween. In the drain bus bar 111, FETs 13a to 13f are juxtaposed at the peripheral portion facing the source bus bar 112 so that the source terminal 132 and the gate terminal 133 face the source bus bar 112, respectively.

The source bus bar 112 has comb-shaped irregularities at the edge portion facing the edge of the drain bus bar 111 to which the FETs 13a to 13f are fixed. That is, in the source bus bar 112, a plurality of

concave portions

115, 115, ... 115 are formed on the peripheral portion. Each recess 115 is formed at a position corresponding to each gate terminal 133 of the FETs 13a to 13f.

The source bus bar 112 is smaller than the drain bus bar 111 and has a substantially trapezoidal plate shape. In the source bus bar 112, the source terminal 132 of each of the FETs 13a to 13f is soldered to the edge portion except the recess 115.

Inside each recess 115, a terminal connecting portion 113a of the gate bus bar 113, which will be described later, is arranged at a distance from the edge of the recess 115. Further, the resin portion 114 a of the resin portion 114 is interposed between the edge of each recess 115 and the terminal connecting portion 113 a of the gate bus bar 113. That is, the terminal connecting portion 113a of the gate bus bar 113 is surrounded by the resin portion 114a, so that the gate bus bar 113 and the source bus bar 112 are insulated.

The gate terminal 133 of each of the FETs 13a to 13f is connected to each gate bus bar 113. Specifically, the gate bus bar 113 is bent into a substantially L shape, has a terminal connecting portion 113a soldered to the gate terminal 133 at one end on the lower side, and has a circuit board 12 at the other end on the upper side. It has a board connecting portion 113b to be connected (see FIG. 5). In the gate bus bar 113, the substrate connecting portion 113b has a tapered fin shape that is thinner than the terminal connecting portion 113a.

The terminal connecting portion 113a is rectangular in plan view and is exposed on the lower side surface of the substrate portion 31. The terminal connecting portion 113a is provided so as to be flush with the source bus bar 112 and the resin portion 114a. As described above, the gate terminals 133 of the FETs 13a to 13f are soldered to the terminal connecting portions 113a, and the terminal connecting portions 113a are surrounded by the resin portion 114a.

In each resin portion 114a, through

holes

16, 16 are formed near the gate terminal 133 (terminal connecting portion 113a) in the resin portion 114a (substrate portion 31) in the thickness direction, that is, in the vertical direction. For example, the through hole 16 is formed at the boundary between the terminal connecting portion 113a and the resin portion 114a. The through holes 16 are formed on both sides of the terminal connecting portion 113a in the left-right direction. In the present embodiment, the case where the through holes 16 are provided at two positions will be described as an example, but the present invention is not limited to this and may be formed at three or more positions.

The FETs 13a to 13f arranged side by side on the lower surface of the substrate portion 31 are covered by the recess 222 of the heat dissipation portion 22. When the FETs 13a to 13f generate heat, the heat is conducted to the inside of the recess 222 and is air-cooled via the plurality of heat radiation fins 221.

Further, in the circuit structure 10 according to the present embodiment, as described above, the through hole 16 is formed in the substrate portion 31 for each of the FETs 13a to 13f. This facilitates ventilation between the upper side of the substrate portion 31 and the lower side of the substrate portion 31. That is, in the circuit structure 10 according to the present embodiment, the air below the substrate portion 31 on which the FETs 13a to 13f, which are heating elements, are mounted is freely moved to the upper side of the substrate portion 31 through the through hole 16. Yes (see the arrow in FIG. 6). Therefore, when heat is generated by the FETs 13a to 13f, hot air containing such heat does not stay in the recess 222 and moves to the upper side of the substrate portion 31 through the through hole 16, thereby providing a heat dissipation effect.

Further, in the present embodiment, the through hole 16 is formed near the gate terminal 133 (terminal connecting portion 113a). That is, since the through hole 16 is formed for each of the FETs 13a to 13f and near the heat source FETs 13a to 13f, the heat can be radiated more efficiently.

The circuit structure 10 according to the present embodiment uses the through holes 16 in addition to the heat radiation fins 221 to radiate the heat generated by the FETs 13a to 13f, so that the heat can be radiated more reliably. Therefore, it is possible to prevent the malfunctions and failures of the FETs 13a to 13f from occurring due to the heat generated in the FETs 13a to 13f and the secondary thermal damage to the electronic components and the like around the FETs 13a to 13f.

In the present embodiment, the through hole 16 is formed in the resin portion 114a in the vicinity of the gate terminal 133 (terminal connecting portion 113a). Therefore, the through hole 16 can be formed more easily than the terminal connecting portion 113a.
However, the circuit structure 10 according to this embodiment is not limited to this. The through holes 16 may be formed in any of the drain bus bar 111, the source bus bar 112, and the gate bus bar 113 as long as they are near the FETs 13a to 13f.

When the through hole 16 is formed in any of the drain bus bar 111, the source bus bar 112, and the gate bus bar 113, there is a concern that the current resistance in each bus bar increases. The resistance is proportional to the amount of current flowing. On the other hand, as described above, a current smaller than the drain terminal 131 and the source terminal 132 flows through the gate terminal 133. Therefore, it is desirable that the through hole 16 be formed near the gate terminal 133 or the gate bus bar 113 through which a smaller current than the drain bus bar 111 and the source bus bar 112 flows.

Furthermore, as described above, when the through hole 16 is formed in any of the drain bus bar 111, the source bus bar 112, and the gate bus bar 113, there is a concern that the resistance may increase. It is more desirable that the hole 16 is provided in the resin portion 114.

(Embodiment 2)
FIG. 7 is a partial vertical cross-sectional view showing the relationship between the FETs 13a to 13f and the recess 222 in the electric device 1 according to the second embodiment.

As shown in FIG. 7, FETs 13 a to 13 f are mounted on the lower side surface of the substrate portion 31, and the FETs 13 a to 13 f are covered by the recess 222 of the heat radiating portion 22. Further, in the present embodiment, the heat conductive material 40 is interposed between the FETs 13a to 13f and the inner side surface of the recess 222. The heat conductive material 40 is, for example, grease or a heat transfer sheet having excellent heat conductivity. The heat conductive material 40 is in contact with, for example, the lower side surface of the FETs 13a to 13f and the inner side surface of the recess 222, and transfers the heat generated from the FETs 13a to 13f to the recess 222.

As described above, in the electric device 1 according to the present embodiment, when the FETs 13a to 13f generate heat, such heat is quickly conducted to the recess 222 via the heat conductive material 40. Next, the heat radiation fin 221 acquires heat from the recess 222 and cools it by air. Therefore, the heat generated by the FETs 13a to 13f can be radiated more effectively.

The same parts as those of the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted. ‥

The embodiments disclosed this time are to be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the meanings described above but by the claims, and is intended to include meanings equivalent to the claims and all modifications within the scope.

1 Electrical Device 10 Circuit Structure 11 Housing 13 FET
16 Through Hole 22 Heat Dissipation Section 30 Power Circuit 31 Board Section 40 Thermal Conductive Material 111 Drain Busbar 112 Source Busbar 113 Gate Busbar 113a Terminal Connection Section 113b

Board Connection Section

114, 114a, 114b Resin Section 115 Recessed Section 131 Drain Terminal 132 Source Terminal 133 Gate Terminal 221 Radiating fin 222 Cavity

Claims

In a circuit structure including a plurality of semiconductor elements having a first terminal and a second terminal,
A substrate portion to which the first terminal and the second terminal are connected,
A circuit structure including: a through hole formed in the substrate portion for each semiconductor element and penetrating the substrate portion in a thickness direction.
A current smaller than that of the first terminal flows through the second terminal,
A conductive plate connected to the first terminals of the plurality of semiconductor elements;
A plurality of current-carrying members connected to the second terminals of the respective semiconductor elements,
The circuit structure according to claim 1, wherein the through hole is formed in the vicinity of the second terminal.
The conductive plate has a recess in which one end of the current-carrying member is arranged inside,
A resin portion is formed between the edge of the recess and one end of the current-carrying member,
The circuit structure according to claim 2, wherein the through hole is formed in the resin portion.
A circuit structure according to any one of claims 1 to 3,
A heat dissipation recess portion that covers the plurality of semiconductor elements;
An electrical junction box comprising a heat conductive material interposed between each semiconductor element and the heat dissipation recess.
The electrical junction box according to claim 4, further comprising a radiation fin that is provided outside the heat radiation recess portion and that receives heat from the heat radiation recess portion to radiate the heat.