WO2020079903A1 - Method for forming nitride film and method for manufacturing semiconductor device - Google Patents

Method for forming nitride film and method for manufacturing semiconductor device Download PDF

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WO2020079903A1
WO2020079903A1 PCT/JP2019/028095 JP2019028095W WO2020079903A1 WO 2020079903 A1 WO2020079903 A1 WO 2020079903A1 JP 2019028095 W JP2019028095 W JP 2019028095W WO 2020079903 A1 WO2020079903 A1 WO 2020079903A1
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nitride film
gas
forming
plasma
fluorine
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PCT/JP2019/028095
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French (fr)
Japanese (ja)
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裕之 小野田
健次 大内
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東京エレクトロン株式会社
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate

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  • the present disclosure relates to a method for forming a nitride film and a method for manufacturing a semiconductor device.
  • 3D NAND type nonvolatile semiconductor memory For example, in the process of manufacturing a 3D NAND type nonvolatile semiconductor memory device (hereinafter, referred to as 3D NAND type semiconductor memory), a laminated structure in which an oxide film (SiO 2 film) and a nitride film (SiN film) are alternately laminated is formed. , Forming memory holes in the stacking direction. Then, after forming the gate insulating film and the channel portion in the memory hole, a trench is formed in the stacking direction of the stacked film, and the SiN film is removed by wet etching through the trench. Next, a metal film is embedded in the space after removing the SiN film (for example, Patent Document 1).
  • SiO 2 film oxide film
  • SiN film nitride film
  • high-speed film-forming plasma CVD is used for forming the nitride film.
  • a silane-based compound gas such as silane (SiH 4 ) gas and nitrogen such as ammonia (NH 3 ) gas are used.
  • a containing gas is used.
  • the present disclosure provides a nitride film that can suppress a reduction in the etching rate of the laminated structure due to high lamination when forming a nitride film used for a laminated structure in which an oxide film and a nitride film are alternately laminated.
  • a film forming method and a semiconductor device manufacturing method are provided.
  • a nitride film forming method prepares a substrate for forming a laminated structure in which an oxide film and a nitride film are alternately laminated, the substrate having a nitride film forming surface on the surface. And supplying a silicon source gas containing silicon and fluorine and a nitrogen-containing gas to the substrate and generating plasma to form a nitride film containing fluorine on the nitride film forming surface of the substrate. Including what to do.
  • a nitride film used for a laminated structure in which an oxide film and a nitride film are alternately laminated is formed, it is possible to suppress a decrease in etching rate of the laminated structure due to high lamination.
  • a method for forming a film and a method for manufacturing a semiconductor device are provided.
  • FIG. 6 is a flowchart showing a method for forming a nitride film according to one embodiment.
  • FIG. 3 is a cross-sectional view schematically showing an example of a film forming apparatus that can be used in the method for forming a nitride film according to one embodiment.
  • 6 is a flowchart showing a method for manufacturing a 3D NAND type semiconductor memory as a method for manufacturing a semiconductor device to which the method for forming a nitride film according to one embodiment is applied.
  • FIG. 4 is a process cross-sectional view showing step 1 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG. 3.
  • FIG. 6 is a process cross-sectional view showing step 2 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG.
  • FIG. 4 is a process cross-sectional view showing step 3 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG. 3.
  • FIG. 6 is a process cross-sectional view showing step 4 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG. 3.
  • FIG. 6 is a process cross-sectional view showing step 5 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG. 3. It is sectional drawing which shows the other example of an ONON laminated structure.
  • a laminated structure (hereinafter referred to as an ONON laminated structure) in which an oxide film (SiO 2 film) and a nitride film (SiN film) are alternately laminated is formed.
  • a silane-based compound gas such as SiH 4 gas and a nitrogen-containing gas such as NH 3 gas are used, as shown in Patent Document 2 described above.
  • the ONON laminated structure is being highly laminated in order to increase the memory density. That is, the number of transistors per unit area is increased by highly integrating the ONON laminated structure.
  • the etching rate especially in the lower part lowers when the memory holes are formed by etching in the stacking direction of the ONON stacked structure, which increases the etching time and lowers the productivity. Resulting in.
  • a film such as tetrafluorosilane (SiF 4 ) is used.
  • a silicon raw material (Si raw material) gas containing silicon (Si) and fluorine (F) is used. That is, a Si source gas containing Si and F and a nitrogen-containing gas are supplied to generate plasma to form a nitride film containing F on the surface of the substrate on which the nitride film is formed.
  • the film formation at this time may be plasma CVD or plasma ALD.
  • SiF 4 or the like that has not been completely decomposed is added to the nitride film during the film formation process, and F is contained in the film. Since F is contained in the nitride film, it has an effect of significantly increasing the etching rate of the film. Therefore, the nitride film containing F (SiNF film) is more effective than the nitride film containing no F (SiN film). And the etching rate is much higher. Therefore, the etching rate of the laminated structure can be increased.
  • H in the conventional film formation of a nitride film hydrogen (H) contained in SiH 4 gas or the like used as a film forming material is contained in the nitride film during the film formation process, so that H diffusion from the nitride film is a problem. Becomes That is, H in the nitride film may diffuse to the interface of the gate insulating film of the transistor during the heat treatment, deteriorate the reliability of the transistor, and increase the variation in the threshold value.
  • the H contained in the nitride film is reduced.
  • the amount can be reduced.
  • the adverse effect on the transistor due to the H diffusion can be suppressed.
  • FIG. 1 is a flowchart showing a method for forming a nitride film according to one embodiment.
  • a substrate for forming a laminated structure in which an oxide film and a nitride film are alternately laminated such as an ONON laminated structure used in a manufacturing process of a 3D NAND type semiconductor memory, and a nitride film is formed on a surface of the substrate.
  • a substrate having a formation surface is prepared (step 1).
  • the substrate is, for example, a semiconductor wafer (hereinafter simply referred to as a wafer) in which a predetermined structure is formed on a semiconductor substrate typified by silicon. Even if the laminated structure is not yet formed, the laminated structure It may be in the process of being formed. Such a substrate is provided in the chamber of the film forming apparatus.
  • Step 2 a Si source gas containing Si and F and a nitrogen-containing gas are supplied to the substrate, and plasma is generated to form a nitride film containing F on the nitride film formation surface of the substrate ( Step 2).
  • a Si source gas containing Si and F and a nitrogen-containing gas are supplied into the chamber in which the substrate is placed, and plasma is generated in the chamber at a predetermined timing.
  • plasma CVD in which a Si source gas and a nitrogen-containing gas are simultaneously introduced into a chamber in which a substrate is placed and plasma is generated to form a film can be used.
  • the Si source gas and the nitrogen-containing gas are dissociated by plasma to cause a CVD reaction on the surface of the substrate.
  • a Si source gas and a nitrogen-containing gas are alternately introduced into the chamber with a purge of residual gas in the chamber sandwiched therebetween, and plasma is generated at a predetermined timing to form a film.
  • Plasma ALD can also be used.
  • high-speed film formation can be performed, which is suitable for forming a nitride film of an ONON laminated structure that requires high-speed film formation.
  • fluorosilane-based gas typified by SiF 4 gas
  • fluorosilane-based gas include difluorosilane (SiF 2 ) gas and hexafluorodisilane (Si 2 F 6 ) gas.
  • Si raw material gas in addition to fluorosilane-based gas, SiH 4 gas, tetrachlorosilane (SiCl 4 ) gas, disilane (Si 2 H 6 ) gas, dichlorosilane (SiH 2 Cl 2 ) gas, hexachlorodisilane (Si 2 A silicon-based (Si-based) compound gas that does not contain F, such as Cl 6 ) gas, may be included.
  • the Si source gas containing Si and F may be a mixed gas of a Si-based compound gas containing no F such as SiH 4 gas and an F-containing gas such as F 2 gas.
  • the nitrogen-containing gas N 2 gas, NH 3 gas or the like can be used.
  • an inert gas such as Ar gas used as a plasma generation gas or a purge gas may be used.
  • the nitride film (SiNF film) containing F in the nitride film is a nitride film containing no F (SiN film).
  • the etching rate is much higher than that of film.
  • the SiNF film containing 20 at% F has an etching rate twice or more that of the SiN film.
  • the content of F is preferably 30 at% or less.
  • the F content in the nitride film (SiNF film) can be adjusted to a desired value by adjusting the flow rate of the Si raw material gas (or the flow rate of the fluorosilane-based gas in the Si raw material gas).
  • the Si-based compound gas containing no F such as SiH 4 gas and SiCl 4 gas described above is added to add F in the nitride film (SiNF film).
  • the content can be adjusted.
  • the Si raw material gas by using a fluorosilane-based gas such as SiF 4 gas as the Si raw material gas, the amount of H-containing gas such as SiH 4 gas that has been conventionally used as the Si raw material can be reduced, and the nitride film in the nitride film can be reduced. The amount of H can be reduced. Thus, H diffusion from the nitride film to the interface of the gate insulating film of the transistor can be suppressed.
  • a fluorosilane-based gas such as SiF 4 gas
  • nitrogen gas nitrogen gas (N 2 gas), NH 3 gas or the like can be used, but N 2 gas is preferable. Since the N 2 gas does not contain H, it contributes to the reduction of the amount of H in the nitride film. Further, as the nitrogen-containing gas, other gas such as N 2 gas and NH 3 gas may be used together, but it is preferable to use only N 2 gas. As a result, H derived from the nitrogen-containing gas can be eliminated, the amount of H in the nitride film can be further reduced, and the adverse effect of H can be suppressed more effectively.
  • the method of generating plasma is not particularly limited, and commonly used ones such as capacitively coupled plasma, inductively coupled plasma, and microwave plasma can be used.
  • Capacitively coupled plasma is preferable from the viewpoint of plasma response.
  • SiF 4 and N 2 have high binding energy, and high plasma energy is required for decomposition. Therefore, when capacitively coupled plasma is used, a high frequency in the VHF band, which is higher than the usual 13.56 MHz, is preferable in order to increase the plasma energy, and a frequency of 60 MHz or higher is more preferable.
  • the temperature during the film formation process is preferably in the range of 300 to 650 ° C. from the viewpoint of effectively advancing the film formation reaction and the demand of the device.
  • the pressure in the chamber at the time of treatment is preferably in the range of 13.3 to 1333 Pa (0.1 to 10 Torr), although it varies depending on the plasma generation method.
  • FIG. 2 is a cross-sectional view schematically showing an example of a film forming apparatus, and illustrates a film forming apparatus that generates capacitively coupled plasma and performs a film forming process on a wafer that is a substrate.
  • the film forming apparatus 100 has a metal chamber 1 having a substantially cylindrical shape.
  • the chamber 1 has a protrusion 1a at the center of its bottom.
  • An exhaust pipe 11 is connected to the side surface of the chamber 1, and an automatic pressure control valve (APC) for controlling the pressure inside the chamber 1 and a vacuum pump for exhausting the inside of the chamber 1 are connected to the exhaust pipe 11.
  • APC automatic pressure control valve
  • the exhaust mechanism 12 having the above is provided.
  • the exhaust mechanism 12 can reduce the pressure in the chamber 1 to a predetermined degree of vacuum.
  • a loading / unloading port 13 for loading / unloading the wafer W to / from a wafer transfer chamber (not shown) provided adjacent to the chamber 1, and a gate valve 14 for opening / closing the loading / unloading port 13. Is provided.
  • a mounting table 2 for horizontally supporting the wafer W is provided in the chamber 1.
  • the mounting table 2 is supported by a support member 3 extending vertically from the bottom of the chamber 1 at the center of the lower surface thereof.
  • the mounting table 2 is made of metal and functions as a lower electrode.
  • the mounting table 2 is grounded.
  • a heater 21 for heating the wafer W is provided inside the mounting table 2.
  • the mounting table 2 may be made of ceramics, and in that case, an electrode is provided therein to function as a lower electrode.
  • the mounting table 2 is provided with a plurality of wafer support pins (not shown) for supporting and lifting the wafer W so that the wafer W can be projected and retracted from the surface of the mounting table 2.
  • a circular hole is formed in the ceiling wall 1b of the chamber 1, and a disc-shaped shower head 20 functioning as an upper electrode is fitted into the hole through a ring-shaped insulating member 15.
  • the shower head 20 has a base member 21 and a shower plate 22.
  • a gas diffusion space 23 is formed between the base member 21 and the shower plate 22.
  • the shower plate 22 has a plurality of gas discharge holes 24 penetrating from the gas diffusion space 23 to the inside of the chamber 1.
  • a gas introduction hole 25 is formed in the center of the base member 11 so as to penetrate into the gas diffusion space 23.
  • the pipe 31 of the gas supply mechanism 30 is connected to the gas introduction hole 25, and the gas from the gas supply mechanism 30 is discharged into the chamber 1 via the shower head 20.
  • the gas supply mechanism 30 is for supplying into the chamber 1 SiF 4 gas which is a gas containing Si and F, N 2 gas which is a nitrogen-containing gas, plasma generating gas and Ar gas which functions as a purge gas. It has a plurality of gas supply sources for supplying each gas, a pipe connecting the supply source for each gas and the pipe 31, a valve provided in the pipe, a flow rate controller, and the like.
  • a first high frequency power source 42 is connected to the shower head 20 via a first matching unit 41, and a second high frequency power source 44 is connected to the shower head 20 via a second matching unit 43.
  • the frequency (first frequency) of the first high frequency power supply 42 is preferably a high frequency in the VHF band, and more preferably 60 MHz or higher.
  • the frequency (second frequency) of the second high-frequency power source 44 is a high frequency in the HF band, which is lower than that of the first high-frequency power source 42, and is preferably 2 to 13 MHz.
  • the first matching unit 41 matches the load impedance to the internal (or output) impedance of the first high frequency power supply 42.
  • the second matching unit 43 matches the load impedance to the internal (or output) impedance of the second high frequency power supply 44.
  • the first high-frequency power supply 42 may be the only high-frequency power supply 42 as long as it can secure sufficient output.
  • the film forming apparatus 100 has a control unit 50.
  • the control unit 50 is composed of a computer and has a main control unit having a CPU that controls each component of the film forming apparatus 100.
  • the control unit 50 also has an input device, an output device, a display device, and a storage device (storage medium).
  • Each component to be controlled is, for example, a heater power supply, an exhaust mechanism 12, a gas supply mechanism 30, first and second high frequency power supplies 42 and 43, and the like.
  • the main control unit of the control unit 50 causes the film forming apparatus 100 to perform a predetermined operation, for example, based on the processing recipe stored in the storage medium of the storage device.
  • the wafer W is loaded into the chamber 1 through the loading / unloading port 13, and the wafer W is mounted on the mounting table 2.
  • the mounting table 2 is previously controlled to a predetermined temperature by the heater 21.
  • the inside of the chamber 1 is controlled to a predetermined pressure.
  • high-frequency power is applied to the shower head 20 from the first high-frequency power supply 42 and the second high-frequency power supply 44 while introducing SiF 4 gas and N 2 gas (Ar gas, if necessary) from the gas supply mechanism 30.
  • SiF 4 gas and N 2 gas Ar gas, if necessary
  • capacitively coupled plasma is generated between the mounting table 2 as the lower electrode and the shower head 20 as the upper electrode, and a nitride film containing F (SiNF film) is formed by plasma CVD or plasma ALD.
  • capacitively coupled plasma is generated while simultaneously supplying SiF 4 gas and N 2 gas (Ar gas, if necessary) into the chamber to form a SiNF film on the substrate.
  • capacitively coupled plasma is generated at a predetermined timing while alternately supplying SiF 4 gas, purge of residual gas, supply of N 2 gas, and purge of residual gas to the chamber 1. , Forming a SiNF film on the substrate.
  • the wafer temperature is preferably in the range of 300 to 650 ° C.
  • the pressure in the chamber 1 is preferably in the range of 13.3 to 1333 Pa (0.1 to 10 Torr).
  • the inside of the chamber 1 is purged, and the substrate W is unloaded into the transfer chamber via the loading / unloading port 13.
  • FIG. 3 is a flowchart showing a method of manufacturing a 3D NAND type semiconductor memory as a method of manufacturing a semiconductor device
  • FIGS. 4 to 8 are process cross-sectional views showing the respective steps in that case.
  • an oxide film (SiO 2 film) 102 and a nitride film (SiNF film) 103 containing F, which is a sacrificial film, are formed on a wafer 101, which is a substrate and has a lower structure formed on a silicon substrate. Are alternately formed a plurality of times to form the ONON laminated structure 110 (step 11, FIG. 4).
  • the SiNF film 103 is a sacrificial film.
  • the SiNF film 103 is formed by plasma CVD or plasma ALD using a Si source gas containing Si and F such as SiF 4 gas and a nitrogen-containing gas such as N 2 gas.
  • the SiO 2 film 102 is formed by CVD using tetraethoxysilane (TEOS), SiH 4, or the like.
  • plasma etching is performed in the stacking direction of the ONON stacked structure 110 to form the memory hole 104 that penetrates the ONON stacked structure 110 (step 12, FIG. 5).
  • the core insulating film 113 is embedded in the central portion to form the memory portion 120 (step 13, FIG. 6).
  • a trench is formed in the stacking direction of the ONON stacked structure 110 (not shown), and the SiNF film 103, which is a sacrificial film, is removed by wet etching through the trench (step 14, FIG. 7).
  • Hot chemical phosphoric acid (H 3 PO 4 ) can be used as a chemical solution for wet etching.
  • the metal film 115 to be the gate electrode is embedded in the space 114 formed by removing the SiNF film (step 15, FIG. 8).
  • Tungsten (W) or the like is used as the metal forming the metal film.
  • a film containing a gas containing Si and F such as SiF 4 gas is used to contain F.
  • the formed SiNF film 103 is used.
  • the SiNF film 103 has a remarkably higher etching rate than a nitride film (SiN film) containing no F. Therefore, even if the ONON laminated structure 110 is highly laminated, the etching rate when forming the memory hole 104 can be increased as compared with the conventional case. Therefore, the etching time of the memory hole 104 can be shortened, and the decrease in productivity can be suppressed.
  • a gas containing H such as SiH 4 gas has been conventionally used when forming a nitride film, H contained in these is contained in the nitride film.
  • a gas containing Si and F such as SiF 4 is used, so that the amount of H contained in the film can be reduced as compared with the conventional case, and a transistor by H diffusion is used. Can be suppressed. Further, by using only the N 2 gas as the nitrogen-containing gas, the amount of H in the nitride film can be further reduced and the adverse effect of H can be suppressed more effectively.
  • the SiNF film containing F has a higher wet etching rate than the SiN film not containing F (Shizuo Fujita, Recent Research on Silicon Nitride Film, Applied Physics 1985, Vol. 54, No. 12).
  • FIG. 9 describes that the inclusion of F in the SiN film increases the wet etching rate for dilute hydrofluoric acid by almost two orders of magnitude, and also indicates that the wet etching rate for H 3 PO 4 also increases. Therefore, the time of the wet etching process of step 14 can be shortened.
  • the above example shows the case where the entire nitride film of the ONON laminated structure 110 is formed of the SiNF film containing F, only a part of the nitride film of the ONON laminated structure 110 may be the SiNF film.
  • the SiNF film As a suitable example, one in which only the nitride film existing under the ONON laminated structure 110 is the SiNF film can be mentioned. That is, when the memory hole is processed by plasma etching, the number of ions and radicals in the lower portion of the memory hole is much smaller than that in the upper portion, so that the etching rate of the lower portion is significantly reduced. Therefore, as shown in FIG.
  • the SiNF film 103 is applied only to the nitride film corresponding to the lower portion of the memory hole where the etching rate is lowered, for example, the nitride film in the portion where the dummy and the select gate are formed, and another nitride film is used.
  • the SiN film 103 ' may be used.
  • the number of SiNF films 103 is preferably about 3 to 10.
  • the present invention is not limited to this, and any nitride film of the laminated structure of an oxide film and a nitride film can be applied. .
  • the above film forming apparatus is merely an example, and is not particularly limited as long as it is a film forming apparatus using plasma.
  • the plasma generation method is also arbitrary, and not limited to a single-wafer type apparatus, a batch type apparatus or a semi-batch type apparatus that processes a plurality of substrates at once may be used.
  • control unit 100; film forming apparatus, 101; wafer (substrate), 102; oxide film (SiO 2 film), 103; nitride film (SiNF film) containing F, 103 ′; nitride film (SiN film), 104; memory hole, 110; ONON laminated structure, 114; SiNF film Formed by removing the film, 115; metal film, W; wafer (substrate)

Abstract

The present invention includes: a step for preparing a substrate that is a substrate for alternately laminating an oxide film and a nitride film to form a laminated structure, the substrate having a nitride film forming surface on the surface; and a step for supplying to the substrate a silicon raw material gas that contains silicon and fluorine, and a nitrogen-containing gas, and also generating plasma, and forming a nitride film that contains fluorine on the nitride film forming surface of the substrate.

Description

窒化膜の成膜方法および半導体装置の製造方法Nitride film forming method and semiconductor device manufacturing method
 本開示は、窒化膜の成膜方法および半導体装置の製造方法に関する。 The present disclosure relates to a method for forming a nitride film and a method for manufacturing a semiconductor device.
 例えば、3DNAND型不揮発性半導体記憶装置(以下、3DNAND型半導体メモリという)の製造過程においては、酸化膜(SiO膜)と窒化膜(SiN膜)を交互に多層積層した積層構造体を形成し、積層方向にメモリホールを形成する。次いで、メモリホール内にゲート絶縁膜およびチャネル部を形成した後、積層膜の積層方向にトレンチを形成し、そのトレンチを介してSiN膜をウエットエッチングにより除去する。次いで、SiN膜を除去した後のスペースにメタル膜を埋め込む(例えば特許文献1)。 For example, in the process of manufacturing a 3D NAND type nonvolatile semiconductor memory device (hereinafter, referred to as 3D NAND type semiconductor memory), a laminated structure in which an oxide film (SiO 2 film) and a nitride film (SiN film) are alternately laminated is formed. , Forming memory holes in the stacking direction. Then, after forming the gate insulating film and the channel portion in the memory hole, a trench is formed in the stacking direction of the stacked film, and the SiN film is removed by wet etching through the trench. Next, a metal film is embedded in the space after removing the SiN film (for example, Patent Document 1).
 従来、3DNAND型半導体メモリの製造過程で用いる積層構造体のプロセスは高速成膜が必要であることから、窒化膜の成膜には、高速成膜可能なプラズマCVDが用いられている。プラズマCVDによりSiN膜を成膜する際には、例えば特許文献2に記載されているように、シラン(SiH)ガスのようなシラン系化合物ガスと、アンモニア(NH)ガスのような窒素含有ガスが用いられる。 Conventionally, since high-speed film formation is required in the process of the laminated structure used in the manufacturing process of the 3D NAND type semiconductor memory, high-speed film-forming plasma CVD is used for forming the nitride film. When forming a SiN film by plasma CVD, for example, as described in Patent Document 2, a silane-based compound gas such as silane (SiH 4 ) gas and nitrogen such as ammonia (NH 3 ) gas are used. A containing gas is used.
特開2016-171280号公報JP, 2016-171280, A 特開2017-228708号公報JP, 2017-228708, A
 本開示は、酸化膜と窒化膜とを交互に積層した積層構造体に用いる窒化膜を成膜する際に、高積層化による積層構造体のエッチングレートの低下を抑制することができる窒化膜の成膜方法および半導体装置の製造方法を提供する。 The present disclosure provides a nitride film that can suppress a reduction in the etching rate of the laminated structure due to high lamination when forming a nitride film used for a laminated structure in which an oxide film and a nitride film are alternately laminated. Provided are a film forming method and a semiconductor device manufacturing method.
 本開示の一態様に係る窒化膜の成膜方法は、酸化膜と窒化膜とを交互に積層した積層構造体を形成するための基板であって、表面に窒化膜形成面を有する基板を準備することと、シリコンとフッ素とを含有するシリコン原料ガスと、窒素含有ガスとを基板に供給するとともに、プラズマを生成して、前記基板の前記窒化膜形成面に、フッ素を含む窒化膜を形成することと、を含む。 A nitride film forming method according to an aspect of the present disclosure prepares a substrate for forming a laminated structure in which an oxide film and a nitride film are alternately laminated, the substrate having a nitride film forming surface on the surface. And supplying a silicon source gas containing silicon and fluorine and a nitrogen-containing gas to the substrate and generating plasma to form a nitride film containing fluorine on the nitride film forming surface of the substrate. Including what to do.
 本開示によれば、酸化膜と窒化膜とを交互に積層した積層構造体に用いる窒化膜を成膜する際に、高積層化による積層構造体のエッチングレートの低下を抑制することができる窒化膜の成膜方法および半導体装置の製造方法が提供される。 According to the present disclosure, when a nitride film used for a laminated structure in which an oxide film and a nitride film are alternately laminated is formed, it is possible to suppress a decrease in etching rate of the laminated structure due to high lamination. A method for forming a film and a method for manufacturing a semiconductor device are provided.
一実施形態に係る窒化膜の成膜方法を示すフローチャートである。6 is a flowchart showing a method for forming a nitride film according to one embodiment. 一実施形態に係る窒化膜の成膜方法に用いることができる成膜装置の一例を概略的に示す断面図である。FIG. 3 is a cross-sectional view schematically showing an example of a film forming apparatus that can be used in the method for forming a nitride film according to one embodiment. 一実施形態に係る窒化膜の成膜方法が適用される半導体装置の製造方法としての3DNAND型半導体メモリの製造方法を示すフローチャートである。6 is a flowchart showing a method for manufacturing a 3D NAND type semiconductor memory as a method for manufacturing a semiconductor device to which the method for forming a nitride film according to one embodiment is applied. 図3に示す3DNAND型半導体メモリの製造方法のステップ1を示す工程断面図である。FIG. 4 is a process cross-sectional view showing step 1 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG. 3. 図3に示す3DNAND型半導体メモリの製造方法のステップ2を示す工程断面図である。FIG. 6 is a process cross-sectional view showing step 2 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG. 3. 図3に示す3DNAND型半導体メモリの製造方法のステップ3を示す工程断面図である。FIG. 4 is a process cross-sectional view showing step 3 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG. 3. 図3に示す3DNAND型半導体メモリの製造方法のステップ4を示す工程断面図である。FIG. 6 is a process cross-sectional view showing step 4 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG. 3. 図3に示す3DNAND型半導体メモリの製造方法のステップ5を示す工程断面図である。FIG. 6 is a process cross-sectional view showing step 5 of the method for manufacturing the 3D NAND type semiconductor memory shown in FIG. 3. ONON積層構造体の他の例を示す断面図である。It is sectional drawing which shows the other example of an ONON laminated structure.
 以下、添付図面を参照して実施形態について説明する。 Embodiments will be described below with reference to the accompanying drawings.
 <経緯および概要>
 最初に、本開示の実施形態に係る窒化膜の成膜方法の経緯および概要について説明する。
 例えば、3DNAND型半導体メモリの製造過程においては、酸化膜(SiO膜)と窒化膜(SiN膜)とを交互に多層積層した積層構造体(以下ONON積層構造体という)を形成する。
<Background and overview>
First, the background and outline of the method for forming a nitride film according to the embodiment of the present disclosure will be described.
For example, in the process of manufacturing a 3D NAND type semiconductor memory, a laminated structure (hereinafter referred to as an ONON laminated structure) in which an oxide film (SiO 2 film) and a nitride film (SiN film) are alternately laminated is formed.
 ONON積層構造体を形成するプロセスには高速化が要求されるため、従来、窒化膜の成膜には高速成膜可能なプラズマCVDが用いられている。プラズマCVDにより窒化膜を成膜するには、上述した特許文献2に示すように、SiHガスのようなシラン系化合物ガスと、NHガスのような窒素含有ガスを用いている。 Since high speed is required for the process of forming the ONON laminated structure, conventionally, plasma CVD capable of high speed film formation has been used for forming the nitride film. To form a nitride film by plasma CVD, a silane-based compound gas such as SiH 4 gas and a nitrogen-containing gas such as NH 3 gas are used, as shown in Patent Document 2 described above.
 ところで、3DNAND型半導体メモリでは、高記憶密度化のため、ONON積層構造体の高積層化が進んでいる。つまり、ONON積層構造体を高集積化することで、単位面積当たりのトランジスタ数を増加させている。しかし、高積層化が進むと、ONON積層構造体の積層方向にエッチングしてメモリホールを形成する際に、特に下部のエッチングレートが低下してしまい、エッチング時間が増加して、生産性が低下してしまう。 By the way, in the 3D NAND type semiconductor memory, the ONON laminated structure is being highly laminated in order to increase the memory density. That is, the number of transistors per unit area is increased by highly integrating the ONON laminated structure. However, as the number of stacked layers increases, the etching rate especially in the lower part lowers when the memory holes are formed by etching in the stacking direction of the ONON stacked structure, which increases the etching time and lowers the productivity. Resulting in.
 そこで、一態様においては、ONON積層構造体のような酸化膜と窒化膜とを交互に積層した積層構造体を構成する窒化膜を成膜するにあたり、テトラフルオロシラン(SiF)のような、シリコン(Si)とフッ素(F)を含有するシリコン原料(Si原料)ガスを用いる。すなわち、SiとFとを含有するSi原料ガスと、窒素含有ガスとを供給し、プラズマを生成して、基板の窒化膜形成面に、Fを含む窒化膜を成膜する。このときの成膜は、プラズマCVDでもプラズマALDでもよい。 Therefore, in one aspect, in forming a nitride film forming a laminated structure in which an oxide film and a nitride film are alternately laminated such as an ONON laminated structure, a film such as tetrafluorosilane (SiF 4 ) is used. A silicon raw material (Si raw material) gas containing silicon (Si) and fluorine (F) is used. That is, a Si source gas containing Si and F and a nitrogen-containing gas are supplied to generate plasma to form a nitride film containing F on the surface of the substrate on which the nitride film is formed. The film formation at this time may be plasma CVD or plasma ALD.
 すなわち、成膜過程で、完全に分解されなかったSiF等が窒化膜中に添加され、膜中にFが含有される。Fは窒化膜中に含まれることにより膜のエッチングレートを大きく上昇させる効果があるため、Fが含有された窒化膜(SiNF膜)は、Fが含有されていない窒化膜(SiN膜)に比べてエッチングレートが格段に大きい。このため、積層構造体のエッチングレートを高めることができる。 That is, SiF 4 or the like that has not been completely decomposed is added to the nitride film during the film formation process, and F is contained in the film. Since F is contained in the nitride film, it has an effect of significantly increasing the etching rate of the film. Therefore, the nitride film containing F (SiNF film) is more effective than the nitride film containing no F (SiN film). And the etching rate is much higher. Therefore, the etching rate of the laminated structure can be increased.
 また、従来の窒化膜の成膜においては、成膜原料として用いられるSiHガス等に含まれる水素(H)が成膜過程で窒化膜中に含まれるため、窒化膜からのH拡散が問題となる。つまり、窒化膜中のHは、熱工程中にトランジスタのゲート絶縁膜界面に拡散して、トランジスタの信頼性を劣化させ、しきい値のばらつきを増大させるおそれがある。 Further, in the conventional film formation of a nitride film, hydrogen (H) contained in SiH 4 gas or the like used as a film forming material is contained in the nitride film during the film formation process, so that H diffusion from the nitride film is a problem. Becomes That is, H in the nitride film may diffuse to the interface of the gate insulating film of the transistor during the heat treatment, deteriorate the reliability of the transistor, and increase the variation in the threshold value.
 このような点に対して、一実施形態では、SiHガス等のHを含むガスの代わりに、SiFのようなSiとFを含有するガスを用いることにより、窒化膜中に含まれるH量を低減させることができる。これにより、H拡散によるトランジスタへの悪影響を抑制することができる。 In view of such a point, in one embodiment, by using a gas containing Si and F such as SiF 4 instead of the gas containing H such as SiH 4 gas, the H contained in the nitride film is reduced. The amount can be reduced. As a result, the adverse effect on the transistor due to the H diffusion can be suppressed.
 <窒化膜の成膜方法>
 次に、窒化膜の成膜方法の具体的な実施形態について説明する。図1は一実施形態に係る窒化膜の成膜方法を示すフローチャートである。
<Nitride film forming method>
Next, a specific embodiment of the method for forming a nitride film will be described. FIG. 1 is a flowchart showing a method for forming a nitride film according to one embodiment.
 最初に、例えば、3DNAND型半導体メモリの製造過程で用いられるONON積層構造体のような酸化膜と窒化膜とを交互に積層した積層構造体を形成するための基板であって、表面に窒化膜形成面を有する基板を準備する(ステップ1)。 First, for example, a substrate for forming a laminated structure in which an oxide film and a nitride film are alternately laminated, such as an ONON laminated structure used in a manufacturing process of a 3D NAND type semiconductor memory, and a nitride film is formed on a surface of the substrate. A substrate having a formation surface is prepared (step 1).
 基板は、例えば、シリコンに代表される半導体基体上に所定の構造が形成された半導体ウエハ(以下、単にウエハと記す)であり、積層構造体の形成前のものであっても、積層構造体の形成途中のものであってもよい。このような基板を成膜装置のチャンバー内に設ける。 The substrate is, for example, a semiconductor wafer (hereinafter simply referred to as a wafer) in which a predetermined structure is formed on a semiconductor substrate typified by silicon. Even if the laminated structure is not yet formed, the laminated structure It may be in the process of being formed. Such a substrate is provided in the chamber of the film forming apparatus.
 次に、SiとFとを含有するSi原料ガスと、窒素含有ガスとを基板に供給するとともに、プラズマを生成して、基板の窒化膜形成面に、Fを含む窒化膜を成膜する(ステップ2)。 Next, a Si source gas containing Si and F and a nitrogen-containing gas are supplied to the substrate, and plasma is generated to form a nitride film containing F on the nitride film formation surface of the substrate ( Step 2).
 具体的には、SiとFとを含有するSi原料ガスと、窒素含有ガスとを、基板が配置されたチャンバー内に供給し、チャンバー内に所定のタイミングでプラズマを生成する。 Specifically, a Si source gas containing Si and F and a nitrogen-containing gas are supplied into the chamber in which the substrate is placed, and plasma is generated in the chamber at a predetermined timing.
 このようなプラズマを用いた成膜処理として、Si原料ガスと窒素含有ガスを、基板が配置されたチャンバー内に同時に導入し、プラズマを生成して成膜するプラズマCVDを用いることができる。プラズマCVDの場合は、Si原料ガスと窒素含有ガスをプラズマにより解離して、基板の表面でCVD反応を生じさせる。 As such a film forming process using plasma, plasma CVD in which a Si source gas and a nitrogen-containing gas are simultaneously introduced into a chamber in which a substrate is placed and plasma is generated to form a film can be used. In the case of plasma CVD, the Si source gas and the nitrogen-containing gas are dissociated by plasma to cause a CVD reaction on the surface of the substrate.
 また、プラズマを用いた成膜処理として、Si原料ガスおよび窒素含有ガスを、チャンバー内の残留ガスのパージを挟んで交互にチャンバー内に導入し、所定のタイミングでプラズマを生成して成膜するプラズマALDを用いることもできる。 Further, as a film forming process using plasma, a Si source gas and a nitrogen-containing gas are alternately introduced into the chamber with a purge of residual gas in the chamber sandwiched therebetween, and plasma is generated at a predetermined timing to form a film. Plasma ALD can also be used.
 プラズマを用いることにより、高速成膜を行うことができ、高速成膜が要求されるONON積層構造体の窒化膜の成膜に適したものとなる。 By using plasma, high-speed film formation can be performed, which is suitable for forming a nitride film of an ONON laminated structure that requires high-speed film formation.
 SiとFとを含有するSi原料ガスとしては、SiFガスに代表されるフルオロシラン系ガスを挙げることができる。フルオロシラン系ガスとしては、他にジフルオロシラン(SiF)ガスや、ヘキサフルオロジシラン(Si)ガス等を挙げることができる。Si原料ガスとしては、フルオロシラン系ガスの他に、SiHガス、テトラクロロシラン(SiCl)ガス、ジシラン(Si)ガス、ジクロロシラン(SiHCl)ガス、ヘキサクロロジシラン(SiCl)ガス等のFを含まないシリコン系(Si系)化合物ガスを含んでいてもよい。また、SiとFとを含有するSi原料ガスは、SiHガスのようなFを含まないSi系化合物ガスと、FガスのようなF含有ガスとの混合ガスであってもよい。窒素含有ガスとしては、Nガス、NHガス等を用いることができる。なお、Si原料ガスと窒素含有ガスの他に、プラズマ生成ガスやパージガス等として用いるArガス等の不活性ガス(希ガス)を用いてもよい。 As the Si source gas containing Si and F, a fluorosilane-based gas typified by SiF 4 gas can be mentioned. Other examples of fluorosilane-based gas include difluorosilane (SiF 2 ) gas and hexafluorodisilane (Si 2 F 6 ) gas. As the Si raw material gas, in addition to fluorosilane-based gas, SiH 4 gas, tetrachlorosilane (SiCl 4 ) gas, disilane (Si 2 H 6 ) gas, dichlorosilane (SiH 2 Cl 2 ) gas, hexachlorodisilane (Si 2 A silicon-based (Si-based) compound gas that does not contain F, such as Cl 6 ) gas, may be included. Further, the Si source gas containing Si and F may be a mixed gas of a Si-based compound gas containing no F such as SiH 4 gas and an F-containing gas such as F 2 gas. As the nitrogen-containing gas, N 2 gas, NH 3 gas or the like can be used. In addition to the Si source gas and the nitrogen-containing gas, an inert gas (rare gas) such as Ar gas used as a plasma generation gas or a purge gas may be used.
 このように、Si原料ガスとして、SiとFとを含有するガスを用いることにより、成膜過程で完全に分解されなかったSiF等が窒化膜中に添加され、窒化膜がFを含むものとなる。Fは窒化膜中に含まれることにより膜のエッチングレートを大きく上昇させる効果があるため、窒化膜中にFが含有された窒化膜(SiNF膜)は、Fが含有されていない窒化膜(SiN膜)に比べてエッチングレートが格段に大きい。例えば、20at%のFが含有されたSiNF膜は、エッチングレートがSiN膜の2倍以上となる。 As described above, by using a gas containing Si and F as the Si source gas, SiF 4 or the like that has not been completely decomposed in the film formation process is added to the nitride film, and the nitride film contains F. Becomes Since F has the effect of greatly increasing the etching rate of the film when it is contained in the nitride film, the nitride film (SiNF film) containing F in the nitride film is a nitride film containing no F (SiN film). The etching rate is much higher than that of film. For example, the SiNF film containing 20 at% F has an etching rate twice or more that of the SiN film.
 Fの含有量が多すぎるとF拡散により、積層構造体の酸化膜やバルクの酸化膜への悪影響が懸念され、また膜ストレスが大きくなるため、Fの含有量は30at%以下が好ましい。Si原料ガスの流量(またはSi原料ガス中のフルオロシラン系ガスの流量)を調整することにより、窒化膜(SiNF膜)中のF含有量を所望の値に調整することができる。 If the content of F is too large, the diffusion of F may adversely affect the oxide film of the laminated structure or the oxide film of the bulk, and the film stress may increase. Therefore, the content of F is preferably 30 at% or less. The F content in the nitride film (SiNF film) can be adjusted to a desired value by adjusting the flow rate of the Si raw material gas (or the flow rate of the fluorosilane-based gas in the Si raw material gas).
 このようなFの悪影響の抑制や、膜のストレス制御のため、上述したSiHガス、SiClガス等のFを含まないSi系化合物ガスを添加して、窒化膜(SiNF膜)中のF含有量の調整を行うことができる。 In order to suppress the adverse effect of F and to control the stress of the film, the Si-based compound gas containing no F such as SiH 4 gas and SiCl 4 gas described above is added to add F in the nitride film (SiNF film). The content can be adjusted.
 また、Si原料ガスとして、SiFガスのようなフルオロシラン系ガスを用いることにより、従来Si原料として用いていたSiHガス等のH含有ガスの量を減少させることができ、窒化膜中のH量を減少させることができる。これにより、窒化膜中からトランジスタのゲート絶縁膜界面へのH拡散を抑制することができる。 Further, by using a fluorosilane-based gas such as SiF 4 gas as the Si raw material gas, the amount of H-containing gas such as SiH 4 gas that has been conventionally used as the Si raw material can be reduced, and the nitride film in the nitride film can be reduced. The amount of H can be reduced. Thus, H diffusion from the nitride film to the interface of the gate insulating film of the transistor can be suppressed.
 窒素含有ガスとしては、窒素ガス(Nガス)、NHガス等を用いることができるが、Nガスが好ましい。NガスはHを含んでいないので、窒化膜中のH量の減少に寄与する。また、窒素含有ガスとして、NガスとNHガス等の他のガスを併用してもよいが、Nガスのみとすることが好ましい。これにより、窒素含有ガス由来のHをなくすことができ、窒化膜中のH量をより減少させて、Hの悪影響を一層効果的に抑制することができる。 As the nitrogen-containing gas, nitrogen gas (N 2 gas), NH 3 gas or the like can be used, but N 2 gas is preferable. Since the N 2 gas does not contain H, it contributes to the reduction of the amount of H in the nitride film. Further, as the nitrogen-containing gas, other gas such as N 2 gas and NH 3 gas may be used together, but it is preferable to use only N 2 gas. As a result, H derived from the nitrogen-containing gas can be eliminated, the amount of H in the nitride film can be further reduced, and the adverse effect of H can be suppressed more effectively.
 プラズマを生成する手法は特に限定されず、容量結合プラズマ、誘導結合プラズマ、マイクロ波プラズマ等、一般的に用いられているものを用いることができる。プラズマの応答性の観点からは容量結合プラズマが好ましい。ただし、SiFやNは結合エネルギーが高く、分解させるためには高いプラズマエネルギーが必要となる。このため、容量結合プラズマを用いる場合には、プラズマエネルギーを高くするために、通常の13.56MHzよりも高い、VHF帯域の高周波が好ましく、60MHz以上の周波数を用いることがより好ましい。 The method of generating plasma is not particularly limited, and commonly used ones such as capacitively coupled plasma, inductively coupled plasma, and microwave plasma can be used. Capacitively coupled plasma is preferable from the viewpoint of plasma response. However, SiF 4 and N 2 have high binding energy, and high plasma energy is required for decomposition. Therefore, when capacitively coupled plasma is used, a high frequency in the VHF band, which is higher than the usual 13.56 MHz, is preferable in order to increase the plasma energy, and a frequency of 60 MHz or higher is more preferable.
 成膜処理の際の温度は、成膜反応を有効に進行させる観点およびデバイスの要請の観点から300~650℃の範囲が好ましい。また、処理の際のチャンバー内の圧力は、プラズマ生成手法によっても異なるが、13.3~1333Pa(0.1~10Torr)の範囲が好ましい。 The temperature during the film formation process is preferably in the range of 300 to 650 ° C. from the viewpoint of effectively advancing the film formation reaction and the demand of the device. Further, the pressure in the chamber at the time of treatment is preferably in the range of 13.3 to 1333 Pa (0.1 to 10 Torr), although it varies depending on the plasma generation method.
 <成膜装置>
 次に、上述した窒化膜の成膜方法に用いることができる成膜装置の一例について説明する。図2は成膜装置の一例を概略的に示す断面図であり、容量結合型プラズマを生成して、基板であるウエハに成膜処理を行う成膜装置を例示する。
<Film forming device>
Next, an example of a film forming apparatus that can be used in the above-described method for forming a nitride film will be described. FIG. 2 is a cross-sectional view schematically showing an example of a film forming apparatus, and illustrates a film forming apparatus that generates capacitively coupled plasma and performs a film forming process on a wafer that is a substrate.
 この成膜装置100は、略円筒状をなす金属製のチャンバー1を有している。チャンバー1は、その底部中央に突出部1aを有している。チャンバー1の側面には排気管11が接続されており、この排気管11には、チャンバー1内の圧力を制御するための自動圧力制御弁(APC)およびチャンバー1内を排気するための真空ポンプを有する排気機構12が設けられている。この排気機構12によりチャンバー1内を所定の真空度まで減圧することが可能となっている。 The film forming apparatus 100 has a metal chamber 1 having a substantially cylindrical shape. The chamber 1 has a protrusion 1a at the center of its bottom. An exhaust pipe 11 is connected to the side surface of the chamber 1, and an automatic pressure control valve (APC) for controlling the pressure inside the chamber 1 and a vacuum pump for exhausting the inside of the chamber 1 are connected to the exhaust pipe 11. The exhaust mechanism 12 having the above is provided. The exhaust mechanism 12 can reduce the pressure in the chamber 1 to a predetermined degree of vacuum.
 チャンバー1の側壁には、チャンバー1と隣接して設けられた図示しないウエハ搬送室との間でウエハWの搬入出を行うための搬入出口13と、この搬入出口13を開閉するゲートバルブ14とが設けられている。 On the side wall of the chamber 1, a loading / unloading port 13 for loading / unloading the wafer W to / from a wafer transfer chamber (not shown) provided adjacent to the chamber 1, and a gate valve 14 for opening / closing the loading / unloading port 13. Is provided.
 チャンバー1内には、ウエハWを水平に支持するための載置台2が設けられている。載置台2は、その下面中央で、チャンバー1の底部から垂直に延びる支持部材3に支持されている。載置台2は金属製であり、下部電極として機能する。載置台2は接地されている。載置台2の内部には、ウエハWを加熱するためのヒータ21が設けられている。なお、載置台2はセラミックス製でもよく、その場合は、その中に電極が設けられて下部電極として機能するようにされる。 A mounting table 2 for horizontally supporting the wafer W is provided in the chamber 1. The mounting table 2 is supported by a support member 3 extending vertically from the bottom of the chamber 1 at the center of the lower surface thereof. The mounting table 2 is made of metal and functions as a lower electrode. The mounting table 2 is grounded. A heater 21 for heating the wafer W is provided inside the mounting table 2. The mounting table 2 may be made of ceramics, and in that case, an electrode is provided therein to function as a lower electrode.
 載置台2にはウエハWを支持して昇降させるための複数のウエハ支持ピン(図示せず)が、載置台2の表面に対して突没可能に設けられている。 The mounting table 2 is provided with a plurality of wafer support pins (not shown) for supporting and lifting the wafer W so that the wafer W can be projected and retracted from the surface of the mounting table 2.
 チャンバー1の天壁1bには、円形の穴が形成されており、その穴には、リング状の絶縁部材15を介して、上部電極として機能する円板状をなすシャワーヘッド20が嵌め込まれている。シャワーヘッド20は、ベース部材21とシャワープレート22とを有している。ベース部材21とシャワープレート22との間にはガス拡散空間23が形成されている。シャワープレート22には、ガス拡散空間23からチャンバー1の内部へ貫通する複数のガス吐出孔24が形成されている。ベース部材11の中央には、ガス拡散空間23内へ貫通するように、ガス導入孔25が形成されている。ガス導入孔25には、ガス供給機構30の配管31が接続され、ガス供給機構30からのガスがシャワーヘッド20を介してチャンバー1内に吐出されるようになっている。 A circular hole is formed in the ceiling wall 1b of the chamber 1, and a disc-shaped shower head 20 functioning as an upper electrode is fitted into the hole through a ring-shaped insulating member 15. There is. The shower head 20 has a base member 21 and a shower plate 22. A gas diffusion space 23 is formed between the base member 21 and the shower plate 22. The shower plate 22 has a plurality of gas discharge holes 24 penetrating from the gas diffusion space 23 to the inside of the chamber 1. A gas introduction hole 25 is formed in the center of the base member 11 so as to penetrate into the gas diffusion space 23. The pipe 31 of the gas supply mechanism 30 is connected to the gas introduction hole 25, and the gas from the gas supply mechanism 30 is discharged into the chamber 1 via the shower head 20.
 ガス供給機構30は、SiとFとを含有するガスであるSiFガス、窒素含有ガスであるNガス、プラズマ生成ガスおよびパージガスとして機能するArガス等をチャンバー1内に供給するためのものであり、各ガスを供給する複数のガス供給源と、各ガスの供給源と配管31とを繋ぐ配管、配管に設けられたバルブ、流量制御器等を有している。 The gas supply mechanism 30 is for supplying into the chamber 1 SiF 4 gas which is a gas containing Si and F, N 2 gas which is a nitrogen-containing gas, plasma generating gas and Ar gas which functions as a purge gas. It has a plurality of gas supply sources for supplying each gas, a pipe connecting the supply source for each gas and the pipe 31, a valve provided in the pipe, a flow rate controller, and the like.
 シャワーヘッド20には、第1整合器41を介して第1高周波電源42が接続され、第2整合器43を介して第2高周波電源44が接続されている。第1高周波電源42の周波数(第1の周波数)は、VHF帯域の高周波であることが好ましく、60MHz以上がより好ましい。また、第2高周波電源44の周波数(第2の周波数)は、第1高周波電源42より低い周波数のHF帯域の高周波であり、2~13MHzが好ましい。第1整合器41は第1高周波電源42の内部(または出力)インピーダンスに負荷インピーダンスを整合させるものである。第2整合器43は、第2高周波電源44の内部(または出力)インピーダンスに負荷インピーダンスを整合させるものである。 A first high frequency power source 42 is connected to the shower head 20 via a first matching unit 41, and a second high frequency power source 44 is connected to the shower head 20 via a second matching unit 43. The frequency (first frequency) of the first high frequency power supply 42 is preferably a high frequency in the VHF band, and more preferably 60 MHz or higher. The frequency (second frequency) of the second high-frequency power source 44 is a high frequency in the HF band, which is lower than that of the first high-frequency power source 42, and is preferably 2 to 13 MHz. The first matching unit 41 matches the load impedance to the internal (or output) impedance of the first high frequency power supply 42. The second matching unit 43 matches the load impedance to the internal (or output) impedance of the second high frequency power supply 44.
 SiFガスのようなSiとFを含有するガスは、Si-Fの結合エネルギーが高いため、従来の13.56MHzでは解離され難い。このため、第1高周波電源42の周波数である第1の周波数として、従来の13.56MHzよりもプラズマエネルギーを高くすることができるVHF帯域の周波数を用いることが好ましい。また、第1の周波数よりも低い、HF帯域の周波数の第2高周波電源44を用いることにより、第1の周波数と第2の周波数を重畳させることができ、第1高周波電源42を小型化することができる。なお、第1高周波電源42として十分な出力のものを確保できれば、第1高周波電源42のみであってもよい。 A gas containing Si and F, such as SiF 4 gas, has a high Si—F bond energy, and is therefore unlikely to be dissociated at 13.56 MHz in the related art. Therefore, it is preferable to use, as the first frequency that is the frequency of the first high-frequency power supply 42, a frequency in the VHF band that can increase plasma energy higher than the conventional 13.56 MHz. Further, by using the second high frequency power source 44 having a frequency in the HF band lower than the first frequency, the first frequency and the second frequency can be superposed, and the first high frequency power source 42 can be miniaturized. be able to. The first high-frequency power supply 42 may be the only high-frequency power supply 42 as long as it can secure sufficient output.
 成膜装置100は、制御部50を有している。制御部50は、コンピュータからなり、成膜装置100の各構成部を制御するCPUを有する主制御部を有している。また、制御部50は、他に、入力装置、出力装置、表示装置、および記憶装置(記憶媒体)を有している。制御対象の各構成部は、例えば、ヒータ電源、排気機構12、ガス供給機構30、第1および第2の高周波電源42および43等である。制御部50の主制御部は、例えば、記憶装置の記憶媒体に記憶された処理レシピに基づいて、成膜装置100に、所定の動作を実行させる。 The film forming apparatus 100 has a control unit 50. The control unit 50 is composed of a computer and has a main control unit having a CPU that controls each component of the film forming apparatus 100. In addition, the control unit 50 also has an input device, an output device, a display device, and a storage device (storage medium). Each component to be controlled is, for example, a heater power supply, an exhaust mechanism 12, a gas supply mechanism 30, first and second high frequency power supplies 42 and 43, and the like. The main control unit of the control unit 50 causes the film forming apparatus 100 to perform a predetermined operation, for example, based on the processing recipe stored in the storage medium of the storage device.
 このように構成される成膜装置100においては、搬入出口13からチャンバー1内にウエハWを搬入し、載置台2上にウエハWを載置する。載置台2は予めヒータ21により所定の温度に制御されている。 In the film forming apparatus 100 configured as above, the wafer W is loaded into the chamber 1 through the loading / unloading port 13, and the wafer W is mounted on the mounting table 2. The mounting table 2 is previously controlled to a predetermined temperature by the heater 21.
 次いで、排気機構12より排気することにより、チャンバー1内を所定の圧力に制御する。そして、ガス供給機構30からSiFガス、およびNガス(必要に応じて、Arガス)を導入しつつ、第1高周波電源42および第2高周波電源44からシャワーヘッド20に高周波電力を印加する。これにより、下部電極である載置台2と上部電極であるシャワーヘッド20との間に容量結合プラズマが生成され、プラズマCVDまたはプラズマALDにより、Fを含む窒化膜(SiNF膜)を成膜する。 Then, by exhausting from the exhaust mechanism 12, the inside of the chamber 1 is controlled to a predetermined pressure. Then, high-frequency power is applied to the shower head 20 from the first high-frequency power supply 42 and the second high-frequency power supply 44 while introducing SiF 4 gas and N 2 gas (Ar gas, if necessary) from the gas supply mechanism 30. . As a result, capacitively coupled plasma is generated between the mounting table 2 as the lower electrode and the shower head 20 as the upper electrode, and a nitride film containing F (SiNF film) is formed by plasma CVD or plasma ALD.
 プラズマCVDの場合は、SiFガス、およびNガス(必要に応じて、Arガス)を同時にチャンバー内に供給しながら容量結合プラズマを生成し、基板上にSiNF膜を成膜する。 In the case of plasma CVD, capacitively coupled plasma is generated while simultaneously supplying SiF 4 gas and N 2 gas (Ar gas, if necessary) into the chamber to form a SiNF film on the substrate.
 プラズマALDの場合は、チャンバー1に対して、SiFガスの供給、残留ガスのパージ、Nガスの供給、残留ガスのパージを交互に繰り返し供給しながら所定のタイミングで容量結合プラズマを生成し、基板上にSiNF膜を成膜する。 In the case of plasma ALD, capacitively coupled plasma is generated at a predetermined timing while alternately supplying SiF 4 gas, purge of residual gas, supply of N 2 gas, and purge of residual gas to the chamber 1. , Forming a SiNF film on the substrate.
 成膜処理に際しては、ウエハ温度は300~650℃の範囲が好ましく、チャンバー1内の圧力は、13.3~1333Pa(0.1~10Torr)の範囲が好ましい。 In the film forming process, the wafer temperature is preferably in the range of 300 to 650 ° C., and the pressure in the chamber 1 is preferably in the range of 13.3 to 1333 Pa (0.1 to 10 Torr).
 成膜終了後、チャンバー1内をパージし、基板Wを、搬入出口13を介して搬送室は搬出する。 After the film formation is completed, the inside of the chamber 1 is purged, and the substrate W is unloaded into the transfer chamber via the loading / unloading port 13.
 <半導体装置の製造方法>
 次に、上述した窒化膜の成膜方法が適用される半導体装置の製造方法について、3DNAND型半導体メモリの製造方法を例にとって説明する。
 図3は半導体装置の製造方法としての3DNAND型半導体メモリの製造方法を示すフローチャート、図4~8はその際の各工程を示す工程断面図である。
<Method of manufacturing semiconductor device>
Next, a method of manufacturing a semiconductor device to which the above-described method of forming a nitride film is applied will be described by taking a method of manufacturing a 3D NAND type semiconductor memory as an example.
FIG. 3 is a flowchart showing a method of manufacturing a 3D NAND type semiconductor memory as a method of manufacturing a semiconductor device, and FIGS. 4 to 8 are process cross-sectional views showing the respective steps in that case.
 最初に、基板である、シリコン基体上に下部構造が形成されたウエハ101の上に、酸化膜(SiO膜)102と、犠牲膜であるFを含有させた窒化膜(SiNF膜)103とを交互に複数回成膜し、ONON積層構造体110を形成する(ステップ11、図4)。SiNF膜103は犠牲膜である。 First, an oxide film (SiO 2 film) 102 and a nitride film (SiNF film) 103 containing F, which is a sacrificial film, are formed on a wafer 101, which is a substrate and has a lower structure formed on a silicon substrate. Are alternately formed a plurality of times to form the ONON laminated structure 110 (step 11, FIG. 4). The SiNF film 103 is a sacrificial film.
 SiNF膜103は、上述したように、SiFガス等のSiとFとを含有するSi原料ガスと、Nガス等の窒素含有ガスとを用いて、プラズマCVDまたはプラズマALDにより成膜される。また、SiO膜102は、テトラエトキシシラン(TEOS)、SiH等を用いたCVDにより成膜される。 As described above, the SiNF film 103 is formed by plasma CVD or plasma ALD using a Si source gas containing Si and F such as SiF 4 gas and a nitrogen-containing gas such as N 2 gas. . Further, the SiO 2 film 102 is formed by CVD using tetraethoxysilane (TEOS), SiH 4, or the like.
 次に、ONON積層構造体110の積層方向に、プラズマエッチングを行い、ONON積層構造体110を貫通するメモリホール104を形成する(ステップ12、図5)。 Next, plasma etching is performed in the stacking direction of the ONON stacked structure 110 to form the memory hole 104 that penetrates the ONON stacked structure 110 (step 12, FIG. 5).
 次に、メモリホール104の内壁部にゲート絶縁膜111、チャネル部112を順に形成した後、中央部にコア絶縁膜113を埋め込んでメモリ部120を形成する(ステップ13、図6)。 Next, after forming the gate insulating film 111 and the channel portion 112 in order on the inner wall portion of the memory hole 104, the core insulating film 113 is embedded in the central portion to form the memory portion 120 (step 13, FIG. 6).
 次に、ONON積層構造体110の積層方向にトレンチを形成し(図示せず)、トレンチを介して犠牲膜であるSiNF膜103をウエットエッチングで除去する(ステップ14、図7)。ウエットエッチングの際の薬液としては、熱リン酸(HPO)を用いることができる。 Next, a trench is formed in the stacking direction of the ONON stacked structure 110 (not shown), and the SiNF film 103, which is a sacrificial film, is removed by wet etching through the trench (step 14, FIG. 7). Hot chemical phosphoric acid (H 3 PO 4 ) can be used as a chemical solution for wet etching.
 その後、SiNF膜を除去して形成された空間114にゲート電極となる金属膜115を埋め込む(ステップ15、図8)。金属膜を構成する金属としては、タングステン(W)等が用いられる。 After that, the metal film 115 to be the gate electrode is embedded in the space 114 formed by removing the SiNF film (step 15, FIG. 8). Tungsten (W) or the like is used as the metal forming the metal film.
 このような半導体装置の製造方法において、ONON積層構造体を構成する窒化膜として、上述したように、SiFガス等のSiとFとを含有するガスを用いて成膜することによりFが含有されたSiNF膜103を用いる。SiNF膜103は、Fを含有させていない窒化膜(SiN膜)に比べてエッチングレートが格段に大きい。このため、ONON積層構造体110が高積層化されても、メモリホール104を形成する際のエッチングレートを従来よりも高めることができる。このため、メモリホール104のエッチング時間を短縮することができ、生産性の低下を抑制することができる。 In such a method for manufacturing a semiconductor device, as a nitride film forming the ONON laminated structure, as described above, a film containing a gas containing Si and F such as SiF 4 gas is used to contain F. The formed SiNF film 103 is used. The SiNF film 103 has a remarkably higher etching rate than a nitride film (SiN film) containing no F. Therefore, even if the ONON laminated structure 110 is highly laminated, the etching rate when forming the memory hole 104 can be increased as compared with the conventional case. Therefore, the etching time of the memory hole 104 can be shortened, and the decrease in productivity can be suppressed.
 また、従来、窒化膜を成膜する際に、SiHガス等のHを含有するガスが用いられるため、これらに含まれるHが窒化膜中に含まれる。これに対して、SiNF膜103の成膜時には、SiFのようなSiとFを含有するガスを用いるので、膜中に含まれるH量を従来よりも減少させることができ、H拡散によるトランジスタへの悪影響を抑制することができる。また、窒素含有ガスをNガスのみとすることにより、窒化膜中のH量をより減少させて、Hの悪影響を一層効果的に抑制することができる。 Further, since a gas containing H such as SiH 4 gas has been conventionally used when forming a nitride film, H contained in these is contained in the nitride film. On the other hand, when the SiNF film 103 is formed, a gas containing Si and F such as SiF 4 is used, so that the amount of H contained in the film can be reduced as compared with the conventional case, and a transistor by H diffusion is used. Can be suppressed. Further, by using only the N 2 gas as the nitrogen-containing gas, the amount of H in the nitride film can be further reduced and the adverse effect of H can be suppressed more effectively.
 さらに、Fを含むSiNF膜は、Fを含まないSiN膜と比べてウエットエッチングレートが高いことが知られている(藤田静雄、シリコン窒化膜の最近の研究、応用物理 1985年54巻12号)。この文献のFig.9には、SiN膜にFを含有させることにより、希フッ酸に対するウエットエッチングレートが2桁近く上昇することが記載され、HPOに対するウエットエッチングレートも上昇することが示されている。したがって、ステップ14のウエットエッチング工程の時間を短縮することができる。 Furthermore, it is known that the SiNF film containing F has a higher wet etching rate than the SiN film not containing F (Shizuo Fujita, Recent Research on Silicon Nitride Film, Applied Physics 1985, Vol. 54, No. 12). . FIG. 9 describes that the inclusion of F in the SiN film increases the wet etching rate for dilute hydrofluoric acid by almost two orders of magnitude, and also indicates that the wet etching rate for H 3 PO 4 also increases. Therefore, the time of the wet etching process of step 14 can be shortened.
 以上の例は、ONON積層構造体110窒化膜の全てを、Fを含むSiNF膜で形成した場合について示したが、ONON積層構造体110の一部の窒化膜のみSiNF膜としてもよい。好適な例としては、ONON積層構造体110の下部に存在する窒化膜のみをSiNF膜とするものを挙げることができる。すなわち、メモリホールをプラズマエッチングにより加工する場合、イオンやラジカルが、メモリホールの下部において上部よりも圧倒的に少なくなるため、下部のエッチングレートが著しく低下する。このため、図9に示すように、エッチングレートが低下するメモリホール下部に対応する窒化膜、例えばダミーやセレクトゲートを形成する部分の窒化膜のみにSiNF膜103を適用し、他の窒化膜をSiN膜103´としてもよい。このとき、SiNF膜103の数は、3~10層程度が好ましい。 Although the above example shows the case where the entire nitride film of the ONON laminated structure 110 is formed of the SiNF film containing F, only a part of the nitride film of the ONON laminated structure 110 may be the SiNF film. As a suitable example, one in which only the nitride film existing under the ONON laminated structure 110 is the SiNF film can be mentioned. That is, when the memory hole is processed by plasma etching, the number of ions and radicals in the lower portion of the memory hole is much smaller than that in the upper portion, so that the etching rate of the lower portion is significantly reduced. Therefore, as shown in FIG. 9, the SiNF film 103 is applied only to the nitride film corresponding to the lower portion of the memory hole where the etching rate is lowered, for example, the nitride film in the portion where the dummy and the select gate are formed, and another nitride film is used. The SiN film 103 'may be used. At this time, the number of SiNF films 103 is preferably about 3 to 10.
 <他の適用>
 以上、実施形態について説明したが、今回開示された実施形態は、全ての点で例示であって制限的なものではないと考えられるべきである。上記の実施形態は、添付の特許請求の範囲およびその主旨を逸脱することなく、様々な形態で省略、置換、変更されてもよい。
<Other applications>
Although the embodiments have been described above, it should be considered that the embodiments disclosed this time are examples in all points and not restrictive. The above-described embodiments may be omitted, replaced, or modified in various forms without departing from the scope and spirit of the appended claims.
 例えば、上記実施形態では、3DNAND型半導体メモリのONON積層構造体の窒化膜の例を示したが、これに限らず、酸化膜と窒化膜の積層構造体の窒化膜であれば適用可能である。 For example, in the above embodiment, the example of the nitride film of the ONON laminated structure of the 3D NAND type semiconductor memory is shown, but the present invention is not limited to this, and any nitride film of the laminated structure of an oxide film and a nitride film can be applied. .
 また、上記成膜装置は例示に過ぎず、プラズマを用いた成膜装置であれば特に限定されない。例えば、プラズマ生成方式も任意であり、また、枚葉式の装置に限らず、複数の基板を一度に処理するバッチ式装置やセミバッチ式装置であってもよい。 The above film forming apparatus is merely an example, and is not particularly limited as long as it is a film forming apparatus using plasma. For example, the plasma generation method is also arbitrary, and not limited to a single-wafer type apparatus, a batch type apparatus or a semi-batch type apparatus that processes a plurality of substrates at once may be used.
 1;チャンバー、2;載置台、12;排気機構、20;シャワーヘッド、30;ガス供給機構、42,44;高周波電源、50;制御部、100;成膜装置、101;ウエハ(基板)、102;酸化膜(SiO膜)、103;Fを含有させた窒化膜(SiNF膜)、103´;窒化膜(SiN膜)、104;メモリホール、110;ONON積層構造体、114;SiNF膜を除去して形成された空間、115;金属膜、W;ウエハ(基板) 1; chamber, 2; mounting table, 12; exhaust mechanism, 20; shower head, 30; gas supply mechanism, 42, 44; high frequency power supply, 50; control unit, 100; film forming apparatus, 101; wafer (substrate), 102; oxide film (SiO 2 film), 103; nitride film (SiNF film) containing F, 103 ′; nitride film (SiN film), 104; memory hole, 110; ONON laminated structure, 114; SiNF film Formed by removing the film, 115; metal film, W; wafer (substrate)

Claims (16)

  1.  酸化膜と窒化膜とを交互に積層した積層構造体を形成するための基板であって、
     表面に窒化膜形成面を有する基板を準備することと、
     シリコンとフッ素とを含有するシリコン原料ガスと、窒素含有ガスとを基板に供給するとともに、プラズマを生成して、前記基板の前記窒化膜形成面に、フッ素を含む窒化膜を形成することと、
    を含む、窒化膜の成膜方法。
    A substrate for forming a laminated structure in which an oxide film and a nitride film are alternately laminated,
    Preparing a substrate having a surface on which a nitride film is formed,
    A silicon source gas containing silicon and fluorine, and a nitrogen-containing gas are supplied to the substrate, plasma is generated, and a nitride film containing fluorine is formed on the nitride film formation surface of the substrate,
    A method for forming a nitride film, comprising:
  2.  前記基板を準備することは、成膜装置のチャンバー内に前記基板を配置することであり、
     前記フッ素を含む窒化膜を形成することは、前記チャンバー内に前記シリコンとフッ素とを含有するシリコン原料ガスと、窒素含有ガスとを供給し、前記チャンバー内にプラズマを生成することにより実施される、請求項1に記載の窒化膜の成膜方法。
    Preparing the substrate is placing the substrate in a chamber of a film forming apparatus,
    Forming the nitride film containing fluorine is performed by supplying a silicon source gas containing the silicon and fluorine and a nitrogen-containing gas into the chamber and generating plasma in the chamber. The method for forming a nitride film according to claim 1.
  3.  前記フッ素を含む窒化膜を形成することは、前記チャンバー内に前記シリコンとフッ素とを含有するシリコン原料ガスと、窒素含有ガスとを同時に供給し、前記チャンバー内にプラズマを生成して、プラズマCVDにより前記基板の前記窒化膜形成面にフッ素を含む窒化膜を形成することである、請求項2に記載の窒化膜の成膜方法。 The formation of the fluorine-containing nitride film is performed by simultaneously supplying the silicon source gas containing silicon and fluorine and the nitrogen-containing gas into the chamber, generating plasma in the chamber, and performing plasma CVD. The method for forming a nitride film according to claim 2, wherein a nitride film containing fluorine is formed on the surface of the substrate on which the nitride film is formed by.
  4.  前記フッ素を含む窒化膜を形成することは、前記シリコンとフッ素とを含有するシリコン原料ガスおよび前記窒素含有ガスを、前記チャンバー内の残留ガスのパージを挟んで交互に前記チャンバー内に導入し、所定のタイミングでプラズマを生成して、プラズマALDにより前記基板の前記窒化膜形成面にフッ素を含む窒化膜を形成することである、請求項2に記載の窒化膜の成膜方法。 Forming the nitride film containing fluorine, the silicon raw material gas containing the silicon and fluorine and the nitrogen-containing gas, alternately introduced into the chamber with a purge of residual gas in the chamber sandwiched, The method for forming a nitride film according to claim 2, wherein plasma is generated at a predetermined timing to form a nitride film containing fluorine on the surface of the substrate on which the nitride film is formed by plasma ALD.
  5.  前記シリコンとフッ素とを含有するシリコン原料ガスは、フルオロシラン系ガスを含む、請求項1に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 1, wherein the silicon source gas containing silicon and fluorine contains a fluorosilane-based gas.
  6.  前記フルオロシラン系ガスは、テトラフルオロシラン(SiF)ガスである、請求項5に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 5, wherein the fluorosilane-based gas is a tetrafluorosilane (SiF 4 ) gas.
  7.  前記窒素含有ガスは、窒素ガスを含む、請求項1に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 1, wherein the nitrogen-containing gas contains nitrogen gas.
  8.  前記窒化膜のフッ素含有量が、30at%以下の範囲となるように、前記シリコン原料ガスの流量を調整する、請求項1に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 1, wherein the flow rate of the silicon source gas is adjusted so that the fluorine content of the nitride film is in the range of 30 at% or less.
  9.  前記シリコン原料ガスは、フッ素を含まないシリコン系化合物ガスを含む、請求項5に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 5, wherein the silicon source gas contains a silicon-based compound gas that does not contain fluorine.
  10.  前記フッ素を含まないシリコン系化合物ガスは、シランガスまたはテトラクロロシランガスを含む、請求項9に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 9, wherein the silicon compound gas containing no fluorine contains a silane gas or a tetrachlorosilane gas.
  11.  前記プラズマは、容量結合プラズマ、誘導結合プラズマ、またはマイクロ波プラズマである、請求項1に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 1, wherein the plasma is capacitively coupled plasma, inductively coupled plasma, or microwave plasma.
  12.  前記プラズマが前記容量結合プラズマの場合、VHF帯域の周波数の高周波電力を印加してプラズマを生成する、請求項11に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 11, wherein when the plasma is the capacitively coupled plasma, high frequency power having a frequency in the VHF band is applied to generate plasma.
  13.  前記高周波電力の周波数は、60MHz以上である、請求項12に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 12, wherein the frequency of the high-frequency power is 60 MHz or higher.
  14.  酸化膜と窒化膜との積層構造体は、3DNAND型不揮発性半導体記憶装置の製造過程で用いられるものである、請求項1に記載の窒化膜の成膜方法。 The method for forming a nitride film according to claim 1, wherein the laminated structure of an oxide film and a nitride film is used in a manufacturing process of a 3D NAND type nonvolatile semiconductor memory device.
  15.  基板上に酸化膜と窒化膜とを交互に積層し、積層構造体を形成することと、
     前記積層構造体の積層方向にプラズマエッチングを行い、前記積層構造体を貫通するメモリホールを形成することと、
     前記メモリホール内にメモリ部を形成することと、
     前記積層構造体の前記窒化膜をウエットエッチングで除去することと、
     前記窒化膜を除去した空間に金属膜を埋め込むことと、
    を有し、
     前記積層構造体の前記窒化膜の全部または一部が、
     シリコンとフッ素とを含有するシリコン原料ガスと、窒素含有ガスとを前記基板に供給するとともに、プラズマを生成して、前記基板の前記窒化膜形成面に成膜された、フッ素を含む窒化膜である、半導体装置の製造方法。
    Alternately laminating an oxide film and a nitride film on a substrate to form a laminated structure;
    Plasma etching in the stacking direction of the stacked structure to form a memory hole penetrating the stacked structure,
    Forming a memory portion in the memory hole;
    Removing the nitride film of the laminated structure by wet etching,
    Embedding a metal film in the space where the nitride film is removed,
    Have
    All or part of the nitride film of the laminated structure,
    A silicon source gas containing silicon and fluorine, and a nitrogen-containing gas are supplied to the substrate, plasma is generated, and a nitride film containing fluorine is formed on the nitride film formation surface of the substrate. A method for manufacturing a semiconductor device.
  16.  前記積層構造体の下部に存在する前記窒化膜が、前記フッ素を含む窒化膜である、請求項15に記載の半導体装置の製造方法。 16. The method for manufacturing a semiconductor device according to claim 15, wherein the nitride film existing under the stacked structure is a nitride film containing the fluorine.
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