WO2020063552A1

WO2020063552A1 - Method and apparatus for image filtering with adaptive multiplier coefficients, and terminal device

Info

Publication number: WO2020063552A1
Application number: PCT/CN2019/107390
Authority: WO
Inventors: Sriram Sethuraman; Nijil K
Original assignee: Huawei Technologies Co., Ltd.
Priority date: 2018-09-25
Filing date: 2019-09-24
Publication date: 2020-04-02

Abstract

Provided are a method and an apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients, and a terminal device. The method includes: determining values of the multiplier coefficients of the filter, where the multiplier coefficients comprises a central coefficient and remaining coefficients, and for each remaining coefficient, a binary representation of an absolute value of said remaining coefficient with a predefined number L of digits is constrained as including at most N "ones", N equals to 2 or 3; and filtering the set of samples of the image with the filter. With the method or apparatus for image filtering with a filter having adaptive multiplier coefficients, the multiplication complexity during the filtering operation is lowered and the filtering efficiency is thus improved.

Description

METHOD AND APPARATUS FOR IMAGE FILTERING WITH ADAPTIVE MULTIPLIER COEFFICIENTS, AND TERMINAL DEVICE

TECHNICAL FIELD

Embodiments of the present disclosure relate to the field of picture processing, for example video picture and/or still picture coding. A method and an apparatus for image filtering with a filter having adaptive multiplier coefficients, and a terminal device are provided.

BACKGROUND

Video coding (video encoding and decoding) is used in a wide range of digital video applications, for example broadcast digital TV, video transmission over internet and mobile networks, real-time conversational applications such as video chat, video conferencing, DVD and Blu-ray discs, video content acquisition and editing systems, and camcorders of security applications.

Since the development of the block-based hybrid video coding approach in the H. 261 standard in 990, new video coding techniques and tools have been developed and have formed the basis for new video coding standards. One of the goals of most of the video coding standards was to achieve a bitrate reduction compared to its predecessor without sacrificing picture quality. Further video coding standards comprise MPEG-1 video, MPEG-2 video, ITU-T H. 262/MPEG-2, ITU-T H. 263, ITU-T H. 264/MPEG-4, Part 10, Advanced Video Coding (AVC) , ITU-T H. 265, High Efficiency Video Coding (HEVC) , and extensions, e.g., scalability and/or three-dimensional (3D) extensions, of these standards.

A schematic block diagram illustrating an embodiment of a coding system 300 is given in FIG. 1, which will be described in more detail below.

FIG. 2 is a block diagram showing an example structure of a video encoder, in which the present disclosure can be implemented and which will be described in more detail below, as well.

In particular, the illustrated encoder 100 includes a “loop filter” 110, wherein the filtering operation according to the present disclosure can be applied. However, more generally, the filtering operation is applicable at other locations of the codec, for instance in an interpolation filter. Still more generally, the present disclosure applies not only to video but also to still picture coding.

FIG. 3 is a block diagram showing an example structure of a video decoder, in which the present disclosure can be implemented and which will also be described in more detail below. Specifically, the present disclosure is applicable, for instance, in the loop filter 210.

In the following, some background information about adaptive filtering will be summarized.

Adaptive loop filter refers to an in-loop filtering operation done to decoded and reconstructed samples within the coding loop of a video codec, wherein the filter shape and coefficient values are adaptively selected based on the knowledge of the source samples and the degraded reconstructed samples available on the encoding side. In order to minimize the overheads associated with the signaling of the adaptation, the luma and chroma components are partitioned into blocks of samples and a normative decoder-side degraded sample based classification of each block of samples is used to compute on the encoding side an appropriate set of filter coefficients across all the block of samples that share the same class. In the VVC test model, an adaptive loop filter (ALF) with block-based filter adaption is applied. For the luma component, one among 25 filters is selected for each 4x4 block of samples, based on the direction and activity of local gradients.

In the JEM, ALF filter parameters are signalled for the first CTU, i.e., after the slice header and before the SAO parameters of the first CTU. Up to 25 sets of luma filter coefficients could be signalled. To reduce bits overhead, filter coefficients of different classification can be merged. Also, the ALF coefficients of reference pictures are stored and allowed to be reused as ALF coefficients of a current picture. The current picture may choose to use ALF coefficients stored for the reference pictures, and bypass the ALF coefficients signalling. In this case, only an index to one of the reference pictures is signalled, and the stored ALF coefficients of the indicated reference picture are inherited for the current picture.

To support ALF temporal prediction, a candidate list of ALF filter sets is maintained. At the beginning of decoding a new sequence, the candidate list is empty. After decoding one picture, the corresponding set of filters may be added to the candidate list. Once the size of the candidate list reaches the maximum allowed value (i.e., 6 in current JEM) , a new set of filters overwrites the oldest set in decoding order, and that is, first-in-first-out (FIFO) rule is applied to update the candidate list. To avoid duplications, a set could only be added to the list when the corresponding picture doesn’ t use ALF temporal prediction. To support temporal scalability, there are multiple candidate lists of filter sets, and each candidate list is associated with a temporal layer. More specifically, each array assigned by temporal layer index (TempIdx) may compose filter sets of previously decoded pictures with equal to lower TempIdx. For example, the k-th array is assigned to be associated with TempIdx equal to k, and it only contains filter sets from pictures with TempIdx smaller than or equal to k. After coding a certain picture, the filter sets associated with the picture will be used to update those arrays associated with equal or higher TempIdx.

Temporal prediction of ALF coefficients is used for inter coded frames to minimize signalling overhead. For intra frames, temporal prediction is not available, and a set of 16 fixed filters is assigned to each class. To indicate the usage of the fixed filter, a flag for each class is signalled and if required, the index of the chosen fixed filter. Even when the fixed filter is selected for a given class, the coefficients of the adaptive filter f (k, l) can still be sent for this class in which case the coefficients of the filter which will be applied to the reconstructed image are sum of both sets of coefficients.

The filtering process of luma component can controlled at CU level. A flag is signalled to indicate whether ALF is applied to the luma component of a CU. For chroma component, whether ALF is applied or not is indicated at picture level only.

However, the existing ALF process is usually complex and time-consuming.

This background information is provided to reveal information believed by the applicant to be of possible relevance to the present disclosure. No admission is necessarily intended, nor should be construed, that any of the preceding information constitutes prior art against the present disclosure.

SUMMARY

In view of the above, in order to overcome the above problem, the present disclosure provides a method and an apparatus for image filtering with a filter having adaptive multiplier coefficients and a terminal device.

The foregoing and other objects are achieved by the subject matter of the independent claims. Further implementation forms are apparent from the dependent claims, the description and the figures.

According to a first aspect the present disclosure relates to a method for filtering a set of samples of an image using a filter with adaptive multiplier coefficients. The method includes determining values of the multiplier coefficients of the filter, where the multiplier coefficients include a central coefficient and remaining coefficients, and for each remaining coefficient, a binary representation of an absolute value of said remaining coefficient with a predefined number L of digits is constrained as including at most N “ones” , N equals to 2 or 3, and filtering the set of samples of the image with the filter.

The normative constraining of the maximum number of “ones” in the binary representation of the absolute value of a multiplier coefficient of a filter allows the multiplication to be implemented using just 3 shifts and 2 additions (for the case of constraint value of 3) or just 2 shifts and 1 additions (for the case of constraint value of 2) . When compared to an L-bit *9-bit multiply, this would require 2/3 less shifters and nearly 2/3 less adders. Except for the central coefficient, all other coefficients can reduce their multiplier complexity in hardware implementations. In software implementation, multiplications take multiple cycles of latency. This can be replaced with lower latency shifts and additions which help with better register allocation and re-use.

In a possible implementation form of the apparatus according to the first aspect as such, the remaining coefficients are divided into two sets according to distances between the remaining coefficients and the central coefficient, the binary representation of the absolute value of each remaining coefficient in one set includes a single “one” .

This above implementation further allows lowering of the multiplication complexity by using single shift for the set of multiplier coefficients which can be represented by a power of 2, and multiple times of shifting and addition for the multiplier coefficients whose binary representations are constrained to include at most N “ones” .

According to a second aspect the present disclosure relates to an apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients. The apparatus includes a determining module and a filtering module, where the determining module is configured to determine values of the multiplier coefficients of the filter, where the multiplier coefficients includes a central coefficient and remaining coefficients, and for each remaining coefficient, a binary representation of an absolute value of said remaining coefficient with a predefined number L of digits is constrained as including at most N “ones” , N equals to 2 or 3; and the filtering module is configured to filter the set of samples of the image with the filter.

The normative constraining of the maximum number of “ones” in the binary representation of the absolute value of a multiplier coefficient of a filter allows the multiplication to be implemented using just 3 shifts and 2 additions (for the case of constraint value of 3) or just 2 shifts and 1 add (for the case of constraint value of 2) . When compared to an L-bit *9-bit multiply, this would require 2/3 less shifters and nearly 2/3 less adders. Except for the central coefficient, all other coefficients can reduce their multiplier complexity in hardware implementations. In software implementation, multiplications take multiple cycles of latency. This can be replaced with lower latency shifts and additions which help with better register allocation and re-use.

In a possible implementation form of the apparatus according to the second aspect as such, the remaining coefficients are divided into two sets according to distances between the remaining coefficients and the central coefficient, the binary representation of the absolute value of each remaining coefficient in one set includes a single “one” .

According to a third aspect the present disclosure relates to an apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients. The apparatus includes a processing circuitry which is configured to: determine values of the multiplier coefficients of the filter, where the multiplier coefficients includes a central coefficient and remaining coefficients, and for each remaining coefficient, a binary representation of an absolute value of said remaining coefficient with a predefined number L of digits is constrained as including at most N “ones” , N equals to 2 or 3; and filter the set of samples of the image with the filter.

In a possible implementation form of the apparatus according to the third aspect as such, the remaining coefficients are divided into two sets according to distances between the remaining coefficients and the central coefficient, the binary representation of the absolute value of each remaining coefficient in one set includes a single “one” .

According to a fourth aspect the present disclosure relates to an apparatus for encoding a current set of samples of an image including a plurality of pixels. The apparatus includes an encoder with a decoder for reconstructing the current set, and the apparatus according to the second aspect or any possible embodiment of the second aspect for filtering the reconstructed set.

According to a fifth aspect the present disclosure relates to an apparatus for encoding a current set of samples of an image including a plurality of pixels. The apparatus includes an encoder with a decoder for reconstructing the current set, and the apparatus according to the third aspect or any possible embodiment of the third aspect for filtering the reconstructed set.

According to a sixth aspect the present disclosure relates to an apparatus for decoding a coded current set of samples of an image including a plurality of pixels. The apparatus includes a decoder for reconstructing the current set, and the apparatus according to the second aspect or any possible embodiment of the second aspect for filtering the reconstructed set.

According to a seventh aspect the present disclosure relates to an apparatus for decoding a coded current set of samples of an image including a plurality of pixels. The apparatus includes a decoder for reconstructing the current set, and the apparatus according to the third aspect or any possible embodiment of the third aspect for filtering the reconstructed set.

According to an eighth aspect the present disclosure relates to an apparatus for coding an image of a video sequence which includes a processor and a memory. The memory is storing instructions that cause the processor to perform the method according to the first aspect or any possible embodiment of the first aspect.

According to a ninth aspect, a computer-readable storage medium having stored thereon instructions that when executed cause one or more processors configured to filter a set of samples of an image using a filter with adaptive multiplier coefficients is proposed. The instructions cause the one or more processors to perform a method according to the first aspect or any possible embodiment of the first aspect.

According to a tenth aspect the present disclosure relates to a terminal device including an apparatus according to the fourth aspect and an apparatus according to the sixth aspect.

According to an eleventh aspect the present disclosure relates to a terminal device including an apparatus according to the fifth aspect and an apparatus according to the seventh aspect.

With the method or apparatus for image filtering with a filter having adaptive multiplier coefficients, the multiplication complexity during the filtering operation is lowered and the filtering efficiency is thus improved.

BRIEF DESCRIPTION OF DRAWINGS

The accompanying drawings are used to provide a further understanding of the present disclosure, constitute a part of the specification, and are used to explain the present disclosure together with the following specific embodiments, but should not be construed as limiting the present disclosure. In the drawings,

FIG. 1 is a block diagram showing an example of a video coding system configured to implement embodiments of the present disclosure;

FIG. 2 is a block diagram showing an example of a video encoder configured to implement embodiments of the present disclosure;

FIG. 3 is a block diagram showing an example structure of a video decoder configured to implement embodiments of the present disclosure;

FIG. 4 is a flowchart diagram illustrating exemplary operation of the encoder of FIG. 2 for decision for adaptive loop filter (ALF) ;

FIG. 5A, FIG. 5B and FIG. 5C are simplified block diagrams of ALF filter shapes in JEM, where FIG. 5A shows a filter shape of 5×5 diamond, FIG. 5B shows a filter shape of 7×7 diamond, and FIG. 5C shows a filter shape of 9×9 diamond;

FIG. 6 is a simplified block diagram of ALF filter shape in HM-6.0 and HM-7.0;

FIG. 7 is an illustrative diagram of an example array of filter coefficients;

FIG. 8 is an illustrative diagram of an example array of filter coefficients;

FIG. 9 is locations of ALF parameters in the bitstream;

FIG. 10 is a conceptual diagram showing an example coding unit (CU) level ALF on/off flag map;

FIG. 11 is a conceptual diagram showing another example CU level ALF on/off flag map;

FIG. 12 is a block diagram illustrating an example ALF module that may be included in a video encoder;

FIG. 13 shows that block artifact may be created when adjacent blocks are predicted from non-adjacent areas in the reference picture;

FIG. 14 shows an example of block artifact in one dimension;

FIG. 15 is a block diagram illustrating an example ALF module included in a video decoder;

FIG. 16 is a schematic flowchart of a method for image filtering with a filter having adaptive multiplier coefficients according to an embodiment of the present disclosure;

FIG. 17 is a structural view of an apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients according to an embodiment of the present disclosure;

FIG. 18 is a structural view of an apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients according to an embodiment of the present disclosure; and

FIG. 19 is a structural view of an apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients according to an embodiment of the present disclosure.

DESCRIPTION OF EMBODIMENTS

In the following description, reference is made to the accompanying figures, which form part of the disclosure, and which show, by way of illustration, specific aspects of embodiments of the present disclosure or specific aspects in which embodiments of the present disclosure may be used. It is understood that embodiments of the present disclosure may be used in other aspects and include structural or logical changes not depicted in the figures. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims.

For instance, it is understood that a disclosure in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa. For example, if one or a plurality of specific method steps are described, a corresponding device may include one or a plurality of units, e.g. functional units, to perform the described one or plurality of method steps (e.g. one unit performing the one or plurality of steps, or a plurality of units each performing one or more of the plurality of steps) , even if such one or more units are not explicitly described or illustrated in the figures. On the other hand, for example, if a specific apparatus is described based on one or a plurality of units, e.g. functional units, a corresponding method may include one step to perform the functionality of the one or plurality of units (e.g. one step performing the functionality of the one or plurality of units, or a plurality of steps each performing the functionality of one or more of the plurality of units) , even if such one or plurality of steps are not explicitly described or illustrated in the figures. Further, it is understood that the features of the various exemplary embodiments and/or aspects described herein may be combined with each other, unless specifically noted otherwise.

Video coding typically refers to the processing of a sequence of pictures, which form the video or video sequence. Instead of the term “picture” the term “frame” or “image” may be used as synonyms in the field of video coding. Video coding used in the present disclosure (or present disclosure) indicates either video encoding or video decoding. Video encoding is performed at the source side, typically including processing (e.g. by compression) the original video pictures to reduce the amount of data required for representing the video pictures (for more efficient storage and/or transmission) . Video decoding is performed at the destination side and typically includes the inverse processing compared to the encoder to reconstruct the video pictures. Embodiments referring to “coding” of video pictures (or pictures in general, as will be explained later) shall be understood to relate to either “encoding” or “decoding” for video sequence. The combination of the encoding part and the decoding part is also referred to as CODEC (Encoding and Decoding) .

In case of lossless video coding, the original video pictures can be reconstructed, i.e. the reconstructed video pictures have the same quality as the original video pictures (assuming no transmission loss or other data loss during storage or transmission) . In case of lossy video coding, further compression, e.g. by quantization, is performed, to reduce the amount of data representing the video pictures, which cannot be completely reconstructed at the decoder, i.e. the quality of the reconstructed video pictures is lower or worse compared to the quality of the original video pictures.

Several video coding standards since H. 261 belong to the group of “lossy hybrid video codecs” (i.e. combine spatial and temporal prediction in the sample domain and 2D transform coding for applying quantization in the transform domain) . Each picture of a video sequence is typically partitioned into a set of non-overlapping blocks and the coding is typically performed on a block level. In other words, at the encoder the video is typically processed, i.e. encoded, on a block (video block) level, e.g. by using spatial (intra picture) prediction and temporal (inter picture) prediction to generate a prediction block, subtracting the prediction block from the current block (block currently processed/to be processed) to obtain a residual block, transforming the residual block and quantizing the residual block in the transform domain to reduce the amount of data to be transmitted (compression) , whereas at the decoder the inverse processing compared to the encoder is partially applied to the encoded or compressed block to reconstruct the current block for representation. Furthermore, the encoder duplicates the decoder processing loop such that both will generate identical predictions (e.g. intra-and inter predictions) and/or re-constructions for processing, i.e. coding, the subsequent blocks.

As used herein, the term “block” may a portion of a picture or a frame. For convenience of description, embodiments of the present disclosure are described herein in reference to High-Efficiency Video Coding (HEVC) or the reference software of Versatile video coding (VVC) , developed by the Joint Collaboration Team on Video Coding (JCT-VC) of ITU-T Video Coding Experts Group (VCEG) and ISO/IEC Motion Picture Experts Group (MPEG) . One of ordinary skill in the art will understand that embodiments of the present disclosure are not limited to HEVC or VVC. It may refer to a CU, PU, and TU. In HEVC, a CTU is split into CUs by using a quad-tree structure denoted as coding tree. The decision whether to code a picture area using inter-picture (temporal) or intra-picture (spatial) prediction is made at the CU level. Each CU can be further split into one, two or four PUs according to the PU splitting type. Inside one PU, the same prediction process is applied and the relevant information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying the prediction process based on the PU splitting type, a CU can be partitioned into transform units (TUs) according to another quadtree structure similar to the coding tree for the CU. In the newest development of the video compression technical, Qual-tree and binary tree (QTBT) partitioning frame is used to partition a coding block. In the QTBT block structure, a CU can have either a square or rectangular shape. For example, a coding tree unit (CTU) is first partitioned by a quadtree structure. The quadtree leaf nodes are further partitioned by a binary tree structure. The binary tree leaf nodes are called coding units (CUs) , and that segmentation is used for prediction and transform processing without any further partitioning. This means that the CU, PU and TU have the same block size in the QTBT coding block structure. In parallel, multiply partition, for example, triple tree partition was also proposed to be used together with the QTBT block structure.

In the following embodiments of an encoder 100, a decoder 200 and a coding system 300 are described based on FIGS. 1 to 3 (before describing embodiments of the present disclosure in more detail based on FIGS. 16 to 19) .

FIG. 1 is a conceptional or schematic block diagram illustrating an embodiment of a coding system 300, e.g., a picture coding system 300, wherein the coding system 300 includes a source device 310 configured to provide encoded data 330, e.g., an encoded picture 330, e.g., to a destination device 320 for decoding the encoded data 330.

The source device 310 includes an encoder 100 or encoding unit 100, and may additionally, i.e. optionally, include a picture source 312, a pre-processing unit 314, e.g., a picture pre-processing unit 314, and a communication interface or communication unit 318.

The picture source 312 may include or be any kind of picture capturing device, for example for capturing a real-world picture, and/or any kind of a picture generating device, for example a computer-graphics processor for generating a computer animated picture, or any kind of device for obtaining and/or providing a real-world picture, a computer animated picture (e.g., a screen content, a virtual reality (VR) picture) and/or any combination thereof (e.g., an augmented reality (AR) picture) . In the following, all these kinds of pictures or images and any other kind of picture or image will be referred to as “picture” “image” or “picture data” or “image data” , unless specifically described otherwise, while the previous explanations with regard to the terms “picture” or “image” covering “video pictures” and “still pictures” still hold true, unless explicitly specified differently.

A (digital) picture is or can be regarded as a two-dimensional array or matrix of samples with intensity values. A sample in the array may also be referred to as pixel (short form of picture element) or a pel. The number of samples in horizontal and vertical direction (or axis) of the array or picture define the size and/or resolution of the picture. For representation of color, typically three color components are employed, i.e. the picture may be represented or include three sample arrays. In RGB format or color space a picture includes a corresponding red, green and blue sample array. However, in video coding each pixel is typically represented in a luminance/chrominance format or color space, e.g., YCbCr, which includes a luminance component indicated by Y (sometimes also L is used instead) and two chrominance components indicated by Cb and Cr. The luminance (or short luma) component Y represents the brightness or grey level intensity (e.g., like in a grey-scale picture) , while the two chrominance (or short chroma) components Cb and Cr represent the chromaticity or color information components. Accordingly, a picture in YCbCr format includes a luminance sample array of luminance sample values (Y) , and two chrominance sample arrays of chrominance values (Cb and Cr) . Pictures in RGB format may be converted or transformed into YCbCr format and vice versa, the process is also known as color transformation or conversion. If a picture is monochrome, the picture may include only a luminance sample array.

The picture source 312 may be, for example a camera for capturing a picture, a memory, e.g., a picture memory, including or storing a previously captured or generated picture, and/or any kind of interface (internal or external) to obtain or receive a picture. The camera may be, for example, a local or integrated camera integrated in the source device, the memory may be a local or integrated memory, e.g., integrated in the source device. The interface may be, for example, an external interface to receive a picture from an external video source, for example an external picture capturing device like a camera, an external memory, or an external picture generating device, for example an external computer-graphics processor, computer or server. The interface can be any kind of interface, e.g., a wired or wireless interface, an optical interface, according to any proprietary or standardized interface protocol. The interface for obtaining the picture data 313 may be the same interface as or a part of the communication interface 318.

Interfaces between units within each device include cable connections, USB interfaces, Communication interfaces 318 and 322 between the source device 310 and the destination device 320 include cable connections, USB interfaces, radio interfaces.

In distinction to the pre-processing unit 314 and the processing performed by the pre-processing unit 314, the picture or picture data 313 may also be referred to as raw picture or raw picture data 313.

Pre-processing unit 314 is configured to receive the (raw) picture data 313 and to perform pre-processing on the picture data 313 to obtain a pre-processed picture 315 or pre-processed picture data 315. Pre-processing performed by the pre-processing unit 314 may, e.g., include trimming, color format conversion (e.g., from RGB to YCbCr) , color correction, or de-noising.

The encoder 100 is configured to receive the pre-processed picture data 315 and provide encoded picture data 171 (further details will be described, e.g., based on FIG. 2) .

Communication interface 318 of the source device 310 may be configured to receive the encoded picture data 171 and to directly transmit it to another device, e.g., the destination device 320 or any other device, for storage or direct reconstruction, or to process the encoded picture data 171 for respectively before storing the encoded data 330 and/or transmitting the encoded data 330 to another device, e.g., the destination device 320 or any other device for decoding or storing.

The destination device 320 includes a decoder 200 or decoding unit 200, and may additionally, i.e. optionally, include a communication interface or communication unit 322, a post-processing unit 326 and a display device 328.

The communication interface 322 of the destination device 320 is configured to receive the encoded picture data 171 or the encoded data 330, e.g., directly from the source device 310 or from any other source, e.g., a memory, e.g., an encoded picture data memory.

The communication interface 318 and the communication interface 322 may be configured to transmit respectively receive the encoded picture data 171 or encoded data 330 via a direct communication link between the source device 310 and the destination device 320, e.g., a direct wired or wireless connection, including optical connection or via any kind of network, e.g., a wired or wireless network or any combination thereof, or any kind of private and public network, or any kind of combination thereof.

The communication interface 318 may be, e.g., configured to package the encoded picture data 171 into an appropriate format, e.g., packets, for transmission over a communication link or communication network, and may further include data loss protection.

The communication interface 322, forming the counterpart of the communication interface 318, may be, e.g., configured to de-package the encoded data 330 to obtain the encoded picture data 171 and may further be configured to perform data loss protection and data loss recovery, e.g., including error concealment.

Both, communication interface 318 and communication interface 322 may be configured as unidirectional communication interfaces as indicated by the arrow for the encoded picture data 330 in FIG. 1 pointing from the source device 310 to the destination device 320, or bi-directional communication interfaces, and may be configured, e.g., to send and receive messages, e.g., to set up a connection, to acknowledge and/or re-send lost or delayed data including picture data, and exchange any other information related to the communication link and/or data transmission, e.g., encoded picture data transmission.

The decoder 200 is configured to receive the encoded picture data 171 and provide decoded picture data 231 or a decoded picture 231.

The post-processor 326 of destination device 320 is configured to post-process the decoded picture data 231, e.g., the decoded picture 231, to obtain post-processed picture data 327, e.g., a post-processed picture 327. The post-processing performed by the post-processing unit 326 may include, e.g., color format conversion (e.g., from YCbCr to RGB) , color correction, trimming, or re-sampling, or any other processing, e.g., for preparing the decoded picture data 231 for display, e.g., by display device 328.

The display device 328 of the destination device 320 is configured to receive the post-processed picture data 327 for displaying the picture, e.g., to a user or viewer. The display device 328 may be or include any kind of display for representing the reconstructed picture, e.g., an integrated or external display or monitor. The displays may, e.g., include cathode ray tubes (CRT) , liquid crystal displays (LCD) , plasma displays, organic light emitting diodes (OLED) displays or any kind of other display, such as projectors, holographic displays, apparatuses to generate holograms …

Although FIG. 1 depicts the source device 310 and the destination device 320 as separate devices, embodiments of devices may also include both or both functionalities, the source device 310 or corresponding functionality and the destination device 320 or corresponding functionality. In such embodiments the source device 310 or corresponding functionality and the destination device 320 or corresponding functionality may be implemented using the same hardware and/or software or by separate hardware and/or software or any combination thereof.

As will be apparent for the skilled person based on the description, the existence and (exact) split of functionalities of the different units or functionalities within the source device 310 and/or destination device 320 as shown in FIG. 1 may vary depending on the actual device and application.

In the following, a few non-limiting examples for the coding system 300, the source device 310 and/or destination device 320 will be provided.

Various electronic products, such as a smartphone, a tablet or a handheld camera with integrated display, may be seen as examples for a coding system 300. They contain a display device 328 and most of them contain an integrated camera, i.e. a picture source 312, as well. Picture data taken by the integrated camera is processed and displayed. The processing may include encoding and decoding of the picture data internally. In addition, the encoded picture data may be stored in an integrated memory.

Alternatively, these electronic products may have wired or wireless interfaces to receive picture data from external sources, such as the internet or external cameras, or to transmit the encoded picture data to external displays or storage units.

On the other hand, set-top boxes do not contain an integrated camera or a display but perform picture processing of received picture data for display on an external display device. Such a set-top box may be embodied by a chipset, for example.

Alternatively, a device similar to a set-top box may be included in a display device, such as a TV set with integrated display.

Surveillance cameras without an integrated display constitute a further example. They represent a source device with an interface for the transmission of the captured and encoded picture data to an external display device or an external storage device.

Contrary, devices such as smart glasses or 3D glasses, for instance used for AR or VR, represent a destination device 320. They receive the encoded picture data and display them.

Therefore, the source device 310 and the destination device 320 as shown in FIG. 1 are just example embodiments of the present disclosure and embodiments of the present disclosure are not limited to those shown in FIG. 1.

Source device 310 and destination device 320 may include any of a wide range of devices, including any kind of handheld or stationary devices, e.g., notebook or laptop computers, mobile phones, smart phones, tablets or tablet computers, cameras, desktop computers, set-top boxes, televisions, display devices, digital media players, video gaming consoles, video streaming devices, broadcast receiver device, or the like. For large-scale professional encoding and decoding, the source device 310 and/or the destination device 320 may additionally include servers and work stations, which may be included in large networks. These devices may use no or any kind of operating system.

ENCODER &ENCODING METHOD

FIG. 2 shows a schematic/conceptual block diagram of an embodiment of an encoder 100, e.g., a picture encoder 100, which includes an input 102, a residual calculation unit 104, a transformation unit 106, a quantization unit 108, an inverse quantization unit 110, and inverse transformation unit 112, a reconstruction unit 114, a buffer 116, a loop filter 120, a decoded picture buffer (DPB) 130, a prediction unit 160, which includes an inter estimation unit 142, an inter prediction unit 144, an intra-estimation unit 152, an intra-prediction unit 154 and a mode selection unit 162, an entropy encoding unit 170, and an output 172. A video encoder 100 as shown in FIG. 2 may also be referred to as hybrid video encoder or a video encoder according to a hybrid video codec. Each unit may consist of a processor and a non-transitory memory to perform its processing steps by executing a code stored in the non-transitory memory by the processor.

For example, the residual calculation unit 104, the transformation unit 106, the quantization unit 108, and the entropy encoding unit 170 form a forward signal path of the encoder 100, whereas, for example, the inverse quantization unit 110, the inverse transformation unit 112, the reconstruction unit 114, the buffer 116, the loop filter 120, the decoded picture buffer (DPB) 130, the inter prediction unit 144, and the intra-prediction unit 154 form a backward signal path of the encoder, wherein the backward signal path of the encoder corresponds to the signal path of the decoder to provide inverse processing for identical reconstruction and prediction (see decoder 200 in FIG. 3) .

The encoder is configured to receive, e.g., by input 102, a picture 101 or a picture block 103 of the picture 101, e.g., picture of a sequence of pictures forming a video or video sequence. The picture block 103 may also be referred to as current picture block or picture block to be coded, and the picture 101 as current picture or picture to be coded (in particular in video coding to distinguish the current picture from other pictures, e.g., previously encoded and/or decoded pictures of the same video sequence, i.e. the video sequence which also includes the current picture) .

PARTITIONING

Embodiments of the encoder 100 may include a partitioning unit (not depicted in FIG. 2) , e.g., which may also be referred to as picture partitioning unit, configured to partition the picture 103 into a plurality of blocks, e.g., blocks like block 103, typically into a plurality of non-overlapping blocks. The partitioning unit may be configured to use the same block size for all pictures of a video sequence and the corresponding grid defining the block size, or to change the block size between pictures or subsets or groups of pictures, and partition each picture into the corresponding blocks.

Each block of the plurality of blocks may have square dimensions or more general rectangular dimensions. Blocks being picture areas with non-rectangular shapes may not appear.

Like the picture 101, the block 103 again is or can be regarded as a two-dimensional array or matrix of samples with intensity values (sample values) , although of smaller dimension than the picture 101. In other words, the block 103 may include, e.g., one sample array (e.g., a luma array in case of a monochrome picture 101) or three sample arrays (e.g., a luma and two chroma arrays in case of a color picture 101) or any other number and/or kind of arrays depending on the color format applied. The number of samples in horizontal and vertical direction (or axis) of the block 103 define the size of block 103.

Encoder 100 as shown in FIG. 2 is configured to encode the picture 101 block by block, e.g., the encoding and prediction is performed per block 103.

RESIDUAL CALCULATION

The residual calculation unit 104 is configured to calculate a residual block 105 based on the picture block 103 and a prediction block 165 (further details about the prediction block 165 are provided later) , e.g., by subtracting sample values of the prediction block 165 from sample values of the picture block 103, sample by sample (pixel by pixel) to obtain the residual block 105 in the sample domain.

TRANSFORMATION

The transformation unit 106 is configured to apply a transformation, e.g., a spatial frequency transform or a linear spatial transform, e.g., a discrete cosine transform (DCT) or discrete sine transform (DST) , on the sample values of the residual block 105 to obtain transformed coefficients 107 in a transform domain. The transformed coefficients 107 may also be referred to as transformed residual coefficients and represent the residual block 105 in the transform domain.

The transformation unit 106 may be configured to apply integer approximations of DCT/DST, such as the core transforms specified for HEVC/H. 265. Compared to an orthonormal DCT transform, such integer approximations are typically scaled by a certain factor. In order to preserve the norm of the residual block which is processed by forward and inverse transforms, additional scaling factors are applied as part of the transform process. The scaling factors are typically chosen based on certain constraints like scaling factors being a power of two for shift operation, bit depth of the transformed coefficients, tradeoff between accuracy and implementation costs, etc. Specific scaling factors are, for example, specified for the inverse transform, e.g., by inverse transformation unit 212, at a decoder 200 (and the corresponding inverse transform, e.g., by inverse transformation unit 112 at an encoder 100) and corresponding scaling factors for the forward transform, e.g., by transformation unit 106, at an encoder 100 may be specified accordingly.

QUANTIZATION

The quantization unit 108 is configured to quantize the transformed coefficients 107 to obtain quantized coefficients 109, e.g., by applying scalar quantization or vector quantization. The quantized coefficients 109 may also be referred to as quantized residual coefficients 109. For example for scalar quantization, different scaling may be applied to achieve finer or coarser quantization. Smaller quantization step sizes correspond to finer quantization, whereas larger quantization step sizes correspond to coarser quantization. The applicable quantization step size may be indicated by a quantization parameter (QP) . The quantization parameter may for example be an index to a predefined set of applicable quantization step sizes. For example, small quantization parameters may correspond to fine quantization (small quantization step sizes) and large quantization parameters may correspond to coarse quantization (large quantization step sizes) or vice versa. The quantization may include division by a quantization step size and corresponding or inverse dequantization, e.g., by inverse quantization 110, may include multiplication by the quantization step size. Embodiments according to HEVC (High-Efficiency Video Coding) , may be configured to use a quantization parameter to determine the quantization step size. Generally, the quantization step size may be calculated based on a quantization parameter using a fixed point approximation of an equation including division. Additional scaling factors may be introduced for quantization and dequantization to restore the norm of the residual block, which might get modified because of the scaling used in the fixed point approximation of the equation for quantization step size and quantization parameter. In one example implementation, the scaling of the inverse transform and dequantization might be combined. Alternatively, customized quantization tables may be used and signaled from an encoder to a decoder, e.g., in a bit stream. The quantization is a lossy operation, wherein the loss increases with increasing quantization step sizes.

Embodiments of the encoder 100 (or respectively of the quantization unit 108) may be configured to output the quantization settings including quantization scheme and quantization step size, e.g., by means of the corresponding quantization parameter, so that a decoder 200 may receive and apply the corresponding inverse quantization. Embodiments of the encoder 100 (or quantization unit 108) may be configured to output the quantization scheme and quantization step size, e.g., directly or entropy encoded via the entropy encoding unit 170 or any other entropy coding unit.

The inverse quantization unit 110 is configured to apply the inverse quantization of the quantization unit 108 on the quantized coefficients to obtain dequantized coefficients 111, e.g., by applying the inverse of the quantization scheme applied by the quantization unit 108 based on or using the same quantization step size as the quantization unit 108. The dequantized coefficients 111 may also be referred to as dequantized residual coefficients 111 and correspond -although typically not identical to the transformed coefficients due to the loss by quantization -to the transformed coefficients 108.

The inverse transformation unit 112 is configured to apply the inverse transformation of the transformation applied by the transformation unit 106, e.g., an inverse discrete cosine transform (DCT) or inverse discrete sine transform (DST) , to obtain an inverse transformed block 113 in the sample domain. The inverse transformed block 113 may also be referred to as inverse transformed dequantized block 113 or inverse transformed residual block 113.

The reconstruction unit 114 is configured to combine the inverse transformed block 113 and the prediction block 165 to obtain a reconstructed block 115 in the sample domain, e.g., by sample wise adding the sample values of the decoded residual block 113 and the sample values of the prediction block 165.

The buffer unit 116 (or short “buffer” 116) , e.g., a line buffer 116, is configured to buffer or store the reconstructed block and the respective sample values, for example for intra estimation and/or intra prediction. In further embodiments, the encoder may be configured to use unfiltered reconstructed blocks and/or the respective sample values stored in buffer unit 116 for any kind of estimation and/or prediction.

Embodiments of the encoder 100 may be configured such that, e.g., the buffer unit 116 is not only used for storing the reconstructed blocks 115 for intra estimation 152 and/or intra prediction 154 but also for the loop filter unit 120, and/or such that, e.g., the buffer unit 116 and the decoded picture buffer unit 130 form one buffer. Further embodiments may be configured to use filtered blocks 121 and/or blocks or samples from the decoded picture buffer 130 (both not shown in FIG. 2) as input or basis for intra estimation 152 and/or intra prediction 154.

The loop filter unit 120 (or short “loop filter” 120) , is configured to filter the reconstructed block 115 to obtain a filtered block 121, e.g., by applying a de-blocking sample-adaptive offset (SAO) filter or other filters, e.g., sharpening or smoothing filters or collaborative filters. The filtered block 121 may also be referred to as filtered reconstructed block 121.

Embodiments of the loop filter unit 120 may include a filter analysis unit and the actual filter unit, wherein the filter analysis unit is configured to determine loop filter parameters for the actual filter. The filter analysis unit may be configured to apply fixed pre-determined filter parameters to the actual loop filter, adaptively select filter parameters from a set of predetermined filter parameters or adaptively calculate filter parameters for the actual loop filter.

Embodiments of the loop filter unit 120 may include (not shown in FIG. 2) one or a plurality of filters (such as loop filter components and/or subfilters) , e.g., one or more of different kinds or types of filters, e.g., connected in series or in parallel or in any combination thereof, wherein each of the filters may include individually or jointly with other filters of the plurality of filters a filter analysis unit to determine the respective loop filter parameters, e.g., as described in the previous paragraph.

Embodiments of the encoder 100 (respectively loop filter unit 120) may be configured to output the loop filter parameters, e.g., directly or entropy encoded via the entropy encoding unit 170 or any other entropy coding unit, so that, e.g., a decoder 200 may receive and apply the same loop filter parameters for decoding.

The decoded picture buffer (DPB) 130 is configured to receive and store the filtered block 121. The decoded picture buffer 130 may be further configured to store other previously filtered blocks, e.g., previously reconstructed and filtered blocks 121, of the same current picture or of different pictures, e.g., previously reconstructed pictures, and may provide complete previously reconstructed, i.e. decoded, pictures (and corresponding reference blocks and samples) and/or a partially reconstructed current picture (and corresponding reference blocks and samples) , for example for inter estimation and/or inter prediction.

Further embodiments of the present disclosure may also be configured to use the previously filtered blocks and corresponding filtered sample values of the decoded picture buffer 130 for any kind of estimation or prediction, e.g., intra estimation and prediction as well as inter estimation and prediction.

The prediction unit 160, also referred to as block prediction unit 160, is configured to receive or obtain the picture block 103 (current picture block 103 of the current picture 101) and decoded or at least reconstructed picture data, e.g., reference samples of the same (current) picture from buffer 116 and/or decoded picture data 231 from one or a plurality of previously decoded pictures from decoded picture buffer 130, and to process such data for prediction, i.e. to provide a prediction block 165, which may be an inter-predicted block 145 or an intra-predicted block 155.

Mode selection unit 162 may be configured to select a prediction mode (e.g., an intra or inter prediction mode) and/or a

corresponding prediction block

145 or 155 to be used as prediction block 165 for the calculation of the residual block 105 and for the reconstruction of the reconstructed block 115.

Embodiments of the mode selection unit 162 may be configured to select the prediction mode (e.g., from those supported by prediction unit 160) , which provides the best match or in other words the minimum residual (minimum residual means better compression for transmission or storage) , or a minimum signaling overhead (minimum signaling overhead means better compression for transmission or storage) , or which considers or balances both. The mode selection unit 162 may be configured to determine the prediction mode based on rate distortion optimization (RDO) , i.e. select the prediction mode which provides a minimum rate distortion optimization or which associated rate distortion at least fulfills a prediction mode selection criterion.

In the following, the prediction processing (e.g., prediction unit 160) and mode selection (e.g., by mode selection unit 162) performed by an example encoder 100 will be explained in more detail.

As described above, encoder 100 is configured to determine or select the best or an optimum prediction mode from a set of (pre-determined) prediction modes. The set of prediction modes may include, e.g., intra-prediction modes and/or inter-prediction modes.

The set of intra-prediction modes may include 32 different intra-prediction modes, e.g., non-directional modes like DC (or mean) mode and planar mode, or directional modes, e.g., as defined in H. 264, or may include 65 different intra-prediction modes, e.g., non-directional modes like DC (or mean) mode and planar mode, or directional modes, e.g., as defined in H.265.

The set of (or possible) inter-prediction modes depend on the available reference pictures (i.e. previous at least partially decoded pictures, e.g., stored in DPB 230) and other inter-prediction parameters, e.g., whether the whole reference picture or only a part, e.g., a search window area around the area of the current block, of the reference picture is used for searching for a best matching reference block, and/or e.g., whether pixel interpolation is applied, e.g., half/semi-pel and/or quarter-pel interpolation, or not.

Additional to the above prediction modes, skip mode and/or direct mode may be applied.

The prediction unit 160 may be further configured to partition the block 103 into smaller block partitions or sub-blocks, e.g., iteratively using quad-tree-partitioning (QT) , binary partitioning (BT) or triple-tree-partitioning (TT) or any combination thereof, and to perform, e.g., the prediction for each of the block partitions or sub-blocks, wherein the mode selection includes the selection of the tree-structure of the partitioned block 103 and the prediction modes applied to each of the block partitions or sub-blocks.

The inter estimation unit 142, also referred to as inter picture estimation unit 142, is configured to receive or obtain the picture block 103 (current picture block 103 of the current picture 101) and a decoded picture 231, or at least one or a plurality of previously reconstructed blocks, e.g., reconstructed blocks of one or a plurality of other/different previously decoded pictures 231, for inter estimation (or “inter picture estimation” ) . E.g., a video sequence may include the current picture and the previously decoded pictures 231, or in other words, the current picture and the previously decoded pictures 231 may be part of or form a sequence of pictures forming a video sequence.

The encoder 100 may, e.g., be configured to select (obtain/determine) a reference block from a plurality of reference blocks of the same or different pictures of the plurality of other pictures and provide a reference picture (or reference picture index, …) and/or an offset (spatial offset) between the position (x, y coordinates) of the reference block and the position of the current block as inter estimation parameters 143 to the inter prediction unit 144. This offset is also called motion vector (MV) . The inter estimation is also referred to as motion estimation (ME) and the inter prediction also motion prediction (MP) .

The inter prediction unit 144 is configured to obtain, e.g., receive, an inter prediction parameter 143 and to perform inter prediction based on or using the inter prediction parameter 143 to obtain an inter prediction block 145.

Although FIG. 2 shows two distinct units (or steps) for the inter-coding, namely inter estimation 142 and inter prediction 152, both functionalities may be performed as one (inter estimation typically requires/includes calculating an/the inter prediction block, i.e. the or a “kind of” inter prediction 154) , e.g., by testing all possible or a predetermined subset of possible inter prediction modes iteratively while storing the currently best inter prediction mode and respective inter prediction block, and using the currently best inter prediction mode and respective inter prediction block as the (final) inter prediction parameter 143 and inter prediction block 145 without performing another time the inter prediction 144.

The intra estimation unit 152 is configured to obtain, e.g., receive, the picture block 103 (current picture block) and one or a plurality of previously reconstructed blocks, e.g., reconstructed neighbor blocks, of the same picture for intra estimation. The encoder 100 may, e.g., be configured to select (obtain/determine) an intra prediction mode from a plurality of intra prediction modes and provide it as intra estimation parameter 153 to the intra prediction unit 154.

Embodiments of the encoder 100 may be configured to select the intra-prediction mode based on an optimization criterion, e.g., minimum residual (e.g., the intra-prediction mode providing the prediction block 155 most similar to the current picture block 103) or minimum rate distortion.

The intra prediction unit 154 is configured to determine based on the intra prediction parameter 153, e.g., the selected intra prediction mode 153, the intra prediction block 155.

Although FIG. 2 shows two distinct units (or steps) for the intra-coding, namely intra estimation 152 and intra prediction 154, both functionalities may be performed as one (intra estimation typically requires/includes calculating the intra prediction block, i.e. the or a “kind of” intra prediction 154) , e.g., by testing all possible or a predetermined subset of possible intra-prediction modes iteratively while storing the currently best intra prediction mode and respective intra prediction block, and using the currently best intra prediction mode and respective intra prediction block as the (final) intra prediction parameter 153 and intra prediction block 155 without performing another time the intra prediction 154.

The entropy encoding unit 170 is configured to apply an entropy encoding algorithm or scheme (e.g., a variable length coding (VLC) scheme, an context adaptive VLC scheme (CALVC) , an arithmetic coding scheme, a context adaptive binary arithmetic coding (CABAC) ) on the quantized residual coefficients 109, inter prediction parameters 143, intra prediction parameter 153, and/or loop filter parameters, individually or jointly (or not at all) to obtain encoded picture data 171 which can be output by the output 172, e.g., in the form of an encoded bit stream 171.

DECODER

FIG. 3 shows an exemplary video decoder 200 configured to receive encoded picture data (e.g., encoded bit stream) 171, e.g., encoded by encoder 100, to obtain a decoded picture 231.

The decoder 200 includes an input 202, an entropy decoding unit 204, an inverse quantization unit 210, an inverse transformation unit 212, a reconstruction unit 214, a buffer 216, a loop filter 220, a decoded picture buffer 230, a prediction unit 260, which includes an inter prediction unit 244, an intra prediction unit 254, and a mode selection unit 260, and an output 232.

The entropy decoding unit 204 is configured to perform entropy decoding to the encoded picture data 171 to obtain, e.g., quantized coefficients 209 and/or decoded coding parameters (not shown in FIG. 3) , e.g., (decoded) any or all of inter prediction parameters 143, intra prediction parameter 153, and/or loop filter parameters.

In embodiments of the decoder 200, the inverse quantization unit 210, the inverse transformation unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer 230, the prediction unit 260 and the mode selection unit 260 are configured to perform the inverse processing of the encoder 100 (and the respective functional units) to decode the encoded picture data 171.

In particular, the inverse quantization unit 210 may be identical in function to the inverse quantization unit 110, the inverse transformation unit 212 may be identical in function to the inverse transformation unit 112, the reconstruction unit 214 may be identical in function reconstruction unit 114, the buffer 216 may be identical in function to the buffer 116, the loop filter 220 may be identical in function to the loop filter 220 (with regard to the actual loop filter as the loop filter 220 typically does not include a filter analysis unit to determine the filter parameters based on the original image 101 or block 103 but receives (explicitly or implicitly) or obtains the filter parameters used for encoding, e.g., from entropy decoding unit 204) , and the decoded picture buffer 230 may be identical in function to the decoded picture buffer 130.

The prediction unit 260 may include an inter prediction unit 244 and an intra prediction unit 254, wherein the inter prediction unit 244 may be identical in function to the inter prediction unit 144, and the intra prediction unit 254 may be identical in function to the intra prediction unit 154. The prediction unit 260 and the mode selection unit 262 are typically configured to perform the block prediction and/or obtain the predicted block 265 from the encoded data 171 only (without any further information about the original image 101) and to receive or obtain (explicitly or implicitly) the

prediction parameters

143 or 153 and/or the information about the selected prediction mode, e.g., from the entropy decoding unit 204.

The decoder 200 is configured to output the decoded picture 231, e.g., via output 232, for presentation or viewing to a user.

Referring back to FIG. 1, the decoded picture 231 output from the decoder 200 may be post-processed in the post-processor 326. The resulting post-processed picture 327 may be transferred to an internal or external display device 328 and displayed.

FILTERING PROCESS

At decoder side, when ALF is enabled for a CU, each sample R (i, j) within the CU is filtered, resulting in sample value R' (i, j) as shown below, where L denotes filter length, f_ (m, n) represents filter coefficient, and f (k, l) denotes the decoded filter coefficients.

Encoding side filter parameters determination process

FIG. 2 shows a schematic block diagram of an example video encoder. Overall encoder decision process for ALF is illustrated in FIG. 4. For luma samples of each CU, the encoder makes a decision on whether or not the ALF is applied and the appropriate signalling flag is included in the slice header. For chroma samples, the decision to apply the filter is done based on the picture-level rather than CU-level. Furthermore, chroma ALF for a picture is checked only when luma ALF is enabled for the picture.

FILTER SHAPE

FIG. 5A, FIG. 5B and FIG. 5C are simplified block diagrams of ALF filter shapes in JEM, where FIG. 5A shows a filter shape of 5×5 diamond, FIG. 5B shows a filter shape of 7×7 diamond, and FIG. 5C shows a filter shape of 9×9 diamond.

1. up to three diamond filter shapes (as shown in FIGS. 5A-5C) can be selected for the luma component. An index is signaled at the picture level to indicate the filter shape used for the luma component.

2. For chroma components in a picture, the 5×5 diamond shape is always used.

FIG. 6 is a simplified block diagram of ALF filter shape in HM-6.0 and HM-7.0;

In HM-7.0, the filter shape of ALF is a combination of 9 7-tap cross shape and 3 3-tap rectangular shape, as illustrated in FIG. 6.

Each square in FIG. 6 corresponds to a sample. Therefore, a total of 19 samples are used to derive a filtered value for the sample of position 9.

FIG. 7 is an illustrative diagram of an example array of filter coefficients;

FIG. 7 is an illustrative diagram of an example array of filter coefficients. For example, the array of filter coefficients may represent a filter 700. As illustrated, only the coefficient locations used for filtering are the ones shown by a filled in number in the shown array of potential locations in filter 700. In this example, coefficients at only 9 locations are necessary for filtering and are shown by cells with filled information.

For example, the array of filter coefficients may exhibit a rectangular shape. As shown in FIG. 7, the entire 7×7 array may form a rectangle. Filter 700 may have a shape 702 formed by a group of coefficients may vary from the specific shapes shown in the accompanying figures. As used herein, shape 702 of filter 700 may be referred to as a discontinuous diamond shape, a diamond shape with holes, a diamond shape having a checkered pattern, and/or a discontinuous diamond shape having maximum dimensions of 5 pixels by 5 pixels, for example.

As illustrated, array 700 may be a rectangular array (e.g., 7×7) that may be used for Luma and/or Chroma data. In the illustrated example, only the coefficient locations used for filtering are shown as being filled with a number in the potential locations of array 700. In this example, coefficients at 9 locations are utilized for filtering and are shown by cells with filled coefficient numbers. Of these 9 cells with filled coefficient numbers, 9 are unique coefficients (e.g., 9 unique coefficients c (0) through c (8) (e.g., without other symmetric coeffeicients) with 9 total locations may also be referred to as 9/9 taps) .

FIG. 8 is an illustrative diagram of an example array of filter coefficients;

FIG. 8 is an illustrative diagram of an example array of filter coefficients. For example, the array of filter coefficients may represent a filter 800. As illustrated, only the coefficient locations used for filtering are the ones shown by a filled in number in the shown array of potential locations in filter 800. In this example, coefficients at only 12 locations are necessary for filtering and are shown by cells with filled information.

For example, the array of filter coefficients may exhibit a rectangular shape. As shown in FIG. 8, the entire 7×7 array may form a rectangle. Filter 800 may have a shape 802 formed by a group of coefficients may vary from the specific shapes shown in the accompanying figures. As used herein, shape 802 of filter 800 may be referred to as a discontinuous diamond shape with corner points, a quincunx shape, a square checkered pattern, and/or a square checkered pattern having a size of 5 pixels by 5 pixels, for example. The shape 802 of filter 800 is a superset of the shape 702 of FIG. 7, and contains 4 additional coefficients shown as cells filled with cross hatching, extending coefficients of the shape 702.

As illustrated, array 800 may be a rectangular array (e.g., 7×7) that may be used for Luma and/or Chroma data. In the illustrated example, only the coefficient locations used for filtering are shown as being filled with a number in the potential locations of array 800. In this example, coefficients at 13 locations are utilized for filtering and are shown by cells with filled coefficient numbers. Of these 13 cells with filled coefficient numbers, 13 are unique coefficients (e.g., 13 unique coefficients c (0) through c (12) (e.g., without other symmetric coeffeicients) with 13 total locations may also be referred to as 13/13 taps) .

FIG. 9 is locations of ALF parameters in the bitstream.

There are two types of coded information for ALF: filter coefficient parameters and filter on/off control flags. As shown in FIG. 9, the filter coefficient parameters are located in a slice header, and the filter on/off control flags are interleaved in slice data with CTUs.

The filter coefficient parameters include picture-level on/off control flags for three color components, number of luma filters (i.e., class/region merging syntax elements for BA/RA) , and corresponding filter coefficients. Up to 7 luma filters, one Cb filter, and one Cr filter per picture can be signaled. Filter on/off control flags are used to provide better local adaptation. In addition to the picture-level filter on/off control flags in PPS, there are also slice-level and CTU-level filter on/off control flags. In slice header, similarly, filter on/off control flags for three color components are coded. If the slice-level on/off control flag indicates ALF-on, CTU-level filter on/off control flags are interleaved in slice data and coded with CTUs; otherwise, no additional CTU-level filter on/off control flags are coded and all CTUs of the slice are inferred as ALF-off.

FIG. 10 is a conceptual diagram showing an example CU level ALF on/off flag map.

FIG. 10 depicts a conceptual map of the use of a CU level ALF on/off decision flag. Picture 1060 is broken into multiple CUs for coding. In the example of FIG. 10, the CUs are depicted as being of identical size for ease of understanding. However, CUs may be of different sizes. For example, CUs may be partitioned according to a quadtree structure.

In FIG. 10, the CUs 1063, with the hashed marking, have been coded with an ALF flag that is on (e.g., ALF flag=1) . As such, according to previous proposals for HEVC, both a video encoder and decoder would apply the ALF to both luma and chroma components of the pixels in that CU. A video encoder may further signal the ALF coefficients used, or an index indicating the ALF coefficients used, in the encoded video bitstream so that a video decoder may apply the same ALF coefficients in the decoding process. The CUs 1065, with no marking, have been coded with an ALF flag that is off (e.g., ALF flag=0) . In this case, no ALF is applied to either the luma components or the pixel components in that CU.

Using only one ALF for chroma components, as well as not applying ALF for chroma components independently of ALF for luma components, may limit the quality of ALF for 4: 2: 0 pixel formats. Accordingly, this disclosure proposes techniques to allow more flexibility in filtering chroma components in the ALF. In other examples, the techniques of this disclosure for ALF of chroma components are not limited to just the 4: 2: 0 pixel format. The ALF techniques of this disclosure may be applied to chroma components in other pixel formats, such as 4: 2: 2 and 4: 4: 4 pixel formats.

In one example, this disclosure proposes that the ALF for chroma components be independently controlled from the ALF for luma components. In one particular example, both the luma ALF and the chroma ALF may have their own, independent CU level ALF on/off decision flag. That is, filtering luma components with the ALF is indicated with a CU level luma ALF on/off flag, and filtering chroma components with the ALF is indicated with a CU level chroma ALF on/off flag.

FIG. 11 is a conceptual diagram showing another example CU level ALF on/off flag map.

FIG. 11 depicts a conceptual map of the use of a luma and chroma CU level ALF on/off decision flag. Picture 1100 is broken into multiple CUs for coding. Again, in the example of FIG. 11, the CUs are depicted as being of identical size for ease of understanding. However, CUs may be of different sizes. For example, CUs in HEVC may be partitioned according to a quadtree structure.

In FIG. 11, the CUs 1103, with the uni-directional hashed marking, have been coded with only a luma ALF flag that is on (e.g., luma ALF flag=1) . For CUs 1103, the chroma ALF flag is off (e.g., chroma ALF flag=0) . For CUs 1103, the ALF is only applied to luma components of the pixels. No ALF is applied to the chroma components. For CUs 1105, with the checkerboard marking, only the chroma ALF flag is on (e.g., chroma ALF flag=1) . For CUs 1105, the luma ALF flag is off (e.g., luma ALF flag=0) . As such, for CUs 1105, the ALF is only applied to chroma components of the pixels. No ALF is applied to the luma components. For CUs 1107, with the bi-directional diagonal marking, both the luma ALF flag and the chroma ALF flag is on (e.g., luma ALF flag=1 and chroma ALF flag=1) . As such, for CUs 1107, the ALF is applied to both luma and chroma components of the pixels. For CUs 1109, with the bi-directional hashed marking, both the luma ALF flag and the chroma ALF flag is off (e.g., luma ALF flag=0 and chroma ALF flag=0) . As such, for CUs 1109, no ALF is applied to either the luma or the chroma components of the pixels.

As can be seen from FIG. 11, using independent CU level ALF decision flags for the luma and chroma components allows for situations where only luma components are filtered with the ALF, where only chroma components are filtered with the ALF, where both luma and chroma components are filtered with the ALF, and where neither the luma nor chroma components are filtered with the ALF. As such, the application of ALF to pixel components may be applied with more flexibility. It should be noted that this concept may be further extended to independently applying ALF to the Cr and Cb components individually. That is, rather than having a single chroma ALF flag that applies to both the Cr and Cb components, individual Cr ALF and Cb ALF flags may be used to indicate the application of ALF to Cr and Cb components independently.

In one example, the map of CU level on/off flags for the luma ALF (i.e., syntax that indicates which CUs have an enabled luma ALF) may be used by the chroma ALF. That is in situations where chroma components use region or block-based adaptive ALF, the CU level ALF flag for luma components may also be used by the chroma components. In this situation, the decision to use a chroma ALF is not independent of the luma ALF. However, the actual filter used may be different. For example, the luma components may be filtered according to a region-based adaptive ALF, while the chroma components are filtered according to a block-based adaptive ALF, or vice versa. As another example, both luma and chroma components may use the same type of ALF (i.e., region-based or block-based) , but different filter coefficients may be determined for the luma and chroma components.

In another example, the actual filter coefficients determined according to region or block-based classification for use by the luma ALF may also be used for the chroma ALF. In this example, the filter coefficients may be shared in situations where both the luma ALF and chroma ALF are indicated as being enabled by their respective CU level on/off flags (e.g., luma ALF flag and chroma ALF flag) . That is, the filter coefficients may be shared in situations where both the luma and chroma ALF are enabled, even if the chroma ALF is able to be turned on and off independently of the luma ALF. In another example, the filter coefficients of the luma ALF may be shared by the chroma ALF in the example where the chroma ALF also shares the CU level on/off flag of the luma ALF.

In another example of the disclosure, additional filter information may be shared between the luma and chroma ALFs. For example, the block-based classification used for the luma ALF may also be used by the chroma ALF. As with sharing the filter coefficients, sharing of the block-based classification may be done in cases where the chroma ALF shares the CU level on/off flag with the luma ALF, or when the chroma ALF has an independent CU level/on off flag.

In still another example, the filter coefficients for the chroma ALF may be predicted from the filter coefficients of the luma ALF. In this example, at the video encoder, filter coefficients for both a luma ALF and a chroma ALF may be calculated independently. Filter coefficients for the luma ALF are then signaled in the encoded video bitstream. Instead of also signaling the chroma ALF coefficients, the difference between the luma ALF coefficients and the chroma ALF coefficients is calculated and signaled. The difference between the luma and chroma ALF coefficients will generally include less data (e.g., fewer bits) then signaling the chroma ALF coefficients themselves, thus improving coding efficiency. At the video decoder, the received difference between the luma ALF coefficients and the chroma ALF coefficients may be added to the received luma ALF coefficients in order to reconstruct the chroma ALF coefficients. This technique may be used when both the Cr and Cb components use the same filter coefficients, or in circumstances where the Cr and Cb components use different sets of filter coefficients. In the circumstance where Cr and Cb components use different sets of filter coefficients, each set may be predicted from the luma ALF coefficients.

As discussed above, in some examples, the chroma ALF may be made up of a separate Cr chroma ALF for the Cr chroma components and a separate Cb chroma ALF for the Cb chroma components. Similarly to the techniques described above relating to sharing filter information between a luma ALF and a chroma ALF, filter information may also be shared between Cr and Cb chroma ALFs.

In one example, the map of CU level on/off flags for the Cr chroma ALF (i.e., syntax that indicates which CUs have an enabled Cr chroma ALF) may be used by the Cb chroma ALF. In another example, the filter coefficients used by the Cr chroma ALF may be used for the Cb chroma ALF. In yet another example, the block-based classification used for the Cr chroma ALF may be used by the Cb chroma ALF. In still another example, the filter coefficients for the Cb chroma ALF may be predicted from the filter coefficients of the Cr chroma ALF, or vice versa.

FIG. 12 is a block diagram illustrating an example ALF module that may be included in a video encoder. As illustrated in FIG. 12, ALF module 1200 includes filter coefficient calculation module 1202, pixel classification module 1206, offset value classification module 1208, and video block filter module 1210. Filter coefficient calculation module 1204 is configured to receive source video blocks and reconstructed video blocks and calculate a filter coefficient to be used for filtering a reconstructed video block. Filter coefficients may be calculated for a block of video data using the region-based or block-based techniques described above with respect to FIG. 13 and FIG. 14.

FIG. 13 shows that block artifact may be created when adjacent blocks are predicted from non-adjacent areas in the reference picture. Both the motion prediction and transform coding are block-based. The size of motion predicted blocks varies from 4*8 and 8*4 to 64*64 luma samples, while the size of block transforms and intra-predicted blocks varies from 4*4 to 32*32 samples. These blocks are coded relatively independently from their neighboring blocks and approximate the original signal with some degree of similarity. Since coded blocks only approximate the original signal, the difference between the approximations may cause discontinuities at the prediction and transform block boundaries. For example, motion prediction of the adjacent blocks may come from the non-adjacent areas of a reference picture (see FIG. 13) or even from different reference pictures.

FIG. 14 shows an example of block artifact in one dimension. In case of non-overlapping block transforms, used in HEVC, coarse quantization can also create discontinuities at the block boundaries. In highly detailed areas with high-frequency content, such artifacts can be masked by the human visual system. However, in the smooth areas, discontinuities between the blocks are easily noticed by a viewer and may cause significant degradation of the perceived video quality. The example of a block artifact in one dimension is shown in FIG. 14. The horizontal axis shows the sample positions along a horizontal or vertical 1-D line, and the vertical axis shows the sample values.

As described above, both techniques may include determining one or more coefficients based on a classification. Filter coefficient calculation module 2104 may be configured to classify a block of video data using either a region-based classification as described above with respect to FIG. 13 or classify a block of video data using a block-based technique described above with respect to FIG. 14. For example, filter coefficient calculation module 2104 may derive a class for a 4×4 block by computing direction and activity information, according to the equations provided above.

Filter coefficient calculation module 1204 may be configured to determine AC and/or DC filter coefficients based on a determined classification. In one example, filter coefficient calculation module 1202 may be configured to calculate AC and/or DC filter coefficients based on the difference between a source video frame and a reconstructed video frame. In another example, AC and/or DC filter coefficients may be pre-calculated and filter coefficient calculation module 1202 may be configured to look-up filter coefficients based on a classification associated with a region or a block. As illustrated in FIG. 12, filter coefficient calculation module 1202 outputs the classification information to ALF mode selection module 1204 and outputs filter coefficients to video block filter module 1210.

Further, ALF mode selection module 1204 may also be configured to skip performing SAO filtering for 4×4 blocks with a specific class_i even though ALF is applied on for those blocks. For example, for 4×4 blocks with class-0, SAO can be skipped because class-0 means that there are minor directional and laplacian activities on those blocks. In this manner, the region-based and block-based classification techniques may be combined.

Filter module 1210 may be configured to receive reconstructed video blocks, offset values, and filter coefficients and outputs filtered video blocks and filter coefficient syntax. Filter module 1210 may be configured to perform filtering techniques using filtering coefficients, such as Weiner filtering techniques or ALF techniques described in proposals to HEVC. Further, filter module 1210 may be configured to add offset values to reconstructed video blocks. Filter module 1210 may be configured to apply a filtering technique to a region or block of video data using a single set of coefficients for each pixel within the region or block and add a respective offset value to each pixel with the region or block. As describe above, offset values may be determined based on a classification associated with a region or block of video data.

In this manner, the video encoder 100, ALF module 1200, filter coefficient calculation module 1202, ALF mode selection module 1204, pixel classification module 1206, offset value calculation module 1208 and/or filter module 1210 may be configured to receive a block of video data, wherein the block of video data includes a plurality of sample values, determine one or more filter coefficients for the block of video data, determine a respective offset value for each of the plurality of sample values based at least in part on the one or more filter coefficients, and filter the block of video data based on the determined one or more filter coefficient and the determined respective offset values.

FIG. 15 is a block diagram illustrating an example ALF module included in a video decoder. ALF module 1500 receives reconstructed video blocks and filter syntax (e.g., mode syntax, offset values, and filter coefficients) as inputs and outputs filtered video blocks. ALF module 1500 may generate filtered video blocks by using the ALF process described in proposals for HEVC, alone, or by using other filtering techniques in combination as described above. In most cases, ALF module 1500 will perform filtering consistent with a filter process performed by a video encoder. Thus, ALF module 1500 may be configured such that it can perform any of the example filter techniques described above with respect ALF module 2100. For the sake of brevity a detailed description of filtering techniques described with respect to ALF module 2100 will not be repeated. However, it should be noted that ALF 2100 may reference an original video frame when determining a filtering mode and performing a filtering process, whereas ALF module 1500 relies on information including in an encoded bitstream. The example ALF module 1500 illustrated in FIG. 15 includes region/block classification module 1502, pixel classification module 1504, filter parameter module 1506, and filter module 1508.

In one example, region/block classification module 1502 may be configured to receive a partition of a video frame and an indication of a classification (e.g., block-based classification or region-based classification) and classify a partition based on values associated with a partition. For example, region/block classification module 1504 may classify pixels based on the techniques described above with respect to FIGS. 13 and 14.

For example, region/block classification module 1502 may receive a 4×4 video block and classify the block as one of classes 0 through 6 using the direction and activity computations described above. It should be noted that in some cases, the classification values may be included in filter syntax.

In one example, pixel classification module 1504 may be configured to receive an indication of an SAO technique from filter syntax and classify pixels based on the pixel values of a reconstructed video block. In one example, pixel classification module 1504 may classify pixels based on the techniques described above. Further, as described above, pixel classifications may be determined based on a classification associated with a region or block of video data. Thus, in some cases, pixel classification module 1504 may receive a block-based classification and determine an SAO technique based on the classification. It should be noted that in some cases, the pixel classification values may be included in the filter syntax.

Filter parameter module 1506 may be configured to receive a set of offset type values for a partition and classifications and determine corresponding filter coefficients and offset values and filter coefficients. Filter parameter module 1506 may be configured to determine AC and/or DC filter coefficients based on a determined classification. In another example, AC and/or DC filter coefficients may be included in filter syntax in an encoded bitstream. Further, filter coefficients may be pre-calculated and filter coefficient calculation module 1506 may be configured to look-up filter coefficients based on a classification associated with a region or a block.

Further, offset value syntax may be based on signaling techniques that signal each offset value explicitly or techniques that that utilizes correlations between offset values. Filter parameter module 1506 may be configured to determine offset values by performing the reciprocal coding process to any of the coding processes described above.

Filter module 1508 may be configured to receive reconstructed video blocks, offset values, filter coefficients, offset values and output filtered video blocks. Filter module 1508 may be configured to perform filtering techniques using filtering coefficients, such as Weiner filtering techniques or ALF techniques described in proposals for HEVC. Further, filter module 1508 may be configured to add offset values to reconstructed video blocks. Filter module 1508 may be configured to apply a filtering technique to a region or block of video data using a single set of coefficients for the block or region and add a respective offset value to each pixel with the region or block.

In this manner, video decoder 100, ALF module 1500, region/block classification module 1502, pixel classification module 1504, filter parameter module 1506, and/or filter module 1508 may be configured to receive a block of video data, wherein the block of video data includes a plurality of sample values, determine one or more filter coefficients for the block of video data, determine a respective offset value for each of the plurality of sample values based at least in part on the one or more filter coefficients, and filter the block of video data based on the determined one or more filter coefficient and the determined respective offset values.

While the normative classification of a block of samples, such as through direction and activity of local gradients, can be performed through only additions and subtractions, the actual filtering process using a non-separable 2-D filter involves multiplications. Even with the diamond shape of the filter and half-symmetry properties, an LxL filter still requires (L ² –1) /4 + 1 multiplications per output sample. For a decoded and reconstructed sample at b bit precision, and filter coefficients at 9-bit precision, each multiplication will be b-bit x 9-bit. One related art attempted to convert some of the coefficients to be a power of 2 so that the corresponding multiplications can be replaced by a single shift operation. However, in order to compute the remaining coefficients on the encoding-side, the Wiener-Hopf equations are solved again after fixing the coefficients that were made powers of 2 from an earlier round of solving for the coefficients. This increases the encoder complexity. Also, this method still leaves in more than half the multiplications at small L values (e.g. L=7 and below) .

Hence there is a need for methods that can further reduce the number of multiplications to simpler operations and also not require repeated solving of the Wiener Hopf equations on the encoding-side.

Aiming the above problem, the present disclosure provides a method that normatively constrains the maximum number of “ones” in the binary representation of the absolute value of all coefficients, except the central coefficient, to a low value such as 2 or 3 so that the decoder can choose to perform the multiplication using just 2 shifts and 1 addition or 3 shifts and 2 additions respectively, thereby improving the filtering efficiency.

On the encoding side, non-normatively, the constrained values are derived without solving the set of equations more than once. In some embodiments, the present disclosure harmonizes with the related art by first making some coefficients to be powers of 2, and then constraining the number of “ones” (the value of the digit is 1) in the binary representation of the absolute value of the remaining coefficients, except the central coefficient, to a low value.

In embodiments of the present disclosure, the method of ensuring that the constraint on the maximum number of “ones” in the binary representation of the absolute value of a multiplier coefficient of a filter is met happens on the encoding side and the multiplier coefficient of the filter is signaled to the decoder as an L-bit number in a stand-alone form or as a differential through temporal prediction. Other forms of signaling only the bit positions at which a “one” is present in the binary representation of the absolute value of the multiplier coefficient of the filter along with a sign bit is also possible. Hence, the embodiments differ only in the type of constraint and the method in which that is ensured on the encoding side without incurring any significant coding gain impact when compared to not placing such a constraint.

Basically, as described above, an encoder may derive the multiplier coefficients of the filter and then use the filter to filter the reconstructed images for further encoding. The encoder may also signal the multiplier coefficients of the filter to the decoder so that the decoder may use the multiplier coefficients of the filter to implement the filtering operation. Therefore, the multiplier coefficients of the filter are derived on the encoding-side, during which a constraint is met so as to simplify the filtering on both of the encoding-side and the decoding side. The specific process will be described in detail in the following with reference to specific embodiments.

Now embodiments of the present disclosure will be elaborated in detail as follows.

FIG. 16 is a schematic flowchart of a method for image filtering with a filter having adaptive multiplier coefficients according to an embodiment of the present disclosure.

For a M*M filter, the multiplier coefficients of the filter may include a central coefficient and remaining coefficients. Take FIG. 5B as an example, C12 is the central coefficient of this 7*7 filter and the other coefficients may be regarded as the remaining coefficients.

S1601: an encoder obtains the absolute value of the remaining coefficient.

The method for obtaining the absolute value of the remaining coefficient may be as same as those in prior art and is not described herein in details.

Here we denote the absolute value of the remaining coefficient with ABS_COEFF_VAL.

S1602: the encoder computes the number of non-zero bits in the absolute value of the remaining coefficient.

Here the absolute value of the remaining coefficient ABS_COEFF_VAL may be first represented in a binary representation with a predefined number of L digits. Thus, the number of non-zero bits may be computed from the most significant non-zero bit position, that is, by counting the “ones” in the binary representation of ABS_COEFF_VAL from the first “one” in the highest bit position.

For example, if the binary representation of ABS_COEFF_VAL is [0 1 1 0 1 1 0 0 0] , then counting from the first “one” on the second digit, the number of non-zero bits may be obtained as 4. In this example and the following description, we may use L=9 for illustration purpose, and the value of L may change according to actual requirements.

S1603: the encoder determines whether the number of non-zero bits is less than or equal to 3, if yes, the method proceeds to S1604; otherwise, the method proceeds to S1605.

S1604: the encoder leaves the value of the remaining coefficient unaltered.

S1605: the encoder obtains the constrained value of the remaining coefficient.

First, the ABS_COEFF_VAL_3_SIG_ONES is obtained by reserving only the first three significant “ones” in the binary representation of ABS_COEFF_VAL. Take the above example, the binary representation of ABS_COEFF_VAL is [0 1 1 0 1 1 0 0 0] , so the binary representation of ABS_COEFF_VAL_3_SIG_ONES may be [0 1 1 0 1 0 0 0 0] .

Then, if ABS_COEFF_VAL_3_SIG_ONES is not equal to a value corresponding to three ones at the most significant bits of the L-bit coefficient, a difference value between ABS_COEFF_VAL and ABS_COEFF_VAL_3_SIG_ONES, that is, ERROR_VAL is obtained.

After that, (ERROR_VAL >> 1) (shifting to right by 1 bit) is added to ABS_COEFF_VAL and the first three significant ones in this rounding error corrected value replaces ABS_COEFF_VAL_3_SIG_ONES.

Then the error between ABS_COEFF_VAL and ABS_COEFF_VAL_3_SIG_ONES is computed and the sign of the filter coefficient is attached and added to the central coefficient so as to ensure the normalization of all the multiplier coefficients of the filter.

After that, the sign of the remaining coefficient of the filter is attached to ABS_COEFF_VAL_3_SIG_ONES and this modified value is used for signaling the value of the multiplier coefficient of the filter in the bit-stream using the normative coding procedure for encoding the value of the multiplier coefficient of the filter.

On the encoding side, all the values of the remaining coefficients of each L*L filter are constrained according to the above steps S1601-S1605. In an alternate embodiment, the multiplier coefficients are partitioned into a plurality of groups based on their distance from the center. Starting from the group with the highest distance from the center, the errors between ABS_COEFF_VAL and ABS_COEFF_VAL_3_SIG_ONES of the multiplier coefficients in a given group are accumulated and re-distributed among the remaining group of coefficients in proportion to their signed coefficient value. The process is repeated till the central coefficient (which is in a singleton group) is reached.

In this embodiment, the constraint placed is to restrict the number of “ones” in the binary representation of the absolute value of all multiplier coefficients except the central coefficient to a value less than or equal to 3 (called as the constraint value) . Alternate embodiments constrain maximum number of “ones” in the binary representation of the absolute value of a multiplier coefficient of the filter to 2. All the related steps stated above apply where the constraint value of 3 is replaced by a value of 2.

As can be seen from the above steps, after applying the constraint on the encoding-side, for each remaining coefficient, the binary representation of the absolute value of said remaining coefficient with the predefined number L of digits includes at most three “ones” . If the maximum number of “ones” is constrained to be less than or equal to 2, then the binary representation of the absolute value of said remaining coefficient with the predefined number L of digits includes at most two “ones” .

By implementing the above method, the constraint is satisfied on the encoding side without any re-computation of multiplier coefficients of the filter by solving the Wiener Hopf equations.

S1606: the encoder signals the constrained multiplier coefficients to a decoder.

Once the multiplier coefficients are constrained, the encoder may signal the constrained multiplier coefficients to the decoder for further filtering operation.

S1607: the decoder determines values of the multiplier coefficients of the filter.

As can be seen from the above, the constraint applied on the multiplier coefficients except the central coefficient aims to constrain the value of the coefficient to simply an addition of at most three values, where these three values are different and each can be represented with a power of 2. In this way, the filtering operation may be simplified to simply shifting and addition operations. It should be noted that here on the decoding-side, the multiplier coefficients refer to the multiplier coefficients which have been constrained on the encoding-side and signaled from the encoder.

Therefore, it is necessary to recover the “ones” in the binary representation of the absolute value of the remaining coefficient so as to perform said shifting and addition operations.

On the decoding side, since the central coefficient is subject to no constraint, first the value of the central coefficient may be obtained using existing method; then the remaining coefficient may be recovered using different methods.

As described in S1606, the encoder may signal the value of the remaining coefficient to the decoder, so the decoder may determine a shift value of the remaining coefficient based on the binary representation of the absolute value of said remaining coefficient by position (or positions) of the first N “one” (or “ones” ) in the binary representation, where the shift value of the remaining coefficient represents the “ones” in the binary representation of the absolute value of said remaining coefficient. Here the expression “shift value” in a singular form is just for illustration purpose, each remaining coefficient may have several shit values, which are not limited herein.

For example, if the binary representation of the signaled remaining coefficient is [0 1 1 0 1 0 0 0 0] , then the shift values of this remaining coefficient may refer to the three ones respectively at the second, third and fifth digits.

Take the remaining coefficient with three shift values as an example, the shift values of said remaining coefficient may be obtained in various ways.

In one possible implementation manner, the shift values can be recovered by first computing the absolute value of the signaled and decoded value of the remaining coefficient, and then extracting the positions of up to first three significant “ones” in the binary representation of that number.

In another possible implementation manner, a look-up table can be used to get the up to three shift values given the absolute value. The multiplication can then be realized by applying the up to 3 shifts to the pixel value and adding the up to three shifted values. The look-up table represents a relationship between binary representations of absolute values with the predefined number L of digits and at most three “ones” , and said absolute values. That is, the look-up table records all the possible values whose binary representations have at most three “ones” . By traversing the look-up table, the shift value of the remaining coefficient can be determined.

S1608: the decoder filters the set of samples of the image.

After determining the values of the multiplier coefficients of the filter, the decoder may filter a set of samples of the image.

Since the binary representation of the remaining coefficient has been constrained on the encoding-side to have at most 3 “ones” , therefore, the filtering operation on the decoding-side (as well as on the encoding-side applied on the reconstructed images) is to left shift the samples by the shift value. It should be noted that if there are a plurality of shift values, then the samples may be left shifted by different digits, also, following the left shifting operation, additions may be performed to complete the filtering operation.

In an embodiment, the set of samples of the image is a set of samples of a video image.

In an embodiment, the multiplier coefficients are individually adapted for each picture and each pixel.

As already described above, the constrained multiplier coefficients may be used for filtering operation, and the above steps S1607-S1608 may also be implemented at the encoding side to filter the reconstructed image for further image encoding.

It should be noted that the main principle of the present disclosure is to constrain the number of “ones” in the binary representation of the absolute value of the remaining coefficients, those skilled in the art can know that there are various ways to implementation the constraint as long as the above principle is satisfied.

In the above embodiment show in in FIG. 16, all the remaining coefficients except the central coefficient are constrained at the encoding-side. In fact, it is also possible to constrain the remaining coefficients in different ways.

In another embodiment, before S1601, the central coefficient can be regarded as a first set (which is a singleton group) , the remaining coefficients can be split into two sets according to distances between the remaining coefficients and the central coefficient, the two sets may be: a second set of remaining coefficients at a distance of less than or equal to a predefined number, e.g., 2 from the central coefficient (called as mid-coeffs) , and a third set of remaining coefficients (called as rem-coeffs) . It should be noted that the distance between the mid-coeff and the central coefficient may be changed according to actual requirements.

The central coefficient may be subject to no constraint as described in the above embodiment, while the mid-coeffs and the rem-coeffs may subject to different constraints.

For the third set of rem-coeffs, the method starts with the rem-coeffs and restricts these coefficients so that the values of these coefficients can be represented by a power of 2 (i.e. retaining only the most significant bit position in the absolute value of the multiplier coefficient) .

For the second set of mid-coeffs, the mid-coeffs are then constrained as per the procedure described in the above embodiment to constrain the maximum number of “ones” to 3 or 2 in the absolute value of the coefficients. The differences between the originally computed value of the coefficient and the approximated value after the constraint are accumulated across rem-coeffs and mid-coeffs and added to the central coefficient value in order to conserve the total value of the filter coefficients.

It should be noted that the idea is to constrain the second set and the third set in different ways, rather than limiting the constraining sequence. The second set of mid-coeffs may be constrained before the third set of rem-coeffs, which is not limited herein.

After the constraining operation, the multiplier coefficients need to be signaled to the decoder, as described in S1606.

Optionally, the mid-coeffs and the central coefficient may be signaled as in the above embodiment.

Regarding the rem-coeffs, in one possible implementation manner, the encoder may directly signal the absolute value and the sign of each rem-coeff to the decoder. In another possible implementation manner, the encoder can signal the rem-coeffs by coding only the position of the most significant “one” and the sign of the rem-coeff.

Then, on the decoding side, the values of the mid-coeffs, the rem-coeffs and the central coefficient may be recovered as follows.

The values of the mid-coeffs may be recovered as described in the above embodiment.

Regarding the rem-coeffs, when the absolute value of the rem-coeff is signaled to the decoder, the decoder may determine the shift value of the rem-coeff as described in the above embodiment; when the position of the most significant “one” of the rem-coeff is signaled to the decoder, the decoder may directly obtain said position from decoding and then filter by performing the shifting operation according to the position.

The central coefficient value can be derived implicitly on the decoder-side by subtracting the sum of decoded rem-coeffs and mid-coeffs to maintain the value corresponding to the fixed-point precision at which the multiplier coefficients of the filter are represented.

Regarding the filtering operation on the decoding-side, the filtering using the rem-coeff may be performed by simply left shifting the samples by the shift value.

This embodiment further allows lowering of the multiplication complexity by using single shift for the rem-coeffs and multiple times of shifting and addition for the mid-coeffs.

FIG. 17 is a structural view of an apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients according to an embodiment of the present disclosure.

The apparatus 1700 includes a determining module 1701 and a filtering module 1702.

The determining module 1701 is configured to determine values of the multiplier coefficients of the filter, where the multiplier coefficients includes a central coefficient and remaining coefficients, and for each remaining coefficient, a binary representation of an absolute value of said remaining coefficient with a predefined number L of digits is constrained as including at most N “ones” , N equals to 2 or 3; the filtering module 1702 is configured to filter the set of samples of the image with the filter.

In an embodiment, the remaining coefficients are divided into two sets according to distances between the remaining coefficients and the central coefficient, the binary representation of the absolute value of each remaining coefficient in one set includes a single “one” .

In an embodiment, the determining module 1701 is specifically configured to: obtain the value of the central coefficient; determine a shift value of the remaining coefficient, where the shift value of the remaining coefficient represents the “ones” in the binary representation of the absolute value of said remaining coefficient. In an embodiment, the filtering module 1702 is specifically configured to left shift the samples by the shift value.

In an embodiment, the determining module 1701 is specifically configured to: obtain the absolute value of the remaining coefficient; determine the binary representation of the absolute value of said remaining coefficient; determine the shift value of the remaining coefficient based on the binary representation of the absolute value of said remaining coefficient by position (or positions) of the first N “one” (or “ones” ) in the binary representation.

In an embodiment, the determining module 1701 is specifically configured to: obtain the absolute value of the remaining coefficient; determine the shift value of the remaining coefficient by searching a pre-stored look-up table, where the look-up table represents a relationship between binary representations of absolute values with the predefined number L of digits and at most N “ones” , and said absolute values.

With the apparatus for image filtering with a filter having adaptive multiplier coefficients, the multiplication complexity during the filtering operation is lowered and the filtering efficiency is thus improved.

FIG. 18 is a structural view of an apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients according to an embodiment of the present disclosure. In an embodiment, the apparatus 1800 includes a determining module 1801 and a filtering module 1802, the determining module 1801 functions as same as the determining module 1701 described above, and the filtering module 1802 functions as same as the filtering module 1702 described above, which are not repeated herein again.

The apparatus 1800 further includes an adapting module 1803 which is configured to individually adapt the multiplier coefficients for each picture and each pixel.

The apparatus 1900 includes a processing circuitry 1901 which is configured to: determine values of the multiplier coefficients of the filter, and filter the set of samples of the image with the filter. Where the multiplier coefficients includes a central coefficient and remaining coefficients, and for each remaining coefficient, a binary representation of an absolute value of said remaining coefficient with a predefined number L of digits is constrained as including at most N “ones” , N equals to 2 or 3.

In an embodiment, the remaining coefficients are divided into two sets, the binary representation of the absolute value of each remaining coefficient in one set includes a single “one” .

In an embodiment, the processing circuitry 1901 is further configured to: obtain the value of the central coefficient; determine a shift value of the remaining coefficient, where the shift value of the remaining coefficient represents the “ones” in the binary representation of the absolute value of said remaining coefficient; and left shift the samples by the shift value.

In an embodiment, the processing circuitry 1901 is further configured to: obtain the absolute value of the remaining coefficient; determine the binary representation of the absolute value of said remaining coefficient; determine the shift value of the remaining coefficient based on the binary representation of the absolute value of said remaining coefficient by position (or positions) of the first N “one” (or “ones” ) in the binary representation.

In an embodiment, the processing circuitry 1901 is further configured to: obtain the absolute value of the remaining coefficient; determine the shift value of the remaining coefficient by searching a pre-stored look-up table, where the look-up table represents a relationship between binary representations of absolute values with the predefined number L of digits and at most N “ones” , and said absolute values.

In an embodiment, the processing circuitry 1901 is further configured to individually adapt the multiplier coefficients for each picture and each pixel.

The present disclosure also provides an apparatus for coding an image of a video sequence which includes a processor and a memory. The memory is storing instructions that cause the processor to perform the method according to the first aspect or any possible embodiment of the first aspect.

The present disclosure also provides a computer-readable storage medium having stored thereon instructions that when executed cause one or more processors configured to filter a set of samples of an image using a filter with adaptive multiplier coefficients. The instructions cause the one or more processors to perform a method according to the first aspect or any possible embodiment of the first aspect.

The present disclosure also provides an apparatus for encoding a current set of samples of an image including a plurality of pixels, the apparatus including: an encoder with a decoder for reconstructing the current set, and the apparatus according to the above embodiments.

The present disclosure also provides an apparatus for decoding a coded current set of samples of an image including a plurality of pixels, the apparatus including: a decoder for reconstructing the current set, and the apparatus according to the above embodiments.

The present disclosure also provides a terminal device, including an apparatus encoding a current set of samples of an image including a plurality of pixels according to the above embodiments and an apparatus for decoding a coded current set of samples of an image including a plurality of pixels according to the above embodiments.

A terminal device may be any one of the following devices: a smartphone, a mobile phone, a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA) , a handheld device capable of wireless communication, an on-board equipment, a wearable device, a computing device or other processing devices connecting to a wireless modem.

Terms such as “first” , “second” and the like in the specification and claims of the present disclosure as well as in the above drawings are intended to distinguish different objects, but not intended to define a particular order.

The term such as “and/or” in the embodiments of the present disclosure is merely used to describe an association between associated objects, which indicates that there may be three relationships, for example, A and/or B may indicate presence of A only, of both A and B, and of B only.

The term “a” or “an” is not intended to specify one or a single element, instead, it may be used to represent a plurality of elements where appropriate.

In the embodiments of the present disclosure, expressions such as “exemplary” or “for example” are used to indicate illustration of an example or an instance. In the embodiments of the present disclosure, any embodiment or design scheme described as “exemplary” or “for example” should not be interpreted as preferred or advantageous over other embodiments or design schemes. In particular, the use of “exemplary” or “for example” is aimed at presenting related concepts in a specific manner.

In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which corresponds to a tangible medium such as data storage media, or communication media including any medium that facilitates transfer of a computer program from one place to another, e.g., according to a communication protocol. In this manner, computer-readable media generally may correspond to (1) tangible computer-readable storage media which is non-transitory or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures for implementation of the techniques described in this disclosure. A computer program product may include a computer-readable medium.

By way of example, and not limitation, such computer-readable storage media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage, or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if instructions are transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) , or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. It should be understood, however, that computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other transitory media, but are instead directed to non-transitory, tangible storage media. Disk and disc, as used herein, includes compact disc (CD) , laser disc, optical disc, digital versatile disc (DVD) , floppy disk and Blu-ray disc, where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs) , general purpose microprocessors, application specific integrated circuits (ASICs) , field programmable logic arrays (FPGAs) , or other equivalent integrated or discrete logic circuitry. Accordingly, the term “processor, ” as used herein may refer to any of the foregoing structure or any other structure suitable for implementation of the techniques described herein. In addition, in some aspects, the functionality described herein may be provided within dedicated hardware and/or software modules configured for encoding and decoding, or incorporated in a combined codec. Also, the techniques could be fully implemented in one or more circuits or logic elements.

The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC) or a set of ICs (e.g., a chip set) . Various components, modules, or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require realization by different hardware units. Rather, as described above, various units may be combined in a codec hardware unit or provided by a collection of interoperative hardware units, including one or more processors as described above, in conjunction with suitable software and/or firmware.

Claims

A method for filtering a set of samples of an image using a filter with adaptive multiplier coefficients, comprising:

determining values of the multiplier coefficients of the filter, wherein the multiplier coefficients comprise a central coefficient and remaining coefficients, and for each remaining coefficient, a binary representation of an absolute value of said remaining coefficient with a predefined number L of digits is constrained as comprising at most N “ones” , N equals to 2 or 3; and

filtering the set of samples of the image with the filter.
The method according to claim 1, wherein the remaining coefficients are divided into two sets according to distances between the remaining coefficients and the central coefficient, the binary representation of the absolute value of each remaining coefficient in one set comprises a single “one” .
The method according to claim 1 or 2, wherein the determining values of the multiplier coefficients of the filter comprises:

obtaining the value of the central coefficient;

determining a shift value of the remaining coefficient, wherein the shift value of the remaining coefficient represents the “ones” in the binary representation of the absolute value of said remaining coefficient; and

the filtering the set of samples of the image with the filter with the remaining coefficient comprising:

left shifting the samples by the shift value.
The method according to claim 3, wherein the determining a shift value of the remaining coefficient comprises:

obtaining the absolute value of the remaining coefficient;

determining the binary representation of the absolute value of said remaining coefficient;

determining the shift value of the remaining coefficient based on the binary representation of the absolute value of said remaining coefficient by position/positions of the first N “one” / “ones” in the binary representation.
The method according to claim 3, wherein the determining a shift value of the remaining coefficient comprises:

obtaining the absolute value of the remaining coefficient;

determining the shift value of the remaining coefficient by searching a pre-stored look-up table, wherein the look-up table represents a relationship between binary representations of absolute values with the predefined number L of digits and at most N “ones” , and said absolute values.
The method according to any one of claims 1 to 5, wherein the set of samples of the image is a set of samples of a video image.
The method according to claim 6, wherein the multiplier coefficients are individually adapted for each picture and each pixel.
An apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients, comprising:

a determining module, configured to determine values of the multiplier coefficients of the filter, wherein the multiplier coefficients comprises a central coefficient and remaining coefficients, and for each remaining coefficient, a binary representation of an absolute value of said remaining coefficient with a predefined number L of is constrained as comprising at most N “ones” , N equals to 2 or 3; and

a filtering module, configured to filter the set of samples of the image with the filter.
The apparatus according to claim 8, wherein the remaining coefficients are divided into two sets according to distances between the remaining coefficients and the central coefficient, the binary representation of the absolute value of each remaining coefficient in one set comprises a single “one” .
The apparatus according to claim 8 or 9, wherein the determining module is specifically configured to:

obtain the value of the central coefficient;

determine a shift value of the remaining coefficient, wherein the shift value of the remaining coefficient represents the “ones” in the binary representation of the absolute value of said remaining coefficient; and

the filtering module is specifically configured to:

left shift the samples by the shift value.
The apparatus according to claim 10, wherein the determining module is specifically configured to:

obtain the absolute value of the remaining coefficient;

determine the binary representation of the absolute value of said remaining coefficient;

determine the shift value of the remaining coefficient based on the binary representation of the absolute value of said remaining coefficient by position/positions of the first N “one” / “ones” in the binary representation.
The apparatus according to claim 11, wherein the determining module is specifically configured to:

obtain the absolute value of the remaining coefficient;

determine the shift value of the remaining coefficient by searching a pre-stored look-up table, wherein the look-up table represents a relationship between binary representations of absolute values with the predefined number L of digits and at most N “ones” , and said absolute values.
The apparatus according to any one of claims 8 to 12, wherein the set of samples of the image is a set of samples of a video image.
The apparatus according to claim 13, further comprising an adapting module configured to individually adapt the multiplier coefficients for each picture and each pixel.
An apparatus for filtering a set of samples of an image using a filter with adaptive multiplier coefficients, comprising:

a processing circuitry which is configured to:

determine values of the multiplier coefficients of the filter, wherein the multiplier coefficients comprises a central coefficient and remaining coefficients, and for each remaining coefficient, a binary representation of an absolute value of said remaining coefficient with a predefined number L of is constrained as comprising at most N “ones” , N equals to 2 or 3; and

filter the set of samples of the image with the filter.
The apparatus according to claim 15, wherein the remaining coefficients are divided into two sets according to distances between the remaining coefficients and the central coefficient, the binary representation of the absolute value of each remaining coefficient in one set comprises a single “one” .
The apparatus according to claim 15 or 16, wherein the processing circuitry is further configured to:

obtain the value of the central coefficient;

determine a shift value of the remaining coefficient, wherein the shift value of the remaining coefficient represents the “ones” in the binary representation of the absolute value of said remaining coefficient; and

left shift the samples by the shift value.
The apparatus according to claim 17, wherein the processing circuitry is further configured to:

obtain the absolute value of the remaining coefficient;

determine the binary representation of the absolute value of said remaining coefficient;

determine the shift value of the remaining coefficient based on the binary representation of the absolute value of said remaining coefficient by position/positions of the first N “one” / “ones” in the binary representation.
The apparatus according to claim 17, wherein the processing circuitry is further configured to:

obtaining the absolute value of the remaining coefficient;

determine the shift value of the remaining coefficient by searching a pre-stored look-up table, wherein the look-up table represents a relationship between binary representations of absolute values with the predefined number L of digits and at most N “ones” , and said absolute values.
The apparatus according to any one of claims 15 to 19, wherein the set of samples of the image is a set of samples of a video image.
The apparatus according to claim 20, wherein the processing circuitry is further configured to individually adapt the multiplier coefficients for each picture and each pixel.
An apparatus for encoding a current set of samples of an image including a plurality of pixels, the apparatus comprising:

an encoder with a decoder for reconstructing the current set, and

the apparatus according to any one of claims 8 to 14 for filtering the reconstructed set.
An apparatus for encoding a current set of samples of an image including a plurality of pixels, the apparatus comprising:

an encoder with a decoder for reconstructing the current set, and

the apparatus according to any one of claims 15 to 21 for filtering the reconstructed set.
An apparatus for decoding a coded current set of samples of an image including a plurality of pixels, the apparatus comprising:

a decoder for reconstructing the current set, and

the apparatus according to any one of claims 8 to 14 for filtering the reconstructed set.
An apparatus for decoding a coded current set of samples of an image including a plurality of pixels, the apparatus comprising:

a decoder for reconstructing the current set, and

the apparatus according to any one of claims 15 to 21 for filtering the reconstructed set.
A terminal device, comprising an apparatus for encoding a current set of samples of an image including a plurality of pixels according to claim 22 and an apparatus for decoding a coded current set of samples of an image including a plurality of pixels according to claim 24.
A terminal device, comprising an apparatus for encoding a current set of samples of an image including a plurality of pixels according to claim 23 and an apparatus for decoding a coded current set of samples of an image including a plurality of pixels according to claim 25.