WO2020062496A1 - Driving circuit - Google Patents

Driving circuit Download PDF

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Publication number
WO2020062496A1
WO2020062496A1 PCT/CN2018/116121 CN2018116121W WO2020062496A1 WO 2020062496 A1 WO2020062496 A1 WO 2020062496A1 CN 2018116121 W CN2018116121 W CN 2018116121W WO 2020062496 A1 WO2020062496 A1 WO 2020062496A1
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WO
WIPO (PCT)
Prior art keywords
voltage
terminal
comparator
module
resistor
Prior art date
Application number
PCT/CN2018/116121
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French (fr)
Chinese (zh)
Inventor
李文芳
Original Assignee
深圳市华星光电技术有限公司
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Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Publication of WO2020062496A1 publication Critical patent/WO2020062496A1/en

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0291Details of output amplifiers or buffers arranged for use in a driving circuit

Definitions

  • the present invention relates to a driving circuit, and more particularly to a driving circuit applied to a level shifter.
  • the active matrix liquid crystal display includes a thin film transistor (TFT) as a switching element in each pixel.
  • TFT thin film transistor
  • the active matrix liquid crystal display can be made smaller than a cathode ray tube (CRT), and thus can be applied to display units of portable information equipment, office equipment, computers, and the like.
  • the active matrix liquid crystal display can be applied to a television, and thus quickly replaces a cathode ray tube.
  • the liquid crystal display includes a liquid crystal display panel, a backlight unit that provides light to the liquid crystal display panel, and a data driving circuit for supplying a data voltage to a data line of the liquid crystal display panel.
  • the liquid crystal display further includes a power supply device for generating a data voltage of the liquid crystal display panel, an on-voltage VGH and an off-voltage VGL of the TFT, and a power supply voltage VCC of the data driving circuit and the gate driving circuit and the timing controller.
  • the power supply unit of the liquid crystal display is integrated into an integrated circuit (IC).
  • IC integrated circuit
  • an IC in which a power supply device is embedded is referred to as a power 1C.
  • LCD power ICs have under voltage lockout lock out, UVLO) module.
  • UVLO voltage lockout lock out
  • the power IC When the input voltage Vin of the power IC reaches a previously predetermined level of the UVLO module, the power IC generates an internal logic voltage VL and starts the internal logic.
  • the internal logic When the internal logic is activated, the power IC generates an output voltage Vout.
  • the gate driving circuit of the liquid crystal display includes a level shifter and a shift register.
  • a shift register can be formed on a substrate together with a TFT array, and a TFT array of a liquid crystal display panel is formed on the substrate.
  • the level shifter may be formed on a printed circuit board (PCB), which is electrically connected to a substrate of the liquid crystal display panel.
  • the level shifter outputs a clock signal swinging between the gate high voltage VGH and the gate low voltage VGL under the control of the timing controller.
  • the voltage of the gate high voltage VGH is set to be equal to or greater than a threshold voltage of a TFT included in a TFT array of a liquid crystal display panel.
  • the voltage of the gate low voltage VGL is set to be smaller than a threshold voltage of a TFT included in a TFT array of a liquid crystal display panel.
  • the shift register sequentially shifts clock signals received from the level shifter, and sequentially supplies gate pulses to the gate lines of the liquid crystal display panel.
  • An object of the present invention is to provide a driving circuit that utilizes the design of a delay module to ensure that the voltage comparator does not start to operate until the voltage reaches a preset voltage value, so as to avoid abnormal output of the level shifter.
  • an embodiment of the present invention provides a driving circuit.
  • the driving circuit includes a linear regulator, an amplifier module, a comparator module, and a delay module.
  • the linear regulator has an input terminal. And an output terminal, wherein the input terminal of the linear regulator is electrically connected to a conducting voltage, the linear regulator is configured to enable the output terminal to output a stable voltage;
  • the amplifier module has two input terminals and An output terminal, wherein one input terminal of the amplifier module is electrically connected to the output terminal of the linear regulator, the output terminal of the amplifier module is fed back to the other input terminal of the amplifier module, and the amplifier module is configured The stable voltage is received by the linear regulator.
  • the stable voltage is reduced by the amplifier module, and an adjustment voltage is output from the output terminal of the amplifier module.
  • the comparator module has two input terminals. And an output terminal, wherein an input terminal of the comparator module is electrically connected to the turn-on voltage, and another of the comparator module is The input terminal is configured to receive the adjustment voltage, the output terminal is electrically connected to a circuit to be driven, and the comparator module is configured to compare the on-voltage with the adjustment voltage, and then the An output terminal of the comparator module outputs a driving voltage to drive the circuit to be driven;
  • the delay module has an input terminal and an output terminal, wherein the input terminal of the delay module is electrically connected to the linear regulator.
  • the comparator module is configured to receive an activation signal output from the output terminal of the delay module; when the stable voltage received by the input terminal of the delay module is less than a set voltage, the activation signal is A low level causes the voltage comparator in the comparator module to be turned off. When the stable voltage received by the input terminal of the delay module is equal to or greater than the set voltage, the activation signal is a high voltage Level so that the voltage comparator is turned on, and the output terminal of the voltage comparator is connected to the circuit to be driven.
  • the comparator module has the voltage comparator, a first resistor and a second resistor, wherein two terminals of the second resistor are electrically connected to the on-voltage and A first terminal of the voltage comparator and two terminals of the first resistor are electrically connected to the first terminal of the voltage comparator and ground, respectively, wherein the first terminal of the voltage comparator is configured to receive the voltage comparator.
  • the divided voltage of an input terminal of the comparator module, a second terminal of the voltage comparator is another input terminal of the comparator module, and an output terminal of the voltage comparator is an output of the comparator module end.
  • a first terminal of the voltage comparator is a non-inverting output terminal
  • a second terminal of the voltage comparator is an inverting input terminal
  • an output terminal of the voltage comparator is connected To the under-voltage lockout module of the circuit to be driven.
  • a ratio of a resistance value of the first resistor to a resistance value of the second resistor is 1:29.
  • the voltage of the voltage comparator when a voltage at the first terminal of the voltage comparator is greater than a voltage at the second terminal of the voltage comparator, and the on-voltage is greater than 16V, the voltage of the voltage comparator The output terminal outputs a high level.
  • the amplifier module has an operational amplifier, a third resistor, a fourth resistor, and a fifth resistor, wherein a first end of the operational amplifier is an input of the amplifier module. Two ends of the fifth resistor are electrically connected to a second end and an output end of the operational amplifier, respectively, and two ends of the fourth resistor are electrically connected to the second end of the operational amplifier and an output end, respectively.
  • the third resistor, and two terminals of the third resistor are electrically connected to the second terminal of the voltage comparator and ground respectively.
  • a ratio of a resistance value of the third resistor to a resistance value of the fourth resistor is 1: 5.
  • a first terminal of the operational amplifier is a non-inverting output terminal, and a second terminal of the operational amplifier is an inverting input terminal.
  • the set voltage is 0.5V.
  • the on-voltage is a gate high voltage output by a level shifter under the control of a timing controller.
  • an embodiment of the present invention provides a driving circuit.
  • the driving circuit includes a linear regulator, an amplifier module, a comparator module, and a delay module.
  • the linear regulator has an input terminal. And an output terminal, wherein the input terminal of the linear regulator is electrically connected to a conducting voltage, the linear regulator is configured to enable the output terminal to output a stable voltage;
  • the amplifier module has two input terminals and An output terminal, wherein one input terminal of the amplifier module is electrically connected to the output terminal of the linear regulator, the output terminal of the amplifier module is fed back to the other input terminal of the amplifier module, and the amplifier module is configured The stable voltage is received by the linear regulator.
  • the stable voltage is reduced by the amplifier module, and an adjustment voltage is output from the output terminal of the amplifier module.
  • the comparator module has two input terminals. And an output terminal, wherein an input terminal of the comparator module is electrically connected to the turn-on voltage, and another of the comparator module is The input terminal is configured to receive the adjustment voltage, the output terminal is electrically connected to a circuit to be driven, and the comparator module is configured to compare the on-voltage with the adjustment voltage, and then the An output terminal of the comparator module outputs a driving voltage to drive the circuit to be driven;
  • the delay module has an input terminal and an output terminal, wherein the input terminal of the delay module is electrically connected to the linear regulator.
  • the comparator module is configured to receive an activation signal output from the output terminal of the delay module; when the stable voltage received by the input terminal of the delay module is less than a set voltage, the activation signal is A low level causes the voltage comparator in the comparator module to be turned off. When the stable voltage received by the input terminal of the delay module is equal to or greater than the set voltage, the activation signal is a high voltage Level so that the voltage comparator is turned on.
  • the comparator module has the voltage comparator, a first resistor and a second resistor, wherein two terminals of the second resistor are electrically connected to the on-voltage and A first terminal of the voltage comparator and two terminals of the first resistor are electrically connected to the first terminal of the voltage comparator and ground, respectively, wherein the first terminal of the voltage comparator is configured to receive the voltage comparator.
  • the divided voltage of an input terminal of the comparator module, a second terminal of the voltage comparator is another input terminal of the comparator module, and an output terminal of the voltage comparator is an output of the comparator module end.
  • a first terminal of the voltage comparator is a non-inverting output terminal
  • a second terminal of the voltage comparator is an inverting input terminal
  • an output terminal of the voltage comparator is connected To the under-voltage lockout module of the circuit to be driven.
  • a ratio of a resistance value of the first resistor to a resistance value of the second resistor is 1:29.
  • the voltage of the voltage comparator when a voltage at the first terminal of the voltage comparator is greater than a voltage at the second terminal of the voltage comparator, and the on-voltage is greater than 16V, the voltage of the voltage comparator The output terminal outputs a high level.
  • the amplifier module has an operational amplifier, a third resistor, a fourth resistor, and a fifth resistor, wherein a first end of the operational amplifier is an input of the amplifier module. Two ends of the fifth resistor are electrically connected to a second end and an output end of the operational amplifier, respectively, and two ends of the fourth resistor are electrically connected to the second end of the operational amplifier and an output end, respectively.
  • the third resistor, and two terminals of the third resistor are electrically connected to the second terminal of the voltage comparator and ground respectively.
  • a ratio of a resistance value of the third resistor to a resistance value of the fourth resistor is 1: 5.
  • a first terminal of the operational amplifier is a non-inverting output terminal, and a second terminal of the operational amplifier is an inverting input terminal.
  • the set voltage is 0.5V.
  • the on-voltage is a gate high voltage output by a level shifter under the control of a timing controller.
  • the beneficial effect of the present invention is: through the design of the delay module, it can be ensured that the voltage comparator is turned on only after the voltage of the second terminal of the voltage comparator is equal to or greater than a voltage value, thereby ensuring the voltage After the voltage at the second terminal of the comparator reaches the voltage value, the voltage comparator starts to work to avoid abnormal output of the level shifter.
  • FIG. 1 is a schematic diagram of a preferred embodiment of the driving circuit of the present invention.
  • FIG. 1 is a schematic diagram of a preferred embodiment of a driving circuit of the present invention.
  • the driving circuit includes a linear regulator 2, an amplifier module 3, a comparator module 4, and a delay module 5.
  • the present invention will explain in detail the detailed structure, assembly relationship, and operation principle of the above components of the embodiments. .
  • the linear regulator 2 has an input terminal 21 and an output terminal 22, wherein the input terminal 21 of the linear regulator 2 is electrically connected to a conducting voltage VGH, and the linear adjustment The device 2 is configured to enable the output terminal 22 to output a stable voltage, for example, a 3V voltage.
  • the on-voltage VGH is a gate high voltage output by a level shifter (not shown) under the control of a timing controller.
  • the amplifier module 3 has two input terminals 31, 32 and an output terminal 33.
  • One input terminal 31 of the amplifier module 3 is electrically connected to the output terminal 22 of the linear regulator 2.
  • An output terminal 33 of the amplifier module 3 is fed back to another input terminal 32 of the amplifier module 3, and the amplifier module 3 is configured to receive the stable voltage output by the linear regulator 2, and the stable The voltage is reduced by the amplifier module 3, and an adjustment voltage is output from the output terminal 33 of the amplifier module 3.
  • the amplifier module 3 has an operational amplifier 34, a third resistor R3, a fourth resistor R4, and a fifth resistor R5, wherein a first A terminal is an input terminal 31 of the amplifier module 3, an output terminal of the operational amplifier 34 is an output terminal 33 of the amplifier module 3, and two terminals of the fifth resistor R5 are electrically connected to the operational amplifier 34, respectively.
  • a second terminal of the operational amplifier 34 and two terminals of the fourth resistor R4 are electrically connected to the second terminal of the operational amplifier 34 and the third resistor R3, and the third resistor Two terminals of R3 are electrically connected to the comparator module 4 and ground respectively.
  • a ratio of a resistance value of the third resistor R3 to a resistance value of the fourth resistor R4 is 1: 5, for example, the third resistor R3 is 1 ohm, and the fourth resistor The resistance R4 is 5 ohms.
  • the adjusted voltage is output to the comparator module 4 through a divided voltage of the third resistor R3 and the fourth resistor R4.
  • a first terminal of the operational amplifier 34 is a non-inverting output terminal, and a second terminal of the operational amplifier 34 is an inverting input terminal.
  • the comparator module 4 has two input terminals 41, 42 and an output terminal 43.
  • An input terminal 41 of the comparator module 4 is electrically connected to the on-voltage VGH.
  • the other input terminal of the comparator module 42 is electrically connected to the third resistor R3 and the fourth resistor R4 of the amplifier module 3, and the output terminal 43 is electrically connected to a circuit to be driven (not shown).
  • the output terminal 43 of the voltage comparator 44 is connected to an under-voltage lockout module (not shown) of the circuit to be driven, and the comparator module 4 is configured to connect the on-voltage VGH and the adjusted voltage after dividing by the third resistor R3 and the fourth resistor R4 are compared, and then a driving voltage UVLO is output from the output terminal of the comparator module 4 to drive the under voltage Press the lock module.
  • the comparator module 4 has a voltage comparator 44, a first resistor R1 and a second resistor R2, wherein two ends of the second resistor R2 are electrically connected respectively.
  • the on-voltage VGH and a first terminal of the voltage comparator 44, and two terminals of the first resistor R1 are electrically connected to the first terminal of the voltage comparator 44 and ground, respectively, wherein the voltage comparison
  • a first terminal of the comparator 44 is configured to receive a divided voltage from an input terminal 41 of the comparator module 4 through the first resistor R1 and the second resistor R2, and a second terminal of the voltage comparator 44 It is the other input terminal 42 of the comparator module 4, and an output terminal of the voltage comparator 44 is the output terminal 43 of the comparator module 4.
  • a first terminal of the voltage comparator 44 is a non-inverting output terminal, and a second terminal of the voltage comparator 44 is an inverting input terminal.
  • the voltage comparator 44 when a voltage at the first terminal of the voltage comparator 44 is greater than a voltage at the second terminal of the voltage comparator 44 and the on-voltage VGH is greater than 16V, the voltage comparator 44 The output terminal outputs a high level.
  • a ratio of a resistance value of the first resistor R1 to a resistance value of the second resistor R2 is 1:29.
  • the first resistor R1 is 1 ohm
  • the second resistor R2 is 29 ohms.
  • the delay module 5 has an input terminal 51 and an output terminal 52.
  • the input terminal 51 of the delay module 5 is electrically connected to the output terminal 22 of the linear regulator 2.
  • the voltage comparator 44 of the comparator module 4 is configured to receive an activation signal output from the output terminal 52 of the delay module 5.
  • the delay module 5 is configured to generate the activation signal according to the stable voltage of the output terminal 22 of the linear regulator 2 to enable or disable the voltage comparator 44.
  • the activation signal when the stable voltage received by the input terminal 51 of the delay module 5 is less than a set voltage, the activation signal is a low level, so that the voltage comparator 44 is turned off.
  • the stable voltage received by the input terminal 51 of the delay module 5 is equal to or greater than the set voltage, and the activation signal is a high level, so that the voltage comparator 44 is turned on.
  • the set voltage is 0.5V.
  • the voltage of the first terminal of the voltage comparator 44 is greater than the voltage of the second terminal of the voltage comparator 44 and the voltage of the voltage comparator 44
  • the voltage comparator 44 is turned off, and the driving voltage UVLO is at a low level, so that the level shifter has no output signal.
  • the voltage of the second terminal of the voltage comparator 44 is equal to or greater than 0.5V, the activation signal is at a high level, and the voltage comparator 44 is turned on.
  • the voltage of the first terminal of the voltage comparator 44 is greater than The voltage of the second terminal of the voltage comparator 44, the voltage of the on-voltage VGH is greater than 16V, and the driving voltage UVLO is at a high level, so that the level shifter normally outputs a signal.
  • the voltage of the second terminal of the voltage comparator 44 is equal to or greater than a voltage value, for example, 0.5V, and the voltage comparator 44 is turned on. It can be ensured that after the voltage of the second terminal of the voltage comparator 44 reaches the voltage value, for example, 0.5V, the voltage comparator 44 starts to work, so as to avoid abnormal output of the level shifter.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electronic Switches (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A driving circuit comprises a linear regulator (2), an amplifier module (3), a comparator module (4), and a delay module (5). When a stable voltage received at an input terminal (51) of the delay module (5) is less than a preset voltage, a voltage comparator (44) of the comparator module (4) is turned off, and when the stable voltage received at the input terminal (51) of the delay module (5) is equal to or greater than the preset voltage, the voltage comparator (44) is turned on, thereby preventing a level shifter from having an abnormal output.

Description

驱动电路Drive circuit 技术领域Technical field
本发明是有关于一种驱动电路,特别是有关于一种应用在电平移位器的驱动电路。The present invention relates to a driving circuit, and more particularly to a driving circuit applied to a level shifter.
背景技术Background technique
有源矩阵液晶显示器包括在每个像素中的作为开关元件的薄膜晶体管(TFT)。有源矩阵液晶显示器可制造得比阴极射线管(CRT)小,并因而可应用于便携式信息设备、办公设备和计算机等的显示单元。此外,有源矩阵液晶显示器可应用于电视机,并因而快速地取代阴极射线管。The active matrix liquid crystal display includes a thin film transistor (TFT) as a switching element in each pixel. The active matrix liquid crystal display can be made smaller than a cathode ray tube (CRT), and thus can be applied to display units of portable information equipment, office equipment, computers, and the like. In addition, the active matrix liquid crystal display can be applied to a television, and thus quickly replaces a cathode ray tube.
液晶显示器包括液晶显示面板、给液晶显示面板提供光的背光单元、用于将数据电压提供给液晶显示面板的数据线的数据驱动电路,用于将栅极脉冲(即扫描脉冲)提供给液晶显示面板的栅极线(即扫描线)的栅极驱动电路、用于控制所述数据驱动电路和栅极驱动电路等的操作时序的时序控制器。液晶显示器还包括电源装置,所述电源装置用于产生液晶显示面板的数据电压、TFT的导通电压VGH和截止电压VGL以及数据驱动电路和栅极驱动电路和时序控制器的电源电压VCC。The liquid crystal display includes a liquid crystal display panel, a backlight unit that provides light to the liquid crystal display panel, and a data driving circuit for supplying a data voltage to a data line of the liquid crystal display panel. A gate driving circuit of a gate line (ie, a scanning line) of the panel, and a timing controller for controlling an operation timing of the data driving circuit, the gate driving circuit, and the like. The liquid crystal display further includes a power supply device for generating a data voltage of the liquid crystal display panel, an on-voltage VGH and an off-voltage VGL of the TFT, and a power supply voltage VCC of the data driving circuit and the gate driving circuit and the timing controller.
液晶显示器的电源装置被集成到一个集成电路(IC)中。以下将嵌入有电源装置的IC称为功率1C。当液晶显示器的功率开关打开时,功率IC的输入电压Vin升高。The power supply unit of the liquid crystal display is integrated into an integrated circuit (IC). Hereinafter, an IC in which a power supply device is embedded is referred to as a power 1C. When the power switch of the liquid crystal display is turned on, the input voltage Vin of the power IC rises.
液晶显示器的功率IC具有欠压锁定(under voltage lock out,UVLO)模块。当功率IC的输入电压Vin达到UVLO模块的先前预定的电平时,功率IC产生内部逻辑电压VL并启动内部逻辑。当内部逻辑启动时功率IC产生输出电压Vout。LCD power ICs have under voltage lockout lock out, UVLO) module. When the input voltage Vin of the power IC reaches a previously predetermined level of the UVLO module, the power IC generates an internal logic voltage VL and starts the internal logic. When the internal logic is activated, the power IC generates an output voltage Vout.
液晶显示器的栅极驱动电路包括电平移位器和移位寄存器。随着面板内栅极(GIP)工艺技术的发展,移位寄存器可与TFT阵列一道形成在基板上,在所述基板上形成有液晶显示面板的TFT阵列。电平移位器可形成在印刷电路板(PCB)上,所述印刷电路板与液晶显示面板的基板电连接。电平移位器在时序控制器的控制下输出在栅高电压VGH与栅低电压VGL之间摆动的时钟信号。栅高电压VGH的电压被设定为等于或大于TFT的阈值电压,所述TFT被包括在液晶显示面板的TFT阵列中。栅低电压VGL的电压被设定为小于TFT的阈值电压,所述TFT被包括在液晶显示面板的TFT阵列中。移位寄存器顺序地移位从电平移位器接收的时钟信号,并将栅极脉冲顺序地提供给液晶显示面板的栅极线。The gate driving circuit of the liquid crystal display includes a level shifter and a shift register. With the development of the gate-in-panel (GIP) process technology, a shift register can be formed on a substrate together with a TFT array, and a TFT array of a liquid crystal display panel is formed on the substrate. The level shifter may be formed on a printed circuit board (PCB), which is electrically connected to a substrate of the liquid crystal display panel. The level shifter outputs a clock signal swinging between the gate high voltage VGH and the gate low voltage VGL under the control of the timing controller. The voltage of the gate high voltage VGH is set to be equal to or greater than a threshold voltage of a TFT included in a TFT array of a liquid crystal display panel. The voltage of the gate low voltage VGL is set to be smaller than a threshold voltage of a TFT included in a TFT array of a liquid crystal display panel. The shift register sequentially shifts clock signals received from the level shifter, and sequentially supplies gate pulses to the gate lines of the liquid crystal display panel.
然而,当栅高电压VGH上升时间太快时,即栅高电压VGH的电压还未到达正确的电压,使得输出至UVLO模块的电压会下降,导致所述电平移位器输出异常。However, when the rise time of the gate high voltage VGH is too fast, that is, the voltage of the gate high voltage VGH has not reached the correct voltage, so that the voltage output to the UVLO module will drop, resulting in an abnormal output of the level shifter.
技术问题technical problem
本发明的目的在于提供一种驱动电路,利用延迟模块的设计,能够确保电压比较器在电压达到预设的电压值以后才开始工作,以避免电平移位器输出异常。An object of the present invention is to provide a driving circuit that utilizes the design of a delay module to ensure that the voltage comparator does not start to operate until the voltage reaches a preset voltage value, so as to avoid abnormal output of the level shifter.
技术解决方案Technical solutions
为解决上述问题,本发明提供的技术方案如下:To solve the above problems, the technical solution provided by the present invention is as follows:
为达成本发明的前述目的,本发明一实施例提供一种驱动电路,所述驱动电路包括一线性调整器、一放大器模块、一比较器模块及一延迟模块;所述线性调整器具有一输入端及一输出端,其中所述线性调整器的输入端电性连接至一导通电压,所述线性调整器配置用以使所述输出端输出一稳定电压;所述放大器模块具有二输入端及一输出端,其中所述放大器模块的一输入端电性连接所述线性调整器的输出端,所述放大器模块的输出端回授至所述放大器模块的另一输入端,所述放大器模块配置用以接收所述线性调整器输出的所述稳定电压,所述稳定电压通过所述放大器模块降低增益,并且由所述放大器模块的输出端输出一调整电压;所述比较器模块具有二输入端及一输出端,其中所述比较器模块的一输入端电性连接所述导通电压,所述比较器模块的另一输入端配置用以接收所述调整电压,所述输出端电性连接至一待驱动电路,所述比较器模块配置用以将所述导通电压及所述调整电压进行比对,进而由所述比较器模块的输出端输出一驱动电压,以驱动所述待驱动电路;所述延迟模块具有一输入端及一输出端,其中所述延迟模块的输入端电性连接所述线性调整器的输出端,所述比较器模块配置用以接收所述延迟模块的输出端输出的一激活信号;当所述延迟模块的输入端接收的所述稳定电压小于一设定电压,所述激活信号为一低电平,使得所述比较器模块中的电压比较器被关闭,当所述延迟模块的输入端接收的所述稳定电压等于或大于所述设定电压,所述激活信号为一高电平,使得所述电压比较器被开启,所述电压比较器的输出端连接至所述待驱动电路。To achieve the foregoing object of the present invention, an embodiment of the present invention provides a driving circuit. The driving circuit includes a linear regulator, an amplifier module, a comparator module, and a delay module. The linear regulator has an input terminal. And an output terminal, wherein the input terminal of the linear regulator is electrically connected to a conducting voltage, the linear regulator is configured to enable the output terminal to output a stable voltage; the amplifier module has two input terminals and An output terminal, wherein one input terminal of the amplifier module is electrically connected to the output terminal of the linear regulator, the output terminal of the amplifier module is fed back to the other input terminal of the amplifier module, and the amplifier module is configured The stable voltage is received by the linear regulator. The stable voltage is reduced by the amplifier module, and an adjustment voltage is output from the output terminal of the amplifier module. The comparator module has two input terminals. And an output terminal, wherein an input terminal of the comparator module is electrically connected to the turn-on voltage, and another of the comparator module is The input terminal is configured to receive the adjustment voltage, the output terminal is electrically connected to a circuit to be driven, and the comparator module is configured to compare the on-voltage with the adjustment voltage, and then the An output terminal of the comparator module outputs a driving voltage to drive the circuit to be driven; the delay module has an input terminal and an output terminal, wherein the input terminal of the delay module is electrically connected to the linear regulator. An output terminal, the comparator module is configured to receive an activation signal output from the output terminal of the delay module; when the stable voltage received by the input terminal of the delay module is less than a set voltage, the activation signal is A low level causes the voltage comparator in the comparator module to be turned off. When the stable voltage received by the input terminal of the delay module is equal to or greater than the set voltage, the activation signal is a high voltage Level so that the voltage comparator is turned on, and the output terminal of the voltage comparator is connected to the circuit to be driven.
在本发明的一实施例中,所述比较器模块具有所述电压比较器、一第一电阻及一第二电阻,其中所述第二电阻的二端分别电性连接所述导通电压及所述电压比较器的一第一端,所述第一电阻的二端分别电性连接所述电压比较器的第一端及接地,其中所述电压比较器的第一端配置用以接收所述比较器模块的一输入端的分压,所述电压比较器的一第二端为所述比较器模块的另一输入端,所述电压比较器的一输出端为所述比较器模块的输出端。In an embodiment of the present invention, the comparator module has the voltage comparator, a first resistor and a second resistor, wherein two terminals of the second resistor are electrically connected to the on-voltage and A first terminal of the voltage comparator and two terminals of the first resistor are electrically connected to the first terminal of the voltage comparator and ground, respectively, wherein the first terminal of the voltage comparator is configured to receive the voltage comparator. The divided voltage of an input terminal of the comparator module, a second terminal of the voltage comparator is another input terminal of the comparator module, and an output terminal of the voltage comparator is an output of the comparator module end.
在本发明的一实施例中,所述电压比较器的第一端为一正相输出端,所述电压比较器的第二端为一反相输入端,所述电压比较器的输出端连接至所述待驱动电路的欠压锁定模块。In an embodiment of the present invention, a first terminal of the voltage comparator is a non-inverting output terminal, a second terminal of the voltage comparator is an inverting input terminal, and an output terminal of the voltage comparator is connected To the under-voltage lockout module of the circuit to be driven.
在本发明的一实施例中,所述第一电阻的一电阻值及所述第二电阻的一电阻值的比例为1:29。In an embodiment of the present invention, a ratio of a resistance value of the first resistor to a resistance value of the second resistor is 1:29.
在本发明的一实施例中,当所述电压比较器的第一端的一电压大于所述电压比较器的第二端的一电压,且所述导通电压大于16V,所述电压比较器的输出端输出一高电平。In an embodiment of the present invention, when a voltage at the first terminal of the voltage comparator is greater than a voltage at the second terminal of the voltage comparator, and the on-voltage is greater than 16V, the voltage of the voltage comparator The output terminal outputs a high level.
在本发明的一实施例中,所述放大器模块具有一运算放大器、一第三电阻、一第四电阻及一第五电阻,其中所述运算放大器的一第一端为所述放大器模块的输入端,所述第五电阻的二端分别电性连接所述运算放大器的一第二端及一输出端,所述第四电阻的二端分别电性连接所述运算放大器的第二端及所述第三电阻,所述第三电阻的二端分别电性连接所述电压比较器的第二端及接地。In an embodiment of the present invention, the amplifier module has an operational amplifier, a third resistor, a fourth resistor, and a fifth resistor, wherein a first end of the operational amplifier is an input of the amplifier module. Two ends of the fifth resistor are electrically connected to a second end and an output end of the operational amplifier, respectively, and two ends of the fourth resistor are electrically connected to the second end of the operational amplifier and an output end, respectively. The third resistor, and two terminals of the third resistor are electrically connected to the second terminal of the voltage comparator and ground respectively.
在本发明的一实施例中,所述第三电阻的一电阻值及所述第四电阻的一电阻值的比例为1:5。In an embodiment of the present invention, a ratio of a resistance value of the third resistor to a resistance value of the fourth resistor is 1: 5.
在本发明的一实施例中,所述运算放大器的第一端为一正相输出端,所述运算放大器的第二端为一反相输入端。In an embodiment of the present invention, a first terminal of the operational amplifier is a non-inverting output terminal, and a second terminal of the operational amplifier is an inverting input terminal.
在本发明的一实施例中,所述设定电压为0.5V。In an embodiment of the invention, the set voltage is 0.5V.
在本发明的一实施例中,所述导通电压为一电平移位器在一时序控制器的控制下输出的一栅高电压。In an embodiment of the invention, the on-voltage is a gate high voltage output by a level shifter under the control of a timing controller.
为达成本发明的前述目的,本发明一实施例提供一种驱动电路,所述驱动电路包括一线性调整器、一放大器模块、一比较器模块及一延迟模块;所述线性调整器具有一输入端及一输出端,其中所述线性调整器的输入端电性连接至一导通电压,所述线性调整器配置用以使所述输出端输出一稳定电压;所述放大器模块具有二输入端及一输出端,其中所述放大器模块的一输入端电性连接所述线性调整器的输出端,所述放大器模块的输出端回授至所述放大器模块的另一输入端,所述放大器模块配置用以接收所述线性调整器输出的所述稳定电压,所述稳定电压通过所述放大器模块降低增益,并且由所述放大器模块的输出端输出一调整电压;所述比较器模块具有二输入端及一输出端,其中所述比较器模块的一输入端电性连接所述导通电压,所述比较器模块的另一输入端配置用以接收所述调整电压,所述输出端电性连接至一待驱动电路,所述比较器模块配置用以将所述导通电压及所述调整电压进行比对,进而由所述比较器模块的输出端输出一驱动电压,以驱动所述待驱动电路;所述延迟模块具有一输入端及一输出端,其中所述延迟模块的输入端电性连接所述线性调整器的输出端,所述比较器模块配置用以接收所述延迟模块的输出端输出的一激活信号;当所述延迟模块的输入端接收的所述稳定电压小于一设定电压,所述激活信号为一低电平,使得所述比较器模块中的电压比较器被关闭,当所述延迟模块的输入端接收的所述稳定电压等于或大于所述设定电压,所述激活信号为一高电平,使得所述电压比较器被开启。To achieve the foregoing object of the present invention, an embodiment of the present invention provides a driving circuit. The driving circuit includes a linear regulator, an amplifier module, a comparator module, and a delay module. The linear regulator has an input terminal. And an output terminal, wherein the input terminal of the linear regulator is electrically connected to a conducting voltage, the linear regulator is configured to enable the output terminal to output a stable voltage; the amplifier module has two input terminals and An output terminal, wherein one input terminal of the amplifier module is electrically connected to the output terminal of the linear regulator, the output terminal of the amplifier module is fed back to the other input terminal of the amplifier module, and the amplifier module is configured The stable voltage is received by the linear regulator. The stable voltage is reduced by the amplifier module, and an adjustment voltage is output from the output terminal of the amplifier module. The comparator module has two input terminals. And an output terminal, wherein an input terminal of the comparator module is electrically connected to the turn-on voltage, and another of the comparator module is The input terminal is configured to receive the adjustment voltage, the output terminal is electrically connected to a circuit to be driven, and the comparator module is configured to compare the on-voltage with the adjustment voltage, and then the An output terminal of the comparator module outputs a driving voltage to drive the circuit to be driven; the delay module has an input terminal and an output terminal, wherein the input terminal of the delay module is electrically connected to the linear regulator. An output terminal, the comparator module is configured to receive an activation signal output from the output terminal of the delay module; when the stable voltage received by the input terminal of the delay module is less than a set voltage, the activation signal is A low level causes the voltage comparator in the comparator module to be turned off. When the stable voltage received by the input terminal of the delay module is equal to or greater than the set voltage, the activation signal is a high voltage Level so that the voltage comparator is turned on.
在本发明的一实施例中,所述比较器模块具有所述电压比较器、一第一电阻及一第二电阻,其中所述第二电阻的二端分别电性连接所述导通电压及所述电压比较器的一第一端,所述第一电阻的二端分别电性连接所述电压比较器的第一端及接地,其中所述电压比较器的第一端配置用以接收所述比较器模块的一输入端的分压,所述电压比较器的一第二端为所述比较器模块的另一输入端,所述电压比较器的一输出端为所述比较器模块的输出端。In an embodiment of the present invention, the comparator module has the voltage comparator, a first resistor and a second resistor, wherein two terminals of the second resistor are electrically connected to the on-voltage and A first terminal of the voltage comparator and two terminals of the first resistor are electrically connected to the first terminal of the voltage comparator and ground, respectively, wherein the first terminal of the voltage comparator is configured to receive the voltage comparator. The divided voltage of an input terminal of the comparator module, a second terminal of the voltage comparator is another input terminal of the comparator module, and an output terminal of the voltage comparator is an output of the comparator module end.
在本发明的一实施例中,所述电压比较器的第一端为一正相输出端,所述电压比较器的第二端为一反相输入端,所述电压比较器的输出端连接至所述待驱动电路的欠压锁定模块。In an embodiment of the present invention, a first terminal of the voltage comparator is a non-inverting output terminal, a second terminal of the voltage comparator is an inverting input terminal, and an output terminal of the voltage comparator is connected To the under-voltage lockout module of the circuit to be driven.
在本发明的一实施例中,所述第一电阻的一电阻值及所述第二电阻的一电阻值的比例为1:29。In an embodiment of the present invention, a ratio of a resistance value of the first resistor to a resistance value of the second resistor is 1:29.
在本发明的一实施例中,当所述电压比较器的第一端的一电压大于所述电压比较器的第二端的一电压,且所述导通电压大于16V,所述电压比较器的输出端输出一高电平。In an embodiment of the present invention, when a voltage at the first terminal of the voltage comparator is greater than a voltage at the second terminal of the voltage comparator, and the on-voltage is greater than 16V, the voltage of the voltage comparator The output terminal outputs a high level.
在本发明的一实施例中,所述放大器模块具有一运算放大器、一第三电阻、一第四电阻及一第五电阻,其中所述运算放大器的一第一端为所述放大器模块的输入端,所述第五电阻的二端分别电性连接所述运算放大器的一第二端及一输出端,所述第四电阻的二端分别电性连接所述运算放大器的第二端及所述第三电阻,所述第三电阻的二端分别电性连接所述电压比较器的第二端及接地。In an embodiment of the present invention, the amplifier module has an operational amplifier, a third resistor, a fourth resistor, and a fifth resistor, wherein a first end of the operational amplifier is an input of the amplifier module. Two ends of the fifth resistor are electrically connected to a second end and an output end of the operational amplifier, respectively, and two ends of the fourth resistor are electrically connected to the second end of the operational amplifier and an output end, respectively. The third resistor, and two terminals of the third resistor are electrically connected to the second terminal of the voltage comparator and ground respectively.
在本发明的一实施例中,所述第三电阻的一电阻值及所述第四电阻的一电阻值的比例为1:5。In an embodiment of the present invention, a ratio of a resistance value of the third resistor to a resistance value of the fourth resistor is 1: 5.
在本发明的一实施例中,所述运算放大器的第一端为一正相输出端,所述运算放大器的第二端为一反相输入端。In an embodiment of the present invention, a first terminal of the operational amplifier is a non-inverting output terminal, and a second terminal of the operational amplifier is an inverting input terminal.
在本发明的一实施例中,所述设定电压为0.5V。In an embodiment of the invention, the set voltage is 0.5V.
在本发明的一实施例中,所述导通电压为一电平移位器在一时序控制器的控制下输出的一栅高电压。In an embodiment of the invention, the on-voltage is a gate high voltage output by a level shifter under the control of a timing controller.
有益效果Beneficial effect
本发明的有益效果为:通过所述延迟模块的设计,能够确保所述电压比较器的第二端的电压等于或大于一电压值以后,所述电压比较器才被开启,因而能够确保所述电压比较器的第二端的电压达到所述电压值以后,所述电压比较器才开始工作,以避免所述电平移位器输出异常。The beneficial effect of the present invention is: through the design of the delay module, it can be ensured that the voltage comparator is turned on only after the voltage of the second terminal of the voltage comparator is equal to or greater than a voltage value, thereby ensuring the voltage After the voltage at the second terminal of the comparator reaches the voltage value, the voltage comparator starts to work to avoid abnormal output of the level shifter.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly explain the embodiments or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description are merely inventions. For some embodiments, for those skilled in the art, other drawings can be obtained based on these drawings without paying creative labor.
图1是本发明驱动电路的一优选实施例的一示意图。FIG. 1 is a schematic diagram of a preferred embodiment of the driving circuit of the present invention.
本发明的最佳实施方式Best Mode of the Invention
以上对本发明实施例提供的液晶显示组件进行了详细介绍,本文中应用了具体个例对本发明的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本发明。同时,对于本领域的技术人员,依据本发明的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本发明的限制。以下各实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是用以相同标号表示。The liquid crystal display module provided by the embodiments of the present invention has been described in detail above. Specific examples are used herein to explain the principles and implementation of the present invention. The description of the above embodiments is only used to help understand the present invention. At the same time, for those skilled in the art, according to the idea of the present invention, there will be changes in the specific implementation and scope of application. In summary, the content of this description should not be construed as a limitation on the present invention. The following descriptions of the embodiments are made with reference to additional illustrations to illustrate specific embodiments in which the present invention can be implemented. The directional terms mentioned in the present invention, such as [up], [down], [front], [rear], [left], [right], [in], [out], [side], etc., are for reference only. The direction of the attached schema. Therefore, the directional terms used are for explaining and understanding the present invention, but not for limiting the present invention. In the figure, similarly structured units are denoted by the same reference numerals.
请参照图1所示,为本发明驱动电路的一优选实施例的一示意图。所述驱动电路包括一线性调整器2、一放大器模块3、一比较器模块4及一延迟模块5,本发明将于下文详细说明各实施例上述各组件的细部构造、组装关系及其运作原理。Please refer to FIG. 1, which is a schematic diagram of a preferred embodiment of a driving circuit of the present invention. The driving circuit includes a linear regulator 2, an amplifier module 3, a comparator module 4, and a delay module 5. The present invention will explain in detail the detailed structure, assembly relationship, and operation principle of the above components of the embodiments. .
续参照图1所示,所述线性调整器2具有一输入端21及一输出端22,其中所述线性调整器2的输入端21电性连接至一导通电压VGH,而且所述线性调整器2配置用以使所述输出端22输出一稳定电压,例如:3V电压。在本实施例中,所述导通电压VGH为一电平移位器(未绘示)在一时序控制器的控制下输出的一栅高电压。Continuing to refer to FIG. 1, the linear regulator 2 has an input terminal 21 and an output terminal 22, wherein the input terminal 21 of the linear regulator 2 is electrically connected to a conducting voltage VGH, and the linear adjustment The device 2 is configured to enable the output terminal 22 to output a stable voltage, for example, a 3V voltage. In this embodiment, the on-voltage VGH is a gate high voltage output by a level shifter (not shown) under the control of a timing controller.
续参照图1所示,所述放大器模块3具有二输入端31、32及一输出端33,其中所述放大器模块3的一输入端31电性连接所述线性调整器2的输出端22,所述放大器模块3的输出端33回授至所述放大器模块3的另一输入端32,所述放大器模块3配置用以接收所述线性调整器2输出的所述稳定电压,而且所述稳定电压通过所述放大器模块3降低增益,并且由所述放大器模块3的输出端33输出一调整电压。Continuing to refer to FIG. 1, the amplifier module 3 has two input terminals 31, 32 and an output terminal 33. One input terminal 31 of the amplifier module 3 is electrically connected to the output terminal 22 of the linear regulator 2. An output terminal 33 of the amplifier module 3 is fed back to another input terminal 32 of the amplifier module 3, and the amplifier module 3 is configured to receive the stable voltage output by the linear regulator 2, and the stable The voltage is reduced by the amplifier module 3, and an adjustment voltage is output from the output terminal 33 of the amplifier module 3.
续参照图1所示,进一步来说,所述放大器模块3具有一运算放大器34、一第三电阻R3、一第四电阻R4及一第五电阻R5,其中所述运算放大器34的一第一端为所述放大器模块3的输入端31,所述运算放大器34的一输出端为所述放大器模块3的输出端33,所述第五电阻R5的二端分别电性连接所述运算放大器34的一第二端及所述运算放大器34的输出端,所述第四电阻R4的二端分别电性连接所述运算放大器34的第二端及所述第三电阻R3,所述第三电阻R3的二端分别电性连接所述比较器模块4及接地。在本实施例中,所述第三电阻R3的一电阻值及所述第四电阻R4的一电阻值的比例为1:5,例如:所述第三电阻R3为1欧姆,所述第四电阻R4为5欧姆。所述调整电压通过所述第三电阻R3及所述第四电阻R4的分压再输出至所述比较器模块4。另外,所述运算放大器34的第一端为一正相输出端,所述运算放大器34的第二端为一反相输入端。Continuing to refer to FIG. 1, further, the amplifier module 3 has an operational amplifier 34, a third resistor R3, a fourth resistor R4, and a fifth resistor R5, wherein a first A terminal is an input terminal 31 of the amplifier module 3, an output terminal of the operational amplifier 34 is an output terminal 33 of the amplifier module 3, and two terminals of the fifth resistor R5 are electrically connected to the operational amplifier 34, respectively. A second terminal of the operational amplifier 34 and two terminals of the fourth resistor R4 are electrically connected to the second terminal of the operational amplifier 34 and the third resistor R3, and the third resistor Two terminals of R3 are electrically connected to the comparator module 4 and ground respectively. In this embodiment, a ratio of a resistance value of the third resistor R3 to a resistance value of the fourth resistor R4 is 1: 5, for example, the third resistor R3 is 1 ohm, and the fourth resistor The resistance R4 is 5 ohms. The adjusted voltage is output to the comparator module 4 through a divided voltage of the third resistor R3 and the fourth resistor R4. In addition, a first terminal of the operational amplifier 34 is a non-inverting output terminal, and a second terminal of the operational amplifier 34 is an inverting input terminal.
续参照图1所示,所述比较器模块4具有二输入端41、42及一输出端43,其中所述比较器模块4的一输入端41电性连接所述导通电压VGH,所述比较器模块42的另一输入端电性连接所述放大器模块3的所述第三电阻R3及所述第四电阻R4,所述输出端43电性连接至一待驱动电路(未绘示),在本实施例中,所述电压比较器44的输出端43连接至所述待驱动电路的欠压锁定模块(未绘示),所述比较器模块4配置用以将所述导通电压VGH以及通过所述第三电阻R3及所述第四电阻R4分压之后的所述调整电压进行比对,进而由所述比较器模块4的输出端输出一驱动电压UVLO,以驱动所述欠压锁定模块。Continuing to refer to FIG. 1, the comparator module 4 has two input terminals 41, 42 and an output terminal 43. An input terminal 41 of the comparator module 4 is electrically connected to the on-voltage VGH. The other input terminal of the comparator module 42 is electrically connected to the third resistor R3 and the fourth resistor R4 of the amplifier module 3, and the output terminal 43 is electrically connected to a circuit to be driven (not shown). In this embodiment, the output terminal 43 of the voltage comparator 44 is connected to an under-voltage lockout module (not shown) of the circuit to be driven, and the comparator module 4 is configured to connect the on-voltage VGH and the adjusted voltage after dividing by the third resistor R3 and the fourth resistor R4 are compared, and then a driving voltage UVLO is output from the output terminal of the comparator module 4 to drive the under voltage Press the lock module.
续参照图1所示,进一步来说,所述比较器模块4具有一电压比较器44、一第一电阻R1及一第二电阻R2,其中所述第二电阻R2的二端分别电性连接所述导通电压VGH及所述电压比较器44的一第一端,所述第一电阻R1的二端分别电性连接所述电压比较器44的第一端及接地,其中所述电压比较器44的第一端配置用以接收所述比较器模块4的一输入端41通过所述第一电阻R1及所述第二电阻R2的分压,所述电压比较器44的一第二端为所述比较器模块4的另一输入端42,所述电压比较器44的一输出端为所述比较器模块4的输出端43。在本实施例中,所述电压比较器44的第一端为一正相输出端,所述电压比较器44的第二端为一反相输入端。在实施的过程中,当所述电压比较器44的第一端的一电压大于所述电压比较器44的第二端的一电压,且所述导通电压VGH大于16V,所述电压比较器44的输出端输出一高电平。另外,所述第一电阻R1的一电阻值及所述第二电阻R2的一电阻值的比例为1:29。例如:所述第一电阻R1为1欧姆,所述第二电阻R2为29欧姆。Continuing to refer to FIG. 1, further, the comparator module 4 has a voltage comparator 44, a first resistor R1 and a second resistor R2, wherein two ends of the second resistor R2 are electrically connected respectively. The on-voltage VGH and a first terminal of the voltage comparator 44, and two terminals of the first resistor R1 are electrically connected to the first terminal of the voltage comparator 44 and ground, respectively, wherein the voltage comparison A first terminal of the comparator 44 is configured to receive a divided voltage from an input terminal 41 of the comparator module 4 through the first resistor R1 and the second resistor R2, and a second terminal of the voltage comparator 44 It is the other input terminal 42 of the comparator module 4, and an output terminal of the voltage comparator 44 is the output terminal 43 of the comparator module 4. In this embodiment, a first terminal of the voltage comparator 44 is a non-inverting output terminal, and a second terminal of the voltage comparator 44 is an inverting input terminal. In the implementation process, when a voltage at the first terminal of the voltage comparator 44 is greater than a voltage at the second terminal of the voltage comparator 44 and the on-voltage VGH is greater than 16V, the voltage comparator 44 The output terminal outputs a high level. In addition, a ratio of a resistance value of the first resistor R1 to a resistance value of the second resistor R2 is 1:29. For example, the first resistor R1 is 1 ohm, and the second resistor R2 is 29 ohms.
续参照图1所示,所述延迟模块5具有一输入端51及一输出端52,其中所述延迟模块5的输入端51电性连接所述线性调整器2的输出端22,所述比较器模块4的电压比较器44配置用以接收所述延迟模块5的输出端52输出的一激活信号。所述延迟模块5配置用以依据所述线性调整器2的输出端22的所述稳定电压来产生所述激活信号,以开启或关闭所述电压比较器44。Continuing to refer to FIG. 1, the delay module 5 has an input terminal 51 and an output terminal 52. The input terminal 51 of the delay module 5 is electrically connected to the output terminal 22 of the linear regulator 2. The voltage comparator 44 of the comparator module 4 is configured to receive an activation signal output from the output terminal 52 of the delay module 5. The delay module 5 is configured to generate the activation signal according to the stable voltage of the output terminal 22 of the linear regulator 2 to enable or disable the voltage comparator 44.
依据上述的结构,当所述延迟模块5的输入端51接收的所述稳定电压小于一设定电压,所述激活信号为一低电平,使得所述电压比较器44被关闭,当所述延迟模块5的输入端51接收的所述稳定电压等于或大于所述设定电压,所述激活信号为一高电平,使得所述电压比较器44被开启。在本实施例中,所述设定电压为0.5V。进一步来说,当所述导通电压VGH上升速度过快,所述电压比较器44的第一端的电压大于所述电压比较器44的第二端的电压,而且所述电压比较器44的第二端的电压小于0.5V时,所述激活信号为低电平,所述电压比较器44被关闭,所述驱动电压UVLO为低电平,使得所述电平移位器没有输出信号,等到所述电压比较器44的第二端的电压等于或大于0.5V时,所述激活信号为高电平,所述电压比较器44被开启,此时所述电压比较器44的第一端的电压大于所述电压比较器44的第二端的电压,所述导通电压VGH的电压大于16V,所述驱动电压UVLO为高电平,使得所述电平移位器正常输出信号。According to the above structure, when the stable voltage received by the input terminal 51 of the delay module 5 is less than a set voltage, the activation signal is a low level, so that the voltage comparator 44 is turned off. The stable voltage received by the input terminal 51 of the delay module 5 is equal to or greater than the set voltage, and the activation signal is a high level, so that the voltage comparator 44 is turned on. In this embodiment, the set voltage is 0.5V. Further, when the on-voltage VGH rises too fast, the voltage of the first terminal of the voltage comparator 44 is greater than the voltage of the second terminal of the voltage comparator 44 and the voltage of the voltage comparator 44 When the voltage at the two terminals is less than 0.5V, the activation signal is at a low level, the voltage comparator 44 is turned off, and the driving voltage UVLO is at a low level, so that the level shifter has no output signal. When the voltage of the second terminal of the voltage comparator 44 is equal to or greater than 0.5V, the activation signal is at a high level, and the voltage comparator 44 is turned on. At this time, the voltage of the first terminal of the voltage comparator 44 is greater than The voltage of the second terminal of the voltage comparator 44, the voltage of the on-voltage VGH is greater than 16V, and the driving voltage UVLO is at a high level, so that the level shifter normally outputs a signal.
如上所述,通过所述延迟模块5的设计,能够确保所述电压比较器44的第二端的电压等于或大于一电压值以后,例如:0.5V,所述电压比较器44才被开启,因而能够确保所述电压比较器44的第二端的电压达到所述电压值之后,例如:0.5V,所述电压比较器44才开始工作,以避免所述电平移位器输出异常。As described above, through the design of the delay module 5, it is possible to ensure that the voltage of the second terminal of the voltage comparator 44 is equal to or greater than a voltage value, for example, 0.5V, and the voltage comparator 44 is turned on. It can be ensured that after the voltage of the second terminal of the voltage comparator 44 reaches the voltage value, for example, 0.5V, the voltage comparator 44 starts to work, so as to avoid abnormal output of the level shifter.
本发明已由上述相关实施例加以描述,然而上述实施例仅为实施本发明的范例。必需指出的是,已公开的实施例并未限制本发明的范围。相反地,包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。The present invention has been described by the above related embodiments, but the above embodiments are merely examples for implementing the present invention. It must be noted that the disclosed embodiments do not limit the scope of the invention. On the contrary, modifications and equal arrangements included in the spirit and scope of the claims are all included in the scope of the present invention.

Claims (20)

  1. 一种驱动电路,其特征在于:所述驱动电路包括:A driving circuit, characterized in that the driving circuit includes:
    一线性调整器,具有一输入端及一输出端,其中所述线性调整器的输入端电性连接至一导通电压,所述线性调整器配置用以使所述输出端输出一稳定电压;A linear regulator having an input terminal and an output terminal, wherein the input terminal of the linear regulator is electrically connected to a conducting voltage, and the linear regulator is configured to enable the output terminal to output a stable voltage;
    一放大器模块,具有二输入端及一输出端,其中所述放大器模块的一输入端电性连接所述线性调整器的输出端,所述放大器模块的输出端回授至所述放大器模块的另一输入端,所述放大器模块配置用以接收所述线性调整器输出的所述稳定电压,所述稳定电压通过所述放大器模块降低增益,并且由所述放大器模块的输出端输出一调整电压;An amplifier module has two input terminals and an output terminal, wherein one input terminal of the amplifier module is electrically connected to the output terminal of the linear regulator, and the output terminal of the amplifier module is fed back to the other of the amplifier module. An input terminal, the amplifier module is configured to receive the stable voltage output by the linear regulator, the stable voltage is reduced by the amplifier module, and an adjustment voltage is output from the output terminal of the amplifier module;
    一比较器模块,具有二输入端及一输出端,其中所述比较器模块的一输入端电性连接所述导通电压,所述比较器模块的另一输入端配置用以接收所述调整电压,所述输出端电性连接至一待驱动电路,所述比较器模块配置用以将所述导通电压及所述调整电压进行比对,进而由所述比较器模块的输出端输出一驱动电压,以驱动所述待驱动电路;及A comparator module has two input terminals and an output terminal, wherein one input terminal of the comparator module is electrically connected to the on-voltage, and the other input terminal of the comparator module is configured to receive the adjustment. Voltage, the output terminal is electrically connected to a circuit to be driven, and the comparator module is configured to compare the on-voltage and the adjustment voltage, and then an output terminal of the comparator module outputs a A driving voltage to drive the circuit to be driven; and
    一延迟模块,具有一输入端及一输出端,其中所述延迟模块的输入端电性连接所述线性调整器的输出端,所述比较器模块配置用以接收所述延迟模块的输出端输出的一激活信号;A delay module has an input terminal and an output terminal, wherein the input terminal of the delay module is electrically connected to the output terminal of the linear regulator, and the comparator module is configured to receive the output of the output terminal of the delay module. An activation signal;
    当所述延迟模块的输入端接收的所述稳定电压小于一设定电压,所述激活信号为一低电平,使得所述比较器模块中的电压比较器被关闭,当所述延迟模块的输入端接收的所述稳定电压等于或大于所述设定电压,所述激活信号为一高电平,使得所述电压比较器被开启;When the stable voltage received by the input of the delay module is less than a set voltage, the activation signal is a low level, so that the voltage comparator in the comparator module is turned off. The stable voltage received at the input terminal is equal to or greater than the set voltage, and the activation signal is a high level, so that the voltage comparator is turned on;
    所述电压比较器的输出端连接至所述待驱动电路。An output terminal of the voltage comparator is connected to the circuit to be driven.
  2. 如权利要求1所述的驱动电路,其特征在于:所述比较器模块具有所述电压比较器、一第一电阻及一第二电阻,其中所述第二电阻的二端分别电性连接所述导通电压及所述电压比较器的一第一端,所述第一电阻的二端分别电性连接所述电压比较器的第一端及接地,其中所述电压比较器的第一端配置用以接收所述比较器模块的一输入端的分压,所述电压比较器的一第二端为所述比较器模块的另一输入端,所述电压比较器的一输出端为所述比较器模块的输出端。The driving circuit according to claim 1, wherein the comparator module has the voltage comparator, a first resistor, and a second resistor, and two ends of the second resistor are electrically connected to the respective terminals. The on-voltage and a first terminal of the voltage comparator, and two terminals of the first resistor are electrically connected to the first terminal of the voltage comparator and ground, respectively, wherein the first terminal of the voltage comparator Configured to receive a divided voltage from an input terminal of the comparator module, a second terminal of the voltage comparator is the other input terminal of the comparator module, and an output terminal of the voltage comparator is the Comparator output.
  3. 如权利要求2所述的驱动电路,其特征在于:所述电压比较器的第一端为一正相输出端,所述电压比较器的第二端为一反相输入端,所述电压比较器的输出端连接至所述待驱动电路的欠压锁定模块。The driving circuit according to claim 2, wherein a first terminal of the voltage comparator is a non-inverting output terminal, a second terminal of the voltage comparator is an inverting input terminal, and the voltage comparison The output terminal of the device is connected to the under-voltage lockout module of the circuit to be driven.
  4. 如权利要求2所述的驱动电路,其特征在于:所述第一电阻的一电阻值及所述第二电阻的一电阻值的比例为1:29。The driving circuit according to claim 2, wherein a ratio of a resistance value of the first resistor to a resistance value of the second resistor is 1:29.
  5. 如权利要求2所述的驱动电路,其特征在于:当所述电压比较器的第一端的一电压大于所述电压比较器的第二端的一电压,且所述导通电压大于16V,所述电压比较器的输出端输出一高电平。The driving circuit according to claim 2, wherein when a voltage at a first terminal of the voltage comparator is greater than a voltage at a second terminal of the voltage comparator, and the on-voltage is greater than 16V, so The output terminal of the voltage comparator outputs a high level.
  6. 如权利要求2所述的驱动电路,其特征在于:所述放大器模块具有一运算放大器、一第三电阻、一第四电阻及一第五电阻,其中所述运算放大器的一第一端为所述放大器模块的输入端,所述第五电阻的二端分别电性连接所述运算放大器的一第二端及一输出端,所述第四电阻的二端分别电性连接所述运算放大器的第二端及所述第三电阻,所述第三电阻的二端分别电性连接所述电压比较器的第二端及接地。The driving circuit according to claim 2, wherein the amplifier module has an operational amplifier, a third resistor, a fourth resistor, and a fifth resistor, wherein a first end of the operational amplifier is The input terminal of the amplifier module, two terminals of the fifth resistor are electrically connected to a second terminal and an output terminal of the operational amplifier, respectively, and two terminals of the fourth resistor are electrically connected to the operational amplifier, respectively. A second terminal and the third resistor, and two terminals of the third resistor are electrically connected to the second terminal of the voltage comparator and ground, respectively.
  7. 如权利要求6所述的驱动电路,其特征在于:所述第三电阻的一电阻值及所述第四电阻的一电阻值的比例为1:5。The driving circuit according to claim 6, wherein a ratio of a resistance value of the third resistor to a resistance value of the fourth resistor is 1: 5.
  8. 如权利要求6所述的驱动电路,其特征在于:所述运算放大器的第一端为一正相输出端,所述运算放大器的第二端为一反相输入端。The driving circuit according to claim 6, wherein the first terminal of the operational amplifier is a non-inverting output terminal, and the second terminal of the operational amplifier is an inverting input terminal.
  9. 如权利要求1所述的驱动电路,其特征在于:所述设定电压为0.5V。The driving circuit according to claim 1, wherein the set voltage is 0.5V.
  10. 如权利要求1所述的驱动电路,其特征在于:所述导通电压为一电平移位器在一时序控制器的控制下输出的一栅高电压The driving circuit according to claim 1, wherein the on-voltage is a gate high voltage output by a level shifter under the control of a timing controller.
  11. 一种驱动电路,其特征在于:所述驱动电路包括:A driving circuit, characterized in that the driving circuit includes:
    一线性调整器,具有一输入端及一输出端,其中所述线性调整器的输入端电性连接至一导通电压,所述线性调整器配置用以使所述输出端输出一稳定电压;A linear regulator having an input terminal and an output terminal, wherein the input terminal of the linear regulator is electrically connected to a conducting voltage, and the linear regulator is configured to enable the output terminal to output a stable voltage;
    一放大器模块,具有二输入端及一输出端,其中所述放大器模块的一输入端电性连接所述线性调整器的输出端,所述放大器模块的输出端回授至所述放大器模块的另一输入端,所述放大器模块配置用以接收所述线性调整器输出的所述稳定电压,所述稳定电压通过所述放大器模块降低增益,并且由所述放大器模块的输出端输出一调整电压;An amplifier module has two input terminals and an output terminal, wherein one input terminal of the amplifier module is electrically connected to the output terminal of the linear regulator, and the output terminal of the amplifier module is fed back to the other of the amplifier module. An input terminal, the amplifier module is configured to receive the stable voltage output by the linear regulator, the stable voltage is reduced by the amplifier module, and an adjustment voltage is output from the output terminal of the amplifier module;
    一比较器模块,具有二输入端及一输出端,其中所述比较器模块的一输入端电性连接所述导通电压,所述比较器模块的另一输入端配置用以接收所述调整电压,所述输出端电性连接至一待驱动电路,所述比较器模块配置用以将所述导通电压及所述调整电压进行比对,进而由所述比较器模块的输出端输出一驱动电压,以驱动所述待驱动电路;及A comparator module has two input terminals and an output terminal, wherein one input terminal of the comparator module is electrically connected to the on-voltage, and the other input terminal of the comparator module is configured to receive the adjustment. Voltage, the output terminal is electrically connected to a circuit to be driven, and the comparator module is configured to compare the on-voltage and the adjustment voltage, and then an output terminal of the comparator module outputs a A driving voltage to drive the circuit to be driven; and
    一延迟模块,具有一输入端及一输出端,其中所述延迟模块的输入端电性连接所述线性调整器的输出端,所述比较器模块配置用以接收所述延迟模块的输出端输出的一激活信号;A delay module has an input terminal and an output terminal, wherein the input terminal of the delay module is electrically connected to the output terminal of the linear regulator, and the comparator module is configured to receive the output of the output terminal of the delay module. An activation signal;
    当所述延迟模块的输入端接收的所述稳定电压小于一设定电压,所述激活信号为一低电平,使得所述比较器模块中的电压比较器被关闭,当所述延迟模块的输入端接收的所述稳定电压等于或大于所述设定电压,所述激活信号为一高电平,使得所述电压比较器被开启。When the stable voltage received by the input of the delay module is less than a set voltage, the activation signal is a low level, so that the voltage comparator in the comparator module is turned off. The stable voltage received at the input terminal is equal to or greater than the set voltage, and the activation signal is at a high level, so that the voltage comparator is turned on.
  12. 如权利要求11所述的驱动电路,其特征在于:所述比较器模块具有所述电压比较器、一第一电阻及一第二电阻,其中所述第二电阻的二端分别电性连接所述导通电压及所述电压比较器的一第一端,所述第一电阻的二端分别电性连接所述电压比较器的第一端及接地,其中所述电压比较器的第一端配置用以接收所述比较器模块的一输入端的分压,所述电压比较器的一第二端为所述比较器模块的另一输入端,所述电压比较器的一输出端为所述比较器模块的输出端。The driving circuit according to claim 11, wherein the comparator module has the voltage comparator, a first resistor and a second resistor, and two ends of the second resistor are electrically connected to the respective terminals. The on-voltage and a first terminal of the voltage comparator, and two terminals of the first resistor are electrically connected to the first terminal of the voltage comparator and ground, respectively, wherein the first terminal of the voltage comparator Configured to receive a divided voltage from an input terminal of the comparator module, a second terminal of the voltage comparator is the other input terminal of the comparator module, and an output terminal of the voltage comparator is the Comparator output.
  13. 如权利要求12所述的驱动电路,其特征在于:所述电压比较器的第一端为一正相输出端,所述电压比较器的第二端为一反相输入端,所述电压比较器的输出端连接至所述待驱动电路的欠压锁定模块。The driving circuit according to claim 12, wherein a first terminal of the voltage comparator is a non-inverting output terminal, a second terminal of the voltage comparator is an inverting input terminal, and the voltage comparison The output terminal of the device is connected to the under-voltage lockout module of the circuit to be driven.
  14. 如权利要求12所述的驱动电路,其特征在于:所述第一电阻的一电阻值及所述第二电阻的一电阻值的比例为1:29。The driving circuit according to claim 12, wherein a ratio of a resistance value of the first resistor to a resistance value of the second resistor is 1:29.
  15. 如权利要求12所述的驱动电路,其特征在于:当所述电压比较器的第一端的一电压大于所述电压比较器的第二端的一电压,且所述导通电压大于16V,所述电压比较器的输出端输出一高电平。The driving circuit according to claim 12, wherein when a voltage at a first terminal of the voltage comparator is greater than a voltage at a second terminal of the voltage comparator, and the on-voltage is greater than 16V, so The output terminal of the voltage comparator outputs a high level.
  16. 如权利要求12所述的驱动电路,其特征在于:所述放大器模块具有一运算放大器、一第三电阻、一第四电阻及一第五电阻,其中所述运算放大器的一第一端为所述放大器模块的输入端,所述第五电阻的二端分别电性连接所述运算放大器的一第二端及一输出端,所述第四电阻的二端分别电性连接所述运算放大器的第二端及所述第三电阻,所述第三电阻的二端分别电性连接所述电压比较器的第二端及接地。The driving circuit according to claim 12, wherein the amplifier module has an operational amplifier, a third resistor, a fourth resistor, and a fifth resistor, wherein a first end of the operational amplifier is The input terminal of the amplifier module, two terminals of the fifth resistor are electrically connected to a second terminal and an output terminal of the operational amplifier, respectively, and two terminals of the fourth resistor are electrically connected to the operational amplifier, respectively. A second terminal and the third resistor, and two terminals of the third resistor are electrically connected to the second terminal of the voltage comparator and ground, respectively.
  17. 如权利要求16所述的驱动电路,其特征在于:所述第三电阻的一电阻值及所述第四电阻的一电阻值的比例为1:5。The driving circuit according to claim 16, wherein a ratio of a resistance value of the third resistor to a resistance value of the fourth resistor is 1: 5.
  18. 如权利要求16所述的驱动电路,其特征在于:所述运算放大器的第一端为一正相输出端,所述运算放大器的第二端为一反相输入端。The driving circuit according to claim 16, wherein a first terminal of the operational amplifier is a non-inverting output terminal, and a second terminal of the operational amplifier is an inverting input terminal.
  19. 如权利要求11所述的驱动电路,其特征在于:所述设定电压为0.5V。The driving circuit according to claim 11, wherein the set voltage is 0.5V.
  20. 如权利要求11所述的驱动电路,其特征在于:所述导通电压为一电平移位器在一时序控制器的控制下输出的一栅高电压The driving circuit of claim 11, wherein the on-voltage is a gate high voltage output by a level shifter under the control of a timing controller.
PCT/CN2018/116121 2018-09-27 2018-11-19 Driving circuit WO2020062496A1 (en)

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