WO2020055291A1

WO2020055291A1 - Method and apparatus for wide-angle intra-prediction

Info

Publication number: WO2020055291A1
Application number: PCT/RU2019/050150
Authority: WO
Inventors: Alexey Konstantinovich FILIPPOV; Vasily Alexeevich RUFITSKIY
Original assignee: Huawei Technologies Co., Ltd.
Priority date: 2018-09-13
Filing date: 2019-09-12
Publication date: 2020-03-19

Abstract

An intra-prediction method for a coding block or a coding sublock of a square shape is provided. The method includes determining a first length of first reconstructed reference samples of the coding block; determining a second length of second reconstructed reference samples of the coding block; and determining a directional intra prediction mode of the coding block based on the first length and the second length. The method may improve the current directional intra-prediction mechanism by increasing its prediction accuracy.

Description

Method and Apparatus for Wide-Angle Intra-Prediction

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional Application No. 62/731,067, filed on September 13, 2018, entitled“Method and Apparatus for Wide-Angle Intra-Prediction for Square Blocks”, which application is incorporated herein by its reference.

TECHNICAL FIELD

Embodiments of the present application generally relates to the field of video coding and more particularly to a method and an apparatus for wide-angle intra-prediction.

BACKGROUND

Video coding (video encoding and decoding) is used in a wide range of digital video applications, for example broadcast digital TV, video transmission over internet and mobile networks, real-time conversational applications such as video chat, video conferencing, DVD and Blu-ray discs, video content acquisition and editing systems, and camcorders of security applications.

A source picture may be partitioned into video coding blocks (or short blocks). Processing of these blocks depend on their size, spatial position and a coding mode specified by an encoder or a decoder. Coding modes can be classified into two groups according to the type of prediction: intra- and inter-prediction modes. Intra-prediction modes use pixels of the same picture (also referred to as frame or image) to generate reference samples to calculate the prediction values for the pixels of the block being reconstructed. Intra-prediction is also referred to as spatial prediction. Interprediction modes are designed for temporal prediction and uses reference samples of previous or next pictures to predict pixels of the block of the current picture.

Not only square but also rectangular blocks are generated by using partitioning mechanism, for example, quad-tree (known as QT), quad-tree and binary -tree (known as QTBT). There is a need for apparatuses and methods for video coding, which allow for an efficient handling of square blocks or square subblocks.

SUMMARY

It is an object of the invention to provide apparatuses and methods for video coding, which allow for an efficient handling of square blocks or square subblocks in conjunction with an intraprediction mechanism. The foregoing and other objects are achieved by the subject matter of the independent claims. Further implementation forms are apparent from the dependent claims, the description and the figures.

Generally, the present invention relates to an apparatus and a method for improving the directional intra-prediction mechanism for square blocks or square subblocks. More specifically, embodiments of the present invention extend a set of available directional intra-prediction modes subject to the availability of reconstructed reference samples, enable or disable some directional intra-prediction modes subject to the availability of reconstructed reference samples, and optionally signal directional intra-prediction modes contained in the extended subset via mode mapping and a one- bit flag.

Embodiments of the present invention may improve the current directional intra-prediction mechanism by increasing its prediction accuracy, and allow for an efficient handling of square blocks or square subblocks in conjunction with an intra-prediction mechanism.

BRIEF DESCRIPTION OF THE DRAWINGS

In the following embodiments of the invention are described in more detail with reference to the attached figures and drawings, in which:

FIG. 1 A is a block diagram showing an example of a video coding system configured to implement embodiments of the invention;

FIG. IB is a block diagram showing another example of a video coding system configured to implement embodiments of the invention;

FIG. 2 is a block diagram showing an example of a video encoder configured to implement embodiments of the invention;

FIG. 3 is a block diagram showing an example structure of a video decoder configured to implement embodiments of the invention;

FIG. 4 is a block diagram illustrating an example of an encoding apparatus or a decoding apparatus;

FIG. 5 is a block diagram illustrating another example of an encoding apparatus or a decoding apparatus;

FIG. 6 shows a schematic diagram of a video coding block illustrating different directional intraprediction modes;

FIGs. 7a and 7b illustrate an example of block partitioning and a corresponding tree structure by using quad-tree plus binary -tree (QTBT); FIG. 8 illustrates a square block or square subblocks asymmetry caused by the fact that different number of reconstructed reference samples is available;

FIG. 9a illustrates that square blocks or square subblocks are located on a left picture boundary; FIG. 9b illustrates an example that square subblocks that is horizontal divided;

FIG. 9c illustrates an example that square subblocks that is horizontal divided;

FIG.10a illustrates that square blocks or square subblocks are located on a top picture boundary; FIG. 10b illustrates an example that square subblocks that is vertical divided;

FIG. 10c illustrates an example that square subblocks that is vertical divided;

FIG. 11 shows a square block or square subblocks with no asymmetry caused by the different number of available reconstructed reference samples along with each side; and

FIG. 12 shows a flow diagram illustrating steps of an intra-prediction method for a coding block of a square shape or square subblocks according to an embodiment.

In the various figures, identical reference signs will be used for identical or at least functionally equivalent features.

DETAILED DESCRIPTION OF EMBODIMENTS

In the following description, reference is made to the accompanying figures, which form part of the disclosure, and which show, by way of illustration, specific aspects of embodiments of the invention or specific aspects in which embodiments of the present invention may be used. It is understood that embodiments of the invention may be used in other aspects and comprise structural or logical changes not depicted in the figures. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.

For instance, it is understood that a disclosure in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa. For example, if one or a plurality of specific method steps are described, a corresponding device may include one or a plurality of units, e.g. functional units, to perform the described one or plurality of method steps (e.g. one unit performing the one or plurality of steps, or a plurality of units each performing one or more of the plurality of steps), even if such one or more units are not explicitly described or illustrated in the figures. On the other hand, for example, if a specific apparatus is described based on one or a plurality of units, e.g. functional units, a corresponding method may include one step to perform the functionality of the one or plurality of units (e.g. one step performing the functionality of the one or plurality of units, or a plurality of steps each performing the functionality of one or more of the plurality of units), even if such one or plurality of steps are not explicitly described or illustrated in the figures. Further, it is understood that the features of the various exemplary embodiments and/or aspects described herein may be combined with each other, unless specifically noted otherwise.

Currently, along with each side of a square block, reference samples used for generating an intrapredictor are considered to be always available. If they are actually unavailable, they should be padded to have 2 L + 1 reference samples along with each side, where L is the width or the height of a square block.

In order to provide an efficient handling of square blocks or square subblocks in conjunction with an intra-prediction mechanism, the present invention provides methods and apparatuses for wide- angle intra-prediction for square blocks or square subblocks. More specifically, embodiments of the present invention checks the actual number of reconstructed reference samples available along with each side of a square block or square subblocks, enables additional directional modes along with that square block or square subblocks side where more reconstructed reference samples are available, and optionally disables directional modes along with that square block or square subblocks side where less reconstructed reference samples are available.

Video coding typically refers to the processing of a sequence of pictures, which form the video or video sequence. Instead of the term“picture” the term“frame” or“image” may be used as synonyms in the field of video coding. Video coding used in the present application (or present disclosure) indicates either video encoding or video decoding. Video encoding is performed at the source side, typically comprising processing (e.g. by compression) the original video pictures to reduce the amount of data required for representing the video pictures (for more efficient storage and/or transmission). Video decoding is performed at the destination side and typically comprises the inverse processing compared to the encoder to reconstruct the video pictures. Embodiments referring to“coding” of video pictures (or pictures in general, as will be explained later) shall be understood to relate to either“encoding” or“decoding” for video sequence. The combination of the encoding part and the decoding part is also referred to as CODEC (Coding and Decoding).

In case of lossless video coding, the original video pictures can be reconstructed, i.e. the reconstructed video pictures have the same quality as the original video pictures (assuming no transmission loss or other data loss during storage or transmission). In case of lossy video coding, further compression, e.g. by quantization, is performed, to reduce the amount of data representing the video pictures, which cannot be completely reconstructed at the decoder, i.e. the quality of the reconstructed video pictures is lower or worse compared to the quality of the original video pictures. Each picture of a video sequence is typically partitioned into a set of non-overlapping blocks and the coding is typically performed on a block level. In other words, at the encoder the video is typically processed, i.e. encoded, on a block (video block) level, e.g. by using spatial (intra picture) prediction and temporal (inter picture) prediction to generate a prediction block, subtracting the prediction block from the current block (block currently processed/to be processed) to obtain a residual block, transforming the residual block and quantizing the residual block in the transform domain to reduce the amount of data to be transmitted (compression), whereas at the decoder the inverse processing compared to the encoder is partially applied to the encoded or compressed block to reconstruct the current block for representation. Furthermore, the encoder duplicates the decoder processing loop such that both will generate identical predictions (e.g. intra- and inter predictions) and/or re-constructions for processing, i.e. coding, the subsequent blocks.

As used herein, the term“block” may a portion of a picture or a frame. For convenience of description, embodiments of the invention are described herein in reference to High-Efficiency Video Coding (HEVC) or the reference software of Versatile video coding (WC), developed by the Joint Collaboration Team on Video Coding (JCT-VC) of ITU-T Video Coding Experts Group (VCEG) and ISO/IEC Motion Picture Experts Group (MPEG). One of ordinary skill in the art will understand that embodiments of the invention are not limited to HEVC or VVC. It may refer to a CU, PU, and TU. In HEVC, a CTU is split into CUs by using a quad-tree structure denoted as coding tree. The decision whether to code a picture area using inter-picture (temporal) or intrapicture (spatial) prediction is made at the CU level. Each CU can be further split into one, two or four PUs according to the PU splitting type. Inside one PU, the same prediction process is applied and the relevant information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying the prediction process based on the PU splitting type, a CU can be partitioned into transform units (TUs) according to another quadtree structure similar to the coding tree for the CU. In Qual-tree and binary tree (QTBT) partitioning frame, a CU can have either a square or rectangular shape. For example, a coding tree unit (CTU) is first partitioned by a quadtree structure. The quadtree leaf nodes are further partitioned by a binary tree structure. The binary tree leaf nodes are called coding units (CUs), and that segmentation is used for prediction and transform processing without any further partitioning. This means that the CU, PU and TU have the same block size in the QTBT coding block structure. In parallel, multiply partition, for example, triple tree partition was also proposed to be used together with the QTBT block structure.

In the following embodiments of an encoder 20, a decoder 30 and a coding system 10 are described based on Figs. 1 to 3. Fig. 1A is a conceptional or schematic block diagram illustrating an example coding system 10, e.g. a video coding system 10 that may utilize techniques of this present application (present disclosure). Encoder 20(e.g. Video encoder 20) and decoder 30(e.g. video decoder 30) of video coding system 10 represent examples of devices that may be configured to perform techniques in accordance with various examples described in the present application. As shown in FIG. 1A, the coding system 10 comprises a source device 12 configured to provide encoded data 13, e.g. an encoded picture 13, e.g. to a destination device 14 for decoding the encoded data 13.

The source device 12 comprises an encoder 20, and may additionally, i.e. optionally, comprise a picture source 16, a pre-processing unit 18, e.g. a picture pre-processing unit 18, and a communication interface or communication unit 22.

The picture source 16 may comprise or be any kind of picture capturing device, for example for capturing a real-world picture, and/or any kind of a picture or comment (for screen content coding, some texts on the screen is also considered a part of a picture or image to be encoded) generating device, for example a computer-graphics processor for generating a computer animated picture, or any kind of device for obtaining and/or providing a real-world picture, a computer animated picture (e.g. a screen content, a virtual reality (VR) picture) and/or any combination thereof (e.g. an augmented reality (AR) picture).

A (digital) picture is or can be regarded as a two-dimensional array or matrix of samples with intensity values. A sample in the array may also be referred to as pixel (short form of picture element) or a pel. The number of samples in horizontal and vertical direction (or axis) of the array or picture define the size and/or resolution of the picture. For representation of color, typically three color components are employed, i.e. the picture may be represented or include three sample arrays. In RBG format or color space a picture comprises a corresponding red, green and blue sample array. However, in video coding each pixel is typically represented in a

luminance/chrominance format or color space, e.g. YCbCr, which comprises a luminance component indicated by Y (sometimes also L is used instead) and two chrominance components indicated by Cb and Cr.

The picture source 16(e.g. video source 16) may be, for example a camera for capturing a picture, a memory, e.g. a picture memory, comprising or storing a previously captured or generated picture, and/or any kind of interface (internal or external) to obtain or receive a picture. The camera may be, for example, a local or integrated camera integrated in the source device, the memory may be a local or integrated memory, e.g. integrated in the source device. The interface may be, for example, an external interface to receive a picture from an external video source, for example an external picture capturing device like a camera, an external memory, or an external picture generating device, for example an external computer-graphics processor, computer or server. The interface can be any kind of interface, e.g. a wired or wireless interface, an optical interface, according to any proprietary or standardized interface protocol. The interface for obtaining the picture data 17 may be the same interface as or a part of the communication interface 22.

In distinction to the pre-processing unit 18 and the processing performed by the pre-processing unit

18, the picture or picture data 17(e.g. video data 16) may also be referred to as raw picture or raw picture data 17.

Pre-processing unit 18 is configured to receive the (raw) picture data 17 and to perform preprocessing on the picture data 17 to obtain a pre-processed picture 19 or pre-processed picture data

19. Pre-processing performed by the pre-processing unit 18 may, e.g., comprise trimming, color format conversion (e.g. from RGB to YCbCr), color correction, or de-noising. It can be understood that the pre-processing unit 18 may be optional component.

The encoder 20(e.g. video encoder 20) is configured to receive the pre-processed picture data 19 and provide encoded picture data 21 (further details will be described below, e.g., based on Fig. 2 or Fig.4).

Communication interface 22 of the source device 12 may be configured to receive the encoded picture data 21 and to transmit it to another device, e.g. the destination device 14 or any other device, for storage or direct reconstruction, or to process the encoded picture data 21 for respectively before storing the encoded data 13 and/or transmitting the encoded data 13 to another device, e.g. the destination device 14 or any other device for decoding or storing.

The destination device 14 comprises a decoder 30(e.g. a video decoder 30), and may additionally, i.e. optionally, comprise a communication interface or communication unit 28, a post-processing unit 32 and a display device 34.

The communication interface 28 of the destination device 14 is configured receive the encoded picture data 21 or the encoded data 13, e.g. directly from the source device 12 or from any other source, e.g. a storage device, e.g. an encoded picture data storage device.

The communication interface 22 and the communication interface 28 may be configured to transmit or receive the encoded picture data 21 or encoded data 13 via a direct communication link between the source device 12 and the destination device 14, e.g. a direct wired or wireless connection, or via any kind of network, e.g. a wired or wireless network or any combination thereof, or any kind of private and public network, or any kind of combination thereof. The communication interface 22 may be, e.g., configured to package the encoded picture data 21 into an appropriate format, e.g. packets, for transmission over a communication link or communication network.

The communication interface 28, forming the counterpart of the communication interface 22, may be, e.g., configured to de-package the encoded data 13 to obtain the encoded picture data 21.

Both, communication interface 22 and communication interface 28 may be configured as unidirectional communication interfaces as indicated by the arrow for the encoded picture data 13 in Fig. 1 A pointing from the source device 12 to the destination device 14, or bi-directional communication interfaces, and may be configured, e.g. to send and receive messages, e.g. to set up a connection, to acknowledge and exchange any other information related to the communication link and/or data transmission, e.g. encoded picture data transmission.

The decoder 30 is configured to receive the encoded picture data 21 and provide decoded picture data 31 or a decoded picture 31 (further details will be described below, e.g., based on Fig. 3 or Fig. 5).

The post-processor 32 of destination device 14 is configured to post-process the decoded picture data 31 (also called reconstructed picture data), e.g. the decoded picture 31, to obtain post- processed picture data 33, e.g. a post-processed picture 33. The post-processing performed by the post-processing unit 32 may comprise, e.g. color format conversion (e.g. from YCbCr to RGB), color correction, trimming, or re-sampling, or any other processing, e.g. for preparing the decoded picture data 31 for display, e.g. by display device 34.

The display device 34 of the destination device 14 is configured to receive the post-processed picture data 33 for displaying the picture, e.g. to a user or viewer. The display device 34 may be or comprise any kind of display for representing the reconstructed picture, e.g. an integrated or external display or monitor. The displays may, e.g. comprise liquid crystal displays (LCD), organic light emitting diodes (OLED) displays, plasma displays, projectors , micro LED displays, liquid crystal on silicon (LCoS), digital light processor (DLP) or any kind of other display.

Although Fig. 1 A depicts the source device 12 and the destination device 14 as separate devices, embodiments of devices may also comprise both or both functionalities, the source device 12 or corresponding functionality and the destination device 14 or corresponding functionality. In such embodiments the source device 12 or corresponding functionality and the destination device 14 or corresponding functionality may be implemented using the same hardware and/or software or by separate hardware and/or software or any combination thereof. As will be apparent for the skilled person based on the description, the existence and (exact) split of functionalities of the different units or functionalities within the source device 12 and/or destination device 14 as shown in Fig. 1 A may vary depending on the actual device and application.

The encoder 20 (e.g. a video encoder 20) and the decoder 30 (e.g. a video decoder 30) each may be implemented as any of a variety of suitable circuitry, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, or any combinations thereof. If the techniques are implemented partially in software, a device may store instructions for the software in a suitable, non-transitory computer-readable storage medium and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors. Each of video encoder 20 and video decoder 30 may be included in one or more encoders or decoders, either of which may be integrated as part of a combined encoder/decoder (CODEC) in a respective device.

Source device 12 may be referred to as a video encoding device or a video encoding apparatus. Destination device 14 may be referred to as a video decoding device or a video decoding apparatus. Source device 12 and destination device 14 may be examples of video coding devices or video coding apparatuses.

Source device 12 and destination device 14 may comprise any of a wide range of devices, including any kind of handheld or stationary devices, e.g. notebook or laptop computers, mobile phones, smart phones, tablets or tablet computers, cameras, desktop computers, set-top boxes, televisions, display devices, digital media players, video gaming consoles, video streaming devices(such as content services servers or content delivery servers), broadcast receiver device, broadcast transmitter device, or the like and may use no or any kind of operating system.

In some cases, the source device 12 and the destination device 14 may be equipped for wireless communication. Thus, the source device 12 and the destination device 14 may be wireless communication devices.

In some cases, video coding system 10 illustrated in FIG. 1A is merely an example and the techniques of the present application may apply to video coding settings (e.g., video encoding or video decoding) that do not necessarily include any data communication between the encoding and decoding devices. In other examples, data is retrieved from a local memory, streamed over a network, or the like. A video encoding device may encode and store data to memory, and/or a video decoding device may retrieve and decode data from memory. In some examples, the encoding and decoding is performed by devices that do not communicate with one another, but simply encode data to memory and/or retrieve and decode data from memory.

It should be understood that, for each of the examples described with reference to video encoder 20, video decoder 30 may be configured to perform a reciprocal process. With regard to signaling syntax elements, video decoder 30 may be configured to receive and parse such syntax element and decode the associated video data accordingly. In some examples, video encoder 20 may entropy encode one or more syntax elements into the encoded video bitstream. In such examples, video decoder 30 may parse such syntax element and decode the associated video data accordingly.

Fig. IB is an illustrative diagram of another example video coding system 40 including encoder 20 of fig. 2 and/or decoder 30 of fig. 3 according to an exemplary embodiment. The system 40 can implement techniques in accordance with various examples described in the present application. In the illustrated implementation, video coding system 40 may include imaging device(s) 41, video encoder 100, video decoder 30 (and/or a video coder implemented via logic circuitry 47 of processing unit(s) 46), an antenna 42, one or more processor(s) 43, one or more memory store(s) 44, and/or a display device 45.

As illustrated, imaging device(s) 41, antenna 42, processing unit(s) 46, logic circuitry 47, video encoder 20, video decoder 30, processor(s) 43, memory store(s) 44, and/or display device 45 may be capable of communication with one another. As discussed, although illustrated with both video encoder 20 and video decoder 30, video coding system 40 may include only video encoder 20 or only video decoder 30 in various examples.

As shown, in some examples, video coding system 40 may include antenna 42. Antenna 42 may be configured to transmit or receive an encoded bitstream of video data, for example. Further, in some examples, video coding system 40 may include display device 45. Display device 45 may be configured to present video data. As shown, in some examples, logic circuitry 47 may be implemented via processing unit(s) 46. Processing unit(s) 46 may include application-specific integrated circuit (ASIC) logic, graphics processor(s), general purpose processor(s), or the like. Video coding system 40 also may include optional processor(s) 43, which may similarly include application-specific integrated circuit (ASIC) logic, graphics processor(s), general purpose processor(s), or the like. In some examples, logic circuitry 47 may be implemented via hardware, video coding dedicated hardware, or the like, and processor(s) 43 may implemented general purpose software, operating systems, or the like. In addition, memory store(s) 44 may be any type of memory such as volatile memory (e.g., Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), etc.) or non-volatile memory (e.g., flash memory, etc.), and so forth. In a non-limiting example, memory store(s) 44 may be implemented by cache memory. In some examples, logic circuitry 47 may access memory store(s) 44 (for implementation of an image buffer for example). In other examples, logic circuitry 47 and/or processing unit(s) 46 may include memory stores (e.g., cache or the like) for the implementation of an image buffer or the like.

In some examples, video encoder 100 implemented via logic circuitry may include an image buffer (e.g., via either processing unit(s) 46 or memory store(s) 44)) and a graphics processing unit (e.g., via processing unit(s) 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include video encoder 100 as implemented via logic circuitry 47 to embody the various modules as discussed with respect to FIG. 2 and/or any other encoder system or subsystem described herein. The logic circuitry may be configured to perform the various operations as discussed herein.

Video decoder 30 may be implemented in a similar manner as implemented via logic circuitry 47 to embody the various modules as discussed with respect to decoder 30 of FIG. 3 and/or any other decoder system or subsystem described herein. In some examples, video decoder 30 may be implemented via logic circuitry may include an image buffer (e.g., via either processing unit(s) 420 or memory store(s) 44)) and a graphics processing unit (e.g., via processing unit(s) 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include video decoder 30 as implemented via logic circuitry 47 to embody the various modules as discussed with respect to FIG. 3 and/or any other decoder system or subsystem described herein.

In some examples, antenna 42 of video coding system 40 may be configured to receive an encoded bitstream of video data. As discussed, the encoded bitstream may include data, indicators, index values, mode selection data, or the like associated with encoding a video frame as discussed herein, such as data associated with the coding partition (e.g., transform coefficients or quantized transform coefficients, optional indicators (as discussed), and/or data defining the coding partition). Video coding system 40 may also include video decoder 30 coupled to antenna 42 and configured to decode the encoded bitstream. The display device 45 configured to present video frames. ENCODER & ENCODING METHOD

Fig. 2 shows a schematic/conceptual block diagram of an example video encoder 20 that is configured to implement the techniques of the present application. In the example of fig. 2, the video encoder 20 comprises a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, and inverse transform processing unit 212, a reconstruction unit 214, a buffer 216, a loop filter unit 220, a decoded picture buffer (DPB) 230, a prediction processing unit 260 and an entropy encoding unit 270. The prediction processing unit 260 may include an inter prediction unit 244, an intra prediction unit 254 and a mode selection unit 262. Inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown). A video encoder 20 as shown in Fig. 2 may also be referred to as hybrid video encoder or a video encoder according to a hybrid video codec.

For example, the residual calculation unit 204, the transform processing unit 206, the quantization unit 208, the prediction processing unit 260 and the entropy encoding unit 270 form a forward signal path of the encoder 20, whereas, for example, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, prediction processing unit 260 form a backward signal path of the encoder, wherein the backward signal path of the encoder corresponds to the signal path of the decoder (see decoder 30 in Fig. 3).

The encoder 20 is configured to receive, e.g. by input 202, a picture 201 or a block 203 of the picture 201, e.g. picture of a sequence of pictures forming a video orvideo sequence. The picture block 203 may also be referred to as current picture block or picture block to be coded, and the picture 201 as current picture or picture to be coded (in particular in video coding to distinguish the current picture from other pictures, e.g. previously encoded and/or decoded pictures of the same video sequence, i.e. the video sequence which also comprises the current picture).

PARTITIONING

Embodiments of the encoder 20 may comprise a partitioning unit (not depicted in Fig. 2) configured to partition the picture 201 into a plurality of blocks, e.g. blocks like block 203, typically into a plurality of non-overlapping blocks. The partitioning unit may be configured to use the same block size for all pictures of a video sequence and the corresponding grid defining the block size, or to change the block size between pictures or subsets or groups of pictures, and partition each picture into the corresponding blocks. In one example, the prediction processing unit 260 of video encoder 20 may be configured to perform any combination of the partitioning techniques.

Like the picture 201, the block 203 again is or can be regarded as a two-dimensional array or matrix of samples with intensity values (sample values), although of smaller dimension than the picture 201. In other words, the block 203 may comprise, e.g., one sample array (e.g. a luma array in case of a monochrome picture 201) or three sample arrays (e.g. a luma and two chroma arrays in case of a color picture 201) or any other number and/or kind of arrays depending on the color format applied. The number of samples in horizontal and vertical direction (or axis) of the block 203 define the size of block 203.

Encoder 20 as shown in Fig. 2 is configured encode the picture 201 block by block, e.g. the encoding and prediction is performed per block 203.

RESIDUAL CALCULATION

The residual calculation unit 204 is configured to calculate a residual block 205 based on the picture block 203 and a prediction block 265 (further details about the prediction block 265 are provided later), e.g. by subtracting sample values of the prediction block 265 from sample values of the picture block 203, sample by sample (pixel by pixel) to obtain the residual block 205 in the sample domain.

TRANSFORM

The transform processing unit 206 is configured to apply a transform, e.g. a discrete cosine transform (DCT) or discrete sine transform (DST), on the sample values of the residual block 205 to obtain transform coefficients 207 in a transform domain. The transform coefficients 207 may also be referred to as transform residual coefficients and represent the residual block 205 in the transform domain.

The transform processing unit 206 may be configured to apply integer approximations of

DCT/DST, such as the transforms specified for HEVC/H.265. Compared to an orthogonal DCT transform, such integer approximations are typically scaled by a certain factor. In order to preserve the norm of the residual block which is processed by forward and inverse transforms, additional scaling factors are applied as part of the transform process. The scaling factors are typically chosen based on certain constraints like scaling factors being a power of two for shift operation, bit depth of the transform coefficients, tradeoff between accuracy and implementation costs, etc. Specific scaling factors are, for example, specified for the inverse transform, e.g. by inverse transform processing unit 212, at a decoder 30 (and the corresponding inverse transform, e.g. by inverse transform processing unit 212 at an encoder 20) and corresponding scaling factors for the forward transform, e.g. by transform processing unit 206, at an encoder 20 may be specified accordingly.

QUANTIZATION

The quantization unit 208 is configured to quantize the transform coefficients 207 to obtain quantized transform coefficients 209, e.g. by applying scalar quantization or vector quantization. The quantized transform coefficients 209 may also be referred to as quantized residual coefficients 209. The quantization process may reduce the bit depth associated with some or all of the transform coefficients 207. For example, an n-bit Transform coefficient may be rounded down to an m-bit Transform coefficient during quantization, where n is greater than m. The degree of quantization may be modified by adjusting a quantization parameter (QP). For example for scalar quantization, different scaling may be applied to achieve finer or coarser quantization. Smaller quantization step sizes correspond to finer quantization, whereas larger quantization step sizes correspond to coarser quantization. The applicable quantization step size may be indicated by a quantization parameter (QP). The quantization parameter may for example be an index to a predefined set of applicable quantization step sizes. For example, small quantization parameters may correspond to fine quantization (small quantization step sizes) and large quantization parameters may correspond to coarse quantization (large quantization step sizes) or vice versa. The quantization may include division by a quantization step size and corresponding or inverse dequantization, e.g. by inverse quantization 210, may include multiplication by the quantization step size. Embodiments according to some standards, e.g. HEVC, may be configured to use a quantization parameter to determine the quantization step size. Generally, the quantization step size may be calculated based on a quantization parameter using a fixed point approximation of an equation including division.

Additional scaling factors may be introduced for quantization and dequantization to restore the norm of the residual block, which might get modified because of the scaling used in the fixed point approximation of the equation for quantization step size and quantization parameter. In one example implementation, the scaling of the inverse transform and dequantization might be combined. Alternatively, customized quantization tables may be used and signaled from an encoder to a decoder, e.g. in a bitstream. The quantization is a lossy operation, wherein the loss increases with increasing quantization step sizes.

The inverse quantization unit 210 is configured to apply the inverse quantization of the quantization unit 208 on the quantized coefficients to obtain dequantized coefficients 211, e.g. by applying the inverse of the quantization scheme applied by the quantization unit 208 based on or using the same quantization step size as the quantization unit 208. The dequantized coefficients 211 may also be referred to as dequantized residual coefficients 211 and correspond - although typically not identical to the transform coefficients due to the loss by quantization - to the transform coefficients 207.

The inverse transform processing unit 212 is configured to apply the inverse transform of the transform applied by the transform processing unit 206, e.g. an inverse discrete cosine transform (DCT) or inverse discrete sine transform (DST), to obtain an inverse transform block 213 in the sample domain. The inverse transform block 213 may also be referred to as inverse transform dequantized block 213 or inverse transform residual block 213.

The reconstruction unit 214(e.g. Summer 214) is configured to add the inverse transform block 213(i.e. reconstructed residual block 213) to the prediction block 265 to obtain a reconstructed block 215 in the sample domain, e.g. by adding the sample values of the reconstructed residual block 213 and the sample values of the prediction block 265.

Optional, the buffer unit 216 (or short“buffer” 216), e.g. a line buffer 216, is configured to buffer or store the reconstructed block 215 and the respective sample values, for example for intra prediction. In further embodiments, the encoder may be configured to use unfiltered reconstructed blocks and/or the respective sample values stored in buffer unit 216 for any kind of estimation and/or prediction, e.g. intra prediction.

Embodiments of the encoder 20 may be configured such that, e.g. the buffer unit 216 is not only used for storing the reconstructed blocks 215 for intra prediction 254 but also for the loop filter unit

220 (not shown in Fig. 2), and/or such that, e.g. the buffer unit 216 and the decoded picture buffer unit 230 form one buffer. Further embodiments may be configured to use filtered blocks 221 and/or blocks or samples from the decoded picture buffer 230 (both not shown in Fig. 2) as input or basis for intra prediction 254.

The loop filter unit 220 (or short“loop filter” 220), is configured to filter the reconstructed block 215 to obtain a filtered block 221. The loop filter unit 220 is intended to represent one or more loop filters such as a de-blocking filter, a sample-adaptive offset (SAO) filter or other filters, e.g. a bilateral filter or an adaptive loop filter (ALF) or a sharpening or smoothing filters or collaborative filters. Although the loop filter unit 220 is shown in FIG. 2 as being an in loop filter, in other configurations, the loop filter unit 220 may be implemented as a post loop filter. The filtered block

221 may also be referred to as filtered reconstructed block 221. Decoded picture buffer 230 may store the reconstructed coding blocks after the loop filter unit 220 performs the filtering operations on the reconstructed coding blocks.

Embodiments of the encoder 20 (respectively loop filter unit 220) may be configured to output loop filter parameters (such as sample adaptive offset information), e.g. directly or entropy encoded via the entropy encoding unit 270 or any other entropy coding unit, so that, e.g., a decoder 30 may receive and apply the same loop filter parameters for decoding.

The decoded picture buffer (DPB) 230 may be a reference picture memory that stores reference picture data for use in encoding video data by video encoder 20. The DPB 230 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The DPB 230 and the buffer 216 may be provided by the same memory device or separate memory devices. In some example, the decoded picture buffer (DPB) 230 is configured to store the filtered block 221. The decoded picture buffer 230 may be further configured to store other previously filtered blocks, e.g. previously reconstructed and filtered blocks 221, of the same current picture or of different pictures, e.g. previously reconstructed pictures, and may provide complete previously reconstructed, i.e. decoded, pictures (and corresponding reference blocks and samples) and/or a partially reconstructed current picture (and corresponding reference blocks and samples), for example for inter prediction. In some example, if the reconstructed block 215 is reconstructed but without in-loop filtering, the decoded picture buffer (DPB) 230 is configured to store the reconstructed block 215.

The prediction processing unit 260, also referred to as block prediction processing unit 260, is configured to receive or obtain the block 203 (current block 203 of the current picture 201) and reconstructed picture data, e.g. reference samples of the same (current) picture from buffer 216 and/or reference picture data 231 from one or a plurality of previously decoded pictures from decoded picture buffer 230, and to process such data for prediction, i.e. to provide a prediction block 265, which may be an inter-predicted block 245 or an intra-predicted block 255.

Mode selection unit 262 may be configured to select a prediction mode (e.g. an intra or inter prediction mode) and/or a corresponding prediction block 245 or 255 to be used as prediction block 265 for the calculation of the residual block 205 and for the reconstruction of the reconstructed block 215.

Embodiments of the mode selection unit 262 may be configured to select the prediction mode (e.g. from those supported by prediction processing unit 260), which provides the best match or in other words the minimum residual (minimum residual means better compression for transmission or storage), or a minimum signaling overhead (minimum signaling overhead means better compression for transmission or storage), or which considers or balances both. The mode selection unit 262 may be configured to determine the prediction mode based on rate distortion optimization (RDO), i.e. select the prediction mode which provides a minimum rate distortion optimization or which associated rate distortion at least a fulfills a prediction mode selection criterion.

In the following the prediction processing (e.g. prediction processing unit 260 and mode selection (e.g. by mode selection unit 262) performed by an example encoder 20 will be explained in more detail.

The encoder 20 is configured to determine or select the best or an optimum prediction mode from a set of (pre-determined) prediction modes. The set of prediction modes may comprise, e.g., intraprediction modes and/or inter-prediction modes.

The prediction processing unit 260 may be further configured to partition the block 203 into smaller block partitions or sub-blocks, e.g. iteratively using quad-tree-partitioning (QT), binary partitioning (BT) or triple-tree-partitioning (TT) or any combination thereof, and to perform, e.g. the prediction for each of the block partitions or sub-blocks, wherein the mode selection comprises the selection of the tree-structure of the partitioned block 203 and the prediction modes applied to each of the block partitions or sub-blocks.

Upon receiving the motion vector for the PU of the current picture block, the motion compensation unit 246 may locate the prediction block to which the motion vector points in one of the reference picture lists. Motion compensation unit 246 may also generate syntax elements associated with the blocks and the video slice for use by video decoder 30 in decoding the picture blocks of the video slice.

The intra prediction unit 254 is configured to obtain, e.g. receive, the picture block 203 (current picture block) and one or a plurality of previously reconstructed blocks, e.g. reconstructed neighbor blocks, of the same picture for intra estimation. The encoder 20 may, e.g., be configured to select an intra prediction mode from a plurality of intra prediction modes.

Embodiments of the encoder 20 may be configured to select the intra-prediction mode based on an optimization criterion, e.g. minimum residual (e.g. the intra-prediction mode providing the prediction block 255 most similar to the current picture block 203) or minimum rate distortion. The intra prediction unit 254 is further configured to determine based on intra prediction parameter, e.g. the selected intra prediction mode, the intra prediction block 255. In any case, after selecting an intra prediction mode for a block, the intra prediction unit 254 is also configured to provide intra prediction parameter, i.e. information indicative of the selected intra prediction mode for the block to the entropy encoding unit 270. In one example, the intra prediction unit 254 may be configured to perform any combination of the intra prediction techniques described later.

The entropy encoding unit 270 is configured to apply an entropy encoding algorithm or scheme (e.g. a variable length coding (VLC) scheme, an context adaptive VLC scheme (CALVC), an arithmetic coding scheme, a context adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding or another entropy encoding methodology or technique) on the quantized residual coefficients 209, inter prediction parameters, intra prediction parameter, and/or loop filter parameters, individually or jointly (or not at all) to obtain encoded picture data 21 which can be output by the output 272, e.g. in the form of an encoded bitstream 21. The encoded bitstream 21 may be transmitted to video decoder 30, or archived for later transmission or retrieval by video decoder 30.

Other structural variations of the video encoder 20 can be used to encode the video stream. For example, a non-transform based encoder 20 can quantize the residual signal directly without the transform processing unit 206 for certain blocks or frames. In another implementation, an encoder 20 can have the quantization unit 208 and the inverse quantization unit 210 combined into a single unit.

Fig. 3 shows an exemplary video decoder 30 that is configured to implement the techniques of this present application. The video decoder 30 configured to receive encoded picture data (e.g. encoded bitstream) 21, e.g. encoded by encoder 100, to obtain a decoded picture 131. During the decoding process, video decoder 30 receives video data, e.g. an encoded video bitstream that represents picture blocks of an encoded video slice and associated syntax elements, from video encoder 100.

In the example of fig. 3, the decoder 30 comprises an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 314(e.g. a summer 314), a buffer 316, a loop filter 320, a decoded picture buffer 330 and a prediction processing unit 360. The prediction processing unit 360 may include an inter prediction unit 344, an intra prediction unit 354, and a mode selection unit 362. Video decoder 30 may, in some examples, perform a decoding pass generally reciprocal to the encoding pass described with respect to video encoder 100 from FIG. 2.

The entropy decoding unit 304 is configured to perform entropy decoding to the encoded picture data 21 to obtain, e.g., quantized coefficients 309 and/or decoded coding parameters (not shown in Fig. 3), e.g. (decoded) any or all of inter prediction parameters, intra prediction parameter, loop filter parameters, and/or other syntax elements. Entropy decoding unit 304 is further configured to forward inter prediction parameters, intra prediction parameter and/or other syntax elements to the prediction processing unit 360. Video decoder 30 may receive the syntax elements at the video slice level and/or the video block level.

The inverse quantization unit 310 may be identical in function to the inverse quantization unit 110, the inverse transform processing unit 312 may be identical in function to the inverse transform processing unit 112, the reconstmction unit 314 may be identical in function reconstruction unit 114, the buffer 316 may be identical in function to the buffer 116, the loop filter 320 may be identical in function to the loop filter 120 , and the decoded picture buffer 330 may be identical in function to the decoded picture buffer 130.

The prediction processing unit 360 may comprise an inter prediction unit 344 and an intra prediction unit 354, wherein the inter prediction unit 344 may resemble the inter prediction unit 144 in function, and the intra prediction unit 354 may resemble the intra prediction unit 154 in function. The prediction processing unit 360 are typically configured to perform the block prediction and/or obtain the prediction block 365 from the encoded data 21 and to receive or obtain (explicitly or implicitly) the prediction related parameters and/or the information about the selected prediction mode, e.g. from the entropy decoding unit 304.

When the video slice is coded as an intra coded (I) slice, intra prediction unit 354 of prediction processing unit 360 is configured to generate prediction block 365 for a picture block of the current video slice based on a signaled intra prediction mode and data from previously decoded blocks of the current frame or picture. When the video frame is coded as an inter coded (i.e., B, or P) slice, inter prediction unit 344(e.g. motion compensation unit) of prediction processing unit 360 is configured to produce prediction blocks 365 for a video block of the current video slice based on the motion vectors and other syntax elements received from entropy decoding unit 304. For inter prediction, the prediction blocks may be produced from one of the reference pictures within one of the reference picture lists. Video decoder 30 may constmct the reference frame lists, List 0 and List 1, using default construction techniques based on reference pictures stored in DPB 330. Prediction processing unit 360 is configured to determine prediction information for a video block of the current video slice by parsing the motion vectors and other syntax elements, and uses the prediction information to produce the prediction blocks for the current video block being decoded. For example, the prediction processing unit 360 uses some of the received syntax elements to determine a prediction mode (e.g., intra or inter prediction) used to code the video blocks of the video slice, an inter prediction slice type (e.g., B slice, P slice, or GPB slice), construction information for one or more of the reference picture lists for the slice, motion vectors for each inter encoded video block of the slice, inter prediction status for each inter coded video block of the slice, and other information to decode the video blocks in the current video slice.

Inverse quantization unit 310 is configured to inverse quantize, i.e., de-quantize, the quantized transform coefficients provided in the bitstream and decoded by entropy decoding unit 304. The inverse quantization process may include use of a quantization parameter calculated by video encoder 100 for each video block in the video slice to determine a degree of quantization and, likewise, a degree of inverse quantization that should be applied.

Inverse transform processing unit 312 is configured to apply an inverse transform, e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process, to the transform coefficients in order to produce residual blocks in the pixel domain.

The reconstruction unit 314(e.g. Summer 314) is configured to add the inverse transform block 313(i.e. reconstructed residual block 313) to the prediction block 365 to obtain a reconstructed block 315 in the sample domain, e.g. by adding the sample values of the reconstructed residual block 313 and the sample values of the prediction block 365.

The loop filter unit 320 (either in the coding loop or after the coding loop) is configured to filter the reconstructed block 315 to obtain a filtered block 321, e.g. to smooth pixel transitions, or otherwise improve the video quality. The loop filter unit 320 is intended to represent one or more loop filters such as a de-blocking filter, a sample-adaptive offset (SAO) filter or other filters, e.g. a bilateral filter or an adaptive loop filter (ALF) or a sharpening or smoothing filters or collaborative filters. Although the loop filter unit 320 is shown in FIG. 3 as being an in loop filter, in other configurations, the loop fdter unit 320 may be implemented as a post loop filter.

The decoded video blocks 321 in a given frame or picture are then stored in decoded picture buffer 330, which stores reference pictures used for subsequent motion compensation. The decoder 30 is configured to output the decoded picture 331, e.g. via output 332, for presentation or viewing to a user.

Other variations of the video decoder 30 can be used to decode the compressed bitstream. For example, the decoder 30 can produce the output video stream without the loop filtering unit 320. For example, a non-transform based decoder 30 can inverse-quantize the residual signal directly without the inverse-transform processing unit 312 for certain blocks or frames. In another implementation, the video decoder 30 can have the inverse-quantization unit 310 and the inverse- transform processing unit 312 combined into a single unit.

FIG. 4 is a schematic diagram of a video coding device 400 according to an embodiment of the disclosure. The video coding device 400 is suitable for implementing the disclosed embodiments as described herein. In an embodiment, the video coding device 400 may be a decoder such as video decoder 30 of FIG. 1 A or an encoder such as video encoder 20 of FIG. 1A. In an embodiment, the video coding device 400 may be one or more components of the video decoder 30 of FIG. 1A or the video encoder 20 of FIG. 1A as described above.

The video coding device 400 comprises ingress ports 410 and receiver units (Rx) 420 for receiving data; a processor, logic unit, or central processing unit (CPU) 430 to process the data; transmitter units (Tx) 440 and egress ports 450 for transmitting the data; and a memory 460 for storing the data. The video coding device 400 may also comprise optical-to-electrical (OE) components and electrical-to-optical (EO) components coupled to the ingress ports 410, the receiver units 420, the transmitter units 440, and the egress ports 450 for egress or ingress of optical or electrical signals.

The processor 430 is implemented by hardware and software. The processor 430 may be implemented as one or more CPU chips, cores (e.g., as a multi-core processor), FPGAs, ASICs, and DSPs. The processor 430 is in communication with the ingress ports 410, receiver units 420, transmitter units 440, egress ports 450, and memory 460. The processor 430 comprises a coding module 470. For instance, the coding module 470 implements, processes, prepares, or provides the various coding operations. The inclusion of the coding module 470 therefore provides a substantial improvement to the functionality of the video coding device 400 and effects a transformation of the video coding device 400 to a different state. Alternatively, the coding module 470 is implemented as instructions stored in the memory 460 and executed by the processor 430.

The memory 460 comprises one or more disks, tape drives, and solid-state drives and may be used as an over-flow data storage device, to store programs when such programs are selected for execution, and to store instructions and data that are read during program execution. The memory 460 may be volatile and/or non-volatile and may be read-only memory (ROM), random access memory (RAM), ternary content-addressable memory (TCAM), and/or static random-access memory (SRAM).

Fig. 5 is a simplified block diagram of an apparatus 500 that may be used as either or both of the source device 310 and the destination device 320 from Fig. 1 according to an exemplary embodiment. The apparatus 500 can be in the form of a computing system including multiple computing devices, or in the form of a single computing device, for example, a mobile phone, a tablet computer, a laptop computer, a notebook computer, a desktop computer, and the like.

A processor 502 in the apparatus 500 can be a central processing unit. Alternatively, the processor 502 can be any other type of device, or multiple devices, capable of manipulating or processing information now-existing or hereafter developed. Although the disclosed implementations can be practiced with a single processor as shown, e.g., the processor 502, advantages in speed and efficiency can be achieved using more than one processor.

A memory 504 in the apparatus 500 can be a read only memory (ROM) device or a random access memory (RAM) device in an implementation. Any other suitable type of storage device can be used as the memory 504. The memory 504 can include code and data 506 that is accessed by the processor 502 using a bus 512. The memory 504 can further include an operating system 508 and application programs 510. The apparatus 500 can also include additional memory in the form of a secondary storage 514, which can, for example, be a memory card used with a mobile computing device. Because the video communication sessions may contain a significant amount of information, they can be stored in whole or in part in the secondary storage 514 and loaded into the memory 504 as needed for processing.

The apparatus 500 can also include one or more output devices, such as a display 518. The display 518 may be, in one example, a touch sensitive display that combines a display with a touch sensitive element that is operable to sense touch inputs. The display 518 can be coupled to the processor 502 via the bus 512. Other output devices that permit a user to program or otherwise use the apparatus 500 can be provided in addition to or as an alternative to the display 518. When the output device is or includes a display, the display can be implemented in various ways, including by a liquid crystal display (LCD), a cathode-ray tube (CRT) display, a plasma display or light emitting diode (LED) display, such as an organic LED (OLED) display.

The apparatus 500 can also include or be in communication with an image-sensing device 520, for example a camera, or any other image-sensing device 520 now existing or hereafter developed that can sense an image such as the image of a user operating the apparatus 500. The image-sensing device 520 can be positioned such that it is directed toward the user operating the apparatus 500. In an example, the position and optical axis of the image-sensing device 520 can be configured such that the field of vision includes an area that is directly adjacent to the display 518 and from which the display 518 is visible.

The apparatus 500 can also include or be in communication with a sound-sensing device 522, for example a microphone, or any other sound-sensing device now existing or hereafter developed that can sense sounds near the apparatus 500. The sound-sensing device 522 can be positioned such that it is directed toward the user operating the apparatus 500 and can be configured to receive sounds, for example, speech or other utterances, made by the user while the user operates the apparatus 500.

Although FIG. 5 depicts the processor 502 and the memory 504 of the apparatus 500 as being integrated into a single unit, other configurations can be utilized. The operations of the processor 502 can be distributed across multiple machines (each machine having one or more of processors) that can be coupled directly or across a local area or other network. The memory 504 can be distributed across multiple machines such as a network-based memory or memory in multiple machines performing the operations of the apparatus 500. Although depicted here as a single bus, the bus 512of the apparatus 500 can be composed of multiple buses. Further, the secondary storage 514 can be directly coupled to the other components of the apparatus 500 or can be accessed via a network and can comprise a single integrated unit such as a memory card or multiple units such as multiple memory cards. The apparatus 500 can thus be implemented in a wide variety of configurations.

Figure 6 shows a schematic diagram of a video coding block illustrating different directional intraprediction modes. The intra prediction modes as shown in figure 6 include a planar mode (the intraprediction mode index is 0), DC mode (the intra-prediction mode index is 1), and 33 directional modes (the intra-prediction mode index ranges from 2 to 34, indicated by the solid lines). The set of directional intra-prediction modes was extended up to 65 modes (almost doubled) by decreasing a step angle between directional intra-prediction modes by a factor of 2. The dotted lines in figure 6 denote the angular modes, which are introduced in the JEM software.

As shown in Figure 6, the latest version of JEM has some modes corresponding to skew intra prediction directions. For any of these modes, to predict samples within a block interpolation of a set of neighboring reference samples should be performed, if a corresponding position within a block side is fractional. HEVC and VVC uses linear interpolation between two adjacent reference samples. JEM uses more sophisticated 4-tap interpolation filters. Filter coefficients are selected to be either Gaussian or Cubic ones depending on the width or on the height value. Decision on whether to use width or height is harmonized with the decision on main reference side selection: when intra prediction mode is greater or equal to diagonal mode, top side of reference samples is selected to be the main reference side and width value is selected to determine interpolation filter in use. Otherwise, main side reference is selected from the left side of the block and height controls the filter selection process. Intra prediction modes defined in FIG.6 may be called as predetermined intra prediction modes. Correspondingly, directional intra prediction modes defined in FIG.6 may be called as predetermined directional intra prediction modes

Figures 7a and 7b illustrate an example of block partitioning and a corresponding tree structure by using quad-tree plus binary -tree (QTBT), wherein solid lines denote quad-tree partitioning and dashed lines denote binary -tree partitioning. In each partitioning node of the binary -tree, the partitioning type is indicated by 0 (horizontal partitioning) or 1 (vertical partitioning).

Figure 8 illustrate a square block or square subblocks asymmetry caused by the fact that different number of reconstructed reference samples is available along with each block side. In short, a reconstruct reference sample is called as a reference sample. A square video coding block comprises shorter and longer sides of reconstructed reference samples, and such asymmetry can be used to improve the current directional intra-prediction mechanism by increasing its prediction accuracy. A square video coding block is also called as a coding block of a square shape, or a square coding block, or square block or square subblocks. As illustrated in figure 8, the number of available directional intra-prediction modes can be increased along a long side to predict values of a video coding block being reconstructed.

To take advantage of this asymmetry, it is possible to enable additional directional intra-prediction modes that fall into the angle segment ¾_> that encompasses M₀ directional modes along with that square block side where the number of available reconstructed reference samples is more. This angle segment ¾_> is depicted in FIG. 8 by solid lines. The number M₀ of directional modes is represented by an positive integer number and can be equal, for example, to 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc. Optionally, the opposite angle segment that covers the angles of the same size <¾ depicted in FIG. 8 by dashed lines can be disabled to reuse the indices of the directional modes that fall into this segment shown with dashed lines by mapping the newly enabled directional modes onto these disabled mode. Otherwise, the newly enabled directional modes belonging to the angle segment ¾_> depicted by solid lines should be signaled, for example, by assigning them their own indices. The number Mo of directional modes depends on

reference sample ratio R_L = L_H/L_W. if L_H > L_w: the more R_\_ is, the larger the number M₀ of directional modes is enabled;

reference sample ratio R_T = L_W/L_H. if L_H < L_w: the more R is, the larger the number ₀ of directional modes is enabled.

The value of M₀ can be calculated using, for example, the following formula:

where R e {//, . // , } and N_oflset e {q,I ,2,...} is an offset. The value of R is selected as follows:

- if L_h > L_W , then R = ?_L ;

- if L_H < L_w, then R = R_T .

N_oflset is an integer number that can take different values such as 0, 1, 2, etc.

L_w represents a length of first reconstructed reference samples of the coding block or coding subblock of a square shape. As an example, the first reconstructed reference samples are top reconstructed reference samples of the coding block or coding subblock, and top reconstructed reference samples are in a horizontal orientation of the coding block or coding subblock of square shape.

L_H represents a length of second reconstructed reference samples of the coding block or coding subblock of the square shape. As an example, the second reconstructed reference samples are left reconstructed reference samples of the coding block or coding subblock of square shape, and left reconstructed reference samples are in a vertical orientation of the coding block or coding subblock of square shape.

As another example, the first or the second reconstructed reference samples may be right reconstructed reference samples.

As other example, there is third reconstructed reference samples, and the third reconstructed reference samples may be right reconstructed reference samples. The encoder or the decoder described in FIGs.lA to 5, may check the first reconstructed reference samples, the second reconstructed reference samples, and the third reconstructed reference samples, and then decide a directional intra prediction mode of the coding block or coding subblock based on the first, the second, and the third reconstructed reference samples.

The number of the newly introduced directional intra-prediction modes (also called as complementary directional intra prediction modes) may depend on the reference sample ratio of the square block or square subblock. The angle that encompasses these new modes is defined by the following formula: 1 L

arctan

R )

The actual number of these modes may depend on the angle between neighbor directional modes and the angle a₀ defined by the above formula. In the embodiment shown in figure 8, the number of reference samples is extended along the longer side, and it is not reduced for the shorter side. Therefore, the amount of intra-prediction modes that are available along the longer side (the angle that encompasses these modes is marked by a solid line) is increased, but the number of intra-prediction modes that are available along the shorter side (the angle that encompasses these modes is marked by a dashed line) is not decreased. Hence, the cardinality of the intra-prediction mode set is increased. On the other hand, the number of reference samples is extended along the longer side, and it is reduced for the shorter side. Therefore, the amount of intra-prediction modes that are available along the longer side (the angle that encompasses these modes is marked by a solid line) is increased, and the number of intraprediction modes that are available along the shorter side (the angle that encompasses these modes is marked by a dashed line) is decreased. Hence, the cardinality of the intra-prediction mode set may be unchanged.

The amount of the directional intra-prediction modes added along the longer side (the angle that encompasses these modes is marked by a solid line) may be equal to the amount of the directional intra-prediction modes removed along the shorter side (the angle that encompasses these modes is marked by a dashed lines). Thus, the cardinality of the intra-prediction mode set remains the same as for square blocks or square subblocks. According to an embodiment, whether to extend a set of available intra-prediction modes or not can also depend on the availability of reference samples because they are needed to generate an intra-predictor. The intra-predictor means a predicted sample, in short, predSample.

In addition to the general cases described in FIG.8, some special ones are possible. For example, a square block or square subblocks can be located on picture boundary as shown in FIG. 9a and FIG. 10a. For each case, 2 sub-cases are possible that differ from each other with the number of available reconstructed reference samples. The number Mi of newly enabled directional modes that fall into the angle segment % shown by solid lines is equals to or more than the number ₂ of newly enabled directional modes that fall into the angle segment GO shown by solid lines.

Similarly, the number M₃ of newly enabled directional modes that fall into the angle segment o¾ shown by solid lines is equals to or more than the number M₄ of newly enabled directional modes that fall into the angle segment ora shown by solid lines. As also shown in FIGs. 9b-9c, intra-predicted block is divided horizontally into 2 or 4 subpartitions depending on the block size, so that the predicted samples of subblock 1 may be used as reference samples of the next subblock, for example, subblock 2. Correspondingly, the predicted samples of subblock 2 may be used as reference samples of the next subblock, for example, subblock 3. At the embodiments shown in FIGs. 9b-9c, the first length is the number of refrence samples for the block being divided into subblocks, for example, 4. The second length is the number of refrence samples for the subblock being predicted, for example, 1.

As also shown in FIGs. lOb-lOc, intra-predicted block is divided vertically into 2 or 4 subpartitions depending on the block size, so that the predicted samples of subblock 1 may be used as reference samples of the next subblock, for example, subblock 2. Correspondingly, the predicted samples of subblock 2 may be used as reference samples of the next subblock, for example, subblock 3. At the embodiments shown in FIGs. lOb-lOc, the first length is the number of refrence samples for the block being divided into subblocks, for example, 4. The second length is the number of refrence samples for the subblock being predicted, for example, 1.

As some examples, the first length may be 32, 16, 8, 4 or 2, the second length may be 1.

Figure 11 shows a square block or square subblock with no asymmetry caused by the different number of available reconstructed reference samples along with each side. In this situation, the number M of directional modes does not differ from conventional methond.

Figure 12 shows a flow diagram illustrating steps of an intra-prediction method for a coding block or coding subblock of a square shape according to an embodiment.

At step 1202, the encoder or the decoder as described in FIGs. 1 A-5, determines a first length L_w of first reconstmcted reference samples of the coding block or coding subblock.

At step 1204, the encoder or the decoder as described in FIGs. 1 A-5, determines a second length L_H of second reconstmcted reference samples of the coding block or coding subblock.

As described above, in FIGs. 8-11, the first reconstmcted reference samples are top reconstmcted reference samples of the coding block or coding subblock, and the second reconstmcted reference samples are left reconstmcted reference samples of the coding block or coding subblock.

Optionally, at step 1206, the encoder or the decoder determines a reference sample ratio of the coding block or coding subblock based on the first length and the second length.

Reference sample ratio R_h = L_H/L_W. if L_H > L_w

reference sample ratio R = L_W/L_H, if L_H < L_W.

At step 1208, determining a set of complementary directional intra prediction modes upon the basis of the reference sample ratio of the coding block or coding subblock. For example, a number of intra prediction modes in the set of complementary directional intra prediction modes is decided based on f?_L, or based on R_T, or based on R_Land R_T .

As embodiments shown in FIGs. 8-11, the number of intra prediction modes in the set of complementary directional intra prediction modes is M₀ , M₁ M₂ , M_z OG M 4

As embodiments shown in FIGs. 8-11, the angle of the set of complementary directional intra prediction modes is a₀ , a_t , a₂ , a , or cr₄ .

When the first length is larger than the second length, the set of complementary directional intra prediction modes are enabled along the first reconstructed reference samples. Optionally, at least one predetermined directional intra prediction mode is disabled along the second reconstructed reference samples.

When the second length is larger than the first length, the set of complementary directional intra prediction modes are enabled along the second reconstructed reference samples. Optionally, at least one predetermined directional intra prediction mode is disabled along the first reconstructed reference samples.

In one example, the number of complementary directional intra prediction modes enabled may equal to the number of predetermined directional intra prediction modes disabled. In another example, the number of complementary directional intra prediction modes enabled may be different from the number of predetermined directional intra prediction modes disabled.

At step 1210, the encoder or the decoder determines a directional intra prediction mode of the coding block or coding subblock based on the first length and the second length, with or without performing steps 1206 and 1208.

If step 1206 is performed, the encoder or the decoder may determine the directional intra prediction mode of the coding block or coding subblock based on the reference sample ratio.

If step 1208 is performed, the encoder or the decoder may determine the directional intra prediction mode of the coding block or coding subblock based on the set of complementary directional intra prediction modes and a set of predetermined directional intra prediction mode as shown in FIG. 6. The encoder or the decoder may also determine the directional intra prediction mode of the coding block or coding subblock based on the first length and the second length and a set of predetermined directional intra prediction modes as shown in FIG.6. Each predetermined directional intra prediction mode of the set of predetermined directional intra prediction modes being associated with a predetermined direction, and the set of predetermined directional intra prediction modes do not include the directional intra prediction mode of the coding block or coding subblock.

The method and the apparatus described above may improve the current directional intra-prediction mechanism by increasing its prediction accuracy, and allow for an efficient handling of square blocks or square subblocks in conjunction with an intra-prediction mechanism. In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media may include computer- readable storage media, which corresponds to a tangible medium such as data storage media, or communication media including any medium that facilitates transfer of a computer program from one place to another, e.g., according to a communication protocol. In this manner, computer- readable media generally may correspond to (1) tangible computer-readable storage media which is non-transitory or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures for implementation of the techniques described in this disclosure. A computer program product may include a computer-readable medium.

By way of example, and not limitation, such computer-readable storage media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage, or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if instructions are transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. It should be understood, however, that computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other transitory media, but are instead directed to non- transitory, tangible storage media. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general purpose microprocessors, application specific integrated circuits (ASICs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuitry. Accordingly, the term“processor,” as used herein may refer to any of the foregoing structure or any other structure suitable for implementation of the techniques described herein. In addition, in some aspects, the functionality described herein may be provided within dedicated hardware and/or software modules configured for encoding and decoding, or incorporated in a combined codec. Also, the techniques could be fully implemented in one or more circuits or logic elements. The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC) or a set of ICs (e.g., a chip set). Various components, modules, or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require realization by different hardware units. Rather, as described above, various units may be combined in a codec hardware unit or provided by a collection of interoperative hardware units, including one or more processors as described above, in conjunction with suitable software and/or firmware.

Claims

CLAIMS:

1. An intra-prediction method for a coding block of a square shape, wherein the method comprises: determining a first length of first reconstructed reference samples of the coding block;

determining a second length of second reconstructed reference samples of the coding block; and applying wide-angle intra prediction to the coding block when the first length is different from the second length.

2. The method of claim 1, wherein the method comprises:

determining the directional intra prediction mode of the coding block based on the first length and the second length and a set of predetermined directional intra prediction modes, wherein each predetermined directional intra prediction mode of the set of predetermined directional intra prediction modes being associated with a predetermined direction, and the set of predetermined directional intra prediction modes do not include the directional intra prediction mode of the coding block, and wherein wide-angle intra prediction modes include the set of set of predetermined directional intra prediction modes and the directional intra prediction mode of the coding block.

3. The method of claim 1 or 2, wherein the first reconstructed reference samples are top reconstructed reference samples of the coding block, and the second reconstructed reference samples are left reconstructed reference samples of the coding block.

4. The method of any one of claims 1-3, wherein the method further comprises:

determining a reference sample ratio of the coding block based on the first length and the second length; and

wherein the step of determining the directional intra prediction mode of the coding block comprises:

determining the directional intra prediction mode of the coding block based on the reference sample ratio of the coding block.

5. The method of claim 4, wherein the method further comprises:

determining an angle (a) upon the basis of the reference sample ratio of the coding block, the directional intra prediction mode of the coding block being associated with the angle (a).

6. The method of claim 4 or 5, wherein the method further comprises:

determining a set of complementary directional intra prediction modes upon the basis of the reference sample ratio of the coding block, wherein the set of complementary directional intra prediction modes includes the directional intra prediction mode of the coding block, and wherein wide-angle intra prediction modes include the set of set of predetermined directional intra prediction modes and the set of complementary directional intra prediction modes.

7. The method of claim 6, a number (Mo) of intra prediction modes in the set of complementary directional intra prediction modes is determined as:

wherein R =L_H/L_W, if L_H > L_w or R = L_W/L_H. if L_H < L_w. L_w represents the first length, L_H represents the second length, /V_offset e {q,1,2,...} is an offset.

8. The method of any one of claims 1-7, when the first length is larger than the second length, the directional intra prediction mode of the coding block is enabled along the first reconstructed reference samples.

9. The method of claim 8, at least one predetermined directional intra prediction mode is disabled along the second reconstructed reference samples.

10. The method of any one of claims 1-7, when the first length is less than the second length, the directional intra prediction mode of the coding block is enabled along the second reconstructed reference samples.

11. The method of claim 10, at least one predetermined directional intra prediction mode is disabled along the first reconstructed reference samples.

12. The method of claim 1, the coding block is located on a picture boundary.

13. The method of any one of claims 1-12, wherein wide-angle intra-prediction modes are used subject to availability of reference samples.

14. The method of claim 13, wherein the first reconstructed reference samples of the coding block are available reference samples.

15. The method of claim 1, wherein the first length is the number of refrence samples for the block being divided into subblocks and the second length is the number of refrence samples for the subblock being predicted.

16. The method of claim 15, wherein the first length is 8, 4 or 2, the second length is 1.

17. An intra-prediction method for a subblock of a square shape, wherein the method comprises: determining a first length of a coding block,

determining a second length of predicted samples of a first subblock of a coding block, wherein the predicted samples are top predicted samples for horizontally dividing, or wherein the predicted samples are left predicted samples for vertically dividing; and

determining whether wide-angle intra-prediction modes are applied to a second subblock of the coding block based on the first length and the second length.

18. The method of claim 17, wherein the first length is the number of refrence samples for the block being divided into subblocks.

19. The method of claim 17 or 18, wherein the first length is 8, 4 or 2, the second length is 1.

20. The method of any one of claims 17-19, wherein wide-angle intra prediction modes include the set of set of predetermined directional intra prediction modes and the set of complementary directional intra prediction modes.

21. The method of any one of claims 17-20, wherein wide-angle intra-prediction modes are used subject to availability of reference samples.

22. An encoding apparatus (20) comprising processing circuitry for performing the method of any one of the claims 1-21.

23. A decoding apparatus (30) comprising processing circuitry for performing the method of any one of the claims 1-21.

24. A computer program comprising a program code for performing the method of any one of the claims 1-21 when executed on a computer.

25. A decoder for performing intra-prediction method for a coding block of a square shape, comprising:

one or more processors; and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, wherein the programming, when executed by the processors, configures the decoder to carry out the method according to any one of claims 1 to 21.

26. An encoder for performing intra-prediction method for a coding block of a square shape, comprising:

one or more processors; and

a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, wherein the programming, when executed by the processors, configures the encoder to carry out the method according to any one of claims 1 to 21.