WO2020055287A1 - Décodeur vidéo et procédés - Google Patents

Décodeur vidéo et procédés Download PDF

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Publication number
WO2020055287A1
WO2020055287A1 PCT/RU2019/050143 RU2019050143W WO2020055287A1 WO 2020055287 A1 WO2020055287 A1 WO 2020055287A1 RU 2019050143 W RU2019050143 W RU 2019050143W WO 2020055287 A1 WO2020055287 A1 WO 2020055287A1
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WIPO (PCT)
Prior art keywords
motion
list
decoder
block
video
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PCT/RU2019/050143
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English (en)
Inventor
Timofey Mikhailovich SOLOVYEV
Jianle Chen
Sergey Yurievich IKONIN
Alexander Alexandrovich KARABUTOV
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Huawei Technologies Co., Ltd.
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Publication of WO2020055287A1 publication Critical patent/WO2020055287A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
    • H04N19/51—Motion estimation or motion compensation
    • H04N19/513—Processing of motion vectors
    • H04N19/517—Processing of motion vectors by encoding
    • H04N19/52—Processing of motion vectors by encoding by predictive encoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards

Definitions

  • the disclosure is in the field of video coding and more particularly in the field of motion compensation by inter prediction.
  • Video coding (video encoding and decoding) is used in a wide range of digital video applications, for example broadcast digital TV, video transmission over internet and mobile networks, real-time conversational applications such as video chat, video conferencing, DVD and Blu-ray discs, video content acquisition and editing systems, and camcorders of security applications.
  • digital video applications for example broadcast digital TV, video transmission over internet and mobile networks, real-time conversational applications such as video chat, video conferencing, DVD and Blu-ray discs, video content acquisition and editing systems, and camcorders of security applications.
  • Further video coding standards comprise MPEG-l video, MPEG-2 video, ITU-T H.262/MPEG-2, ITU-T H.263, ITU-T H.264/MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265/High Efficiency Video Coding (HEVC), ITU-T H.266/Versatile video coding (VVC) and extensions, e.g., scalability and/or three- dimensional (3D) extensions, of these standards.
  • AVC Advanced Video Coding
  • HEVC High Efficiency Video Coding
  • VVC Very-dimensional
  • the present disclosure provides apparatuses and methods for encoding and decoding video.
  • An embodiment of the first aspect of the present application (or the present disclosure) provides decoder (30) for decoding encoded video, comprising circuitry configured to, for a current block of a frame of the video:
  • HMVL history-based motion vector list
  • the generating of the history-based motion vector list is done before the decoding the current block, it not necessary to build the HMVL again for the current block.
  • the active list is only a portion of candidates for the selection of the motion vector of the current block, and the other candidates for the selection of the motion vector of the current block can be obtained by the traditional method for instance, merge candidate list or AMVP candidate list which is better be constructed prior picking up the active list from the HMVL.
  • the sublist of the HMVL does not include one or more motion records which are derived from block/blocks that just/ immediately proceeds/proceed the current block.
  • An embodiment of the second aspect of the present application (or the present disclosure) provides a history motion History-based motion information candidates constructing method, which comprises: filling a history motion information candidate list with N motion informations from at least N or more prior coding block;
  • An embodiment of the third aspect of the present application (or the present disclosure) provides a merge candidates list construction constructing method, which comprises:
  • the P of history -based motion information candidates are selected from an active set of a history-based motion information candidates list, and the active set is a subset of history-based motion information candidates list which includes a partition of the history-based motion information candidates list and does not include the latest added one in the history-based motion information candidates.
  • An embodiment of the fourth aspect of the present application (or the present disclosure) provides an advance motion vector prediction (AMVP) candidates list construction constructing method, comprises:
  • AMVP candidates list wherein the P entries are selected from an active set of a history-based motion information (HM) candidates list, and the active set is a subset of HM candidates list which includes a partition of the history-based motion information candidates list and does not include the latest added one in the history -based motion information candidates.
  • HM history-based motion information
  • the number of entries included in history-based motion information candidates list is N, and the entries are indexed with an index starting from 0 and increment in according to the adding order of the entries, the latest added entry has the biggest index, and the active set of a history-based motion information candidates list includes N-K entries with indexes lower than N-K- 1.
  • the number of entries included in history-based motion information candidates list is N, and the entries are indexed with an index starting from 0 and increment in according to the adding order of the entries, the latest added entry has the biggest index, and the active set of a history-based motion information candidates list includes N-K entries with indexes lower than N-K-l and bigger than N-K-l-L.
  • the number of entries included in history-based motion information candidates list is N, and the entries are indexed with an index starting from 0 and increment in according to the adding order of the entries, the latest added entry has the biggest index, and the active set of a history-based motion information candidates list includes N-K entries which are clustered into M groups with a group size of G, and the M groups separately reside in the history-based motion information candidates list with an interval X between two adjacent groups.
  • N is equal to 23
  • K is equal to 17
  • M is equal to 6
  • G is equal to 1 and X is equal to 3.
  • N is equal to 23
  • K is equal to 19
  • M is equal to 4
  • G is equal to 1 and X is equal to 3.
  • Figure 1 A is a block diagram showing an example of a video coding system configured to implement embodiments of the invention
  • Figure 1B is a block diagram showing another example of a video coding system configured to implement embodiments of the invention.
  • Figure 2 is a block diagram showing an example of a video encoder configured to
  • Figure 3 is a block diagram showing an example structure of a video decoder configured to implement embodiments of the invention
  • Figure 4 is a block diagram illustrating an example of an encoding apparatus or a decoding apparatus
  • Figure 5 is a block diagram illustrating another example of an encoding apparatus or a decoding apparatus
  • Figure 6 schematically illustrates an example of locations of spatial merge candidates
  • Figure 7 schematically illustrates an example of FIFO LUT updating method
  • Figure 8 schematically illustrates an example of constraint FIFO LUT updating method
  • Figure 9 schematically illustrates an example of LUT traversing order method
  • Figure 10 schematically illustrates an example of LUT traversing order method for AMVP list construction
  • Figure 11 schematically illustrates an example of selecting active set from HMVP LUT
  • Figure 12 schematically illustrates another example of selecting active set from HMVP
  • Figure 13 schematically illustrates another example of selecting active set from HMVP
  • Figure 14 schematically illustrates another example of selecting active set from HMVP
  • Figure 15 schematically illustrates another example of selecting active set from HMVP
  • Figure 16 schematically illustrates another example of selecting active set from HMVP
  • Figure 17 schematically illustrates an example of parallel HMVP method implementation
  • Figure 18 schematically illustrates another example of parallel HMVP method
  • a disclosure in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa.
  • a corresponding device may include one or a plurality of units, e.g., functional units, to perform the described one or plurality of method steps (e.g., one unit performing the one or plurality of steps, or a plurality of units each performing one or more of the plurality of steps), even if such one or more units are not explicitly described or illustrated in the figures.
  • a corresponding method may include one step to perform the functionality of the one or plurality of units (e.g., one step performing the functionality of the one or plurality of units, or a plurality of steps each performing the functionality of one or more of the plurality of units), even if such one or plurality of steps are not explicitly described or illustrated in the figures.
  • the features of the various exemplary embodiments and/or aspects described herein may be combined with each other, unless specifically noted otherwise.
  • Video coding typically refers to the processing of a sequence of pictures, which form the video or video sequence. Instead of the term“picture” the term“frame” or“image” may be used as synonyms in the field of video coding.
  • Video coding used in the present application indicates either video encoding or video decoding.
  • Video encoding is performed at the source side, typically comprising processing (e.g., by compression) the original video pictures to reduce the amount of data required for representing the video pictures (for more efficient storage and/or transmission).
  • Video decoding is performed at the destination side and typically comprises the inverse processing compared to the encoder to reconstruct the video pictures.
  • Embodiments referring to“coding” of video pictures shall be understood to relate to either “encoding” or“decoding” for video sequence.
  • the combination of the encoding part and the decoding part is also referred to as CODEC (Coding and Decoding).
  • the original video pictures can be reconstructed, i.e. the reconstructed video pictures have the same quality as the original video pictures (assuming no transmission loss or other data loss during storage or transmission).
  • further compression e.g., by quantization, is performed, to reduce the amount of data representing the video pictures, which cannot be completely reconstructed at the decoder, i.e. the quality of the reconstructed video pictures is lower or worse compared to the quality of the original video pictures.
  • a block (video block) level e.g., by using spatial (intra picture) prediction and temporal (inter picture) prediction to generate a prediction block, subtracting the prediction block from the current block (block currently processed/to be processed) to obtain a residual block, transforming the residual block and quantizing the residual block in the transform domain to reduce the amount of data to be transmitted (compression), whereas at the decoder the inverse processing compared to the encoder is partially applied to the encoded or compressed block to reconstruct the current block for representation.
  • the encoder duplicates the decoder processing loop such that both will generate identical predictions (e.g., intra- and inter predictions) and/or re-constructions for processing, i.e. coding, the subsequent blocks.
  • the term“block” may a portion of a picture or a frame.
  • HEVC High- Efficiency Video Coding
  • VVC Versatile video coding
  • JCT-VC Joint Collaboration Team on Video Coding
  • VCEG ITU-T Video Coding Experts Group
  • MPEG ISO/IEC Motion Picture Experts Group
  • Each CU can be further split into one, two or four PUs according to the PU splitting type. Inside one PU, the same prediction process is applied and the relevant information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying the prediction process based on the PU splitting type, a CU can be partitioned into transform units (TUs) according to another quadtree structure similar to the coding tree for the CU. In the newest development of the video compression technical, Qual-tree and binary tree (QTBT) partitioning frame is used to partition a coding block.
  • QTBT binary tree
  • a CU can have either a square or rectangular shape.
  • a coding tree unit CTU
  • the quadtree leaf nodes are further partitioned by a binary tree structure.
  • the binary tree leaf nodes are called coding units (CUs), and that segmentation is used for prediction and transform processing without any further partitioning.
  • CUs coding units
  • multiply partition for example, triple tree partition was also proposed to be used together with the QTBT block structure.
  • FIG. 1A schematically illustrates an example coding system 10, e.g., a video coding system 10 that may utilize techniques of this present application (present disclosure).
  • Encoder 20(e.g., Video encoder 20) and decoder 30(e.g., video decoder 30) of video coding system 10 represent examples of devices that may be configured to perform techniques in accordance with various examples described in the present application.
  • the coding system 10 comprises a source device 12 configured to provide encoded data 13, e.g., an encoded picture 13, e.g., to a destination device 14 for decoding the encoded data 13.
  • the source device 12 comprises an encoder 20, and may additionally, i.e. optionally, comprise a picture source 16, a pre-processing unit 18, e.g., a picture pre-processing unit 18, and a communication interface or communication unit 22.
  • the picture source 16 may comprise or be any kind of picture capturing device, for example for capturing a real-world picture, and/or any kind of a picture or comment (for screen content coding, some texts on the screen is also considered a part of a picture or image to be encoded) generating device, for example a computer-graphics processor for generating a computer animated picture, or any kind of device for obtaining and/or providing a real-world picture, a computer animated picture (e.g., a screen content, a virtual reality (VR) picture) and/or any combination thereof (e.g., an augmented reality (AR) picture).
  • a computer animated picture e.g., a screen content, a virtual reality (VR) picture
  • AR augmented reality
  • a (digital) picture is or can be regarded as a two-dimensional array or matrix of samples with intensity values.
  • a sample in the array may also be referred to as pixel (short form of picture element) or a pel.
  • the number of samples in horizontal and vertical direction (or axis) of the array or picture define the size and/or resolution of the picture.
  • typically three color components are employed, i.e. the picture may be represented or include three sample arrays.
  • a picture comprises a corresponding red, green and blue sample array.
  • each pixel is typically represented in a luminance/chrominance format or color space, e.g., YCbCr, which comprises a luminance component indicated by Y (sometimes also L is used instead) and two chrominance components indicated by Cb and Cr.
  • the luminance (or short luma) component Y represents the brightness or grey level intensity (e.g., like in a grey-scale picture), while the two chrominance (or short chroma) components Cb and Cr represent the chromaticity or color information components.
  • a picture in YCbCr format comprises a luminance sample array of luminance sample values (Y), and two chrominance sample arrays of chrominance values (Cb and Cr).
  • Pictures in RGB format may be converted or transformed into Y CbCr format and vice versa, the process is also known as color transformation or conversion. If a picture is monochrome, the picture may comprise only a luminance sample array.
  • the picture source 16 may be, for example a camera for capturing a picture, a memory, e.g., a picture memory, comprising or storing a previously captured or generated picture, and/or any kind of interface (internal or external) to obtain or receive a picture.
  • the camera may be, for example, a local or integrated camera integrated in the source device
  • the memory may be a local or integrated memory, e.g., integrated in the source device.
  • the interface may be, for example, an external interface to receive a picture from an external video source, for example an external picture capturing device like a camera, an external memory, or an external picture generating device, for example an external computer- graphics processor, computer or server.
  • the interface can be any kind of interface, e.g., a wired or wireless interface, an optical interface, according to any proprietary or standardized interface protocol.
  • the interface for obtaining the picture data 17 may be the same interface as or a part of the communication interface 22.
  • the picture or picture data l7 (e.g., video data 16) may also be referred to as raw picture or raw picture data 17.
  • Pre-processing unit 18 is configured to receive the (raw) picture data 17 and to perform pre processing on the picture data 17 to obtain a pre-processed picture 19 or pre-processed picture data 19. Pre-processing performed by the pre-processing unit 18 may, e.g., comprise trimming, color format conversion (e.g., from RGB to YCbCr), color correction, or de- noising. It can be understood that the pre-processing unit 18 may be optional component.
  • the encoder 20 (e.g., video encoder 20) is configured to receive the pre-processed picture data 19 and provide encoded picture data 21 (further details will be described below, e.g., based on Figure 2 or Figure 4).
  • Communication interface 22 of the source device 12 may be configured to receive the encoded picture data 21 and to transmit it to another device, e.g., the destination device 14 or any other device, for storage or direct reconstruction, or to process the encoded picture data 21 for respectively before storing the encoded data 13 and/or transmitting the encoded data 13 to another device, e.g., the destination device 14 or any other device for decoding or storing.
  • the destination device 14 comprises a decoder 30(e.g., a video decoder 30), and may additionally, i.e. optionally, comprise a communication interface or communication unit 28, a post-processing unit 32 and a display device 34.
  • the communication interface 28 of the destination device 14 is configured receive the encoded picture data 21 or the encoded data 13, e.g., directly from the source device 12 or from any other source, e.g., a storage device, e.g., an encoded picture data storage device.
  • the communication interface 22 and the communication interface 28 may be configured to transmit or receive the encoded picture data 21 or encoded data 13 via a direct
  • the source device 12 and the destination device 14 e.g., a direct wired or wireless connection, or via any kind of network, e.g., a wired or wireless network or any combination thereof, or any kind of private and public network, or any kind of combination thereof.
  • the communication interface 22 may be, e.g., configured to package the encoded picture data 21 into an appropriate format, e.g., packets, for transmission over a communication link or communication network.
  • the communication interface 28, forming the counterpart of the communication interface 22, may be, e.g., configured to de-package the encoded data 13 to obtain the encoded picture data 21
  • Both, communication interface 22 and communication interface 28 may be configured as unidirectional communication interfaces as indicated by the arrow for the encoded picture data 13 in Figure 1A pointing from the source device 12 to the destination device 14, or bi directional communication interfaces, and may be configured, e.g., to send and receive messages, e.g., to set up a connection, to acknowledge and exchange any other information related to the communication link and/or data transmission, e.g., encoded picture data transmission.
  • the decoder 30 is configured to receive the encoded picture data 21 and provide decoded picture data 31 or a decoded picture 31 (further details will be described below, e.g., based on Figure 3 or Figure 5).
  • the post-processor 32 of destination device 14 is configured to post-process the decoded picture data 31 (also called reconstructed picture data), e.g., the decoded picture 31, to obtain post-processed picture data 33, e.g., a post-processed picture 33.
  • the post-processing performed by the post-processing unit 32 may comprise, e.g., color format conversion (e.g., from Y CbCr to RGB), color correction, trimming, or re-sampling, or any other processing, e.g., for preparing the decoded picture data 31 for display, e.g., by display device 34.
  • the display device 34 of the destination device 14 is configured to receive the post-processed picture data 33 for displaying the picture, e.g., to a user or viewer.
  • the display device 34 may be or comprise any kind of display for representing the reconstructed picture, e.g., an integrated or external display or monitor.
  • the displays may, e.g., comprise liquid crystal displays (LCD), organic light emitting diodes (OLED) displays, plasma displays, projectors , micro LED displays, liquid crystal on silicon (LCoS), digital light processor (DLP) or any kind of other display.
  • Figure 1A depicts the source device 12 and the destination device 14 as separate devices, embodiments of devices may also comprise both or both functionalities, the source device 12 or corresponding functionality and the destination device 14 or corresponding functionality. In such embodiments the source device 12 or corresponding functionality and the destination device 14 or corresponding functionality may be implemented using the same hardware and/or software or by separate hardware and/or software or any combination thereof.
  • the encoder 20 e.g., a video encoder 20
  • the decoder 30 e.g., a video decoder 30
  • each may be implemented as any of a variety of suitable circuitry, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, or any combinations thereof.
  • DSPs digital signal processors
  • ASICs application-specific integrated circuits
  • FPGAs field-programmable gate arrays
  • a device may store instructions for the software in a suitable, non-transitory computer-readable storage medium and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors.
  • Each of video encoder 20 and video decoder 30 may be included in one or more encoders or decoders, either of which may be integrated as part of a combined
  • CODEC encoder/decoder
  • Source device 12 may be referred to as a video encoding device or a video encoding apparatus.
  • Destination device 14 may be referred to as a video decoding device or a video decoding apparatus.
  • Source device 12 and destination device 14 may be examples of video coding devices or video coding apparatuses.
  • Source device 12 and destination device 14 may comprise any of a wide range of devices, including any kind of handheld or stationary devices, e.g., notebook or laptop computers, mobile phones, smart phones, tablets or tablet computers, cameras, desktop computers, set top boxes, televisions, display devices, digital media players, video gaming consoles, video streaming devices(such as content services servers or content delivery servers), broadcast receiver device, broadcast transmitter device, or the like and may use no or any kind of operating system.
  • handheld or stationary devices e.g., notebook or laptop computers, mobile phones, smart phones, tablets or tablet computers, cameras, desktop computers, set top boxes, televisions, display devices, digital media players, video gaming consoles, video streaming devices(such as content services servers or content delivery servers), broadcast receiver device, broadcast transmitter device, or the like and may use no or any kind of operating system.
  • the source device 12 and the destination device 14 may be equipped for wireless communication.
  • the source device 12 and the destination device 14 may be wireless communication devices.
  • video coding system 10 illustrated in Figure 1A is merely an example and the techniques of the present application may apply to video coding settings (e.g., video encoding or video decoding) that do not necessarily include any data communication between the encoding and decoding devices.
  • data is retrieved from a local memory, streamed over a network, or the like.
  • a video encoding device may encode and store data to memory, and/or a video decoding device may retrieve and decode data from memory.
  • the encoding and decoding is performed by devices that do not communicate with one another, but simply encode data to memory and/or retrieve and decode data from memory.
  • video decoder 30 may be configured to perform a reciprocal process. With regard to signaling syntax elements, video decoder 30 may be configured to receive and parse such syntax element and decode the associated video data accordingly. In some examples, video encoder 20 may entropy encode one or more syntax elements into the encoded video bitstream. In such examples, video decoder 30 may parse such syntax element and decode the associated video data accordingly.
  • FIG 1B is an illustrative diagram of another example video coding system 40 including encoder 20 of Figure 2 and/or decoder 30 of Figure 3 according to an exemplary
  • video coding system 40 may include imaging device(s) 41, video encoder 100, video decoder 30 (and/or a video coder implemented via logic circuitry 47 of processing unit(s) 46), an antenna 42, one or more processor(s) 43, one or more memory store(s) 44, and/or a display device 45.
  • imaging device(s) 41, antenna 42, processing unit(s) 46, logic circuitry 47, video encoder 20, video decoder 30, processor(s) 43, memory store(s) 44, and/or display device 45 may be capable of communication with one another.
  • video coding system 40 may include only video encoder 20 or only video decoder 30 in various examples.
  • video coding system 40 may include antenna 42.
  • Antenna 42 may be configured to transmit or receive an encoded bitstream of video data, for example.
  • video coding system 40 may include display device 45. Display device 45 may be configured to present video data.
  • logic circuitry 47 may be implemented via processing unit(s) 46.
  • Processing unit(s) 46 may include application-specific integrated circuit (ASIC) logic, graphics processor(s), general purpose processor(s), or the like.
  • Video coding system 40 also may include optional processor(s) 43, which may similarly include application-specific integrated circuit (ASIC) logic, graphics processor(s), general purpose processor(s), or the like.
  • logic circuitry 47 may be implemented via hardware, video coding dedicated hardware, or the like, and processor(s) 43 may implemented general purpose software, operating systems, or the like.
  • memory store(s) 44 may be any type of memory such as volatile memory (e.g., Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), etc.) or non-volatile memory (e.g., flash memory, etc.), and so forth.
  • memory store(s) 44 may be implemented by cache memory.
  • logic circuitry 47 may access memory store(s) 44 (for implementation of an image buffer for example).
  • logic circuitry 47 and/or processing unit(s) 46 may include memory stores (e.g., cache or the like) for the implementation of an image buffer or the like.
  • video encoder 100 implemented via logic circuitry may include an image buffer (e.g., via either processing unit(s) 46 or memory store(s) 44)) and a graphics processing unit (e.g., via processing unit(s) 46).
  • the graphics processing unit may be communicatively coupled to the image buffer.
  • the graphics processing unit may include video encoder 100 as implemented via logic circuitry 47 to embody the various modules as discussed with respect to Figure 2 and/or any other encoder system or subsystem described herein.
  • the logic circuitry may be configured to perform the various operations as discussed herein.
  • Video decoder 30 may be implemented in a similar manner as implemented via logic circuitry 47 to embody the various modules as discussed with respect to decoder 30 of Figure 3 and/or any other decoder system or subsystem described herein.
  • video decoder 30 may be implemented via logic circuitry may include an image buffer (e.g., via either processing unit(s) 420 or memory store(s) 44)) and a graphics processing unit (e.g., via processing unit(s) 46).
  • the graphics processing unit may be communicatively coupled to the image buffer.
  • the graphics processing unit may include video decoder 30 as implemented via logic circuitry 47 to embody the various modules as discussed with respect to Figure 3 and/or any other decoder system or subsystem described herein.
  • antenna 42 of video coding system 40 may be configured to receive an encoded bitstream of video data.
  • the encoded bitstream may include data, indicators, index values, mode selection data, or the like associated with encoding a video frame as discussed herein, such as data associated with the coding partition (e.g., transform coefficients or quantized transform coefficients, optional indicators (as discussed), and/or data defining the coding partition).
  • Video coding system 40 may also include video decoder 30 coupled to antenna 42 and configured to decode the encoded bitstream.
  • the display device 45 configured to present video frames.
  • Figure 2 schematically illustrates an example of a video encoder 20 that is configured to implement the techniques of the present application.
  • the video encoder 20 comprises a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, and inverse transform processing unit 212, a reconstruction unit 214, a buffer 216, a loop filter unit 220, a decoded picture buffer (DPB) 230, a prediction processing unit 260 and an entropy encoding unit 270.
  • the prediction processing unit 260 may include an inter prediction unit 244, an intra prediction unit 254 and a mode selection unit 262.
  • Inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown).
  • a video encoder 20 as shown in Figure 2 may also be referred to as hybrid video encoder or a video encoder according to a hybrid video codec.
  • the residual calculation unit 204, the transform processing unit 206, the quantization unit 208, the prediction processing unit 260 and the entropy encoding unit 270 form a forward signal path of the encoder 20, whereas, for example, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, prediction processing unit 260 form a backward signal path of the encoder, wherein the backward signal path of the encoder corresponds to the signal path of the decoder (see decoder 30 in Figure 3).
  • the encoder 20 is configured to receive, e.g., by input 202, a picture 201 or a block 203 of the picture 201, e.g., picture of a sequence of pictures forming a video or video sequence.
  • the picture block 203 may also be referred to as current picture block or picture block to be coded, and the picture 201 as current picture or picture to be coded (in particular in video coding to distinguish the current picture from other pictures, e.g., previously encoded and/or decoded pictures of the same video sequence, i.e. the video sequence which also comprises the current picture).
  • Embodiments of the encoder 20 may comprise a partitioning unit (not depicted in Figure 2) configured to partition the picture 201 into a plurality of blocks, e.g., blocks like block 203, typically into a plurality of non-overlapping blocks.
  • the partitioning unit may be configured to use the same block size for all pictures of a video sequence and the corresponding grid defining the block size, or to change the block size between pictures or subsets or groups of pictures, and partition each picture into the corresponding blocks.
  • the prediction processing unit 260 of video encoder 20 may be configured to perform any combination of the partitioning techniques described above.
  • the block 203 again is or can be regarded as a two-dimensional array or matrix of samples with intensity values (sample values), although of smaller dimension than the picture 201.
  • the block 203 may comprise, e.g., one sample array (e.g., a luma array in case of a monochrome picture 201) or three sample arrays (e.g., a luma and two chroma arrays in case of a color picture 201) or any other number and/or kind of arrays depending on the color format applied.
  • the number of samples in horizontal and vertical direction (or axis) of the block 203 define the size of block 203.
  • Encoder 20 as shown in Figure 2 is configured encode the picture 201 block by block, e.g., the encoding and prediction is performed per block 203.
  • the residual calculation unit 204 is configured to calculate a residual block 205 based on the picture block 203 and a prediction block 265 (further details about the prediction block 265 are provided later), e.g., by subtracting sample values of the prediction block 265 from sample values of the picture block 203, sample by sample (pixel by pixel) to obtain the residual block 205 in the sample domain.
  • the transform processing unit 206 is configured to apply a transform, e.g., a discrete cosine transform (DCT) or discrete sine transform (DST), on the sample values of the residual block 205 to obtain transform coefficients 207 in a transform domain.
  • a transform e.g., a discrete cosine transform (DCT) or discrete sine transform (DST)
  • DCT discrete cosine transform
  • DST discrete sine transform
  • the transform processing unit 206 may be configured to apply integer approximations of DCT/DST, such as the transforms specified for HEVC/H.265. Compared to an orthogonal DCT transform, such integer approximations are typically scaled by a certain factor. In order to preserve the norm of the residual block which is processed by forward and inverse transforms, additional scaling factors are applied as part of the transform process. The scaling factors are typically chosen based on certain constraints like scaling factors being a power of two for shift operation, bit depth of the transform coefficients, tradeoff between accuracy and implementation costs, etc.
  • Specific scaling factors are, for example, specified for the inverse transform, e.g., by inverse transform processing unit 212, at a decoder 30 (and the corresponding inverse transform, e.g., by inverse transform processing unit 212 at an encoder 20) and corresponding scaling factors for the forward transform, e.g., by transform processing unit 206, at an encoder 20 may be specified accordingly.
  • the quantization unit 208 is configured to quantize the transform coefficients 207 to obtain quantized transform coefficients 209, e.g., by applying scalar quantization or vector quantization.
  • the quantized transform coefficients 209 may also be referred to as quantized residual coefficients 209.
  • the quantization process may reduce the bit depth associated with some or all of the transform coefficients 207. For example, an n-bit Transform coefficient may be rounded down to an m-bit Transform coefficient during quantization, where n is greater than m.
  • the degree of quantization may be modified by adjusting a quantization parameter (QP). For example for scalar quantization, different scaling may be applied to achieve finer or coarser quantization.
  • QP quantization parameter
  • the applicable quantization step size may be indicated by a quantization parameter (QP).
  • QP quantization parameter
  • the quantization parameter may for example be an index to a predefined set of applicable quantization step sizes.
  • small quantization parameters may correspond to fine quantization (small quantization step sizes) and large quantization parameters may correspond to coarse quantization (large quantization step sizes) or vice versa.
  • the quantization may include division by a quantization step size and corresponding or inverse dequantization, e.g., by inverse quantization 210, may include multiplication by the quantization step size.
  • Embodiments according to some standards may be configured to use a quantization parameter to determine the quantization step size.
  • the quantization step size may be calculated based on a quantization parameter using a fixed point approximation of an equation including division. Additional scaling factors may be introduced for quantization and dequantization to restore the norm of the residual block, which might get modified because of the scaling used in the fixed point approximation of the equation for quantization step size and quantization parameter.
  • the scaling of the inverse transform and dequantization might be combined.
  • customized quantization tables may be used and signaled from an encoder to a decoder, e.g., in a bitstream.
  • the quantization is a lossy operation, wherein the loss increases with increasing quantization step sizes.
  • the inverse quantization unit 210 is configured to apply the inverse quantization of the quantization unit 208 on the quantized coefficients to obtain dequantized coefficients 211, e.g., by applying the inverse of the quantization scheme applied by the quantization unit 208 based on or using the same quantization step size as the quantization unit 208.
  • the dequantized coefficients 211 may also be referred to as dequantized residual coefficients 211 and correspond - although typically not identical to the transform coefficients due to the loss by quantization - to the transform coefficients 207.
  • the inverse transform processing unit 212 is configured to apply the inverse transform of the transform applied by the transform processing unit 206, e.g., an inverse discrete cosine transform (DCT) or inverse discrete sine transform (DST), to obtain an inverse transform block 213 in the sample domain.
  • the inverse transform block 213 may also be referred to as inverse transform dequantized block 213 or inverse transform residual block 213.
  • the reconstruction unit 2l4 (e.g., Summer 214) is configured to add the inverse transform block 2l3(i.e. reconstructed residual block 213) to the prediction block 265 to obtain a reconstructed block 215 in the sample domain, e.g., by adding the sample values of the reconstructed residual block 213 and the sample values of the prediction block 265.
  • the buffer unit 216 (or short“buffer” 216), e.g., a line buffer 216, is configured to buffer or store the reconstructed block 215 and the respective sample values, for example for intra prediction.
  • the encoder may be configured to use unfiltered reconstructed blocks and/or the respective sample values stored in buffer unit 216 for any kind of estimation and/or prediction, e.g., intra prediction.
  • Embodiments of the encoder 20 may be configured such that, e.g., the buffer unit 216 is not only used for storing the reconstructed blocks 215 for intra prediction 254 but also for the loop filter unit 220 (not shown in Figure 2), and/or such that, e.g., the buffer unit 216 and the decoded picture buffer unit 230 form one buffer. Further embodiments may be configured to use filtered blocks 221 and/or blocks or samples from the decoded picture buffer 230 (both not shown in Figure 2) as input or basis for intra prediction 254.
  • the loop filter unit 220 (or short“loop filter” 220), is configured to filter the reconstructed block 215 to obtain a filtered block 221, e.g., to smooth pixel transitions, or otherwise improve the video quality.
  • the loop filter unit 220 is intended to represent one or more loop filters such as a de-blocking filter, a sample -adaptive offset (SAO) filter or other filters, e.g., a bilateral filter or an adaptive loop filter (ALF) or a sharpening or smoothing filters or collaborative filters.
  • the loop filter unit 220 is shown in Figure 2 as being an in loop filter, in other configurations, the loop filter unit 220 may be implemented as a post loop filter.
  • the filtered block 221 may also be referred to as filtered reconstructed block 221.
  • Decoded picture buffer 230 may store the reconstructed coding blocks after the loop filter unit 220 performs the filtering operations on the reconstructed coding blocks.
  • Embodiments of the encoder 20 may be configured to output loop filter parameters (such as sample adaptive offset information), e.g., directly or entropy encoded via the entropy encoding unit 270 or any other entropy coding unit, so that, e.g., a decoder 30 may receive and apply the same loop filter parameters for decoding.
  • loop filter parameters such as sample adaptive offset information
  • the decoded picture buffer (DPB) 230 may be a reference picture memory that stores reference picture data for use in encoding video data by video encoder 20.
  • the DPB 230 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magneto-resistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices.
  • DRAM dynamic random access memory
  • SDRAM synchronous DRAM
  • MRAM magneto-resistive RAM
  • RRAM resistive RAM
  • the DPB 230 and the buffer 216 may be provided by the same memory device or separate memory devices.
  • the decoded picture buffer (DPB) 230 is configured to store the filtered block 221.
  • the decoded picture buffer 230 may be further configured to store other previously filtered blocks, e.g., previously reconstructed and filtered blocks 221, of the same current picture or of different pictures, e.g., previously reconstructed pictures, and may provide complete previously reconstructed, i.e. decoded, pictures (and corresponding reference blocks and samples) and/or a partially reconstructed current picture (and corresponding reference blocks and samples), for example for inter prediction.
  • the decoded picture buffer (DPB) 230 is configured to store the reconstructed block 215.
  • the prediction processing unit 260 also referred to as block prediction processing unit 260, is configured to receive or obtain the block 203 (current block 203 of the current picture 201) and reconstructed picture data, e.g., reference samples of the same (current) picture from buffer 216 and/or reference picture data 231 from one or a plurality of previously decoded pictures from decoded picture buffer 230, and to process such data for prediction, i.e. to provide a prediction block 265, which may be an inter-predicted block 245 or an intra- predicted block 255.
  • a prediction block 265 which may be an inter-predicted block 245 or an intra- predicted block 255.
  • Mode selection unit 262 may be configured to select a prediction mode (e.g., an intra or inter prediction mode) and/or a corresponding prediction block 245 or 255 to be used as prediction block 265 for the calculation of the residual block 205 and for the reconstruction of the reconstructed block 215.
  • a prediction mode e.g., an intra or inter prediction mode
  • a corresponding prediction block 245 or 255 to be used as prediction block 265 for the calculation of the residual block 205 and for the reconstruction of the reconstructed block 215.
  • Embodiments of the mode selection unit 262 may be configured to select the prediction mode (e.g., from those supported by prediction processing unit 260), which provides the best match or in other words the minimum residual (minimum residual means better compression for transmission or storage), or a minimum signaling overhead (minimum signaling overhead means better compression for transmission or storage), or which considers or balances both.
  • the mode selection unit 262 may be configured to determine the prediction mode based on rate distortion optimization (RDO), i.e. select the prediction mode which provides a minimum rate distortion optimization or which associated rate distortion at least a fulfills a prediction mode selection criterion.
  • RDO rate distortion optimization
  • prediction processing unit 260 e.g., prediction processing unit 260 and mode selection (e.g., by mode selection unit 262) performed by an example encoder 20 will be explained in more detail.
  • the encoder 20 is configured to determine or select the best or an optimum prediction mode from a set of (pre -determined) prediction modes.
  • the set of prediction modes may comprise, e.g., intra-prediction modes and/or inter-prediction modes.
  • the set of intra-prediction modes may comprise 35 different intra-prediction modes, e.g., non-directional modes like DC (or mean) mode and planar mode, or directional modes, e.g., as defined in H.265, or may comprise 67 different intra-prediction modes, e.g., non- directional modes like DC (or mean) mode and planar mode, or directional modes, e.g., as defined in H.266 under developing.
  • intra-prediction modes e.g., non-directional modes like DC (or mean) mode and planar mode
  • directional modes e.g., as defined in H.266 under developing.
  • the set of (or possible) inter-prediction modes depend on the available reference pictures (i.e. previous at least partially decoded pictures, e.g., stored in DBP 230) and other inter prediction parameters, e.g., whether the whole reference picture or only a part, e.g., a search window area around the area of the current block, of the reference picture is used for searching for a best matching reference block, and/or e.g., whether pixel interpolation is applied, e.g., half/semi-pel and/or quarter-pel interpolation, or not.
  • inter prediction parameters e.g., whether the whole reference picture or only a part, e.g., a search window area around the area of the current block, of the reference picture is used for searching for a best matching reference block, and/or e.g., whether pixel interpolation is applied, e.g., half/semi-pel and/or quarter-pel interpolation, or not.
  • skip mode and/or direct mode may be applied.
  • the prediction processing unit 260 may be further configured to partition the block 203 into smaller block partitions or sub-blocks, e.g., iteratively using quad-tree-partitioning (QT), binary partitioning (BT) or triple-tree-partitioning (TT) or any combination thereof, and to perform, e.g., the prediction for each of the block partitions or sub-blocks, wherein the mode selection comprises the selection of the tree-structure of the partitioned block 203 and the prediction modes applied to each of the block partitions or sub-blocks.
  • QT quad-tree-partitioning
  • BT binary partitioning
  • TT triple-tree-partitioning
  • the inter prediction unit 244 may include motion estimation (ME) unit (not shown in Figure 2) and motion compensation (MC) unit (not shown in Figure 2).
  • the motion estimation unit is configured to receive or obtain the picture block 203 (current picture block 203 of the current picture 201) and a decoded picture 231, or at least one or a plurality of previously reconstructed blocks, e.g., reconstructed blocks of one or a plurality of other/different previously decoded pictures 231, for motion estimation.
  • a video sequence may comprise the current picture and the previously decoded pictures 231, or in other words, the current picture and the previously decoded pictures 231 may be part of or form a sequence of pictures forming a video sequence.
  • the encoder 20 may, e.g., be configured to select a reference block from a plurality of reference blocks of the same or different pictures of the plurality of other pictures and provide a reference picture (or reference picture index, ... ) and/or an offset (spatial offset) between the position (x, y coordinates) of the reference block and the position of the current block as inter prediction parameters to the motion estimation unit (not shown in Figure 2).
  • This offset is also called motion vector (MV).
  • the motion compensation unit is configured to obtain, e.g., receive, an inter prediction parameter and to perform inter prediction based on or using the inter prediction parameter to obtain an inter prediction block 245. Motion compensation, performed by motion
  • the compensation unit may involve fetching or generating the prediction block based on the motion/block vector determined by motion estimation, possibly performing interpolations to sub-pixel precision. Interpolation filtering may generate additional pixel samples from known pixel samples, thus potentially increasing the number of candidate prediction blocks that may be used to code a picture block.
  • the motion compensation unit 246 may locate the prediction block to which the motion vector points in one of the reference picture lists. Motion compensation unit 246 may also generate syntax elements associated with the blocks and the video slice for use by video decoder 30 in decoding the picture blocks of the video slice.
  • the intra prediction unit 254 is configured to obtain, e.g., receive, the picture block 203 (current picture block) and one or a plurality of previously reconstructed blocks, e.g., reconstructed neighbor blocks, of the same picture for intra estimation.
  • the encoder 20 may, e.g., be configured to select an intra prediction mode from a plurality of (predetermined) intra prediction modes.
  • Embodiments of the encoder 20 may be configured to select the intra-prediction mode based on an optimization criterion, e.g., minimum residual (e.g., the intra-prediction mode providing the prediction block 255 most similar to the current picture block 203) or minimum rate distortion.
  • an optimization criterion e.g., minimum residual (e.g., the intra-prediction mode providing the prediction block 255 most similar to the current picture block 203) or minimum rate distortion.
  • the intra prediction unit 254 is further configured to determine based on intra prediction parameter, e.g., the selected intra prediction mode, the intra prediction block 255. In any case, after selecting an intra prediction mode for a block, the intra prediction unit 254 is also configured to provide intra prediction parameter, i.e. information indicative of the selected intra prediction mode for the block to the entropy encoding unit 270. In one example, the intra prediction unit 254 may be configured to perform any combination of the intra prediction techniques described later.
  • the entropy encoding unit 270 is configured to apply an entropy encoding algorithm or scheme (e.g., a variable length coding (VLC) scheme, an context adaptive VLC scheme (CALVC), an arithmetic coding scheme, a context adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding or another entropy encoding methodology or technique) on the quantized residual coefficients 209, inter prediction parameters, intra prediction parameter, and/or loop filter parameters, individually or jointly (or not at all) to obtain encoded picture data 21 which can be output by the output 272, e.g., in the form of an encoded bitstream 21.
  • VLC variable length coding
  • CABAC context adaptive binary arithmetic coding
  • SBAC syntax-based context-adaptive binary arithmetic coding
  • PIPE probability interval partitioning entropy
  • the encoded bitstream 21 may be transmitted to video decoder 30, or archived for later transmission or retrieval by video decoder 30.
  • the entropy encoding unit 270 can be further configured to entropy encode the other syntax elements for the current video slice being coded.
  • a non-transform based encoder 20 can quantize the residual signal directly without the transform processing unit 206 for certain blocks or frames.
  • an encoder 20 can have the quantization unit 208 and the inverse quantization unit 210 combined into a single unit.
  • Figure 3 shows an exemplary video decoder 30 that is configured to implement the techniques of this present application.
  • the video decoder 30 configured to receive encoded picture data (e.g., encoded bitstream) 21, e.g., encoded by encoder 100, to obtain a decoded picture 131.
  • encoded picture data e.g., encoded bitstream
  • video decoder 30 receives video data, e.g., an encoded video bitstream that represents picture blocks of an encoded video slice and associated syntax elements, from video encoder 100.
  • the decoder 30 comprises an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 3 l4(e.g., a summer 314), a buffer 316, a loop filter 320, a decoded picture buffer 330 and a prediction processing unit 360.
  • the prediction processing unit 360 may include an inter prediction unit 344, an intra prediction unit 354, and a mode selection unit 362.
  • Video decoder 30 may, in some examples, perform a decoding pass generally reciprocal to the encoding pass described with respect to video encoder 100 from Figure 2.
  • the entropy decoding unit 304 is configured to perform entropy decoding to the encoded picture data 21 to obtain, e.g., quantized coefficients 309 and/or decoded coding parameters (not shown in Figure 3), e.g., (decoded) any or all of inter prediction parameters, intra prediction parameter, loop filter parameters, and/or other syntax elements. Entropy decoding unit 304 is further configured to forward inter prediction parameters, intra prediction parameter and/or other syntax elements to the prediction processing unit 360. Video decoder 30 may receive the syntax elements at the video slice level and/or the video block level.
  • the inverse quantization unit 310 may be identical in function to the inverse quantization unit 110, the inverse transform processing unit 312 may be identical in function to the inverse transform processing unit 112, the reconstruction unit 314 may be identical in function reconstruction unit 114, the buffer 316 may be identical in function to the buffer 116, the loop filter 320 may be identical in function to the loop filter 120 , and the decoded picture buffer 330 may be identical in function to the decoded picture buffer 130.
  • the prediction processing unit 360 may comprise an inter prediction unit 344 and an intra prediction unit 354, wherein the inter prediction unit 344 may be functionally similar to the inter prediction unit 144 in function, and the intra prediction unit 354 may be functionally similar to the intra prediction unit 154.
  • the prediction processing unit 360 are typically configured to perform the block prediction and/or obtain the prediction block 365 from the encoded data 21 and to receive or obtain (explicitly or implicitly) the prediction related parameters and/or the information about the selected prediction mode, e.g., from the entropy decoding unit 304.
  • intra prediction unit 354 of prediction processing unit 360 is configured to generate prediction block 365 for a picture block of the current video slice based on a signaled intra prediction mode and data from previously decoded blocks of the current frame or picture.
  • inter prediction unit 344(e.g., motion compensation unit) of prediction processing unit 360 is configured to produce prediction blocks 365 for a video block of the current video slice based on the motion vectors and other syntax elements received from entropy decoding unit 304.
  • the prediction blocks may be produced from one of the reference pictures within one of the reference picture lists.
  • Video decoder 30 may construct the reference frame lists, List 0 and List 1, using default construction techniques based on reference pictures stored in DPB 330.
  • Prediction processing unit 360 is configured to determine prediction information for a video block of the current video slice by parsing the motion vectors and other syntax elements, and uses the prediction information to produce the prediction blocks for the current video block being decoded. For example, the prediction processing unit 360 uses some of the received syntax elements to determine a prediction mode (e.g., intra or inter prediction) used to code the video blocks of the video slice, an inter prediction slice type (e.g., B slice, P slice, or GPB slice), construction information for one or more of the reference picture lists for the slice, motion vectors for each inter encoded video block of the slice, inter prediction status for each inter coded video block of the slice, and other information to decode the video blocks in the current video slice.
  • a prediction mode e.g., intra or inter prediction
  • an inter prediction slice type e.g., B slice, P slice, or GPB slice
  • construction information for one or more of the reference picture lists for the slice motion vectors for each inter encoded video block of the slice, inter prediction status for each inter coded
  • Inverse quantization unit 310 is configured to inverse quantize, i.e., de-quantize, the quantized transform coefficients provided in the bitstream and decoded by entropy decoding unit 304.
  • the inverse quantization process may include use of a quantization parameter calculated by video encoder 100 for each video block in the video slice to determine a degree of quantization and, likewise, a degree of inverse quantization that should be applied.
  • Inverse transform processing unit 312 is configured to apply an inverse transform, e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process, to the transform coefficients in order to produce residual blocks in the pixel domain.
  • the reconstruction unit 3 l4 e.g., Summer 314.
  • the reconstruction unit 3 l4 is configured to add the inverse transform block 3 l3(i.e. reconstructed residual block 313) to the prediction block 365 to obtain a reconstructed block 315 in the sample domain, e.g., by adding the sample values of the reconstructed residual block 313 and the sample values of the prediction block 365.
  • the loop filter unit 320 (either in the coding loop or after the coding loop) is configured to filter the reconstructed block 315 to obtain a filtered block 321, e.g., to smooth pixel transitions, or otherwise improve the video quality.
  • the loop filter unit 320 may be configured to perform any combination of the filtering techniques described later.
  • the loop filter unit 320 is intended to represent one or more loop filters such as a de-blocking filter, a sample-adaptive offset (SAO) filter or other filters, e.g., a bilateral filter or an adaptive loop filter (ALF) or a sharpening or smoothing filters or collaborative filters.
  • a de-blocking filter such as a de-blocking filter, a sample-adaptive offset (SAO) filter or other filters, e.g., a bilateral filter or an adaptive loop filter (ALF) or a sharpening or smoothing filters or collaborative filters.
  • SAO sample-adaptive offset
  • ALF adaptive loop filter
  • loop filter unit 320 is shown in Figure 3 as being an in loop filter, in other configurations, the loop filter unit 320 may be implemented as a post loop filter.
  • decoded video blocks 321 in a given frame or picture are then stored in decoded picture buffer 330, which stores reference pictures used for subsequent motion compensation.
  • the decoder 30 is configured to output the decoded picture 331, e.g., via output 332, for presentation or viewing to a user.
  • the decoder 30 can be used to decode the compressed bitstream.
  • the decoder 30 can produce the output video stream without the loop filtering unit 320.
  • a non-transform based decoder 30 can inverse-quantize the residual signal directly without the inverse-transform processing unit 312 for certain blocks or frames.
  • the video decoder 30 can have the inverse-quantization unit 310 and the inverse-transform processing unit 312 combined into a single unit.
  • FIG 4 is a schematic diagram of a video coding device 400 according to an embodiment of the disclosure.
  • the video coding device 400 is suitable for implementing the disclosed embodiments as described herein.
  • the video coding device 400 may be a decoder such as video decoder 30 of Figure 1A or an encoder such as video encoder 20 of Figure 1A.
  • the video coding device 400 may be one or more components of the video decoder 30 of Figure 1 A or the video encoder 20 of Figure 1 A as described above.
  • the video coding device 400 comprises ingress ports 410 and receiver units (Rx) 420 for receiving data; a processor, logic unit, or central processing unit (CPU) 430 to process the data; transmitter units (Tx) 440 and egress ports 450 for transmitting the data; and a memory 460 for storing the data.
  • the video coding device 400 may also comprise optical-to-electrical (OE) components and electrical -to-optical (EO) components coupled to the ingress ports 410, the receiver units 420, the transmitter units 440, and the egress ports 450 for egress or ingress of optical or electrical signals.
  • OE optical-to-electrical
  • EO electrical -to-optical
  • the processor 430 is implemented by hardware and software.
  • the processor 430 may be implemented as one or more CPU chips, cores (e.g., as a multi-core processor), FPGAs, ASICs, and DSPs.
  • the processor 430 is in communication with the ingress ports 410, receiver units 420, transmitter units 440, egress ports 450, and memory 460.
  • the processor 430 comprises a coding module 470.
  • the coding module 470 implements the disclosed embodiments described above. For instance, the coding module 470 implements, processes, prepares, or provides the various coding operations. The inclusion of the coding module 470 therefore provides a substantial improvement to the functionality of the video coding device 400 and effects a transformation of the video coding device 400 to a different state.
  • the coding module 470 is implemented as instructions stored in the memory 460 and executed by the processor 430.
  • the memory 460 comprises one or more disks, tape drives, and solid-state drives and may be used as an over-flow data storage device, to store programs when such programs are selected for execution, and to store instructions and data that are read during program execution.
  • the memory 460 may be volatile and/or non-volatile and may be read-only memory (ROM), random access memory (RAM), ternary content-addressable memory (TCAM), and/or static random-access memory (SRAM).
  • Figure 5 is a simplified block diagram of an apparatus 500 that may be used as either or both of the source device 310 and the destination device 320 from Figure 1 according to an exemplary embodiment.
  • the apparatus 500 can implement techniques of this present application described above.
  • the apparatus 500 can be in the form of a computing system including multiple computing devices, or in the form of a single computing device, for example, a mobile phone, a tablet computer, a laptop computer, a notebook computer, a desktop computer, and the like.
  • a processor 502 in the apparatus 500 can be a central processing unit.
  • the processor 502 can be any other type of device, or multiple devices, capable of manipulating or processing information now-existing or hereafter developed.
  • the disclosed implementations can be practiced with a single processor as shown, e.g., the processor 502, advantages in speed and efficiency can be achieved using more than one processor.
  • a memory 504 in the apparatus 500 can be a read only memory (ROM) device or a random access memory (RAM) device in an implementation. Any other suitable type of storage device can be used as the memory 504.
  • the memory 504 can include code and data 506 that is accessed by the processor 502 using a bus 512.
  • the memory 504 can further include an operating system 508 and application programs 510, the application programs 510 including at least one program that permits the processor 502 to perform the methods described here.
  • the application programs 510 can include applications 1 through N, which further include a video coding application that performs the methods described here.
  • the apparatus 500 can also include additional memory in the form of a secondary storage 514, which can, for example, be a memory card used with a mobile computing device. Because the video communication sessions may contain a significant amount of information, they can be stored in whole or in part in the secondary storage 514 and loaded into the memory 504 as needed for processing.
  • the apparatus 500 can also include one or more output devices, such as a display 518.
  • the display 518 may be, in one example, a touch sensitive display that combines a display with a touch sensitive element that is operable to sense touch inputs.
  • the display 518 can be coupled to the processor 502 via the bus 512.
  • Other output devices that permit a user to program or otherwise use the apparatus 500 can be provided in addition to or as an alternative to the display 518.
  • the output device is or includes a display
  • the display can be implemented in various ways, including by a liquid crystal display (LCD), a cathode-ray tube (CRT) display, a plasma display or light emitting diode (LED) display, such as an organic LED (OLED) display.
  • LCD liquid crystal display
  • CRT cathode-ray tube
  • LED light emitting diode
  • OLED organic LED
  • the apparatus 500 can also include or be in communication with an image-sensing device 520, for example a camera, or any other image-sensing device 520 now existing or hereafter developed that can sense an image such as the image of a user operating the apparatus 500.
  • the image-sensing device 520 can be positioned such that it is directed toward the user operating the apparatus 500.
  • the position and optical axis of the image-sensing device 520 can be configured such that the field of vision includes an area that is directly adjacent to the display 518 and from which the display 518 is visible.
  • the apparatus 500 can also include or be in communication with a sound-sensing device 522, for example a microphone, or any other sound-sensing device now existing or hereafter developed that can sense sounds near the apparatus 500.
  • the sound-sensing device 522 can be positioned such that it is directed toward the user operating the apparatus 500 and can be configured to receive sounds, for example, speech or other utterances, made by the user while the user operates the apparatus 500.
  • Figure 5 depicts the processor 502 and the memory 504 of the apparatus 500 as being integrated into a single unit, other configurations can be utilized.
  • the operations of the processor 502 can be distributed across multiple machines (each machine having one or more of processors) that can be coupled directly or across a local area or other network.
  • the memory 504 can be distributed across multiple machines such as a network-based memory or memory in multiple machines performing the operations of the apparatus 500.
  • the bus 5 l2of the apparatus 500 can be composed of multiple buses.
  • the secondary storage 514 can be directly coupled to the other components of the apparatus 500 or can be accessed via a network and can comprise a single integrated unit such as a memory card or multiple units such as multiple memory cards.
  • the apparatus 500 can thus be implemented in a wide variety of configurations.
  • motion vector (MV) coding Important part of inter prediction in H.265/HEVC standard is motion vector (MV) coding.
  • Motion vectors usually predictively coded e.g., by following two schemes:
  • Motion vector is constructed from a motion vector predictor and a difference between motion vector obtained by motion estimation process and the predictor.
  • This MV coding method in HEVC standard is called advanced motion vector prediction (AMVP).
  • Motion vector is derived by selection from a configurable set of candidates (predictors), without encoding a motion vector difference. This approach is called merge mode.
  • HEVC standard there are four groups of motion vector predictors: spatial, temporal, combined Bi-predictive and zero candidates.
  • the best motion vector predictor is selected from amount of candidates and its index in candidates list is written to bitstream.
  • An example of locations for spatial MVP candidates (for merge mode) is shown in Figure 6.
  • MVP candidates are denoted as Ao, Ai, Bo, Bi, and B2, respectively.
  • the locations Ai indicate the predictors to the left
  • the locations Bj indicate the predictors at the top of the current CU. It should be noted that in general case candidate locations may depend on CUs coding order. Depending in coding order candidates may be selected from top, left, right and bottom adjacent CUs.
  • All of spatial MVP candidates (for merge mode and for advanced motion vector prediction) in HEVC standard belong to the adjacent neighboring CUs (meaning they shares a border with the current CU).
  • History-based motion vector prediction For further improvement of motion vector prediction, techniques using the motion information (motion information is the set of merge list index, reference picture index/indexes and motion vector/vectors) from non-adjustment CUs were proposed.
  • motion information is the set of merge list index, reference picture index/indexes and motion vector/vectors
  • One of such techniques is History-based motion vector prediction (HMVP), described in JVET- K0104 (CE4-related: History-based Motion Vector Prediction, July 2018, http://phenix.it- sudparis.eu/jvet/doc_end_user/documents/l l_Ljubljana/wgl 1/JVET-K0 l04-v5.zip).
  • HMVP uses a look-up table LUT comprised of motion information from previously coded CUs.
  • HMVP method consists of two main parts:
  • LUT is maintained during the encoding and decoding processes. LUT is emptied when a new slice is encountered. Whenever the current CU is inter-coded, the associated motion information is added to the last entry of the table as a new HMVP candidate. LUT size (denote it as N) is the parameter of HMVP method. If number of HMVP candidates from the previously coded CUs is more than this LUT size, table update method is applied, so this LUT always contains no more than A latest previously coded motion candidates. In JVET- K0104, two table update methods are proposed:
  • the oldest candidate ( 0-th table entry) is removed from the table. This process is illustrated in Figure 7. At this figure Ho is the oldest (0-th) HMVP candidate and X is the new one.
  • This updating method has relatively small complexity, but some of LUT elements can be the same (contain the same motion information) wherein this method is applied. So, some data in the LUT is redundant and motion information diversity in the LUT is worse than in case of erasing duplicated candidates.
  • Redundancy check is firstly applied before inserting a new HMVP candidate to the table.
  • Redundancy check means finding whether motion information from the new candidate X coincides with the motion information from candidate Hm already located in the LUT. If such candidate H m was not found, simple FIFO method is used, else following procedure is performed:
  • New candidate X is added to the first empty position of the table.
  • HMVP candidates can be used in the merge candidate list construction process and/or in AMVP candidate list construction process.
  • HMVP candidates are inserted to the merge list from the last entry to the first entry (HN-I, HN-2, ... , Ho) after the TMVP candidate.
  • LUT traversing order is depicted in Figure 9. If HMVP candidate is equal to one of the candidates already presented in the merge list, such HMVP candidate is not added to the list. Due to merge list size is limited, some HMVP candidates, located at the beginning of LUT, also can be not used in merge list construction process for current CU. 1.2.2 Using HMVP LUT in AMVP candidate list construction process
  • HMVP LUT which is constructed for merge mode, also is used for AMVP.
  • the difference is, only a few entries from this LUT is used for AMVP candidate list construction. More specifically last M elements are used (In JVET-K0l04, M is equal to 4).
  • AMVP candidate list construction process HMVP candidates are inserted to the list after the TMVP candidate from the last to the (N-K)-th entry (HN-I, HN-2, . . . , HN-K). LUT traversing order is depicted in figure 10.
  • HMVP candidate is not used for AMVP candidate list construction. Due to AMVP candidate list size is limited, some HMVP candidates also can be not used in AMVP list construction process for current CU.
  • HMVP LUT In HEVC and VVC merge list construction process begins from analysis of motion information from adjacent CUs, as depicted in figure 6(see section 1). Candidates from HMVP LUT are inserted after adjacent candidates and TMVP candidates. In spite of this, HMVP LUT construction method is designed so, that the last entries in the HMVP LUT also contain motion information from the adjacent CUs in most cases. So, unnecessary candidate comparison operations are performed without adding new elements to the candidate list. The same problem takes a place wherein HMVP LUT is used for AMVP candidate list construction process because AMVP list construction process also begins from analysis of motion information from adjacent CUs.
  • Objects of the invention include: reducing merge/AMVP candidate list construction complexity, and avoiding comparison operations.
  • HMVL also referred to herein as the HMVP LUT
  • a proper sublist of a list is a sublist which lacks one or more elements of the list.
  • N is the length of the list.
  • the length of a list is the total number of elements of the list.
  • the order of the list i.e. the order in which the motion records are arranged in the list, corresponds to an order in which the motion records of said preceding blocks are obtained from the encoded video.
  • the current block and the preceding blocks are coding units, CUs, of the frame.
  • the circuitry may be further configured to determine sample values of the current block based on sample values of a block identified by the motion vector and a residual of the current block.
  • the circuitry may comprise hardware and software.
  • the circuitry may comprise one or more processors and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, wherein the programming, when executed by the processors, configures the decoder to carry out the operations described in the present disclosure.
  • “similar” means that a value of a similarity metric that measures similarity between any two motion records is below a critical value.
  • “similar or equal” means“equal”.
  • the circuitry may be configured to determine the motion vector of the current block of the frame based on a motion vectors candidates list, MV CL, wherein the MVCL comprises one or more motion vectors determined from one or more motion records of the active list.
  • the motion vector of the current block is determined by selecting one of the motion vectors of the MVCL.
  • the motion vector to be selected may be signaled in the encoded video, or it may be selected based on a selection rule.
  • the selection rule should be the same as, or equivalent to, a selection rule that was used for encoding the video.
  • the MVCL may further comprise one or more motion vectors of one or more other blocks of the frame.
  • the one or more other blocks of the frame may include one or more blocks adjoining the current block (see, e.g., Figure 1).
  • blocks are said to be adjoining when they contact each other in at least one spatial point (for example, one block’s left edge may contact the other block’s right edge, or one block’s lower right comer may contact the other block’s upper left comer).
  • the MVCL may be, for example, a merge list or an Advanced Motion Vector Prediction, AMVP, list.
  • the active list consists of elements Hk wherein k assumes either only odd values or only even values (see, e.g., Figure 13).
  • the circuitry is configured to select a motion vector determination mode from a set of candidate motion vector determination modes, and determine an active list selection rule based on which motion vector determination mode is selected from the set of candidate motion vector determination modes, wherein the active list selection rule is a rule for selecting the elements of the active list from the HMVL, and determine the motion vector of the current block in accordance with the selected motion vector determination mode and the active list selection rule.
  • the set of candidate motion vector determination modes may notably include the following modes: Merge Candidate List construction and Advanced Motion Vector Prediction candidate list construction.
  • the circuitry may be is configured to generate the active list from the HMVL based on a spatial position of the current block.
  • the active list can thus be further optimized, e.g., to avoid redundancy with motion vectors from spatial neighbors of the current block.
  • the method may further comprises the operations specified above in the context of the first aspect.
  • the present disclosure notably relates to motion vector merge list and motion vector predictor list generation methods for inter-prediction. More specifically, the following aspects are described:
  • the modified methods can reduce the number of candidate comparisons during
  • AMVP/merge list construction without significant coding efficiency decrease. Also described HMVP method modifications can help to improve parallelization of decoding/encoding process.
  • “active” set of candidates is selected from HMVP LUT.
  • HMVP candidates from the“active” set are used for constructing merge (and/or AMVP) list for current CU.
  • HMVP candidates that are not in active set comprised“passive” set.
  • HMVP candidates from the“passive” set are not taken into account during construction merge (and/or AMVP) list for the current CU.
  • These candidates are stored in LUT because they can potentially be used for constructing merge (and/or AMVP) list for next CUs.
  • “Active” set can be selected from HMVP LUT, for example, as depicted in Figures 11 to 15. In these examples N is LUT size, K, M, R, T, D, Z are the parameters that could be 0, 1, ... , N-l. Parameters can be not equal to each other.
  • “active” set selection rules can be the same or it can be two different“active” set selection rules: one for AMVP and one for merge candidate list construction.
  • different“active” set selection rules for merge list construction is also possible.
  • one rule can be used for case wherein only current picture is considered as reference picture and another rule for other cases.
  • Using different“active” set selection rules for AMVP list construction is also possible.
  • one rule can be used for case wherein only current picture is considered as reference picture and another rule for other cases.
  • this HMVP LUT is also used for some other purposes during encoding/decoding processes, the same as well as different“active” set selection rules can be used for different purposes.
  • “Active” set selection rules can depend on CU position, number and/or structure of slices in a coded picture, number and/or structure of tiles in a coded picture or on a specific syntax element, signaled on SPS and/or PPS and/or slice header level.
  • Current CU belongs to the first CTU in the CTU line and is the first CU in current CTU in coding order
  • Current CU belongs to the first CTU in the CTU line and left border of current CU belongs to left border of the frame (or tile, or slice)
  • Top border of current CU belongs to current CTU’s top border
  • position-dependent rules can be following:
  • “Active” set selection rules can depend on size of the slice/tile and/or on number of slices/tiles in the picture. Specific“active” set selection rules can be used, for example, for the following cases:
  • Width of tile/slice is less then R CTUs, where R can be one of 2, 3, 4, 5, ...
  • Number of tiles/slices in a picture is more than L, where L is one of 1, 2, 3, ... 3 Using HMVP LUT for merge candidate list construction
  • HMVP candidates are inserted to the merge list in following order: HN-K-I, HN-K-2, ... , Ho.
  • the active set of a history-based motion information candidates list includes N-K entries which are clustered into M groups with a group size of G, and the M groups separately reside in the history-based motion information candidates list with an interval X between two adjacent groups.
  • adding HMVP candidate to the merge candidate list can be implemented as follows.
  • Algorithm output the modified merging candidate list mergeCandList, the modified number of merging candidates in the list numCurrMergeCand.
  • hMvpIdx X, X+X+l, X+2X+1,... , min( maxNumCheckedHistory, N ), if hmvpStop is equal to FALSE:
  • HmvpCandList[NumHmvpCand- hMvpIdx ] is added to the merging candidate list as follows:
  • hmvpStop is set to TRUE.
  • hMvpIdx X, X+X+l, X+2X+1,... , min( maxNumCheckedHistory, N ), if hmvpStop is equal to FALSE:
  • HmvpCandFist[NumHmvpCand- hMvpIdx ] is added to the merging candidate list as follows:
  • N is equal to 23
  • K is equal to 17
  • M is equal to 6
  • G is equal to 1
  • X is equal to 3.
  • N is equal to 23
  • K is equal to 19
  • M is equal to 4
  • G is equal to 1 and X is equal to 3.
  • Parameter N can depend on number of elements that need to be added to merge candidates list, on coding unit size, on specific syntax element signaled in slice header, SPS or PPS.
  • Last HMVP candidates from the LUT most probably will overlap with candidates obtained from the adjusted CUs as described before. Therefore, according to current invention, last T HMVP LUT entries are not added to the“active” set.
  • K can b e 0, 7, 2, ... , N, where N is HMVP LUT size.
  • AMVP list size in most cases is less than merge list size, so when one HMVP LUT is used for both AMVP and merge algorithms (as proposed in JVET-K0104), it is reasonable for AMVP have smaller“active” set than for merge. In particular, some entries from the beginning of HMVP LUT can be ignored.
  • first N-K- M HMVP LUT entries are not added to“active” set, where Mean be 0, 7, 2, ... , N, K+M ⁇ N.
  • HMVP candidate index is less then N-K and greater than N-K-M-l, this candidate is added to the“active” set, where N is LUT size, K can be one of 0, 1, 2, 3, ... , TV, Mean be one of 0, 7, 2, ... , N-K.
  • This“active” set selecting from HMVP LUT is depicted in Figure 12. In particular, if K is equal to 7 and is equal to 4,“active” set is selected as depicted in Figure 16.
  • HMVP candidates are inserted to the merge list in following order: HN-K-I, HN-K-2, HN-K-M.
  • “Active” set selection from the HMVP LUT described in current section reduces number of candidate comparisons during merge list construction without significant coding efficiency decrease (depending on parameters K and M).
  • Another benefit is that during AMVP list construction for the current CU no need to have last K LUT entries. Thus, no need to wait for finishing HMVP LUT updating process for previous K decoded/encoded CUs. It can be helpful for parallelization of decoding/encoding process.
  • HMVP LUT is updated on each inter-coded CU using motion information of this CU.
  • alternative HMVP updating method is proposed.
  • HMVP LUT updating process is divided into two stages.
  • stage 1 element H ⁇ i is considered as new element X and LUT updating process is performing as in prior art, assuming that table size is N-l.
  • stage 2 new motion information is added at (N-l)-th position of LUT.
  • “Active” set selection rule is chosen in such way that clement H ⁇ i is not in the“active” set. For example rules defined in sections 3 and 4 can be used. Due to with this“active” set selection rules element HN-I is not required for the candidate list construction process, stage 1 of FUT updating process and CU motion information decoding can be done independently and can be parallelized.
  • Dec Co is decoding motion information of CUo
  • Dec Ci is decoding motion information of CUi
  • A is a motion information from CUo. Operations at the left and at the right side of the red dashed line can be performed in parallel. Synchronization should be done before“FUT update stage 2” operation.
  • CU motion information decoding and FUT update stage 1 blocks can use two copies of FUT.
  • Another solution is using one FUT (without copying) and starting FUT update stage 1 after HMVP candidates processing (during candidates list construction) is finished. Such scheme is depicted in Figure 18.
  • HMVP LUT the so-called“active” set of candidates.
  • HMVP candidates from this“active” set are used for constructing merge (and/or AMVP) list for current CU.
  • Another candidates are stored in LUT for potential usage during constructing merge (and/or AMVP) list for next CUs.
  • Merge (and/or AMVP) list construction methods involving inserting HMVP candidates can be used with different“active” set selection rules, for example with the rules, depicted in Figures 11 to 15.“Active” set selection rules could be applied within another methods using HMVP LUT (not only within merge and AMVP).“Active” set selection rules could be different for some specific cases, for example for case when current picture is the only reference picture.
  • Computer-readable media may include computer-readable storage media, which corresponds to a tangible medium such as data storage media, or communication media including any medium that facilitates transfer of a computer program from one place to another, e.g., according to a communication protocol.
  • Computer-readable media generally may correspond to (1) tangible computer- readable storage media which is non-transitory or (2) a communication medium such as a signal or carrier wave.
  • Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures for implementation of the techniques described in this disclosure.
  • a computer program product may include a computer-readable medium.
  • such computer-readable storage media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage, or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer.
  • any connection is properly termed a computer-readable medium.
  • a computer-readable medium For example, if instructions are transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium.
  • DSL digital subscriber line
  • Disk and disc includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
  • processors such as one or more digital signal processors (DSPs), general purpose microprocessors, application specific integrated circuits (ASICs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuitry.
  • DSPs digital signal processors
  • ASICs application specific integrated circuits
  • FPGAs field programmable logic arrays
  • the term“processor,” as used herein may refer to any of the foregoing structure or any other structure suitable for implementation of the techniques described herein.
  • the functionality described herein may be provided within dedicated hardware and/or software modules configured for encoding and decoding, or incorporated in a combined codec. Also, the techniques could be fully implemented in one or more circuits or logic elements.
  • the techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC) or a set of ICs (e.g., a chip set).
  • IC integrated circuit
  • a set of ICs e.g., a chip set.
  • Various components, modules, or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require realization by different hardware units. Rather, as described above, various units may be combined in a codec hardware unit or provided by a collection of interoperative hardware units, including one or more processors as described above, in conjunction with suitable software and/or firmware.

Abstract

Une vidéo codée est décodée au moyen d'un décodeur. L'invention porte sur un procédé de construction d'ensemble d'informations de mouvement candidates, consistant à : déterminer qu'une quantité d'éléments dans un premier ensemble d'informations de mouvement est inférieur à un seuil prédéfini; ajouter un ou plusieurs éléments basés sur l'historique au premier ensemble d'informations de mouvement jusqu'à ce que la quantité soit égale au seuil prédéfini, les éléments basés sur l'historique appartenant à un second ensemble d'informations de mouvement, les éléments dans le second ensemble d'informations de mouvement étant ordonnés dans un premier ordre, et les éléments basés sur l'historique n'étant pas adjacents les uns aux autres dans le second ensemble d'informations de mouvement dans le premier ordre dans le cas où il existe au moins deux éléments basés sur l'historique.
PCT/RU2019/050143 2018-09-10 2019-09-10 Décodeur vidéo et procédés WO2020055287A1 (fr)

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