WO2020052216A1 - System garbage collection method and method for collecting garbage in solid state hard disk - Google Patents

Abstract

A system garbage collection method and a method for collecting garbage in a solid state hard disk. A system controller determines a first logical block group to be collected, the first logical block group comprises a first data logical block, the first data logical block is located in a first solid state hard disk among a plurality of solid state hard disks, valid data is stored in a first logical address in the first logical block group, and the first logical address has a correlation with an actual address where the valid data is stored in the plurality of solid state hard disks. The system controller creates a second logical block group, and at least one second data logical block in the second logical block group is distributed on the solid state hard disk where the first data logical block storing valid data is located, thereby ensuring that the valid data migrates from the first logical block group to the second logical block group while the actual address thereof remains unchanged so as to reduce write amplification.

Description

System garbage recycling method and garbage recycling method in solid state hard disk Technical field

The present application relates to the storage field, and more particularly, to a system garbage collection method and a solid state hard disk garbage collection method.

Background technique

A flash array is a storage system that contains a solid state drive and a system controller. Among them, the system controller allocates logical addresses to solid state disks in units of logical block groups (CKGs). When the available space in the system is insufficient, the system controller performs system garbage collection. In the system garbage collection operation, the system controller instructs the solid-state hard disk to move all valid data in the logical block group to the new logical block group, which causes the valid data to be moved inside the solid-state hard disk. Therefore, the number of write amplification is increased.

Summary of the Invention

This application proposes a system garbage collection method and a garbage collection method in a solid state hard disk, which can reduce the number of write amplifications.

A first aspect provides a system garbage collection method, which is applied to a flash memory array, which includes a system controller and a plurality of solid state hard disks. The system controller determines a first logical block group to be recycled. The first logical block group includes a plurality of first data logical blocks, and the plurality of first data logical blocks are distributed in different solid state hard disks. The data stored in at least one first data logical block of the plurality of first data logical blocks includes valid data. The address of the valid data in the first logical block is a first logical address, and the first logical address and The actual address of the valid data stored in the solid state hard disk has a corresponding relationship. The system controller creates a second logical block group, the second logical block group includes a plurality of second data logical blocks, and the second logical block group includes a second data logical block, where at least one of the first The two data logical blocks are distributed in the solid state hard disk where the first data logical block storing the valid data is located. The system controller allocates a second logical address to the valid data in the at least one of the second data logical blocks, and then instructs the solid-state hard disk storing the valid data to compare the first logical address with the first logical address. The correspondence between the actual addresses is modified to the correspondence between the second logical address and the actual addresses.

In the system garbage collection method provided by the first aspect, the first logical block group to be recycled includes a plurality of first data logical blocks, and at least one of the data stored in the first data logical block is valid data. At least one data logical block of the block group is distributed in the solid-state hard disk where the first data logical block storing valid data is stored. Therefore, the valid data does not need to be physically moved, and only the solid-state hard disk storing the valid data needs to be instructed to transfer the valid data. The correspondence between the first logical address and the actual address is modified to the correspondence between the second logical address and the actual address, so that at least one data in the first logical block group to be recovered is valid data in the logical block. Migrate to the created second logical block group. Since the effective data is not actually moved, write amplification can be reduced.

Among the plurality of data logical blocks included in the first logical block group, only a part of the data logical blocks (or even only one data logical block) may store valid data, then when creating the second logical block group, it is only necessary to ensure that all Said that the second logical block group has a part of the data logical block or a data logical block distributed on the solid state hard disk where the data logical block in the first data logical block group stores valid data, the first logical block group can be realized. The valid data in is migrated to the second logical block group without actually moving the valid data. In addition, it can be understood that even if some or all of the data logical blocks in the first logical block group store valid data, as long as at least one data logical block in the created second logical block group is guaranteed to be distributed in the first In the data logic block group, the solid state hard disk where the data logic block storing valid data is located can also reduce write amplification to a certain extent.

Optionally, in another implementation, each data logical block included in the second logical block group is distributed in a solid state hard disk where one of the data logical blocks included in the first logical block group is located. In this way, write amplification can be minimized.

In a first implementation of the first aspect, the number of the first data logical blocks storing valid data is the same as the number of the at least one second data logical block. For example, if there is a first data logical block in the first logical block group that stores valid data, then a second data logical block in the second logical block group is also distributed over the first data that stores the valid data The solid state drive where the logical block is located. If two first data logical blocks in the first logical block group store valid data, then two second data logical blocks in the second logical block group are also distributed among two first data blocks storing the valid data. The solid state drive where the data logic blocks are located. If each first data logical block in the first logical block group stores valid data, then all second data logical blocks in the second logical block group must also be distributed on the solid state hard disk where all the first data logical blocks are located. in.

With reference to the first implementation of the first aspect, in the second implementation of the first aspect, the creating a second logical block group may specifically be created based on the distribution of multiple first data logical blocks among multiple solid state drives. In the second logical block group, all the second data logical blocks in the created second logical block group are distributed in a solid state hard disk where all the first data logical blocks are located. The second logical block group created in this way can minimize write amplification.

With reference to any one of the above implementations, in a third implementation of the first aspect, the first logical block group further includes a first check logical block, and the first check logical block is distributed between the first check logical block and the multiple first logical block. In a solid state hard disk having a different data logical block, the second logical block group further includes a second check logical block, and the second check logical block is distributed on a solid state hard disk different from the plurality of second data logical blocks. in. The number of the first check logical block is the same as the number of the second check logical block, and both are determined according to the RAID type. The solid state disk where the second verification logic block is located may be the same as or different from the solid state disk where the first verification logic block is located. Generally, valid data needs to be recalculated and stored after the valid data is migrated from the first logical block group to the second logical block group. Therefore, the application does not limit the distribution of the second logical block.

In combination with any one of the above implementations, in the fourth implementation of the first aspect, the first logical block group to be recycled may be selected according to certain conditions, for example, when a logical block group in a flash memory array contains When the data amount of the valid data is lower than the set threshold, it can be used as the first logical block group to be recycled. Alternatively, when the data amount of invalid data contained in a certain logical block group in the flash memory array is higher than the set threshold, it may be used as the first logical block group to be recovered. Alternatively, the logical block group with the most invalid data or the least valid data in the flash array is selected as the first logical block group to be recovered. This can improve the efficiency of system garbage collection.

A second aspect provides a method for garbage collection in a solid state hard disk. The method is applied to a solid state hard disk, and the solid state hard disk is connected to a system controller. The solid state hard disk reads valid data and reverse mapping information of the valid data from the first physical block to be recycled, and sends the reverse mapping information of the valid data to the system controller, thereby obtaining the reverse data. The source logical address corresponding to the mapping information. Then, the solid state hard disk assigns a target logical address to the valid data, and copies the valid data to a second physical block. Delete the correspondence between the source logical address and the actual address where the valid data is stored in the first physical block, and create the actual address where the target logical address and the valid data information are stored in the second physical block Correspondence between. Finally, the solid state hard disk erases data in the first physical block.

The reverse mapping information in the second aspect may be the virtual address of the valid data, or the fingerprint of the valid data, or the offset address of the valid data in the file, as long as it can pass the forward direction. Information that finds the actual address of the valid data by index is within the protection scope of this application.

The reverse mapping information of the data is usually written into the solid-state drive with the data as a whole. This is to facilitate the search for the logical address of the data to modify the logical address in the flash translation layer and the actual data when performing garbage collection inside the solid-state drive Correspondence between addresses. Traditionally, reverse mapping information refers to the logical address of the data. However, in this application, in order to keep the actual address of the valid data unchanged, it is also necessary to ensure that the actual address of the reverse mapping information of the valid data does not change. When valid data is migrated from the first logical block group to the second logical block, When a block group, its logical address will change, so in this application, the reverse mapping information of the valid data cannot be the logical address of the data, it can be the virtual address of the data, or the fingerprint of the data, etc. information.

Therefore, according to the implementation of the second aspect of the present application, the logical address of the valid data can be queried by the system controller according to the reverse mapping information of the valid data, thereby completing the garbage collection inside the solid state disk.

A third aspect of the present application provides a system controller. The system controller includes an interface and a processor. The interface is used to connect to multiple solid-state hard disks, and the processor is used to execute any one of the methods in the first aspect.

The fourth aspect of the present application provides a system garbage collection device. The device is located in a system controller of a flash memory array, and is configured to execute any one of the methods in the first aspect.

A fifth aspect of the present application provides a solid state hard disk, which includes a flash memory controller, a first physical block, and a second physical block. The flash memory controller is configured to perform the method of the second aspect.

A sixth aspect of the present application provides a garbage collection device in a solid state hard disk, for performing the method of the second aspect.

A seventh aspect of the present application provides a flash memory array including a system controller and a solid state hard disk, wherein the system controller is configured to perform any one of the methods of the first aspect and the solid state hard disk is configured to perform the method of the second aspect .

An eighth aspect of the present application provides a computer program product for system garbage collection, including a computer-readable storage medium storing program code, where the program code includes instructions for performing the method described in the first aspect.

A ninth aspect of the present application provides a computer program product for garbage collection in a solid state hard disk, including a computer-readable storage medium storing program code, where the program code includes instructions for performing the method described in the second aspect.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an application scenario diagram provided by an embodiment of the present invention;

2 is a structural diagram of a controller according to an embodiment of the present invention;

3 is a schematic diagram of a logical block group according to an embodiment of the present invention;

4 is a schematic flowchart of writing data according to an embodiment of the present invention;

5 is a schematic flowchart of a system garbage collection method according to an embodiment of the present invention;

6 is a schematic diagram of a system garbage collection method according to an embodiment of the present invention;

7 is a schematic flowchart of a garbage collection method in a solid-state hard disk according to an embodiment of the present invention;

8 is a schematic structural diagram of a system garbage recovery device according to an embodiment of the present invention;

FIG. 9 is a schematic structural diagram of a garbage collection device in a solid state hard disk according to an embodiment of the present invention.

detailed description

Embodiments of the present invention provide a system garbage collection method and a storage system, which can reduce write amplification and thereby increase the service life of a solid state hard disk.

FIG. 1 depicts a composition diagram of a flash memory array provided by an embodiment of the present invention. The flash memory array shown in FIG. 1 includes at least one controller (such as the controller 11 shown in FIG. 1) and a plurality of solid state hard disks 22 (as shown in FIG. 1). (Solid state drive 22A, solid state drive 22B, solid state drive 22C, solid state drive 22G). The controller 11 is connected to a host (not shown in the figure) through a storage area network (English: storage area network, SAN). The controller 11 may be a computing device, such as a server, a desktop computer, and the like. An operating system and application programs are installed on the controller 11. The controller 11 can receive input / output (I / O) requests from the host. The controller 11 may also store data (if any) carried in the I / O request, and write the data into the solid state hard disk 22. A solid state hard disk (English: Solid State Disk, SSD) is a memory using a flash memory (English: flash memory) chip as a medium, also known as a solid state drive (SSD).

FIG. 1 is only an exemplary illustration. In a practical application, a storage system may include two or more controllers. The physical structure and functions of each controller are similar to those of the controller 11, and this embodiment does not limit the number of controllers. And the connection between any controller and the solid state hard disk 22. As long as the controllers can communicate with each other and between the controllers and the solid state hard disk 22. In addition, in this embodiment, when the controller 11 sends an instruction to the solid-state hard disk, the controller 11 often sends it to multiple solid-state hard disks. For convenience of description, a set including multiple solid-state hard disks 22 is referred to as a solid-state hard disk group.

FIG. 2 is a structural example diagram of the controller 11. As shown in FIG. 2, the controller 11 includes an interface card 110, a processor 112, and an interface card 113.

The interface card 110 is used to communicate with the host, and the controller 11 may receive an operation instruction of the host through the interface card 110. The processor 112 may be a central processing unit (English: central processing unit, CPU). In the embodiment of the present invention, the processor 112 may be configured to receive an I / O request from a host and process the I / O request. The I / O request may be a write data request or a read data request, and the processor 112 may also send data in the write data request to the solid state hard disk 22. In addition, the processor 112 may also be used to perform a system garbage collection operation. The interface card 113 is configured to communicate with the solid state hard disk 22, and the controller 11 may send a write data request (including data, a logical address of the data, and a virtual address of the data) to the solid state hard disk 22 for storage through the interface card 113.

Optionally, the controller 11 may further include a memory 111. The memory 111 is configured to temporarily store data received from the host or data read from the solid state hard disk 22. When the controller 11 receives multiple write data requests sent by the host, the controller 11 may temporarily store data in the multiple write data requests in the memory 111. When the capacity of the memory 111 reaches a certain threshold, the data stored in the memory 111, the virtual address of the data, and the logical address allocated for the data are sent to the solid state hard disk 22. The solid state hard disk 22 stores the data. The memory 111 includes a volatile memory, a flash memory chip, or a combination thereof. The volatile memory is, for example, a random access memory (English: random-access memory, RAM). Flash memory chips such as floppy disks, hard disks, solid state disks (SSDs), optical disks, and other machine-readable media that can store program code. The memory 111 has a power-saving function. The power-saving function means that when the system is powered off and powered on again, the data stored in the memory 111 will not be lost.

After the data is written into the flash memory array, the controller 11 needs to record the validity of the data. The validity of the data is determined by whether the data has been modified. If the data is written for the first time, the data can be recorded as valid (referred to as valid data). If the data is modified, the data before the modification is recorded as invalid (referred to as invalid data). Specifically, the validity of the data can be recorded with a bitmap. For example, each "bit" of a bitmap corresponds to a logical address of data having a size of 1KB. When "bit" is 1, it means that the data stored in the logical address is valid. When "bit" is 0, it means that the The data stored in the logical address is invalid. The bitmap may be stored in the memory 111 or in a solid state hard disk.

It should be noted that the controller 11 belongs to a system controller, and the system controller is an independent device, which is different from a control chip in a solid state hard disk. In this embodiment, the control chip of the solid state hard disk is referred to as a flash memory controller.

The solid state hard disk 22 includes a flash memory controller and a plurality of flash memory chips. The flash memory controller is configured to perform operations such as a write data request or a read data request sent by the controller 11. The flash memory controller may be a processor located inside the solid state hard disk 22, or a field programmable logic gate array (Field Programmable Gate Array, FPGA) located outside the solid state hard disk 22.

The flash memory controller includes a flash translation layer (English: flash translation layer, FTL). The flash translation layer is used to store the correspondence between the logical address and the actual address of the data. Therefore, the flash translation layer is used to convert the logical address in the write data request or read data request sent by the system controller to the actual address of the data in the solid state disk. The logical address of the data is allocated by the system controller, and the solid state disk provides a subset of the logical address range of the system controller. The logical address of the data includes a start logical address and a length. The start logical address indicates the position of the logical block group where the data is located, and the length represents the size of the data. The actual address of the data may be a physical address of the data in the solid state disk, or an address that is virtualized based on the physical address and is only visible to the flash memory controller. This virtualized actual address is not visible to the system controller. Generally, the physical address includes the number of the physical block where the data is located and the number of the page.

Solid-state drives usually include one or more flash memory chips. Each flash memory chip includes several physical blocks (may be referred to as "blocks"). A solid state drive is based on a page (English: page) when reading or writing, but the erase operation can only be based on a physical block. An erase operation refers to setting all bits of this block to " 1". Before erasing, the flash controller needs to copy the valid data in this physical block to a blank page in another block.

Each physical block contains multiple pages. When a solid-state drive performs a data write request, it writes data in units of pages. For example, the controller 11 sends a write data request to the flash memory controller. The write data request includes a logical address of the data. After receiving the write data request, the flash memory controller continuously writes the data into one or more physical blocks according to the received time sequence. Writing one or more physical blocks continuously means that the flash memory controller searches for a blank physical block and writes data into the blank physical block until the blank physical block is filled. When the capacity of the physical block is exceeded, the flash controller looks for the next blank physical block and continues writing. The flash translation layer establishes and saves the correspondence between the logical address and the actual address of the page where the data is written. When the controller 11 sends a read data request to the flash memory controller to read the data, the read data request includes the logical address. The flash memory controller reads the data according to the logical address and the correspondence between the logical address and the actual address, and sends the data to the controller 11.

In a flash memory array, a single solid state drive can fail, resulting in data loss. In this embodiment, redundant data array (Redundant Array of Inexpensive Disks, RAID) technology is adopted to guarantee the possibility of data. The following introduces the mechanism for redundant protection of data in solid state drives.

First, the controller 11 performs space management on the solid state hard disk in the form of a logical block (English: chunk, CK for short). A logical block is a space concept. Its size is 4MB as an example, but it is not limited to 4MB. The logical blocks from different solid state hard disks can form a logical block set. The controller 11 then divides the logical blocks in the logical block set into a data logical block group and a check logical block group according to the set RAID type. The data logical block group includes at least two logical blocks for storing data, and the check logical block group includes at least one check logical block for storing check data of the data. In this embodiment, a logical block set including a data logical block group and a check logical block group is referred to as a logical block group. When the controller 11 fills up a certain size of data in the memory 111, it can be divided into a plurality of data units according to the set RAID type, and a check unit is calculated to obtain the data unit and the check unit. Give a solid state drive to save in the logical block group. Each logical block in the data group is used to store data units, and each logical block in the check group is used to store check units. After storage, these data units and corresponding check units constitute a stripe. A logical block group includes multiple stripes.

The data unit and check unit included in the stripe can be called the stripe unit. In this embodiment, the size of the stripe unit is 8 KB as an example, but it is not limited to 8 KB. As shown in FIG. 3, it is assumed that one logical block is taken out of each of the five solid-state hard disks to form a logical block set, and then the controller 11 groups logical blocks in the logical block set according to a RAID type (taking RAID 6 as an example), such as logical Block 1, logical block 2, and logical block 3 are data logical block groups, and logical block 4 and logical block 5 are check logical block groups. When the data stored in the memory 111 reaches 24KB (8KB * 3), the data is divided into 3 data units, each data unit is 8KB, and then 2 check units are calculated and each check unit is also 8KB. The controller 11 sends these data units and check units to the solid state hard disk and stores them in the logical block group (shown as a shaded part in FIG. 3). It can be understood that according to the redundancy protection mechanism of RAID 6, when any two data units or check units fail, the failed units can be reconstructed according to the remaining data units or check units.

The following describes the data writing method provided by the embodiment of the present invention with reference to FIG. 4. This method can be applied to the flash memory array shown in FIG. 1 and can be executed by the processor 112 in the controller 11 shown in FIG. 2 or the solid state hard disk 22. carried out. As shown in Figure 4, the method includes the following steps:

401: The controller 11 receives a write data request sent by the host, where the write data request includes data to be written and a virtual address of the data to be written. The controller 11 provides its storage space to the host in the form of a logical unit (LU), and the host has a binding relationship with one or more logical units. When a user sends data to be written to the controller 11 through the host, it is usually necessary to specify a virtual address where the data is stored. Specifically, the virtual address is an identifier of a logical unit and an offset address where the data is located in the logical unit.

402: The controller 11 writes the data to be written into the memory 111.

403: When the data in the memory 111 fills up a stripe size, the controller 11 determines that the target stripe is used to receive the data. The stripe is a subset of the logical block group shown in FIG. 3, and the logical address of the target stripe is a subset of the logical address of the logical block group in which it is located. The stripe size referred to here actually refers to the size of all data units in the stripe. Then, the controller 11 calculates check data of these data. The data and the verification data together form a stripe.

404: The controller 11 assigns a logical address to the target stripe. It should be understood that the logical address here is different from the virtual address in 401, the virtual address is an address that is visible to the controller 11 and the host, but not visible to the solid state hard disk 22, and the logical address in 404 is to the controller 11 and Addresses where the solid state drive 22 is visible but not visible to the host.

The controller 11 needs to determine whether there is an already allocated logical block group. If there is an allocated logical block group and the logical block group still has enough space to accommodate the data, the controller 11 may instruct the multiple solid state hard disks to This data is written into the allocated logical block group. Specifically, the controller 11 obtains an unused logical address from the logical address range of the allocated logical block group, and carries the logical address in the write data request to the solid state hard disk 22 in 405. The controller 11 determines that there are no logical block groups allocated in the system, or that the allocated logical block groups are filled with data, then the controller 11 needs to create a new logical block group. The creation process may be that the controller 11 determines that the remaining space of the system is sufficient to create a new logical block group according to its own record of the available space owned by each solid state hard disk. Next, the controller 11 obtains a logical block from different solid-state hard disks 22 respectively, and will construct these logical blocks into a new logical block group according to the set RAID type (refer to the description of the logical block group in FIG. 3) . Then, the controller 11 allocates a segment of logical addresses to each logical block, and these logical address sets are the logical addresses of the new logical block group. Among the logical addresses of the new logical block group, the controller 11 may obtain one of them as the logical address of the target stripe.

405: The controller 11 sends a write data instruction to the multiple solid state hard disks 22, respectively. Since the data in the target stripe should be distributed among multiple solid-state hard disks, it is necessary to send a write data instruction to each solid-state hard disk 22 in the multiple solid-state hard disks. The number of solid-state hard disks 22 receiving the write data instruction depends on the RAID type. Taking the RAID type as 3 + 2 (3 data units and 2 parity units) as an example, the data in the target stripe will be Distributed in five solid state hard disks, the controller 11 needs to generate five write data instructions, and each write data instruction is sent to one of the five solid state hard disks. Each of the write data instructions carries the part of data or part of the check data, a logical address of the part of data or the part of check data, and a virtual address of the part of the data or part of the check data. It should be understood that the logical address in each write data instruction is a subset of the logical address allocated by the controller 11 for the target stripe, and the virtual address in each write data instruction is from a write data request sent by the host.

406: For each solid state hard disk 22 that receives the write data instruction, the solid state hard disk 22 writes data in the write data instruction and a virtual address of the data into a physical block. Optionally, the write data instruction may be a custom command to ensure that the data and the virtual address are written into the same physical block. The address where the data is located in the block is called the actual address (including the number of the physical block and the page number where the data is located). After writing, the solid-state hard disk 22 stores the logic of the data in the flash translation layer. Correspondence between the address and the actual address.

The virtual address written in the physical block with the data is also called reverse mapping information, which can enable the solid state hard disk 22 to obtain the logical address of the data according to the virtual address of the data when performing in-disk garbage collection, and Find the logical address of the data from the flash translation layer and modify it to the new logical address.

407: After the solid-state hard disk 22 successfully writes the data into the block, the controller 11 creates a correspondence between the virtual address of the data and the logical address. Subsequently, if the host sends a data read request to read the data in the virtual address, the controller 11 may read the data from the solid state hard disk 22 according to the correspondence between the virtual address and the logical address. .

In the prior art, the reverse mapping information written into the physical block with the data is the logical address of the data. Because the logical address of the data describes where the data is located in the logical block group, when the data is migrated from one logical block group to another logical block group, its logical address will change. Then, it also means that the data information including the data and the logical address of the data will change. In this embodiment, in order to change only the logical block group to which the data information belongs during the garbage collection process of the system, instead of actually moving the data, the system controller writes the data and the virtual address of the data instead of actually moving the data. Logical addresses are written into physical blocks together. This is because the virtual address of the data does not change during this process.

In the embodiment shown in FIG. 4, the reverse mapping information refers to a virtual address of data, because when data is migrated between logical block groups, the virtual address of the data does not change. Optionally, in another implementation manner, the reverse mapping information refers to a fingerprint of data, and the so-called fingerprint refers to a result obtained by performing a hash operation on the data. Alternatively, the reverse mapping information is an offset address of data in a file. Optionally, in a flash array of a key-value (KV) interface, the write data request sent by the host to the controller 11 includes a keyword of data to be written instead of a virtual address. The word is obtained by the virtual address calculation. In this case, the reverse mapping information refers to a keyword of the data to be written. Correspondingly, in 407, the controller 11 creates a correspondence between the keyword of the data information and the logical address. relationship. Optionally, in the flash array of the log interface, the write data request sent by the host to the controller 11 includes the log address of the data to be written instead of the virtual address. At this time, the reverse mapping information is Refers to the log address of the data to be written. Correspondingly, in 407, the controller 11 creates a correspondence between the log address of the data information and the logical address. In general, the reverse mapping information in the embodiments of the present invention refers to any information that can find the actual address of the data through the forward index, and is not limited to the various cases listed above. When the data migrates between logical block groups This information does not change from time to time. In the following description, this embodiment still takes a virtual address as an example. If the reverse mapping information refers to other information that finds the actual address of the data through a forward index, the operation mode is similar.

In order to ensure that there is always enough free space in the flash memory array to create a logical block group, the controller 11 can monitor the available space of each solid state hard disk 22 in real time or periodically, so as to know the available space of the entire system. When the free space of the system is lower than the set space threshold, the system garbage collection is started. For example, the capacity of a solid state hard disk 22 is 128G, and the total capacity of all solid state drives (assuming that the flash memory array includes 10 solid state drives) included in the flash memory array shown in FIG. 1 is 1280G, and the space threshold can be set to 640G. That is, when the data stored in the flash memory array reaches half of the total capacity, the remaining available space also reaches the space threshold, and the controller 11 may perform system garbage collection at this time. It can be understood that 640G is only an example of a spatial threshold, and the spatial threshold may also be set to another value. In addition, when the used space of the system reaches the set space threshold, the system garbage collection can also be triggered. System garbage collection is different from garbage collection inside a solid state drive. Garbage collection inside a solid state drive is done by the solid state drive itself.

In general, the controller 11 performs system garbage collection in units of logical block groups. For example, the controller 11 obtains the logical address of valid data in a logical block group according to the bitmap, and sends the logical address of the valid data to the solid-state hard disk group, so that each solid-state hard disk 22 can according to the logical address of the valid data The data is read and sent to the controller 11. The controller 11 assigns a new logical address to the valid data, the new logical address belongs to a new logical block group, and sends the allocated new logical address to the solid state disk group, and each solid state disk 22 sends the valid data After writing a new physical block, the mapping relationship between the actual address and the new logical address is saved. Then, the controller 11 sends an unmap command or a trim command to the solid-state hard disk group, where the de-mapping command includes a logical address range of the logical block group to be recycled, and each solid-state hard disk 22 receives the de-mapping. After the mapping command, the correspondence between the logical address and the actual address of the logical address section stored in the flash translation layer is deleted. The solid state hard disk 22 may also mark the block corresponding to the actual address of the valid data before the transfer as a block that does not contain valid data or directly erase the block that does not contain valid data. Subsequently, the controller 11 may release a logical address range of the logical block group to be recovered and an actual physical space (which may also be understood as an actual address) occupied by the logical block group.

It can be seen that system garbage collection will cause data to be moved between physical blocks, thereby increasing write amplification. An embodiment of the present invention provides a system garbage collection method, which can complete the migration of valid data between logical block groups during the system garbage collection process without actually moving the data, thereby reducing write amplification.

The following describes the system garbage collection method provided by the embodiment of the present invention with reference to FIGS. 5 and 6. The method can be applied to the flash memory array shown in FIG. 1 and can be executed by the processor 112 in the controller 11 shown in FIG. 2. . FIG. 5 is a schematic flowchart of a system garbage collection method provided in this embodiment, and FIG. 6 is a schematic diagram of implementing data migration between two logical block groups. As shown in Figure 5, the method includes the following steps:

501: When the free space in the storage system is insufficient, the controller 11 selects at least one logical block group from a plurality of logical block groups as an object of garbage collection. The selected logical block group needs to satisfy a certain condition, for example, the invalid data contained in the logical block group reaches a first set threshold, or the logical block group is the logical block containing the most invalid data among the multiple logical block groups Group, or the logical block group contains valid data lower than a second set threshold, or the logical block group is the logical block group containing the least effective data among the plurality of logical block groups. The amount of invalid data or valid data can be counted according to the bitmap described previously. For convenience of description, in this embodiment, the selected logical block group for garbage collection is referred to as a first logical block group.

According to the description of the logical block group in FIG. 3 and FIG. 6, it can be known that the first logical block group includes a first data logical block group and a first check logical block group. The first data logical block group includes at least two data logical blocks. For storing data. The first check logic block group includes at least one logic block for storing check data. Each data logical block included in the first data logical block group and a check logical block included in the first check logical block group are all from different solid state drives.

The first logical block group contains valid data and invalid data. Generally, during the system garbage collection process, valid data in the first logical block group needs to be migrated to a new logical block group, and then the data is released. The first logical block group. In this embodiment, the position where valid data in the first logical block group is located in the first logical block group is a first logical address. There is a corresponding relationship between the first logical address and the actual address where the valid data is stored in the solid state hard disk.

502: The controller 11 creates a second logical block group according to the distribution of the first data logical block group among the multiple solid-state hard disks. The second logical block group is a logical block group that receives valid data in the first logical block group. The RAID type of the created second logical block group is the same as the RAID type of the first logical block group. Therefore, the second logical block group includes a second data logical block group and a second check logical block group, where the second The number of data logical blocks included in the data logical block group is the same as the number of data logical blocks included in the first data logical block group, and the number of check logical blocks included in the second check logical block group is the same as the first check The logical block group contains the same number of check logical blocks. In addition, the distribution of the second data logical block group in the plurality of solid state hard disks is the same as the distribution of the first data logical block group in the plurality of solid state hard disks. For example, the logical block 1, logical block 2, and logical block 3 included in the first data logical block group are respectively located in the solid state hard disk 22A, the solid state hard disk 22B, and the solid state hard disk 22C. According to the distribution of logical block 1, logical block 2, and logical block 3 among these solid-state hard disks, the controller 11 obtains one data logical block from the solid-state hard disk 22A, the solid-state hard disk 22B, and the solid-state hard disk 22C, respectively, and creates a second logical block group. That is, the logical block 1 ', the logical block 2', and the logical block 3 'in the second logical block group are also located in the solid state hard disk 22A, the solid state hard disk 22B, and the solid state hard disk 22C, respectively. As shown in FIG. 6, the logical block 1 included in the first logical block group is distributed in the solid state hard disk 22A. In order to create the second logical block group, the controller 11 obtains the logical block 1 'from the solid state hard disk 22A. Similarly, for data logic block 2 and data logic block 3 included in the first logic block group, the controller 11 also obtains data logic block 2 'and data logic block 3 from the corresponding solid state hard disks according to their distribution in the solid state hard disk. '.

However, this embodiment does not require the controller 11 to create a second verification logic block group according to the distribution of the first verification block group among the plurality of solid state hard disks. In fact, the controller 11 can freely select a solid state hard disk that provides a verification logic block among the plurality of solid state hard disks, as long as it does not duplicate the solid state hard disk that provides a data logic block. This is because, generally, the verification data stored in the second verification logic block needs to be recalculated and obtained instead of being directly migrated from the first verification logic block.

In 502, each data logical block included in the second logical block group is distributed in a solid state hard disk where one of the data logical blocks included in the first logical block group is located. However, in another implementation manner, it is only necessary to ensure that at least one data logical block in the second logical block group is distributed in a solid state hard disk in which the data logical block storing valid data is located in the first logical block group. , Can also reduce write amplification to a certain extent. In addition, it can be understood that the data stored in the data logical block included in the first data logical block group may be valid data or invalid data. That is, among the plurality of data logical blocks, only a part of the data logical blocks (or even only one data logical block) may store valid data. Then when creating the second logical block group, it is only necessary to ensure that there are some data logical blocks in the second logical block group or one data logical block is distributed among the data logical blocks in the first data logical block group that stores valid data. The solid state hard disk where it is located can perform garbage collection of the first logical block group.

503: The controller 11 allocates a second logical address to valid data in the first logical block group. For example, the valid data can refer to the small shaded block in logic block 1 shown in FIG. 6. It should be noted that the small shaded block shown in FIG. 6 is only a part of the valid data in the first logical block group. Data may also be distributed in data logic block 2 and data logic block 3. The allocated second logical address is a subset of the logical addresses of the second logical block group. The second logical block group created in 502 may not only be used to store valid data in one logical block group, but may also be used to store valid data in multiple logical block groups.

504: The controller 11 changes the first logical address of the valid data stored in the memory 111 to a second logical address. In the conventional system garbage collection, the controller 11 needs to read valid data from the first logical block group and rewrite it to the second logical block group. This means that the valid data will move between the physical blocks of the solid state hard disk, and accordingly, both the logical address and the actual address of the valid data will change. In this embodiment, to migrate the valid data from the first logical block group to the second logical block group, only the logical address of the valid data needs to be modified (the first logical address that will belong to the first logical block group). Modified to the second logical address belonging to the second logical block group), and the position where the valid data is actually stored in the solid state hard disk has not changed. That is, in this embodiment, only the logical address of the valid data needs to be changed, and the actual address of the valid data is not changed. Exemplarily, before performing the system garbage collection on the first logical block group, the controller 11 stores the correspondence between the virtual address of the valid data and the first logical address. In 504, the controller 11 may modify the correspondence between the virtual address of the valid data and the first logical address to the correspondence between the virtual address and the allocated second logical address.

505: The controller 11 sends a mapping relationship modification instruction to the multiple solid-state hard disks, where the mapping relationship modification instruction is used to instruct the multiple solid-state hard disks to associate the first logical address of the valid data with the actual address The relationship is modified to a correspondence relationship between the second logical address and the actual address. In 504, the controller 11 changes the logical address of the valid data. The change of the logical address also needs to notify the solid state hard disk to ensure that the logical addresses of the valid data stored in the controller 11 and the solid state hard disk 22 are consistent. It is convenient to read the valid data in the future. It can be understood that, since each solid-state hard disk in the plurality of solid-state hard disks stores some valid data, the controller 11 needs to send a mapping relationship modification instruction to each solid-state hard disk to instruct the solid-state hard disk to modify its own storage Correspondence of some valid data.

It can be understood that if only one first data logical block in the first logical block group contains valid data, and the created second logical block group also has only one solid state hard disk in which the second data logical block is located, the storage is valid. The solid state hard disks where the first data logical block of data is the same, then the controller 11 only needs to send a mapping relationship modification instruction to the solid state hard disk where the first data logical block containing valid data is located. Similarly, if there is a certain number (greater than or equal to 2) of the first data logical block in the first logical block group containing valid data, and the created second logical block group also has the same number of second data logical blocks. The solid-state hard disk is the same as the solid-state hard disk where the first data logical block storing valid data is stored, and the controller 11 only needs to send a mapping relationship modification instruction to the solid-state hard disk holding valid data.

In another case, there are N (N is an integer greater than or equal to 2) first data logical blocks in the first logical block group containing valid data, and the created second logical block group has M (M is greater than or The solid-state hard disk where the second data logical blocks are located is the same as the solid-state hard disk where some of the first data logical blocks of the N first data logical blocks are located, and M is less than N. At this time, the controller 11 only needs to send a mapping relationship modification instruction to the solid state disk where the M first data logical blocks are located.

The system garbage collection method shown in FIG. 5 may be implemented in the entire flash memory array, or may be applied to a part of the flash memory array. For example, the logical addresses provided by the multiple solid-state hard disks 22 to the controller 11 can be divided into two sets, where the system garbage collection in the first set adopts the method provided by the embodiment of the present invention, and the system in the second set Garbage recycling is traditional.

After all valid data in the first logical block group is migrated to the second logical block group, all data in the first logical block group becomes invalid data. At this time, the controller 11 may transfer the first logical block The information that the data of the block group becomes invalid data (for example, the logical address of the first logical block group) is passed to each solid state hard disk 22 distributed by the first logical block group. The invalid data is described. When the solid state hard disk 22 performs internal garbage collection, the physical block containing the invalid data can be directly recovered without copying the valid data.

The embodiment shown in FIG. 5 introduces the process of system garbage collection. It can be known from the above description that the system garbage collection is triggered and completed by the controller 11. However, the solid state hard disk 22 may also perform its own garbage collection, and for the time being, the garbage collection inside the solid state hard disk is referred to as on-disk garbage collection. Most operations of garbage collection in the disk are completed by the flash memory controller, and in a few cases, the cooperation of the controller 11 is required. FIG. 7 is a schematic flowchart of a method for garbage collection in a tray provided in this embodiment. As shown in FIG. 7, the method includes the following steps.

701: When the free blocks in the solid state hard disk 22 are insufficient, the flash memory controller of the solid state hard disk 22 selects at least one physical block to be recovered from a plurality of physical blocks. The solid state hard disk 22 is any one of the solid state hard disks shown in FIG. 1. The selected physical block needs to meet certain conditions, for example, the invalid data contained in the physical block reaches a third set threshold, or the physical block is the physical block containing the most invalid data among the plurality of physical blocks, or the physical block The valid data contained in the block is lower than the fourth set threshold, or the physical block is a physical block containing the least effective data among the plurality of physical blocks. For the convenience of description, in this embodiment, the selected physical block for garbage collection is referred to as a first physical block.

The data amount of invalid data or valid data can be counted according to the bitmap inside the solid state hard disk 22. A bitmap is stored in the solid state hard disk 22, and the bitmap, as shown in Table 1, is used to describe the validity of the data stored in the actual address.

Actual address	Effectiveness	Actual address	Effectiveness
Block0, page0	0	Block1, page0	0
Block0, page1	0	Block1, page1	1
Block0, page2	1	Block1, page2	1
...	...	...	...
Block0, pageN	0	Block1, pageN	0

Among them, "0" indicates that the data stored in the address is invalid data, and "1" indicates that the data stored in the address is valid data. According to the bitmap, the solid state hard disk 22 can acquire the data amount of valid data or invalid data of each physical block, thereby selecting the first physical block to be recovered.

702: The flash memory controller reads valid data and a virtual address of the valid data from the first physical block. The actual address where valid data is stored can be obtained from Table 1, such as block0, page2. However, the solid state hard disk 22 reads the stored valid data from the actual address. Since the virtual address of the data and the data are stored as a whole, the virtual address of the valid data can be read when the valid data is read.

703: The flash memory controller sends the virtual address to the controller 11. If the logical address of the valid data and the valid data are stored together in a conventional manner, the solid state hard disk 22 can directly obtain the logical address of the valid data. However, in this embodiment, the virtual address of the valid data is stored in the solid-state hard disk 22 instead of a logical address. Therefore, the solid-state hard disk 22 needs to send the virtual address to the controller 11 to query the valid data. Logical address.

703: The flash memory controller receives a logical address corresponding to the virtual address sent by the controller 11. The controller 11 stores the correspondence between the virtual address and the logical address. Exemplarily, the logical address herein may be the second logical address in the embodiment shown in FIG. 5, and may also be referred to as a source logical address.

704: The flash memory controller allocates a target logical address.

705: The flash memory controller copies the valid data to a second physical block, where the second physical block is a blank physical block. Since the valid data and the virtual address of the valid data are stored as a whole, when the flash memory controller copies the valid data to the second physical block, it also copies the virtual address of the valid data to The second physical block.

706: After the copying is completed, the flash memory controller modifies the corresponding relationship stored in the flash memory translation layer. Specifically, the flash memory controller deletes the correspondence between the source logical address and the actual address where the valid data is stored in the first physical block, and creates the target logical address and the valid data save A correspondence between actual addresses in the second physical block.

707: Erase data in the first physical block.

In the same way, the solid state hard disk 22 may select other physical blocks as the object of garbage collection, and repeatedly perform 701 to 707, thereby completing the garbage collection of the entire solid state hard disk 22.

In the description shown in FIG. 7, this embodiment uses the virtual address as an example. However, it can be understood that the virtual address may be replaced with other forms of reverse mapping information. At this time, the operation mode of garbage collection on the disk is similar to that described in FIG. 7, and is not repeated here.

In addition, this embodiment is also applicable to another storage system. The storage system includes a system controller and multiple shingled magnetic recording (SMR) hard disks. The storage system can also execute the method flow shown in FIG. 4, FIG. 5, and FIG. 7. It only needs to replace the solid-state hard disk with a shingled magnetic recording technology hard disk, which will not be repeated here.

8 is a schematic structural diagram of a system garbage collection device according to an embodiment of the present invention. The device is located in a controller 11 of a flash memory array. As shown in FIG. 8, the device includes a determination module 801, a creation module 802, an allocation module 803, and an instruction. Block 804.

The determining module 801 is configured to determine a first logical block group to be recycled, where the first logical block group includes multiple first data logical blocks, and the multiple first data logical blocks are distributed in the flash memory array. Among the different solid-state hard disks included, wherein data stored in at least one of the plurality of first data logical blocks includes valid data, and the position of the valid data in the first logical block is A first logical address, and the first logical address has a corresponding relationship with an actual address where the valid data is stored in the solid state hard disk. The function of this module may be executed by the processor 112 alone or executed by the processor 112 calling a program in the memory 111. For details, refer to step 501 and related description shown in FIG. 5, and details are not described herein again.

A creating module 802 is configured to create a second logical block group, where the second logical block group includes a plurality of second data logical blocks, wherein at least one of the second data logical blocks is distributed in a first storage block storing the valid data. A solid state drive where a data logical block is located. The function of this module can be executed by the processor 112 alone or executed by the processor 112 calling the program in the memory 111. For details, refer to step 502 shown in FIG. 5 and related descriptions, and details are not described herein again.

An allocation module 803 is configured to allocate a second logical address to the valid data in a second logical block distributed in the solid state hard disk where the first logical block storing the valid data is located. The functions of this module can be executed by the processor 112 alone or executed by the processor 112 calling a program in the memory 111. For details, refer to step 503 and related description shown in FIG. 5, and details are not described herein again.

An instruction module 804 is configured to instruct the solid-state hard disk storing the valid data to modify a correspondence between the first logical address and the actual address to a correspondence between the second logical address and the actual address. The function of this module can be executed by the processor 112 alone or executed by the processor 112 calling the program in the memory 111. For details, refer to step 505 and related description shown in FIG.

FIG. 9 is a schematic structural diagram of a garbage collection device in a solid state hard disk according to an embodiment of the present invention. As shown in FIG. 9, the device includes a processing module 901 and a recycling module 902.

A processing module 901, configured to read valid data and reverse mapping information of the valid data from the first physical block to be recycled; send the reverse mapping information to the system controller; and receive the system controller A source logical address corresponding to the reverse mapping information sent; assigning a target logical address to the valid data, and copying the valid data to a second physical block. The function of this module can be executed by the controller inside the solid state hard disk 22. For details, refer to steps 701 to 705 shown in FIG. 7 and related descriptions, which will not be repeated here.

The recycling module 902 is configured to delete the correspondence between the source logical address and the actual address where the valid data is stored in the first physical block, and create the target logical address and the valid data to be stored in the Correspondence between actual addresses in the second physical block; erasing data in the first physical block. The functions of this module can be executed by the controller inside the solid state hard disk 22. For details, refer to steps 706 to 707 shown in FIG. 7 and related descriptions, and details are not described herein again.

Those of ordinary skill in the art will understand that each aspect of the present invention, or possible implementation manners of each aspect, may be specifically implemented as a system, method, or computer program product. Therefore, aspects of the present invention, or possible implementations of various aspects, may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, etc.), or an embodiment combining software and hardware aspects. These are collectively referred to as "circuits", "modules" or "systems". In addition, each aspect of the present invention, or a possible implementation manner of each aspect, may take the form of a computer program product, where the computer program product refers to computer-readable program code stored in a computer-readable medium.

Computer-readable media includes, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, equipment, or devices, or any suitable combination of the foregoing, such as random access memory (RAM), read-only memory (ROM), erasable Programmable read-only memory (EPROM), optical disc.

The processor in the computer reads the computer-readable program code stored in the computer-readable medium, so that the processor can execute the functional actions specified in each step or a combination of steps in the flowchart.

The computer-readable program code can be executed entirely on the user's computer, partly on the user's computer, as a separate software package, partly on the user's computer and partly on a remote computer, or entirely on a remote computer or server . It should also be noted that in some alternative implementations, the functions noted in the steps in the flowchart or in the blocks in the block diagram may occur out of the order noted in the figure. For example, two steps shown in succession, or two blocks may in fact be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved.

Those of ordinary skill in the art may realize that the units and algorithm steps of each example described in connection with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed by hardware or software depends on the specific application and design constraints of the technical solution. Those of ordinary skill in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited to this. Those skilled in the art can easily think of changes or replacements within the technical scope disclosed by the present invention, which should be covered in Within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (31)

1. A system garbage collection method, characterized in that the method is applied to a flash memory array, the flash memory array includes a system controller and a plurality of solid state hard disks, and the method is executed by the system controller and includes the following steps:

   A first logical block group to be recovered is determined, the first logical block group includes a plurality of first data logical blocks, and the plurality of first data logical blocks are distributed in different solid state hard disks, wherein the plurality of The data stored in at least one first data logical block in the first data logical block includes valid data, and the position of the valid data in the first logical block is a first logical address, and the first logical address and the The actual address of valid data stored in the solid-state drive has a corresponding relationship;

   Creating a second logical block group, the second logical block group including a plurality of second data logical blocks, wherein at least one of the second data logical blocks is distributed in a place where the first data logical block storing the valid data is located Solid state drive

   Assigning a second logical address to the valid data in the at least one second logical block;

   Instructing the solid-state hard disk storing the valid data to modify the correspondence between the first logical address and the actual address to the correspondence between the second logical address and the actual address.
2. The method according to claim 1, wherein the number of the first data logical blocks storing valid data is the same as the number of the at least one second data logical block.
3. The method according to claim 2, wherein:

   The creating a second logical block group includes: creating a second logical block group according to the distribution of the plurality of first data logical blocks in the multiple solid-state hard disks. The second data logical block is distributed in the same solid state hard disk as the plurality of first data logical blocks.
4. The method according to any one of claims 1 to 3, wherein the first logical block group further comprises a first check logical block, and the first check logical block is distributed with the plurality of first In the solid-state hard disks having different data logical blocks, the second logical block group further includes a second check logical block, and the second check logical block is distributed in a solid-state hard disk different from the plurality of second data logical blocks .
5. The method according to claim 4, wherein the solid-state hard disk where the second verification logic block is located is the same as the solid-state hard disk where the first verification logic block is located.
6. The method according to claim 4, wherein the solid-state hard disk where the second verification logic block is located is different from the solid-state hard disk where the first verification logic block is located.
7. The method according to claim 1, before determining the first logical block group to be recovered, further comprising determining that a data amount of valid data in the first logical block group is lower than a set threshold.
8. A system controller, characterized in that the system controller includes:

   Interface for communicating with multiple solid state drives; and

   A processor, configured to determine a first logical block group to be recovered, the first logical block group includes a plurality of first data logical blocks, and the plurality of first data logical blocks are distributed in different solid state hard disks, where The data stored in at least one of the plurality of first data logical blocks includes valid data, and the position of the valid data in the first logical block is a first logical address, and the first The logical address has a corresponding relationship with the actual address where the valid data is stored in the solid state hard disk;

   Creating a second logical block group, the second logical block group including a plurality of second data logical blocks, wherein at least one of the second data logical blocks is distributed in a place where the first data logical block storing the valid data is located Solid state drive

   Assigning a second logical address to the valid data in the at least one of the second logical blocks;

   Instructing, via the interface, the solid-state hard disk storing the valid data to modify the correspondence between the first logical address and the actual address to the correspondence between the second logical address and the actual address.
9. The system controller according to claim 8, wherein the number of the first data logical blocks storing valid data is the same as the number of the at least one second data logical block.
10. The system controller according to claim 9, wherein:

    The processor is specifically configured to create a second logical block group according to the distribution of the multiple first data logical blocks in the multiple solid-state hard disks, and the multiple second data included in the second logical block group The logical blocks are distributed in the same solid state hard disk as the plurality of first data logical blocks.
11. The system controller according to any one of claims 8 to 10, wherein the first logic block group further comprises a first check logic block, and the first check logic block is distributed between the plurality of In a solid state hard disk having a different first data logical block, the second logical block group further includes a second check logical block, and the second check logical block is distributed in a different solid state from the plurality of second data logical blocks. Hard drive.
12. The system controller according to claim 11, wherein the solid-state hard disk where the second verification logic block is located is the same as the solid-state hard disk where the first verification logic block is located.
13. The system controller according to claim 11, wherein the solid-state hard disk where the second verification logic block is located is different from the solid-state hard disk where the first verification logic block is located.
14. The system controller according to claim 8, wherein:

    The processor is further configured to determine, before determining the first logical block group to be recovered, that a data amount of valid data in the first logical block group is lower than a set threshold.
15. A flash memory array, characterized in that it includes a system controller and a plurality of solid state drives;

    The system controller is configured to determine a first logical block group to be recycled, the first logical block group includes a plurality of first data logical blocks, and the plurality of first data logical blocks are distributed on different solid state hard disks Wherein, the data stored in at least one of the plurality of first data logical blocks includes valid data, and the position of the valid data in the first logical block is a first logical address, so The first logical address has a corresponding relationship with the actual address where the valid data is stored in the solid state hard disk;

    Creating a second logical block group, the second logical block group including a plurality of second data logical blocks, wherein at least one of the second data logical blocks is distributed in a place where the first data logical block storing the valid data is located Solid state drive

    Assigning a second logical address to the valid data in the at least one of the second logical blocks;

    Instructing the solid state hard disk storing the valid data to modify the correspondence between the first logical address and the actual address to the correspondence between the second logical address and the actual address.
16. The flash memory array according to claim 15, wherein the number of the first data logical blocks storing valid data is the same as the number of the at least one second data logical block.
17. The flash memory array according to claim 16, wherein:

    The system controller is specifically configured to create a second logical block group according to the distribution of the multiple first data logical blocks in the multiple solid-state hard disks. The two data logic blocks are distributed in the same solid state hard disk as the plurality of first data logic blocks.
18. The flash memory array according to any one of claims 15-17, wherein the first logic block group further comprises a first check logic block, and the first check logic block is distributed between the plurality of In a solid state hard disk having a different data logical block, the second logical block group further includes a second check logical block, and the second check logical block is distributed on a solid state hard disk different from the plurality of second data logical blocks. in.
19. The flash memory array according to claim 15, wherein:

    The solid state hard disk storing the valid data is further configured to read the valid data and reverse mapping information of the valid data from a first physical block where the valid data is located; and send the valid data to the system controller. Said reverse mapping information;

    The system controller is further configured to query a second logical address corresponding to the reverse mapping information according to the reverse mapping information, and send the second logical address to the solid-state hard disk storing the valid data;

    The solid state hard disk storing the valid data is further configured to allocate a third logical address to the valid data, and copy the valid data to a second physical block;

    The solid state hard disk storing the valid data is further configured to delete a correspondence between the second logical address and the actual address, and create the third logical address and the valid data to be stored in the second physical address. The correspondence between the actual addresses in the block;

    The solid state hard disk storing the valid data is further configured to erase data in the first physical block when it is determined that the first physical block does not contain other valid data.
20. The flash memory array according to claim 19, wherein the reverse mapping information includes a virtual address of the valid data.
21. A method for garbage collection in a solid state hard disk, characterized in that the solid state hard disk is connected to a system controller, and the method is performed by the solid state hard disk, and includes the following steps:

    Reading valid data and reverse mapping information of the valid data from the first physical block to be recycled;

    Sending the reverse mapping information to the system controller;

    Receiving a source logical address corresponding to the reverse mapping information sent by the system controller;

    Allocate a target logical address to the valid data, and copy the valid data to a second physical block;

    Delete the correspondence between the source logical address and the actual address where the valid data is stored in the first physical block, and create the target logical address and the valid data which are stored in the second physical block Correspondence between actual addresses;

    Erasing data in the first physical block.
22. The method according to claim 21, wherein the reverse mapping information includes a virtual address of the valid data.
23. A solid state hard disk, comprising a controller, a first physical block and a second physical block;

    The controller is used for:

    Reading valid data and reverse mapping information of the valid data from the first physical block to be recycled;

    Sending the reverse mapping information to the system controller;

    Receiving a source logical address corresponding to the reverse mapping information sent by the system controller;

    Allocate a target logical address for the valid data, and copy the valid data to the second physical block;

    Delete the correspondence between the source logical address and the actual address where the valid data is stored in the first physical block, and create the target logical address and the valid data which are stored in the second physical block Correspondence between actual addresses;

    Erasing data in the first physical block.
24. The solid state hard disk according to claim 23, wherein the reverse mapping information includes a virtual address of the valid data.
25. A system garbage collection device is characterized in that the device is located in a system controller of a flash memory array, and the device includes:

    A determining module, configured to determine a first logical block group to be recycled, where the first logical block group includes a plurality of first data logical blocks, and the plurality of first data logical blocks are distributed in different locations included in the flash memory array; In the solid state hard disk, wherein at least one of the plurality of first data logical blocks stores data stored in the first data logical block including valid data, and the position of the valid data in the first logical block is first logic Address, the first logical address has a corresponding relationship with the actual address where the valid data is stored in the solid state hard disk;

    A creating module, configured to create a second logical block group, where the second logical block group includes a plurality of second data logical blocks, wherein at least one of the second data logical blocks is distributed on a first storing the valid data; The solid state disk where the data logic block is located;

    An allocation module, configured to allocate a second logical address to the valid data in the at least one of the second logical blocks;

    An instruction module is configured to instruct the solid-state hard disk storing the valid data to modify the correspondence between the first logical address and the actual address to the correspondence between the second logical address and the actual address.
26. The apparatus according to claim 25, wherein the number of the first data logical blocks storing valid data is the same as the number of the at least one second data logical block.
27. The device according to claim 26, wherein:

    The creating module is specifically configured to create a second logical block group according to the distribution of the multiple first data logical blocks in the multiple solid-state hard disks, and a plurality of second logical block groups included in the second logical block group. The data logic blocks are distributed in the same solid state hard disk as the plurality of first data logic blocks.
28. The apparatus according to any one of claims 25 to 27, wherein the first logical block group further comprises a first check logical block, and the first check logical block is distributed between the first check logical block and the plurality of first check logical blocks. In the solid-state hard disks having different data logical blocks, the second logical block group further includes a second check logical block, and the second check logical block is distributed in a solid-state hard disk different from the plurality of second data logical blocks. .
29. The device according to claim 25, wherein the determining module is further configured to determine that a data amount of valid data in the first logical block group is lower than a set before determining the first logical block group to be recycled. Threshold.
30. A garbage recycling device in a solid state hard disk, which is characterized by comprising:

    A processing module, configured to read valid data and reverse mapping information of the valid data from the first physical block to be recycled; send the reverse mapping information to the system controller; receive the system controller sends A source logical address corresponding to the reverse mapping information; assign a target logical address to the valid data, and copy the valid data to a second physical block;

    A recycling module, configured to delete the correspondence between the source logical address and the actual address where the valid data is stored in the first physical block, and create the target logical address and the valid data to be stored in the first Correspondence between actual addresses in two physical blocks; erasing data in the first physical block.
31. The apparatus according to claim 30, wherein the reverse mapping information includes a virtual address of the valid data.

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