WO2020030907A1

WO2020030907A1 - Electrical component comprising a lead-free thin film ceramic member and an alumina barrier layer

Info

Publication number: WO2020030907A1
Application number: PCT/GB2019/052212
Authority: WO
Inventors: Peter Mardilovich; Brady Gibbons; Song Won Ko
Original assignee: Xaar Technology Limited
Priority date: 2018-08-08
Filing date: 2019-08-07
Publication date: 2020-02-13
Also published as: GB2576194A; GB201812918D0

Abstract

The present invention relates to an electrical componentfor a MEMS device, in particular, but not limited to, an electromechanical actuator. It may find particularly beneficial application as an actuator element for a droplet deposition head. In one aspect, the present inventionprovides anelectrical component comprising: i)a substrate layer; ii)at least one electrical element; and iii)at least one barrier layer comprising amorphous alumina, said at least one barrier layer arranged over at least a portion of the substrate layerso as to separate the substrate layer from the at least one electrical element; wherein each of the at least one electrical element comprises: a)a lead-free thin film ceramic member formed of a lead-free ceramic material having a major proportion of a perovskite phase; and b)first and second electrodes disposed adjacent the lead-free thin film ceramic member such that a potential difference may be established between the first and second electrodes, through the lead-free thin film ceramic member during operation; and wherein the electrical component is configured so that the lead-free thin film ceramic member of each of the at least one electrical element is disposed adjacent to the barrier layer over one or more regions.

Description

ELECTRICAL COMPONENT COMPRISING A LEAD-FREE THIN FILM CERAMIC MEMBER AND AN ALUMINA BARRIER LAYER

The present invention relates to an electrical component for a MEMS device, in particular, but not limited to, an electromechanical actuator. It may find particularly beneficial application as an actuator element for a droplet deposition head.

Droplet deposition heads are now in widespread usage, whether in more traditional applications, such as inkjet printing, or in 3D printing, or other materials deposition or rapid prototyping techniques. Accordingly, the fluids may have novel chemical properties to adhere to new substrates and increase the functionality of the deposited material.

Recently, inkjet printheads have been developed that are capable of depositing ink directly onto ceramic tiles, with high reliability and throughput. This allows the patterns on the tiles to be customized to a customer’s exact specifications, as well as reducing the need for a full range of tiles to be kept in stock.

In other applications, inkjet printheads have been developed that are capable of depositing ink directly on to textiles. As with ceramics applications, this may allow the patterns on the textiles to be customized to a customer’s exact specifications, as well as reducing the need for a full range of printed textiles to be kept in stock.

In still other applications, droplet deposition heads may be used to form elements such as colour filters in LCD or OLED elements displays used in flat-screen television manufacturing.

So as to be suitable for new and/or increasingly challenging deposition applications, droplet deposition heads continue to evolve and specialise. However, while a great many developments have been made, there remains room for improvements in the field of droplet deposition heads.

Electrical elements for MEMS devices are commonly manufactured through the deposition of a series of layers arranged on a substrate, for example through one or more techniques known in the thin film technology field. A typical electrical element may have a configuration where a thin film of a ceramic material showing ferroelectric behaviour, for example a piezoelectric material and a relaxor/ferroelectric crossover material, is interposed between two electrically conductive layers, a lower electrode and a top electrode. Such an electrical element is deposited layer by layer on a substrate, commonly a wafer accommodating several arrays of electrical elements. The lower electrode may be a common electrode or may be patterned to form arrays of individual electrodes; the thin film material, as well, may or may not be patterned. Individual electrical elements, therefore, might comprise a patterned ceramic material thin film or a region of an unpatterned“common” ceramic material thin film. Individually addressable regions of the electrical elements may be defined by at least one of the electrodes being patterned such as to be individual to each electrical element.

In other cases an electrical element may have an electrode configuration in which first and second electrodes are instead provided on one surface of the ceramic thin film, for example, as an adjacent or interdigitated pair. This electrode arrangement has the advantage of providing an easier way of connecting the electrodes since they are on the same surface so the manufacture of the electrical component is simplified. It is particularly useful for some applications, for example sensors.

One challenge of providing an efficient electrical element and associated process of manufacture is to ensure electrical isolation between the upper and lower electrodes. The ceramic material typically is not a good conductor of electricity. Where for example at least the lower electrode and ceramic material are patterned to the same shape, with either a common or similarly patterned upper electrode, paths for shorts can be present along the edge profile of the patterned areas. This necessitates the use of additional, electrically insulating layers that ensure electric isolation between the two electrodes. The ceramic material used for electrical elements is typically a poor electrical conductor. It would therefore be advantageous if this material could be deposited in form of a common layer, or over at least an area that sufficiently electrically separates the two electrodes from one another. This kind of configuration would avoid the deposition of an electrical insulation layer on the lower electrode thus reducing the number of steps in the formation of the electrical element.

It is well known in the art that the performance of an electrical element having a thin film ceramic material with piezoelectric properties is dependent on the composition and the crystal structure of the thin film ceramic material. These, in turn, are influenced by the crystal structure and orientation of the supporting layers. For these reasons, great effort has been devoted to the development of electrodes on which a ceramic thin film can be grown with good crystal orientation and with a controlled stoichiometry, while ensuring a good adhesion to the substrate.

In the case of an unpatterned ceramic thin film deposited on a patterned lower electrode, the ceramic thin film is to be deposited on the electrode layer and on a different layer, specifically an underlayer exposed by the patterning process. Preferably, the crystalline phase of the ceramic material will be the same in both areas, on the electrode and on the underlayer, otherwise cracks can be formed at the boundaries between the different crystal phases, thus compromising the performance of the electrical element and potentially forming paths for shorts between the first and second electrodes. At the same time, it is necessary to ensure that the stoichiometry of the ceramic thin film will be consistent and homogeneous throughout the thin film, since variations in the composition may lead to variations in crystal phase and, because maintaining the composition of the ceramic thin film is critical for the performance of the electric element, its reliability and reproducibility of its results. The underlayer which may be exposed by the patterning process and on which the ceramic thin film will be deposited, therefore, needs to be suitable to overcome the above issues.

Commonly employed ceramic materials include lead based ceramics with perovskite structure, especially lead titanate zirconate (PZT), doped PZT and PZT based solid solutions. They may be deposited onto the substrate through a number of deposition techniques known in the art, for example, sputtering, chemical vapour deposition (CVD), chemical solution deposition (CSD).

For any ceramic material used in MEMS devices, it is critical to maintain their precise stoichiometry. During the deposition and/or processing of such materials, when temperatures up to 800°C may be reached, some species, especially the most volatile ones, such as lead, can evaporate and/or diffuse through the underlying layers towards the substrate. Such element depletion can significantly deteriorate the performance of the ceramic material and should be avoided. This would ensure the formation of perovskite rather than other, undesirable phases (e.g. pyrochlore) and avoid the detrimental effects of volatile elemental diffusion into the substrate.

The effect of evaporation is relatively easy to control by providing for a suitable excess of volatile elements in the starting materials, for example in the precursor solutions, for instance when the ceramic thin film is deposited through chemical solution deposition, or in the ceramic sintered targets, such as when the ceramic thin film is deposited through sputtering. To control diffusion is much more challenging.

There are three major mechanisms of diffusion of ions:‘dissolution’, for example when volatile ions uniformly dissolve in the supporting layers; formation of mixed phases and diffusion along the grain boundaries and/or nano-cracks present in the supporting layers. Traditionally, when PZT is used to form the ceramic thin film interposed between two electrodes, a titanium-based layer may be deposited first on the substrate before the supporting electrode is deposited. Such a supporting electrode may for example be a platinum electrode. The main purpose of the titanium-based layer is to improve adhesion of the platinum electrode to the substrate. However, during deposition of a PZT based layer on the platinum electrode, the titanium-based layer further acts as a trapping layer for any lead that diffuses through the platinum layer from the PZT layer. Titanium dioxide and lead form lead titanate, so that lead is trapped in the layer and doesn’t diffuse any further. This system is reliable and generally robust; however, if any nano-cracks form in the titanium-based layer, the lead may diffuse along the cracks and into the supporting layers, for example silicon oxide. When silicon is used as a substrate, a native layer of silicon oxide is present on the surface on which the electrical element will be deposited.

A silicon oxide layer can also be grown further, in a controlled way, by thermal oxidation. The presence of a layer of silicon oxide might be necessary in order to protect the silicon support from the diffusion of platinum, when a platinum metal layer is used as a lower electrode. Lead oxide, which easily forms from lead diffusing away from the ceramic material in an oxidising environment, is highly soluble in silicon oxide. Silicon oxide and lead oxide may form a eutectic system characterised by a comparatively lower melting point with respect to silicon oxide. Temperature values above 700°C, which are common in the manufacture of MEMS devices, would cause melting of the eutectic with creation of major defects, such as voids, in the silicon oxide layer and, potentially, in the silicon substrate, thus compromising the operation of the device.

US 7,581 ,823 teaches the use of an oxide film as a barrier layer to prevent diffusion of elements when an element liable to be diffused is used in a piezoelectric layer. The oxide layer is interposed between the lower electrode and a single crystal film layer. Si0₂, YSZ, MgO, Al₂0₃, LaAI0₃, lr₂0₃, SRO and STO may be used as a material for the oxide film layer.

Hrovat et al. Journal of the European Ceramic Society 26 (2006) 897-900 describe the use of an alumina (Al₂0₃) barrier layer interposed between a substrate and a gold electrode in a PZT system, where PZT layers are formed at 800 °C. That article indicates that the Al₂0₃ barrier layer does not eliminate PbO diffusion from the PZT layer to the substrate, nor does it prevent diffusion of Si0₂ from the substrate to the PZT layer, although it provides some improvement against diffusion in comparison to no barrier layer being present whatsoever.

The detrimental effect of component depletion from the ceramic material thin film may be even stronger in the case of lead-free materials, especially those containing sodium (Na), potassium (K), and/or bismuth (Bi).

In recent years significant effort has been put into the development of lead-free alternative materials such as (K,Na)Nb0₃-based materials, (Ba,Ca)(Zr,Ti)0₃-based materials and (Bi,Na,K)Ti0₃-based materials. Na, K, and Bi contained in lead-free ceramic films are much more mobile than Pb.

Although a configuration with a patterned lower electrode is desirable, as mentioned above, the step of patterning the lower electrode, which may typically be achieved through etching, for example, exposes underlying layer(s) below the lower electrode. As a result, when the ceramic material layer is deposited onto the electrode after patterning, it will be in contact with the electrode layer and the underlying layer, such as a barrier layer. The properties of the ceramic material layer are dependent on the texture and orientation of the underlying layers, and therefore a barrier layer is needed which is also a suitable underlayer for the ceramic material thin film and which, in particular, allows the ceramic material layer to crystallise into a pure perovskite phase with good crystal orientation.

The deposition of PZT through chemical solution deposition (CSD) directly onto an alumina (Al₂0₃) layer has been found to prevent the crystallisation of pure perovskite phase and to induce, instead, the formation of an undesirable lead-deficient non- ferroelectric pyrochlore phase.

Remarkably, the present inventors found that in the case of a lead-free ceramic material, the presence of a layer of amorphous alumina interposed between the substrate and an electrical element including a lead-free thin film ceramic member is effective at preventing diffusion of mobile species from the lead-free thin film ceramic material to the substrate. Moreover, in contrast to the findings on lead-based films such as PZT, depositing the ceramic layer directly on the alumina barrier layer does not cause any disruption in the perovskite phase purity.

The present invention is thus based on specific arrangements and composition of a barrier layer that, for instance, allows the full benefits of an etched lower electrode, or other electrode configurations, to be enjoyed whilst avoiding the problems associated with diffusion from the ceramic material layer, which is particularly prevalent in lead-free systems with highly mobile species.

Summary of the invention

Accordingly, in a first aspect the present invention provides an electrical component comprising: i) a substrate layer; ii) at least one electrical element; and iii) at least one barrier layer comprising amorphous alumina, said at least one barrier layer arranged over at least a portion of the substrate layer so as to separate the substrate layer from the at least one electrical element; wherein each of the at least one electrical element comprises: a) a lead-free thin film ceramic member formed of a lead-free ceramic material having a major proportion of a perovskite phase; and b) first and second electrodes disposed adjacent the lead-free thin film ceramic member such that a potential difference may be established between the first and second electrodes, through the lead-free thin film ceramic member during operation; and wherein the electrical component is configured so that the lead-free thin film ceramic member of each of the at least one electrical element is disposed adjacent to the barrier layer over one or more regions.

In a second aspect the present invention provides an electrical component comprising: i) a substrate layer; ii) at least one electrical element; and iii) at least one barrier layer comprising amorphous alumina, said at least one barrier layer arranged over at least a portion of the substrate layer so as to separate the substrate layer from the at least one electrical element; wherein each of the at least one electrical element comprises: a) a lead-free thin film ceramic member formed of a lead-free ceramic material having a major proportion of a perovskite phase; and b) first and second electrodes disposed adjacent the lead-free thin film ceramic member such that a potential difference may be established between the first and second electrodes, through the lead-free thin film ceramic member during operation; and wherein the electrical component is configured so that at least one of the first or second electrodes of each of the at least one electrical element interposes the lead-free thin film ceramic member and the barrier layer so as to separate the barrier layer from the lead-free thin film ceramic member.

In a third aspect the present invention provides a method for preparing an electrical component in accordance with the first or second aspect of the invention, said method comprising the steps of: i) arranging the at least one barrier layer comprising amorphous alumina over the substrate layer; ii) depositing a precursor solution for the ceramic material of the lead-free thin film ceramic member on to: a) the one or more exposed regions of the barrier layer; or b) one or more exposed regions of an electrode overlying the barrier layer, by chemical solution deposition; iii) drying and pyrolysing the deposited precursor solution to form a coating; and iv) crystallising the coating to form a lead-free thin film ceramic member. As the invention is compatible with any conceivable electrode arrangement, the method also includes one or more steps of depositing first and second electrodes and, optionally, patterning at least one of the first and second electrodes. In a fourth aspect the present invention provides an actuator component for use in a droplet deposition head comprising an electrical component according to the first aspect.

In a fifth aspect the present invention provides a method of actuating an actuator component according to fourth aspect, said method comprising the step of applying an electric field to the actuator component.

In a sixth aspect the present invention provides a droplet deposition head comprising an actuator component according to the fourth aspect.

In a seventh aspect the present invention provides a droplet deposition apparatus comprising a droplet deposition head according to the sixth aspect.

Brief description of the drawings

Figure 1 is a cross-section of a first embodiment of the first aspect of the invention;

Figure 2 shows AFM images of the alumina layer, as deposited (left) and after annealing (right);

Figure 3 shows a top view (A) and cross sectional views (B), (C) and (D) of three alternative electrode arrangements of a second embodiment of the first aspect of the invention;

Figure 4 is a cross-section of an embodiment of the first aspect of the invention;

Figure 5 is a cross-section of an embodiment of the second aspect of the invention;

Figure 6 is a FE-SEM image of a platinum electrode deposited at high temperature onto an alumina layer;

Figure 7 is a TEM image of the electrical element according to the first embodiment of the first aspect of the invention;

Figure 8 shows XRD patterns collected for the electrical element shown in Figure

5;

Figure 9 is a TEM-EDS quantitative mapping (Q-map) related to the electrical element shown in Figure 5;

Figure 10 shows XRD patterns collected for an electrical element according to the second embodiment of the first aspect of the invention;

Figures 1 1A band 1 1 B show XRD patterns collected for the electrical element according to the first embodiment of the first aspect of the invention;

Figure 12 reports a TEM image and a TEM-EDS quantitative mapping (Q-map) for the same electrical element related to Figure 1 1 ; Figure 13 reports a TEM image and the TEM-EDS quantitative mapping (Q-map) for an electrical element having a PZT based ceramic thin film layer and a structure similar to the second embodiment of the first aspect of the invention; and

Figure 14 reports the XRD pattern collected for the electrical element shown in Figure 13.

Detailed description of the invention

The electrical component of the first aspect of the present invention comprises an electrical element arranged on a substrate. The electrical component is provided with at least one barrier layer comprising amorphous alumina; a lead-free thin film ceramic member formed of a lead-free ceramic material having a major proportion of a perovskite phase; first and second electrodes disposed adjacent the lead-free thin film ceramic member such that a potential difference may be established between the first and second electrode, through the lead-free thin film ceramic member during operation; and wherein the electrical component is configured so that the lead-free thin film ceramic member of each of the at least one electrical element is disposed adjacent to the barrier layer over one or more regions.

The barrier layer is arranged over at least a portion of the substrate layer, so that it separates one or more regions of the lead-free thin film ceramic member of the at least one electrical element, from the substrate. The barrier layer, according to the present invention, prevents the diffusion of volatile species from the ceramic thin film member towards the substrate. In this way, the barrier layer is useful in avoiding uncontrolled depletion of constituent mobile species from the ceramic material so that the predetermined composition of the ceramic thin film member is maintained after the crystallisation steps.

The composition of the ceramic thin film member strongly influences the performance of the electrical element and its reliability, therefore a precise control of the composition is of great importance.

Further, the barrier layer, according to the present invention, allows the growth of a lead-free ceramic thin film with a perovskite pure crystal phase, in direct contact with the barrier layer, without causing any disruption in the purity of the crystal phase. It is known that electrical elements that have a ceramic member including secondary, non- perovskite phases are capable of lower performances (for example electromechanical performances) than electrical elements whose ceramic member has pure perovskite phase. Furthermore, if a perovskite phase is present in a ceramic thin film alongside a secondary phase, upon usage, stresses arising at the interface between the two different crystal phases may induce the formation of cracks located at said interface which may, in turn, compromise the functionality of said electrical element.The barrier layer according to the present invention ensures, also, adhesion of the electric element to the substrate layer so that delamination of the electric element during use is avoided and the lifetime of the electrical component is enhanced.

The alumina comprised in the barrier layer is amorphous (i.e. non-crystalline). As used hereinforth “amorphous” may also encompass the case where alumina may include an incidental amount of crystalline phase, for example one or more crystallites as long as the presence of said crystallites does not allow the formation, at the grain boundaries, of diffusion paths for mobile species present in the thin film ceramic member. Substantial absence of crystallinity may be verified by comparison of XRD data for the amorphous alumina sample in comparison with data for different crystalline alumina forms to verify the absence of peaks associated with crystalline phases. In some instances, the amorphous alumina may contain some islands of localised crystalline structures, on such a scale that they may be revealed by TEM analysis. In these low amounts, the presence of crystalline phase would have no appreciable impact on the performance of the barrier layer.

In some embodiments, the barrier layer is arranged over the substrate layer so that the barrier layer and the substrate layer are in direct contact with each other. In other embodiments, further layers are interposed between the barrier layer and the substrate layer, for example, but not limited to vibrating plates that deform under the action of the electrical element and/or stress gradient mitigating layers. Such additional layers may comprise for example inorganic oxide or nitride layers such as silica, silicon nitride, zirconia, tantala and the like. The stress gradient mitigating layers typically comprise silicon nitride, TEOS derived silica or other material layers whose Young’s modulus is intermediate with respect to the Young modulus of the substrate and that of the barrier layer. The optional additional layers may, in some instances, be considered to form part of the substrate itself (i.e. a multi-layer substrate) or additional layers may be added to the substrate to form a modified multi-layer substrate. Any substrate configuration suitable for use in MEMS applications, and over which the barrier layer may be arranged, may be used in connection with the present application.

The thin film ceramic member is disposed adjacent to the barrier layer over one or more regions. As described herein, a particular benefit of the present invention is that the thin film ceramic member may be formed directly upon the barrier layer without any negative impact on the perovskite purity. This is in complete contrast to lead based thin film ceramic materials which suffer the formation of an unwanted pyrochlore phase when formed upon an amorphous alumina layer, negatively impacting upon the performance of the thin film ceramic member. Thus, in order to obtain the full benefit of the invention according to the first aspect, the ceramic thin film member is at least partially formed on the barrier layer and in direct contact with it.

The first and second electrodes may be deposited adjacent to the thin film ceramic member and on the same surface of the thin film ceramic member, which surface may be opposite to the surface in contact with the barrier layer, in the thin film thickness direction. In such embodiments, first and second electrodes are formed as interdigitated electrodes each preferably comprising a plurality of electrode fingers. Alternatively, said interdigitated electrodes are deposited in slots formed in the thin film ceramic member in the thickness direction so that each digit is, at least in part, surrounded by the ceramic material.

In other embodiments, the first and second electrodes are deposited as interdigitated electrodes on the barrier layer before the deposition of the thin film ceramic member. When first and second electrodes are formed as interdigitated electrodes a potential difference may be established between the first and second electrode, through the lead-free thin film ceramic member regardless of the specific arrangement or specific location, provided that the first and second electrodes are disposed adjacent to the thin film ceramic member.

In some embodiments, the lead-free thin film ceramic member has a first side and an opposing second side, the first and second sides being spaced apart in a thickness direction and the first side facing the substrate layer, wherein the first electrode is disposed adjacent to the first side of the lead-free thin film ceramic member so as to interpose the barrier layer and the lead-free thin film ceramic member; and wherein the second electrode is an upper electrode disposed adjacent to the top second side of the lead-free thin film ceramic member.

In some embodiments, the first electrode is in the form of a patterned electrode partially overlying the barrier layer, and the one or more regions where the lead-free thin film ceramic member is disposed adjacent to the barrier layer is/are where the first electrode does not overly the barrier layer. In some embodiments, the lead-free thin film ceramic member contacts the barrier layer over one or more contact regions defining a barrier layer-thin film contact area; wherein the first electrode partially overlying the barrier layer contacts the barrier layer over one or more contact regions defining a barrier layer-first electrode contact area; and wherein the barrier layer-thin film contact area is greater than the barrier layer-first electrode contact area.

In embodiments where a patterned electrode partially overlies the barrier layer, the thin film ceramic member is formed with a first side disposed adjacent to the barrier layer over one or more regions, so that the thin film ceramic member is in direct contact with the barrier layer. Said one or more regions correspond to those where the barrier layer underlying the patterned electrode is exposed (i.e. not covered by the electrode). The thin film ceramic member is also therefore in contact with the first electrode layer (or lower electrode) over one or more different regions across the interface between the thin film ceramic member and the barrier layer, specifically in those regions where the electrode layer interposes the barrier layer and the thin film ceramic member. In those embodiments the first electrode is initially deposited on the barrier layer so that the barrier layer is completely covered with the first electrode. Successively, the first electrode is patterned, for example by etching, thereby exposing one or more regions of the underlying barrier layer. As will be appreciated, patterning may result in the formation of a single shaped electrode or a number of individual first electrodes (each intended to be associated with a respective electrical element) formed on the barrier layer in determined regions, leaving the barrier layer itself exposed at other regions. Alternatively, one or more individual first electrodes are deposited in determined regions on the barrier layer through, for instance, the use of a mask.

In alternative embodiments, the lead-free thin film ceramic member interposes the first and second electrodes in a direction perpendicular to a thickness direction of the electrical element and neither the first nor second electrode interposes the barrier layer and the lead-free thin film ceramic member. In those embodiments, the first and second electrodes may be deposited on lateral external surfaces of the thin film ceramic member, opposing each other in a direction substantially perpendicular to the thickness direction.

In some embodiments, each of the at least one electrical element component is configured so that the lead-free thin film ceramic member alone provides electrical separation of the first and second electrodes, there being no further passivation layer(s) present between the first and second electrodes in addition to the lead-free thin film ceramic member.

In a second aspect of the present invention, the electrical component comprises: i) a substrate layer; ii) at least one electrical element; and iii) at least one barrier layer comprising amorphous alumina, said at least one barrier layer arranged over at least a portion of the substrate layer so as to separate the substrate layer from the at least one electrical element; wherein each of the at least one electrical element comprises: a) a lead-free thin film ceramic member formed of a lead-free ceramic material having a major proportion of a perovskite phase; and b) first and second electrodes disposed adjacent the lead-free thin film ceramic member such that a potential difference may be established between the first and second electrodes, through the lead-free thin film ceramic member during operation; and wherein the electrical component is configured so that at least one of the first or second electrodes of each of the at least one electrical element interposes the lead-free thin film ceramic member and the barrier layer so as to separate the barrier layer from the lead-free thin film ceramic member.

In some embodiments, the first electrode is deposited on the barrier layer, followed by the lead-free thin film ceramic member and the second electrode in this order in the electrical element thickness direction. The various layers may also be patterned, for instance, through etching. However, in this second aspect of the invention, forming, for instance, a patterned first electrode as part of the process does not expose one or more regions of the barrier layer which then come into contact with the thin film ceramic member once subsequently deposited. Instead, both the thin film ceramic member and the first electrode are patterned after their successive deposition on the barrier layer. The patterning may be carried out in one or more steps. For example, the thin film ceramic member may be patterned first, followed by exposed regions of the underlying first electrode in separate patterning steps. Alternatively, the thin film ceramic member and first electrode may be patterned in a single step. Where the second electrode is patterned, the second electrode may be patterned first and then exposed regions of the underlying ceramic thin film member and the first electrode are patterned together in one or more further steps.

In accordance with each of the aspects of the present invention, the ceramic material of the thin film ceramic member comprises a lead free ceramic material with a major proportion of a perovskite crystallographic phase (i.e. above 50 vol.%). Additional crystalline phases that may be present collectively represent a minor proportion of the ceramic material’s microstructure. The lattice dimensions of the dominant crystalline phase, and the physical and chemical properties of the ceramic, are continuous functions of composition. The lattice symmetry may change within said composition range by uniform distortion of the structure as the composition changes. In preferred embodiments the ceramic material comprises at least 70 vol.%, more preferably at least 80 vol.%, even more preferably at least 90 vol.%, yet more preferably at least 95 vol.% of a perovskite crystallographic phase, as determined, for example, by X-ray diffraction (XRD) measurements. Most preferably, the ceramic material is substantially homogeneous (i.e. phase pure), having only a perovskite crystalline phase.

The ceramic material may contain bismuth, sodium and/or potassium ions, and may preferably be selected from (Bio_.5Nao_.5)Ti0₃, (Bίo_.5Ko_.5)Tί0₃, Bi(Mgo_.5Tio_.5)0₃, (Ko_.5Na_0.5)Nb0₃, BiFe0₃ and solid solutions comprising combinations thereof.

The ceramic material may be a sold solution of formula (I) below:

(I): xA-yB-ZiCi-z₂C₂ wherein A is a first bismuth based perovskite component; B is a second bismuth based perovskite component; Ci and C₂ are dopant perovskite components; and wherein: x+y+z-i+z₂ = 1 ; x, y ¹ 0; (Z_! + z₂) ³ 0.

In some embodiments, A of formula (I) may be (Bi_0.5Nao_.5)Ti03 and B of formula (I) may be (Bί_0.5K_0.5)TίO₃, and preferably Ci and/or C₂ of formula (I) may be selected from SrHf0₃, SrZr0₃, Bi(Mgo ₅Tio 5)0₃, Bi(Zn_{0 5}Tio ₅)0₃, Bi(Ni_{0 5}Ti_{0 5})0₃, KNb0₃, NaNb0₃, (Ko_.5Na_0.5)Nb0₃, (Bio_.5Lio_.5)Ti0₃, (Bio_.5Nao ₅)Hf0₃ and (Bio_.5Ko_.s)Hf0₃.

In some embodiments the solid solution ceramic material of formula (I) may be selected from (Bio_.5Nao_.5)Ti0₃-(Bio ₅Ko_.5)Ti0₃ and (Bio_.5Nao_.5)Ti0₃-(Bio_.5Ko_.5)Ti0₃- Bi(Mg_0.5Tio_.5)0₃.

Alternatively, the solid solution ceramic material may have the formula (la):

(la): x(Bio 5Na₀ 5)Ti03-y(Bio 5Ko 5)Ti03-ZiSrHf03-z₂SrZrO3; wherein x+y+z_\+z₂ - 1 ; x, y ¹ 0; {z^ + z₂) > 0.

The thin film ceramic member utilised in accordance with the present invention may be provided in the form of a laminate of multiple constituent layers. As will be appreciated, such a laminate structure may be achieved in a variety of ways. For example, a multi-layer thin film laminate may be formed by means of multiple rounds of deposition and drying of precursor solution for the ceramic material, with crystallisation between each set of deposition and drying steps, or with only a single crystallisation step at the end of multiple rounds of deposition and drying. As will be appreciated, the composition of each of the layers of a multi-layer thin film ceramic member may be substantially identical. Alternatively, the composition of individual layers of a multi-layer think film ceramic member may be optimized depending on whether, for instance, one of those layers will be in contact with the barrier layer and/or an electrode in the electrical element. Thus, in such embodiments, the composition of individual layers of a multi-layer thin film ceramic material may be different.

In accordance with each of the above aspects of the present invention, the substrate layer may be a laminate of two or more layers including an uppermost layer closest to the barrier layer, said uppermost layer comprising silicon oxide or silicon nitride; and one or more lower layers comprising silicon wafer, MgO, stainless steel, glass or combinations thereof.

The first and/or second electrodes, and/or any additional electrodes that may be present, are preferably formed of platinum, iridium, iridium oxide, ruthenium or combinations thereof.

Preferably, when the first electrode is deposited on the barrier layer, the first electrode layer may have crystal grain size equal to or larger than 50 nm so that the probability of the formation of diffusion paths along the grain boundaries is low and the electrode layer itself contributes to preventing the diffusion of volatile species from the ceramic thin film. In some embodiments, the first electrode may be formed of a plurality of layers, with one or more layers optimised for contact with the thin film ceramic member and/or the barrier layer.

In a third aspect, the present invention provides a method for preparing an electrical component according to first or second aspects of the invention, said method comprising the steps of: i) arranging the at least one barrier layer comprising amorphous alumina over the substrate layer, for instance by depositing the barrier layer on to the substrate (e.g. using atomic layer deposition), or an optional intermediate layer overlying the substrate; ii) depositing a precursor solution for the ceramic material of the lead-free thin film ceramic member on to: a) one or more exposed regions of the barrier layer; or b) one or more exposed regions of an electrode overlying the barrier layer, by chemical solution deposition; iii) drying and pyrolysing the deposited precursor solution to form a coating; iv) crystallising the coating to form a lead-free thin film ceramic member.

The method may further include the step of depositing first and second electrodes so that each of the first and second electrodes is disposed adjacent to a different one of two opposing sides of the thin film ceramic member, wherein the two opposing sides of the thin film ceramic member are spaced apart in a thickness direction.

The method may include a step of depositing a first electrode on the barrier layer and may further include a step of patterning the first electrode to form a patterned first electrode and one or more exposed regions of the underlying barrier layer, before depositing the precursor solution in step ii). As will be appreciated, in this embodiment the precursor solution may be deposited over the patterned first electrode so as to be in contact with both the patterned first electrode and the exposed regions of the underlying the barrier layer.

The method may also include a step of depositing a second electrode on the surface of the thin film ceramic member that is opposite to the surface facing the barrier layer in a thickness direction.

Alternatively, the method may comprise the step of depositing the first and second electrodes as an adjacent pair of electrodes so that the first and second electrodes are both disposed adjacent to one of two opposing sides of the thin film ceramic member, wherein the two opposing sides of the thin film ceramic member are spaced apart in a thickness direction, preferably where the adjacent pair of electrodes are an interdigitated pair of electrodes.

Arranging the at least one barrier layer over the substrate in step i) may suitably be by deposition either directly on to the substrate layer, or an optional intermediate layer overlying the substrate. Any method of deposition known in the art may be used, preferably by atomic layer deposition.

The crystallisation process in step iv) may be conducted at any suitable temperature, such as from 600 °C to 800 °C, and preferably by rapid thermal processing.

In a fourth aspect the present invention provides an actuator component for use in a droplet deposition head comprising an electrical component according to the first or second aspect.

In a fifth aspect the present invention provides a method of actuating an actuator component according to forth aspect, said method comprising the step of applying an electric field to the actuator component.

In a sixth aspect the present invention provides a droplet deposition head comprising an actuator component according to the forth aspect.

Formation of the Electrical Element

Figure 1 shows a schematic of an electrical component according to a first embodiment of the first aspect of the invention. The electrical component 100 comprises a substrate layer 1 1. The material of the substrate is not particularly limited. The substrate layer may be a laminate of two or more layers. The substrate may comprise an uppermost layer which is in contact with the electrical element and may comprise silicon oxide or silicon nitride or the like. One or more lower layers may include other material layers and may include a silicon wafer or any other suitable material such as MgO, stainless steel and glass or the like.

Arranged over the substrate is an electrical element 10 and a barrier layer 12 comprising amorphous alumina so as to separate the substrate layer from the electrical element. The barrier layer may be deposited by any technique known in the art, for example atomic layer deposition (ALD), sputtering, chemical vapour deposition (CVD) and chemical solution deposition (CSD). The alumina comprised in the barrier layer is amorphous. The alumina may include an incidental amount of a crystalline phase, for example one or more crystallites, as long as the presence of said crystallites does not allow the formation of diffusion paths for mobile species present in the thin film ceramic member, at the alumina grain boundaries.

The barrier layer is deposited on the substrate preferably by ALD. A precursor such as trimethylaluminum (TMA) may be used, in the presence of ozone (0₃), while the substrate is kept at a temperature T > 200°C. Preferably alumina is deposited at 225 to 275°C, more preferably at 240 to 260°C, such as 250°C.

The alumina is successively annealed at a temperature in the range 600° to 800°C, for example at 700°C, for a period of time in the range between 30 s and 5 min, for example for 60 s, in 0₂ Following the deposition, the alumina layer is amorphous.

Figure 2 shows AFM images of the alumina layer as deposited (left) and after annealing (right). The layer after annealing has a low roughness of Rq~0.35nm and was confirmed to be amorphous. The alumina barrier layer is deposited to a thickness included in the range 1 nm to 200 nm. Thickness values below 1 nm may also bring the beneficial effects of the invention as long as the barrier layer is a continuous layer; this is dependent also on the nature of the alumina precursor and the substrate, as the person skilled in the art will be aware. Preferably the barrier layer has a thickness between 50 nm and 100 nm.

The electrical element 10 according to the present embodiment comprises a first electrode 13, disposed adjacent the bottom side of a lead-free thin film ceramic member 14. The lead-free thin film ceramic member 14 has a major proportion of a perovskite phase, as described above. A second electrode 15 is also present on the top side of the lead-free thin film ceramic member 14, which is spaced apart from the bottom side in the thickness direction of the thin film ceramic member. The electrodes 13 and 15 may be formed of any suitable material known in the art such as platinum (Pt), iridium (Ir), iridium/iridium oxide (Ir/lr0₂) and ruthenium (Ru). Alternatively, it may be made of lanthanum nickelate (LNO) or strontium ruthenate (SRO) with underlying metal layers. The electrodes 13 and 15 may be formed of the same or different materials.

The electrodes 13 and 15 may be formed using any suitable technique known in the art, such as sputtering, PVD, or ALD.

Preferably, the lower electrode 13 is a platinum (Pt) electrode. Preferably, the Pt electrode is deposited by sputtering at a temperature in the range 300°C to 700°C, more preferably in the range 450° to 650°C. Pt electrodes deposited at high temperature may achieve a large grain size, preferably in the range of from 50 to 500 nm, more preferably in the range 150 to 300 nm, and thus a lower probability of formation of diffusion paths along the grain boundaries results. Electrodes with such properties can potentially contribute to a reduction in the diffusion of mobile species present in the layers they support. In the present embodiment, the lower electrode 13 is patterned after deposition so as to overly only certain regions of the amorphous alumina barrier layer 12 (exemplified as region 1 in Figure 1 ). The regions from where the lower electrode layer has been removed are exemplified by region 2 in Figure 1. The patterning step can be carried out according to any process known in the art, for example by dry etching or wet etching. Preferably the electrode is dry etched with chlorine (Cl₂) and argon (Ar) for a suitable period of time, such as in the range from 30 seconds to 5 minutes or 1 to 3 minutes, for example 2 min, over a suitable number of cycles, such as 1 to 10 cycles or 3 to 5 cycles, for example 4 cycles. The lead-free ceramic material of the thin film ceramic member 14 is as described hereinabove and for instance, includes solid solutions of formula (I).

Preparation of ceramic thin films layers for MEMS applications typically involves chemical solution deposition using chemical solution precursors, or sputtering (e.g. RF magnetron sputtering) using solid state sintered or hot-pressed ceramic targets. Any other suitable method of preparation known in the art may also be used. The ceramic material thin film is preferably formed through chemical solution deposition.

It is well-known that Bi, Na, and K are all volatile species, particularly at process temperatures typical of perovskite crystallization. The vapour pressures of K₂0 and Na₂0 are especially high, being comparable with that of PbO. To compensate for the high volatility of certain cations, precursor solutions may be prepared with amounts of excess cations added thereto (overdoping). Such overdoping is common in CSD- prepared PZT thin films (for example, up to 20 mol%-40 mol% excess Pb²⁺ can be added, depending on solution chemistry). In a similar manner, bismuth cation precursor solutions used in connection with the present invention, as well as precursor solutions of other cations, particularly those comprising sodium and potassium, may be overdoped to an appropriate level of overdoping as may be determined by the skilled person by routine experimentation. Overdoping in order to ensure that the desired stoichiometry is achieved is believed to be beneficial to the durability/resistance to electrical conduction of the resulting films. If there is a stoichiometric imbalance, point defects, which contribute to the space charge limited current, can occur.

In order to obtain a ceramic material of the desired stoichiometry, further to the conventional practice of providing for mobile species depletion through evaporation during thermal treatments by overdoping as discussed above, it is necessary to control the diffusion through the underlying components of the electrical element. In addition, in order to achieve good performance of the electrical element, for example when used as an actuator, the crystalline quality of the ceramic is of critical importance. Therefore, a high degree of perovskite phase purity and crystal orientation must be ensured in regions where the thin film ceramic member is in contact with the barrier layer, as well as the electrodes. Both requirements may be satisfied by the electrical component of the present invention, when a lead-free ceramic is used as a ceramic material and amorphous alumina is used as an underlying barrier layer.

The present invention thus allows the full advantages of an electrical component having a patterned electrode configuration to be harnessed without any negative impact associated with reduced perovskite phase purity of the thin film ceramic member. Moreover, the presence of the amorphous alumina barrier layer also allows for control over the diffusion of ions from the ceramic material, in either patterned or unpatterned electrode configurations, even in cases where lead-free ceramic materials are used comprising particularly volatile components, as discussed hereinbefore.

Figure 3 shows an electrical element 20 of an electrical component according to a second embodiment of the first aspect of the present invention. Figure 3A is a top view of an electrical element and Figures 3B, 3C, and 3D are cross sections of alternative electrode arrangements. For the substrate 1 1 , the barrier layer 12 and the ceramic thin film 14 the same description as given for Figures 1 and 2 above applies.

In contrast to the first embodiment, the second embodiment has a different electrode arrangement. Both the first and the second electrodes are arranged as interdigitated electrodes 16 and 17 on a same side of the ceramic thin film 14. First and second interdigitated electrodes 16 and 17 may each preferably comprise a plurality of electrode fingers 16a and 17a respectively, as shown in Figure 3. The interdigitated electrodes can be made of any suitable material, as previously described for electrodes

13 and 15 of Figure 1 , and may be deposited with any suitable technique known in the art such as photolithography, electron beam epitaxy or inkjet printing. The amorphous alumina layer 12 provides an effective barrier layer against mobile species diffusion and a suitable underlayer for the growth of the thin film ceramic member and its crystallisation into perovskite phase.

In some embodiments, the interdigitated electrode fingers 16a and 17a may be deposited on the lead-free thin film ceramic member on the surface opposing the surface adjacent to the barrier layer 12, as shown in Figure 3B.

In some embodiments, the interdigitated electrode fingers 16a and 17a may be deposited in grooves formed in the thin film ceramic member 14 and opening at a surface of the thin film ceramic member 14 opposite to the surface adjacent the barrier layer 12, in the thin film ceramic member thickness direction. In those embodiments, electrode fingers 16a and 17a are, at least in part, surrounded by the ceramic material, as exemplified in Figure 3C.

In other embodiments, as shown in Figure 3D, the electrical element 30 comprises interdigitated electrodes 16 and 17 with electrode fingers 16a and 17a that may be deposited directly on the barrier layer 12, prior to the formation of the thin film ceramic member 14. The thin film ceramic material is successively deposited on both, exposed regions of the barrier layer 12 and the interdigitated electrode fingers 16a and 17a.

Figure 4 shows a third embodiment of the first aspect of the invention where the electrical element 40 comprises a thin film ceramic member 14 directly deposited onto the barrier layer 12. The thin film ceramic member 14 is successively patterned and first and second electrodes 13 and 15 are deposited on the thin film ceramic member lateral surfaces that are opposing each other in a direction substantially perpendicular to the thin film ceramic member thickness direction, as shown in Figure 4.

Figure 5 shows a cross section of an electrical element 50 according to an embodiment of the second aspect of the invention, where the thin film ceramic member

14 is not in direct contact with the barrier layer 12. Alternatively to what is described above with reference to Figure 1 , in the electric element 50 of Figure 5 the first electrode 13 may not be patterned prior to the deposition of the thin film ceramic member 14. Both the thin film ceramic member 14 and the first electrode 13 may be patterned after the deposition of the thin film ceramic member 14 and, optionally, after deposition of the second electrode 15. The patterning may be carried out either in a single step, where both the ceramic thin film member 14 and the first electrode 13 are patterned together, or in a two-step process, where the thin film ceramic member 14 is patterned first and the first electrode 13 is patterned at a successive time.

The method of manufacturing an electrical element according to either the first or the second aspect of the invention, comprises the steps of:

i) arranging the at least one barrier layer comprising amorphous alumina over the substrate layer;

ii) depositing a precursor solution for the ceramic material of the lead-free thin film ceramic member on to: a) one or more of the exposed regions of the barrier layer; or b) one or more exposed regions of the first electrode (i.e. where the first electrode overlies the barrier layer), by chemical solution deposition;

iii) drying and pyrolysing the deposited precursor solution to form a coating; and iv) crystallising the coating to form a lead-free thin film ceramic member.

The method may comprise the step of depositing first and second electrodes so that each of them is adjacent to one side of the thin film ceramic member and the two sides of the thin film ceramic member each adjacent to the first or second electrode are spaced apart in a thickness direction. In certain embodiments the method may further include the steps of depositing a first electrode on the barrier layer, optionally patterning the first electrode in order to form a patterned first electrode and one or more exposed regions of the underlying barrier layer before depositing the precursor solution in step ii), and may further include depositing a second electrode on to the lead-free thin film ceramic member. An upper electrode may be deposited by dc magnetron sputtering to complete the parallel plate capacitor structure.

Alternatively, the method may comprise the step of depositing first and second electrodes as an adjacent pair (for example, an interdigitated pair of electrodes) so that the first and second electrodes are both adjacent to one side of the lead-free thin film ceramic member. Thus, the first and second electrodes when adjacent may be deposited either between steps i) and ii), so as to be located between the barrier layer and the ceramic thin film, or after step iv), so as to be on top of the lead-free thin film ceramic member.

The barrier layer may be deposited on to the substrate layer, or an intermediate layer overlying the substrate layer, by using any suitable method known in the art. For example the barrier layer may be deposited by chemical solution deposition (CSD), sputtering or chemical vapour deposition (CVD). Preferably the barrier layer is deposited by atomic layer deposition (ALD). Preferably, the barrier layer is then annealed at a temperature in the range of from 450°C-850°C, preferably 650 °C to 750 °C, and more preferably 675 ⁰ C to 725 °C, in order to remove impurities and to densify the layer. For example the barrier layer is annealed at 700°C.

The thin film ceramic member may be deposited by chemical solution deposition (CSD), for example by sol-gel deposition. One or more precursor solutions are prepared from precursor compounds of all the elements included in the ceramic thin film layer. The solution is prepared taking into account the stoichiometry of the final material to be obtained together with a suitable excess amount of the mobile species to compensate for species evaporation.

A precursor solution is deposited on a substrate by any suitable means of which the skilled person is aware. Such means include dip- or spin-coating, preferably spin coating, which are commonly utilised in chemical solution deposition processes.

Spin-coating typically involves the use of a spin-coat apparatus in which a substrate may be secured and spun in the proximity of a dispenser from which the precursor solution may be dispensed onto the substrate whilst being spun or shortly before spinning commences. Rotation of the substrate typically occurs at a rate of from 2000 rotations per minute (rpm) to 4000 rpm, preferably from 2500 rpm to 3500 rpm, more preferably from 2750 rpm to 3250 rpm, for example 3000 rpm.

Typically, deposition and rotation where spin-coating is employed, or immersion and withdrawal where dip-coating is used, is conducted so as to provide a coating layer having a thickness of from 10 nm to 500 nm, preferably from 15 to 200 nm, more preferably from 20 to 100 nm. As discussed in more detail below, multiple layers may be deposited so as to form a film having a multi-layer laminate structure. For example, the laminate may suitably include at least 2 layers and preferably less than 50 layers. In other examples, the laminate may comprise from 2 layers to 20 layers, from 2 layers to 10 layers, or from 2 layers to 5 layers.

It will be appreciated that the thickness of the coating layer depends on the deposition process, such as spin speed for spin-coating or withdrawal speed for dip coating, as well as the viscosity and solid content of the precursor solution. The duration and/or speed over which rotation is typically conducted relates to the desired thickness of the coating layer; higher rotation speed values resulting in thinner coating layers. Suitable time periods over which rotation is conducted during spin-coating is from 10 seconds to 200 seconds, preferably from 15 seconds to 90 seconds, more preferably from 15 seconds to 45 seconds.

Each additional layer of the multi-layer laminate is formed directly on the previously deposited layer with no intervening layers therebetween, provided that the previously deposited layer has undergone at least drying and pyrolysis, and in some cases also crystallization, as discussed in more detail below. Alternatively, the thin film may be formed from only a single deposited layer having a sufficient thickness. The final thickness of the thin film may suitably be in the range of from 0.3 pm to 5 pm, preferably in the range of from 0.5 pm to 3 pm.

Following deposition of the precursor solution, forming of the thin film typically involves drying to remove the solvent of the precursor solution and pyrolysing to cause reaction of the precursor compounds so as to form an amorphous layer comprising the ceramic material. The crystallization step subsequently transforms the amorphous layer into a thin film comprising a major proportion of the perovskite phase, preferably at least 90 vol.% of the perovskite phase, more preferably at least 95 vol.% of the perovskite phase, even more preferably at least 98 vol.% of the perovskite phase, and most preferably 100 vol.% of the perovskite phase. As will be appreciated, drying and pyrolysing may be carried out in a single step, or as distinct sub-steps in the method of the invention. Thereafter, crystallization of the precursor layer is effected by heating to a crystallisation temperature.

The conditions for drying and pyrolysing are not particularly limited so far as there is no negative impact on the morphology and/or porosity of the resulting amorphous coating layer or no significant decomposition of the materials at high temperature. Generally, the minimum temperature for drying is dictated by the lowest boiling point of solvent that is present in the precursor solution. Similarly, the minimum temperature for the pyrolysis step is dependent upon the precursor having the lowest pyrolysis temperature. Suitable temperatures over which drying may be conducted are from 60 °C to 250 °C, preferably from 100°C to 200°C, and suitably over a time period of from 1 to 5 minutes, preferably from 2 to 3 minutes. Suitable temperatures over which pyrolysis may be conducted are from 150°C and 500°C, preferably from 250°C to 450°C, more preferably from 300°C to 375°C, and suitably over a time period of from 1 to 10 minutes, preferably 2 minutes to 8 minutes, more preferably from 3 to 5 minutes.

The crystallisation temperature used in accordance with the method of the present invention is suitably from 600°C to 800°C. In particularly preferred embodiments, the crystallisation temperature is within a range from 650 °C to 750 °C, preferably from 675 °C to 725 °C, for example 700 °C. The crystallisation step may be conducted by rapid thermal processing (RTP) or any other methodology known in the art, for example through use of an oven or a hot plate. RTP is a preferred process.

The ramp rate at which the temperature of the coated substrate is increased to the crystallisation temperature may range from 70 to 150 °C/s. In particularly preferred embodiments, the ramp rate ranges from 75 to 125 °C/s, more preferably from 85 to 115 °C/s, even more preferably from 90 to 1 10 °C/s, and most preferably from 95 to 105 °C/s.

The temperature of the coated substrate may be elevated and held at a hold temperature (typically below 375 °C) before heating to the crystallisation temperature using RTP is undertaken. For example, the coated substrate may be heated to an initial hold temperature of from 150 and 250 °C, preferably from 175 and 225 °C, most preferably from 190 to 210 °C, where the elevated temperature is held, for instance, from 30 seconds to 5 minutes, before further heating is commenced to ramp the temperature up to the crystallisation temperature at the desired ramp rate.

Heating of the coated substrate by RTP may be at least partially conducted in the presence of oxygen over the course of heating. Generally, an oxygen-containing gas may suitably be provided during the crystallisation step at a volumetric flow rate of from 0.1 to 12 standard litres per minute (SLPM). However, in particularly preferred embodiments, the volumetric flow rate of oxygen-containing gas may range from 1 to 4 SLPM, more preferably from 1.5 to 3 SLPM, most preferably from 1.75 to 2.25 SLPM, for example 2.0 SLPM. The oxygen-containing gas may consist essentially, or preferably consist, of oxygen, or may contain oxygen together with only inert diluents such as nitrogen or argon gases. In some embodiments, the oxygen-containing gas may comprise oxygen in an amount of at least 50 vol.%, at least 60 vol.%, at least 70 vol.%, at least 80 vol.% or at least 90 vol.%. In particularly preferred embodiments, the oxygen- containing gas may comprise oxygen in an amount of at least 98 vol.%, more preferably at least 99 vol.%, most preferably at least 99.9 vol.%. In other embodiments, the oxygen- containing gas may be air. In still further embodiments, the oxygen-containing gas may comprise water vapour and ozone.

Once the crystallisation temperature has been reached using RTP, this temperature may be maintained for a period of time (i.e. a “hold time”), which may suitably range from 1 to 15 minutes. In preferred embodiments, the crystallisation temperature is held for 2 to 10 minutes, more preferably for 4 to 6 minutes. In some embodiments, as part of method for preparing an electrical component in accordance with first or second aspects of the present invention, steps ii) and iii) above may be performed a plurality of times: . Following performance of steps ii) and iii) for a desired number of cycles, step iv) is subsequently performed: iv) crystallising the coating, for instance by rapid thermal processing, to form a film of the ceramic material. In this manner, a thin film ceramic member may be formed which is a laminate of multiple layers. Crystallisation in step iv) may be conducted after several rounds of deposition and drying and pyrolising according to steps ii) and iii), or crystallisation may be conducted after each round of deposition and drying and pyrolising according to steps ii) and iii),

In a further aspect, the present invention also provides an actuator component for use in a droplet deposition apparatus comprising an electrical component as described hereinbefore. The present invention, in yet a further aspect, also provides a droplet deposition apparatus comprising such an actuator component. Droplet deposition apparatuses have widespread usage in both traditional printing applications, such as inkjet printing, as well as in 3D printing and other materials deposition or rapid prototyping techniques.

Accordingly, in a related aspect, there is also provided a method of actuating the actuator component, said method comprising the step of applying an electric field to the actuator component.

An actuator component suitable for use in a droplet deposition apparatus may, for instance, comprise a plurality of fluid chambers, which may be arranged in one or more rows, each chamber being provided with a respective actuator element and a nozzle. The actuating element is actuable to cause the ejection of fluid from a chamber of the plurality through a corresponding one of the nozzles. The actuating element is typically provided with at least first and second actuation electrodes configured to apply an electric field to the actuating element, which is thereby deformed, thus causing droplet ejection. Additional layers may also be present, including insulating, semi-conducting, conducting, and/or passivation layers. Such layers may be provided using any suitable fabrication technique such as, for example, a deposition/machining technique, e.g. sputtering, CVD, PECVD, MOCVD, ALD, laser ablation etc. Furthermore, any suitable patterning technique may be used as required, such as photolithographic techniques (e.g. providing a mask during sputtering and/or etching).

The actuating element may, for example, function by deforming a wall bounding one of the fluid chambers of the actuator component. Such deformation may in turn increase the pressure of the fluid within the chamber and thereby cause the ejection of droplets of fluid from the nozzle. Such a wall may be in the form of a membrane layer which may comprise any suitable material, such as, for example, a metal, an alloy, a dielectric material and/or a semiconductor material. Examples of suitable materials include silicon nitride (Si₃N₄), silicon oxide (Si0₂), aluminium oxide (Al₂0₃), titanium oxide (Ti0₂), silicon (Si) or silicon carbide (SiC).

The droplet deposition apparatus typically comprises a droplet deposition head comprising the actuator component and one or more manifold components that are attached to the actuator component. Such droplet deposition heads may, in addition, or instead, include drive circuitry that is electrically connected to the actuating elements, for example by means of electrical traces provided by the actuator component. Such drive circuitry may supply drive voltage signals to the actuating elements that cause the ejection of droplets from a selected group of fluid chambers, with the selected group changing with changes in input data received by the head.

To meet the material needs of diverse applications, a wide variety of alternative fluids may be deposited by droplet deposition heads as described herein. For instance, a droplet deposition head may eject droplets of ink that may travel to a sheet of paper or card, or to other receiving media, such as textile or foil or shaped articles (e g. cans, bottles etc.), to form an image, as is the case in inkjet printing applications, where the droplet deposition head may be an inkjet printhead or, more particularly, a drop-on- demand inkjet printhead.

Alternatively, droplets of fluid may be used to build structures, for example electrically active fluids may be deposited onto receiving media such as a circuit board so as to enable prototyping of electrical devices. In another example, polymer containing fluids or molten polymer may be deposited in successive layers so as to produce a prototype model of an object (as in 3D printing). In still other applications, droplet deposition heads might be adapted to deposit droplets of solution containing biological or chemical material onto a receiving medium such as a microarray.

Droplet deposition heads suitable for such alternative fluids may be generally similar in construction to printheads, with some adaptations made to handle the specific fluid in question. Droplet deposition heads which may be employed include drop-on- demand droplet deposition heads. In such heads, the pattern of droplets ejected varies in dependence upon the input data provided to the head.

The present invention will now be described by reference to the following Examples, which are intended to be illustrative of the invention and in no way limiting. Example 1

Manufacture of the electrical element:

On a silicon substrate, alumina (Al₂0₃) is deposited by atomic layer deposition (ALD) at 250°C to a thickness of 80 nm. Trimethylaluminum (TMA) was used as precursor, in the presence of ozone (0₃), while the substrate was kept at a temperature of 250°C. The alumina layer was then annealed at 700°C in 0₂ in order to further densify the layer and to remove impurities. After annealing, the alumina layer was found amorphous as confirmed by TEM and XRD. Its roughness was very low as shown in Figure 2 (Rq = 0.40 nm as deposited and Rq = 0.35 nm after anneal at 700°C).

A platinum first electrode was deposited on to the alumina layer by RF- magnetron sputtering at 500°C. Micrographs were acquired by field emission scanning electron microscopy (FE-SEM) (Merlin, Leo, and Sigma - ZEISS Microscopy) operating at accelerating voltages of 5 kV. Figure 6 shows an FE-SEM image of such a Pt layer deposited onto alumina. The grain size in this image is on average 200 nm.

The adhesion of the Pt first electrode to the substrate provided by ALD-deposited alumina was confirmed to be suitable for requirements imposed by applications where the layer may be used as part of an actuator: the Pt film did not peel off in initial adhesion tape test using kapton tape.

The Pt electrode was then patterned by dry etching in the presence of Cl₂ and Ar for 2 min, in four cycles of 30 s. A peel test confirmed that the adhesion of the Pt electrode was not affected by the etching process.

After this, a bismuth-based lead-free ceramic material was deposited through chemical solution deposition (CSD) onto the Pt electrode. A Bi_{0 5}(Na_{0 8}K_{0 2})o ₅Ti0₃ (BB) thin film was deposited according to the following conditions: Bismuth (III) acetate (99.9999%, Alpha Aesar) was dissolved in propionic acid. Sodium (I) acetate trihydrate (99%, Macron) and potassium (I) acetate (99%, Macron) were dissolved in methanol. Optimized molar excesses of 6 mol% Bi and 12 mol% each of Na and K were used to compensate for the volatility of the cations during crystallization. Titanium isopropoxide was stabilized by mixing with propionic acid and acetic acid, in an atmosphere controlled glove box. The bismuth was added to the Ti solution first and stirred for 1 h, before adding the Na and K solution. The resulting solution was approximately 0.5 mol/L. The substrate was heated at 300°C for 1 minute prior to coating. The film was spin-cast on sputtered platinized silicon substrates at 3000 rpm for 30 s. Each layer (3 in total) was pyrolyzed at 300°C for 4 min and crystallized at 700 C for 5 min via Rapid Thermal Processing (RTP). The heating rate was 100 C/sec and 2 SLPM of 0₂ was flowed during processing.

Adhesion of Pt electrode to the substrate was good after the ceramic thin film deposition as measured by a further peel test of (kapton) tape adhered to the ceramic layer. X-ray diffraction patterns were collected on a Bruker D8 Discover theta-theta instrument. Cu Ka radiation was utilized (l = 1 .542 A). Scans were completed with a step size of 0.05°, typically from 10-90°. The alumina layer was confirmed to be amorphous after ceramic thin film deposition and crystallisation by XRD and transmission electron microscopy (TEM) analyses.

Transmission electron microscopy was used to analyse the electrical element further, using a Talos F200X TEM manufactured by FEI. Figure 7 shows a transmission electron microscope (TEM) image of a cross section through the electric element according to the present embodiment of the invention.

The diffusion of elements through the layers of the electrical element on the substrate was measured using a SuperX EDS (energy-dispersive spectroscopy) system under scanning transmission electron microscopy (EDS-TEM) mode on the Talos F200X TEM. The TEM specimens were prepared by in situ milling and coupon lift-out procedure in a FEI Helios NanoLab DualBeam 660 focused ion beam (FIB).

Elemental analysis in the form a quantitative mapping (Q-map) of the results is shown in Figure 8 and clearly shows that there was no detectable diffusion of mobile species from the ceramic thin film towards the substrate. In order to remove/minimise the background noise and effect of multiple characteristic X-rays of heavy element signals (like the signal characteristic of Pt which can overlap with energy level of other elements) quantitative mapping (Q-map) is used for elemental mapping. In the Q-map process by Bruker Esprit software, background fitting and a specific energy level for each element are used. The bright spots above the film in the Na image (same for K image) indicate the contamination during a sample preparation by FIB because Au film was deposited onto the film surface before FIB cross-sectioning.

X-ray diffraction (XRD) patterns in Figure 9 show the characteristic peaks of the perovskite phase of the ceramic thin film corresponding to both regions 1 and 2 of Figure 1.

Example 2

In a second example, in order to study the barrier function of the alumina layer a lead-free thin film ceramic member (BB) was deposited on the alumina layer according to the same methodology described for Example 1 . Differently to Example 1 , in Example 2 no electrodes were formed on the alumina layer, nor on any sides of the thin film ceramic element. XRD analysis results reported in Figure 10 show the characteristic peaks of the perovskite phase with minor incidence of secondary phases indicated by asterisks. The secondary phase might be a form of bismuth titanate, likely Bii₂Ti0₂o or Bi₄Ti₃0i₂. These results confirm that it is possible to grow a lead free thin film ceramic member characterised by a major proportion of perovskite phase, on the barrier layer formed of amorphous alumina.

Comparative Example 1

An electrical element was prepared substantially in the same way as described in Example 1. Differently from Example 1 , the ceramic thin film in the present case is made of a 2 at.% Nb- doped PZT-material (PNZT).

PNZT was deposited on etched Pt/Al₂0₃/Si0₂/Si according to the following conditions: A 15 wt.% PNZT solution (P/N/Z/T - 1 15/2/52/48) was spin coated onto the substrate at 3500 rpm for 45 seconds with a dynamic dispense at 500 rpm. After spin coating, films were dried at 100 °C for 1 minute and pyrolyzed at 300 °C for 4 minutes. Finally, samples were crystallised in a rapid thermal annealer (RTA) at 700 °C for 1 minute under 2 SLPM of 02 flow, with a heating rate of 10 °C/s. XRD patterns shown in Figures 1 1A and 1 1 B indicate that it is possible to grow a PZT-based thin film ceramic member characterised by a major proportion of perovskite phase in both a region where the thin film ceramic member is adjacent to the Pt electrode and a region where thin film ceramic member is adjacent to the barrier layer (regions 1 and 2 in Figure 1 , respectively).

On the other hand, Figure 12, which is the Q-map of this sample, shows a significant diffusion of Pb from the thin film ceramic member through the alumina layer in the region where thin film ceramic member is adjacent to the alumina layer and the Pt electrode is not interposed between the alumina layer and the thin film ceramic member (region 2 in Figure 1 ). These data confirm that the alumina layer as such does not provide a barrier to the diffusion of mobile species from the thin film ceramic member towards the substrate when the thin film ceramic member is formed of PZT-based materials.

Comparative Example 2

A PNZT thin film ceramic element was deposited, according to the methodology described for Comparative Example 1 , adjacent to the alumina layer, as described for Example 2. No electrode was formed on the alumina layer, nor on any side of the thin film ceramic element. Elemental analysis results from EDS-TEM measurements reported in Figure 13 show that Pb diffuses from the ceramic thin film through the alumina layer. A further undesirable effect of this electrical element, according to XRD analysis results reported in Figure 14 is a very poor crystallisation of the ceramic thin film, as shown by weak and broad peaks, with formation of the undesired pyrochlore phase indicated by peaks labelled with a diamond shape.

Summary

Table 1 below shows a summary of the outcome of the experiments described above. As can be clearly appreciated, electrical elements with controlled composition (i.e. without volatile species depletion) and with pure perovskite phase of the thin film ceramic member can be obtained through the present invention when a barrier layer including amorphous alumina is deposited on the substrate prior to the deposition of the thin film ceramic member. This is particularly effective when the thin film ceramic member comprises a lead-free ceramic material. The functions of the alumina layer as a barrier against the diffusion of volatile species from the thin film ceramic member towards the substrate and as a base for the growth of thin film members with pure perovskite phase, are strictly material dependent.

Lead based materials such as PZTs have been shown to experience lead depletion through diffusion whenever a metal electrode is not interposed between the alumina layer and the PZT thin film. Moreover, crystallisation of a PZT pure perovskite phase is not possible when the ceramic material is deposited on the alumina barrier layer. On the contrary, both the benefits of the present invention can be achieved when the ceramic thin film member comprises a lead-free ceramic material, making the electrode configuration no longer a limiting factor for the manufacture of electrical elements.

Table 1

Claims

1. An electrical component comprising: i) a substrate layer;

ii) at least one electrical element; and

iii) at least one barrier layer comprising amorphous alumina, said at least one barrier layer arranged over at least a portion of the substrate layer so as to separate the substrate layer from the at least one electrical element;

wherein each of the at least one electrical element comprises: a) a lead-free thin film ceramic member formed of a lead-free ceramic material having a major proportion of a perovskite phase; and b) first and second electrodes disposed adjacent the lead-free thin film ceramic member such that a potential difference may be established between the first and second electrodes, through the lead-free thin film ceramic member during operation; and wherein the electrical component is configured so that the lead-free thin film ceramic member of each of the at least one electrical element is disposed adjacent to the barrier layer over one or more regions.

2. The electrical component according to Claim 1 , wherein the first and second electrodes of the at least one electrical element are interdigitated electrodes, and preferably wherein the first and second interdigitated electrodes each comprises a plurality of electrode fingers.

3. The electrical component according to Claim 1 , wherein the lead-free thin film ceramic member has a first side and an opposing second side, the first and second sides being spaced apart in a thickness direction and the first side facing the substrate layer; wherein the first electrode is disposed adjacent to the first side of the lead-free thin film ceramic member so as to interpose the barrier layer and the lead-free thin film ceramic member; and wherein the second electrode is disposed adjacent to the second side of the lead-free thin film ceramic member.

4. The electrical component according to Claim 3, wherein the first electrode is in the form of a patterned electrode partially overlying the barrier layer, and the one or more regions where the lead-free thin film ceramic member is disposed adjacent to the barrier layer is/are where the first electrode does not overly the barrier layer.

5. The electrical component according Claim 4, wherein the lead-free thin film ceramic member contacts the barrier layer over one or more contact regions defining a barrier layer-thin film contact area; wherein the first electrode partially overlying the barrier layer contacts the barrier layer over one or more contact regions defining a barrier layer-first electrode contact area; and wherein the barrier layer-thin film contact area is greater than the barrier layer-first electrode contact area.

6. The electrical component according to Claim 1 , wherein the lead-free thin film ceramic member interposes the first and second electrodes in a direction perpendicular to a thickness direction of the electrical element and neither the first nor second electrode interposes the barrier layer and the lead-free thin film ceramic member.

7. The electrical component according to any one of Claims 3 to 6, wherein each of the at least one electrical element is configured so that the lead-free thin film ceramic member alone provides electrical separation of the first and second electrodes, there being no further passivation layer(s) present between the first and second electrodes in addition to the lead-free thin film ceramic member.

8. An electrical component comprising:

i) a substrate layer;

ii) at least one electrical element; and

wherein each of the at least one electrical element comprises: a) a lead-free thin film ceramic member formed of a lead-free ceramic material having a major proportion of a perovskite phase; and b) first and second electrodes disposed adjacent the lead-free thin film ceramic member such that a potential difference may be established between the first and second electrodes, through the lead-free thin film ceramic member during operation; and wherein the electrical component is configured so that at least one of the first or second electrodes of each of the at least one electrical element interposes the lead-free thin film ceramic member and the barrier layer so as to separate the barrier layer from the lead-free thin film ceramic member.

9. The electrical component according to any one of the preceding claims, wherein the ceramic material contains bismuth, sodium and/or potassium ions, preferably wherein the ceramic material is selected from (Bi_0.5Na_0.5)TiO3, (Bio ₅Ko ₅)Ti0₃, Bi(Mgo ₅Tio ₅)0₃, (K_{0 5}Nao ₅)Nb0_3, BiFe0₃ and solid solutions comprising combinations thereof.

10. The electrical component according to any one of Claims 1 to 9, wherein the ceramic material is a sold solution of formula (I) below:

(I): xA-yB-ZiCi-z₂C₂ wherein A is a first bismuth based perovskite component; B is a second bismuth based perovskite component; Ci and C₂ are dopant perovskite components; and wherein: x+y+z_!+z₂ = 1 ; x, y ¹ 0; ( + z₂) > 0.

1 1 . The electrical component according to Claim 10, wherein A of formula (I) is (Bi_0.5Na_0.5)TiO₃ and B of formula (I) is (Bί₀ 5K_0.5)TίO₃, and preferably wherein Ci and/or C₂ of formula (I) are selected from SrHf0₃, SrZr0₃, Bi(Mg_0.5Ti_0.5)O₃, Bi(Zn_{0 5}Tio ₅)0₃, Bi(Nio ₅Tio ₅)0₃, KNb0₃, NaNb0₃, (Ko ₅Nao ₅)Nb0₃, (Bio_.5Lio_.5)Ti0₃, (Bio_.5Na_0.5)Hf0₃ and (Bio_.5Ko_.5)Hf0₃.

12. The electrical component according to Claim 1 1 , wherein the solid solution ceramic material of formula (I) is selected from (Bio ₅Nao_.5)Ti0₃-(Bio_.5Ko_.5)Ti0₃ and (Bio 5Nao_.5)Ti0₃-(Bio_.5Ko_.5)Ti0₃-Bi(Mgo_.5Tio_.5)0₃.

13. The electrical component according to Claim 10 or Claim 1 1 , wherein the solid solution ceramic material has the formula (la):

(la): x(Bio 5Nao.₅)Ti0₃-y(Bio.5Ko.5)Ti0₃-ZiSrHf0₃-z₂SrZr0_3; wherein x+y+Z_!+z₂ = 1 ; x, y ¹ 0; (åi + z₂) > 0.

14. The electrical component according to any one of the preceding claims, wherein the substrate layer is a laminate of two or more layers including an uppermost layer closest to the barrier layer, said uppermost layer comprising silicon oxide or silicon nitride; and one or more lower layers comprising silicon wafer.

15. The electrical component according to any one of the preceding claims, wherein the first and/or second electrodes, and/or any additional electrodes that may be present, are formed of platinum, iridium, iridium oxide, ruthenium or combinations thereof.

16. A method for preparing the electrical component of Claim 1 or Claim 7, said method comprising the steps of:

ii) depositing a precursor solution for the ceramic material of the lead- free thin film ceramic member on to: a) one or more of the exposed regions of the barrier layer; or b) one or more exposed regions of an electrode overlying the barrier layer, by chemical solution deposition; iii) drying and pyrolysing the deposited precursor solution to form a

coating; and

iv) crystallising the coating to form a lead-free thin film ceramic member..

17. A method according to Claim 16, comprising depositing first and second electrodes so that each of the first and second electrodes is disposed adjacent to a different one of two opposing sides of the thin film ceramic member, wherein the two opposing sides of the thin film ceramic member are spaced apart in a thickness direction.

18. A method according to Claim 16 or Claim 17, wherein the method comprises depositing the first electrode on to the barrier layer and patterning the first electrode in order to form a patterned first electrode and one or more exposed regions of the underlying barrier layer before depositing the precursor solution in step iii).

19. A method according to Claim 16, wherein the method comprises depositing the first and second electrodes as an adjacent pair of electrodes so that the first and second electrodes are both disposed adjacent to one of two opposing sides of the thin film ceramic member, wherein the two opposing sides of the thin film ceramic member are spaced apart in a thickness direction, preferably where the adjacent pair of electrodes are an interdigitated pair of electrodes.

20. A method according to any one of Claims 16 to 19, wherein arranging the at least one barrier layer over the substrate in step i) comprises deposition of the at least one barrier layer by atomic layer deposition.

21 . A method according to any one of Claims 16 to 20, wherein crystallisation in step iv) is conducted at a temperature of from 600 °C to 800 °C, preferably by rapid thermal processing.

22. An actuator component for use in a droplet deposition apparatus comprising an electrical component according to any one of Claims 1 to 15.

23. A method of actuating an actuator component according to Claim 22, said method comprising the step of applying an electric field to the actuator component.

24. A droplet deposition head comprising an actuator component according to Claim 22.

25. A droplet deposition apparatus comprising a droplet deposition head according to Claim 24.