WO2020029418A1 - Procédé de construction d'une matrice génératrice de code binaire de réparation et procédé de réparation - Google Patents

Procédé de construction d'une matrice génératrice de code binaire de réparation et procédé de réparation Download PDF

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WO2020029418A1
WO2020029418A1 PCT/CN2018/110067 CN2018110067W WO2020029418A1 WO 2020029418 A1 WO2020029418 A1 WO 2020029418A1 CN 2018110067 W CN2018110067 W CN 2018110067W WO 2020029418 A1 WO2020029418 A1 WO 2020029418A1
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bits
repair
column
binary code
matrix
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PCT/CN2018/110067
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English (en)
Chinese (zh)
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侯韩旭
韩永祥
李挥
周清峰
李勇
周丰丰
范立生
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东莞理工学院
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/154Error and erasure correction, e.g. by using the error and erasure locator or Forney polynomial

Definitions

  • the invention belongs to the field of digital processing technology improvement, and particularly relates to a method for repairing a binary code generation matrix construction method and a repair method.
  • Binary Maximum Distance Separable (MDS) array coding is a special erasure code that can achieve minimal storage redundancy and low computation Complexity tolerance.
  • the binary array code consists of k + r columns, each of which has L bits.
  • k information columns store information bits r parity columns store redundant bits.
  • Each The L bits in the columns are all stored in the same storage node. We use the disk as a column or a storage node and an entry in the array as a bit.
  • MDS code When a node fails, the corresponding column of the array code is considered Is an erasure if any k in the k + r column can reconstruct all k information columns (ie: it can tolerate any column where r fails), such an encoding is called an MDS code.
  • the faulty node When a node fails in a distributed storage system, the faulty node should be repaired by downloading fragments from the d healthy node, where k ⁇ d ⁇ k + r-1. Minimizing the repair bandwidth is defined as downloading during the repair process The number of bits is crucial for speeding up the repair operation and minimizing the window of vulnerabilities, especially in distributed storage, where network transmission is the bottleneck.
  • the repair problem is formulated by Dimakis et al. [8] based on the concept of information flow graphs
  • the minimum repair bandwidth of the minimum storage redundancy is stated in [8], also known as the minimum storage regeneration (MSR) point, which is expressed by the following formula:
  • a traditional method is to download all the bits from any surviving column to regenerate the bits in the faulty column. Therefore, the total number of bits used to repair the faulty column is k times the number of faulty bits.
  • this paper proposes a new method for designing binary MDS array coding by selecting a suitable generator matrix. This method can tolerate r ⁇ 3 disk failures. We show that when d is large enough, the minimum repair bandwidth (1) for any single information column failure can be achieved progressively. By using the quotient loop of the loop structure and choosing a carefully designed coding matrix, our structure minimizes the repair Bandwidth so that bits accessed during the repair operation cross as much as possible.
  • the repair bandwidth of most existing binary MDS array codes [2], [3], [5], [6] is suboptimal.
  • the proposed code is the first binary MDS array code, which has a progressive optimal repair bandwidth and has a fault tolerance of greater than 2.
  • the key differences between the proposed code and existing binary MDS array codes are as follows. First, with existing structures, such as [2], [3], [5], [6], the redundant bits in the check column (except the first check column) are specified by the array The correspondence of polygonal lines is generated. Secondly, in the proposed code, the number of rows of the array is an exponential function of k.
  • An object of the present invention is to provide a method for constructing a repair binary code generation matrix and a repair method, which aim to solve the above technical problems.
  • the present invention is implemented as such, a method for constructing a repair binary code generation matrix
  • the index of the element of the i-th row and j-th column in (2: ⁇ ) is a multiple of ⁇ i-1 of the j-th column of the first row, where
  • a further technical solution of the present invention is that the extra bits calculated for the information bits in the repair binary code generating matrix construction method do not need to be stored and are used to calculate redundant bits.
  • Another object of the present invention is to provide a repair method for repairing a binary code generation matrix.
  • the repair method for repairing a binary code generation matrix includes: The first check column Each check set is defined as follows Where 2 ⁇ j ⁇ d-k + 1,
  • a further technical solution of the present invention is: And Bit Checksum set that can be the first checksum Repair, need to download (p-1) ⁇ k-3 bits respectively from the remaining k-1 information columns Where i ⁇ ⁇ 1, 2, ..., f-1, f + 1, ..., k ⁇ and And download (p-1) ⁇ k-3 redundant bits from the first check column A total of (p-1) ⁇ k-3 bits need to be downloaded.
  • a further technical solution of the present invention is that the parity check set of the first parity check column in the repairing method for repairing a binary code generation matrix is the same as the first parity column of the RDP and the even parity.
  • a further technical solution of the present invention is that the parity bits of other parity columns in the repair method for repairing a binary code generation matrix are not bits corresponding to a straight line in the array, but bits corresponding to a polygon line,
  • the number of lines in the proposed encoding can be divisible by ⁇ k-2 .
  • the beneficial effect of the invention is that the product matrix structure of the regenerative code still works under the quotient ring, the calculation complexity is low, and the repair bandwidth is reduced with a greater fault tolerance.
  • FIG. 1 is a diagram illustrating an example of storage encoding of three check columns according to an embodiment of the present invention.
  • k information polynomials and r coded polynomials as row vectors as follows
  • the proposed coding can be described as a check matrix H (k + r) ⁇ r .
  • R p ⁇ represent the ring
  • h (x) is called a check polynomial in C p ⁇ .
  • Theorem 1 satisfies (2) if and only if the coefficient si (x) of the polynomial is in C p ⁇ .
  • Lemma 2 Rings R p ⁇ and Are isomorphic.
  • mapping ⁇ is a ring homomorphism and bijection because it has an inverse function ⁇ (a (x), b (x)), where
  • Lemma 3 Ring C p ⁇ and Are isomorphic.
  • the encoding process can be described by the following polynomial operation. Given k (p-1) ⁇ information bits, by (3), add ⁇ extra bits for each (p-1) ⁇ information bits and form C p ⁇ K data polynomials. After obtaining a vector (4) by selecting a specific encoding matrix or check matrix, store the coefficients in the polynomial from 0 to (p-1) ⁇ -1, and store The target coefficients are discarded.
  • the proposed array code can be regarded as a systematic linear code on C p ⁇ .
  • Figure 1 shows an example of storage encoding for the three check columns.
  • the bits in the solid line frame are used to repair the information bits s 0,1 , s 2,1 , s 4,1 , s 6,1.
  • the bits in the dashed box are used to repair the information bits s 1,1 , s 3,1 , s 5,1 , s 7,1 .
  • the encoding matrix for this example is:
  • Example 1 is illustrated in Figure 1. Note that the extra bits calculated from the information bits need not be stored and are used to calculate redundant bits.
  • the first column is erased to access the information bits s 0,2 , s 0,3 , s 0,4 and the redundant bits s 0,1 + s 0,2 + s 0,3 + s 0,4 , And reconstruct s 0,1 by s 0,2 + s 0,3 + s 0,4 + (s 0,1 + s 0,2 + s 0,3 + s 0,4 ).
  • s 0, 1 s 0, 2 + s 0, 3 + s 0, 4 + (s 0, 1 + s 0, 2 + s 0, 3 + s 0, 4 )
  • s 2,1 s 2, 2 + s 2, 3 + s 2, 4 + (s 2, 1 + s 2, 2 + s 2, 3 + s 2, 4 )
  • s 4,1 s 4, 2 + s 4, 3 + s 4, 4 + (s 4, 1 + s 4, 2 + s 4, 3 + s 4, 4 )
  • s 6,1 s 6, 2 + s 6, 3 + s 6, 4 + (s 6, 1 + s 6, 2 + s 6, 3 + s 6, 4 ).
  • s 1,1 s 0,2 + s 10,3 + s 2,4 + (s 1,1 + s 0,2 + s 10,3 + s 2,4 )
  • s 3,1 s 2, 2 + s 0, 3 + s 4, 4 + (s 3, 1 + s 2, 2 + s 0, 3 + s 4, 4 )
  • s 5,1 s 4, 2 + s 2, 3 + s 6, 4 + (s 5, 1 + s 4, 2 + s 2, 3 + s 6, 4 )
  • s 7,1 s 6,2 + s 4,3 + s 8,4 + (s 11,1 + s 10,2 + s 8,3 + s 0,4) + (s 3,1 + s 2 , 2 + s 0, 3 + s 4, 4 ).
  • bits s 0,2 , s 1,2 , s 4,2 , s 5,2 can be passed through Calculations to reconstruct.
  • s 0, 2 s 0, 1 + s 0, 3 + s 0, 4 + (s 0, 1 + s 0, 2 + s 0, 3 + s 0, 4 )
  • s 1, 2 s 1, 1 + s 1, 3 + s 1, 4 + (s 1, 1 + s 1, 2 + s 1, 3 + s 1, 4 )
  • s 4, 2 s 4, 1 + s 4, 3 + s 4, 4 + (s 4, 1 + s 4, 2 + s 4, 3 + s 4, 4 )
  • s 5, 2 s 5, 1 + s 5, 3 + s 5, 4 + (s 5, 1 + s 5, 2 + s 5, 3 + s 5, 4 ).
  • bits s 2,2 , s 3,2 , s 6,2 , and s 7,2 can be reconstructed by the following calculations.
  • s 2, 2 s 3, 1 + s 0, 3 + s 4, 4 + (s 3, 1 + s 2, 2 + s 0, 3 + s 4, 4 )
  • s 6, 2 s 7, 1 + s 4, 3 + s 0, 4 + s 4, 4 + (s 11, 1 + s 10, 2 + s 8, 3 + s 0, 4 ) + (s 3 , 1 + s 2, 2 + s 0, 3 + s 4, 4 )
  • s 7, 2 s 0, 1 + s 4, 1 + s 5, 3 + s 1, 4 + s 5, 4 + (s 0, 1 + s 11, 2 + s 9, 3 + s 1, 4 ) + (s 4,1 + s 3,2 + s 1,3 + s 5,4 ).
  • the results show that by downloading 6 bits from the first information column and 4 bits from the third information column, the fourth information column, the first check column and the second check column, the second can be restored. 8 bits in each information column. A total of 22 bits of data were downloaded during the repair process. It can be verified that, for the example shown in FIG. 1, the third information column and the last information column can be reconstructed by downloading 22 bits and 20 bits from 5 columns, respectively.
  • Algorithm 1 The key idea in Algorithm 1 is that for each erased information column, the parity sets accessed have a large intersection, resulting in a small number of accesses. And, obviously, if we want to ensure the properties and effective repair of MDS, then choosing the encoding vector is crucial. The next theorem shows that the repair bandwidth of an information column is progressively optimal.
  • the parity set of the first parity column is the same as the first parity column in RDP and even odd.
  • the key difference between the proposed encoding and existing binary MDS array codes is the construction of other parity columns.
  • the parity bits of other parity columns are not the bits corresponding to the straight lines in the array, but the bits corresponding to the polygonal lines. .
  • the number of lines in the proposed encoding can be divisible by ⁇ k-2 .

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  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Algebra (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

L'invention concerne un procédé de construction d'une matrice génératrice de code binaire de réparation applicable au domaine de l'amélioration des techniques de traitement numérique. Le procédé de construction d'une matrice génératrice de code binaire de réparation comprend : la désignation d'un code construit avec C 1 (k, r, d, p), où η = d - k + 1, k ≥ 3, r ≥ 3 est un nombre impair, d = k + (r - 1)/2 et τ = (d - k + 1) k-2, une matrice de construction est désignée par P k × r et sa formule de calcul est exprimée comme suit : formule (I). Une structure de matrice de produit de code régénéré fonctionne toujours dans un anneau quotient, la complexité informatique est faible, et la largeur de bande de réparation est réduite avec une tolérance aux pannes augmentée.
PCT/CN2018/110067 2018-08-09 2018-10-12 Procédé de construction d'une matrice génératrice de code binaire de réparation et procédé de réparation WO2020029418A1 (fr)

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CN110750382B (zh) * 2019-09-18 2020-10-30 华中科技大学 用于提高数据修复性能的最小存储再生码编码方法及系统
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