WO2020026640A1 - Inductor, composite inductor, dc/dc converter, and circuit - Google Patents

Inductor, composite inductor, dc/dc converter, and circuit Download PDF

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Publication number
WO2020026640A1
WO2020026640A1 PCT/JP2019/024705 JP2019024705W WO2020026640A1 WO 2020026640 A1 WO2020026640 A1 WO 2020026640A1 JP 2019024705 W JP2019024705 W JP 2019024705W WO 2020026640 A1 WO2020026640 A1 WO 2020026640A1
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Prior art keywords
conductor
hole
inductor
current
core
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PCT/JP2019/024705
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French (fr)
Japanese (ja)
Inventor
圭司 田代
幸伯 山田
有吉 剛
裕典 岡川
Original Assignee
住友電気工業株式会社
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Priority claimed from JP2018192846A external-priority patent/JP2021180200A/en
Application filed by 住友電気工業株式会社 filed Critical 住友電気工業株式会社
Publication of WO2020026640A1 publication Critical patent/WO2020026640A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/04Fixed inductances of the signal type  with magnetic core
    • H01F17/06Fixed inductances of the signal type  with magnetic core with core substantially closed in itself, e.g. toroid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F37/00Fixed inductances not covered by group H01F17/00
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac

Definitions

  • the present disclosure relates to an inductor, a composite inductor, a DC / DC converter, and a circuit.
  • This application claims the priority based on Japanese Patent Application No. 2018-142503 filed on July 30, 2018 and the priority based on Japanese Patent Application No. 2018-192846 filed on October 11, 2018. All the contents described in the above are used.
  • DC / DC converters for raising and lowering a DC voltage are widely used as power supplies for in-vehicle equipment and industrial equipment. Converters are classified into an insulated type and a non-insulated type depending on whether or not the input and output are insulated by a transformer. The control method of the insulated converter is divided into a forward method and a flyback method.
  • a single choke coil (inductor) having a winding wound around a core is interposed on the high potential side of a secondary circuit through which an output current flows (Japanese Patent Application Laid-Open No. H11-163873). 1).
  • An inductor includes a core having at least a first through hole and a second through hole penetrating in the same direction, and a portion inserted into the first through hole, and a first current flowing therethrough.
  • a first conductor having a portion inserted into the second through-hole and having a second conductor through which a second current flows, wherein one of the first current and the second current is:
  • the other current is a current that returns to the inductor via the outside of the inductor, and the direction of the second current in the second through hole is opposite to the direction of the first current in the first through hole. It is.
  • a composite inductor according to an aspect of the present disclosure is a composite inductor including the above-described inductor, wherein the first conductor is inserted into the first through hole, and the second conductor is inserted into the second through hole. A plurality of said cores.
  • a DC / DC converter includes the above-described inductor or composite inductor, a switching element, and a transformer having a primary winding connected in series to the switching element, wherein the first conductor includes: The outflow current flowing out of the secondary winding of the transformer to the outside is connected so as to flow as a first current, and the second conductor is a return current returning from the outside to the secondary winding as the second current. Connected.
  • the present application can be realized not only as an inductor, a composite inductor, and a DC / DC converter having such a characteristic configuration, but also as a part of the DC / DC converter as a semiconductor integrated circuit, Or may be implemented as a composite inductor or other system including a DC / DC converter.
  • FIG. 1 is a block diagram illustrating a configuration example of the DC / DC converter according to the first embodiment.
  • FIG. 2 is an explanatory diagram illustrating an example of an operation state during a period in which power is transmitted from the primary side to the secondary side of the transformer.
  • FIG. 3 is an explanatory diagram illustrating an example of an operation state during a period in which the load current flows back on the secondary side of the transformer.
  • FIG. 4 is a perspective view of the inductor according to the first embodiment as viewed obliquely from above.
  • FIG. 5A is a cross-sectional view taken along line VV of FIG. 4, and is a longitudinal cross-sectional view schematically illustrating a state after assembly of the inductor according to the first embodiment.
  • FIG. 5A is a cross-sectional view taken along line VV of FIG. 4, and is a longitudinal cross-sectional view schematically illustrating a state after assembly of the inductor according to the first embodiment.
  • FIG. 5B is a diagram illustrating a magnetic flux generated in the core of the inductor according to the first embodiment.
  • FIG. 6 is a perspective view of the inductor according to the second embodiment as viewed obliquely from above.
  • FIG. 7 is a cross-sectional view taken along line VII-VII of FIG. 6, and is a longitudinal cross-sectional view schematically illustrating a state after assembly of the inductor according to the second embodiment.
  • FIG. 8A is a plan view showing a first conductor inserted into both of the through holes according to the second embodiment.
  • FIG. 8B is a plan view illustrating the second conductor inserted into both of the through holes according to the second embodiment.
  • FIG. 9A is a plan view showing the first conductor inserted into all of the through holes according to the first modification.
  • FIG. 9B is a plan view showing the second conductor inserted through all of the through holes according to the first modification.
  • FIG. 10A is a plan view showing a first conductor inserted into one of the through holes according to the second modification.
  • FIG. 10B is a plan view showing the second conductor inserted into both of the through holes according to the second modification.
  • FIG. 11A is a plan view showing a first conductor inserted into a part of a through hole according to Modification 3.
  • FIG. 11B is a plan view showing a second conductor inserted through all of the through holes according to the third modification.
  • FIG. 12A is a plan view schematically illustrating a first conductor according to Modification Example 4.
  • FIG. 12B is a plan view schematically illustrating a second conductor according to Modification 4.
  • FIG. 14 is a perspective view of an inductor according to Modification Example 5 as viewed obliquely from above. It is a side view which shows the inductor attached to the housing
  • FIG. 11 is a block diagram illustrating a configuration example of a DC / DC converter according to a third embodiment.
  • FIG. 2 is a plan view schematically showing a transformer and an inductor formed on a printed wiring board.
  • FIG. 17A is a graph illustrating frequency components of switching noise caused by the DC / DC converter according to the first embodiment.
  • FIG. 17B is a graph illustrating frequency components of switching noise caused by the DC / DC converter according to the third embodiment.
  • FIG. 18 is a circuit diagram illustrating a configuration example of a DC / DC converter according to the fourth embodiment.
  • the inductor is interposed on the high voltage side of the secondary circuit. Since the magnitude of the inductance required for this inductor is inversely proportional to the switching frequency at which the switch is turned on / off, the switching frequency must be relatively high in order to reduce the size of the inductor.
  • An inductor includes a core having at least a first through hole and a second through hole penetrating in the same direction, and a portion inserted into the first through hole, and a first current.
  • the current is a current in which the other current returns to the inductor via the outside of the inductor, and the direction of the second current in the second through hole is the direction of the first current in the first through hole. The opposite is true.
  • the core of the present embodiment has an inductance that is increased by the number of through holes. Therefore, it is possible to secure necessary inductance even when the conductor inserted into the core is not wound.
  • the first current is, for example, an outflow current from a predetermined current source.
  • the second current is, for example, a return current to the current source.
  • the first conductor may further include a portion inserted into the second through hole. It is preferable that the first current flows in the same direction as the second current in the second through hole.
  • the first conductor has a first U-shaped portion, and the first U-shaped portion includes the portion where the first conductor is inserted into the first through hole and the second through hole. It is preferable to include the above-mentioned part penetrated.
  • the portions inserted into the first through-hole and the second through-hole and the portions connecting these portions are U-shaped.
  • the conductor partially U-shaped has a relatively simple shape close to point symmetry or line symmetry in plan view.
  • the second conductor has a second U-shaped portion disposed so as to be opposite to the first U-shaped portion, and the second U-shaped portion is formed of the second conductor. Includes a portion inserted into the first through hole and the portion inserted into the second through hole, wherein the second current flows in the same direction as the first current in the first through hole. preferable.
  • the U-shaped portions of the first conductor and the second conductor are configured to be opposite to each other. Accordingly, one end and the other end of the first conductor and the second conductor are separated from each other on both sides in the through direction of the through hole, so that connection to the outside is facilitated.
  • the core is preferably any of EE type, EI type and ER type.
  • any of the EE type, EI type and ER type cores having two through holes in abutted state is used, so that widely used cores can be used.
  • each of the first conductor and the second conductor has a rectangular cross section.
  • the cross section of each of the first conductor and the second conductor is rectangular, the thickness of the cross section in the short side direction can be suppressed.
  • the surface area with respect to the cross-sectional area of each of the first conductor and the second conductor is large, heat dissipation is good.
  • the first conductor and the second conductor are conductor patterns included in a printed wiring board.
  • the conductor pattern included in the printed wiring board is used as the first conductor and the second conductor, the first conductor and the second conductor including the peripheral circuit can be easily formed. it can.
  • the core is preferably a ferrite core or a dust core.
  • the ferrite core is formed by sintering a magnetic material.
  • the dust core is formed by pressing powder containing a magnetic material.
  • the core is a ferrite core or a dust core, high-frequency characteristics are good.
  • the core may be a nanocrystalline soft magnetic material core or an amorphous core.
  • the inductor may further include a heat transfer layer containing a heat transfer material, wherein the heat transfer layer is disposed between the first conductor and the second conductor, and the core. preferable.
  • the core includes a pair of core members that can abut each other, and the first through hole and the second through hole penetrate in a direction along the abutting surface in a state where the pair of the core members abut each other. Is preferred.
  • the core is located at an intermediate portion between the first through hole and the second through hole, and is located around the first through hole on the first through hole side of the intermediate portion. It can have a 1st outer peripheral part and a 2nd outer peripheral part located around the said 2nd through-hole in the said 2nd through-hole side rather than the said intermediate part. It is preferable that a cross-sectional area of the intermediate portion is larger than a cross-sectional area of the first outer peripheral portion and a cross-sectional area of the second outer peripheral portion.
  • the intermediate portion is a magnetic path through which a magnetic flux passes between the first through hole and the second through hole.
  • Such a large cross-sectional area of the intermediate portion can increase the inductance.
  • a composite inductor according to an aspect of the present disclosure is a composite inductor including the above-described inductor, wherein the first conductor is inserted into the first through-hole, and the second conductor is connected to the second through-hole. A plurality of the cores are inserted through the holes.
  • the size of each core can be reduced.
  • a two-terminal pair circuit formed by an inductor formed by inserting the first conductor into the first through hole of each core and inserting the second conductor into the second through hole of each core. are preferably cascaded.
  • the inductor formed by inserting the first conductor and the second conductor into the first through hole and the second through hole of the core is regarded as a two-terminal pair circuit including two inductance elements. , Each two-terminal pair circuit is cascaded. As a result, the output from each inductor is taken over by the input of the subsequent inductor.
  • a capacitor is connected to one terminal pair in at least one of the two-terminal pair circuits.
  • a DC / DC converter includes the above-described inductor, a switching element, and a transformer having a primary winding connected in series to the switching element.
  • the outflow current flowing out of the secondary winding of the transformer to the outside is connected so as to flow as a first current, and the second conductor is a return current returning from the outside to the secondary winding as the second current. Connected.
  • the switching element is connected in series to the primary winding of the transformer, and the outflow current and return current to the secondary winding of the transformer flow through the first and second conductors of the inductor.
  • a DC / DC converter includes the above-described composite inductor, a switching element, and a transformer having a primary winding connected in series to the switching element.
  • the second conductor is connected such that a return current returning from the outside to the secondary winding flows as the second current. Have been.
  • the switching element is connected in series to the primary winding of the transformer, and the outflow current and return current to the secondary winding of the transformer flow through the first conductor and the second conductor of the composite inductor.
  • the first conductor is formed integrally with the secondary winding, and at least one of the first conductor and the second conductor is formed integrally with an output-side electric path. Is preferred.
  • the first conductor is formed integrally with the secondary winding of the transformer, and at least one of the first conductor and the second conductor is formed integrally with the output-side electric circuit.
  • the number of joints between components can be reduced.
  • both the first conductor and the second conductor may be formed integrally with the electric circuit on the output side.
  • a DC / DC converter includes the above-described inductor, a switching element, and a transformer having a primary winding, and at least the switching element, the inductor, and the primary winding. And are connected in series.
  • a circuit according to an aspect of the present disclosure includes the above-described inductor, and a circuit element connected in series to the first conductor and the second conductor outside the inductor.
  • the first conductor, the circuit element, and the second conductor are connected in series, one of the first current and the second current flows through the circuit element. Passing it becomes the second current.
  • FIG. 1 is a block diagram illustrating a configuration example of the DC / DC converter 100 according to the first embodiment.
  • the DC / DC converter 100 includes a transformer 10, and the potential of the input-side terminals A and B and the potential of the output-side terminals C and D are separated by the transformer 10.
  • a capacitor 20 is connected between the terminals A and B on the input side, and a predetermined voltage is applied from an external DC power supply (not shown).
  • a capacitor 21 is connected between the output side terminals C and D, and an external load is further connected.
  • the terminal D is connected to, for example, the ground potential.
  • the DC / DC converter 100 also includes an Nch-type MOSFET (Metal Oxide Semiconductor Connector Field Effect Transistor: hereinafter referred to as an FET) 31 (corresponding to a switching element) connected between one end of the primary winding 11 of the transformer 10 and the terminal B. ), A series circuit of the FET 32 and the capacitor 22 connected between one end of the primary winding 11 and the terminal A, and a control unit 4 for controlling on / off of the FETs 31 and 32. The other end of the primary winding 11 is connected to the terminal A.
  • the FETs 31 and 32 may be other switching elements such as a bipolar transistor and an IGBT (Insulated Gate Bipolar Transistor).
  • the FET 31 has a drain connected to one end of the primary winding 11, a source connected to the terminal B, and a gate connected to the control unit 4.
  • the FET 32 has a drain connected to one end of the capacitor 22, a source connected to one end of the primary winding 11, and a gate connected to the control unit 4.
  • the other end of the capacitor 22 is connected to the terminal A.
  • Each of the FETs 31 and 32 has a body diode connected in anti-parallel at both ends. The order in which the FET 32 and the capacitor 22 constituting the active clamp circuit are connected in series may be changed.
  • the secondary winding 12 of the transformer 10 has one end connected to the cathode of the diode 51 and the other end connected to the cathode of the diode 52.
  • the cathode of the diode 52 is further connected to one end of the capacitor 21 and the terminal C via a conductor 61 included in the inductor 6 as a choke coil.
  • the anodes of the diodes 51 and 52 are connected to the other end of the capacitor 21 and the terminal D via a conductor 62 included in the inductor 6.
  • the inductor 6 is integrated with the core and the conductors 61 and 62.
  • the inductor 6 is represented as if a coil is wound around a core.
  • the conductors 61 and 62 correspond to the coil. Details of the inductor 6 will be described later.
  • the DC / DC converter 100 having the above-described configuration is a so-called single-rock type forward converter, and multiplies a predetermined voltage supplied from the terminals A and B by ⁇ (duty ratio of the FET 31) / (turn ratio of the transformer 10) ⁇ . Are output from terminals C and D.
  • the DC / DC converter 100 is not limited to a single-stone type, and may be any of a multi-stone type push-pull type, a half-bridge type, and a full-bridge type. The description of the example of the multiple stone type is omitted since the type itself is known.
  • voltage conversion is performed by performing PWM (Pulse Width Modulation) control on the FET 31 at a predetermined cycle. Therefore, the voltage conversion operation of the DC / DC converter 100 will be described first. 2 and 3, the illustration of the capacitor 20, the control unit 4, and the terminals C and D is omitted.
  • PWM Pulse Width Modulation
  • FIG. 2 is an explanatory diagram illustrating an example of an operation state during a period in which power is transmitted from the primary side to the secondary side of the transformer 10.
  • the FET 31 is turned on and the FET 32 is turned off under the control of the control unit 4.
  • a predetermined voltage is applied to the primary winding 11 of the transformer 10 from the terminals A and B to induce a constant voltage in the secondary winding 12, the diode 51 conducts, and the load current that increases linearly in the inductor 6. Flows.
  • a current (substantial output current) flowing from the secondary winding 12 (corresponding to a predetermined current source) to the capacitor 21 and the load via the conductor 61 is set as an outflow current, and the conductor 62 is transferred from the capacitor 21 and the load.
  • Current flowing through a so-called return path that returns to the secondary winding 12 via the control circuit is defined as a return current. The magnitudes of the outflow current and the return current are the same.
  • a current obtained by adding the load current (more precisely, the current obtained by dividing the magnitude of the load current on the secondary side by the turns ratio of the transformer 10) and the exciting current is applied to the primary winding 11 in a straight line. Flows to increase gradually.
  • the magnetic flux due to the load current flowing through each of the primary winding 11 and the secondary winding 12 cancels each other, while the exciting current creates a magnetic flux in the core of the transformer 10.
  • the capacitor 22 is charged with a voltage that makes the drain side of the FET 32 positive until the current PWM cycle.
  • a case where the potential of the other end is higher than the one end of the primary winding 11 is defined as a positive voltage.
  • the current flowing from the other end of the primary winding 11 to one end is defined as a positive current.
  • FIG. 3 is an explanatory diagram showing an example of an operation state during a period in which the load current flows on the secondary side of the transformer 10.
  • the FET 31 is turned off, the load current and the exciting current stop flowing through the FET 31, and the positive exciting current commutates to the body diode of the FET 32 (see the solid line).
  • the commutated exciting current decreases linearly, the capacitor 22 is charged while the direction of the exciting current is positive.
  • the load current flowing through one secondary winding 12 via the diode 51 flows back through the diode 52.
  • the FET 32 is turned on by the control of the control unit 4, and the exciting current flowing through the body diode of the FET 32 flows through the channel region, but the exciting current continues to decrease. Since a negative voltage is applied from the capacitor 22 to the primary winding 11 throughout the period shown in FIG. 3, the exciting current decreases linearly and the polarity is inverted from positive to negative in the middle of the entire period. (See broken line). At this time, the capacitor 22 starts discharging. Then, at the end of the period in which the FET 32 is on, the release of the energy stored in the transformer 10 ends. The load current on the secondary side of the transformer 10 continues to flow back through the diode 52.
  • FIG. 4 is a perspective view of the inductor 6 according to the first embodiment viewed obliquely from above
  • FIG. 5A is a longitudinal sectional view schematically illustrating a state after the assembly of the inductor 6 according to the first embodiment.
  • through holes 60a and 60b whose through directions are aligned in the same direction are formed along the mating surface XX of the EI type cores 63 and 64.
  • One of the pair of through holes 60a and 60b is referred to as a first through hole 60a, and the other is referred to as a second through hole 60b.
  • a pair of conductors 61 and 62 are respectively inserted into the through holes 60a and 60b.
  • the conductor inserted through the first through hole 60a is referred to as a first conductor 61
  • the conductor inserted through the second through hole 60b is referred to as a second conductor 62.
  • a current flowing through the first conductor 61 is called a first current
  • a current flowing through the second conductor 62 is called a second current.
  • the first current is an outflow current
  • the second current is a return current.
  • the second current is a current in which the first current returns to the inductor 6 via a load which is a circuit element outside the inductor 6.
  • the first current may be considered to be a current that returns to the inductor 6 via the secondary winding 12 or the diode 52 that is a circuit element outside the inductor 6.
  • the cores (magnetic cores) 63 and 64 include a magnetic material.
  • the cores 63 and 64 are configured by abutting a pair of core members 63 and 64.
  • One of the pair of core members 63 and 64 is referred to as a first core member 63, and the other is referred to as a second core member.
  • the first core member 63 may be simply referred to as a core 63
  • the second core member 64 may be simply referred to as a core 64.
  • the pair of core members 63 and 64 may be referred to as a pair of cores 63 and 64.
  • the pair of cores 63 and 64 may have other shapes such as an EE type and an ER type.
  • FIG. 5B shows the magnetic flux generated in the cores 63 and 64 in the first embodiment.
  • the core includes an intermediate portion 160 located between the first through hole 60a and the second through hole 60b. Further, the core includes a first outer peripheral portion 161 located around the first through hole 60a on the first through hole 60a side with respect to the intermediate portion 160. Further, the core includes a second outer peripheral portion 162 located around the first through hole 60b on the second through hole 60b side of the intermediate portion 160.
  • the outflow current flowing through the first conductor 61 flows from the back side to the front side in FIG. 5B.
  • the return current flowing through the second conductor 62 flows from the near side to the far side in FIG. 5B.
  • the magnetic path through which the magnetic flux M1 generated by the outflow current flowing through the first conductor 61 passes is formed so as to go around the intermediate portion 160 and the first outer peripheral portion 161.
  • the magnetic path through which the magnetic flux M2 generated by the return current flowing through the second conductor 62 passes is formed so as to go around the intermediate portion 160 and the second outer peripheral portion 161.
  • the core is configured such that the cross-sectional area S1 of the intermediate portion 160 is larger than the cross-sectional area S2 of the first outer peripheral portion 161 and the cross-sectional area S2 of the second outer peripheral portion 162.
  • the cross-sectional area S1 of the intermediate portion 160 is preferably 1.5 times or more and 3 times or less the cross-sectional area S2.
  • the cross-sectional area S1 is more preferably twice or more and three or less times the cross-sectional area S2.
  • the conductors 61 and 62 are rectangular copper wires or bus bars having a rectangular cross section, and the aspect ratio (the ratio of the long side to the short side) is, for example, in the range of 2: 1 to 20: 1. It is not limited. By thus increasing the aspect ratio by making the cross section rectangular, heat dissipation of the conductors 61 and 62 becomes easy.
  • the cores 63 and 64 are made of a powder compact formed by pressing a powder containing a ferrite or a magnetic material formed by sintering a magnetic material, the cores 63 and 64 have good high-frequency characteristics. That is, the cores 63 and 64 are ferrite cores or dust cores.
  • the material of the cores 63 and 64 is not limited to these, and may be, for example, a composite material containing a powder of a soft magnetic material and a resin, or may be a laminate in which plate-like magnetic materials are laminated.
  • the cores 63 and 64 may be nanocrystalline soft magnetic material cores or amorphous cores.
  • An insulating layer 66 is provided between the conductors 61 and 62 and the cores 63 and 64.
  • the material of the insulating layers 65 and 66 is a heat dissipation material such as a silicon sheet, the heat dissipation of the conductors 61 and 62 is improved.
  • the heat transfer layers 67, 67 containing a heat transfer material such as a carbon sheet. Is further provided.
  • the conductors 61 and 62 are placed at positions where the through holes 60 a and 60 b are to be formed in the core 64 before butting the cores 63 and 64. Are assembled together.
  • the inductor 6 is connected to the peripheral circuit, it is considered that the outflow current flowing through the conductor 61 and the return current flowing through the conductor 62 flow in directions opposite to each other with respect to the direction in which the through holes 60a and 60b penetrate.
  • the applicable range and performance of the inductor 6 configured as described above will be described.
  • required inductance is inversely proportional to a switching frequency, and when the switching frequency is low, the coil cannot be replaced with a conductor having no winding shape. Therefore, in the first embodiment, it is assumed that the switching frequency of the FETs 31 and 32 by the control unit 4 is in the range of 300 kHz to 3 MHz, and that the inductance required for the inductor 6 is in the range of 0.1 ⁇ H to 3 ⁇ H.
  • the currents flowing through the conductors 61 and 62 inserted in the through holes 60a and 60b are opposite to each other, and the magnetic flux does not cancel out in the core between the through holes 60a and 60b. . Therefore, if the size of the pair of cores 63 and 64 is substantially equal to the size of two other cores having one through hole arranged side by side, the inductance of the inductor 6 will be one conductor Is approximately twice as large as the inductance of the inductor through which.
  • the number of the through holes 60a and 60b is two, but may be three or more.
  • a third through-hole adjacent to the through-hole 60b is formed with the two cores abutting each other, and the conductor 61 is inserted through the third through-hole.
  • the conductor 62 is also inserted through the fourth through-hole.
  • the conductors 61 and 62 may be formed by a conductor pattern on a printed wiring board.
  • a part of the insulating layer 66 can be replaced with a prepreg containing epoxy resin and glass fiber, or a part of the insulating layer 66 can be replaced with a resist layer on the substrate surface.
  • the through-holes 60a and 60b are formed so as to face in the same direction along the butting surface XX where the pair of cores 63 and 64 including the magnetic material are butted.
  • the outflow current from the secondary winding 12 of the transformer 10 and the return current to the secondary winding 12 are supplied to the pair of conductors 61 and 62 inserted into the two adjacent through holes 60a and 60b, respectively. It flows in a direction opposite to the penetration direction of 60a, 60b.
  • the magnetic flux does not cancel out in the core between the adjacent through holes 60a and 60b, and the number of through holes is smaller than when one conductor is inserted into one through hole in another core.
  • the inductance increases substantially in proportion to. Therefore, even when the conductor inserted into the cores 63 and 64 is not wound, it is possible to secure necessary inductance.
  • the cross section of each of the pair of conductors 61 and 62 is rectangular, the thickness of the cross section in the short side direction can be suppressed, and the height of the inductor 6 can be suppressed. . Further, since the surface area with respect to the cross-sectional area of each of the pair of conductors 61 and 62 is large, the heat dissipation is improved.
  • the pair of conductors 61 and 62 including the peripheral circuit can be easily formed. .
  • the ferrite or the compact is used as the material of the cores 63 and 64, the high frequency characteristics are good.
  • the heat transfer layers 67, 67 are interposed between the pair of conductors 61, 62 and the cores 63, 64, the heat generated in the conductors 61, 62 penetrates. Heat is preferably transferred to the outside of the holes 60a and 60b.
  • the FET 31 is connected in series to the primary winding 11 of the transformer 10, and the outflow current and the return current to the secondary winding 12 of the transformer 10 are each a pair of conductors 61 and 62 of the inductor 6. Flows to As a result, when the FET 31 is turned on / off, a current is induced in the secondary winding 12 of the transformer 10, and this current flows through the pair of conductors 61 and 62 of the inductor 6, thereby effectively reducing the output current. Can be smoothed.
  • Embodiment 1 is a mode in which a pair of conductors 61 and 62 are separately inserted into two adjacent through holes 60a and 60b, respectively, whereas Embodiment 2 is a mode in which two adjacent through holes 601 and 60b are inserted.
  • both the pair of conductors 61b and 62b are inserted into each of the conductors 602. Since the block configuration of the DC / DC converter according to the second embodiment is the same as that of the DC / DC converter 100 according to the first embodiment, the illustration is omitted, and the portions corresponding to the first embodiment are denoted by the same reference numerals. The description is omitted.
  • FIG. 6 is a perspective view of the inductor 6b according to the second embodiment viewed obliquely from above
  • FIG. 7 is a vertical cross-sectional view schematically showing a state after the inductor 6b is assembled.
  • 8A and 8B are plan views respectively showing conductors 61b and 62b inserted into both through holes 601 and 602 according to the second embodiment.
  • FIG. 8A shows the first conductor 61b
  • FIG. 8B shows the second conductor 62b.
  • through holes 601 and 602 whose through directions are aligned in the same direction are formed along the abutting surfaces Xb-Xb of the EE-type cores 63b and 64b, and a pair of conductive holes are respectively formed in the through holes 601 and 602.
  • the bodies 61b and 62b are inserted so as to overlap each other.
  • the vertical relationship between the conductors 61b and 62b may be opposite to that shown in FIGS.
  • the pair of cores 63b and 64b may have another shape such as, for example, an EI type or an ER type.
  • the first conductor 61b has a first U-shaped portion 61bu including a portion inserted into the through holes 601 and 602 and a portion connecting these portions.
  • the second conductor 62b has a second U-shaped portion 62bu including a portion inserted into the through holes 601 and 602 and a portion connecting these portions. Therefore, the conductors 61b and 62b have a simple shape that is line-symmetric in plan view.
  • the portions including one end and the other end of the conductors 61b and 62b in the direction in which the current flows are bent in opposite directions in the direction intersecting the through holes 601 and 602, respectively. However, it may not be bent in this way.
  • the portions bent in this manner are referred to as one end and the other end.
  • the through-hole 601 When compared with the inductor 6 of the first embodiment shown in FIG. 4, as shown in FIG. 8B, the through-hole 601 has another part of the second U-shaped part 62bu partially inserted in the through-hole 602. Can be seen to have been further inserted. As shown in FIG. 8A, it can be seen that another part of the first U-shaped portion 61bu partially inserted through the through hole 601 is further inserted into the through hole 602.
  • An insulating layer 65 is provided between the conductors 61b and 62b.
  • An insulating layer 66 is provided between the conductors 61b and 62b and the cores 63b and 64b.
  • heat transfer layers 67, 67 are further provided between the conductors 61b, 62b and the insulating layer 66.
  • a heat transfer layer (not shown) may be further provided between the conductors 61b and 62b.
  • the conductors 61b and 62b are placed at positions where the through holes 601 and 602 are to be formed in the core 64b before the cores 63b and 64b are abutted. Are assembled together.
  • the inductor 6b is connected to a peripheral circuit, the outflow current flowing through the conductor 61b and the return current flowing through the conductor 62b flow in the same direction as the through direction of the through-hole 601 and pass through the through-hole 602. It is taken into consideration that the fluid flows in the same direction.
  • the U-shaped portions 61bu and 62bu are configured to be opposite to each other with respect to the direction in which the through holes 601 and 602 penetrate. Even if there is some change in the connection with the peripheral circuit, a similar effect can be obtained as the inductor 6b.
  • the insulating layer 66 is disposed between the conductors 61b and 62b and the cores 63b and 64b.
  • the conductors 61b and 62b may be separately inserted into two bobbins made of an insulator having a flange-shaped flange along the opening surfaces of the two openings.
  • the conductors 61b and 62b may be formed by conductor patterns in different inner layers or outer layers of the multilayer wiring board.
  • a part of the insulating layer 66 and the insulating layer 65 can be replaced with a prepreg containing an epoxy resin and glass fiber, or a part of the insulating layer 66 can be replaced with a resist layer on the substrate surface.
  • the pair of conductors 61b and 62b are connected to each of the two through holes 601 and 602 such that the outflow current and the return current flow in the same direction with respect to the through direction. Both are inserted. Therefore, the magnetomotive force F is doubled and the inductance is substantially quadrupled at the portion where both of the pair of conductors 61b and 62b are inserted, so that the inductance is substantially four times as compared with the inductor 6 according to the first embodiment. Double.
  • each of the pair of conductors 61b and 62b can have a relatively simple shape that is line-symmetric in plan view.
  • the U-shaped portions 61bu and 62bu of the pair of conductors 61b and 62b are configured to be opposite to each other. Therefore, one end and the other end of the pair of conductors 61b, 62b are separated on both sides in the through direction of the through holes 601 and 602, so that the connection with the secondary winding 12 and the terminals C and D is easily performed. be able to.
  • an EE-type, EI-type, or ER-type core having two through holes 601 and 602 in abutted state can be used.
  • the pair of conductors 61b and 62b including the peripheral circuit can be easily formed. Can be formed.
  • Embodiment 2 is a mode in which two through holes 601 and 602 are formed in a state where a pair of cores 63b and 64b are abutted, whereas Modification 1 is a state where a pair of cores 63c and 64c are abutted.
  • three through holes 601, 602, and 603 are formed.
  • the configuration of the pair of cores 63c and 64c according to the first modification is the same as that of the second embodiment except that the through-holes 601, 602, and 603 are formed in the same direction. Detailed description is omitted.
  • the case where the number of through holes formed in the pair of cores is four or more is the same as in the case of the second embodiment or the first modification.
  • FIGS. 9A and 9B are plan views respectively showing the conductors 61c and 62c inserted into all of the through holes 601, 602, and 603 according to the first modification.
  • FIG. 9A shows the first conductor 61c
  • FIG. 9B shows the second conductor 62c.
  • the first conductor 61c includes a first U-shaped portion 61cu including a portion inserted into the through holes 601 and 602 and a portion connecting these portions, a portion inserted into the through holes 602 and 603, and these portions.
  • the two U-shaped portions 61cu partially overlap.
  • the second conductor 62c includes a second U-shaped portion 62cu including a portion inserted into the through holes 601 and 602 and a portion connecting these portions, a portion inserted into the through holes 602 and 603, and And a second U-shaped portion 62cu including a portion connecting the portions.
  • the conductors 61c and 62c have a simple point-symmetrical shape in plan view. Further, for each of the conductors 61c and 62c, the current flowing in the portion inserted into the adjacent through-holes 601 and 602 is necessarily in the opposite direction, and the magnetic flux cancels out in the core between the through-holes 601 and 602. It doesn't fit. Similarly, the currents flowing in the portions inserted into the adjacent through holes 602 and 603 are necessarily in opposite directions, and the magnetic flux does not cancel out in the core between the through holes 602 and 603.
  • the inductance of the inductor according to the first modification is: This is approximately 1.5 times the inductance of the inductor 6b according to the second embodiment.
  • the corresponding U-shaped portions 61cu and 62cu are configured to be opposite to each other, so that one ends of the conductors 61c and 62c and the other ends of the conductors 61c and 62c are opposite to each other. These are separated from each other on both sides of the through-holes 601, 602, and 603 in the direction of penetration, so that connection with peripheral circuits is facilitated.
  • an electric path from the other end of the secondary winding 12 is connected to one end of the conductor 61c, and one end of the conductor 62c is connected to anodes of the diodes 51 and 52.
  • the other end of the conductor 61c is connected to the electric path to the terminal C, and the electric path from the terminal D is connected to the other end of the electric conductor 62c.
  • a pair of conductors 61c, 61c, and 603 is formed so that the outflow current and the return current flow in the same direction with respect to the three through holes 601, 602, and 603, respectively. Both of 62c are inserted. Accordingly, the magnetomotive force F is doubled and the inductance is substantially quadrupled at the portion where both of the pair of conductors 61c and 62c are inserted, so that the inductance is approximately 6 compared to the inductor 6 according to the first embodiment. (4x1 + 4x1 / 2)).
  • each of the pair of conductors 61c and 62c can have a relatively simple shape that is point-symmetric in plan view.
  • the U-shaped portions 61cu and 62cu on one and the other of the pair of conductors 61c and 62c are configured to be opposite to each other. Therefore, one end and the other end of the pair of conductors 61c, 62c are separated from each other on both sides of the through-holes 601, 602, 603 in the penetrating direction. Can be done.
  • Embodiment 2 is a mode in which both a pair of conductors 61b and 62b are inserted into two through-holes 601 and 602, respectively. 62b, and only the conductor 62b is inserted into the through hole 602.
  • the configuration of the pair of cores 63b and 64b according to the second modification is similar to that of the second embodiment.
  • the conductor 62b is the same as that used in the second embodiment.
  • FIG. 10A and 10B are plan views respectively showing conductors 61d and 62b inserted into one and both of through holes 601 and 602 according to the second modification.
  • FIG. 10A shows the first conductor 61d
  • FIG. 10B shows the second conductor 62b.
  • FIG. 10B is a reproduction of FIG. 8B.
  • the other part of the second U-shaped portion 62bu partially inserted in the through hole 602 is further inserted in the through hole 601. You can see.
  • the conductor 61d has a simple shape that is substantially point-symmetric in plan view. Further, regarding the conductor 62b, the currents flowing in the portions inserted into the adjacent through holes 601 and 602 are necessarily in opposite directions, and the magnetic flux does not cancel out in the core between the through holes 601 and 602. . Therefore, focusing on a portion where both of the conductors 61d and 62b are inserted, the magnetomotive force F is doubled and the inductance is quadrupled.
  • one ends of the conductors 61d and 62b are separated from each other on both sides of the through holes 601 and 602 in the direction of penetration, so that connection to peripheral circuits becomes easy.
  • an electric path from the other end of the secondary winding 12 is connected to one end of the conductor 61d, and one end of the conductor 62b is connected to anodes of the diodes 51 and 52.
  • the other ends of the conductors 61d and 62b are connected to terminals C and D, respectively.
  • both the pair of conductors 61d and 62b are inserted into one through hole 601 such that the outflow current and the return current flow in the same direction with respect to the through direction. ing. Therefore, the magnetomotive force F is doubled and the inductance is substantially quadrupled at a portion where both of the pair of conductors 61d and 62b are inserted, so that the inductance is approximately 2 in comparison with the inductor 6 according to the first embodiment. .5 times (4 times 1/2 1/2 times 1/2).
  • Modification 3 is a mode in which both of a pair of conductors 61c and 62c are inserted into three through holes 601, 602 and 603, respectively.
  • both the pair of conductors 61e and 62c are inserted, and only the conductor 62c is inserted into the through hole 603.
  • the configuration of the pair of cores 63c and 64c according to the third modification is the same as that of the first modification.
  • the conductor 62c is the same as that used in the first modification.
  • FIG. 11A and 11B are plan views respectively showing conductors 61e and 62c inserted through part and all of through holes 601, 602, and 603 according to the third modification.
  • FIG. 11A shows the first conductor 61e
  • FIG. 11B shows the second conductor 62c.
  • FIG. 11B is a reproduction of FIG. 9B.
  • the conductor 62c is further inserted into the through hole 603.
  • Another part of the first U-shaped portion 61eu, part of which is inserted through the through hole 602 is further inserted through the through hole 601.
  • Part of the through hole 603 is inserted through the through hole 602. It can be seen that another part of the second U-shaped portion 62cu is further inserted.
  • the conductor 61e has a simple shape that is substantially line-symmetric in plan view. Further, for each of the conductors 61e and 62c, the current flowing in the portion inserted into the adjacent through-holes 601 and 602 is necessarily in the opposite direction, and the magnetic flux cancels out in the core between the through-holes 601 and 602. It doesn't fit. Then, in the conductor 62c, the currents flowing in the portions inserted into the adjacent through holes 602 and 603 are necessarily in opposite directions, and the magnetic flux does not cancel out in the core between the through holes 602 and 603. . Therefore, focusing on a portion where both the conductors 61e and 62c are inserted, the magnetomotive force F is doubled and the inductance is quadrupled.
  • one ends of the conductors 61e and 62c are separated from each other on both sides of the through holes 601 and 602 in the penetrating direction, thereby facilitating connection with peripheral circuits.
  • an electric path from the other end of the secondary winding 12 is connected to one end of the conductor 61e, and one end of the conductor 62c is connected to anodes of the diodes 51 and 52.
  • the other ends of the conductors 61e and 62c are connected to terminals C and D, respectively.
  • a pair of conductors 61e, 61e, and 362 is formed so that outflow current and return current flow in the two through holes 601 and 602 in the same direction. Both of 62c are inserted. Therefore, the magnetomotive force F is doubled and the inductance is substantially quadrupled at the portion where both of the pair of conductors 61e and 62c are inserted, so that the inductance is substantially four times as compared with the inductor 6 according to the first embodiment. 0.5 times (4 ⁇ 1 + 1 times ⁇ 1 /).
  • Embodiment 2 is a form in which the pair of conductors 61b and 62b are formed separately from the peripheral circuit, whereas Modification 2 is a form in which the pair of conductors 61f and 62f are formed integrally with the peripheral circuit. is there.
  • the configuration of the pair of cores 63b and 64b according to Modification 4 is exactly the same as that of the second embodiment.
  • FIGS. 12A and 12B are plan views schematically showing a pair of conductors 61f and 62f according to the fourth modification.
  • One end of the conductor 61f is formed integrally with the one-turn secondary winding 12 of the transformer 10, and the other end is formed integrally with the terminal C, as compared with the conductor 61b according to the second embodiment.
  • the conductor 61f may not be integrated with the terminal C.
  • the other conductor 62f has the other end formed integrally with the terminal D as compared with the conductor 62b according to the second embodiment, but does not necessarily have to be so integrated.
  • the conductor 61b shown in FIG. 6 of the second embodiment is integrated with the secondary winding 12 and the terminal C, and the conductor 62b is integrated with the terminal D.
  • the conductor 61 shown in FIG. 4 of the first embodiment may be integrated with the secondary winding 12 and the terminal C, and the conductor 62 may be integrated with the terminal D, or the conductor shown in FIG. 9C may be integrated with the secondary winding 12 and the terminal C, and the conductor 62c shown in FIG.
  • the conductor 61f is formed integrally with the secondary winding 12 and the terminal C of the transformer 10, and the conductor 62f is formed integrally with the terminal D. The number of joints between them can be reduced.
  • Modification 5 Embodiment 2 is a mode in which the mounting method of the inductor 6b is not specified, whereas Modification Example 5 is a mode in which the inductor 6c is mounted on the housing 7.
  • the configuration of the pair of cores 63b and 64b according to Modification 5 is exactly the same as that of the second embodiment.
  • FIG. 13 is a perspective view of the inductor 6c according to the fifth modification viewed from obliquely above
  • FIG. 14 is a side view schematically showing the inductor 6c attached to the housing 7.
  • the inductor 6c is different from the inductor 6b according to the second embodiment in that the conductor 61b is replaced by a conductor 61g.
  • the pair of cores 63b and 64b and the conductor 62b are the same as those in the second embodiment. is there.
  • the inductor 6b according to the second embodiment is laid flat on a plane, the lower surface of the conductor 61b is higher than the lower surface of the conductor 62b (see FIGS. 6 and 7). Therefore, in the fifth modification, as shown in FIG. 13, one end and the other end of the conductor 61 g bent in opposite directions are bent stepwise in a thickness direction at a position not overlapping with the conductor 62 b. It is.
  • the inductor 6c is placed flat on the housing 7 with the core 64b facing down, the lower surface of one end and the other end of the conductor 61g and the lower surface of the one end and the other end of the conductor 62b. , And the height from the housing 7 becomes the same.
  • projecting portions 71 and 72 having the same height are provided on the upper surface of the housing 7.
  • the protrusion 71 is disposed at a position overlapping one end and the other end of the conductor 62b.
  • the protrusion 72 is arranged at a position overlapping one end and the other end of the conductor 61g.
  • An insulating layer 68 is provided between the upper surface of the protrusion 71 and the lower surfaces of the one end and the other end of the conductor 62b.
  • An insulating layer 69 is provided between the upper surface of the protrusion 72 and the lower surfaces of the one end and the other end of the conductor 61g.
  • An insulating layer 65 is provided between portions where the conductor 61g and the conductor 62b overlap.
  • the inductor 6c can be easily attached to the housing 7.
  • Embodiment 3 is a mode in which only a pair of cores 63 and 64 are provided, whereas Embodiment 3 is a mode in which a plurality of pairs of cores 63 and 64 are provided.
  • the third embodiment includes a composite inductor including a plurality of inductors 6 in which a pair of conductors 61 and 62 are inserted into through holes 60a and 60b formed by abutting a pair of cores 63 and 64, respectively. It is.
  • FIG. 15 is a block diagram illustrating a configuration example of a DC / DC converter 100b according to the third embodiment.
  • the DC / DC converter 100b is connected between the transformer 10 for separating the potentials of the input-side terminals A and B and the potentials of the output-side terminals C and D, a pair of conductors 61 and 62, and between the terminals C and D. And a capacitor 23 connected between the conductors 61 and 62.
  • the secondary winding 12 of the transformer 10 has one end connected to the drain of the FET 51b and the other end connected to the drain of the FET 52b.
  • the drain of the FET 52b is further connected to one end of the capacitor 23 via a conductor 61 included in one inductor (hereinafter, referred to as a first inductor) 6.
  • One end of the capacitor 23 is further connected to one end of the capacitor 21 and a terminal C via a conductor 61 included in the other inductor (hereinafter, referred to as a second inductor) 6.
  • the sources of the FETs 51 b and 52 b are connected to the other end of the capacitor 23 via a conductor 62 included in the first inductor 6.
  • the other end of the capacitor 23 is further connected to the other end of the capacitor 21 and the terminal D via a conductor 62 included in the second inductor 6.
  • the gates of the FETs 51b and 52b are connected to the control unit 4.
  • the same reference numerals are given to portions corresponding to the first embodiment, and description thereof will be omitted.
  • the FETs 51b and 52b may be replaced with the diodes 51 and 52 used in the first embodiment.
  • the number of inductors 6 is not limited to two, and may be three or more.
  • the above-described inductors 6 and 6 correspond to the composite inductor 600.
  • Each inductor 6 is regarded as a two-port pair circuit, and these two-port pair circuits are cascaded. Outflow current flows through the conductor 61 included in the composite inductor 600, and return current flows through the conductor 62.
  • a capacitor is not connected to one terminal pair of the two-terminal pair circuit formed by the first inductor 6, a capacitor may be connected here.
  • the capacitor 23 may be regarded as being connected to the other terminal pair of the two-terminal pair circuit formed by the first inductor 6 or connected to one terminal pair of the two-terminal pair circuit formed by the second inductor 6. May be considered.
  • the capacitor 21 may be deleted and included in an external load. It is not always necessary to connect a capacitor between the conductors 61 and 62 at the connection portion of the two-terminal pair circuit adjacent by the inductors 6, 6,.
  • FIG. 16 is a plan view schematically showing the transformer 10 and the inductors 6 and 6 formed on the printed wiring board 8.
  • the printed wiring board 8 uses a six-layer multi-layer substrate having four inner layers, but the number of inner layers may be three or less or five or more. Although a so-called PQ type core is used for the transformer 10 and EI type cores 63 and 64 are used for the inductors 6 and 6, the present invention is not limited to this.
  • the transformer 10 three legs of a PQ-type core are separately inserted into three openings provided at equal intervals in a direction intersecting the longitudinal direction at one longitudinal end of the printed wiring board 8. .
  • the first inductor 6 has three legs of the EI type cores 63 and 64 in three openings provided at regular intervals in a direction intersecting the longitudinal direction at a substantially central portion in the longitudinal direction of the printed wiring board 8. Are inserted separately.
  • the second inductor 6 includes three legs of the EI-type cores 63 and 64 at three openings provided at equal intervals in a direction intersecting the longitudinal direction at the other end in the longitudinal direction of the printed wiring board 8. Are inserted separately.
  • a column portion 91 is provided at one side edge in the longitudinal direction of the printed wiring board 8 and a cutout provided between the inductors 6 and 6 from a casing (not shown) to which the entire printed wiring board 8 is fixed.
  • An L-shaped leaf spring 9 for pressing and fixing the cores 63 and 63 of the inductors 6 and 6 is screwed to the pillar portion 91.
  • the cores 63 and 64 of each inductor 6 may be fixed by an adhesive or the like without using the leaf spring 9.
  • a conductor 61 to be inserted into the through holes 60a, 60a of the inductors 6, 6 is formed by a conductor pattern. This conductor pattern is integrated with the one-turn secondary winding 12 of the transformer 10 and the terminal C.
  • the primary winding 11 of the transformer 10 is formed on an inner layer of the printed wiring board 8.
  • the number of turns (number of turns) of the primary winding 11 may be two or more, for example, by a spiral conductor pattern formed on an arbitrary inner layer.
  • the windings may be connected in series by via holes connecting the inner layers.
  • the primary winding 11 is shown by a broken line except for an overlapping portion with the conductor 61 and the secondary winding 12.
  • An FET 51b is surface-mounted between the ⁇ secondary winding 12 and the conductor 62 ⁇ at a location between the transformer 10 and the first inductor 6.
  • An FET 52b is surface-mounted between the conductors 61 and 62 at a location between the transformer 10 and the first inductor 6.
  • the capacitor 23 is surface-mounted between the conductors 61 and 62 at a position between the inductors 6 and 6.
  • the capacitor 23 is formed by connecting three capacitors in parallel, but is not limited to this. For example, one capacitor may be used.
  • the capacitor 21 is surface-mounted between the conductors 61 and 62 at a portion closer to the terminals C and D than the second inductor 6 is.
  • the capacitor 21 is formed by connecting three capacitors in parallel, but is not limited to this. For example, one capacitor may be used.
  • the capacitors 21 and 23 are multilayer ceramic capacitors, for example, a lead type ceramic capacitor or a film capacitor may be used.
  • FIG. 17A is a graph illustrating frequency components of switching noise caused by the DC / DC converter 100 according to the first embodiment.
  • FIG. 17B is a graph illustrating frequency components of switching noise caused by the DC / DC converter 100b according to the third embodiment.
  • the vertical axis represents the noise level (dB ⁇ V)
  • the horizontal axis represents the relative frequency to the switching frequency (fundamental wave).
  • a broken line indicated by a dashed line in the drawing is a series of peaks of a fundamental wave and a harmonic wave of noise.
  • the volumes of the cores 63 and 64, the inductance of the inductor 6, and the capacitances of the capacitors 21 and 23 used in the simulation are as follows.
  • the pair of conductors 61 and 62 are formed by the conductor pattern of the printed wiring board 8, an increase in the number of components, an increase in connection points, an increase in processing steps, and the like are suppressed, and noise is reduced. An effect is obtained that a DC / DC converter having a high reduction effect can be easily manufactured.
  • a bus bar can be used for the pair of conductors 61 and 62.
  • soldering or welding is separately performed between the conductors 61 and 62 and the capacitor 23 and between the conductors 61 and 62 and the capacitor 21 without depending on the connection on the printed wiring board 8. Connection and the number of connection points and man-hours increase.
  • the inductance of the composite inductor 600 is distributed to the two inductors 6 and 6 by two pairs of the pair of cores 63 and 64.
  • the volume can be reduced.
  • each of the inductors 6 formed by inserting the pair of conductors 61 and 62 into the through holes 60a and 60b of the pair of cores 63 and 64 respectively has a two-terminal pair including two inductance elements.
  • the circuits are regarded as circuits, and each two-terminal pair circuit is cascaded. Therefore, the output of the first inductor 6 can be taken over by the input of the second inductor 6.
  • a two-stage low-pass filter can be formed. it can.
  • the FET 31 is connected in series to the primary winding 11 of the transformer 10, and the outflow current and return current to the secondary winding 12 of the transformer 10 are controlled by the pair of conductors 61 and 62 of the composite inductor 600. Flows to As a result, when the FET 31 is turned on / off, a current is induced in the secondary winding 12 of the transformer 10, and this current flows through the pair of conductors 61 and 62 in the composite inductor 600, so that the output current is effectively reduced. Can be smoothed.
  • the conductor 61 is formed integrally with the secondary winding 12 and the terminal C of the transformer 10 and the conductor 62 is formed integrally with the terminal D, the joining between the components is performed. The number of parts can be reduced.
  • FIG. 18 is a circuit diagram illustrating a configuration example of the DC / DC converter 100 according to the fourth embodiment.
  • the inductor 6 is provided on the input side (the primary winding 11 side) of the transformer 10.
  • the details of the inductor 6 of the fourth embodiment are the same as those of the inductor 6 described above.
  • the same inductance for example, 1 to 3 ⁇ H as the above-described inductor 6 is required.
  • the DC / DC converter 100 is a full-bridge type, and four switching elements 35, 36, 37, and 38 constituting a full bridge are provided on the input side (the primary winding 11 side) of the transformer 10. Have been.
  • the full bridge is configured by connecting switching elements 35 and 36 connected in series and switching elements 37 and 38 connected in series.
  • the inductors 6 of the first to third embodiments are provided on the output side (the secondary winding 12 side) of the transformer 10 included in the DC / DC converter 100.
  • the inductors 6 according to the first to third embodiments are used for smoothing an alternating current and converting it into a direct current.
  • the inductor 6 is provided on the input side (the primary winding 11 side) of the transformer 10 included in the DC / DC converter 100.
  • the inductor 6 according to the fourth embodiment is used for performing a ZVS (Zero Voltage Switching) operation due to a resonance phenomenon.
  • one end of the first conductor 61 is connected between the switching element 35 and the switching element 36 connected in series.
  • the other end of the first conductor 61 is connected to one end of the primary winding 11 of the transformer 10. Therefore, the switching element 35, the first conductor 61 (the inductor 6), and the primary winding 11 are connected in series.
  • One end of the second conductor is connected between the switching element 35 and the switching element 36 connected in series.
  • the other end of the second conductor 62 is connected to the other end of the primary winding 11 of the transformer 10. Therefore, the switching element 37, the second conductor 62 (the inductor 6), and the primary winding 11 are connected in series.
  • the switching element 35, the first conductor 61, the first winding 11, the second conductor 62, and the switching element 38 are connected in series. Therefore, when the switching element 35 and the switching element 38 are turned on, a current flows from the switching element 35 to the switching element 38 in the order of the first conductor 61, the first winding 11, and the second conductor 62. In this case, the first current flows through the first conductor 61 and goes to the primary winding 11 which is a circuit element outside the inductor 6.
  • the second current is a current that returns to the second conductor 62 via the primary winding 11.
  • the switching element 37, the second conductor 62, the first winding 11, the first conductor 61, and the switching element 36 are connected in series. Therefore, when the switching element 37 and the switching element 36 are turned on, a current flows from the switching element 37 to the switching element 36 in the order of the second conductor 62, the first winding 11, and the first conductor 61. In this case, the second current flows through the second conductor 62 and goes to the primary winding 11 which is a circuit element outside the inductor 6.
  • the first current is a current in which the second current returns to the first conductor 61 via the primary winding 11.
  • the magnitude of the current flowing through the first conductor 61 and the second conductor 62 is assumed to be in the range of 5 to 20 A, and is a relatively small current.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The inductor of the disclosure comprises: a core having at least a first through hole and a second through hole penetrating in the same direction; a first conductor through which a first current passes, the first conductor having a portion inserted through the first through hole; and a second conductor through which a second current passes, the second conductor having a portion inserted through the second through hole. One of the first current and the second current is a current by which the other current returns to the inductor after passing through the exterior of the inductor. The direction of the second current in the second through hole is the opposite of the direction of the first current in the first through hole.

Description

インダクタ、複合インダクタ、DC/DCコンバータ及び回路Inductors, composite inductors, DC / DC converters and circuits
 本開示は、インダクタ、複合インダクタ、DC/DCコンバータ及び回路に関する。本出願は、2018年7月30日出願の日本出願第2018-142503号に基づく優先権及び2018年10月11日出願の日本出願第2018-192846号に基づく優先権を主張し、これら日本出願に記載された全ての記載内容を援用するものである。 The present disclosure relates to an inductor, a composite inductor, a DC / DC converter, and a circuit. This application claims the priority based on Japanese Patent Application No. 2018-142503 filed on July 30, 2018 and the priority based on Japanese Patent Application No. 2018-192846 filed on October 11, 2018. All the contents described in the above are used.
 直流電圧を昇降圧するDC/DCコンバータ(以下、単にコンバータともいう)が車載機器や産業用機器の電源として広く用いられている。コンバータの種類は、入出力間をトランスで絶縁するか否かによって絶縁型及び非絶縁型に分けられる。絶縁型のコンバータの制御方式は、フォワード方式及びフライバック方式に分けられる。 2. Description of the Related Art DC / DC converters (hereinafter, also simply referred to as converters) for raising and lowering a DC voltage are widely used as power supplies for in-vehicle equipment and industrial equipment. Converters are classified into an insulated type and a non-insulated type depending on whether or not the input and output are insulated by a transformer. The control method of the insulated converter is divided into a forward method and a flyback method.
 一般的に絶縁型のフォワード方式によるコンバータでは、出力電流が流れる二次側の回路の高電位側に、巻線をコアに巻回した1つのチョークコイル(インダクタ)が介装される(特許文献1参照)。 In general, in an insulated forward converter, a single choke coil (inductor) having a winding wound around a core is interposed on the high potential side of a secondary circuit through which an output current flows (Japanese Patent Application Laid-Open No. H11-163873). 1).
特開平11-206118号公報JP-A-11-206118
 本開示の一態様に係るインダクタは、同一方向に貫通する第1貫通孔及び第2貫通孔を少なくとも有するコアと、前記第1貫通孔に挿通された部位を有し、第1電流が流れる第1導電体と、前記第2貫通孔に挿通された部位を有し、第2電流が流れる第2導電体と、を備え、前記第1電流及び前記第2電流のうちの一方の電流は、他方の電流が前記インダクタ外部を経由して前記インダクタへ戻る電流であり、前記第2貫通孔内における前記第2電流の向きは、前記第1貫通孔内における前記第1電流の向きとは逆である。 An inductor according to an embodiment of the present disclosure includes a core having at least a first through hole and a second through hole penetrating in the same direction, and a portion inserted into the first through hole, and a first current flowing therethrough. A first conductor having a portion inserted into the second through-hole and having a second conductor through which a second current flows, wherein one of the first current and the second current is: The other current is a current that returns to the inductor via the outside of the inductor, and the direction of the second current in the second through hole is opposite to the direction of the first current in the first through hole. It is.
 本開示の一態様に係る複合インダクタは、上述のインダクタを含む複合インダクタであって、前記第1導電体が前記第1貫通孔に挿通され、前記第2導電体が前記第2貫通孔に挿通された前記コアを複数備える。 A composite inductor according to an aspect of the present disclosure is a composite inductor including the above-described inductor, wherein the first conductor is inserted into the first through hole, and the second conductor is inserted into the second through hole. A plurality of said cores.
 本開示の一態様に係るDC/DCコンバータは、上述のインダクタ又は複合インダクタと、スイッチング素子と、一次巻線が前記スイッチング素子に直列に接続されたトランスとを備え、前記第1導電体は、前記トランスの二次巻線から外部へ流出する流出電流が第1電流として流れるように接続され、前記第2導電体は、外部から前記二次巻線に戻る戻り電流が前記第2電流として流れるように接続されている。 A DC / DC converter according to an aspect of the present disclosure includes the above-described inductor or composite inductor, a switching element, and a transformer having a primary winding connected in series to the switching element, wherein the first conductor includes: The outflow current flowing out of the secondary winding of the transformer to the outside is connected so as to flow as a first current, and the second conductor is a return current returning from the outside to the secondary winding as the second current. Connected.
 なお、本願は、このような特徴的な構成を備えるインダクタ、複合インダクタ及びDC/DCコンバータとして実現することができるだけでなく、DC/DCコンバータの一部を半導体集積回路として実現したり、インダクタ、複合インダクタ又はDC/DCコンバータを含むその他のシステムとして実現したりすることができる。 The present application can be realized not only as an inductor, a composite inductor, and a DC / DC converter having such a characteristic configuration, but also as a part of the DC / DC converter as a semiconductor integrated circuit, Or may be implemented as a composite inductor or other system including a DC / DC converter.
図1は、実施形態1に係るDC/DCコンバータの構成例を示すブロック図である。FIG. 1 is a block diagram illustrating a configuration example of the DC / DC converter according to the first embodiment. 図2は、トランスの一次側から二次側に電力を伝達する期間での動作状態の一例を示す説明図である。FIG. 2 is an explanatory diagram illustrating an example of an operation state during a period in which power is transmitted from the primary side to the secondary side of the transformer. 図3は、トランスの二次側で負荷電流が還流する期間での動作状態の一例を示す説明図である。FIG. 3 is an explanatory diagram illustrating an example of an operation state during a period in which the load current flows back on the secondary side of the transformer. 図4は、実施形態1に係るインダクタを斜め上方から見た斜視図である。FIG. 4 is a perspective view of the inductor according to the first embodiment as viewed obliquely from above. 図5Aは、図4のV-V線断面図であり、実施形態1に係るインダクタの組み立て後の状態を模式的に示す縦断面図である。FIG. 5A is a cross-sectional view taken along line VV of FIG. 4, and is a longitudinal cross-sectional view schematically illustrating a state after assembly of the inductor according to the first embodiment. 図5Bは、実施形態1に係るインダクタのコアに生じる磁束を示す図である。FIG. 5B is a diagram illustrating a magnetic flux generated in the core of the inductor according to the first embodiment. 図6は、実施形態2に係るインダクタを斜め上方から見た斜視図である。FIG. 6 is a perspective view of the inductor according to the second embodiment as viewed obliquely from above. 図7は、図6のVII-VII線断面図であり、実施形態2に係るインダクタの組み立て後の状態を模式的に示す縦断面図である。FIG. 7 is a cross-sectional view taken along line VII-VII of FIG. 6, and is a longitudinal cross-sectional view schematically illustrating a state after assembly of the inductor according to the second embodiment. 図8Aは、実施形態2に係る貫通孔の双方に挿通された第1導電体を示す平面図である。FIG. 8A is a plan view showing a first conductor inserted into both of the through holes according to the second embodiment. 図8Bは、実施形態2に係る貫通孔の双方に挿通された第2導電体を示す平面図である。FIG. 8B is a plan view illustrating the second conductor inserted into both of the through holes according to the second embodiment. 図9Aは、変形例1に係る貫通孔の全てに挿通された第1導電体を示す平面図である。FIG. 9A is a plan view showing the first conductor inserted into all of the through holes according to the first modification. 図9Bは、変形例1に係る貫通孔の全てに挿通された第2導電体を示す平面図である。FIG. 9B is a plan view showing the second conductor inserted through all of the through holes according to the first modification. 図10Aは、変形例2に係る貫通孔の一方に挿通された第1導電体を示す平面図である。FIG. 10A is a plan view showing a first conductor inserted into one of the through holes according to the second modification. 図10Bは、変形例2に係る貫通孔の両方に挿通された第2導電体を示す平面図である。FIG. 10B is a plan view showing the second conductor inserted into both of the through holes according to the second modification. 図11Aは、変形例3に係る貫通孔の一部に挿通された第1導電体を示す平面図である。FIG. 11A is a plan view showing a first conductor inserted into a part of a through hole according to Modification 3. 図11Bは、変形例3に係る貫通孔の全部に挿通された第2導電体を示す平面図である。FIG. 11B is a plan view showing a second conductor inserted through all of the through holes according to the third modification. 図12Aは、変形例4に係る第1導電体を模式的に示す平面図である。FIG. 12A is a plan view schematically illustrating a first conductor according to Modification Example 4. FIG. 図12Bは、変形例4に係る第2導電体を模式的に示す平面図である。FIG. 12B is a plan view schematically illustrating a second conductor according to Modification 4. 変形例5に係るインダクタを斜め上方から見た斜視図である。FIG. 14 is a perspective view of an inductor according to Modification Example 5 as viewed obliquely from above. 筐体に取り付けたインダクタを模式的に示す側面図である。It is a side view which shows the inductor attached to the housing | casing typically. 実施形態3に係るDC/DCコンバータの構成例を示すブロック図である。FIG. 11 is a block diagram illustrating a configuration example of a DC / DC converter according to a third embodiment. 印刷配線基板上に形成されたトランス及びインダクタを模式的に示す平面図である。FIG. 2 is a plan view schematically showing a transformer and an inductor formed on a printed wiring board. 図17Aは、実施形態1に係るDC/DCコンバータによるスイッチングノイズの周波数成分を示すグラフである。FIG. 17A is a graph illustrating frequency components of switching noise caused by the DC / DC converter according to the first embodiment. 図17Bは、実施形態3に係るDC/DCコンバータによるスイッチングノイズの周波数成分を示すグラフである。FIG. 17B is a graph illustrating frequency components of switching noise caused by the DC / DC converter according to the third embodiment. 図18は、実施形態4に係るDC/DCコンバータの構成例を示す回路図である。FIG. 18 is a circuit diagram illustrating a configuration example of a DC / DC converter according to the fourth embodiment.
[本開示における実施形態が解決しようとする課題]
 前述のように、特許文献1に記載のコンバータでは、二次側の回路の高圧電位側にインダクタが介装されている。このインダクタに必要とされるインダクタンスの大きさは、スイッチをオン/オフするスイッチング周波数に反比例するため、インダクタを小型化するにはスイッチング周波数を比較的高くしなければならない。
[Problems to be solved by embodiments of the present disclosure]
As described above, in the converter described in Patent Literature 1, the inductor is interposed on the high voltage side of the secondary circuit. Since the magnitude of the inductance required for this inductor is inversely proportional to the switching frequency at which the switch is turned on / off, the switching frequency must be relatively high in order to reduce the size of the inductor.
 しかしながら、コンバータにおけるスイッチのスイッチング周波数を高くするほどスイッチングロスが増加したり、配線が難しくなったりするトレードオフがあり、インダクタの小型化に必要とされるところまでスイッチング周波数を高くするには課題が多い。特に、コアに挿通する導体部を巻形状にしない場合は、必要なインダクタンスを確保することが困難であった。 However, as the switching frequency of the switch in the converter increases, there is a trade-off in that the switching loss increases and the wiring becomes difficult, and there is a problem in increasing the switching frequency to the point required for downsizing of the inductor. Many. In particular, it is difficult to secure a necessary inductance unless the conductor portion inserted into the core is formed in a wound shape.
 コアに挿通する導体を巻形状にしない場合であっても必要なインダクタンスを確保することが可能であることが望まれる。 It is desired that the required inductance can be ensured even when the conductor inserted into the core is not wound.
[本開示の実施形態の説明]
 最初に本開示の実施態様を列記して説明する。また、以下に記載する実施形態の少なくとも一部を任意に組み合わせてもよい。
[Description of Embodiment of the Present Disclosure]
First, embodiments of the present disclosure will be listed and described. Further, at least some of the embodiments described below may be arbitrarily combined.
(1)本開示の一態様に係るインダクタは、同一方向に貫通する第1貫通孔及び第2貫通孔を少なくとも有するコアと、前記第1貫通孔に挿通された部位を有し、第1電流が流れる第1導電体と、前記第2貫通孔に挿通された部位を有し、第2電流が流れる第2導電体と、を備え、前記第1電流及び前記第2電流のうちの一方の電流は、他方の電流が前記インダクタ外部を経由して前記インダクタへ戻る電流であり、前記第2貫通孔内における前記第2電流の向きは、前記第1貫通孔内における前記第1電流の向きとは逆である。 (1) An inductor according to an aspect of the present disclosure includes a core having at least a first through hole and a second through hole penetrating in the same direction, and a portion inserted into the first through hole, and a first current. A first conductor through which the second current flows, and a second conductor through which a second current flows, the first conductor having one of the first current and the second current. The current is a current in which the other current returns to the inductor via the outside of the inductor, and the direction of the second current in the second through hole is the direction of the first current in the first through hole. The opposite is true.
 本態様にあっては、コアには、同一方向に向く第1貫通孔及び第2貫通孔を含む少なくとも2つの貫通孔が形成されている。隣り合う2つの貫通孔に挿通された第1導電体及び第2導電体は、第1電流及び第2電流が逆向きに流れるように外部と接続される。これにより、隣り合う第1貫通孔と第2貫通孔の間におけるコア内で磁束が打ち消し合うことがない。一つの貫通孔だけを有するコアにおける1つの貫通孔に1つの導電体を挿通する場合と比較して、本態様のコアは、貫通孔の数だけインダクタンスが増大する。したがって、コアに挿通する導体を巻形状にしない場合であっても必要なインダクタンスを確保することが可能である。なお、第1電流は、例えば、所定の電流源からの流出電流である。第2電流は、例えば、前記電流源への戻り電流である。 In this aspect, at least two through holes including the first through hole and the second through hole facing in the same direction are formed in the core. The first conductor and the second conductor inserted into two adjacent through holes are connected to the outside such that the first current and the second current flow in opposite directions. Thus, the magnetic flux does not cancel each other in the core between the adjacent first through-hole and the second through-hole. Compared to a case where one conductor is inserted into one through hole in a core having only one through hole, the core of the present embodiment has an inductance that is increased by the number of through holes. Therefore, it is possible to secure necessary inductance even when the conductor inserted into the core is not wound. The first current is, for example, an outflow current from a predetermined current source. The second current is, for example, a return current to the current source.
(2)前記第1導電体は、前記第2貫通孔に挿通された部位を更に有することができる。前記第1電流は、前記第2貫通孔内において前記第2電流と同じ向きに流れることが好ましい。 (2) The first conductor may further include a portion inserted into the second through hole. It is preferable that the first current flows in the same direction as the second current in the second through hole.
 本態様にあっては、第2貫通孔に、第1導電体及び第2導電体の双方が挿通されている。そして、第2貫通孔内において、第1電流及び第2電流は、同じ向きに流れる。これにより、第2貫通孔に第1導電体及び第2導電体の双方が挿通された部位にて、起磁力F(F=NI:Nは巻数、Iは電流)が2倍に、インダクタンスが略4倍になる。 In this aspect, both the first conductor and the second conductor are inserted into the second through-hole. Then, the first current and the second current flow in the same direction in the second through hole. Thereby, at a portion where both the first conductor and the second conductor are inserted into the second through hole, the magnetomotive force F (F = NI: N is the number of turns, I is the current) is doubled, and the inductance is increased. It is about 4 times.
(3)前記第1導電体は、第1U字状部を有し、前記第1U字状部は、前記第1導電体が前記第1貫通孔に挿通された前記部位及び前記第2貫通孔に挿通された前記部位を含むことが好ましい。 (3) The first conductor has a first U-shaped portion, and the first U-shaped portion includes the portion where the first conductor is inserted into the first through hole and the second through hole. It is preferable to include the above-mentioned part penetrated.
 本態様にあっては、第1貫通孔及び第2貫通孔に挿通された部位及びこれらの部位を接続する部位がU字状をなしている。これにより、一部がU字状をなしている導電体が、平面視にて点対称又は線対称に近い比較的単純な形状となる。 In this aspect, the portions inserted into the first through-hole and the second through-hole and the portions connecting these portions are U-shaped. As a result, the conductor partially U-shaped has a relatively simple shape close to point symmetry or line symmetry in plan view.
(4)前記第2導電体は、前記第1U字状部に対して逆向きになるように配置された第2U字状部を有し、前記第2U字状部は、前記第2導電体が前記第1貫通孔に挿通された部位及び前記第2貫通孔に挿通された前記部位を含み、前記第2電流は、前記第1貫通孔内において前記第1電流と同じ向きに流れることが好ましい。 (4) The second conductor has a second U-shaped portion disposed so as to be opposite to the first U-shaped portion, and the second U-shaped portion is formed of the second conductor. Includes a portion inserted into the first through hole and the portion inserted into the second through hole, wherein the second current flows in the same direction as the first current in the first through hole. preferable.
 本態様にあっては、第1導電体及び第2導電体におけるU字状部が互いに逆向きに構成されている。これにより、第1導電体及び第2導電体の一端同士及び他端同士が貫通孔の貫通方向の両側に離隔されるため、外部との接続が容易となる。 In this aspect, the U-shaped portions of the first conductor and the second conductor are configured to be opposite to each other. Accordingly, one end and the other end of the first conductor and the second conductor are separated from each other on both sides in the through direction of the through hole, so that connection to the outside is facilitated.
(5)前記コアは、EE型、EI型及びER型の何れかであることが好ましい。 (5) The core is preferably any of EE type, EI type and ER type.
 本態様にあっては、突き合わせた状態で2つの貫通孔を有するEE型、EI型及びER型の何れかのコアを用いるため、広く普及しているコアが利用できる。 In this embodiment, any of the EE type, EI type and ER type cores having two through holes in abutted state is used, so that widely used cores can be used.
(6)前記第1導電体及び前記第2導電体の夫々は、断面が矩形状をなしていることが好ましい。 (6) It is preferable that each of the first conductor and the second conductor has a rectangular cross section.
 本態様にあっては、第1導電体及び第2導電体夫々の断面が矩形状であるため、断面の短辺方向の厚さを抑えることができる。また、第1導電体及び第2導電体夫々の断面積に対する表面積が大きいため放熱性が良好である。 In this aspect, since the cross section of each of the first conductor and the second conductor is rectangular, the thickness of the cross section in the short side direction can be suppressed. In addition, since the surface area with respect to the cross-sectional area of each of the first conductor and the second conductor is large, heat dissipation is good.
(7)前記第1導電体及び前記第2導電体は、印刷配線基板に含まれる導体パターンであることが好ましい。 (7) Preferably, the first conductor and the second conductor are conductor patterns included in a printed wiring board.
 本態様にあっては、印刷配線基板に含まれる導体パターンを第1導電体及び第2導電体として用いるため、周辺回路を含めて第1導電体及び第2導電体を容易に形成することができる。 In this aspect, since the conductor pattern included in the printed wiring board is used as the first conductor and the second conductor, the first conductor and the second conductor including the peripheral circuit can be easily formed. it can.
(8)前記コアは、フェライトコア又は圧粉コアであることが好ましい。フェライトコアは、磁性体を焼結して形成される。圧粉コアは、磁性体を含む粉末を加圧して形成される。 (8) The core is preferably a ferrite core or a dust core. The ferrite core is formed by sintering a magnetic material. The dust core is formed by pressing powder containing a magnetic material.
本態様にあっては、コアがフェライトコア又は圧粉コアであるため、高周波特性が良好である。なお、コアは、ナノ結晶軟磁性材料コアであってもよいし、アモルファスコアであってもよい。 In this embodiment, since the core is a ferrite core or a dust core, high-frequency characteristics are good. Note that the core may be a nanocrystalline soft magnetic material core or an amorphous core.
(9)インダクタは、伝熱材料を含む伝熱層を更に備え、前記伝熱層は、前記第1導電体及び前記第2導電体と、前記コアと、の間に配置されていることが好ましい。 (9) The inductor may further include a heat transfer layer containing a heat transfer material, wherein the heat transfer layer is disposed between the first conductor and the second conductor, and the core. preferable.
 本態様にあっては、第1導電体及び前記第2導電体と、前記コアと、の間に伝熱材料が介装されているため、導電体で発生した熱が貫通孔の外部に伝熱される。 In this aspect, since the heat transfer material is interposed between the first conductor and the second conductor and the core, heat generated in the conductor is transferred to the outside of the through hole. Get heated.
(10)前記コアは、互いに突き合わせ可能な一対のコア部材を備え、前記第1貫通孔及び第2貫通孔は、前記一対のコア部材を突き合せた状態で突合せ面に沿った方向に貫通しているのが好ましい。 (10) The core includes a pair of core members that can abut each other, and the first through hole and the second through hole penetrate in a direction along the abutting surface in a state where the pair of the core members abut each other. Is preferred.
(11)前記コアは、前記第1貫通孔と前記第2貫通孔との間に位置する中間部と、前記中間部よりも前記第1貫通孔側において前記第1貫通孔の周囲に位置する第1外周部と、前記中間部よりも前記第2貫通孔側において前記第2貫通孔の周囲に位置する第2外周部と、を有することができる。前記中間部の断面積は、前記第1外周部の断面積及び前記第2外周部の断面積よりも大きいことが好ましい。 (11) The core is located at an intermediate portion between the first through hole and the second through hole, and is located around the first through hole on the first through hole side of the intermediate portion. It can have a 1st outer peripheral part and a 2nd outer peripheral part located around the said 2nd through-hole in the said 2nd through-hole side rather than the said intermediate part. It is preferable that a cross-sectional area of the intermediate portion is larger than a cross-sectional area of the first outer peripheral portion and a cross-sectional area of the second outer peripheral portion.
 本態様にあっては、中間部は、第1貫通孔と第2貫通孔の間において磁束が通る磁路となる。このような中間部の断面積が大きいことで、インダクタンスを増大させることができる。 In this aspect, the intermediate portion is a magnetic path through which a magnetic flux passes between the first through hole and the second through hole. Such a large cross-sectional area of the intermediate portion can increase the inductance.
(12)本開示の一態様に係る複合インダクタは、上述のインダクタを含む複合インダクタであって、前記第1導電体が前記第1貫通孔に挿通され、前記第2導電体が前記第2貫通孔に挿通された前記コアを複数備える。 (12) A composite inductor according to an aspect of the present disclosure is a composite inductor including the above-described inductor, wherein the first conductor is inserted into the first through-hole, and the second conductor is connected to the second through-hole. A plurality of the cores are inserted through the holes.
 本態様にあっては、複数のコアによって全体のインダクタンスが複数のインダクタに分散されるため、各コアのサイズを小さくすることができる。 According to the present aspect, since the entire inductance is distributed to the plurality of inductors by the plurality of cores, the size of each core can be reduced.
(13)各コアの前記第1貫通孔に前記第1導電体が挿通され、各コアの前記第2貫通孔に前記第2導電体が挿通されることによって形成されるインダクタによる2端子対回路が縦続接続となるようにしてあることが好ましい。 (13) A two-terminal pair circuit formed by an inductor formed by inserting the first conductor into the first through hole of each core and inserting the second conductor into the second through hole of each core. Are preferably cascaded.
 本態様にあっては、コアの第1貫通孔及び第2貫通孔に第1導電体及び第2導電体が挿通されて形成されるインダクタが2つのインダクタンス要素を含む2端子対回路と見なされ、各2端子対回路が縦続接続されている。これにより、各インダクタからの出力が後段のインダクタの入力に引き継がれる。 In this aspect, the inductor formed by inserting the first conductor and the second conductor into the first through hole and the second through hole of the core is regarded as a two-terminal pair circuit including two inductance elements. , Each two-terminal pair circuit is cascaded. As a result, the output from each inductor is taken over by the input of the subsequent inductor.
(14)少なくとも1つの前記2端子対回路における一方の端子対にキャパシタを接続してあることが好ましい。 (14) It is preferable that a capacitor is connected to one terminal pair in at least one of the two-terminal pair circuits.
 本態様にあっては、縦続接続された複数の2端子対回路における少なくとも1つの端子対にキャパシタが接続されているため、低域通過フィルタが形成される。 In this embodiment, since the capacitor is connected to at least one terminal pair in the cascade-connected two-terminal pair circuit, a low-pass filter is formed.
(15)本開示の一態様に係るDC/DCコンバータは、上述のインダクタと、スイッチング素子と、一次巻線が前記スイッチング素子に直列に接続されたトランスとを備え、前記第1導電体は、前記トランスの二次巻線から外部へ流出する流出電流が第1電流として流れるように接続され、前記第2導電体は、外部から前記二次巻線に戻る戻り電流が前記第2電流として流れるように接続されている。 (15) A DC / DC converter according to an aspect of the present disclosure includes the above-described inductor, a switching element, and a transformer having a primary winding connected in series to the switching element. The outflow current flowing out of the secondary winding of the transformer to the outside is connected so as to flow as a first current, and the second conductor is a return current returning from the outside to the secondary winding as the second current. Connected.
 本態様にあっては、トランスの一次巻線にスイッチング素子が直列に接続され、トランスの二次巻線に対する流出電流及び戻り電流がインダクタの第1導電体及び第2導電体に流れる。これにより、スイッチング素子がオン/オフしたときにトランスの二次巻線に電流が誘起し、この電流が上述のインダクタにおける第1導電体及び第2導電体に流れるため、出力電流が効果的に平滑される。 In this embodiment, the switching element is connected in series to the primary winding of the transformer, and the outflow current and return current to the secondary winding of the transformer flow through the first and second conductors of the inductor. As a result, when the switching element is turned on / off, a current is induced in the secondary winding of the transformer, and this current flows through the first conductor and the second conductor of the inductor, so that the output current is effectively reduced. Smoothed.
(16)本開示の一態様に係るDC/DCコンバータは、上述の複合インダクタと、スイッチング素子と、一次巻線が前記スイッチング素子に直列に接続されたトランスとを備え、前記第1導電体は、前記トランスの二次巻線から外部へ流出する流出電流として流れるように接続され、前記第2導電体は、外部から前記二次巻線に戻る戻り電流が前記第2電流として流れるように接続されている。 (16) A DC / DC converter according to an aspect of the present disclosure includes the above-described composite inductor, a switching element, and a transformer having a primary winding connected in series to the switching element. The second conductor is connected such that a return current returning from the outside to the secondary winding flows as the second current. Have been.
 本態様にあっては、トランスの一次巻線にスイッチング素子が直列に接続され、トランスの二次巻線に対する流出電流及び戻り電流が複合インダクタの第1導電体及び第2導電体に流れる。これにより、スイッチング素子がオン/オフしたときにトランスの二次巻線に電流が誘起し、この電流が上述の複合インダクタにおける第1導電体及び第2導電体に流れるため、出力電流が効果的に平滑される。 In this embodiment, the switching element is connected in series to the primary winding of the transformer, and the outflow current and return current to the secondary winding of the transformer flow through the first conductor and the second conductor of the composite inductor. Thereby, when the switching element is turned on / off, a current is induced in the secondary winding of the transformer, and this current flows through the first conductor and the second conductor in the above-described composite inductor, so that the output current is effectively reduced. Is smoothed.
(17)前記第1導電体は、前記二次巻線と一体的に形成されており、前記第1導電体及び前記第2導電体の少なくとも一方が出力側の電路と一体的に形成されていることが好ましい。 (17) The first conductor is formed integrally with the secondary winding, and at least one of the first conductor and the second conductor is formed integrally with an output-side electric path. Is preferred.
 本態様にあっては、第1導電体がトランスの二次巻線と一体的に形成され、第1導電体及び第2導電体の少なくとも一方が出力側の電路と一体的に形成されるため、部品間の接合箇所を削減することができる。なお、第1導電体及び第2導電体の両方が、出力側の電路と一体的に形成されてもよい。 In this aspect, the first conductor is formed integrally with the secondary winding of the transformer, and at least one of the first conductor and the second conductor is formed integrally with the output-side electric circuit. Thus, the number of joints between components can be reduced. Note that both the first conductor and the second conductor may be formed integrally with the electric circuit on the output side.
(18)本開示の一態様に係るDC/DCコンバータは、上述のインダクタと、スイッチング素子と、一次巻線を有するトランスと、を備え、少なくとも、前記スイッチング素子と、前記インダクタと、前記一次巻線と、が直列接続されている。 (18) A DC / DC converter according to an aspect of the present disclosure includes the above-described inductor, a switching element, and a transformer having a primary winding, and at least the switching element, the inductor, and the primary winding. And are connected in series.
 本態様にあっては、インダクタと、スイッチング素子と、一次巻線と、が直列接続されているため、スイッチング素子がオン/オフしたときに、インダクタを介して、トランスの一次巻線に電流が流れる。 In this aspect, since the inductor, the switching element, and the primary winding are connected in series, when the switching element is turned on / off, a current flows to the primary winding of the transformer via the inductor. Flows.
(19)本開示の一態様に係る回路は、上述のインダクタと、前記インダクタ外部において、前記第1導電体及び前記第2導電体に直列接続された回路素子と、を備える。 (19) A circuit according to an aspect of the present disclosure includes the above-described inductor, and a circuit element connected in series to the first conductor and the second conductor outside the inductor.
 本態様にあっては、前記第1導電体と、前記回路素子と、前記第2導電体と、が直列接続されているため、第1電流又は第2電流の一方の電流が、回路素子を通ることで、第2電流となる。 In the present aspect, since the first conductor, the circuit element, and the second conductor are connected in series, one of the first current and the second current flows through the circuit element. Passing it becomes the second current.
[本開示の実施形態の詳細]
本開示の実施形態に係るインダクタ、複合インダクタ及びDC/DCコンバータの具体例を、以下に図面を参照しつつ説明する。なお、本発明はこれらの例示に限定されるものではなく、特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。また、各実施形態で記載されている技術的特徴は、お互いに組み合わせることが可能である。
[Details of Embodiment of the Present Disclosure]
Specific examples of the inductor, the composite inductor, and the DC / DC converter according to the embodiment of the present disclosure will be described below with reference to the drawings. It should be noted that the present invention is not limited to these exemplifications, but is indicated by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims. Further, the technical features described in each embodiment can be combined with each other.
(実施形態1)
 図1は、実施形態1に係るDC/DCコンバータ100の構成例を示すブロック図である。DC/DCコンバータ100は、トランス10を備え、入力側の端子A及びBの電位と出力側の端子C及びDの電位とがトランス10によって分離されている。入力側の端子A及びB間には、キャパシタ20が接続されており、外部の直流電源(不図示)から所定電圧が印加される。出力側の端子C及びD間には、キャパシタ21が接続されており、更に外部の負荷が接続される。端子Dは例えば接地電位に接続されている。
(Embodiment 1)
FIG. 1 is a block diagram illustrating a configuration example of the DC / DC converter 100 according to the first embodiment. The DC / DC converter 100 includes a transformer 10, and the potential of the input-side terminals A and B and the potential of the output-side terminals C and D are separated by the transformer 10. A capacitor 20 is connected between the terminals A and B on the input side, and a predetermined voltage is applied from an external DC power supply (not shown). A capacitor 21 is connected between the output side terminals C and D, and an external load is further connected. The terminal D is connected to, for example, the ground potential.
 DC/DCコンバータ100は、また、トランス10の一次巻線11の一端及び端子B間に接続されたNch型のMOSFET(Metal Oxide Semiconductor Field Effect Transistor:以下、FETと言う)31(スイッチング素子に相当)と、一次巻線11の一端及び端子A間に接続されたFET32及びキャパシタ22の直列回路と、FET31及び32のオン/オフを制御する制御部4とを備える。一次巻線11は、他端が端子Aに接続されている。FET31及び32は、バイポーラトランジスタ、IGBT(Insulated Gate Bipolar Transistor)等の他のスイッチング素子であってもよい。 The DC / DC converter 100 also includes an Nch-type MOSFET (Metal Oxide Semiconductor Connector Field Effect Transistor: hereinafter referred to as an FET) 31 (corresponding to a switching element) connected between one end of the primary winding 11 of the transformer 10 and the terminal B. ), A series circuit of the FET 32 and the capacitor 22 connected between one end of the primary winding 11 and the terminal A, and a control unit 4 for controlling on / off of the FETs 31 and 32. The other end of the primary winding 11 is connected to the terminal A. The FETs 31 and 32 may be other switching elements such as a bipolar transistor and an IGBT (Insulated Gate Bipolar Transistor).
 FET31は、ドレインが一次巻線11の一端に接続され、ソースが端子Bに接続され、ゲートが制御部4に接続されている。FET32は、ドレインがキャパシタ22の一端に接続され、ソースが一次巻線11の一端に接続され、ゲートが制御部4に接続されている。キャパシタ22の他端は、端子Aに接続されている。FET31及び32の夫々は、両端に逆並列に接続されたボディダイオードを有する。アクティブクランプ回路を構成するFET32及びキャパシタ22は、直列に接続する順序を入れ換えてもよい。 The FET 31 has a drain connected to one end of the primary winding 11, a source connected to the terminal B, and a gate connected to the control unit 4. The FET 32 has a drain connected to one end of the capacitor 22, a source connected to one end of the primary winding 11, and a gate connected to the control unit 4. The other end of the capacitor 22 is connected to the terminal A. Each of the FETs 31 and 32 has a body diode connected in anti-parallel at both ends. The order in which the FET 32 and the capacitor 22 constituting the active clamp circuit are connected in series may be changed.
 トランス10の二次巻線12は、一端にダイオード51のカソードが接続され、他端にダイオード52のカソードが接続されている。ダイオード52のカソードは、更に、チョークコイルとしてのインダクタ6に含まれる導電体61を介してキャパシタ21の一端及び端子Cに接続されている。ダイオード51及び52のアノードは、インダクタ6に含まれる導電体62を介してキャパシタ21の他端及び端子Dに接続されている。 The secondary winding 12 of the transformer 10 has one end connected to the cathode of the diode 51 and the other end connected to the cathode of the diode 52. The cathode of the diode 52 is further connected to one end of the capacitor 21 and the terminal C via a conductor 61 included in the inductor 6 as a choke coil. The anodes of the diodes 51 and 52 are connected to the other end of the capacitor 21 and the terminal D via a conductor 62 included in the inductor 6.
 インダクタ6は、コア及び導電体61,62を含んで一体化されている。なお、回路図上は、インダクタ6はコアにコイルが巻回されたものであるかのように表されているが、本実施形態1では、導電体61,62がコイルに相当する。インダクタ6の詳細については後述する。 The inductor 6 is integrated with the core and the conductors 61 and 62. In the circuit diagram, the inductor 6 is represented as if a coil is wound around a core. However, in the first embodiment, the conductors 61 and 62 correspond to the coil. Details of the inductor 6 will be described later.
 上述の構成を有するDC/DCコンバータ100は、いわゆる1石式のフォワードコンバータであり、端子A及びBから供給される所定電圧を{(FET31のデューティ比)/(トランス10の巻数比)}倍に変換した電圧を端子C及びDから出力する。DC/DCコンバータ100は、1石式に限定されず、多石式のプッシュプル方式、ハーフブリッジ方式及びフルブリッジ方式の何れかであってもよい。多石式の例については、方式そのものが公知であるため、記載を省略する。 The DC / DC converter 100 having the above-described configuration is a so-called single-rock type forward converter, and multiplies a predetermined voltage supplied from the terminals A and B by {(duty ratio of the FET 31) / (turn ratio of the transformer 10)}. Are output from terminals C and D. The DC / DC converter 100 is not limited to a single-stone type, and may be any of a multi-stone type push-pull type, a half-bridge type, and a full-bridge type. The description of the example of the multiple stone type is omitted since the type itself is known.
 本実施形態1では、FET31を所定の周期でPWM(Pulse Width Modulation)制御することにより、電圧変換を行う。そこで、先ずDC/DCコンバータ100の電圧変換動作について説明する。以下の図2及び3では、キャパシタ20、制御部4、及び端子C,Dの図示を省略する。 In the first embodiment, voltage conversion is performed by performing PWM (Pulse Width Modulation) control on the FET 31 at a predetermined cycle. Therefore, the voltage conversion operation of the DC / DC converter 100 will be described first. 2 and 3, the illustration of the capacitor 20, the control unit 4, and the terminals C and D is omitted.
 図2は、トランス10の一次側から二次側に電力を伝達する期間での動作状態の一例を示す説明図である。この期間では、制御部4の制御によってFET31がオンとなり、FET32はオフとなる。そして、端子A及びBからトランス10の一次巻線11に所定電圧が印加されて二次巻線12に一定の電圧が誘起し、ダイオード51が導通してインダクタ6に直線的に増加する負荷電流が流れる。この間に、二次巻線12(所定の電流源に相当)から導電体61を介してキャパシタ21及び負荷に流れる電流(実質的な出力電流)を流出電流とし、キャパシタ21及び負荷から導電体62を介して二次巻線12に戻る電流(所謂リターンパスを流れる電流)を戻り電流とする。流出電流及び戻り電流の大きさは同じである。 FIG. 2 is an explanatory diagram illustrating an example of an operation state during a period in which power is transmitted from the primary side to the secondary side of the transformer 10. During this period, the FET 31 is turned on and the FET 32 is turned off under the control of the control unit 4. Then, a predetermined voltage is applied to the primary winding 11 of the transformer 10 from the terminals A and B to induce a constant voltage in the secondary winding 12, the diode 51 conducts, and the load current that increases linearly in the inductor 6. Flows. During this time, a current (substantial output current) flowing from the secondary winding 12 (corresponding to a predetermined current source) to the capacitor 21 and the load via the conductor 61 is set as an outflow current, and the conductor 62 is transferred from the capacitor 21 and the load. (Current flowing through a so-called return path) that returns to the secondary winding 12 via the control circuit is defined as a return current. The magnitudes of the outflow current and the return current are the same.
 一方、一次巻線11には、負荷電流(より正確には、二次側の負荷電流の大きさをトランス10の巻数比で除した大きさの電流)及び励磁電流を足し合わせた電流が直線的に増加するように流れる。一次巻線11及び二次巻線12夫々に流れる負荷電流による磁束はお互いに打消し合うのに対し、励磁電流はトランス10のコア内に磁束を作る。キャパシタ22には、現在のPWM周期に至るまでの間に、FET32のドレイン側を正とする電圧が充電されている。以下では、説明上、一次巻線11の一端に対して他端の電位が高い場合を正の電圧とする。また、一次巻線11の他端から一端に流れる電流を正の電流とする。 On the other hand, a current obtained by adding the load current (more precisely, the current obtained by dividing the magnitude of the load current on the secondary side by the turns ratio of the transformer 10) and the exciting current is applied to the primary winding 11 in a straight line. Flows to increase gradually. The magnetic flux due to the load current flowing through each of the primary winding 11 and the secondary winding 12 cancels each other, while the exciting current creates a magnetic flux in the core of the transformer 10. The capacitor 22 is charged with a voltage that makes the drain side of the FET 32 positive until the current PWM cycle. Hereinafter, for the sake of explanation, a case where the potential of the other end is higher than the one end of the primary winding 11 is defined as a positive voltage. The current flowing from the other end of the primary winding 11 to one end is defined as a positive current.
 図3は、トランス10の二次側で負荷電流が還流する期間での動作状態の一例を示す説明図である。この期間の初めにFET31がオフとなり、FET31に負荷電流及び励磁電流が流れなくなって、FET32のボディダイオードに正の励磁電流が転流する(実線参照)。転流した励磁電流は直線的に減少するが、励磁電流の向きが正である間はキャパシタ22が充電される。一方の二次巻線12にダイオード51を介して流れていた負荷電流は、ダイオード52を介して流れるように還流する。 FIG. 3 is an explanatory diagram showing an example of an operation state during a period in which the load current flows on the secondary side of the transformer 10. At the beginning of this period, the FET 31 is turned off, the load current and the exciting current stop flowing through the FET 31, and the positive exciting current commutates to the body diode of the FET 32 (see the solid line). Although the commutated exciting current decreases linearly, the capacitor 22 is charged while the direction of the exciting current is positive. The load current flowing through one secondary winding 12 via the diode 51 flows back through the diode 52.
 その後、制御部4の制御によってFET32がオンとなり、FET32のボディダイオードに流れていた励磁電流は、チャネル領域を流れるようになるが、励磁電流は依然として減少し続ける。図3に示す期間の全期間を通じてキャパシタ22から一次巻線11に負の電圧が印加されるため、励磁電流は、直線的に減少して上記全期間の中程で極性が正から負に反転する(破線参照)。この時にキャパシタ22が放電に転じる。そして、FET32がオンである期間の終了時点でトランス10に蓄えられたエネルギーの放出が終了する。トランス10の二次側の負荷電流は、依然としてダイオード52を介して還流し続ける。 (4) Thereafter, the FET 32 is turned on by the control of the control unit 4, and the exciting current flowing through the body diode of the FET 32 flows through the channel region, but the exciting current continues to decrease. Since a negative voltage is applied from the capacitor 22 to the primary winding 11 throughout the period shown in FIG. 3, the exciting current decreases linearly and the polarity is inverted from positive to negative in the middle of the entire period. (See broken line). At this time, the capacitor 22 starts discharging. Then, at the end of the period in which the FET 32 is on, the release of the energy stored in the transformer 10 ends. The load current on the secondary side of the transformer 10 continues to flow back through the diode 52.
 次に、インダクタ6の詳細について説明する。図4は、実施形態1に係るインダクタ6を斜め上方から見た斜視図であり、図5Aは、実施形態1に係るインダクタ6の組み立て後の状態を模式的に示す縦断面図である。インダクタ6は、EI型のコア63,64の突き合わせ面X-Xに沿って貫通方向が同一方向に揃った貫通孔60a,60bが形成されている。一対の貫通孔60a,60bのうちの一方を、第1貫通孔60aといい、他方を、第2貫通孔60bという。該貫通孔60a,60b夫々に一対の導電体61,62が各別に挿通されている。一対の導電体61,62のうち、第1貫通孔60aに挿通された導電体を第1導電体61といい、第2貫通孔60bに挿通された導電体を第2導電体62という。 Next, details of the inductor 6 will be described. FIG. 4 is a perspective view of the inductor 6 according to the first embodiment viewed obliquely from above, and FIG. 5A is a longitudinal sectional view schematically illustrating a state after the assembly of the inductor 6 according to the first embodiment. In the inductor 6, through holes 60a and 60b whose through directions are aligned in the same direction are formed along the mating surface XX of the EI type cores 63 and 64. One of the pair of through holes 60a and 60b is referred to as a first through hole 60a, and the other is referred to as a second through hole 60b. A pair of conductors 61 and 62 are respectively inserted into the through holes 60a and 60b. Of the pair of conductors 61 and 62, the conductor inserted through the first through hole 60a is referred to as a first conductor 61, and the conductor inserted through the second through hole 60b is referred to as a second conductor 62.
 第1導電体61を流れる電流を第1電流といい、第2導電体62を流れる電流を第2電流という。ここでは、第1電流は、流出電流であり、第2電流は、戻り電流である。第2電流は、第1電流が、インダクタ6外部の回路素子である負荷を経由して、インダクタ6に戻る電流である。また、第1電流は、第2電流が、インダクタ6外部の回路素子である二次巻線12又はダイオード52を経由して、インダクタ6に戻る電流であると考えてもよい。 電流 A current flowing through the first conductor 61 is called a first current, and a current flowing through the second conductor 62 is called a second current. Here, the first current is an outflow current, and the second current is a return current. The second current is a current in which the first current returns to the inductor 6 via a load which is a circuit element outside the inductor 6. Further, the first current may be considered to be a current that returns to the inductor 6 via the secondary winding 12 or the diode 52 that is a circuit element outside the inductor 6.
 コア(磁性コア)63,64は、磁性体を含む。コア63,64は、一対のコア部材63,64を突き合せて構成されている。一対のコア部材63,64のうちの一方を第1コア部材63といい、他方を第2コア部材という。なお、以下では、第1コア部材63を単にコア63と呼び、第2コア部材64を単にコア64と呼ぶことがある。さらに、一対のコア部材63,64を一対のコア63,64と呼ぶことがある。一対のコア63,64は、例えばEE型、ER型等の他の形状を有するものであってもよい。 The cores (magnetic cores) 63 and 64 include a magnetic material. The cores 63 and 64 are configured by abutting a pair of core members 63 and 64. One of the pair of core members 63 and 64 is referred to as a first core member 63, and the other is referred to as a second core member. Hereinafter, the first core member 63 may be simply referred to as a core 63, and the second core member 64 may be simply referred to as a core 64. Further, the pair of core members 63 and 64 may be referred to as a pair of cores 63 and 64. The pair of cores 63 and 64 may have other shapes such as an EE type and an ER type.
 図5Bは、実施形態1におけるコア63,64において生じる磁束を示している。コアは、第1貫通孔60aと第2貫通孔60bとの間に位置する中間部160を備える。また、コアは、中間部160よりも第1貫通孔60a側において、第1貫通孔60aの周囲に位置する第1外周部161を備える。さらに、コアは、中間部160よりも第2貫通孔60b側において、第1貫通孔60bの周囲に位置する第2外周部162を備える。 FIG. 5B shows the magnetic flux generated in the cores 63 and 64 in the first embodiment. The core includes an intermediate portion 160 located between the first through hole 60a and the second through hole 60b. Further, the core includes a first outer peripheral portion 161 located around the first through hole 60a on the first through hole 60a side with respect to the intermediate portion 160. Further, the core includes a second outer peripheral portion 162 located around the first through hole 60b on the second through hole 60b side of the intermediate portion 160.
 図5Bにおいて、第1導電体61を流れる流出電流は、図5Bにおける紙面奥側から手前に向けて流れる。第2導電体62を流れる戻り電流は、図5Bにおける紙面手前側から奥側に向けて流れる。第1導電体61を流れる流出電流により生じる磁束M1が通る磁路は、中間部160及び第1外周部161を周回するように形成される。また、第2導電体62を流れる戻り電流により生じる磁束M2が通る磁路は、中間部160及び第2外周部161を周回するように形成される。 5B, in FIG. 5B, the outflow current flowing through the first conductor 61 flows from the back side to the front side in FIG. 5B. The return current flowing through the second conductor 62 flows from the near side to the far side in FIG. 5B. The magnetic path through which the magnetic flux M1 generated by the outflow current flowing through the first conductor 61 passes is formed so as to go around the intermediate portion 160 and the first outer peripheral portion 161. The magnetic path through which the magnetic flux M2 generated by the return current flowing through the second conductor 62 passes is formed so as to go around the intermediate portion 160 and the second outer peripheral portion 161.
 コアは、中間部160の断面積S1が、第1外周部161の断面積S2及び第2外周部162の断面積S2よりも大きくなるよう構成されている。磁束が多く通る中間部160の断面積を大きくすることで、インダクタ6のインダクタンスを増大させることができる。中間部160の断面積S1は、断面積S2の1.5倍以上、3倍以下が好ましい。断面積S1は、断面積S2の2倍以上、3倍以下がより好ましい。 The core is configured such that the cross-sectional area S1 of the intermediate portion 160 is larger than the cross-sectional area S2 of the first outer peripheral portion 161 and the cross-sectional area S2 of the second outer peripheral portion 162. By increasing the cross-sectional area of the intermediate portion 160 through which a large amount of magnetic flux passes, the inductance of the inductor 6 can be increased. The cross-sectional area S1 of the intermediate portion 160 is preferably 1.5 times or more and 3 times or less the cross-sectional area S2. The cross-sectional area S1 is more preferably twice or more and three or less times the cross-sectional area S2.
 導電体61,62は、断面が矩形状の平角銅線又はバスバーであり、アスペクト比(長辺と短辺の比率)は、例えば2:1から20:1の範囲内であるが、これに限定されるものではない。このように断面を矩形状にしてアスペクト比を大きくすることにより、導電体61,62の放熱が容易となる。 The conductors 61 and 62 are rectangular copper wires or bus bars having a rectangular cross section, and the aspect ratio (the ratio of the long side to the short side) is, for example, in the range of 2: 1 to 20: 1. It is not limited. By thus increasing the aspect ratio by making the cross section rectangular, heat dissipation of the conductors 61 and 62 becomes easy.
 コア63,64は、材料が、磁性体を焼結して形成したフェライト又は磁性体を含む粉末を加圧して形成した圧粉形成体であるため、高周波特性が良好である。つまり、コア63,64は、フェライトコア又は圧粉コアである。コア63,64の材料はこれらに限定されず、例えば、軟質磁性体の粉末及び樹脂を含む複合材料であってもよいし、板状の磁性体を積層した積層体であってもよい。コア63,64は、ナノ結晶軟磁性材料コアであってもよいし、アモルファスコアであってもよい。 (4) Since the cores 63 and 64 are made of a powder compact formed by pressing a powder containing a ferrite or a magnetic material formed by sintering a magnetic material, the cores 63 and 64 have good high-frequency characteristics. That is, the cores 63 and 64 are ferrite cores or dust cores. The material of the cores 63 and 64 is not limited to these, and may be, for example, a composite material containing a powder of a soft magnetic material and a resin, or may be a laminate in which plate-like magnetic materials are laminated. The cores 63 and 64 may be nanocrystalline soft magnetic material cores or amorphous cores.
 導電体61,62とコア63,64との間には、絶縁層66が配されている。絶縁層65,66の材料が、例えばシリコンシート等の放熱材料である場合は、導電体61,62の放熱が良好となる。ここでは、導電体61,62と絶縁層66との間に、すなわち、導電体61,62とコア63,64との間に、例えばカーボンシート等の伝熱材料を含む伝熱層67,67を更に設けてある。 絶 縁 An insulating layer 66 is provided between the conductors 61 and 62 and the cores 63 and 64. When the material of the insulating layers 65 and 66 is a heat dissipation material such as a silicon sheet, the heat dissipation of the conductors 61 and 62 is improved. Here, between the conductors 61, 62 and the insulating layer 66, that is, between the conductors 61, 62 and the cores 63, 64, for example, the heat transfer layers 67, 67 containing a heat transfer material such as a carbon sheet. Is further provided.
 インダクタ6の組み立て段階では、コア63,64を突き合わせる前に、コア64における貫通孔60a,60b夫々が形成されるべき位置に導電体61,62が載置され、その後、コア64にコア63が突き合わされて組み立てられる。インダクタ6を周辺回路と接続する場合は、導電体61に流れる流出電流及び導電体62に流れる戻り電流が、貫通孔60a,60bの貫通方向に対して互いに逆方向に流れるように考慮される。 At the stage of assembling the inductor 6, the conductors 61 and 62 are placed at positions where the through holes 60 a and 60 b are to be formed in the core 64 before butting the cores 63 and 64. Are assembled together. When the inductor 6 is connected to the peripheral circuit, it is considered that the outflow current flowing through the conductor 61 and the return current flowing through the conductor 62 flow in directions opposite to each other with respect to the direction in which the through holes 60a and 60b penetrate.
 次に、上記のように構成されたインダクタ6の適用範囲と性能について説明する。一般的にフォワード型のDC/DCコンバータのチョークコイルは、必要とされるインダクタンスがスイッチング周波数に反比例し、スイッチング周波数が低い場合はコイルを巻形状ではない導体に置き換えることができなくなる。このため、本実施形態1では、制御部4によるFET31,32のスイッチング周波数を300kHz~3MHzの範囲内と想定し、インダクタ6に必要なインダクタンスを0.1μH~3μHの範囲内と想定する。 Next, the applicable range and performance of the inductor 6 configured as described above will be described. Generally, in a choke coil of a forward type DC / DC converter, required inductance is inversely proportional to a switching frequency, and when the switching frequency is low, the coil cannot be replaced with a conductor having no winding shape. Therefore, in the first embodiment, it is assumed that the switching frequency of the FETs 31 and 32 by the control unit 4 is in the range of 300 kHz to 3 MHz, and that the inductance required for the inductor 6 is in the range of 0.1 μH to 3 μH.
 導電体61,62夫々に流れる流出電流及び戻り電流の大きさは、30A~250Aの範囲内と想定する。このような大電流が流れる場合であっても、インダクタ6の導電体61,62を巻形状にする必要がないため、放熱が比較的容易である。 (4) It is assumed that the magnitude of the outflow current and return current flowing through each of the conductors 61 and 62 is in the range of 30A to 250A. Even when such a large current flows, the conductors 61 and 62 of the inductor 6 do not need to be formed in a winding shape, so that heat radiation is relatively easy.
 図4に示すように、貫通孔60a,60b夫々に挿通された導電体61,62に流れる電流が互いに逆方向であり、貫通孔60a及び60bの間のコア内で磁束が打ち消し合うことがない。従って、一対のコア63,64の大きさが、1つの貫通孔を有する他のコアを2つ横に並べた大きさと略等しければ、インダクタ6のインダクタンスは、上記他のコアに1つの導電体を挿通させたインダクタのインダクタンスの略2倍となる。 As shown in FIG. 4, the currents flowing through the conductors 61 and 62 inserted in the through holes 60a and 60b are opposite to each other, and the magnetic flux does not cancel out in the core between the through holes 60a and 60b. . Therefore, if the size of the pair of cores 63 and 64 is substantially equal to the size of two other cores having one through hole arranged side by side, the inductance of the inductor 6 will be one conductor Is approximately twice as large as the inductance of the inductor through which.
 なお、本実施形態1にあっては、貫通孔60a,60bの数が2つであったが、3つ以上であってもよい。例えば、2つのコアを突き合わせた状態で貫通孔60bに隣り合う第3の貫通孔が形成されるようにし、第3の貫通孔にも導電体61を挿通しておく。更に、貫通孔60aに隣り合う第4の貫通孔が形成されるようにした場合は、第4の貫通孔にも導電体62を挿通しておく。このように貫通孔の数を増やした場合、各貫通孔に1つの導電体が挿通されている状態に着目すれば、貫通孔の数に略比例してインダクタンスが増大する。 In the first embodiment, the number of the through holes 60a and 60b is two, but may be three or more. For example, a third through-hole adjacent to the through-hole 60b is formed with the two cores abutting each other, and the conductor 61 is inserted through the third through-hole. Further, when a fourth through-hole adjacent to the through-hole 60a is formed, the conductor 62 is also inserted through the fourth through-hole. When the number of through-holes is increased in this way, focusing on the state where one conductor is inserted into each through-hole, the inductance increases substantially in proportion to the number of through-holes.
 また、導電体61,62として平角銅線又はバスバーを用いたが、導電体61,62を、印刷配線基板における導体パターンで形成してもよい。この場合、エポキシ樹脂及びガラス繊維を含むプリプレグで絶縁層66の一部を置き換えたり、基板表面のレジスト層で絶縁層66の一部を置き換えたりすることができる。 Although rectangular copper wires or bus bars are used as the conductors 61 and 62, the conductors 61 and 62 may be formed by a conductor pattern on a printed wiring board. In this case, a part of the insulating layer 66 can be replaced with a prepreg containing epoxy resin and glass fiber, or a part of the insulating layer 66 can be replaced with a resist layer on the substrate surface.
 以上のように本実施形態1によれば、磁性体を含む一対のコア63,64を突き合わせた突き合わせ面X-Xに沿って同一方向に向くように貫通孔60a,60bが形成されており、隣り合う2つの貫通孔60a,60b夫々に挿通された一対の導電体61,62には、トランス10の二次巻線12からの流出電流及び二次巻線12への戻り電流が、貫通孔60a,60bの貫通方向に対して逆方向に流れる。これにより、隣り合う貫通孔60a及び60bの間のコア内で磁束が打ち消し合うことがなく、他のコアにおける1つの貫通孔に1つの導電体を挿通する場合と比較して、貫通孔の数に略比例してインダクタンスが増大する。従って、コア63,64に挿通する導体を巻形状にしない場合であっても必要なインダクタンスを確保することが可能となる。 As described above, according to the first embodiment, the through- holes 60a and 60b are formed so as to face in the same direction along the butting surface XX where the pair of cores 63 and 64 including the magnetic material are butted. The outflow current from the secondary winding 12 of the transformer 10 and the return current to the secondary winding 12 are supplied to the pair of conductors 61 and 62 inserted into the two adjacent through holes 60a and 60b, respectively. It flows in a direction opposite to the penetration direction of 60a, 60b. As a result, the magnetic flux does not cancel out in the core between the adjacent through holes 60a and 60b, and the number of through holes is smaller than when one conductor is inserted into one through hole in another core. , The inductance increases substantially in proportion to. Therefore, even when the conductor inserted into the cores 63 and 64 is not wound, it is possible to secure necessary inductance.
 また、実施形態1によれば、一対の導電体61,62夫々の断面が矩形状であるため、断面の短辺方向の厚さを抑えることができ、インダクタ6の高さを抑えることができる。また、一対の導電体61,62夫々の断面積に対する表面積が大きいため、放熱性が良好となる。 Further, according to the first embodiment, since the cross section of each of the pair of conductors 61 and 62 is rectangular, the thickness of the cross section in the short side direction can be suppressed, and the height of the inductor 6 can be suppressed. . Further, since the surface area with respect to the cross-sectional area of each of the pair of conductors 61 and 62 is large, the heat dissipation is improved.
 更に、実施形態1によれば、印刷配線基板に含まれる導体パターンを一対の導電体61,62として用いる場合は、周辺回路を含めて一対の導電体61,62を容易に形成することができる。 Further, according to the first embodiment, when the conductor pattern included in the printed wiring board is used as the pair of conductors 61 and 62, the pair of conductors 61 and 62 including the peripheral circuit can be easily formed. .
 更に、実施形態1によれば、コア63,64の材料にフェライト又は圧粉形成体を用いるため、高周波特性が良好である。 According to the first embodiment, since the ferrite or the compact is used as the material of the cores 63 and 64, the high frequency characteristics are good.
 更に、実施形態1によれば、一対の導電体61,62とコア63,64との間に伝熱層67,67が介装されているため、導電体61,62で発生した熱が貫通孔60a,60bの外部に好適に伝熱される。 Furthermore, according to the first embodiment, since the heat transfer layers 67, 67 are interposed between the pair of conductors 61, 62 and the cores 63, 64, the heat generated in the conductors 61, 62 penetrates. Heat is preferably transferred to the outside of the holes 60a and 60b.
 更に、実施形態1によれば、トランス10の一次巻線11にFET31が直列に接続され、トランス10の二次巻線12に対する流出電流及び戻り電流夫々がインダクタ6の一対の導電体61,62に流れる。これにより、FET31がオン/オフしたときにトランス10の二次巻線12に電流が誘起し、この電流が上述のインダクタ6における一対の導電体61,62に流れるため、出力電流を効果的に平滑することができる。 Further, according to the first embodiment, the FET 31 is connected in series to the primary winding 11 of the transformer 10, and the outflow current and the return current to the secondary winding 12 of the transformer 10 are each a pair of conductors 61 and 62 of the inductor 6. Flows to As a result, when the FET 31 is turned on / off, a current is induced in the secondary winding 12 of the transformer 10, and this current flows through the pair of conductors 61 and 62 of the inductor 6, thereby effectively reducing the output current. Can be smoothed.
(実施形態2)
 実施形態1は、隣り合う2つの貫通孔60a,60b夫々に一対の導電体61,62が各別に挿通されている形態であるのに対し、実施形態2は、隣り合う2つの貫通孔601,602夫々に一対の導電体61b,62bの双方が挿通されている形態である。実施形態2に係るDC/DCコンバータのブロック構成は、実施形態1に係るDC/DCコンバータ100と同様であるため、図示を省略すると共に、実施形態1に対応する箇所には同様の符号を付してその説明を省略する。
(Embodiment 2)
Embodiment 1 is a mode in which a pair of conductors 61 and 62 are separately inserted into two adjacent through holes 60a and 60b, respectively, whereas Embodiment 2 is a mode in which two adjacent through holes 601 and 60b are inserted. In this embodiment, both the pair of conductors 61b and 62b are inserted into each of the conductors 602. Since the block configuration of the DC / DC converter according to the second embodiment is the same as that of the DC / DC converter 100 according to the first embodiment, the illustration is omitted, and the portions corresponding to the first embodiment are denoted by the same reference numerals. The description is omitted.
 図6は、実施形態2に係るインダクタ6bを斜め上方から見た斜視図であり、図7は、インダクタ6bの組み立て後の状態を模式的に示す縦断面図である。また、図8A,8Bは、実施形態2に係る貫通孔601,602の双方に挿通された導電体61b及び62bを各別に示す平面図である。図8Aは第1導電体61bを示し、図8Bは第2導電体62bを示す。インダクタ6bは、EE型のコア63b,64bの突き合わせ面Xb-Xbに沿って貫通方向が同一方向に揃った貫通孔601,602が形成されており、該貫通孔601,602夫々に一対の導電体61b,62bの双方が重なるように挿通されている。導電体61b,62bの上下関係は、図6及び7に示すものと逆であってもよい。一対のコア63b,64bは、例えばEI型、ER型等の他の形状を有するものであってもよい。 6 is a perspective view of the inductor 6b according to the second embodiment viewed obliquely from above, and FIG. 7 is a vertical cross-sectional view schematically showing a state after the inductor 6b is assembled. 8A and 8B are plan views respectively showing conductors 61b and 62b inserted into both through holes 601 and 602 according to the second embodiment. FIG. 8A shows the first conductor 61b, and FIG. 8B shows the second conductor 62b. In the inductor 6b, through holes 601 and 602 whose through directions are aligned in the same direction are formed along the abutting surfaces Xb-Xb of the EE- type cores 63b and 64b, and a pair of conductive holes are respectively formed in the through holes 601 and 602. The bodies 61b and 62b are inserted so as to overlap each other. The vertical relationship between the conductors 61b and 62b may be opposite to that shown in FIGS. The pair of cores 63b and 64b may have another shape such as, for example, an EI type or an ER type.
 第1導電体61bは、貫通孔601,602に挿通された部位及びこれらの部位を接続する部位を含む第1U字状部61buを有する。同様に、第2導電体62bは、貫通孔601,602に挿通された部位及びこれらの部位を接続する部位を含む第2U字状部62buを有する。このため、導電体61b,62bは、平面視にて線対称の単純な形状となる。図6,8A及び8Bに示す例では、導電体61b,62bの夫々について、電流が流れる方向の一端及び他端を含む部位同士が貫通孔601,602と交差する方向へ互いに逆向きに折り曲げられているが、このように折り曲げられていなくてもよい。以下では、このように折り曲げられた部位を一端部及び他端部と言う。 The first conductor 61b has a first U-shaped portion 61bu including a portion inserted into the through holes 601 and 602 and a portion connecting these portions. Similarly, the second conductor 62b has a second U-shaped portion 62bu including a portion inserted into the through holes 601 and 602 and a portion connecting these portions. Therefore, the conductors 61b and 62b have a simple shape that is line-symmetric in plan view. In the examples shown in FIGS. 6, 8A and 8B, the portions including one end and the other end of the conductors 61b and 62b in the direction in which the current flows are bent in opposite directions in the direction intersecting the through holes 601 and 602, respectively. However, it may not be bent in this way. Hereinafter, the portions bent in this manner are referred to as one end and the other end.
 実施形態1の図4に示すインダクタ6と比較した場合、図8Bに示すように、貫通孔601には、貫通孔602に一部が挿通されている第2U字状部62buの他の一部が更に挿通されていると見ることができる。図8Aに示すように、貫通孔602には、貫通孔601に一部が挿通されている第1U字状部61buの他の一部が更に挿通されていると見ることができる。 When compared with the inductor 6 of the first embodiment shown in FIG. 4, as shown in FIG. 8B, the through-hole 601 has another part of the second U-shaped part 62bu partially inserted in the through-hole 602. Can be seen to have been further inserted. As shown in FIG. 8A, it can be seen that another part of the first U-shaped portion 61bu partially inserted through the through hole 601 is further inserted into the through hole 602.
 導電体61b,62bの間には、絶縁層65が配されている。導電体61b,62bとコア63b,64bとの間には、絶縁層66が配されている。ここでは、導電体61b,62bと絶縁層66との間に、伝熱層67,67を更に設けてある。導電体61b,62bの間に、伝熱層(不図示)を更に設けてもよい。 絶 縁 An insulating layer 65 is provided between the conductors 61b and 62b. An insulating layer 66 is provided between the conductors 61b and 62b and the cores 63b and 64b. Here, heat transfer layers 67, 67 are further provided between the conductors 61b, 62b and the insulating layer 66. A heat transfer layer (not shown) may be further provided between the conductors 61b and 62b.
 インダクタ6bの組み立て段階では、コア63b,64bを突き合わせる前に、コア64bにおける貫通孔601,602夫々が形成されるべき位置に導電体61b,62bが載置され、その後、コア64bにコア63bが突き合わされて組み立てられる。インダクタ6bを周辺回路と接続する場合は、導電体61bに流れる流出電流及び導電体62bに流れる戻り電流が、貫通孔601の貫通方向に対して同一方向に流れるように、且つ貫通孔602の貫通方向に対しても同一方向に流れるように考慮される。 At the stage of assembling the inductor 6b, the conductors 61b and 62b are placed at positions where the through holes 601 and 602 are to be formed in the core 64b before the cores 63b and 64b are abutted. Are assembled together. When the inductor 6b is connected to a peripheral circuit, the outflow current flowing through the conductor 61b and the return current flowing through the conductor 62b flow in the same direction as the through direction of the through-hole 601 and pass through the through-hole 602. It is taken into consideration that the fluid flows in the same direction.
 この場合、図8A,8Bに示すようにU字状部61bu,62buが互いに逆向きになるようにしてあるため、導電体61b,62bの一端同士、及び導電体61b,62bの他端同士が、貫通孔601,602の貫通方向の両側に離隔されることとなり、周辺回路との接続が容易となる。具体的に図1及び6に示す例では、二次巻線12の他端からの電路が、流出電流が流れ込む導電体61bの一端に接続され、戻り電流が流れ出す導電体62bの一端がダイオード51,52のアノードに接続される。また、流出電流が流れ出す導電体61bの他端が、端子Cへの電路に接続され、端子Dからの電路が、戻り電流が流れ込む導電体62bの他端に接続される。 In this case, as shown in FIGS. 8A and 8B, since the U-shaped portions 61bu and 62bu are configured to be opposite to each other, one ends of the conductors 61b and 62b and the other ends of the conductors 61b and 62b are connected to each other. , The through holes 601 and 602 are separated on both sides in the penetrating direction, thereby facilitating connection with peripheral circuits. Specifically, in the examples shown in FIGS. 1 and 6, an electric path from the other end of the secondary winding 12 is connected to one end of a conductor 61 b into which an outflow current flows, and one end of a conductor 62 b from which a return current flows is a diode 51. , 52 are connected to the anodes. The other end of the conductor 61b from which the outflow current flows is connected to the electric path to the terminal C, and the electric path from the terminal D is connected to the other end of the electric conductor 62b into which the return current flows.
 ここで、一般的に漏れ磁束がない単層のソレノイドコイルのインダクタンスLは、以下の式(1)で表されることが知られている。 Here, it is generally known that the inductance L of a single-layer solenoid coil having no leakage magnetic flux is expressed by the following equation (1).
L=μSN/1・・・・・・・・・・・・・・・・・・・・・・・・(1)
但し、
μ:透磁率
S:コイルの断面積
N:コイルの巻数
l:コイルの磁路長
L = μSN 2/1 ························ ( 1)
However,
μ: magnetic permeability S: cross-sectional area of coil N: number of turns of coil l: magnetic path length of coil
 式(1)より、コア63b,64bの形状及び大きさが一定の場合、インダクタ6bのインダクタンスは、導電体61b,62bによる巻数、即ち、貫通孔601,602の夫々について挿通される導電体61b及び62bの数(=2)の二乗に比例する。従って、貫通孔60a,60b夫々に導電体61,62を各別に挿通する実施形態1の場合と比較して、インダクタ6bのインダクタンスは略4倍になり、導電体61b,62bを巻形状にせずに済むスイッチング周波数を1/4に引き下げることができる。 According to the equation (1), when the shape and size of the cores 63b and 64b are constant, the inductance of the inductor 6b is determined by the number of turns of the conductors 61b and 62b, that is, the conductor 61b inserted through each of the through holes 601 and 602. And 62b are proportional to the square of the number (= 2). Therefore, the inductance of the inductor 6b is substantially four times as compared with the case of Embodiment 1 in which the conductors 61 and 62 are individually inserted into the through holes 60a and 60b, respectively, and the conductors 61b and 62b are not formed into a winding shape. Switching frequency can be reduced to 1/4.
 なお、本実施形態2にあっては、U字状部61bu,62buが貫通孔601,602の貫通方向に対して互いに逆向きなるようにしたが、これらが同一方向を向くようにした場合であっても、周辺回路との接続に多少の変更が必要になるものの、インダクタ6bとしては同様の効果を奏する。 In the second embodiment, the U-shaped portions 61bu and 62bu are configured to be opposite to each other with respect to the direction in which the through holes 601 and 602 penetrate. Even if there is some change in the connection with the peripheral circuit, a similar effect can be obtained as the inductor 6b.
 また、実施形態2では、導電体61b,62bとコア63b,64bとの間に絶縁層66を配したが、貫通孔601,602夫々に挿通される筒状部と、貫通孔601,602夫々の両開口部の開口面に沿う鍔状の鍔部とを有する絶縁体からなる2つのボビンに導電体61b,62bを各別に挿通させてもよい。また、導電体61b,62bを、多層配線基板の異なる内層又は外層における導体パターンで形成してもよい。この場合、エポキシ樹脂及びガラス繊維を含むプリプレグで絶縁層66の一部及び絶縁層65を置き換えたり、基板表面のレジスト層で絶縁層66の一部を置き換えたりすることができる。 In the second embodiment, the insulating layer 66 is disposed between the conductors 61b and 62b and the cores 63b and 64b. However, the cylindrical portion inserted into the through holes 601 and 602 and the through holes 601 and 602 respectively The conductors 61b and 62b may be separately inserted into two bobbins made of an insulator having a flange-shaped flange along the opening surfaces of the two openings. Further, the conductors 61b and 62b may be formed by conductor patterns in different inner layers or outer layers of the multilayer wiring board. In this case, a part of the insulating layer 66 and the insulating layer 65 can be replaced with a prepreg containing an epoxy resin and glass fiber, or a part of the insulating layer 66 can be replaced with a resist layer on the substrate surface.
 以上のように本実施形態2によれば、2つの貫通孔601,602の夫々について、その貫通方向に対して流出電流及び戻り電流が同一方向に流れるように、一対の導電体61b及び62bの双方が挿通されている。従って、一対の導電体61b,62bの双方が挿通された部位にて起磁力Fが2倍に、インダクタンスが略4倍になるため、実施形態1に係るインダクタ6との比較でインダクタンスが略4倍になる。 As described above, according to the second embodiment, the pair of conductors 61b and 62b are connected to each of the two through holes 601 and 602 such that the outflow current and the return current flow in the same direction with respect to the through direction. Both are inserted. Therefore, the magnetomotive force F is doubled and the inductance is substantially quadrupled at the portion where both of the pair of conductors 61b and 62b are inserted, so that the inductance is substantially four times as compared with the inductor 6 according to the first embodiment. Double.
 また、実施形態2によれば、一対の導電体61b,62bの夫々について、隣り合う2つの貫通孔601及び602に挿通された部位及びこれらの部位を接続する部位がU字状をなしている。従って、一対の導電体61b,62bの夫々を、平面視にて線対称の比較的単純な形状とすることができる。 Further, according to the second embodiment, for each of the pair of conductors 61b and 62b, a portion inserted into two adjacent through holes 601 and 602 and a portion connecting these portions have a U-shape. . Therefore, each of the pair of conductors 61b and 62b can have a relatively simple shape that is line-symmetric in plan view.
 更に、実施形態2によれば、一対の導電体61b,62b夫々おけるU字状部61bu,62buが互いに逆向きに構成されている。従って、一対の導電体61b,62bの一端同士及び他端同士が貫通孔601,602の貫通方向の両側に離隔されるため、二次巻線12及び端子C,Dとの接続を容易に行うことができる。 According to the second embodiment, the U-shaped portions 61bu and 62bu of the pair of conductors 61b and 62b are configured to be opposite to each other. Therefore, one end and the other end of the pair of conductors 61b, 62b are separated on both sides in the through direction of the through holes 601 and 602, so that the connection with the secondary winding 12 and the terminals C and D is easily performed. be able to.
 更に、実施形態2によれば、突き合わせた状態で2つの貫通孔601,602を有するEE型、EI型又はER型のコアを用いるため、広く普及しているコアを利用することができる。 According to the second embodiment, an EE-type, EI-type, or ER-type core having two through holes 601 and 602 in abutted state can be used.
 更に、実施形態2によれば、多層配線基板の異なる内層又は外層に含まれる導体パターンを一対の導電体61b,62bとして用いる場合は、周辺回路を含めて一対の導電体61b,62bを容易に形成することができる。 Further, according to the second embodiment, when the conductor patterns included in different inner layers or outer layers of the multilayer wiring board are used as the pair of conductors 61b and 62b, the pair of conductors 61b and 62b including the peripheral circuit can be easily formed. Can be formed.
(変形例1)
 実施形態2は、一対のコア63b,64bを突き合わせた状態で2つの貫通孔601,602が形成される形態であるのに対し、変形例1は、一対のコア63c,64cを突き合わせた状態で3つの貫通孔601,602,603が形成される形態である。変形例1に係る一対のコア63c,64cの構成は、貫通方向が同一方向に揃った貫通孔601,602,603が形成される点を除いて実施形態2の場合と同様であるため、詳細な説明を省略する。一対のコアに形成される貫通孔の数が4以上の場合についても、実施形態2又は本変形例1の場合と同様である。
(Modification 1)
Embodiment 2 is a mode in which two through holes 601 and 602 are formed in a state where a pair of cores 63b and 64b are abutted, whereas Modification 1 is a state where a pair of cores 63c and 64c are abutted. In this embodiment, three through holes 601, 602, and 603 are formed. The configuration of the pair of cores 63c and 64c according to the first modification is the same as that of the second embodiment except that the through- holes 601, 602, and 603 are formed in the same direction. Detailed description is omitted. The case where the number of through holes formed in the pair of cores is four or more is the same as in the case of the second embodiment or the first modification.
 図9A,9Bは、変形例1に係る貫通孔601,602,603の全てに挿通された導電体61c及び62cを各別に示す平面図である。図9Aは第1導電体61cを示し、図9Bは第2導電体62cを示す。第1導電体61cは、貫通孔601,602に挿通された部位及びこれらの部位を接続する部位を含む第1U字状部61cuと、貫通孔602,603に挿通された部位及びこれらの部位を接続する部位を含む第1U字状部61cuとを有する。2つのU字状部61cuは、一部が重複している。同様に、第2導電体62cは、貫通孔601,602に挿通された部位及びこれらの部位を接続する部位を含む第2U字状部62cuと、貫通孔602,603に挿通された部位及びこれらの部位を接続する部位を含む第2U字状部62cuとを有する。 FIGS. 9A and 9B are plan views respectively showing the conductors 61c and 62c inserted into all of the through holes 601, 602, and 603 according to the first modification. FIG. 9A shows the first conductor 61c, and FIG. 9B shows the second conductor 62c. The first conductor 61c includes a first U-shaped portion 61cu including a portion inserted into the through holes 601 and 602 and a portion connecting these portions, a portion inserted into the through holes 602 and 603, and these portions. And a first U-shaped portion 61cu including a portion to be connected. The two U-shaped portions 61cu partially overlap. Similarly, the second conductor 62c includes a second U-shaped portion 62cu including a portion inserted into the through holes 601 and 602 and a portion connecting these portions, a portion inserted into the through holes 602 and 603, and And a second U-shaped portion 62cu including a portion connecting the portions.
 このように、導電体61c,62cは、平面視にて点対称の単純な形状となる。更に、導電体61c,62cの夫々について、隣り合う貫通孔601及び602に挿通された部位に流れる電流が、必然的に互いに逆方向となり、貫通孔601及び602の間のコア内で磁束が打ち消し合うことがない。同様に、隣り合う貫通孔602及び603に挿通された部位に流れる電流が、必然的に互いに逆方向となり、貫通孔602及び603の間のコア内で磁束が打ち消し合うことがない。従って、一対のコア63c,64cの大きさが、実施形態2に係る一対のコア63b,64bを横に1.5倍だけ拡大した大きさと略等しければ、変形例1に係るインダクタのインダクタンスは、実施形態2に係るインダクタ6bのインダクタンスの略1.5倍となる。 Thus, the conductors 61c and 62c have a simple point-symmetrical shape in plan view. Further, for each of the conductors 61c and 62c, the current flowing in the portion inserted into the adjacent through- holes 601 and 602 is necessarily in the opposite direction, and the magnetic flux cancels out in the core between the through- holes 601 and 602. It doesn't fit. Similarly, the currents flowing in the portions inserted into the adjacent through holes 602 and 603 are necessarily in opposite directions, and the magnetic flux does not cancel out in the core between the through holes 602 and 603. Therefore, if the size of the pair of cores 63c and 64c is approximately equal to the size of the pair of cores 63b and 64b according to the second embodiment expanded 1.5 times laterally, the inductance of the inductor according to the first modification is: This is approximately 1.5 times the inductance of the inductor 6b according to the second embodiment.
 更に、実施形態2の場合と同様に、対応するU字状部61cu,62cuが互いに逆向きになるようにしてあるため、導電体61c,62cの一端同士、及び導電体61c,62cの他端同士が、貫通孔601,602,603の貫通方向の両側に離隔されることとなり、周辺回路との接続が容易となる。具体的には、二次巻線12の他端からの電路が、導電体61cの一端に接続され、導電体62cの一端がダイオード51,52のアノードに接続される。また、導電体61cの他端が、端子Cへの電路に接続され、端子Dからの電路が、導電体62cの他端に接続される。 Further, as in the case of the second embodiment, the corresponding U-shaped portions 61cu and 62cu are configured to be opposite to each other, so that one ends of the conductors 61c and 62c and the other ends of the conductors 61c and 62c are opposite to each other. These are separated from each other on both sides of the through- holes 601, 602, and 603 in the direction of penetration, so that connection with peripheral circuits is facilitated. Specifically, an electric path from the other end of the secondary winding 12 is connected to one end of the conductor 61c, and one end of the conductor 62c is connected to anodes of the diodes 51 and 52. The other end of the conductor 61c is connected to the electric path to the terminal C, and the electric path from the terminal D is connected to the other end of the electric conductor 62c.
 以上のように本変形例1によれば、3つの貫通孔601,602,603の夫々について、その貫通方向に対して流出電流及び戻り電流が同一方向に流れるように、一対の導電体61c,62cの双方が挿通されている。従って、一対の導電体61c,62cの双方が挿通された部位にて起磁力Fが2倍に、インダクタンスが略4倍になるため、実施形態1に係るインダクタ6との比較でインダクタンスが略6倍(4倍×1+4倍×1/2)になる。 As described above, according to the first modification, a pair of conductors 61c, 61c, and 603 is formed so that the outflow current and the return current flow in the same direction with respect to the three through holes 601, 602, and 603, respectively. Both of 62c are inserted. Accordingly, the magnetomotive force F is doubled and the inductance is substantially quadrupled at the portion where both of the pair of conductors 61c and 62c are inserted, so that the inductance is approximately 6 compared to the inductor 6 according to the first embodiment. (4x1 + 4x1 / 2)).
 また、変形例1によれば、一対の導電体61c,62cの一方及び他方の夫々について、隣り合う2つの貫通孔601及び602(又は貫通孔602及び603)に挿通された部位及びこれらの部位を接続する部位がU字状をなしている。従って、一対の導電体61c,62cの夫々を、平面視にて点対称の比較的単純な形状とすることができる。 According to the first modification, for each of one and the other of the pair of conductors 61c and 62c, a portion inserted into two adjacent through holes 601 and 602 (or the through holes 602 and 603) and these portions. Are U-shaped. Therefore, each of the pair of conductors 61c and 62c can have a relatively simple shape that is point-symmetric in plan view.
 更に、変形例1によれば、一対の導電体61c,62cの一方及び他方におけるU字状部61cu,62cuが互いに逆向きに構成されている。従って、一対の導電体61c,62cの一端同士及び他端同士が貫通孔601,602,603の貫通方向の両側に離隔されるため、二次巻線12及び端子C,Dとの接続を容易に行うことができる。 According to the first modification, the U-shaped portions 61cu and 62cu on one and the other of the pair of conductors 61c and 62c are configured to be opposite to each other. Therefore, one end and the other end of the pair of conductors 61c, 62c are separated from each other on both sides of the through- holes 601, 602, 603 in the penetrating direction. Can be done.
(変形例2)
 実施形態2は、2つの貫通孔601,602夫々に一対の導電体61b,62bの双方が挿通されている形態であるのに対し、変形例2は、貫通孔601に一対の導電体61d,62bの双方が挿通され、貫通孔602に導電体62bのみが挿通されている形態である。変形例2に係る一対のコア63b,64bの構成は、実施形態2の場合と同様である。導電体62bは、実施形態2で用いたものと同じである。
(Modification 2)
Embodiment 2 is a mode in which both a pair of conductors 61b and 62b are inserted into two through- holes 601 and 602, respectively. 62b, and only the conductor 62b is inserted into the through hole 602. The configuration of the pair of cores 63b and 64b according to the second modification is similar to that of the second embodiment. The conductor 62b is the same as that used in the second embodiment.
 図10A,10Bは、変形例2に係る貫通孔601,602の一方及び両方に挿通された導電体61d及び62bを各別に示す平面図である。図10Aは第1導電体61dを示し、図10Bは第2導電体62bを示す。図10Bは図8Bを再掲したものである。実施形態1の図4に示すインダクタ6と比較した場合、貫通孔601には、貫通孔602に一部が挿通されている第2U字状部62buの他の一部が更に挿通されていると見ることができる。 10A and 10B are plan views respectively showing conductors 61d and 62b inserted into one and both of through holes 601 and 602 according to the second modification. FIG. 10A shows the first conductor 61d, and FIG. 10B shows the second conductor 62b. FIG. 10B is a reproduction of FIG. 8B. When compared with the inductor 6 of the first embodiment shown in FIG. 4, the other part of the second U-shaped portion 62bu partially inserted in the through hole 602 is further inserted in the through hole 601. You can see.
 このように、導電体61dは、平面視にて略点対称の単純な形状となる。更に、導電体62bについて、隣り合う貫通孔601及び602に挿通された部位に流れる電流が、必然的に互いに逆方向となり、貫通孔601及び602の間のコア内で磁束が打ち消し合うことがない。従って、導電体61d,62bの双方が挿通された部位に着目すれば、起磁力Fが2倍に、インダクタンスが4倍になる。 Thus, the conductor 61d has a simple shape that is substantially point-symmetric in plan view. Further, regarding the conductor 62b, the currents flowing in the portions inserted into the adjacent through holes 601 and 602 are necessarily in opposite directions, and the magnetic flux does not cancel out in the core between the through holes 601 and 602. . Therefore, focusing on a portion where both of the conductors 61d and 62b are inserted, the magnetomotive force F is doubled and the inductance is quadrupled.
 更に、導電体61d,62bの一端同士が、貫通孔601,602の貫通方向の両側に離隔されることとなり、周辺回路との接続が容易となる。具体的には、二次巻線12の他端からの電路が、導電体61dの一端に接続され、導電体62bの一端がダイオード51,52のアノードに接続される。導電体61d,62b夫々の他端は、端子C,Dへ接続される。 Furthermore, one ends of the conductors 61d and 62b are separated from each other on both sides of the through holes 601 and 602 in the direction of penetration, so that connection to peripheral circuits becomes easy. Specifically, an electric path from the other end of the secondary winding 12 is connected to one end of the conductor 61d, and one end of the conductor 62b is connected to anodes of the diodes 51 and 52. The other ends of the conductors 61d and 62b are connected to terminals C and D, respectively.
 以上のように本変形例2によれば、一方の貫通孔601について、その貫通方向に対して流出電流及び戻り電流が同一方向に流れるように、一対の導電体61d,62bの双方が挿通されている。従って、一対の導電体61d,62bの双方が挿通された部位にて起磁力Fが2倍に、インダクタンスが略4倍になるため、実施形態1に係るインダクタ6との比較でインダクタンスが略2.5倍(4倍×1/2+1倍×1/2)になる。 As described above, according to the second modification, both the pair of conductors 61d and 62b are inserted into one through hole 601 such that the outflow current and the return current flow in the same direction with respect to the through direction. ing. Therefore, the magnetomotive force F is doubled and the inductance is substantially quadrupled at a portion where both of the pair of conductors 61d and 62b are inserted, so that the inductance is approximately 2 in comparison with the inductor 6 according to the first embodiment. .5 times (4 times 1/2 1/2 times 1/2).
(変形例3)
 変形例1は、3つの貫通孔601,602,603夫々に一対の導電体61c,62cの双方が挿通されている形態であるのに対し、変形例3は、貫通孔601,602の夫々に一対の導電体61e,62cの双方が挿通され、貫通孔603に導電体62cのみが挿通されている形態である。変形例3に係る一対のコア63c,64cの構成は、変形例1の場合と同様である。導電体62cは、変形例1で用いたものと同じである。
(Modification 3)
Modification Example 1 is a mode in which both of a pair of conductors 61c and 62c are inserted into three through holes 601, 602 and 603, respectively. In this embodiment, both the pair of conductors 61e and 62c are inserted, and only the conductor 62c is inserted into the through hole 603. The configuration of the pair of cores 63c and 64c according to the third modification is the same as that of the first modification. The conductor 62c is the same as that used in the first modification.
 図11A,11Bは、変形例3に係る貫通孔601,602,603の一部及び全部に挿通された導電体61e及び62cを各別に示す平面図である。図11Aは第1導電体61eを示し、図11Bは第2導電体62cを示す。図11Bは図9Bを再掲したものである。実施形態1の図4に示すインダクタ6と比較した場合、貫通孔603には導電体62cが更に挿通されている。貫通孔601には、貫通孔602に一部が挿通されている第1U字状部61euの他の一部が更に挿通されており、貫通孔602には、貫通孔603に一部が挿通されている第2U字状部62cuの他の一部が更に挿通されていると見ることができる。 11A and 11B are plan views respectively showing conductors 61e and 62c inserted through part and all of through holes 601, 602, and 603 according to the third modification. FIG. 11A shows the first conductor 61e, and FIG. 11B shows the second conductor 62c. FIG. 11B is a reproduction of FIG. 9B. When compared with the inductor 6 of the first embodiment shown in FIG. 4, the conductor 62c is further inserted into the through hole 603. Another part of the first U-shaped portion 61eu, part of which is inserted through the through hole 602, is further inserted through the through hole 601. Part of the through hole 603 is inserted through the through hole 602. It can be seen that another part of the second U-shaped portion 62cu is further inserted.
 このように、導電体61eは、平面視にて略線対称の単純な形状となる。また、導電体61e,62cの夫々について、隣り合う貫通孔601及び602に挿通された部位に流れる電流が、必然的に互いに逆方向となり、貫通孔601及び602の間のコア内で磁束が打ち消し合うことがない。そして、導電体62cについて、隣り合う貫通孔602及び603に挿通された部位に流れる電流が、必然的に互いに逆方向となり、貫通孔602及び603の間のコア内で磁束が打ち消し合うことがない。従って、導電体61e,62cの双方が挿通された部位に着目すれば、起磁力Fが2倍に、インダクタンスが4倍になる。 Thus, the conductor 61e has a simple shape that is substantially line-symmetric in plan view. Further, for each of the conductors 61e and 62c, the current flowing in the portion inserted into the adjacent through- holes 601 and 602 is necessarily in the opposite direction, and the magnetic flux cancels out in the core between the through- holes 601 and 602. It doesn't fit. Then, in the conductor 62c, the currents flowing in the portions inserted into the adjacent through holes 602 and 603 are necessarily in opposite directions, and the magnetic flux does not cancel out in the core between the through holes 602 and 603. . Therefore, focusing on a portion where both the conductors 61e and 62c are inserted, the magnetomotive force F is doubled and the inductance is quadrupled.
更に、導電体61e,62cの一端同士が、貫通孔601,602の貫通方向の両側に離隔されることとなり、周辺回路との接続が容易となる。具体的には、二次巻線12の他端からの電路が、導電体61eの一端に接続され、導電体62cの一端がダイオード51,52のアノードに接続される。導電体61e,62c夫々の他端は、端子C,Dへ接続される。 Further, one ends of the conductors 61e and 62c are separated from each other on both sides of the through holes 601 and 602 in the penetrating direction, thereby facilitating connection with peripheral circuits. Specifically, an electric path from the other end of the secondary winding 12 is connected to one end of the conductor 61e, and one end of the conductor 62c is connected to anodes of the diodes 51 and 52. The other ends of the conductors 61e and 62c are connected to terminals C and D, respectively.
 以上のように本変形例3によれば、3つのうちの2つの貫通孔601,602について、その貫通方向に対して流出電流及び戻り電流が同一方向に流れるように、一対の導電体61e,62cの双方が挿通されている。従って、一対の導電体61e,62cの双方が挿通された部位にて起磁力Fが2倍に、インダクタンスが略4倍になるため、実施形態1に係るインダクタ6との比較でインダクタンスが略4.5倍(4倍×1+1倍×1/2)になる。 As described above, according to the third modification, a pair of conductors 61e, 61e, and 362 is formed so that outflow current and return current flow in the two through holes 601 and 602 in the same direction. Both of 62c are inserted. Therefore, the magnetomotive force F is doubled and the inductance is substantially quadrupled at the portion where both of the pair of conductors 61e and 62c are inserted, so that the inductance is substantially four times as compared with the inductor 6 according to the first embodiment. 0.5 times (4 × 1 + 1 times × 1 /).
(変形例4)
 実施形態2は、一対の導電体61b,62bを周辺回路とは別に形成する形態であるのに対し、変形例2は、一対の導電体61f,62fを周辺回路と一体的に形成する形態である。変形例4に係る一対のコア63b,64bの構成は、実施形態2の場合と全く同様である。
(Modification 4)
Embodiment 2 is a form in which the pair of conductors 61b and 62b are formed separately from the peripheral circuit, whereas Modification 2 is a form in which the pair of conductors 61f and 62f are formed integrally with the peripheral circuit. is there. The configuration of the pair of cores 63b and 64b according to Modification 4 is exactly the same as that of the second embodiment.
 図12A,12Bは、変形例4に係る一対の導電体61f,62fを模式的に示す平面図である。導電体61fは、実施形態2に係る導電体61bと比較して、一端部がトランス10のワンターンの二次巻線12と一体的に形成され、更に他端部が端子Cと一体的に形成されている。導電体61fが端子Cと一体化されていなくてもよい。一方の導電体62fは、実施形態2に係る導電体62bと比較して、他端部が端子Dと一体的に形成されているが、必ずしもこのように一体化されていなくてもよい。 FIGS. 12A and 12B are plan views schematically showing a pair of conductors 61f and 62f according to the fourth modification. One end of the conductor 61f is formed integrally with the one-turn secondary winding 12 of the transformer 10, and the other end is formed integrally with the terminal C, as compared with the conductor 61b according to the second embodiment. Have been. The conductor 61f may not be integrated with the terminal C. The other conductor 62f has the other end formed integrally with the terminal D as compared with the conductor 62b according to the second embodiment, but does not necessarily have to be so integrated.
 なお、本変形例4にあっては、実施形態2の図6に示す導電体61bを二次巻線12及び端子Cと一体化し、導電体62bを端子Dと一体化する場合を例示したが、これに限定されない。例えば、実施形態1の図4に示す導電体61を二次巻線12及び端子Cと一体化し、導電体62を端子Dと一体化してもよいし、変形例1の図9Aに示す導電体61cを二次巻線12及び端子Cと一体化し、図9Bに示す導電体62cを端子Dと一体化してもよい。 In the fourth modification, the conductor 61b shown in FIG. 6 of the second embodiment is integrated with the secondary winding 12 and the terminal C, and the conductor 62b is integrated with the terminal D. , But is not limited to this. For example, the conductor 61 shown in FIG. 4 of the first embodiment may be integrated with the secondary winding 12 and the terminal C, and the conductor 62 may be integrated with the terminal D, or the conductor shown in FIG. 9C may be integrated with the secondary winding 12 and the terminal C, and the conductor 62c shown in FIG.
 以上のように本変形例4によれば、導電体61fがトランス10の二次巻線12及び端子Cと一体的に形成され、導電体62fが端子Dと一体的に形成されるため、部品間の接合箇所を削減することができる。 As described above, according to the fourth modification, the conductor 61f is formed integrally with the secondary winding 12 and the terminal C of the transformer 10, and the conductor 62f is formed integrally with the terminal D. The number of joints between them can be reduced.
(変形例5)
 実施形態2は、インダクタ6bの取り付け方法を明示しない形態であるのに対し、変形例5は、インダクタ6cを筐体7へ取り付ける形態である。変形例5に係る一対のコア63b,64bの構成は、実施形態2の場合と全く同様である。
(Modification 5)
Embodiment 2 is a mode in which the mounting method of the inductor 6b is not specified, whereas Modification Example 5 is a mode in which the inductor 6c is mounted on the housing 7. The configuration of the pair of cores 63b and 64b according to Modification 5 is exactly the same as that of the second embodiment.
 図13は、変形例5に係るインダクタ6cを斜め上方から見た斜視図であり、図14は、筐体7に取り付けたインダクタ6cを模式的に示す側面図である。インダクタ6cは、実施形態2に係るインダクタ6bと比較して、導電体61bを導電体61gに置き換えたものであり、一対のコア63b,64b及び導電体62bは、実施形態2の場合と同じである。 FIG. 13 is a perspective view of the inductor 6c according to the fifth modification viewed from obliquely above, and FIG. 14 is a side view schematically showing the inductor 6c attached to the housing 7. The inductor 6c is different from the inductor 6b according to the second embodiment in that the conductor 61b is replaced by a conductor 61g. The pair of cores 63b and 64b and the conductor 62b are the same as those in the second embodiment. is there.
 仮に実施形態2に係るインダクタ6bを平面上に平置きした場合、導電体62bの下面よりも導電体61bの下面の方が高くなる(図6,7参照)。そこで、本変形例5では、図13に示すように、互いに逆向きに折り曲げられた導電体61gの一端部及び他端部を、導電体62bと重ならない位置で厚さ方向に階段状に折り曲げてある。これにより、コア64bを下側にしてインダクタ6cを筐体7に平置きした場合、導電体61gの一端部及び他端部の下面と、導電体62bの一端部及び他端部の下面とで、筐体7からの高さが一致するようになる。 If the inductor 6b according to the second embodiment is laid flat on a plane, the lower surface of the conductor 61b is higher than the lower surface of the conductor 62b (see FIGS. 6 and 7). Therefore, in the fifth modification, as shown in FIG. 13, one end and the other end of the conductor 61 g bent in opposite directions are bent stepwise in a thickness direction at a position not overlapping with the conductor 62 b. It is. Thus, when the inductor 6c is placed flat on the housing 7 with the core 64b facing down, the lower surface of one end and the other end of the conductor 61g and the lower surface of the one end and the other end of the conductor 62b. , And the height from the housing 7 becomes the same.
 図14に示すように、筐体7の上面には、高さが同じ突出部71,72が設けられている。突出部71は、導電体62bの一端部及び他端部と重なる位置に配されている。突出部72は、導電体61gの一端部及び他端部と重なる位置に配されている。突出部71の上面と、導電体62bの一端部及び他端部の下面との間には、絶縁層68が設けられている。突出部72の上面と、導電体61gの一端部及び他端部の下面との間には、絶縁層69が設けられている。導電体61gと導電体62bとが重なる部分の間には、絶縁層65が設けられている。 突出 As shown in FIG. 14, projecting portions 71 and 72 having the same height are provided on the upper surface of the housing 7. The protrusion 71 is disposed at a position overlapping one end and the other end of the conductor 62b. The protrusion 72 is arranged at a position overlapping one end and the other end of the conductor 61g. An insulating layer 68 is provided between the upper surface of the protrusion 71 and the lower surfaces of the one end and the other end of the conductor 62b. An insulating layer 69 is provided between the upper surface of the protrusion 72 and the lower surfaces of the one end and the other end of the conductor 61g. An insulating layer 65 is provided between portions where the conductor 61g and the conductor 62b overlap.
 以上のように、本変形例5によれば、インダクタ6cを筐体7に容易に取り付けることができる。 As described above, according to the fifth modification, the inductor 6c can be easily attached to the housing 7.
(実施形態3)
 実施形態1は、一対のコア63,64を一対のみ備える形態であるのに対し、実施形態3は、一対のコア63,64を複数対備える形態である。換言すれば、本実施形態3は、一対のコア63,64を突き合わせて形成される貫通孔60a,60b夫々に一対の導電体61,62が挿通されたインダクタ6を複数含む複合インダクタを備える形態である。図15は、実施形態3に係るDC/DCコンバータ100bの構成例を示すブロック図である。DC/DCコンバータ100bは、入力側の端子A及びBの電位と出力側の端子C及びDの電位とを分離するトランス10と、一対の導電体61,62と、端子C及びD間に接続されたキャパシタ21と、導電体61,62間に接続されたキャパシタ23とを備える。
(Embodiment 3)
Embodiment 1 is a mode in which only a pair of cores 63 and 64 are provided, whereas Embodiment 3 is a mode in which a plurality of pairs of cores 63 and 64 are provided. In other words, the third embodiment includes a composite inductor including a plurality of inductors 6 in which a pair of conductors 61 and 62 are inserted into through holes 60a and 60b formed by abutting a pair of cores 63 and 64, respectively. It is. FIG. 15 is a block diagram illustrating a configuration example of a DC / DC converter 100b according to the third embodiment. The DC / DC converter 100b is connected between the transformer 10 for separating the potentials of the input-side terminals A and B and the potentials of the output-side terminals C and D, a pair of conductors 61 and 62, and between the terminals C and D. And a capacitor 23 connected between the conductors 61 and 62.
 トランス10の二次巻線12は、一端にFET51bのドレインが接続され、他端にFET52bのドレインが接続されている。FET52bのドレインは、更に、一方のインダクタ(以下、第1のインダクタと言う)6に含まれる導電体61を介してキャパシタ23の一端に接続されている。キャパシタ23の一端は、更に、他方のインダクタ(以下、第2のインダクタと言う)6に含まれる導電体61を介してキャパシタ21の一端及び端子Cに接続されている。FET51b及び52bのソースは、第1のインダクタ6に含まれる導電体62を介してキャパシタ23の他端に接続されている。キャパシタ23の他端は、更に、第2のインダクタ6に含まれる導電体62を介してキャパシタ21の他端及び端子Dに接続されている。FET51b及び52bのゲートは、制御部4に接続されている。 The secondary winding 12 of the transformer 10 has one end connected to the drain of the FET 51b and the other end connected to the drain of the FET 52b. The drain of the FET 52b is further connected to one end of the capacitor 23 via a conductor 61 included in one inductor (hereinafter, referred to as a first inductor) 6. One end of the capacitor 23 is further connected to one end of the capacitor 21 and a terminal C via a conductor 61 included in the other inductor (hereinafter, referred to as a second inductor) 6. The sources of the FETs 51 b and 52 b are connected to the other end of the capacitor 23 via a conductor 62 included in the first inductor 6. The other end of the capacitor 23 is further connected to the other end of the capacitor 21 and the terminal D via a conductor 62 included in the second inductor 6. The gates of the FETs 51b and 52b are connected to the control unit 4.
 その他、実施形態1に対応する箇所には同様の符号を付してその説明を省略する。なお、FET51b,52bは、実施形態1で用いたダイオード51,52に置き換えてもよい。インダクタ6の数は2つに限定されず、3つ以上であってもよい。 In addition, the same reference numerals are given to portions corresponding to the first embodiment, and description thereof will be omitted. Note that the FETs 51b and 52b may be replaced with the diodes 51 and 52 used in the first embodiment. The number of inductors 6 is not limited to two, and may be three or more.
 上述のインダクタ6,6が複合インダクタ600に相当する。各インダクタ6は、2端子対回路と見なされ、これらの2端子対回路が縦続接続されている。複合インダクタ600に含まれる導電体61には流出電流が流れ、導電体62には戻り電流が流れる。第1のインダクタ6による2端子対回路の一方の端子対にはキャパシタが接続されていないが、ここにキャパシタを接続してもよい。キャパシタ23は、第1のインダクタ6による2端子対回路の他方の端子対に接続されていると見なしてもよいし、第2のインダクタ6による2端子対回路の一方の端子対に接続されていると見なしてもよい。キャパシタ21を削除して外部の負荷に含めるようにしてもよい。インダクタ6,6,・・による隣り合う2端子対回路の接続部位では、導電体61,62の間に必ずしもキャパシタを接続しなくてもよい。 The above-described inductors 6 and 6 correspond to the composite inductor 600. Each inductor 6 is regarded as a two-port pair circuit, and these two-port pair circuits are cascaded. Outflow current flows through the conductor 61 included in the composite inductor 600, and return current flows through the conductor 62. Although a capacitor is not connected to one terminal pair of the two-terminal pair circuit formed by the first inductor 6, a capacitor may be connected here. The capacitor 23 may be regarded as being connected to the other terminal pair of the two-terminal pair circuit formed by the first inductor 6 or connected to one terminal pair of the two-terminal pair circuit formed by the second inductor 6. May be considered. The capacitor 21 may be deleted and included in an external load. It is not always necessary to connect a capacitor between the conductors 61 and 62 at the connection portion of the two-terminal pair circuit adjacent by the inductors 6, 6,.
 次に、導体パターンを用いてインダクタ6,6を形成する例について説明する。図16は、印刷配線基板8上に形成されたトランス10及びインダクタ6,6を模式的に示す平面図である。印刷配線基板8には、内層が4層である6層の多層基板を用いているが、内層の数が3以下又は5以上であってもよい。トランス10には所謂PQ型のコアを、インダクタ6,6にはEI型のコア63,64を用いているが、これに限定されるものではない。 Next, an example in which the inductors 6 and 6 are formed using a conductor pattern will be described. FIG. 16 is a plan view schematically showing the transformer 10 and the inductors 6 and 6 formed on the printed wiring board 8. The printed wiring board 8 uses a six-layer multi-layer substrate having four inner layers, but the number of inner layers may be three or less or five or more. Although a so-called PQ type core is used for the transformer 10 and EI type cores 63 and 64 are used for the inductors 6 and 6, the present invention is not limited to this.
 トランス10は、印刷配線基板8の長手方向の一端部にて長手方向と交差する方向に等間隔に設けられた3つの開口部にPQ型のコアの3つの脚部が各別に挿通されている。第1のインダクタ6は、印刷配線基板8の長手方向の略中央部にて長手方向と交差する方向に等間隔に設けられた3つの開口部にEI型のコア63,64の3つの脚部が各別に挿通されている。第2のインダクタ6は、印刷配線基板8の長手方向の他端部にて長手方向と交差する方向に等間隔に設けられた3つの開口部にEI型のコア63,64の3つの脚部が各別に挿通されている。印刷配線基板8の長手方向の一方の側縁部、且つインダクタ6,6の間に設けられた切り欠き部には、印刷配線基板8全体が固定される不図示の筐体から柱部91が延伸しており、該柱部91にはインダクタ6,6夫々のコア63,63を押圧して固定するL字状の板バネ9が螺子止めされている。各インダクタ6のコア63,64は、板バネ9を用いずに接着剤等によって固定してもよい。 In the transformer 10, three legs of a PQ-type core are separately inserted into three openings provided at equal intervals in a direction intersecting the longitudinal direction at one longitudinal end of the printed wiring board 8. . The first inductor 6 has three legs of the EI type cores 63 and 64 in three openings provided at regular intervals in a direction intersecting the longitudinal direction at a substantially central portion in the longitudinal direction of the printed wiring board 8. Are inserted separately. The second inductor 6 includes three legs of the EI- type cores 63 and 64 at three openings provided at equal intervals in a direction intersecting the longitudinal direction at the other end in the longitudinal direction of the printed wiring board 8. Are inserted separately. A column portion 91 is provided at one side edge in the longitudinal direction of the printed wiring board 8 and a cutout provided between the inductors 6 and 6 from a casing (not shown) to which the entire printed wiring board 8 is fixed. An L-shaped leaf spring 9 for pressing and fixing the cores 63 and 63 of the inductors 6 and 6 is screwed to the pillar portion 91. The cores 63 and 64 of each inductor 6 may be fixed by an adhesive or the like without using the leaf spring 9.
 印刷配線基板8の一方の外層には、インダクタ6,6夫々の貫通孔60a,60aに挿通する導電体61が導体パターンによって形成されている。この導体パターンは、トランス10の1ターンの二次巻線12及び端子Cと一体化されている。印刷配線基板8の一方の外層には、更に、インダクタ6,6夫々の貫通孔60b,60bに挿通する導電体62が導体パターンによって形成されている。この導体パターンは、端子Dと一体化されている。トランス10の一次巻線11は、印刷配線基板8の内層に形成されている。一次巻線11は、例えば任意の内層に形成された渦巻き状の導体パターンにより、ターン数(巻数)が2以上となるようにしてもよいし、1つの内層に形成された任意のターン数の巻線を、内層間を接続するビアホールによって直列に接続してもよい。なお、一次巻線11は、導電体61及び二次巻線12との重なり部位を除いて破線で示す。 (4) On one outer layer of the printed wiring board 8, a conductor 61 to be inserted into the through holes 60a, 60a of the inductors 6, 6 is formed by a conductor pattern. This conductor pattern is integrated with the one-turn secondary winding 12 of the transformer 10 and the terminal C. On one outer layer of the printed wiring board 8, a conductor 62 that is inserted into the through holes 60b and 60b of the inductors 6 and 6, respectively, is formed by a conductor pattern. This conductor pattern is integrated with the terminal D. The primary winding 11 of the transformer 10 is formed on an inner layer of the printed wiring board 8. The number of turns (number of turns) of the primary winding 11 may be two or more, for example, by a spiral conductor pattern formed on an arbitrary inner layer. The windings may be connected in series by via holes connecting the inner layers. In addition, the primary winding 11 is shown by a broken line except for an overlapping portion with the conductor 61 and the secondary winding 12.
 トランス10及び第1のインダクタ6の間の部位における二次巻線12及び導電体62 の間には、FET51bが表面実装されている。トランス10及び第1のインダクタ6の間の部位における導電体61,62の間には、FET52bが表面実装されている。インダクタ6,6の間の部位における導電体61,62の間には、キャパシタ23が表面実装されている。キャパシタ23は3つのキャパシタを並列に接続したものであるが、これに限定されず、例えば1つのキャパシタであってもよい。第2のインダクタ6よりも端子C及びD側の部位における導電体61,62の間には、キャパシタ21が表面実装されている。キャパシタ21は3つのキャパシタを並列に接続したものであるが、これに限定されず、例えば1つのキャパシタであってもよい。キャパシタ21,23は、積層セラミックコンデンサであるが、例えばリードタイプのセラミックコンデンサ又はフィルムコンデンサを用いてもよい。 An FET 51b is surface-mounted between the {secondary winding 12 and the conductor 62} at a location between the transformer 10 and the first inductor 6. An FET 52b is surface-mounted between the conductors 61 and 62 at a location between the transformer 10 and the first inductor 6. The capacitor 23 is surface-mounted between the conductors 61 and 62 at a position between the inductors 6 and 6. The capacitor 23 is formed by connecting three capacitors in parallel, but is not limited to this. For example, one capacitor may be used. The capacitor 21 is surface-mounted between the conductors 61 and 62 at a portion closer to the terminals C and D than the second inductor 6 is. The capacitor 21 is formed by connecting three capacitors in parallel, but is not limited to this. For example, one capacitor may be used. Although the capacitors 21 and 23 are multilayer ceramic capacitors, for example, a lead type ceramic capacitor or a film capacitor may be used.
 次に、本実施形態3に係るDC/DCコンバータ100bによるノイズ低減の効果と、実施形態1に係るDC/DCコンバータ100によるノイズ低減の効果とを、シミュレーションによって比較検証した結果について説明する。図17Aは、実施形態1に係るDC/DCコンバータ100によるスイッチングノイズの周波数成分を示すグラフである。、図17Bは、実施形態3に係るDC/DCコンバータ100bによるスイッチングノイズの周波数成分を示すグラフである。図17A及び17Bの縦軸はノイズレベル(dBμV)を表し、横軸はスイッチング周波数(基本波)に対する相対的周波数を表す。図中に一点鎖線で示す折れ線は、ノイズの基本波及び高調波のピークを連ねたものである。 Next, the result of comparing and verifying the effect of noise reduction by the DC / DC converter 100b according to the third embodiment and the effect of noise reduction by the DC / DC converter 100 according to the first embodiment by simulation will be described. FIG. 17A is a graph illustrating frequency components of switching noise caused by the DC / DC converter 100 according to the first embodiment. FIG. 17B is a graph illustrating frequency components of switching noise caused by the DC / DC converter 100b according to the third embodiment. 17A and 17B, the vertical axis represents the noise level (dB μV), and the horizontal axis represents the relative frequency to the switching frequency (fundamental wave). A broken line indicated by a dashed line in the drawing is a series of peaks of a fundamental wave and a harmonic wave of noise.
 シミュレーションで用いたコア63,64の容積、インダクタ6のインダクタンス及びキャパシタ21,23のキャパシタンスは以下のとおりである。
(a)実施形態1に係るDC/DCコンバータ100
コア63,64の容積=Lml(Lは定数)
インダクタ6のインダクタンス=MμH(Mは定数)
キャパシタ21のキャパシタンス=NμF(Nは定数)
(b)実施形態3に係るDC/DCコンバータ100b
コア63b,64bの容積=0.2Lml
インダクタ6bのインダクタンス=0.2MμH
キャパシタ21,23のキャパシタンス=0.4NμF
The volumes of the cores 63 and 64, the inductance of the inductor 6, and the capacitances of the capacitors 21 and 23 used in the simulation are as follows.
(A) DC / DC converter 100 according to the first embodiment
Volume of cores 63 and 64 = Lml (L is a constant)
Inductance of inductor 6 = MμH (M is a constant)
Capacitance of capacitor 21 = NμF (N is a constant)
(B) DC / DC converter 100b according to the third embodiment
Core 63b, 64b volume = 0.2Lml
Inductance of inductor 6b = 0.2MμH
Capacitance of capacitors 21 and 23 = 0.4 NμF
 図17Bに示すように、実施形態3に係るDC/DCコンバータ100bによれば、図17Aに示す実施形態1に係るDC/DCコンバータ100と比較して、スイッチング周波数の2倍波及び3倍波(2次高調波及び3次高調波)夫々に相当する周波数におけるノイズレベルが10dB及び20dB程度下回っている。即ち、実施形態3に係るDC/DCコンバータ100bによれば、実施形態1に係るコア63,64に対して容積比で1/4より小さいコア63,64を用いた場合であっても、高調波のノイズレベルを10dB~20dB又はそれ以上低減することができる。このような効果は、インダクタ6,6を含む2つの2端子対回路が縦続接続されているため、第1のインダクタ6及びキャパシタ23と、第2のインダクタ6及びキャパシタ21とによって実現される2つの低域通過フィルタの減衰量が加算されることによるものと言える。 As shown in FIG. 17B, according to the DC / DC converter 100b according to the third embodiment, as compared with the DC / DC converter 100 according to the first embodiment shown in FIG. (Second harmonic and third harmonic) Noise levels at frequencies corresponding to the respective harmonics are lower by about 10 dB and 20 dB. That is, according to the DC / DC converter 100b according to the third embodiment, even when the cores 63 and 64 according to the first embodiment use the cores 63 and 64 having a volume ratio smaller than 1/4, the harmonics are increased. Wave noise levels can be reduced by 10 dB to 20 dB or more. Such an effect is realized by the first inductor 6 and the capacitor 23 and the second inductor 6 and the capacitor 21 because the two two-terminal pair circuits including the inductors 6 and 6 are cascaded. This is due to the fact that the attenuations of the two low-pass filters are added.
 本実施形態3にあっては、一対の導電体61,62を印刷配線基板8の導体パターンで形成したので、部品点数の増加、接続ポイントの増加、加工工程の増加等を抑制して、ノイズ低減効果の高いDC/DCコンバータを容易に作製できるという効果が得られる。例えば一対の導電体61,62にバスバーを用いることもできる。但し、この場合は、導電体61,62及びキャパシタ23の間と、導電体61,62及びキャパシタ21の間とを、印刷配線基板8上での接続によらずに、別途半田付け又は溶接を用いて接続しなければならず、接続ポイントの数や工数が増える。 In the third embodiment, since the pair of conductors 61 and 62 are formed by the conductor pattern of the printed wiring board 8, an increase in the number of components, an increase in connection points, an increase in processing steps, and the like are suppressed, and noise is reduced. An effect is obtained that a DC / DC converter having a high reduction effect can be easily manufactured. For example, a bus bar can be used for the pair of conductors 61 and 62. However, in this case, soldering or welding is separately performed between the conductors 61 and 62 and the capacitor 23 and between the conductors 61 and 62 and the capacitor 21 without depending on the connection on the printed wiring board 8. Connection and the number of connection points and man-hours increase.
 以上のように本実施形態3によれば、1対のコア63,64の2対分によって複合インダクタ600のインダクタンスが2つのインダクタ6,6に分散されるため、各対のコア63,64の容積を低減することができる。 As described above, according to the third embodiment, the inductance of the composite inductor 600 is distributed to the two inductors 6 and 6 by two pairs of the pair of cores 63 and 64. The volume can be reduced.
 また、実施形態3によれば、一対のコア63,64の貫通孔60a,60b夫々に一対の導電体61,62が挿通されて形成される各インダクタ6が2つのインダクタンス要素を含む2端子対回路と見なされ、各2端子対回路が縦続接続されている。従って、第1のインダクタ6の出力を第2のインダクタ6の入力に引き継ぐことができる。 According to the third embodiment, each of the inductors 6 formed by inserting the pair of conductors 61 and 62 into the through holes 60a and 60b of the pair of cores 63 and 64 respectively has a two-terminal pair including two inductance elements. The circuits are regarded as circuits, and each two-terminal pair circuit is cascaded. Therefore, the output of the first inductor 6 can be taken over by the input of the second inductor 6.
 更に、実施形態3によれば、縦続接続された2つの2端子対回路の出力側の端子対夫々にキャパシタ23,21が接続されているため、2段の低域通過フィルタを形成することができる。 Furthermore, according to the third embodiment, since the capacitors 23 and 21 are connected to the output-side terminal pairs of the two cascade-connected two-port pair circuits, a two-stage low-pass filter can be formed. it can.
 更に、実施形態3によれば、トランス10の一次巻線11にFET31が直列に接続され、トランス10の二次巻線12に対する流出電流及び戻り電流が複合インダクタ600の一対の導電体61,62に流れる。これにより、FET31がオン/オフしたときにトランス10の二次巻線12に電流が誘起し、この電流が上述の複合インダクタ600における一対の導電体61,62に流れるため、出力電流を効果的に平滑することができる。 Further, according to the third embodiment, the FET 31 is connected in series to the primary winding 11 of the transformer 10, and the outflow current and return current to the secondary winding 12 of the transformer 10 are controlled by the pair of conductors 61 and 62 of the composite inductor 600. Flows to As a result, when the FET 31 is turned on / off, a current is induced in the secondary winding 12 of the transformer 10, and this current flows through the pair of conductors 61 and 62 in the composite inductor 600, so that the output current is effectively reduced. Can be smoothed.
 更に、実施形態3によれば、導電体61がトランス10の二次巻線12及び端子Cと一体的に形成され、導電体62が端子Dと一体的に形成されるため、部品間の接合箇所を削減することができる。 Further, according to the third embodiment, since the conductor 61 is formed integrally with the secondary winding 12 and the terminal C of the transformer 10 and the conductor 62 is formed integrally with the terminal D, the joining between the components is performed. The number of parts can be reduced.
(実施形態4)
 図18は、実施形態4に係るDC/DCコンバータ100の構成例を示す回路図である。実施形態4において、インダクタ6は、トランス10の入力側(一次巻線11側)に設けられている。実施形態4のインダクタ6の詳細については、前述のインダクタ6と同様である。実施形態4のインダクタ6においても、前述のインダクタ6と同程度のインダクタンス(例えば、1から3μH)が必要とされる。
(Embodiment 4)
FIG. 18 is a circuit diagram illustrating a configuration example of the DC / DC converter 100 according to the fourth embodiment. In the fourth embodiment, the inductor 6 is provided on the input side (the primary winding 11 side) of the transformer 10. The details of the inductor 6 of the fourth embodiment are the same as those of the inductor 6 described above. Also in the inductor 6 of the fourth embodiment, the same inductance (for example, 1 to 3 μH) as the above-described inductor 6 is required.
 実施形態4に係るDC/DCコンバータ100は、フルブリッジ方式であり、トランス10の入力側(一次巻線11側)に、フルブリッジを構成する4つのスイッチング素子35,36,37,38が設けられている。フルブリッジは、直列接続されたスイッチング素子35,36と、直列接続されたスイッチング素子37,38と、を並列接続して構成されている。 The DC / DC converter 100 according to the fourth embodiment is a full-bridge type, and four switching elements 35, 36, 37, and 38 constituting a full bridge are provided on the input side (the primary winding 11 side) of the transformer 10. Have been. The full bridge is configured by connecting switching elements 35 and 36 connected in series and switching elements 37 and 38 connected in series.
 実施形態1から実施形態3のインダクタ6は、DC/DCコンバータ100が備えるトランス10の出力側(二次巻線12側)に設けられていた。実施形態1から実施形態3のインダクタ6は、交流電流を平滑化して直流に変換するために用いられていた。これに対して、実施形態4においては、インダクタ6は、DC/DCコンバータ100が備えるトランス10の入力側(一次巻線11側)に設けられている。実施形態4のインダクタ6は、共振現象により、ZVS(Zero Voltage Switching)動作をさせるために用いられる。 The inductors 6 of the first to third embodiments are provided on the output side (the secondary winding 12 side) of the transformer 10 included in the DC / DC converter 100. The inductors 6 according to the first to third embodiments are used for smoothing an alternating current and converting it into a direct current. On the other hand, in the fourth embodiment, the inductor 6 is provided on the input side (the primary winding 11 side) of the transformer 10 included in the DC / DC converter 100. The inductor 6 according to the fourth embodiment is used for performing a ZVS (Zero Voltage Switching) operation due to a resonance phenomenon.
 実施形態4において、第1導電体61の一端は、直列接続されたスイッチング素子35とスイッチング素子36との間に接続されている。第1導電体61の他端は、トランス10の一次巻線11の一端に接続されている。したがって、スイッチング素子35、第1導電体61(インダクタ6)、及び一次巻線11は、直列接続されている。 In the fourth embodiment, one end of the first conductor 61 is connected between the switching element 35 and the switching element 36 connected in series. The other end of the first conductor 61 is connected to one end of the primary winding 11 of the transformer 10. Therefore, the switching element 35, the first conductor 61 (the inductor 6), and the primary winding 11 are connected in series.
 また、第2導電体の一端は、直列接続されたスイッチング素子35とスイッチング素子36との間に接続されている。第2導電体62の他端は、トランス10の一次巻線11の他端に接続されている。したがって、スイッチング素子37、第2導電体62(インダクタ6)、及び一次巻線11は、直列接続されている。 {Circle around (2)} One end of the second conductor is connected between the switching element 35 and the switching element 36 connected in series. The other end of the second conductor 62 is connected to the other end of the primary winding 11 of the transformer 10. Therefore, the switching element 37, the second conductor 62 (the inductor 6), and the primary winding 11 are connected in series.
 スイッチング素子35、第1導電体61、第1巻線11、第2導電体62、及びスイッチング素子38は、直列接続されている。したがって、スイッチング素子35及びスイッチング素子38がオンになると、スイッチング素子35から、第1導電体61、第1巻線11、第2導電体62の順で、スイッチング素子38へ電流が流れる。この場合、第1電流は、第1導電体61を流れ、インダクタ6外部の回路素子である一次巻線11へ向かう。第2電流は、第1電流が一次巻線11を経由して、第2導電体62に戻る電流である。 The switching element 35, the first conductor 61, the first winding 11, the second conductor 62, and the switching element 38 are connected in series. Therefore, when the switching element 35 and the switching element 38 are turned on, a current flows from the switching element 35 to the switching element 38 in the order of the first conductor 61, the first winding 11, and the second conductor 62. In this case, the first current flows through the first conductor 61 and goes to the primary winding 11 which is a circuit element outside the inductor 6. The second current is a current that returns to the second conductor 62 via the primary winding 11.
 また、スイッチング素子37、第2導電体62、第1巻線11、第1導電体61、及びスイッチング素子36は、直列接続されている。したがって、スイッチング素子37及びスイッチング素子36がオンになると、スイッチング素子37から、第2導電体62、第1巻線11、第1導電体61の順で、スイッチング素子36へ電流が流れる。この場合、第2電流は、第2導電体62を流れ、インダクタ6の外部の回路素子である一次巻線11へ向かう。第1電流は、第2電流が一次巻線11を経由して、第1導電体61へ戻る電流である。 The switching element 37, the second conductor 62, the first winding 11, the first conductor 61, and the switching element 36 are connected in series. Therefore, when the switching element 37 and the switching element 36 are turned on, a current flows from the switching element 37 to the switching element 36 in the order of the second conductor 62, the first winding 11, and the first conductor 61. In this case, the second current flows through the second conductor 62 and goes to the primary winding 11 which is a circuit element outside the inductor 6. The first current is a current in which the second current returns to the first conductor 61 via the primary winding 11.
 実施形態4において、第1導電体61及び第2導電体62を流れる電流の大きさは、5~20Aの範囲内と想定され、比較的小電流である。ただし、実施形態4においては、表皮効果又は近接効果などの交流電流に起因する損出(いわゆるAC損)がある。したがって、実施形態4においても、図5A等に示す伝熱層67による放熱性の確保が有効である。 In the fourth embodiment, the magnitude of the current flowing through the first conductor 61 and the second conductor 62 is assumed to be in the range of 5 to 20 A, and is a relatively small current. However, in the fourth embodiment, there is a loss (so-called AC loss) caused by an alternating current such as a skin effect or a proximity effect. Therefore, also in the fourth embodiment, it is effective to secure the heat dissipation by the heat transfer layer 67 shown in FIG.
100、100b DC/DCコンバータ
10  トランス
11  一次巻線
12  二次巻線
20、21、22、23 キャパシタ
31、32、35、36、37、38 FET
4 制御部
51、52 ダイオード
51b、52b FET
6、6b、6c インダクタ
60a、60b、601、602、603 貫通孔
61、61b、61c、61d、61e、61f、61g 導電体
62、62b、62c、62f 導電体
61bu、61cu、61eu、62bu、62cu U字状部
63、63b、63c、64、64b、64c コア
65、66、68、69 絶縁層
67 伝熱層
600 複合インダクタ
7 筐体
71、72 突出部
8 印刷配線基板
9 板バネ
160 中間部
161 第1外周部
162 第2外周部
A、B、C、D 端子
S1 中間部面積
S2 外周部面積

 
100, 100b DC / DC converter 10 Transformer 11 Primary winding 12 Secondary winding 20, 21, 22, 23 Capacitors 31, 32, 35, 36, 37, 38 FET
4 Controllers 51, 52 Diodes 51b, 52b FET
6, 6b, 6c Inductors 60a, 60b, 601, 602, 603 Through holes 61, 61b, 61c, 61d, 61e, 61f, 61g Conductors 62, 62b, 62c, 62f Conductors 61bu, 61cu, 61eu, 62bu, 62cu U-shaped portions 63, 63b, 63c, 64, 64b, 64c Cores 65, 66, 68, 69 Insulation layer 67 Heat transfer layer 600 Composite inductor 7 Housings 71, 72 Projection 8 Printed wiring board 9 Plate spring 160 Middle part 161 first outer peripheral part 162 second outer peripheral part A, B, C, D terminal S1 intermediate part area S2 outer peripheral area

Claims (19)

  1.  インダクタであって、
     同一方向に貫通する第1貫通孔及び第2貫通孔を少なくとも有するコアと、
     前記第1貫通孔に挿通された部位を有し、第1電流が流れる第1導電体と、
     前記第2貫通孔に挿通された部位を有し、第2電流が流れる第2導電体と、
     を備え、
     前記第1電流及び前記第2電流のうちの一方の電流は、他方の電流が前記インダクタ外部を経由して前記インダクタへ戻る電流であり、
     前記第2貫通孔内における前記第2電流の向きは、前記第1貫通孔内における前記第1電流の向きとは逆である
     インダクタ。
    An inductor,
    A core having at least a first through hole and a second through hole penetrating in the same direction;
    A first conductor having a portion inserted into the first through hole, through which a first current flows;
    A second conductor having a portion inserted through the second through hole, through which a second current flows;
    With
    One of the first current and the second current is a current in which the other current returns to the inductor via the outside of the inductor,
    The direction of the second current in the second through hole is opposite to the direction of the first current in the first through hole.
  2.  前記第1導電体は、前記第2貫通孔に挿通された部位を更に有し、
     前記第1電流は、前記第2貫通孔内において前記第2電流と同じ向きに流れる
     請求項1に記載のインダクタ。
    The first conductor further has a portion inserted into the second through-hole,
    The inductor according to claim 1, wherein the first current flows in the second through hole in the same direction as the second current.
  3.  前記第1導電体は、第1U字状部を有し、
     前記第1U字状部は、前記第1導電体が前記第1貫通孔に挿通された前記部位及び前記第2貫通孔に挿通された前記部位を含む
     請求項2に記載のインダクタ。
    The first conductor has a first U-shaped portion,
    The inductor according to claim 2, wherein the first U-shaped portion includes the portion where the first conductor is inserted through the first through hole and the portion where the first conductor is inserted through the second through hole.
  4.  前記第2導電体は、前記第1U字状部に対して逆向きになるように配置された第2U字状部を有し、
     前記第2U字状部は、前記第2導電体が前記第1貫通孔に挿通された部位及び前記第2貫通孔に挿通された前記部位を含み、
     前記第2電流は、前記第1貫通孔内において前記第1電流と同じ向きに流れる
     請求項3に記載のインダクタ。
    The second conductor has a second U-shaped portion disposed to be opposite to the first U-shaped portion,
    The second U-shaped portion includes a portion where the second conductor is inserted through the first through hole and the portion where the second conductor is inserted through the second through hole.
    The inductor according to claim 3, wherein the second current flows in the same direction as the first current in the first through hole.
  5.  前記コアは、EE型、EI型及びER型の何れかである請求項1から請求項4の何れか1項に記載のインダクタ。 The inductor according to any one of claims 1 to 4, wherein the core is one of an EE type, an EI type, and an ER type.
  6.  前記第1導電体及び前記第2導電体の夫々は、断面が矩形状をなしている請求項1から請求項5の何れか1項に記載のインダクタ。 6. The inductor according to claim 1, wherein each of the first conductor and the second conductor has a rectangular cross section. 7.
  7.  前記第1導電体及び前記第2導電体は、印刷配線基板に含まれる導体パターンである請求項1から請求項6の何れか1項に記載のインダクタ。 The inductor according to any one of claims 1 to 6, wherein the first conductor and the second conductor are conductor patterns included in a printed wiring board.
  8.  前記コアは、フェライトコア又は圧粉コアである請求項1から請求項7の何れか1項に記載のインダクタ。 The inductor according to any one of claims 1 to 7, wherein the core is a ferrite core or a dust core.
  9.  伝熱材料を含む伝熱層を更に備え、前記伝熱層は、前記第1導電体及び前記第2導電体と、前記コアと、の間に配置されている
     請求項1から請求項8の何れか1項に記載のインダクタ。
    The heat transfer layer further comprising a heat transfer material, wherein the heat transfer layer is disposed between the first conductor and the second conductor, and the core. An inductor according to any one of the preceding claims.
  10.  前記コアは、互いに突き合わせ可能な一対のコア部材を備え、
     前記第1貫通孔及び第2貫通孔は、前記一対のコア部材を突き合せた状態で突合せ面に沿った方向に貫通している
     請求項1から9のいずれか1項に記載のインダクタ。
    The core includes a pair of core members that can abut each other,
    The inductor according to any one of claims 1 to 9, wherein the first through hole and the second through hole penetrate in a direction along an abutting surface in a state where the pair of core members abut each other.
  11.  前記コアは、
      前記第1貫通孔と前記第2貫通孔との間に位置する中間部と、
      前記中間部よりも前記第1貫通孔側において前記第1貫通孔の周囲に位置する第1外周部と、
      前記中間部よりも前記第2貫通孔側において前記第2貫通孔の周囲に位置する第2外周部と、
     を有し、
     前記中間部の断面積は、前記第1外周部の断面積及び前記第2外周部の断面積よりも大きい
     請求項1から10のいずれか1項に記載のインダクタ。
    The core is
    An intermediate portion located between the first through hole and the second through hole;
    A first outer peripheral portion located around the first through hole on the first through hole side with respect to the intermediate portion;
    A second outer peripheral portion located around the second through hole closer to the second through hole than the intermediate portion;
    Has,
    The inductor according to any one of claims 1 to 10, wherein a cross-sectional area of the intermediate portion is larger than a cross-sectional area of the first outer peripheral portion and a cross-sectional area of the second outer peripheral portion.
  12.  請求項1から請求項11の何れか1項に記載のインダクタを含む複合インダクタであって、
     前記第1導電体が前記第1貫通孔に挿通され、前記第2導電体が前記第2貫通孔に挿通された前記コアを複数備える複合インダクタ。
    A composite inductor including the inductor according to any one of claims 1 to 11,
    A composite inductor comprising a plurality of the cores, wherein the first conductor is inserted through the first through-hole, and the second conductor is inserted through the second through-hole.
  13.  各コアの前記第1貫通孔に前記第1導電体が挿通され、各コアの前記第2貫通孔に前記第2導電体が挿通されることによって形成されるインダクタによる2端子対回路が縦続接続となるようにしてある請求項12に記載の複合インダクタ。 The first conductor is inserted into the first through hole of each core, and the two-terminal pair circuit formed by the inductors formed by inserting the second conductor into the second through hole of each core is cascaded. 13. The composite inductor according to claim 12, wherein:
  14.  少なくとも1つの前記2端子対回路における一方の端子対にキャパシタを接続してある請求項13に記載の複合インダクタ。 14. The composite inductor according to claim 13, wherein a capacitor is connected to one terminal pair of the at least one two-terminal pair circuit.
  15.  請求項1から請求項11の何れか1項に記載のインダクタと、
     スイッチング素子と、
     一次巻線が前記スイッチング素子に直列に接続されたトランスと
     を備え、
     前記第1導電体は、前記トランスの二次巻線から外部へ流出する流出電流が前記第1電流として流れるように接続され、前記第2導電体は、外部から前記二次巻線に戻る戻り電流が前記第2電流として流れるように接続されているDC/DCコンバータ。
    An inductor according to any one of claims 1 to 11, and
    A switching element;
    A transformer having a primary winding connected in series with the switching element,
    The first conductor is connected such that an outflow current flowing out of the secondary winding of the transformer to the outside flows as the first current, and the second conductor returns from the outside to the secondary winding. A DC / DC converter connected so that current flows as the second current.
  16.  請求項12から請求項14の何れか1項に記載の複合インダクタと、スイッチング素子と、
     一次巻線が前記スイッチング素子に直列に接続されたトランスとを備え、
     前記第1導電体は、前記トランスの二次巻線から外部へ流出する流出電流が前記第1電流として流れるように接続され、前記第2導電体は、外部から前記二次巻線に戻る戻り電流が前記第2電流として流れるように接続されているDC/DCコンバータ。
    A composite inductor according to any one of claims 12 to 14, and a switching element;
    A primary winding comprising a transformer connected in series to the switching element,
    The first conductor is connected such that an outflow current flowing out of the secondary winding of the transformer to the outside flows as the first current, and the second conductor returns from the outside to the secondary winding. A DC / DC converter connected so that current flows as the second current.
  17.  前記第1導電体は、前記二次巻線と一体的に形成されており、
     前記第1導電体及び前記第2導電体の少なくとも一方が出力側の電路と一体的に形成されている請求項15又は請求項16に記載のDC/DCコンバータ。
    The first conductor is formed integrally with the secondary winding,
    17. The DC / DC converter according to claim 15, wherein at least one of the first conductor and the second conductor is formed integrally with an electric circuit on an output side.
  18.  請求項1から請求項11の何れか1項に記載のインダクタと、
     スイッチング素子と、
     一次巻線を有するトランスと、
     を備え、
     少なくとも、前記スイッチング素子と、前記インダクタと、前記一次巻線と、が直列接続されているDC/DCコンバータ。
    An inductor according to any one of claims 1 to 11, and
    A switching element;
    A transformer having a primary winding;
    With
    A DC / DC converter in which at least the switching element, the inductor, and the primary winding are connected in series.
  19.  請求項1から請求項11の何れか1項に記載のインダクタと、
     前記インダクタ外部において、前記第1導電体及び前記第2導電体に直列接続された回路素子と、
    を備える回路。
    An inductor according to any one of claims 1 to 11, and
    A circuit element connected in series to the first conductor and the second conductor outside the inductor;
    A circuit comprising:
PCT/JP2019/024705 2018-07-30 2019-06-21 Inductor, composite inductor, dc/dc converter, and circuit WO2020026640A1 (en)

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WO2023182201A1 (en) * 2022-03-25 2023-09-28 株式会社村田製作所 Reactor

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US20170047155A1 (en) * 2011-11-22 2017-02-16 Volterra Semiconductor LLC Coupled Inductor Arrays And Associated Methods
JP2017037925A (en) * 2015-08-07 2017-02-16 新電元工業株式会社 Planar transformer and DC-DC converter

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JPS5822579A (en) * 1981-08-04 1983-02-09 Hitachi Metals Ltd Switching power source
JPS6481661A (en) * 1987-09-22 1989-03-27 Dx Antenna Constant-voltage power circuit
JP2007097390A (en) * 2005-08-31 2007-04-12 Tdk Corp Switching power supply equipment
US20170047155A1 (en) * 2011-11-22 2017-02-16 Volterra Semiconductor LLC Coupled Inductor Arrays And Associated Methods
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