WO2020024171A1 - Control circuit for voltage conversion circuit - Google Patents

Abstract

Embodiments of the present invention provide a control circuit in the field of analog circuits. The control circuit is used to control a voltage conversion circuit. The control circuit comprises a sawtooth wave generator circuit, a first voltage comparator, and a second voltage comparator, wherein the sawtooth wave generator circuit generates two sawtooth signals, one of the sawtooth signals is reduced to a first reference voltage when the other is increased to a second reference voltage, and a slope difference between the two sawtooth signals is determined by a difference between a flying voltage and 1/2 of an input voltage. The first voltage comparator and the second voltage comparator respectively receive the two sawtooth signals, respectively output two PWM signals, and control the voltage conversion circuit. The control circuit of the invention adjusts a charging and discharging period of a flying capacitor in the voltage conversion circuit by means of adjusting the frequency of the two PWM signals according to the difference between the flying voltage and 1/2 of the input voltage, thereby controlling a voltage across the flying capacitor, reducing current ripples of an inductor in the voltage conversion circuit, and improving system efficiency.

Description

Control circuit of voltage conversion circuit Technical field

The present application relates to the field of electronics and communication technologies, and in particular, to a control circuit for a voltage conversion circuit.

Background technique

With the development of electric vehicle technology, lithium batteries have been widely used to provide driving energy for electric vehicles because of their high energy density and high reliability. Lithium batteries are increasingly required to store electricity, and fast charging has become a critical technology.

The core part of the battery charging system for lithium batteries includes a buck voltage conversion circuit (BUCK DCDC), which is used to transfer energy from a high-voltage power source to the battery according to the voltage required by the battery. In the prior art, a switch in a buck DCDC can be controlled by a PWM (Pulse Width Modulation) signal to convert a higher input voltage to a lower output voltage. In the above process, the input voltage periodically charges and discharges the fly capacitor. During the charging process, the average value of the inductor current cannot be kept constant. BUCK DCDC has been in a regulated state and cannot reach a steady state, which causes the voltage of the flying capacitor to be unstable, and the current ripple in the inductor is too large, which affects the system efficiency.

Summary of the invention

An embodiment of the present application provides a control circuit for controlling a voltage conversion circuit to solve a problem of voltage instability of a flying capacitor to a certain extent.

The FETs in the embodiments of the present application may be MOSFETs, JFETs, or other types of bidirectional FETs. The electrical connection in the embodiment of the present application may be a physical contact connection, or an electrical connection may be realized through a resistor, an inductor, a capacitor, or other electronic components.

In order to better describe the embodiments of the present application, the following terms or abbreviations will be used:

PWM: Pulse Width Modulation, pulse width modulation, according to the change of the corresponding load to modulate the bias of the transistor base or the gate of the MOS tube to achieve the change of the on-time of the transistor or the MOS tube, so as to achieve the change of the power output of the switch .

BUCK DCDC: Buck DC-DC conversion, the voltage at the output (load) end is lower than the input (power) end, but its output current is greater than the input current.

In a first aspect, an embodiment of the present application provides a control circuit for controlling a voltage conversion circuit. The control circuit includes a sawtooth wave generating circuit, a first voltage comparator, and a second voltage comparator. The sawtooth wave generating circuit is configured to receive and generate a first sawtooth wave signal and a second sawtooth wave signal according to the first reference voltage, the second reference voltage, the flying voltage, and the input voltage. When a slope increases to the second reference voltage, the second sawtooth wave signal decreases to the first reference voltage. When the second sawtooth wave signal increases to the second reference voltage with the second slope, the first sawtooth wave signal decreases to the first reference voltage. A reference voltage. The difference between the first and second slopes is determined by the voltage difference between the flying voltage and 1/2 the input voltage. The flying voltage is the voltage across the flying capacitor of the voltage conversion circuit. The input voltage is the input voltage of the voltage conversion circuit; the first voltage comparator is used to receive and compare the adjustment voltage and the first sawtooth wave signal, and generate a first pwm signal according to the comparison result; the second voltage comparator is used to receive and compare the adjustment voltage And the second sawtooth wave signal to generate a second pwm signal according to the comparison result; the above-mentioned adjusted voltage is used to characterize the above-mentioned voltage conversion circuit in a normal working state , The degree of deviation from steady state. The two pwm signals are used to control the voltage conversion circuit.

Due to the above characteristics of the first sawtooth wave signal and the second sawtooth wave signal, the duty ratios of the two pwm signals obtained by the voltage comparator are always equal and unchanged, so the control circuit will input the flying voltage and 1/2 times the input. The voltage difference is converted into the slope difference of the two sawtooth wave signals. The slope difference is used to adjust the frequency of the two pwm signals to adjust the time when the pwm signal is at a high level, thereby adjusting the charge and discharge time of the flying capacitor, so that Its net outflow or inflow of charge in a complete cycle to control the voltage across the capacitor across the capacitor, keep the voltage conversion circuit in a stable state, reduce the current ripple in the peripheral inductor, and improve system efficiency.

In a possible design, the first voltage comparator compares the magnitude of the first sawtooth wave signal with the adjustment voltage. When the first sawtooth wave signal is smaller than the adjustment voltage, the first pwm signal output by the first voltage comparator is High level, otherwise it is low level; the second voltage comparator compares the magnitude of the second sawtooth wave signal with the adjustment voltage. When the second sawtooth wave signal is smaller than the adjustment voltage, the second pwm output by the second voltage comparator The signal is high and vice versa. Through the voltage comparator, the control circuit converts the sawtooth wave signal into a pwm signal to control the time when the pwm signal is at a high level, thereby controlling the charging and discharging time of the flying capacitor.

In a possible design, the control circuit further includes an error amplifier for amplifying the difference between the third reference voltage and the feedback voltage, and outputting the difference to the first voltage comparator and the second voltage as the adjustment voltage. The comparator, wherein the feedback voltage is used to characterize the output voltage or the output current, the output voltage is the output voltage of the voltage conversion circuit, the output current is the output current of the voltage conversion circuit, and the third reference voltage is used to characterize the The output voltage of the conversion circuit is in a steady state during normal operation. The error amplifier collects the actual output voltage of the voltage conversion circuit, and corrects the adjustment voltage with the difference between the actual output voltage and the steady-state output voltage to stabilize the deviated actual output voltage.

In a possible design, the feedback voltage is equal to the output voltage of the voltage conversion circuit. The error amplifier collects the actual output voltage of the voltage conversion circuit, and corrects the adjustment voltage with the difference between the actual output voltage and the steady-state output voltage to stabilize the deviated actual output voltage.

In a possible design, when the first sawtooth wave signal is less than the adjustment voltage, the first voltage comparator outputs a high level, otherwise it outputs a low level; when the second sawtooth wave signal is less than the adjustment voltage, The second voltage comparator outputs a high level, otherwise it outputs a low level. Passing the first sawtooth wave signal and the second sawtooth wave signal through two comparators respectively, while obtaining the pwm signal, the duty cycle of the pwm signal is controlled to keep it unchanged, as a time for adjusting pwm to be at a high level The basics.

In a possible design, the sawtooth wave generating circuit includes a reference current generating circuit, a first oscillating circuit, and a second oscillating circuit, wherein the reference current generating circuit is configured to receive a flying voltage and an input voltage, and the flying voltage and / 2 times the input voltage is converted into a first reference current and a second reference current. The value of the current difference between the first reference current and the second reference current is proportional to the value of the voltage difference between the flying voltage and 1/2 the input voltage. ; The second reference voltage controls the first oscillating circuit to convert the first reference current into the first sawtooth wave signal, and the first slope of the first sawtooth wave signal rising is proportional to the first reference current; the second The reference voltage controls the second oscillating circuit to convert the second reference current into the second sawtooth wave signal. The second slope of the second sawtooth wave signal rising is proportional to the second reference current. The first slope and the second slope The difference between is proportional to the current difference between the first reference current and the second reference current. The flying voltage is a voltage across the flying capacitor of the voltage conversion circuit, and the input voltage is an input voltage of the voltage conversion circuit. When in an unstable state, the sawtooth wave generating circuit converts the difference between the flying voltage and 1/2 times the input voltage into a difference in current, thereby generating a sawtooth wave signal proportional to the current to control the voltage conversion circuit to adjust the flying Across voltage.

In a possible design, the reference current generating circuit is electrically connected to the first and second nodes respectively with the first and second oscillating circuits, and the reference current generating circuit includes a voltage dividing circuit, a conversion circuit, a first A current source and a second current source. The voltage dividing circuit is used to convert the above input voltage to 1/2 times the input voltage; the conversion circuit is used to convert the difference between the flying voltage and 1/2 times the input voltage into a first intermediate current and A second intermediate current that flows from the conversion circuit to the first node, and the second intermediate current flows from the second node to the conversion circuit; a first current source that is used to provide a current from the first node A first current source current flowing to the ground; a second current source for providing a second current source current flowing from the second node to the ground; the first current source current and the current of the second current source current The size is the same; wherein the first reference current flows from the first oscillation circuit to the first node, and the second reference current flows from the second oscillation circuit to the second node. The reference current generating circuit converts the difference between the flying voltage and 1/2 times the input voltage into the current difference, and feedbacks the unstable state of the voltage conversion circuit to the control circuit, which is beneficial to the control circuit to control the voltage conversion circuit in a steady state. .

In a possible design, the reference current generating circuit is electrically connected to the first and second nodes respectively with the first and second oscillating circuits, and the reference current generating circuit includes a voltage dividing circuit, a conversion circuit, a first A current source and a second current source. Among them, the voltage dividing circuit is used to convert the input voltage into k / 2 times the input voltage, where k is a positive number; the conversion circuit is used to convert the difference between k times the flying voltage and k / 2 times the input voltage into current. A first intermediate current and a second intermediate current of the same size, the first intermediate current flowing from the conversion circuit to the first node, the second intermediate current flowing from the second node to the conversion circuit; a first current source, the first current A source is used to provide a first current source current flowing from the first node to the ground; a second current source is used to provide a second current source current flowing from the second node to the ground; the first current source current and The second current source current has the same current magnitude; wherein the first reference current flows from the first oscillation circuit to the first node, and the second reference current flows from the second oscillation circuit to the second node. The reference current generating circuit converts the difference between k times the flying voltage and k / 2 times the input voltage into the current difference, and feedbacks the unstable state of the voltage conversion circuit to the control circuit, which is more convenient for calculating the flying voltage and Voltage difference of 1/2 times the input voltage.

In a possible design, when the flying voltage is less than 1/2 times the input voltage, the first intermediate current and the second intermediate current are positive; when the flying voltage is greater than 1/2 times the input voltage, The first intermediate current and the second intermediate current are negative; when the flying voltage is 1/2 times the input voltage, the first intermediate current and the second intermediate current are zero. When in an unstable state, the first intermediate current and the second intermediate current are not 0, resulting in different slopes of the two sawtooth wave signals. During the change, the slopes of the two sawtooth wave signals are gradually equal, so that the two outputs The current changes to 0, making the circuit tend to a stable state.

In a possible design, the first oscillating circuit includes a first current mirror and a first output circuit, wherein the first current mirror is configured to generate a first mirror current according to the first reference current according to a first ratio, and the first Two reference voltages control the first output circuit to convert the first image current to the first sawtooth wave signal according to a first ratio; correspondingly, the second oscillation circuit includes a second current mirror and a second output circuit, where the first The two current mirrors are configured to generate a second mirror current according to the second reference current according to a second ratio. The second reference voltage controls the second output circuit to convert the second mirror current to the second sawtooth wave signal according to the second ratio. . The first oscillating circuit and the second oscillating circuit convert the current into a sawtooth wave signal, and adjust the time when the pwm signal is at a high level by the slope of the sawtooth wave signal, so that the pwm signal is in an adjustable state.

In a possible design, the first ratio and the second ratio are equal. The first current mirror and the second current mirror amplify the reference current in equal proportions, keeping the above proportions the same, which is beneficial to the synchronous adjustment of the slopes of the first sawtooth wave signal and the second sawtooth wave signal.

In a possible design, a ratio of the first mirror current to the first reference current is 6: 1, and a ratio of the second mirror current to the second reference current is 6: 1. Keeping the above ratio to 6: 1 is beneficial to make the slope change of the first sawtooth wave signal and the second sawtooth wave signal more sensitive.

In a possible design, the voltage dividing circuit includes a first resistor and a second resistor in series with equal resistance. One end of the first resistor receives the input voltage, and the other end is electrically connected to one end of the second resistor. The other end of the second resistor is electrically connected to the ground. The electrical connection point of the two resistors outputs 1/2 times the input voltage. The voltage-dividing circuit obtains 1/2 the input voltage, so as to compare it with the flying voltage and receive the unstable state feedback from the voltage conversion circuit to adjust the voltage conversion circuit to a stable state.

In a possible design, the first output circuit includes a parallel first switching circuit and a first sawtooth wave capacitor, and one end of the first sawtooth wave capacitor is electrically connected to the first current mirror to receive a first image current. And output the first sawtooth wave signal, the other end receives the first reference voltage, and the second reference voltage controls the opening and closing of the first switch circuit; the second output circuit includes a second switch circuit and a second switch connected in parallel A sawtooth wave capacitor, wherein one end of the second sawtooth wave capacitor is electrically connected to the second current mirror to receive a second mirrored current and output the second sawtooth wave signal, and the other end receives the first reference voltage and the second reference voltage. The opening and closing of the second switch circuit is controlled, and the capacitance values of the first sawtooth wave capacitor and the second sawtooth wave capacitor are equal. The sawtooth wave capacitor is used to cause the voltage to rise and fall during the charging and discharging process, thereby generating a sawtooth wave signal to better control the voltage conversion circuit.

In a possible design, when the first sawtooth wave signal increases to the second reference voltage, the second switch circuit is closed, and when the first sawtooth wave is washed down to the first reference voltage, the above The second switch circuit is turned off; when the second sawtooth wave signal increases to the second reference voltage, the first switch circuit is closed, and when the second sawtooth wave is washed down to the first reference voltage, the first A switch circuit is turned off. The opening and closing of the first switching circuit and the second switching circuit are controlled by the second reference voltage, so that the first sawtooth wave signal and the second sawtooth wave signal fall when they rise to the second reference voltage, thereby controlling the duty of the pwm signal Than the purpose.

In a possible design, the positive input terminal of the first voltage comparator receives the regulated voltage, the negative input terminal of the first voltage comparator receives the first sawtooth wave signal, and the positive input of the second voltage comparator And the negative input terminal of the second voltage comparator receives the second sawtooth wave signal. The pwm signal is generated by the comparator to better control the voltage conversion circuit.

According to a second aspect, in the embodiment of the present application, a voltage conversion device is provided. The voltage conversion device includes a voltage conversion circuit and a control circuit, and the voltage conversion circuit is configured to be based on a first pulse width modulation signal and a second pulse width modulation signal. The control converts the input voltage into the output voltage. The control circuit is used to control the voltage conversion circuit. The control circuit is a control circuit as in the first aspect and its possible design.

Due to the above characteristics of the first sawtooth wave signal and the second sawtooth wave signal, the duty ratios of the two pwm signals obtained by the voltage comparator are always equal and unchanged, so the control circuit will input the flying voltage and 1/2 times the input. The voltage difference is converted into the slope difference of the two sawtooth wave signals. The slope difference is used to adjust the frequency of the two pwm signals to adjust the time when the pwm signal is at a high level, thereby adjusting the charge and discharge time of the flying capacitor, so that Its net outflow or inflow of charge in a complete cycle to control the voltage across the capacitor across the capacitor, keep the voltage conversion circuit in a stable state, reduce the current ripple in the peripheral inductor, and improve system efficiency.

According to a third aspect, a battery charging system is provided in an embodiment of the present application. The battery charging system includes a voltage conversion circuit, a control circuit, and a voltage stabilization circuit. The voltage stabilization circuit is configured to convert an AC voltage into the voltage conversion circuit. The input voltage is input to the voltage conversion circuit, and the voltage conversion circuit is configured to convert the input voltage into an output voltage and output the output voltage to a battery device according to the control of the first pulse width modulation signal and the second pulse width modulation signal, the control The circuit is used to control the voltage conversion circuit, wherein the control circuit is a control circuit as in the first aspect and its possible design.

Due to the above characteristics of the first sawtooth wave signal and the second sawtooth wave signal, the duty ratios of the two pwm signals obtained by the voltage comparator are always equal and unchanged, so the control circuit will input the flying voltage and 1/2 times the input. The voltage difference is converted into the slope difference of the two sawtooth wave signals. The slope difference is used to adjust the frequency of the two pwm signals to adjust the time when the pwm signal is at a high level, thereby adjusting the charge and discharge time of the flying capacitor, so that Its net outflow or inflow of charge in a complete cycle to control the voltage across the capacitor across the capacitor, keep the voltage conversion circuit in a stable state, reduce the current ripple in the peripheral inductor, and improve system efficiency.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to explain the technical solutions in the embodiments of the present application or the prior art more clearly, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below.

FIG. 1 is a schematic diagram of a 3-step buck voltage conversion circuit.

FIG. 2 (a) is a waveform diagram when the 3-step buck voltage conversion circuit is in a steady state; FIG.

FIG. 2 (b) is a waveform diagram when the 3-step buck voltage conversion circuit is in an unstable state.

FIG. 3 (a) is a voltage path diagram of the 3-stage step-down voltage conversion circuit at T1 to T2 stages;

FIG. 3 (b) is a voltage path diagram of the 3-stage step-down voltage conversion circuit at T2 to T3 stages;

FIG. 3 (c) is a voltage path diagram of the 3-stage step-down voltage conversion circuit at the stages T3 to T4;

FIG. 3 (d) is a voltage path diagram of the 3-stage step-down voltage conversion circuit at T4 to T5 stages.

FIG. 4 is a schematic diagram of a control circuit in an embodiment of the present application.

FIG. 5 is a schematic diagram of a sawtooth wave generating circuit according to an embodiment of the present application.

FIG. 6 is a waveform diagram of a 3-stage step-down voltage conversion circuit in a steady state according to an embodiment of the present application.

FIG. 7 is a waveform diagram when the control circuit adjusts the flying voltage in the embodiment of the present application.

FIG. 8 is a schematic diagram of a 3-step boost voltage conversion circuit.

FIG. 9 is a schematic diagram of a battery charging system.

detailed description

In the following, the technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

The voltage conversion circuit is a circuit that converts a DC input voltage into another DC output voltage, such as a 3-step buck voltage conversion circuit (BUCK DCDC), or a 3-step boost voltage conversion circuit. The 3-step buck voltage conversion circuit (BUCK DCDC) is a voltage conversion circuit that controls the opening and closing of switches in the voltage conversion circuit by receiving two pwm signals, thereby converting a higher DC input voltage to a lower DC output voltage. The voltage conversion circuit includes a fly capacitor. During the period when the switch is opened and closed, the input voltage charges and discharges the fly capacitor to generate a stable output voltage. FIG. 1 is a schematic circuit diagram of a voltage conversion circuit 100. Specifically, FIG. 1 is a 3-stage step-down voltage conversion circuit. The voltage conversion circuit 100 receives the first pulse width modulation signal (pwm1 signal) and the second pulse width modulation signal (pwm2 signal), and uses the first pulse width modulation signal and the second pulse width modulation signal as control signals. , The higher voltage input voltage Vin is converted into the lower voltage output voltage Vout. The voltage conversion circuit 100 includes four switches (Q1, Q2, Q3, and Q4), a control circuit (DRV1, DRV2, DRV3, and DRV4), a flying capacitor C _fly, and a peripheral circuit 110. The peripheral circuit 110 includes a peripheral inductor L _L , Peripheral capacitor C _L and equivalent load resistance R _L. The switches Q1, Q2, Q3, and Q4 may be field effect transistors (FETs), such as metal-oxide semiconductor field effect transistors (MOSFETs), or junction field effect transistors (MOSFETs). JFET, Junction Field-Effect Transistor), can also be other types of transistors.

As shown in FIG. 1, in the voltage conversion circuit 100, four switches Q1, Q2, Q3, and Q4 are connected in series in the forward direction, and the drain of the switch Q1 is electrically connected to the input voltage source Vin, and the source of the switch Q4 is electrically connected to the ground. connection. One end of the flying capacitor C _fly is electrically connected to the source of the switch Q1, and the other end is electrically connected to the source of the switch Q3. One end of the peripheral inductor L _L in the peripheral circuit 110 is electrically connected to the source of the switch Q2, and the other end is electrically connected to one end of the peripheral capacitor C _L and the load resistor R _L , and the other end of the peripheral capacitor C _L and the load resistor R _L Connected to ground. The control circuit DRV1 receives the pwm1 signal and controls the gate of the switch Q1 to control the opening and closing of the switch Q1; the control circuit DRV2 receives the pwm2 signal and controls the gate of the switch Q2 to control the opening and closing of the switch Q2; the control circuit DRV3 receives the pwm2 signal After the pwm2 signal is inverted, the gate of the switch Q3 is controlled to control the opening and closing of the switch Q1; the control circuit DRV4 receives the pwm1 signal, and after the pwm1 signal is inverted, the gate of the switch Q4 is controlled to control the opening and closing of the switch Q4.

In the voltage conversion circuit 100, the pwm1 signal controls the opening and closing of the switches Q1 and Q4, and the pwm2 signal controls the opening and closing of the switches Q2 and Q3. When the circuit is in a steady state, the high level of the pwm1 signal closes the switch Q1 and opens the switch Q4, and the low level of the pwm1 signal opens the switch Q1 and closes the switch Q4. Similarly, the high level of the pwm2 signal closes the switch Q2 and opens the switch Q3, and the low level of the pwm2 signal opens the switch Q2 and closes the switch Q3. When the voltage conversion circuit 100 is in a steady state, the pwm1 signal and the pwm2 signal have the same frequency and the same duty cycle, but the phase difference is 180 °.

Fig. 2 (a) is a waveform diagram when the voltage conversion circuit 100 is in a steady state. The working principle of the voltage conversion circuit 100 will be described with one complete period T1 to T5. It should be noted that the duty ratio in this application is the ratio of the time when the pwm signal is at a high level to the time difference between the rising edges of the two pwm signals. For example, the duty cycle of the pwm1 signal can be expressed as (T2-T1) / (T3-T1), and the duty cycle of the pwm2 signal can be expressed as (T4-T3) / (T5-T3). Correspondingly, the frequency of the pwm signal in this application is the inverse of the time difference between the rising edge of the pwm signal and the rising edge of another pwm signal. For example, the frequency of the pwm1 signal can be expressed as 1 / (T3-T1), and the frequency of the pwm2 signal can be expressed as 1 / (T5-T3).

During the T1 to T2 phase, the pwm1 signal is high and the pwm2 signal is low. Therefore, the switches Q1 are closed, Q2 is open, Q3 is closed, and Q4 is open. The voltage path formed at this time is shown in Figure 3 (a) . The flying capacitor C _{L is} in a charging state, and the flying voltage V _fly across the capacitor becomes larger with time. The direction of the current I _fly in the flying capacitor C _L is from node A to node C. The current IL in the peripheral inductance L _L becomes larger with time.

During the T2 to T3 stages, the pwm1 signal is low and the pwm2 signal is low. Therefore, the switches Q1 are open, Q2 is open, Q3 is closed, and Q4 are closed. The voltage path formed at this time is shown in Figure 3 (b). Among them, only one end of the flying capacitor C _L is electrically connected to the ground through a switch, and is in a floating state, and the flying voltage V _fly at both ends of the capacitor remains unchanged. The current IL in the peripheral inductance L _L becomes smaller with time.

During the period T3 to T4, the pwm1 signal is low and the pwm2 signal is high. Therefore, the switches Q1 are open, Q2 is closed, Q3 is open, and Q4 is closed. The voltage path formed at this time is shown in Figure 3 (c). Among them, the flying capacitor C _{L is} in a discharging state, and the flying voltage V _fly at both ends thereof decreases with time, and the direction of the current I _fly is from the node C to the node A. The current IL in the peripheral inductance L _L becomes larger with time, and the increasing slope is the same as that in the stages T1 to T2.

During the T4 to T5 stages, the pwm1 signal is low and the pwm2 signal is low. Therefore, the switches Q1 are open, Q2 is open, Q3 is closed, and Q4 is closed. The voltage path formed at this time is shown in Figure 3 (d). Among them, only one end of the flying capacitor C _L is electrically connected to the input voltage source Vin through a switch and is in a floating state. The flying voltage V _fly at both ends of the capacitor remains unchanged. The current IL in the peripheral inductance L _L becomes smaller with time, and the slope of the decrease is the same as that in the T 2 to T 3 stages.

In the voltage conversion circuit 100, the voltage V _fly across the flying capacitor C _fly needs to be stabilized at Vin / 2 to make the circuit work in a steady state. The adjustment of the flying capacitor voltage V _fly is usually achieved by changing the duty cycle of the pwm1 signal and the pwm2 signal. For example, the duty cycle of the pwm1 signal before adjustment is 20%, and the duty cycle of the pwm2 signal is 20%. At this time, the voltage across V _fly is less than Vin / 2. Adjust the duty cycle of the pwm1 signal to 30% and the duty cycle of the pwm2 signal to 10%, so that the time for the switches Q1 and Q3 to close at the same time is increased, that is, the charging time T2-T1 of the flying capacitor C _fly is increased, At the same time, the time for the switches Q2 and Q4 to be closed at the same time is shortened, that is, the discharge time T4-T3 of the flying capacitor C _fly is reduced. Since the current of the capacitor C _fly flying I _fly equal to the current IL in the peripheral inductor LI, when the average current IL in the charge and discharge process in the average remains the same, after a complete cycle, flying capacitors There will be static charge in C _fly , which can cause V _{fly to} rise. Conversely, if you lower the duty cycle of the pwm1 signal and increase the duty cycle of the pwm2 signal, you can turn down V _fly .

In actual work, the average value of the current IL in the peripheral inductor L _L during the charging process and the average value during the discharging process are usually not equal. As shown in FIG. 2 (b), the waveform diagram of the voltage conversion circuit 100 is continuously in the regulated state (in an unstable state). During the period of T4 to T5, due to the short duration, the current IL in the peripheral inductance L _L cannot decrease. The current value at time T3, that is, the average value of the current IL cannot be maintained, which causes the ripple of the current IL in the peripheral inductor L _{L to} be too large, which affects the efficiency of the system. To make the voltage conversion circuit 100 in a stable state, the voltage V _fly across the flying capacitor must be stabilized at Vin / 2.

The present application provides a control circuit for generating two pwm signals according to an input voltage and an output voltage of a voltage conversion circuit, and a plurality of reference voltages, wherein the above input voltage and output voltage are used as feedback voltage signals to adjust the above pwm signal to a high voltage. The flat time, thereby adjusting the charge and discharge time of the flying capacitor, so as to adjust the flying voltage in the voltage conversion circuit.

As shown in FIG. 4, a control circuit 400 can be used to control the voltage conversion circuit. The control circuit 400 includes a sawtooth wave generating circuit 410, an error amplifier 420, a first voltage comparator 430, and a second voltage comparator 440. The sawtooth wave generating circuit 410 receives the voltage V _fly across the flying capacitor C _fly , the input voltage Vin of the voltage conversion circuit 100, and the first reference voltage Vref1 and the second reference voltage Vref2, and generates the voltage according to Vin, V _fly , Vref1, and Vref2. The first sawtooth wave signal Vsaw1 and the second sawtooth wave signal Vsaw2. Wherein, when the voltage value of the first sawtooth wave signal Vsaw1 increases with a slope of slope1 to the second reference voltage Vref2, the second sawtooth wave signal Vsaw2 drops to the first reference voltage Vref1. When the voltage value of the second sawtooth wave signal Vsaw2 starts at When the slope slope2 increases to the second reference voltage Vref2, the first sawtooth wave signal Vsaw1 decreases to the first reference voltage Vref1. The sawtooth wave generating circuit 410 controls and determines the difference between the slope slope1 and the slope slope2 according to the voltage difference between the flying voltage V _fly and 1/2 times the input voltage Vin.

The error amplifier 420 receives the third reference voltage Vref3 and the feedback voltage Vfb, amplifies the difference between the third reference signal and the feedback voltage Vfb, and outputs it as an err signal (that is, an adjustment voltage) to the first voltage comparator 430 and the second voltage. Comparator 440. The above-mentioned third reference voltage Vref3 is determined according to the output voltage Vout that the voltage conversion circuit 100 is in a steady state during normal operation, that is, the third reference voltage Vref3 can represent the output voltage that is in a steady state when the voltage conversion circuit 100 is divided. The feedback voltage Vfb is determined according to the output voltage Vout or the output current Iout, where the output voltage Vout is the output voltage of the voltage conversion circuit and the output current Iout is the output current of the voltage conversion circuit 100. For example, the output current Iout may be the current in the peripheral inductor L _L Mean value of _IL . In a possible implementation manner, the feedback voltage Vfb is equal to the output voltage Vout. Therefore, the err signal (that is, the regulation voltage) is used to characterize the extent to which the voltage conversion circuit 100 deviates from the steady state in a normal operating state. For example, when the actual output voltage Vout of the voltage conversion circuit 100 deviates from the output in a steady state during normal operation The larger the voltage, the larger the voltage value of the err signal (regulated voltage).

The first voltage comparator 430 receives the first sawtooth wave signal Vsaw1 generated by the sawtooth wave generating circuit 410 and the err signal output by the error amplifier 420, and outputs a pwm1 signal by comparing the magnitude relationship between the first sawtooth wave signal Vsaw1 and the err signal; The two voltage comparator 440 receives the second sawtooth wave signal Vsaw2 generated by the sawtooth wave generating circuit 410 and the err signal output by the error amplifier 420, and outputs a pwm2 signal by comparing the magnitude relationship between the second sawtooth wave signal Vsaw2 and the err signal. The above-mentioned pwm1 signal and pwm2 signal are used to control the voltage conversion circuit 100. Among them, the err signal is an adjustment voltage and is used to adjust the duty cycle of the pwm1 signal and the pwm2 signal. In the following, for convenience of description, the err signal is used to indicate the adjustment voltage.

The first sawtooth wave signal Vsaw1 and the second sawtooth wave signal Vsaw2 pass through the first voltage comparator 430 and the second voltage comparator 440 to generate a pwm1 signal and a pwm2 signal. The above-mentioned pwm1 signal and pwm2 signal are in an adjustment process or are in a steady state. The duty cycle remains unchanged and the duty cycle is equal to err / Vref2. Therefore, when the control circuit 400 controls the voltage conversion circuit 100 by using the pwm1 signal and the pwm2 signal described above, the voltage amount of the flying voltage V _fly deviating from 1/2 of the input voltage Vin is converted into the difference between the slope slope1 and the slope slope2, and the difference Slope output of the above two sawtooth wave signals, so that the pwm1 and pwm2 signals generated by the first voltage comparator 430 and the second voltage comparator 440 can adjust the frequency of the pwm1 signal and the pwm2 signal under the condition that the duty cycle is unchanged. To adjust the time when the pwm1 signal and pwm2 signal are at a high level, so as to adjust the charge and discharge time of the flying capacitor C _fly , so that it will net out or charge in a complete charge and discharge cycle, so as to realize the flying capacitor C _fly across the control voltage V _fly Vin / 2, the voltage conversion circuit 100 is in a stable state, thereby reducing the inductance _L L _L peripheral ripple current in I, to improve system efficiency.

The first voltage comparator 430 and the second voltage comparator 440 may be a single-limit comparator, a hysteresis comparator, a window comparator, or other types of voltage comparators. This application does not perform the types or specific structures of the voltage comparators. Limitation, nor does it limit the positive and negative connections of the input end of the voltage comparator. In a possible implementation manner, the first voltage comparator 430 compares the magnitude of the Vsaw1 signal and the err signal. When the Vsaw1 signal is smaller than the err signal, the output pwm1 signal is high, otherwise the output pwm1 signal is low. The second voltage comparator 440 compares the magnitude of the Vsaw2 signal and the err signal. When the Vsaw2 signal is smaller than the err signal, the output pwm2 signal is high, otherwise the output pwm2 signal is low. In another possible implementation manner, when the Vsaw1 signal is less than the err signal, the output pwm1 signal is low level, otherwise the output pwm1 signal is high level; when the Vsaw2 signal is less than the err signal, the output pwm2 signal Is low, otherwise the output pwm2 signal is high. In this application, the err signal is electrically connected to the positive inputs of the first voltage comparator 430 and the second voltage comparator 440, respectively, and the negative electrode of the first voltage comparator 430 receives the first sawtooth wave signal Vsaw1, and the second voltage is compared The negative terminal of the converter 440 receives the second sawtooth wave signal Vsaw2. The error amplifier 420 may be a transistor amplifier circuit or a field effect tube amplifier circuit. This application does not limit the type or specific structure of the amplifier, nor does it limit the positive and negative connections of the input terminal of the error amplifier 420.

The error amplifier 420 receives Vref3 and Vfb, amplifies the difference between Vref3 and Vfb, and outputs it as an err signal. The feedback voltage Vfb is determined according to the output voltage Vout or the output current Iout of the voltage conversion circuit 100. For example, the feedback voltage Vfb may be the actual output voltage Vout, or may be 1/2 times the output voltage Vout, or may be the output current Iout. The converted voltage value. In a possible implementation manner, the error amplifier 420 may directly calculate and amplify the actual output voltage Vout of the voltage conversion circuit 100 and the third reference voltage.

Vref3 is output as an err signal. At this time, the third reference voltage Vref3 is an output voltage in a steady state when the voltage conversion circuit 100 works normally. For example, the output voltage of the voltage conversion circuit 100 in a steady state is 20V during normal operation, and its actual output voltage is 19V in an unstable state. At this time, the third reference voltage Vref3 = 20V received by the error amplifier 420, and the error The signal (that is, the actual output voltage) is 19V, so the error amplifier 420 amplifies the above-mentioned difference of 1V and outputs it as an err signal.

FIG. 5 is a schematic diagram of a sawtooth wave generating circuit 410. The sawtooth wave generating circuit 410 includes a reference current generating circuit 411, a first oscillating circuit 412 and a second oscillating circuit 413. Wherein the reference current generating circuit 411 according to the flying capacitors C _fly across the flying and the input voltage V _fly voltage Vin, the first reference current Iref1 and generates a second reference current Iref2, the above-described difference value of the current Iref1 and Iref2 with said fly The voltage across the _fly voltage V _fly is proportional to the value of the voltage difference of 1/2 the input voltage Vin. The second reference voltage Vref2 controls the first oscillation circuit 412 to convert the first reference current Iref1 into a first sawtooth signal Vsaw1, and the second reference voltage Vref2 controls the second oscillation circuit 413 to convert the second reference current Iref2 into a second The sawtooth wave signal Vsaw2, wherein the rising slope1 of the first sawtooth wave signal Vsaw1 is proportional to the current value of the first reference current Iref1, and the rising slope of the second sawtooth wave signal Vsaw2 is proportional to the current value of the second reference current Iref2, slope1-slope2 is proportional to Iref1-Iref2.

The reference current generating circuit 411 may have a circuit structure as shown in FIG. 5, including a conversion circuit Gm, a voltage dividing circuit DIV, a first current source ib1 and a second current source ib2. The voltage dividing circuit DIV is used to convert the input voltage Vin into 1/2 times the input voltage Vin. For example, the resistor R1 and the resistor R2 are connected in series, one end of the resistor R1 receives the input voltage Vin, the other end is electrically connected to one end of the resistor R2 to the node A, and the other end of the resistor R2 is electrically connected to the ground. In a possible implementation manner, the resistances of the resistor R1 and the resistor R2 are equal to obtain half the input voltage Vin at the node A, that is, 1 / 2Vin.

The two input terminals of the conversion circuit Gm respectively receive the voltage V _fly across the flying capacitor C _fly and 1/2 times the input voltage 1 / 2Vin, that is, the voltage at node A, and the received V _fly voltage and 1 / 2Vin The voltage difference is converted into a current io1 and a current io2, and the above current is output through the node B and the node C. The currents io1 and io2 have the same magnitude and opposite directions, and the current values of the currents io1 and io2 are proportional to the voltage difference between V _fly and 1 / 2Vin. The positive and negative currents io1 and io2 are related to V _fly and 1 / 2Vin. Specifically, when V _fly <1 / 2Vin, current io1 and current io2 are positive; when V _fly > 1 / 2Vin, current io1 and The current io2 is negative; when V _fly = 1 / 2Vin, the current io1 and the current io2 are 0. It should be noted that the voltage actually input to the conversion circuit Gm may also be kV _fly and k / 2Vin, and k may be a positive integer or other positive number, and this application does not limit the specific voltage input to the conversion circuit Gm. The conversion circuit Gm actually converts the voltage difference between V _fly and 1 / 2Vin into two currents in opposite directions. For example, the conversion circuit Gm can convert a voltage difference between 1 / 2V _fly and 1 / 4Vin into a current io1 and a current io2.

In a possible implementation manner, the direction of the current io1 is flowing from the conversion circuit Gm to the node B, and the direction of the current io2 is opposite, and is flowing from the node C to the conversion circuit Gm. The first current source is electrically connected to the node B and the ground, and provides a current ib from the node B to the ground. Therefore, the current Iref1 input to the first current mirror 4121 can be expressed as:

Iref1 = ib–io1,

The current direction of Iref1 is from the first current mirror 4121 to the node B; similarly, the second current source is electrically connected to the node C and the ground terminal, and provides a current ib of the same magnitude from the ground terminal to the node C, so it is input to the first The current Iref2 in the two current mirror 4131 can be expressed as

Iref2 = ib + io2,

The current direction of Iref2 is from the second current mirror 4131 to the node C. Since Iref2-Iref1 = io2 + io1, io2 and io1 and are equal in size and with a voltage proportional to the difference V _fly and 1 / 2Vin, and therefore with V _fly Iref2-Iref1 and the voltage proportional to the difference 1 / 2Vin of.

As shown in FIG. 5, the first oscillation circuit 412 includes a first current mirror 4121 and a first output circuit 4122. The first current mirror 4121 is configured to generate a first mirrored current Imr1 according to the first reference current Iref1. The first output circuit 4122 receives the first mirrored current Imr1. The second reference voltage Vref2 controls the first output circuit 4122 to convert the first mirrored current Imr1. Imr1 is converted into the first sawtooth wave signal Vsaw1, and the slope1 of Vsaw1 is proportional to Iref1. Accordingly, the second oscillating circuit 413 includes a second current mirror 4131 and a second output circuit 4132. The second oscillating circuit 413 includes a second current mirror 4131 and a second output circuit 4132. The second current mirror 4131 is used to generate a second mirrored current Imr2 according to the second reference current Iref2. The second output circuit 4132 receives the second mirrored current Imr2. The second reference voltage Vref2 controls the second output circuit 4132 to convert the second mirrored current Imr2. Imr2 is converted into the second sawtooth wave signal Vsaw2, and the slope of Vsaw2, slope2, is proportional to Iref2.

The first current mirror 4121 and the second current mirror 4131 may have a circuit structure as shown in FIG. 5. The first current mirror 4121 is used as an example for description. The first current mirror 4121 may include a first field-effect transistor M1 and a second field-effect transistor M2. The sources of the first field-effect transistor M1 and the second field-effect transistor M2 are electrically connected to the source of the analog voltage source AVDD. The gates of the MOSFET M1 and the second MOSFET M2 are electrically connected, the drain of the first MOSFET M1 is electrically connected to the first output circuit 4122, and the gate and drain of the second MOSFET M2 are electrically connected. On Node B. The current values of the first reference current Iref1 and the first mirror current Imr1 are achieved by adjusting the ratio of the device sizes of the first field-effect transistor M1 and the second field-effect transistor M2, that is, the width-to-length ratio (W / L) of the channel. proportion. For example, by adjusting the ratio of the size of the above device, so that:

Imr1 / Iref1 = Imr2 / Iref2,

That is, the first reference current Iref1 and the second reference current Iref2 obtain corresponding mirror currents through mirroring in equal proportions. In a possible implementation manner, the ratio of the device sizes of the first field-effect transistor M1 and the second field-effect transistor M2 is 6: 1, that is, the obtained first image current Imr1 = 6Iref1. Similarly, the second current mirror 4131 has a similar structure to the first current mirror 4121, and details are not described herein again. In a possible implementation manner, the ratio of the third field-effect transistor M3 and the fourth field-effect transistor M4 is 6: 1, that is, the obtained second image current Imr2 = 6Iref2. It should be noted that the present application does not limit the specific structures of the first current mirror 4121 and the second current mirror 4131. They may be MOS tube current mirrors, BJT (Bipolar Junction Transistor, bipolar junction transistor) current mirrors, and the like.

The first output circuit 4122 and the second output circuit 4132 may have a circuit structure as shown in FIG. 5. The first output circuit 4122 will be described as an example. The first output circuit 4122 includes a first sawtooth wave capacitor Csaw1 and a first switch circuit S1 connected in parallel. One end of the first sawtooth wave capacitor Csaw1 receives the first mirror current Imr1 output from the first current mirror 4121 at the node D, and the other end The first reference voltage Vref1 is received, and the voltage at the node D is the first sawtooth voltage Vsaw1. The second reference voltage Vref2 is used to control the opening and closing of the first switching circuit S1. Similarly, the second output circuit 4132 has a similar structure to the first output circuit 4122, and includes a second sawtooth wave capacitor Csaw2 and a second switch circuit S2 connected in parallel. One end of the second sawtooth wave capacitor Csaw2 receives the first node at the node E. The second mirror current Imr2 output by the two current mirrors 414 receives the first reference voltage Vref1 at the other end, and the voltage at the node E is the second sawtooth voltage Vsaw2. The second reference voltage Vref2 is used to control the opening and closing of the second off circuit S2. When the first sawtooth wave signal Vsaw1 increases to Vref2, the first switch circuit S1 is closed, at this time the first sawtooth wave capacitor Csaw1 is discharged, the first sawtooth wave signal Vsaw1 falls, and when the first sawtooth wave signal Vsaw1 falls to Vref1, The first switching circuit is open; similarly, when the second sawtooth wave signal Vsaw2 increases to Vref2, the second switching circuit S2 is closed, at this time the second sawtooth wave capacitor Csaw2 is discharged, and the second sawtooth wave signal Vsaw2 decreases. When the two sawtooth wave signal Vsaw2 drops to Vref1, the second switching circuit is turned off. The capacitance values of the first sawtooth wave capacitor Csaw1 and the second sawtooth wave capacitor Csaw2 are equal, so that when adjusting slope1 and slope2, the changes of the two slopes are symmetrical.

The waveform in FIG. 6 is taken as an example to describe the working principle of the sawtooth wave generating circuit 410. The waveform diagram shown in FIG. 6 is an input-output waveform when the sawtooth wave generating circuit 410 is in a steady state. At this time, the slope of the first sawtooth wave signal Vsaw1 climbing slope1 and the slope of the second sawtooth wave signal Vsaw2 climbing slope2 are equal.

During the period from T1 to T3, the first sawtooth wave signal Vsaw1 and the second sawtooth wave signal Vsaw2 climb respectively with the slopes of slope1 and slope2, and slope1 = slope2. Because the Vsaw1 signal is higher than the err signal, the pwm1 signal generated by the first voltage comparator cmp1 is at a low level. Because the Vsaw2 signal is lower than the err signal during T1 to T2, the pwm2 signal generated by the second voltage comparator cmp2 is high. At time T3, the second sawtooth wave signal Vsaw2 increases to the second reference voltage Vref2. At this time, the first switch circuit S1 is closed, so that the first sawtooth wave signal Vsaw1 quickly drops to the first reference voltage Vref1.

During the period from T3 to T5, the first sawtooth wave signal Vsaw1 and the second sawtooth wave signal Vsaw2 climb respectively with the slopes of slope1 and slope2, and slope1 = slope2. Because the Vsaw2 signal is higher than the err signal, the pwm2 signal generated by the second voltage comparator cmp2 is at a low level. Because the Vsaw1 signal is lower than the err signal during T3 to T4, the pwm1 signal generated by the first voltage comparator cmp1 is high. At time T5, the first sawtooth wave signal Vsaw1 increases to the second reference voltage Vref2. At this time, the second switch circuit S1 is closed, so that the second sawtooth wave signal Vsaw2 quickly drops to the first reference voltage Vref1.

As shown in FIG. 6, when the sawtooth wave generating circuit 410 is in a steady state, the climbing slopes of the first sawtooth wave signal Vsaw1 and the second sawtooth wave signal Vsaw2 are equal, that is, slope1 = slope2, so t1 = t2, so the pwm1 signal and pwm2 The signal has the same duty cycle.

The ramp rates of the first sawtooth wave signal Vsaw1 and the second sawtooth wave signal Vsaw2 are determined by the first sawtooth wave capacitor Csaw1, the second sawtooth wave capacitor Csaw2, ib, io1, and io2. Specifically, the slope 1 of the climb of the first sawtooth wave signal Vsaw1 can be expressed as:

The ramp slope 2 of the second sawtooth wave signal Vsaw2 can be expressed as:

From the above expression, the frequency of the pwm1 signal can be expressed as:

The frequency of the pwm2 signal can be expressed as:

Among them, io1 = io2 and Csaw1 = Csaw2.

When Vin / 2> V _fly input to the conversion circuit Gm, io1 and io2 are both positive; when Vin / 2 <V _fly , io1 and io2 are both negative. When in a steady state, that is, Vin / 2 = V _fly , io1 = io2 = 0, so slope1 = slope2, so that the duty cycle of the pwm1 signal and the pwm2 signal are the same. Therefore, when V _fly > Vin / 2, io1> 0, and io2> 0, then slope1 <slope2. At this time, slope1 becomes larger and slope2 becomes smaller until slope1 = slope2, thereby achieving Vin / 2 = V _fly .

The process of adjusting the voltage V _fly across the flying capacitor C _fly by the pwm1 signal and the pwm2 signal generated by the control circuit 400 is illustrated by the waveform diagram shown in FIG. 7. The control circuit 400 adjusts the time when the pwm1 signal and the pwm2 signal are at a high level by changing the frequencies of pwm1 and pwm2, thereby changing the charging and discharging time of the flying capacitor C _fly , and finally achieving the purpose of controlling V _fly .

For example, at time T1, the flying voltage V _fly > Vin / 2 across the flying capacitor C _fly , at this time, this V _fly needs to be adjusted down to meet V _fly = Vin / 2. The conversion circuit Gm detects a positive voltage difference between V _fly and Vin / 2, and generates currents io1 and io2 according to the voltage difference, thereby generating Iref1 and Iref2, and then generates a Vsaw1 signal and a Vsaw2 signal. Since the current difference between the currents io1 and io2 is proportional to the voltage difference between V _fly and Vin / 2, and the difference between the slopes of slopes Vsaw1 and slope2 of Vsaw1 is proportional to the current difference between the currents io1 and io2, it is detected The positive voltage difference between V _fly and Vin / 2 eventually causes the slope slope1 to become larger, while making slope2 smaller, which causes t1 (t1 = T3-T1) to become longer and t2 (t2 = T5-T3) to be shorter. As t1 becomes longer, the frequency of the pwm1 signal becomes higher, while as t2 becomes shorter, the frequency of the pwm2 signal becomes lower. While the frequency of the pwm1 signal and the pwm2 signal changes, the duty cycle of the pwm1 signal and the pwm2 signal remains unchanged, both being err / Vref2. Therefore, in the above process, by adjusting the frequency of the pwm1 signal and the pwm2 signal, the time during which the pwm1 signal and the pwm2 signal are at a high level is adjusted, so that the time during which the pwm1 signal is at a high level (T4-T3) becomes shorter, and the pwm2 The time (T2-T1) at which the signal is high becomes longer.

As described above, in the voltage conversion circuit 100, when the pwm1 signal is high and the pwm2 signal is low, the flying capacitor C _{fly is} in a charging state, and the voltage V _fly across the capacitor becomes larger with time; when pwm1 When the signal is at a low level and the pwm2 signal is at a high level, the flying capacitor C _{fly is} in a discharging state, and the voltage V _fly at both ends thereof decreases with time. When the time when the pwm1 signal is at the high level (T4-T3) becomes shorter, the charging time of the flying capacitor C _fly becomes shorter; accordingly, the time when the pwm2 signal is at the high level (T2-T1) becomes longer, the flight time The discharge time of the _{transcapacitor} C _fly becomes longer. Because in a short time, the average value of the current IL in the peripheral inductance L _L can be regarded as constant, so the electric charge charged by the flying capacitor C _fly becomes smaller and the discharged electric charge becomes larger. After a complete cycle, the charge of the flying capacitor C _fly is in a state of net outflow, so the voltage V _fly across the two terminals drops to achieve the purpose of adjusting the flying voltage V _fl to Vin / 2, as shown in FIG. 7. Because the duty ratios of the pwm1 and pwm2 signals remain unchanged, the external inductor current IL does not change at time T1 and T3, and the external inductor current IL does not change at time T3 and T5. Thus, the inductance L _L of the peripheral proportional to the charge and discharge time of the charging or discharging, so that the periphery of the inductance L _L of the inductor current average kept constant.

As shown in FIG. 8, a 3-stage boost voltage conversion circuit 800 (BOOST DCDC) is used to convert a lower input voltage Vin into a higher output voltage Vout. The control circuit 400 provided in the embodiment of the present application It can be used to control the 3-step boosted voltage conversion circuit 800 to achieve voltage conversion. The circuit structure and operating principle of the 3-step boost voltage conversion circuit 800 are similar to the voltage conversion circuit 100. The pwm1 and pwm2 signals output by the control circuit 400 also close and open the switches Q1, Q2, Q3, and Q4. Control is not repeated here. The difference is that the electrical connection point of the peripheral inductor LL and the peripheral capacitor CL in the voltage conversion circuit 800 is electrically connected to the input voltage source Vin, and the drain of the switch Q1 is a node that generates the output voltage Vout.

It should be noted that the control circuit 400 according to the embodiment of the present application may be used to control other voltage conversion circuits, including but not limited to the voltage conversion circuit 100 or the voltage conversion circuit 800. The voltage conversion circuit is used to convert an input voltage into an output voltage. The voltage conversion circuit controls the opening and closing of a switch in the voltage conversion circuit by receiving two pwm signals, thereby outputting a stable output voltage. The voltage conversion circuit includes a fly capacitor. During the period when the switch is opened and closed, the input voltage charges and discharges the fly capacitor to generate a stable output voltage.

In the present application, the control circuit 400 may be provided in a voltage conversion device for controlling the voltage conversion circuit in the voltage conversion device. The voltage conversion device may be a battery charging system or a battery provided in the battery charging system. Management module. As shown in FIG. 9, a battery charging system 900 includes a 3-stage step-down voltage conversion circuit 100, a control circuit 400, and a voltage stabilization circuit 910. Among them, the voltage stabilizing circuit 910 receives an AC voltage output from an external AC voltage source and converts it into a DC voltage with a higher voltage value; the control circuit 400 outputs two pwm according to a voltage signal fed back by the third-order step-down voltage conversion circuit 100. The signal is used to control the closing and opening of the semiconductor switch in the voltage conversion circuit 100. The 3-stage step-down voltage conversion circuit 100 receives the above-mentioned DC voltage and outputs a DC voltage with a lower voltage value to the battery device 920 according to the control of the pwm signal. To complete the entire charging process.

The voltage conversion circuit may be a 3-step step-down voltage conversion circuit 100, a 3-step step-up voltage conversion circuit 800, or another type of voltage conversion circuit, which is not limited in this application. In one embodiment, the control circuit 400 may be provided as a discrete device on a PCB (Printed Circuit Board) or packaged in an ASIC (Application-Specific Integrated Circuit). In another embodiment, the control circuit 400 and the voltage conversion circuit are disposed on a PCB as separate devices, or are packaged in an ASIC.

The above is only a specific implementation of this application, but the scope of protection of this application is not limited to this. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in this application. It should be covered by the protection scope of this application. Therefore, the protection scope of this application shall be subject to the protection scope of the claims.

Claims (18)

1. A control circuit for controlling a voltage conversion circuit is characterized in that the control circuit includes:

   The sawtooth wave generating circuit is configured to receive a first reference voltage, a second reference voltage, a flyover voltage, and an input voltage, and control a first slope and a first slope according to a voltage difference between the flyover voltage and 1/2 times the input voltage. Two slopes and generate a first sawtooth wave signal and a second sawtooth wave signal, wherein when the first sawtooth wave signal increases to the second reference voltage with the first slope, the second sawtooth wave signal decreases To the first reference voltage, when the second sawtooth wave signal increases to the second reference voltage with the second slope, the first sawtooth wave signal drops to the first reference voltage, so The difference between the first slope and the second slope is determined by a voltage difference between the flying voltage and 1/2 of the input voltage, and the flying voltage is two of the flying capacitance of the voltage conversion circuit. Terminal voltage, the input voltage is the input voltage of the voltage conversion circuit;

   A first voltage comparator, configured to receive and compare the first sawtooth wave signal and an adjustment voltage, and generate a first pulse width modulation signal according to a result of the comparison; the adjustment voltage is used to characterize that the voltage conversion circuit is in a normal working state The degree of deviation from steady state

   A second voltage comparator, configured to receive and compare the second sawtooth wave signal and the adjusted voltage, and generate a second pulse width modulation signal according to a result of the comparison; the first pulse width modulation signal and the second pulse The width modulation signal is used to control the voltage conversion circuit.
2. The control circuit according to claim 1, further comprising an error amplifier, wherein the error amplifier is configured to receive a third reference voltage and a feedback voltage to obtain the third reference voltage and the feedback voltage The difference between the third reference voltage and the feedback voltage, and outputting the amplified difference as the adjusted voltage to the first voltage comparator and the second voltage comparison And the feedback voltage is used to characterize an output voltage or an output current, the output voltage is an output voltage of the voltage conversion circuit, the output current is an output current of the voltage conversion circuit, and the third The reference voltage is used to characterize an output voltage that is in a steady state when the voltage conversion circuit works normally.
3. The control circuit according to claim 2, wherein the feedback voltage is equal to an output voltage of the voltage conversion circuit.
4. The control circuit according to any one of claims 1 to 3, wherein the sawtooth wave generating circuit comprises:

   A reference current generating circuit is configured to receive the flying voltage and the input voltage, and convert a voltage difference between the flying voltage and 1/2 the input voltage into a first reference current and a second reference current. A value of a current difference between the first reference current and the second reference current is proportional to a value of the voltage difference;

   A first oscillation circuit, configured to convert the first reference current into the first sawtooth wave signal according to the control of the second reference voltage;

   A second oscillating circuit, configured to convert the second reference current into the second sawtooth wave signal according to the control of the second reference voltage;

   The first slope of the first sawtooth wave signal is proportional to the first reference current, the second slope of the second sawtooth wave signal is proportional to the second reference current, and the first slope and The difference in the second slope is proportional to the difference in current between the first reference current and the second reference current.
5. The control circuit according to claim 4, wherein the reference current generating circuit is electrically connected to the first node with the first oscillating circuit, and is electrically connected to the second node with the second oscillating circuit, wherein The reference current generating circuit includes:

   A voltage dividing circuit for converting the input voltage into 1/2 times the input voltage;

   A conversion circuit is configured to convert a difference between the flying voltage and 1/2 times the input voltage into a first intermediate current and a second intermediate current having the same current magnitude, and the first intermediate current flows from the conversion circuit to The first node and the second intermediate current flow from the second node to the conversion circuit;

   A first current source, configured to provide a first current source current flowing from the first node to a ground;

   A second current source for providing a second current source current flowing from the second node to the ground, the first current source current and the second current source current having the same current magnitude;

   Wherein, the first reference current is generated on the path between the first node and the first oscillating circuit by the first current source and the conversion circuit acting together, and passes through the second current source Working with the conversion circuit to generate the second reference current on a path between the second node and the second oscillating circuit.
6. The control circuit according to claim 5, wherein:

   When the flying voltage is less than 1/2 times the input voltage, the conversion circuit is further configured to convert a voltage difference between the flying voltage and 1/2 times the input voltage into a positive and negative voltage having the same magnitude. The first intermediate current and the positive second intermediate current;

   When the flying voltage is greater than 1/2 times the input voltage, the conversion circuit is further configured to convert a voltage difference between the flying voltage and 1/2 times the input voltage into a negative voltage having the same magnitude. The first intermediate current and the negative second intermediate current;

   When the flying voltage is equal to 1/2 of the input voltage, the conversion circuit is further configured to convert a voltage difference between the flying voltage and 1/2 of the input voltage into the voltage having a size of 0. A first intermediate current and the second intermediate current having a magnitude of 0.
7. The control circuit according to any one of claims 4 to 6, wherein:

   The first oscillating circuit includes a first current mirror and a first output circuit. The first current mirror is configured to generate a first mirror current according to the first reference current according to a first ratio. Converting the first mirror current into the first sawtooth wave signal according to the control of the second reference voltage;

   The second oscillating circuit includes a second current mirror and a second output circuit, wherein the second current mirror is used to generate a second mirror current according to the second reference current according to a second ratio, and the second output circuit is used for Based on the control of the second reference voltage, the second mirrored current is converted into the second sawtooth wave signal.
8. The control circuit according to claim 7, wherein the first ratio is equal to the second ratio.
9. The control circuit according to any one of claims 7 to 8, characterized in that:

   The first output circuit includes a first switching circuit and a first sawtooth wave capacitor connected in parallel, wherein one end of the first sawtooth wave capacitor is electrically connected to the first current mirror to receive the first mirror current and output the first mirror current. The first sawtooth wave signal, the other end of the first sawtooth wave capacitor receives the first reference voltage, and the second reference voltage controls the opening and closing of the first switching circuit;

   The second output circuit includes a second switching circuit and a second sawtooth wave capacitor connected in parallel, wherein one end of the second sawtooth wave capacitor is electrically connected to the second current mirror to receive the second mirror current and output the second mirror current. The second sawtooth wave signal, the other end of the second sawtooth wave capacitor receives the first reference voltage, and the second reference voltage controls the opening and closing of the second switching circuit, wherein the first sawtooth The wave capacitance is equal to the capacitance value of the second sawtooth wave capacitance.
10. The control circuit according to claim 9, wherein:

    The second switching circuit is configured to be closed when the first sawtooth wave signal increases to the second reference voltage, and to be opened when the second sawtooth wave signal decreases to the first reference voltage;

    The first switch circuit is configured to close when the second sawtooth wave signal increases to the second reference voltage, and to open when the first sawtooth wave signal decreases to the first reference voltage.
11. A voltage conversion device, characterized in that the voltage conversion device includes a voltage conversion circuit and a control circuit, and the voltage conversion circuit is configured to convert an input voltage according to control of a first pulse width modulation signal and a second pulse width modulation signal. To output a voltage, the control circuit is used to control the voltage conversion circuit, wherein the control circuit includes:

    The sawtooth wave generating circuit is configured to receive a first reference voltage, a second reference voltage, a flyover voltage, and an input voltage, and control a first slope and a first slope according to a voltage difference between the flyover voltage and 1/2 times the input voltage. Two slopes and generate a first sawtooth wave signal and a second sawtooth wave signal, wherein when the first sawtooth wave signal increases to the second reference voltage with the first slope, the second sawtooth wave signal decreases To the first reference voltage, when the second sawtooth wave signal increases to the second reference voltage with the second slope, the first sawtooth wave signal drops to the first reference voltage, so The difference between the first slope and the second slope is determined by a voltage difference between the flying voltage and 1/2 of the input voltage, and the flying voltage is two of the flying capacitance of the voltage conversion circuit. Terminal voltage, the input voltage is the input voltage of the voltage conversion circuit;

    A first voltage comparator, configured to receive and compare the first sawtooth wave signal and an adjustment voltage, and generate a first pulse width modulation signal according to a result of the comparison; the adjustment voltage is used to characterize the voltage conversion circuit in a normal working state The degree of deviation from steady state

    A second voltage comparator, configured to receive and compare the second sawtooth wave signal and the adjusted voltage, and generate a second pulse width modulation signal according to a result of the comparison; the first pulse width modulation signal and the second pulse The width modulation signal is used to control the voltage conversion circuit.
12. The voltage conversion device according to claim 11, wherein the control circuit further comprises an error amplifier, the error amplifier is configured to receive a third reference voltage and a feedback voltage to obtain the third reference voltage and the feedback A difference in voltage, amplifying a difference between the third reference voltage and the feedback voltage, and outputting the amplified difference as the adjusted voltage to the first voltage comparator and the second voltage The comparator, wherein the feedback voltage is used to characterize an output voltage or an output current, the output voltage is an output voltage of the voltage conversion circuit, and the output current is an output current of the voltage conversion circuit. The three reference voltages are used to characterize an output voltage that is in a steady state when the voltage conversion circuit works normally.
13. The voltage conversion device according to claim 12, wherein the feedback voltage is equal to an output voltage of the voltage conversion circuit.
14. The voltage conversion device according to any one of claims 11 to 13, wherein the sawtooth wave generating circuit comprises:

    A reference current generating circuit is configured to receive the flying voltage and the input voltage, and convert a voltage difference between the flying voltage and 1/2 the input voltage into a first reference current and a second reference current. A value of a current difference between the first reference current and the second reference current is proportional to a value of the voltage difference;

    A first oscillation circuit, configured to convert the first reference current into the first sawtooth wave signal according to the control of the second reference voltage;

    A second oscillating circuit, configured to convert the second reference current into the second sawtooth wave signal according to the control of the second reference voltage;

    The first slope of the first sawtooth wave signal is proportional to the first reference current, the second slope of the second sawtooth wave signal is proportional to the second reference current, and the first slope and The difference in the second slope is proportional to the difference in current between the first reference current and the second reference current.
15. A battery charging system, characterized in that the battery charging system includes a voltage conversion circuit, a control circuit, and a voltage stabilization circuit, and the voltage stabilization circuit is configured to convert an AC voltage into an input voltage of the voltage conversion circuit and input the voltage to The voltage conversion circuit is configured to convert the input voltage into an output voltage and output it to a battery device according to control of a first pulse width modulation signal and a second pulse width modulation signal, and the control circuit is used for Controlling the voltage conversion circuit, wherein the control circuit includes:

    The sawtooth wave generating circuit is configured to receive a first reference voltage, a second reference voltage, a flyover voltage, and an input voltage, and control a first slope and a first slope according to a voltage difference between the flyover voltage and 1/2 times the input voltage. Two slopes and generate a first sawtooth wave signal and a second sawtooth wave signal, wherein when the first sawtooth wave signal increases to the second reference voltage with the first slope, the second sawtooth wave signal decreases To the first reference voltage, when the second sawtooth wave signal increases to the second reference voltage with the second slope, the first sawtooth wave signal drops to the first reference voltage, so The difference between the first slope and the second slope is determined by a voltage difference between the flying voltage and 1/2 of the input voltage, and the flying voltage is two of the flying capacitance of the voltage conversion circuit. Terminal voltage, the input voltage is the input voltage of the voltage conversion circuit;

    A first voltage comparator, configured to receive and compare the first sawtooth wave signal and an adjustment voltage, and generate a first pulse width modulation signal according to a comparison result; the adjustment voltage is used to characterize that the voltage conversion circuit is in a normal working state The degree of deviation from steady state

    A second voltage comparator, configured to receive and compare the second sawtooth wave signal and the adjusted voltage, and generate a second pulse width modulation signal according to a result of the comparison; the first pulse width modulation signal and the second pulse The width modulation signal is used to control the voltage conversion circuit.
16. The battery charging system according to claim 15, wherein the control circuit further comprises an error amplifier, the error amplifier is configured to receive a third reference voltage and a feedback voltage to obtain the third reference voltage and the feedback A difference in voltage, amplifying a difference between the third reference voltage and the feedback voltage, and outputting the amplified difference as the adjusted voltage to the first voltage comparator and the second voltage The comparator, wherein the feedback voltage is used to characterize an output voltage or an output current, the output voltage is an output voltage of the voltage conversion circuit, and the output current is an output current of the voltage conversion circuit. The three reference voltages are used to characterize an output voltage that is in a steady state when the voltage conversion circuit works normally.
17. The battery charging system according to claim 16, wherein the feedback voltage is equal to an output voltage of the voltage conversion circuit.
18. The battery charging system according to any one of claims 15 to 17, wherein the sawtooth wave generating circuit comprises:

    A reference current generating circuit is configured to receive the flying voltage and the input voltage, and convert a voltage difference between the flying voltage and 1/2 the input voltage into a first reference current and a second reference current. A value of a current difference between the first reference current and the second reference current is proportional to a value of the voltage difference;

    A first oscillation circuit, configured to convert the first reference current into the first sawtooth wave signal according to the control of the second reference voltage;

    A second oscillating circuit, configured to convert the second reference current into the second sawtooth wave signal according to the control of the second reference voltage;

    The first slope of the first sawtooth wave signal is proportional to the first reference current, the second slope of the second sawtooth wave signal is proportional to the second reference current, and the first slope and The difference in the second slope is proportional to the difference in current between the first reference current and the second reference current.

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