WO2020020336A1

WO2020020336A1 - Function panel and method for manufacturing same, and terminal

Info

Publication number: WO2020020336A1
Application number: PCT/CN2019/097879
Authority: WO
Inventors: 张英; 高贤永; 雷嗣军; 李云松; 陈善彬; 冉博
Original assignee: 京东方科技集团股份有限公司; 重庆京东方光电科技有限公司
Priority date: 2018-07-27
Filing date: 2019-07-26
Publication date: 2020-01-30

Abstract

Disclosed are a function panel and a method for manufacturing same, and a terminal. The function panel comprises: a base substrate; at least one differential signal line group disposed on the base substrate, each of the at least one differential signal line group comprising two signal lines; and at least one ground line group, the at least one ground line group being disposed on the base substrate, and located on the same side of the base substrate as the at least one differential signal line group, and each of the at least one ground line group comprising two ground lines. The at least one ground line group has one-to-one correspondence to the at least one differential signal line group, the orthographic projections of the two ground lines in each ground line group on the base substrate are located on both sides of the orthographic projection of the corresponding differential signal line group on the base substrate, and the two ground lines in the ground line group are connected to one reference ground.

Description

Function panel, manufacturing method and terminal thereof

This application claims the priority of the Chinese patent application filed on July 27, 2018 with the application number 201810848255.1, the invention name is "Anti-Interference Method for Signal Transmission, Signal Transmission Device and Display Device" and was filed on November 26, 2018 The priority of the Chinese patent application with the application number of 201811415511.4 and the invention name of "functional panel, its manufacturing method, and terminal" is incorporated herein by reference in its entirety.

Technical field

The present disclosure relates to the field of electronic technology applications, and in particular, to a functional panel, a method of manufacturing the same, and a terminal.

Background technique

The display device may generally include a display panel and a panel driving circuit for driving the display panel. The panel driving circuit may include a timing controller (T / CON), a gate driving circuit, and a source driving circuit. The electrode driving circuit includes a plurality of gate driving chips, and the source driving circuit includes a plurality of source driving (English: source driver) chips.

With the improvement of the resolution of the display panel, the amount of data to be transmitted also increases significantly. In a panel driving circuit, a high-speed differential signal is usually transmitted through a differential signal line group (also referred to as a high-speed differential signal line group). A differential signal line group is actually a signal line group composed of two signal lines, and its data transmission rate is high.

Summary of the Invention

According to a first aspect of the embodiments of the present disclosure, a functional panel is provided, including:

Substrate

At least one differential signal line group, the at least one differential signal line group is disposed on the base substrate, and each differential signal line group in the at least one differential signal line group includes two signal lines;

At least one ground line group, the at least one ground line group is disposed on the base substrate, and is located on the same side of the base substrate as the at least one differential signal line group, in the at least one ground line group Each ground wire group includes two ground wires;

Wherein, each ground line group in the at least one ground line group corresponds to each differential signal line group in the at least one differential signal line group, and two ground lines in each ground line group The orthographic projection on the base substrate is located on both sides of the corresponding orthographic projection of a differential signal line group on the base substrate, and two ground wires in the ground wire group are connected to the same reference ground.

In some embodiments, the two ground wires in the ground wire group include a first ground wire and a second ground wire, and at least one end of the first ground wire and at least one end of the second ground wire are connected to the same reference Ground.

In some embodiments, the first end of the first ground line and the first end of the second ground line are connected to the same reference ground; the second end of the first ground line and the second ground line The second end is connected to the same reference ground, and the first end and the second end are opposite ends in an extending direction of the first ground line or the second ground line.

In some embodiments, the at least one differential signal line group includes a plurality of differential signal line groups arranged in an array, and the at least one ground line group includes a plurality of ground line groups arranged in an array, the plurality of ground lines Two adjacent ground groups in the group reuse the same ground.

In some embodiments, the functional panel further includes: a reference ground layer and an insulation layer that are sequentially stacked in a direction away from the base substrate; wherein the at least one ground line group is located in the insulation layer away from the reference ground layer. On one side, a plurality of via holes are provided on the insulating layer, and the at least one ground line group is connected to the reference ground layer through the plurality of via holes on the insulating layer.

In some embodiments, at least one via hole is provided on each of the two ground wires in each ground wire group, and the at least one via hole is used to connect the reference ground and the insulation layer. The plurality of vias on the one-to-one correspondence.

In some embodiments, the at least one via includes a plurality of vias arranged at equal intervals.

In some embodiments, the first end of the first ground line and the first end of the second ground line are connected through a first lead, and the first lead is connected through the plurality of layers on the insulation layer. A via is connected to the reference ground layer; the first end and the second end are opposite ends in an extending direction of the first ground line or the second ground line.

In some embodiments, the second end of the first ground line and the second end of the second ground line are connected through a second lead, and the second lead is connected through the plurality of layers on the insulation layer. A via is connected to the reference ground layer; the first end and the second end are opposite ends in an extending direction of the first ground line or the second ground line.

In some embodiments, the function panel further includes:

At least one binding terminal;

At least one driver chip;

The at least one binding terminal is connected to the at least one driving chip through the at least one differential signal line group, and at least one ground line group is further provided between the at least one binding terminal and the at least one driving chip, The at least one ground line group corresponds to the at least one differential signal line group in a one-to-one manner. .

In some embodiments, each of the driving chips includes:

One ground terminal and two signal terminals, and

Wherein, the ground terminal is located on one side of the two signal terminals, and the two signal terminals are respectively connected to two signal lines in a corresponding differential signal line group, and

The first ground wire is directly connected to the ground terminal.

In some embodiments, the second ground wire is connected to the ground terminal through a third lead that is insulated from the two signal lines, and the orthographic projection of the third lead on the base substrate is different from the two The orthographic projection of the signal lines on the base substrate intersects.

In some embodiments, each driving chip includes

A first ground terminal, a second ground terminal, and two signal terminals, and

The first ground terminal and the second ground terminal are located on both sides of the two signal terminals, respectively, and the two signal terminals are respectively connected to two signal lines in a corresponding differential signal line group, and

The first ground wire is connected to the first ground terminal, and the second ground wire is connected to the second ground terminal.

In some embodiments, the third lead is located on a side of the differential signal line group remote from the base substrate, and is overlapped with the two signal lines, and the third lead is in contact with the two An insulating septum is provided at the overlap of the signal line.

In some embodiments, the third lead and the ground line group are located on different layers, an isolation layer for insulation is provided between the third lead and the ground line group, and two ends of the third lead are The vias on the isolation layer are respectively connected to the first ground line and the second ground line.

In some embodiments, the at least one differential signal line group and the at least one ground line group are located on the same layer on the base substrate.

In some embodiments, the base substrate is made of glass or organic material; and wherein the functional panel is a display panel or a touch panel or an in-cell touch display panel.

In some embodiments, in each of the at least one differential signal line group, the two signal lines include a first line segment portion and a second line segment portion that are parallel to each other, and the first line segment A ratio between a distance between the portion and the second line segment portion and a line width at a corresponding position of the first line segment portion; and a distance between the first line segment portion and the second line segment portion; The ratios of the line widths at the corresponding positions of the two line segment portions are equal, and the ratios remain unchanged in the extending direction of the first line segment portion and the second line segment portion.

According to a second aspect of the embodiments of the present disclosure, a terminal is provided, and the terminal includes the function panel described above.

According to a third aspect of the embodiments of the present disclosure, a method for manufacturing a functional panel is provided, including:

Providing a substrate;

Forming at least one differential signal line group and at least one ground line group on the same side of the base substrate;

Wherein, each ground line group in the at least one ground line group corresponds to each differential signal line group in the at least one differential signal line group, and each differential in the at least one differential signal line group The signal line group includes two signal lines. Each ground line group in the at least one ground line group includes two ground lines. The two ground lines in each ground line group are on the base substrate. The orthographic projection is located on both sides of the orthographic projection of the corresponding one differential signal line group on the substrate, and two ground wires in the ground wire group are connected to the same reference ground.

The functional panel, the method for manufacturing the same, and the terminal provided in the embodiments of the present disclosure, because at least one ground wire group and at least one differential signal wire group are provided on the substrate, and each ground wire group includes two ground wires, The orthographic projections of the two ground wires in each ground wire group on the base substrate are respectively located on both sides of the orthographic projection of the corresponding differential signal wire group on the base substrate. The differential signal wire groups are performed by the ground wires. Signal interference shielding can effectively reduce external signal interference, thereby improving the signal transmission reliability of the differential signal line group.

It should be understood that the above general description and the following detailed description are merely exemplary, and should not limit the present disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to explain the embodiments of the present disclosure more clearly, the accompanying drawings used in the description of the embodiments are briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present disclosure. For ordinary technicians, other drawings can be obtained based on these drawings without paying creative work.

Fig. 1 is a schematic structural diagram of a panel driving circuit according to an exemplary embodiment.

Fig. 2 is a schematic structural diagram of a mutual-capacitive touch function layer according to an exemplary embodiment.

Fig. 3 is a schematic structural diagram of a self-capacitive touch function layer according to an exemplary embodiment.

Fig. 4 is a schematic structural diagram of a functional panel according to an exemplary embodiment.

FIG. 5 is a schematic diagram of a position relationship between a ground wire group and a corresponding differential signal wire group in a functional panel according to an embodiment of the present disclosure.

Fig. 6 is a schematic diagram illustrating a position relationship between a ground line group and a corresponding differential signal line group in another functional panel according to an exemplary embodiment.

Fig. 7 is a schematic diagram illustrating a position relationship between a ground wire group and a corresponding differential signal wire group in still another functional panel according to an exemplary embodiment.

Fig. 8 is a schematic structural diagram of another functional panel according to an exemplary embodiment.

Fig. 9 is a schematic structural diagram of still another functional panel according to an exemplary embodiment.

Fig. 10 is a schematic cross-sectional view taken along A-A in Fig. 9.

FIG. 11 is a schematic cross-sectional view taken along A-A of FIG. 9 according to another embodiment.

Fig. 12 is a schematic structural diagram of a functional panel according to another exemplary embodiment.

Fig. 13 is a schematic structural diagram of another functional panel according to another exemplary embodiment.

Fig. 14 is a schematic structural diagram of still another functional panel according to another exemplary embodiment.

FIG. 15 is a layout model diagram of a differential signal line group provided by some embodiments of the present disclosure.

FIG. 16 is a relationship curve between a characteristic impedance and S / D provided by some embodiments of the present disclosure.

FIG. 17 is a schematic structural diagram of a differential signal line group provided by some embodiments of the present disclosure.

Fig. 18 is a flow chart showing a method for manufacturing a functional panel according to an exemplary embodiment.

Fig. 19 is a flow chart showing another method for manufacturing a functional panel according to an exemplary embodiment.

The drawings herein are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure, and together with the description serve to explain the principles of the present disclosure.

detailed description

In order to make the objectives, technical solutions, and advantages of the present disclosure clearer, the present disclosure will be described in further detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, but not all of the embodiments. . Based on the embodiments in the present disclosure, all other embodiments obtained by a person having ordinary skill in the art without making creative efforts fall within the protection scope of the present disclosure.

As the demand for signal transmission continues to increase, the application of differential signal line groups is becoming more and more widespread. Current differential signal line groups are mainly used in display devices for transmitting signals between two devices in the display device. At present, a part of the differential signal line group between the timing controller and the source driver chip is located in a bounding area (also called a wiring area) of a substrate substrate (usually made of glass) of a display panel. The limitation of the manufacturing process of the substrate causes the signals transmitted on this part of the differential signal line group to be easily interfered by external signals, and the signal transmission reliability is poor.

A common display device includes a function panel and a control circuit of the function panel. A differential signal line group is used to transmit a corresponding control signal or a feedback signal (also referred to as a response signal, that is, a response signal to the control signal).

In a first optional implementation manner, the functional panel is a display panel, and the corresponding control circuit is a panel driving circuit that drives the display panel. The display panel may be an OLED (Organic Light-Emitting Diode) display. Panel or LCD (Liquid Crystal Display). The panel driving circuit may include a controller, a gate driving circuit, and a source driving circuit. The gate driving circuit includes a plurality of gate driving chips, and the source driving circuit includes a plurality of source driving chips. Please refer to FIG. 1. The controller 01 and each driving chip 02 are connected through a Flexible Circuit Board (FPC) 03. A differential signal line group H is provided between the controller 01 and each driving chip 02. The differential signal Line group H usually includes 3 segments: the first segment between controller 01 and FPC03, the second segment on FPC03, and the third segment between FPC03 and driver chip 02, where the first segment is located on the PCB On a printed circuit board (PCB), the third segment is located on the binding area of the substrate of the display panel 04, and FPC03 is connected to the driving chip 02 through a bonding terminal (pad), so the third segment That is, a section between a binding terminal and a source driving chip on a binding region of the substrate.

It should be noted that the controller may be any of a timing controller, a system chip (SOC), and a microcontroller unit (MCU) integrated in the timing controller. The driving chip may be a source driving chip.

In a second optional implementation manner, the function panel is an in-cell touch display panel, and the in-cell touch panel is an integrated touch function layer (referred to as a touch layer). The display panel is a structure in which the touch function layer is embedded in the pixels of the display panel. The display panel may be an OLED display panel or an LCD display panel.

On the one hand, for the connection relationship between the display panel and the controller in the in-cell touch display panel, refer to the first achievable manner described above. A section of the differential signal line set between the controller and each driver chip is located in The display panel is on a base substrate. For example, a segment of the differential signal line set between the timing controller and each source driving chip is located on the substrate of the display panel.

On the other hand, the touch function layer of the embedded touch display panel is divided into a mutual-capacitive touch function layer and a self-capacitive touch function layer according to different touch principles, as shown in FIG. The touch function layer includes a plurality of touch units 001 arranged in an array. The touch function layer includes a plurality of touch driving lines Tx arranged horizontally (that is, the row direction of the panel) and a plurality of touch arranged vertically (that is, the column direction of the panel) A sensing line Rx, a touch driving line Tx corresponds to a row of touch units, and a touch sensing line Rx corresponds to a row of touch units. It should be noted that FIG. 2 uses a total of 7 Rx and 6 Tx as examples, and the number of Rx and Tx is not limited in the embodiment of the present disclosure.

When the mutual capacitive touch function layer implements the touch function, a touch scan signal is sequentially input to the Tx in the mutual capacitive touch function layer, and the sensing signals on each Rx are collected and determined according to the sensing signals on each Rx. Touch the location of the point. The above touch function can be implemented by a touch driving integrated circuit (IC), that is, the touch driving IC can be used to input a touch scanning signal and collect a sensing signal, and determine the position of a touch point. Optionally, a differential signal line group may be respectively provided between the touch driving IC and Tx and Rx for transmitting touch data, and a part of the differential signal line group passes through the substrate of the display panel.

For the above-mentioned mutual-capacitive touch function layer, in an optional manner, another differential signal line group may be provided between the controller and the designated driving chip, and each designated driving chip may have a backhaul function, a backhaul function Refers to the function of transmitting the data obtained by the designated driver chip to the controller. The designated driver chip can be connected to at least one touch sensing line Rx (for example, each designated driver chip with a return function can be connected to a set of touch sensing lines). , Each set of touch-sensing lines includes at least two adjacent touch-sensing lines), the designated driver chip shares some of the functions of the touch-driving IC; in another alternative, each designated driver with a backhaul function The chip can be connected to the touch drive IC. At this time, the designated drive chip realizes the fast return of the data of the touch drive IC to the controller. The designated driving chip may be a source driving chip or a gate driving chip. A part of the other differential signal line group passes through the substrate of the display panel.

As shown in FIG. 3, the self-capacitive touch functional layer is generally made of a single layer of indium tin oxide (English: Indium Tin Oxide; ITO for short), which includes a plurality of arrayed touch units 002, each touch unit 002 is connected to one touch line Mx, that is, one touch line Mx corresponds to one touch unit.

When the self-capacitive touch function layer implements a touch function, a touch scan signal can be input to each Mx in the self-capacitive touch function layer at the same time, and a sensing signal on each Mx is collected. Whether the sensing signal is the same as the normal sensing signal to determine the position of the touch point. The touch function may be implemented by a touch driving IC, that is, the touch driving IC may be used to input a touch scanning signal and collect a sensing signal, and determine a position of a touch point. Optionally, a differential signal line group may be provided between the touch driving IC and each Mx for transmission of touch data, and a part of the differential signal line group passes through the substrate of the display panel.

For the above-mentioned self-capacitive touch function layer, in an optional manner, another differential signal line group may be provided between the controller and the designated driving chip, and each designated driving chip may have a return function, and each having The designated drive chip with a return function can be connected to at least one touch line Mx (for example, each designated drive chip with a return function can be connected to a group of touch lines, each set of touch lines includes at least two adjacent touch lines) At this time, the driver chip shares some of the functions of the touch drive IC. In another alternative, each designated drive chip with a return function can be connected to the touch drive IC. At this time, the designated drive The chip realizes fast data transfer between the controller and the touch drive IC.

It should be noted that the touch function layer in the above-mentioned in-cell touch display panel and the display function layer in the display panel can be reused. For example, when the display panel is an OLED display panel, the display function layer is based on OLED. Realized, when the touch functional layer is a mutual-capacitive touch functional layer, at least one of the layer where the touch sensing line is located and the layer where the touch driving line is located is multiplexed with the electrode layer of the OLED, and the electrode layer may be a cathode One of the layer and the anode layer; when the touch function layer is a self-capacitive touch function layer, at least one of the layer where the touch line is located and the layer where the touch drive line is located is multiplexed with the electrode layer of the OLED, and the electrode layer It may be one of a cathode layer and an anode layer. When the display panel is an LCD display panel, that is, the display function layer is based on the liquid crystal layer, and the pixel electrode layer and the common electrode layer for controlling the liquid crystal layer are implemented, the touch function layer is a mutual capacitance touch In the functional layer, at least one of the layer where the touch sensing line is located and the layer where the touch driving line is located is multiplexed with the electrode layer in the display functional layer. The electrode layer may be one of a pixel electrode layer and a common electrode layer; When the control function layer is a self-capacitive touch function layer, at least one of the layer where the touch line is located and the layer where the touch driving line is located is multiplexed with the electrode layer of the LCD. The electrode layer may be a pixel electrode layer and a common electrode layer. one of.

It is worth noting that after the touch function layer in the above-mentioned in-cell touch display panel is multiplexed with the display function layer in the display panel, the touch function layer and the display function layer are driven in a time-sharing manner. These functional layers do not interfere with each other.

In a third optional implementation method, the function panel is a touch panel. The touch panel is divided into a mutual-capacitive touch panel and a self-capacitive touch panel according to different touch principles. The structure of the panel can refer to the structure of the mutual-capacitive touch function layer in the second optional implementation manner described above. A differential signal line group can be respectively set between the touch drive IC and TX and RX for touch data. Part of the differential signal line group will pass through the substrate of the touch panel. For the structure of the self-capacitive touch panel, refer to the structure of the self-capacitive touch function layer in the second optional implementation manner described above. A differential signal line group may be provided between the touch drive IC and each Mx for transmission of touch data, and a part of the differential signal line group passes through the substrate of the touch panel.

The above three optional implementation manners are only a description of a scenario in which the differential signal line group is located on the base substrate of the function panel. The differential signal line group can also be set on the base substrate of the function panel in other ways, but because The limitation of the manufacturing process on the substrate causes the signal transmission in the differential signal line group on the substrate to be easily interfered by external signals, and the signal transmission reliability is poor.

An embodiment of the present disclosure provides a functional panel 400. The functional panel may be a functional panel provided with a differential signal line group on any of the above functional panels or other substrates. FIG. 4 is a schematic plan view of the functional panel 400, as shown in FIG. As shown in FIG. 4, the function panel 400 includes:

Base substrate 401; optionally, the base substrate 401 is a transparent base substrate, and its material is glass or organic.

At least one differential signal line group 402 is disposed on the substrate substrate 401, and each differential signal line group 402 includes two signal lines 4021.

At least one ground line group 403, at least one ground line group 403 is disposed on the base substrate 401, and is located on the same side as the at least one differential signal line group 402, and at least one ground line group 403 and at least one differential signal line Groups 402 correspond one-to-one. Each ground line group 403 includes two ground lines 4031. The orthographic projections of the two ground lines 4031 in each ground line group 403 on the substrate are respectively located in a corresponding differential signal line group 402. On both sides of the orthographic projection on the substrate, the two ground wires 4031 in the ground wire group 403 are connected to the same reference ground G, and the connection to the same reference ground is also called a common ground. FIG. 4 uses two differential signal line groups and two ground line groups as an example for description, but the number of the differential signal line groups and the ground line groups is not limited.

"Reference ground" is also called "ground", which is a common reference potential point in the function panel. In the functional panel of the embodiment of the present disclosure, a metal layer is usually provided on the base substrate, and the metal layer is used as a reference ground. Two ground wires in each ground wire group are connected to the metal layer. Of course, the reference ground It can also be set in other ways, as long as the two ground wires of a ground wire group are connected to the same reference ground. The potential of the ground reference usually approaches zero. In practical applications, the potential of the ground reference can be regarded as zero.

In the functional panel provided in the embodiments of the present disclosure, since at least one ground wire group and at least one differential signal wire group are provided on the substrate, each ground wire group includes two ground wires. The orthographic projections of the two ground wires on the base substrate are respectively located on both sides of the orthographic projection of a corresponding differential signal wire group on the base substrate, and the ground signal is used to shield the signal interference of the differential signal wire group. When there are multiple differential signal line groups, crosstalk between the differential signal line groups can also be effectively shielded, which can effectively reduce external signal interference, thereby improving the signal transmission reliability of the differential signal line groups.

If two ground wires in a ground wire group are respectively connected to different reference grounds, each ground wire can be regarded as an isolated ground wire, and isolated ground wires are prone to generate additional noise and interference. In the embodiment of the present disclosure, due to the ground The two ground wires in the line group are connected to the same reference ground, which can avoid the appearance of isolated ground wires and improve the anti-interference ability of the ground wires in the ground line group.

As shown in FIG. 5, FIG. 5 is a schematic diagram of a position relationship between a ground wire group and a corresponding differential signal wire group in a functional panel according to an embodiment of the present disclosure. If two ground wires 4031 in a ground wire group 403 The middle part is connected to the reference ground G. The two ground wires 4031 in the ground line group 403 and the lead 4032 for connecting the reference ground G between the two and the reference ground G cannot orbit the corresponding projection on the substrate. An orthographic projection of a differential signal line group 402 on the substrate, so that the ground line group has a poor ability to shield the signals of the differential signal line group.

As shown in FIG. 6 and FIG. 7, FIG. 6 and FIG. 7 are schematic diagrams of a position relationship between a ground wire group and a corresponding differential signal wire group in two functional panels provided by an embodiment of the present disclosure. The root line includes a first ground line and a second ground line. At least one end of the first ground line is connected to the same reference ground G as at least one end of the second ground line. FIG. 6 shows a case where one end of two ground wires in the ground wire group 403 is connected to the same reference ground G. For example, the first ends a of the two ground wires in the ground wire group in FIG. 6 are connected through the first lead 4032a, and the first lead 4032a is connected to the reference ground G. FIG. 7 shows a case where two ends of two ground wires in the ground wire group 403 are connected to the same reference ground G, respectively. In FIG. 7, the first ends a of the two ground wires in the ground wire group 403 are connected to the same reference ground G. For example, the first ends a of the two ground wires in the ground wire group are connected through the first lead 4032a. And the first lead 4032a is connected to the reference ground G; the second ends b of the two ground wires in the ground wire group are connected to the same reference ground G, for example, the second ends b of the two ground wires in the ground wire group are both It is connected through the second lead 4032b, and the second lead 4032b is connected to the reference ground G. The first end and the second end of any ground wire are opposite ends in the extension direction of any ground wire.

Please refer to FIG. 6 and FIG. 7, because at least one end of two ground wires in the ground wire group 403 is connected to the same reference ground G, the first lead 4032a and / or the second lead 4032b is equivalent to an extended ground. The orthographic projection of the two ground wires 4031 in the line group 403 and the first lead 4032a and / or the second lead 4032b for connecting the reference ground G between the two and the reference ground G may be semi-enclosed or The orthographic projection of the corresponding differential signal line group 402 on the substrate is enclosed, so that the ground line group has a stronger ability to shield the signals of the differential signal line group.

As shown in FIG. 4 described above, in the display panel, at least one differential signal line group 402 includes a plurality of differential signal line groups arranged in an array, and at least one ground line group 403 includes a plurality of differential signal line groups arranged in an array. Shown is a case where each ground wire group includes two ground wires in each of the two adjacent ground wire groups. In another optional implementation manner, please refer to FIG. 8, each adjacent two ground wire groups 403 reuse the same ground wire. In this way, on the basis of reducing the number of ground wires and reducing the manufacturing difficulty, it can effectively shield the interference signals. Especially shield the crosstalk between the differential signal line groups. In the case that two adjacent ground wire groups in multiple ground wire groups reuse the same ground wire, referring to FIG. 8, each ground wire group 403 may include a first ground wire and a second ground wire. In each ground wire group, the second ground wire in the previous ground wire group can simultaneously serve as the first ground wire in the subsequent ground wire group. In this way, each ground wire group 403 includes two ground wires, and the orthographic projections of the two ground wires on the base substrate are located on both sides of the orthographic projection of the corresponding one differential signal wire group on the base substrate, The beneficial effects of the present disclosure can be achieved while reducing the number of ground wires.

Further, as shown in FIG. 9, each ground wire 4031 is provided with at least one via hole 4033. By way of example, a plurality of vias 4033 arranged at equal intervals are provided on each ground line 4031. By setting vias on the ground wire, the impedance of the ground wire can be reduced, so the signal attenuation on the ground wire is small, and the ground wire group can effectively shield the interference signal when it surrounds the corresponding differential signal wire group. Optionally, the length of the ground line in each ground line group is greater than or equal to the length of the signal line in the corresponding differential signal line group. In this way, it is possible to effectively surround the corresponding differential signal line group by the ground line group.

In the embodiment of the present disclosure, at least one differential signal line group 402 and at least one ground line group 403 are located on the same layer on the base substrate 401. In this way, the ground line group and the differential signal line group are located on the same horizontal plane, and when the physical signal position of the differential signal line group corresponding to the ground line group pair is physically surrounded, the interference signal can be effectively shielded. For example, if the differential signal line group provided on the base substrate is an entire segment of the differential signal line group, each ground line group in the corresponding ground line group is an entire ground line; if it is provided on the base substrate The differential signal line groups on the above are multi-segment differential signal line groups located on different layers, then each ground line group in the corresponding ground line group is also a multi-segment ground line located on a different layer, and the multi-segment differential signal line group and multi-segment ground line One-to-one correspondence, the differential signal line group and ground of the corresponding segment are located on the same layer.

As mentioned above, there are multiple implementations of the reference ground in the function panel. Optionally, the embodiment of the present disclosure implements the reference ground function by setting a reference ground layer on the substrate. The manufacturing material of the reference ground layer may be metal or Conductive materials such as carbon. Then, please refer to FIG. 10-11, which is a schematic cross-sectional view taken along the line AA in FIG. 9. The functional panel 400 further includes: a reference ground layer 404 and an insulation layer 405 which are sequentially stacked in a direction away from the substrate 401, at least one ground. The line group 403 is located on a side of the insulation layer 405 away from the reference ground layer 404. A plurality of via holes 4051 are provided on the insulation layer 405. At least one ground line group 403 is connected to the reference ground layer 404 through a plurality of via holes 4051. In the embodiment of the present disclosure, each ground line group 403 may be connected to the reference ground layer 404 through at least one via 4051. Since each set of ground lines and the corresponding differential signal line group are usually arranged parallel to the substrate, each set of ground lines The line can shield the signal of the corresponding differential signal line group in a direction parallel to the substrate. Each via 4051 is equivalent to a vertical ground line, which can be corresponding to the corresponding direction in the direction perpendicular to the substrate. The differential signal line group (that is, the differential signal line group corresponding to the ground line connected to the via 4051) shields signals from interference. When the local line group and the reference ground layer are connected through multiple vias, the set of ground lines, the reference ground layer, and the multiple vias can form a three-dimensional shielding net cover covering the corresponding differential signal line group, thereby realizing the differential signal line group. Stereo interference shielding, to achieve better interference shielding effect.

Further, please refer to FIG. 6 and FIG. 7, at least one end of two ground wires in the ground wire group is connected by a lead wire, and the lead wire is connected with the reference ground layer through a via hole. That is, the first ends a of the two ground wires in the ground wire group are connected through the first lead 4032a, and the first wire 4032a is connected to the reference ground layer through the via; and / or, the two wires in the ground wire group are connected. The second ends b of the root wires are connected through the second lead 4032b, and the second lead 4032b is connected to the reference ground through a via. Then the via connecting the ground wire and the reference ground layer (ie, the first lead 4032a and / or the second lead 4032b) and the reference ground layer is equivalent to a longitudinal ground line, which can be aligned in a direction perpendicular to the substrate. The corresponding differential signal line group shields the signal interference. If the lead wire and the reference ground layer are connected through multiple vias, and the ground wire group and the reference ground layer are connected through multiple via holes, the lead wire, ground wire group, reference The ground layer and multiple vias can form a finer three-dimensional shielding net cover covering the corresponding differential signal line group, realizing the three-dimensional interference shielding of the differential signal line group, and achieving a better interference shielding effect.

Each of the aforementioned ground wires 4031 is provided with a via hole 4033. The vias 4033 on the ground line 4031 in FIG. 10 may be formed in multiple ways. In an optional implementation manner, after forming a plurality of vias 4051 on the insulating layer 405, multiple vias 4051 on the insulating layer 405 may be formed. The via hole 4051 is filled with a conductive material, and the conductive material may be the same as or different from the manufacturing material of the ground wire. Then, a conductive material layer is formed on the insulating layer 405, and a patterning process is performed on the conductive material layer to form a via hole 4033. The ground line group 403, that is, the ground line group 403 and the via hole 4033 are manufactured by a patterning process, which may include photoresist coating, exposure, development, etching, and photoresist stripping. In another optional implementation manner, after a plurality of vias 4051 are formed on the insulating layer 405, a conductive ground layer may be formed on the insulating layer 405. Since the ground layer is directly covered on the insulating layer 405 A plurality of via holes 4033 corresponding to the plurality of via holes 4051 are formed on the ground layer covering the plurality of via holes 4051, and then a patterning process is performed on the ground layer to form a ground line group 403. The patterning process may Including photoresist coating, exposure, development, etching and photoresist stripping. In some embodiments, as shown in FIG. 11, a via hole 4051 is formed on the insulating layer 405, and the via hole 4051 is filled with a conductive material to realize the connection between the ground line group 403 and the reference ground layer 404.

It should be noted that if at least one end of two ground wires in the ground wire group is connected by a lead wire, the ground wire group and the lead wire can be formed through a patterning process. If the lead wire is connected to the ground wire layer through a via, then The manufacturing process of the vias on the lead can refer to the manufacturing process of the vias of each ground wire, and both can be manufactured simultaneously.

As before, the structure of the above-mentioned functional panel provided by the embodiment of the present disclosure can be applied to various types of functional panels, as long as the differential signal line group is located on the substrate, and the differential signal line group is usually located in a binding area of the functional panel. Of course, it can also be located in other areas of the function panel. To facilitate the reader's understanding, the embodiment of the present disclosure uses an optional functional panel as an example, and the differential signal line group is located in a binding area of the functional panel as an example. The functional panel may be a display panel. Please refer to FIG. 12, FIG. 13, and FIG. 14. The function panel 400 further includes:

At least one binding terminal 406;

At least one driving chip 407, which may be a source driving chip;

At least one bonding terminal 406 and at least one driving chip 407 are connected one-to-one correspondingly through a differential signal line group 402. A corresponding ground wire group is provided between the bonding terminal 406 connected to each differential signal line group 402 and the driving chip 407. 403. Please refer to FIGS. 6 and 7. At least one end of two ground wires in the ground wire group 403 is connected to the same reference ground G. In the function panel 400 shown in FIGS. 12 to 14, the two ground wires in the ground wire group There may be multiple implementations of connecting at least one end of the same reference ground G. In an alternative manner, please refer to FIG. 6 and FIG. 7. At least one end of two ground wires in the ground wire group is connected by a lead, and the The lead is connected to the reference ground through a via. In another alternative, at least one end of two grounds in the ground group is connected to the same reference ground through a driver chip. Figures 13 and 14 show the two grounds, respectively. Realization of the connection between the ground of the group and the driver chip.

In a first optional implementation manner, as shown in FIG. 13, each driving chip 407 has a ground terminal c and two signal terminals d, and the ground terminal c is grounded, that is, a reference ground connected to the function panel, for example, connected In the above reference ground layer, the ground terminal c is located on one side of the two signal terminals d, and the two signal terminals d are respectively connected to the two signal lines 4021 in the corresponding differential signal line group, and the ground lines corresponding to the differential signal line group In the group, one ground wire 4031a on the same side of the differential signal line group as the ground terminal is directly connected to the ground terminal, and another ground wire 4031b on the different side of the differential signal line group as the ground terminal is connected to both signal lines. The insulated third lead x is connected to the ground terminal c, and the orthographic projection of the third lead x on the base substrate 401 crosses the orthographic projection of the two signal lines 4021 on the base substrate 401.

The third lead x is located on a side of the two signal lines 4021 away from the base substrate 401, and is overlapped on the two signal lines 4021. The insulation between the third lead x and the two signal lines 4021 is provided. This can ensure that the third lead x does not affect the signal transmission on the two signal lines 4021. Or, the third lead x and the ground line group 403 are located on different layers, and the third lead x and the ground line group 403 are useful. For the insulating isolation layer, one end of the third lead x is connected to the target end of a ground wire through a via on the isolation layer, and the other end of the third lead x is connected to the other ground wire through a via on the isolation layer. The target terminal is connected, and the target terminal is the end of the ground wire close to the ground terminal. FIG. 13 illustrates a case where the third lead x is overlapped on the two signal lines 4021.

In a second optional implementation manner, as shown in FIG. 14, each driving chip 407 has two ground terminals c (a first ground terminal and a second ground terminal), and the two ground terminals c are connected to the function panel. The same reference ground, for example, is connected to the above reference ground layer. Two ground terminals c are located on both sides of the two signal terminals d. The two signal terminals d are used to connect to the two signal lines 4021 in the corresponding differential signal line group. In the ground line group corresponding to the differential signal line group, the ground lines (the first ground line and the second ground line) located on both sides of the differential signal line group are respectively connected to the two ground terminals c.

Of course, in addition to the above two optional implementation methods, the ground wire of the ground wire group can also be connected to the driver chip in other ways. For example, in the first optional implementation method described above, the source driver chip has a ground terminal. The lead wire is wound from the other side of the driving chip to the ground terminal and is connected to the ground terminal. Its orthographic projection on the base substrate does not cross the orthographic projection of the two signal lines on the base substrate.

It should be noted that FIG. 13 and FIG. 14 use only one differential signal line group and one ground line group as examples to explain the position relationship. In actual implementation, the positions of each differential signal line group and the corresponding one ground line group For the relationship, reference may be made to FIG. 13 or FIG. 14. Of course, the foregoing function panel may also have other implementations, for example, multiple driving chips may share a ground terminal, which is not described in the embodiment of the present disclosure.

In the above FIG. 12 to FIG. 14, the end of the ground wire group far from the driving chip may not be connected to the reference ground, or may be connected to the reference ground. If it is connected to the reference ground, in an optional implementation manner, the display panel A binding terminal corresponding to each ground wire group is set on the binding terminal, and the binding terminal is connected to the reference ground. For example, the reference ground layer is connected through a via hole, and the via hole can be located on the binding terminal (that is, the binding terminal is provided at the binding terminal). Hole), each ground wire group is connected to the corresponding binding terminal. When the ground wire is connected to the binding terminal, it can be connected directly or through a lead wire. The lead wire can be crossed and insulated with the differential signal wire group. Can not cross the differential signal line group and bypass the differential signal line group; in another optional implementation manner, a binding terminal corresponding to each ground line can be set on the display panel, and the same ground The binding terminal corresponding to the ground wire in the line group is connected to the same reference ground, and the corresponding binding terminal and ground wire are located on the same side of the differential signal line group, and the two are directly connected; in yet another optional implementation manner, ,can In order to set a grounded binding terminal on the display panel (for example, the binding terminal is connected to the reference ground layer through a via), all ground wires in the ground wire group are connected to the binding terminal, and each ground wire is connected to the binding terminal. It can be directly connected or connected by a lead wire, and the lead wire can cross the differential signal line group and be insulated, or it can not cross the differential signal line group and bypass the differential signal line group. The embodiment of the present disclosure does not limit this.

In some embodiments, as shown in FIG. 15, the distance between the ground line 4031 on both sides and the differential signal line group 402 is W, the width of the differential signal line group 4021 in the differential signal line group 402 is S, and two differential The distance between the signal line groups 4021 is D.

Based on this, by adjusting the values of W, D, and S, as shown in FIG. 16, by simulating different products, it is found that the main factor affecting the characteristic impedance Z _diff is the value of S / D.

Therefore, when the differential signal line group 402 is actually designed, the S / D can be guaranteed to be a fixed value according to different frame requirements. That is, in each pair of differential signal line groups 402, two signal lines 4021 include a first line segment portion and a second line segment portion that are parallel to each other, and a distance between the first line segment portion and the second line segment portion and the first line segment. The ratio of the line width of the corresponding position and the distance between the first line segment and the second line segment are equal to the ratio of the line width of the corresponding position of the second line segment, and the ratio is between the first line segment and the second line segment. The extension direction of the part remains unchanged. That is, referring to FIG. 17, the characteristic impedance of the differential signal line group 402 can be ensured by setting D1 / S1 = D2 / S2 = D3 / S3.

For ease of explanation, the above-mentioned FIGS. 4 to 17 are partial structural schematic diagrams of the function panel. In fact, the function panel also includes other areas and other structures. For example, when the function panel is a display panel, it also includes a display area. Examples do not limit this. Further, the two signal lines of each of the above differential signal line groups may be arranged in parallel (that is, the projections on the substrate are parallel), and the two ground wires of the corresponding ground group may also be arranged in parallel (that is, on the substrate substrate). The projections are parallel), but in actual implementation, due to the need to avoid other structures, the signal lines in the differential signal line group and the ground lines in the ground line group may turn, which is not limited in the embodiments of the present disclosure.

In summary, since the functional panel provided in the embodiment of the present disclosure has at least one ground line group and at least one differential signal line group provided on the base substrate, each ground line group includes two ground lines, each The orthographic projections of the two ground wires on the ground substrate on the base substrate are respectively located on both sides of the orthographic projection of the corresponding differential signal wire group on the substrate, and the differential signal wire groups are signaled through the ground wires. The interference shielding can effectively reduce external signal interference and ensure the integrity of the signals transmitted on the differential signal line group, thereby improving the signal transmission reliability of the differential signal line group.

An embodiment of the present disclosure provides a terminal including the function panel of any of the foregoing embodiments of the present disclosure. The terminal can be a mobile phone, television, electronic paper, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, display, notebook computer, digital photo frame or navigator.

An embodiment of the present disclosure provides a method for manufacturing a functional panel, as shown in FIG. 18, including:

Step 501: Provide a base substrate.

Step 502: Form at least one differential signal line group and at least one ground line group on the same side of the base substrate.

Wherein, at least one ground line group corresponds to at least one differential signal line group, each differential signal line group includes two signal lines, each ground line group includes two ground lines, and two of each ground line group The orthographic projections of the ground wire on the base substrate are respectively located at two sides of the orthographic projection of the corresponding differential signal line group on the base substrate, and the two ground wires in the ground wire group are connected to the same reference ground.

Since the method and terminal for manufacturing a functional panel provided in the embodiments of the present disclosure, at least one ground wire group and at least one differential signal wire group are provided on the substrate, and each ground wire group includes two ground wires. The orthographic projections of the two ground wires on the ground substrate on the base substrate are respectively located on both sides of the orthographic projection of the corresponding differential signal wire group on the substrate, and the differential signal wire groups are signaled through the ground wires. The interference shielding can effectively reduce the external signal interference, thereby improving the signal transmission reliability of the differential signal line group.

There may be multiple implementation manners of the above step 502. As described above, at least one differential signal line group and at least one ground line group are located on the same layer on the substrate.

If the differential signal line group and the ground line group located on the base substrate are not segmented, that is, the differential signal line group provided on the base substrate is an entire differential signal line group, then the corresponding ground line group is Each ground wire group is a whole ground wire. In one case, the manufacturing materials of the two are the same. Then, a conductive material layer can be formed on the substrate, and a patterning process is performed on the conductive material layer to form at least one. A differential signal line group and at least one ground line group. In another case, if the manufacturing materials of the two are different, a first conductive material layer can be formed on the base substrate, a patterning process is performed on the first conductive material layer to form at least one differential signal line group, and then Forming a second conductive material layer on the base substrate, and performing a patterning process on the second conductive material layer to form at least one ground line group; or forming a second conductive material layer on the base substrate, and performing the second conductive material layer One patterning process forms at least one ground line group, a first conductive material layer is formed on the base substrate, and a patterning process is performed on the first conductive material layer to form at least one differential signal line group.

If the differential signal line group and the ground line group located on the base substrate are both segmented, for example, the differential signal line group provided on the base substrate is a multi-segment differential signal line group located on different layers, and the corresponding ground line group Each ground wire group is also a multi-segment ground wire on a different layer, and the multi-segment differential signal wire group corresponds to the multi-segment ground wire one by one, and the differential signal line group and the ground wire of the corresponding section are on the same layer. Then, for a method of manufacturing the differential signal line group and the ground wire corresponding to each layer, refer to the foregoing method of manufacturing the differential signal line group and the ground wire of the same layer.

Since there are various structures of the function panel, please refer to FIG. 19. FIG. 19 provides a method for manufacturing a function panel for manufacturing the function panel shown in FIG. 10. The method includes:

Step 601: Provide a base substrate.

Optionally, the substrate is made of glass or organic material.

Step 602: A reference ground layer and an insulating layer are sequentially formed on the base substrate.

In an optional implementation, the reference ground layer is a whole-layer structure, and the reference ground layer can be formed on the substrate through a process such as coating or sputtering. In another optional implementation mode, the reference ground layer is For a patterned structure, a conductive film layer can be formed on the base substrate by a process such as coating or sputtering, and a patterning process is performed on the conductive film layer to obtain the reference ground layer. The manufacturing material of the reference ground layer can be metal or carbon. And other conductive materials.

After the reference ground layer is formed, an insulating layer may be formed on the reference ground layer by using a process such as coating or sputtering. The insulating layer may be made of an inorganic material.

Step 603: Form at least one differential signal line group and at least one ground line group on the insulation layer.

In an optional implementation manner, after a plurality of vias are formed on the insulating layer (the plurality of vias correspond to the positions of the ground wire group to be formed), the plurality of vias of the insulating layer are filled with a conductive material. The conductive material and the ground may be made of the same material or different materials; then a conductive material layer is formed on the insulating layer, and a patterning process is performed on the conductive material layer to form a ground wire group with vias, that is, the ground wire Groups and vias are made in a single patterning process.

In another optional implementation manner, after forming a plurality of vias in the insulating layer, a conductive ground layer can be formed on the insulating layer. Since the ground layer is directly covered on the insulating layer, the above-mentioned multiple layers are covered. A plurality of via holes corresponding to the plurality of via holes on the insulating layer are formed on the ground layer of each via hole, and then a patterning process is performed on the ground layer to form a ground wire group. The finally formed at least one ground line group is connected to the reference ground layer through a plurality of vias on the insulation layer.

It should be noted that, in the above manufacturing method, one patterning process may include photoresist coating, exposure, development, etching, and photoresist stripping.

It is worth noting that, for the manufacturing method of other structures of the functional panel, reference may be made to the above manufacturing method, and the relevant structures in the manufacturing method in the embodiment of the present disclosure may refer to the foregoing device embodiments, which are not described in this embodiment of the present disclosure.

It should be noted that in the drawings, the dimensions of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or intervening layers may be present. In addition, it can be understood that when a layer or element is referred to as being “between” two layers or two elements, it can be the only layer between the two layers or two elements, or one or more intervening layers or element. Similar reference numerals indicate similar elements throughout.

Those skilled in the art will readily contemplate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that conform to the general principles of this disclosure and include the common general knowledge or conventional technical means in the technical field not disclosed by this disclosure. . It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It should be understood that the present disclosure is not limited to the precise structure that has been described above and illustrated in the accompanying drawings, and various modifications and changes may be made without departing from the scope thereof. The scope of the disclosure is limited only by the following claims.

Claims

A function panel including:

Substrate

At least one differential signal line group, the at least one differential signal line group is disposed on the base substrate, and each differential signal line group in the at least one differential signal line group includes two signal lines;

At least one ground line group, the at least one ground line group is disposed on the base substrate, and is located on the same side of the base substrate as the at least one differential signal line group, in the at least one ground line group Each ground wire group includes two ground wires;

Wherein, each ground line group in the at least one ground line group corresponds to each differential signal line group in the at least one differential signal line group, and two ground lines in each ground line group The orthographic projection on the base substrate is located on both sides of the corresponding orthographic projection of a differential signal line group on the base substrate, and two ground wires in the ground wire group are connected to the same reference ground.
The function panel according to claim 1, wherein

The two ground wires in the ground wire group include a first ground wire and a second ground wire. At least one end of the first ground wire and at least one end of the second ground wire are connected to the same reference ground.
The function panel according to claim 2, wherein:

A first end of the first ground line and a first end of the second ground line are connected to the same reference ground;

The second end of the first ground line and the second end of the second ground line are connected to the same reference ground, and the first end and the second end are at the first ground line or the second ground line. Opposite ends in the direction of extension.
The functional panel according to any one of claims 1-3, wherein the at least one differential signal line group includes a plurality of differential signal line groups arranged in an array, and the at least one ground line group includes an array of Multiple ground wire groups, two adjacent ground wire groups of the multiple ground wire groups reuse the same ground wire.
The function panel according to any one of claims 1-3, further comprising:

A reference ground layer and an insulation layer sequentially stacked in a direction away from the base substrate;

Wherein the at least one ground line group is located on a side of the insulation layer away from the reference ground layer, a plurality of via holes are provided on the insulation layer, and the at least one ground line group passes the A plurality of vias are connected to the reference ground layer.
The function panel according to claim 5, wherein at least one via hole is provided on each of the two ground wires in each of the ground wire groups, the at least one via hole is used to connect a reference ground and One-to-one correspondence with the plurality of vias on the insulation layer.
The functional panel according to claim 6, wherein the at least one via hole includes a plurality of via holes arranged at equal intervals.
The function panel according to claim 7, wherein

A first end of the first ground line and a first end of the second ground line are connected through a first lead, and the first lead is connected to the reference through the plurality of vias on the insulation layer. Stratum connection

The first end and the second end are opposite ends in an extending direction of the first ground line or the second ground line.
The function panel according to claim 8, wherein

The second end of the first ground line and the second end of the second ground line are connected through a second lead, and the second lead is connected to the reference through the plurality of vias on the insulation layer. Stratum connection

The first end and the second end are opposite ends in an extending direction of the first ground line or the second ground line.
The function panel according to any one of claims 1-3, further comprising:

At least one binding terminal;

At least one driver chip;

The at least one binding terminal is connected to the at least one driving chip through the at least one differential signal line group, and at least one ground line group is further provided between the at least one binding terminal and the at least one driving chip, The at least one ground line group corresponds to the at least one differential signal line group in a one-to-one manner.
The function panel according to claim 10, wherein each of the driving chips comprises:

One ground terminal and two signal terminals, and

Wherein, the ground terminal is located on one side of the two signal terminals, and the two signal terminals are respectively connected to two signal lines in a corresponding differential signal line group, and

The first ground wire is directly connected to the ground terminal.
The functional panel according to claim 11, wherein a second ground wire is connected to the ground terminal through a third lead that is insulated from the two signal lines, and the third lead is connected to the ground substrate. The orthographic projection crosses the orthographic projection of the two signal lines on the base substrate.
The function panel according to claim 11, wherein each of the driving chips includes

A first ground terminal, a second ground terminal, and two signal terminals, and

The first ground terminal and the second ground terminal are located on both sides of the two signal terminals, respectively, and the two signal terminals are respectively connected to two signal lines in a corresponding differential signal line group, and

The first ground wire is connected to the first ground terminal, and the second ground wire is connected to the second ground terminal.
The functional panel according to claim 12, wherein the third lead is located on a side of the differential signal line group away from the base substrate and overlaps the two signal lines, and the first An insulating spacer is provided at the overlapping place between the three leads and the two signal lines.
The functional panel according to claim 12, wherein the third lead and the ground line group are located on different layers, and an isolation layer for insulation is provided between the third lead and the ground line group, and Both ends of the third lead are connected to the first ground line and the second ground line through vias on the isolation layer, respectively.
The functional panel according to any one of claims 1-3, wherein

The at least one differential signal line group and the at least one ground line group are located on the same layer on the base substrate.
The functional panel according to any one of claims 1-3, wherein

The base substrate is made of glass or organic matter; and

The functional panel is a display panel, a touch panel, or an in-cell touch display panel.
The functional panel according to any one of claims 1-3, wherein in each differential signal line group in the at least one differential signal line group, two signal lines include a first line segment parallel to each other Part and the second line segment part, a ratio of a distance between the first line segment part and the second line segment part to a line width of a corresponding position of the first line segment part and the first line segment part and the The ratio between the distance between the second line segment portions and the line width of the corresponding position of the second line segment portion is equal, and the ratio is maintained in the extending direction of the first line segment portion and the second line segment portion. change.
A terminal comprising the function panel according to any one of the preceding claims.
A method for manufacturing a functional panel includes:

Providing a substrate;

Forming at least one differential signal line group and at least one ground line group on the same side of the base substrate;

Wherein, each ground line group in the at least one ground line group corresponds to each differential signal line group in the at least one differential signal line group, and each differential in the at least one differential signal line group The signal line group includes two signal lines. Each ground line group in the at least one ground line group includes two ground lines. The two ground lines in each ground line group are on the base substrate. The orthographic projection is located on both sides of the orthographic projection of the corresponding one differential signal line group on the substrate, and two ground wires in the ground wire group are connected to the same reference ground.