WO2020018709A1 - Procédé de fabrication de couches semi-conductrices électroconductrices - Google Patents

Procédé de fabrication de couches semi-conductrices électroconductrices Download PDF

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Publication number
WO2020018709A1
WO2020018709A1 PCT/US2019/042272 US2019042272W WO2020018709A1 WO 2020018709 A1 WO2020018709 A1 WO 2020018709A1 US 2019042272 W US2019042272 W US 2019042272W WO 2020018709 A1 WO2020018709 A1 WO 2020018709A1
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WO
WIPO (PCT)
Prior art keywords
nitride
substrate
based semiconductor
annealing
dopant
Prior art date
Application number
PCT/US2019/042272
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English (en)
Inventor
Christian J. ZOLLNER
Burhan SAIFADDIN
Abdullah ALMOGBEL
Michael Iza
James S. Speck
Shuji Nakamura
Steven P. Denbaars
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The Regents Of The University Of California
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by The Regents Of The University Of California filed Critical The Regents Of The University Of California
Publication of WO2020018709A1 publication Critical patent/WO2020018709A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2258—Diffusion into or out of AIIIBV compounds

Definitions

  • This invention relates to a method for the production of an electrically - conductive semiconductor layers via high temperature annealing, wherein the substrate material acts as a source for the dopant element in the annealed material.
  • GaN gallium nitride
  • AIN aluminum nitride
  • AlGaN, InGaN, AllnGaN ternary and quaternary compounds incorporating gallium, aluminum and indium
  • MOCVD metal-organic chemical vapor deposition
  • HYPE hydride vapor phase epitaxy
  • AiGaN and AIN for short wavelength devices enabled nitride-based light emitting diodes (LEDs) and laser diodes (LDs) to overtake many other research ventures.
  • LEDs nitride-based light emitting diodes
  • LDs laser diodes
  • A!GaN and GaN have found wide popularity in power electronics applications, and AIN is expected to have many benefits in transistors and other electronic devices due to its high breakdown field and electron mobility. Consequently, AiGaN and AIN based materials and devices have become the dominant material system used for ultraviolet light semiconductor applications, and are of great research and industrial interest for electronics applications of many kinds.
  • a method of doping AIN or AiGaN films by post-growth annealing wherein the substrate material acts as a source for dopant atoms.
  • the substrate material acts as a source for dopant atoms.
  • the present invention discloses a method for annealing a nitride- based semiconductor film, which is grown on a substrate containing one or more atomic species that function as a dopant (donor or acceptor) in the nitride-based semiconductor film.
  • the annealing may comprise heating the substrate and film to a temperature greater than about 1000°C.
  • the treatment may also comprise exposing the substrate and film to an inert environment, or to an ambient or low-pressure atmosphere that contains some argon (Ar), hydrogen (H 2 ), nitrogen (N 2 ), oxygen (O2), ammonia (NH3), or some other forming gas, or some other process gas.
  • Ar argon
  • H 2 hydrogen
  • N 2 nitrogen
  • NH3 ammonia
  • various layers of the nitride-based semiconductor film can be made conductive via the bulk diffusion of dopant atoms from the substrate into the film.
  • the substrate may be comprised of silicon carbide (SiC), magnesium aluminate spinel (MgAkCri), magnesium oxide (MgO), or any other substrate material containing oxygen (O), silicon (Si), germanium (Ge), zinc (Zn), magnesium (Mg), iron (Fe), phosphorous (P), boron (B), sulfur (S), selenium (Se), beryllium (Be), or fluorine (F), or any other possible dopant atoms.
  • SiC silicon carbide
  • MgAkCri magnesium aluminate spinel
  • MgO magnesium oxide
  • the semiconductor film may be comprised of one or more nitride-based layers.
  • the terms“nitride-based” or“PI-niirides” or“nitrides” refer to any alloy composition of the (Ga, Al,In,B)N semiconductors having the formula Ga «ALInyB z N where:
  • the nitride-based layers may be grown using deposition methods comprising conventional chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), sputtering, atomic layer deposition (ALD), evaporation under vacuum or controlled ambients, ion beam deposition (IBD), hydride vapor phase epitaxy (HVPE), metalorgamc chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
  • CVD chemical vapor deposition
  • PECVD plasma-enhanced chemical vapor deposition
  • ALD atomic layer deposition
  • IBD ion beam deposition
  • HVPE hydride vapor phase epitaxy
  • MOCVD metalorgamc chemical vapor deposition
  • MBE molecular beam epitaxy
  • the nitride-based layers may be grown in any crystallographic direction, such as on a conventional c-plane oriented nitride-based semiconductor crystal, or on a nonpolar plane, such as a-plane or m-plane, or on any semipolar plane, such as ⁇ 20-21 ⁇ , ⁇ 11-22 ⁇ and ⁇ 10-11 ⁇ .
  • the present invention also discloses a material having enhanced electrical (n- type) conductivity when processed using the method.
  • FIG 1 is a flowchart describing the process steps used in one embodiment of the invention.
  • FIG. 2 is a graph of Si (crn-3) vs. etch depth (a.u.) that plots secondary -ion mass spectrometry data for annealed AIN films on SiC substrates, wherein, after annealing at 1700° C for 60 min, an Si concentration of 2el9 cnr 3 or greater is achievable.
  • the present invention describes a method for treating a semiconductor film containing one or more nitride-based layers, where the fact that the film is grown on a substrate containing some dopant atoms allows for diffusion of dopant atoms from the substrate into the film at high temperatures. High-temperature annealing will not degrade the quality of substrate, and has actually been reported to increase the crystal quality of the semiconductor film as well. Doping the semiconductor film allows for higher dopant concentrations, better crystal quality, and eliminates surface damage associated with doping during growth and ion implantation, respectively.
  • treatment refers to the placement of the sample in a condition such as high-temperature annealing and/or exposure to some process gas with the goal of improving or changing some material or device characteristic.
  • high temperature refers to substrate temperatures greater than 1 QQQ°C.
  • high temperature refers to temperatures of l000°C to 2500°C.
  • process gas refers to any gas commonly used in
  • semiconductor processing such as nitrogen, argon, ammonia, hydrogen, oxygen, a forming gas, or another process gas, etc.
  • the current state of the art in nitride heteroepitaxy involves growing nitride- based layers on foreign substrates, such as sapphire (most common) and Si (less common).
  • This invention uses substrates capable of high-temperature annealing and which contain some dopant atoms (SiC, MgAbCri, MgO, and other dopant- containing oxide, semi -insulating, or semi-conducting substrates).
  • the present inventi on provides a means of enhancing the electri cal characteristi cs of nitride- based layers by doping these materials via bulk-diffusion during high-temperature annealing.
  • the present invention describes a method for treating a nitride-based semiconductor film grown on a substrate material containing some dopant atoms.
  • the annealing of the nitride-based semiconductor fil on the dopant-containing substrate results in higher concentration of the dopant atom in the film than can s often be achieved by doping during growth or via ion-implantation, which damages the crystal.
  • nitride-based semiconductor films can be treated and exhibit enhanced dopant concentration and electrical conductivity.
  • a wider variety of electronic and/or light-emitting structures is made possible, since growth or processing steps which would normally result m low dopant concentration and/or implantation damage can be avoided. This can result in improved device performance for nitride-based semiconductor films treated using the above described method.
  • FIG. 1 is a flowchart of process steps used in one embodiment of the present invention for treating one or more nitride-based semiconductor layers or films grown upon a dopant-containing substrate.
  • Block 100 represents the step of growing one or more nitride-based semiconductor layers or films on a substrate using any growth technique.
  • the nitride-based semiconductor layers or films have a c-plane oriented surface, an a-plane oriented surface, an m-plane oriented surface, or a semi polar oriented surface.
  • the substrate is comprised of silicon carbide (SiC), spinel i Y!gAbO ). magnesium oxide (MgO), or some other non-nitride substrate.
  • the substrate contains one or more atomic species that function as dopant elements, including oxygen (O), silicon (Si), germanium (Ge), zinc (Zn), magnesium (Mg), iron (Fe), phosphorous (P), boron (B), sulfur (S), selenium (Se), beryllium (Be), and/or fluorine (F).
  • the nitride-based semiconductor film is an AIN film grown on a SiC substrate by MOCVD. As grown, the film is highly resistive due to the low Si concentration in the MOCVD grown material.
  • Block 101 represents the step of thermal annealing of the nitride-based semiconductor layers or films and the substrate. Specifically, this step involves heating a sample comprised of the nitride-based semiconductor layers or films and the substrate with a duration and temperature sufficient to allow the dopants to diffuse from the substrate into the nitride-based semiconductor layers or films.
  • the heating occurs at a temperature of about 1000°C to about 2500°C, and at a pressure less than about 100 atmospheres.
  • the heating occurs in an inert environment, or in the presence of nitrogen (N 2 ), or in the presence of argon (Ar), or in the presence of ammonia (Nth), or in the presence of hydrogen (3 ⁇ 4), or in the presence of oxygen (Oz), or in the presence of a forming gas, or in the presence of another process gas.
  • annealing an A1N film up to 1000 nm thick for 60 minutes at about 1700°C is sufficient to increase the Si concentration in the film by two orders of magnitude, and to make the film electrically conductive.
  • Block 102 represents the step of further processing, such as additional growth, characterization, packaging, etc., to produce a semiconductor device.
  • the nitride-based semiconductor layers or films could be used as a conductive growth template for the growth of subsequent semiconducting layers, or could be characterized, or could be packaged into an electronic or opto-electronic device.
  • FIG. 2 is a graph of Si (cm-3) vs. etch depth (a.u.) that plots secondary ion mass spectroscopy (SIMS) data showing the Si concentration for three samples comprised of AIN films grown on SiC substrates; (1) where the films are as-grown (with an Si concentration of 4el 7 cm 3 ), (2) following an anneal at 1700°C for 30 minutes, and (3) following an anneal at l700°C for 60 minutes (with an Si concentration of 2el9 cm 3 or greater).
  • SIMS secondary ion mass spectroscopy
  • the main concern is the highly uniform Si concentration in the sample annealed at 1700°C for 60 minutes, with doping levels high enough for many (opto-)e!ectronic applications.
  • the Si concentrations have been calibrated using ion- implanted AlGaN:Si reference samples.
  • the SIMS etch depth profile is not quantitative, but the sharp spike in Si concentration marks the SiC substrate.
  • the sample thickness into which the Si has diffused to nearly uniform levels is known from other measurements (refiectometry, spectroscopic e!lipsometry, electron microscopy) to be about 800 nm. Thinner samples and longer anneal durations may allo higher Si concentrations
  • the Si has only partially diffused into the sample. This is evidenced by the relatively steep slope in the etch depth profile as compared to that of the 60 minute annealed sample. The sense of the slope also confirms that the SiC substrate is acting as a diffusion source of Si atoms.
  • AIN samples annealed for 6, 12, 30, and 60 minutes showed enhanced electrical conductivity as measured using In-solder contacts. While a full Hall effect experiment has not been done due to equipment limitations, resistance-based results suggest resistivities on the order of 1 kQ-cm or less based on similar measurements on MOCVD-grown n- AlGaN reference samples of known resistivity and with similar Si concentrations.
  • the present invention is intended to include the nitride-based semiconductor layers or films grown or processed using the steps described above.
  • the substrates employed may comprise SiC, MgAkOg MgO, or any other dopant-containing material.
  • the substrate can be insulating, semi-insulating, or semiconducting.
  • the nitride-based semiconductor layers or films may comprise a nitride alloy that contains some aluminum, such as AIN, AlInN, AlGaN, A1BN or AllnGaN, for example.
  • nitride-based semiconductor layers or films may be comprised of various thicknesses.
  • the present invention considers the substrate characteristics of the nitride- based semiconductor layers or films needed to ensure the presence of dopant elements and enhancement of electrical conductivity during high-temperature annealing treatment.
  • the key advantage of the dopant-containing substrate and annealing is that the nitride-based semiconductor layers or films can be altered in some desirable way without the need for doping in-situ during growth or by ion implantation, which have many limitations discussed above.
  • the substrate to act as a source for dopant atoms to diffuse from the substrate into the nitride-based semiconductor layers or films improves a characteristic of the nitride-based semiconductor layers or films after the annealing as compared the nitride-based semiconductor layers or films before the annealing.
  • the nitride-based semiconductor layers or films have an enhanced electrical conductivity after the annealing as compared to the nitride-based semiconductor layers or films before the annealing.
  • the nitride-based semiconductor layers or films are more heavily doped as compared to doping of the nitride-based semiconductor layers or films in-situ during growth or by ion implantation.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

La présente invention concerne un procédé permettant de traiter des couches semi-conductrices à base de nitrure. Le procédé consiste à utiliser un matériau de substrat contenant un dopant pour la croissance des couches et, ensuite, à recuire les couches et le substrat de telle sorte que le substrat fasse office de source de diffusion pour les atomes de dopant. Le procédé consiste à traiter les couches dans une certaine condition, telle qu'un recuit ambiant et/ou thermique contrôlé, de telle sorte que les atomes de dopant se diffusent depuis le substrat dans les couches pour améliorer une certaine caractéristique souhaitée telle qu'une conductivité électrique.
PCT/US2019/042272 2018-07-18 2019-07-17 Procédé de fabrication de couches semi-conductrices électroconductrices WO2020018709A1 (fr)

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US201862700077P 2018-07-18 2018-07-18
US62/700,077 2018-07-18

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020157596A1 (en) * 2001-04-30 2002-10-31 Stockman Stephen A. Forming low resistivity p-type gallium nitride
US20140191244A1 (en) * 2006-02-10 2014-07-10 The Regents Of The University Of California METHOD FOR CONDUCTIVITY CONTROL OF (Al,In,Ga,B)N

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020157596A1 (en) * 2001-04-30 2002-10-31 Stockman Stephen A. Forming low resistivity p-type gallium nitride
US20140191244A1 (en) * 2006-02-10 2014-07-10 The Regents Of The University Of California METHOD FOR CONDUCTIVITY CONTROL OF (Al,In,Ga,B)N

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NOH, YK ET AL.: "Fe-doped semi-insulating GaN with solid Fe source grown on (110) Si substrates by NH3 molecular beam epitaxy", JOURNAL OF CRYSTAL GROWTH, vol. 460, 19 December 2016 (2016-12-19), pages 37 - 41, XP029881308, DOI: 10.1016/j.jcrysgro.2016.12.070 *

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