WO2019228318A1 - 一种报文处理方法和装置 - Google Patents

一种报文处理方法和装置 Download PDF

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Publication number
WO2019228318A1
WO2019228318A1 PCT/CN2019/088700 CN2019088700W WO2019228318A1 WO 2019228318 A1 WO2019228318 A1 WO 2019228318A1 CN 2019088700 W CN2019088700 W CN 2019088700W WO 2019228318 A1 WO2019228318 A1 WO 2019228318A1
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Prior art keywords
label
node
message
messages
sending
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PCT/CN2019/088700
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English (en)
French (fr)
Inventor
刘冰洋
吕思沛
孟锐
杨飞
王闯
强鹂
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP19811116.3A priority Critical patent/EP3817307A4/en
Publication of WO2019228318A1 publication Critical patent/WO2019228318A1/zh
Priority to US17/104,700 priority patent/US11722407B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22—Parsing or analysis of headers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/12—Shortest path evaluation
    • H04L45/121—Shortest path evaluation by minimising delays
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/02—Topology update or discovery
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/34—Source routing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/50—Routing or path finding of packets in data switching networks using label swapping, e.g. multi-protocol label switch [MPLS]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/21—Flow control; Congestion control using leaky-bucket
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/22—Traffic shaping
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/28—Flow control; Congestion control in relation to timing considerations
    • H04L47/283—Flow control; Congestion control in relation to timing considerations in response to processing delays, e.g. caused by jitter or round trip time [RTT]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/56—Queue scheduling implementing delay-aware scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L51/00—User-to-user messaging in packet-switching networks, transmitted according to store-and-forward or real-time protocols, e.g. e-mail
    • H04L51/21—Monitoring or handling of messages
    • H04L51/234—Monitoring or handling of messages for tracking messages
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/16—Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
    • H04L69/167—Adaptation for transition between two IP versions, e.g. between IPv4 and IPv6

Definitions

  • the present application relates to the field of communication technologies, and in particular, to a message processing method and device.
  • Deterministic networks are the current research hotspot in the field of communication technology.
  • the demand for deterministic networks mainly comes from the industrial Internet, smart factories, programmable logic controllers (Programmable Logic Controllers, PLCs), remote and clouded, and augmented reality.
  • AR / virtual reality (VR) real-time interaction, remote surgery, tactile internet, etc.
  • the core of a deterministic network is to ensure the end-to-end bandwidth, delay, and jitter of service flows.
  • a node lacks understanding of the information of a received message, and may not be able to schedule it in a timely manner, and the node cannot guarantee the queue delay of the message at its own node.
  • Embodiments of the present invention provide a message processing method and device, which are used to solve the problem that it is difficult to ensure and know the delay of a message in the prior art.
  • a message processing method applied to a first node includes: obtaining N first messages, where N is an integer greater than or equal to 1, and the first message includes a first label; The N first messages are sent in a sending period corresponding to the first tag.
  • a first packet sent by a first node carries a first label, and the first packet is sent within a sending period corresponding to the first label.
  • the sending period of the first message sent by the first node can be obtained according to the first label, so that the receiving node can control the queuing delay of the first message.
  • the obtaining N first messages includes obtaining M second messages, where M is an integer greater than or equal to 1 but less than or equal to N, and the second message includes a second label. Obtaining the first label according to the second label, replacing the second label in the second packet with the first label, and obtaining M first packets.
  • the acquiring M second messages includes acquiring M second messages from a second node, and the second label is used to instruct the second node to send the second message.
  • the sending cycle of the message includes acquiring M second messages from a second node, and the second label is used to instruct the second node to send the second message.
  • acquiring the first label according to the second label includes: acquiring the first label according to the second label and an adjustment value corresponding to the second node.
  • the obtaining N first messages further includes: obtaining L third messages from a third node, where L is an integer greater than or equal to 1 but less than or equal to N, and the third message
  • the text includes a third label, where the third label is used to instruct the third node to send the third packet sending cycle; and the third label is obtained according to the third label and an adjustment value corresponding to the third node.
  • the acquiring the N first messages includes: determining a sending period of the fourth message, and if the sending period of the fourth message is a sending period corresponding to the first tag, then Add the first label to the fourth message to obtain the first message.
  • different first tags correspond to different sending periods.
  • the first message is a layer 2 data frame
  • the first label is located in a frame header portion of the layer 2 data frame.
  • the first packet is a three-layer data packet
  • the first label is located in at least one of a basic header and an extended header of the three-layer data packet.
  • the first tag includes two bits, and the value is one of 00, 01, 10, and 11.
  • one sending cycle corresponds to one sending queue
  • the first node includes three sending queues used periodically.
  • the sending cycle corresponding to the first tag is the next sending cycle after receiving all the second messages.
  • a message processing device includes: a processing module configured to obtain N first messages, where N is an integer greater than or equal to 1, and the first message includes a first label; And sending the N first messages within a sending period corresponding to the first tag.
  • the processing module is configured to obtain M second messages, where M is an integer greater than or equal to 1 but less than or equal to N, and the second message includes a second label.
  • Two tags obtain the first tag, replace the second tag in the second message with the first tag, and obtain M first messages.
  • the processing module is configured to obtain M second messages from a second node, and the second label is used to instruct the second node to send a sending period of the second message .
  • the processing module is configured to obtain the first label according to the second label and an adjustment value corresponding to the second node.
  • the processing module is further configured to obtain L third messages from a third node, where L is an integer greater than or equal to 1 but less than or equal to N, and the third message includes a third label
  • the third label is used to instruct the third node to send a third packet sending cycle, and the first label is obtained according to the third label and an adjustment value corresponding to the third node, The third label in the third message is replaced with the first label, and L first messages are obtained.
  • the processing module is configured to determine a sending period of a fourth packet. If the sending period of the fourth packet is a sending period corresponding to the first tag, The first label is added to the message to obtain the first message.
  • different first tags correspond to different sending periods.
  • the first message is a layer 2 data frame
  • the first label is located in a frame header portion of the layer 2 data frame.
  • the first packet is a three-layer data packet
  • the first label is located in at least one of a basic header and an extended header of the three-layer data packet.
  • the first tag includes two bits, and the value is one of 00, 01, 10, and 11.
  • one sending cycle corresponds to one sending queue
  • the first node includes three sending queues used periodically.
  • the sending cycle corresponding to the first tag is the next sending cycle after receiving all the second messages.
  • a message processing device includes a processing module and a memory.
  • the memory is used to store a program, and the processing module calls the program stored in the memory to execute the method provided by the first aspect of the present invention.
  • a message processing apparatus includes at least one processing element (or chip) for performing the method in the first aspect above.
  • a computer storage medium includes a program, and the program is used to execute the method in the first aspect above.
  • FIG. 1A is a schematic structural diagram of a network according to an embodiment of the present invention.
  • FIG. 1B is a schematic structural diagram of another network according to an embodiment of the present invention.
  • FIG. 2 is a flowchart of a message processing method according to an embodiment of the present invention.
  • FIG. 3A is a schematic diagram of message transmission according to an embodiment of the present invention.
  • FIG. 3B is a schematic diagram of message transmission according to an embodiment of the present invention.
  • IPv6 basic header provided by an embodiment of the present invention.
  • IPv4 basic header provided by an embodiment of the present invention.
  • 4C is an IPv6 hop-by-hop header provided by an embodiment of the present invention.
  • 4D is an IPv6 routing extension header provided by an embodiment of the present invention.
  • 4E is an IPv6 segmented routing extension header provided by an embodiment of the present invention.
  • 4F is a Layer 2 Ethernet frame provided by an embodiment of the present invention.
  • 4G is an MPLS header field provided by an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a message processing apparatus according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of another message processing apparatus according to an embodiment of the present invention.
  • FIG. 1A it is a schematic structural diagram of a network according to an embodiment of the present invention, including a node 101, a node 102, a node 103, a node 104, a node 105, a node 106, a node 107, and a node 108, a node 101, and a node 102.
  • Node 103, node 104, node 105, and node 106 are connected in sequence
  • node 107 is connected to node 108
  • node 108 is connected to node 103.
  • Sending messages between nodes, how to ensure the delay of the message is an urgent problem.
  • node 101 sends a message to node 106
  • node 107 also sends a message to node 106
  • node 103 to node 105 will process two messages.
  • how to schedule the messages to ensure the delay of the messages becomes a problem in the industry, especially if the link between the nodes is a long link.
  • FIG. 1B it is a schematic structural diagram of another network according to an embodiment of the present invention, including a host device 110 and a host device 116.
  • the host device 110 needs to send a message to the host device 116, and the message sent by the host device 110 passes through The edge network, core network, and another edge network reach the host device 116, specifically through the nodes 111, 112, 113, 114, and 115 to the host device 116.
  • the node 111 serves as the entrance edge node, the node 112, the node 113, and the node 114 is the core node, and node 115 is the egress edge node. If the end-to-end delay of the host device 110 and the host device 116 can be guaranteed and the jitter is small, then the Internet will be able to meet the needs of services with higher real-time requirements.
  • a flowchart of a message processing method according to an embodiment of the present invention may be applied to any node in FIG. 1A and FIG. 1B, for example, it is called a first node, and specifically includes:
  • N is an integer greater than or equal to 1
  • the first packet includes a first label.
  • a first packet sent by a first node carries a first label, and the first packet is sent within a sending period corresponding to the first label.
  • the sending period of the first message sent by the first node can be obtained according to the first label, so that the receiving node can control the queuing delay of the first message.
  • step S201 may specifically include: obtaining M second messages, M is an integer greater than or equal to 1 but less than or equal to N, and the second packet includes a second label; the first label is obtained according to the second label, and the second packet in the second packet is The label is replaced with the first label to obtain M first messages.
  • the obtained M second messages may come from the second node, and the second node also uses a similar sending method as shown in FIG. 2, that is, M second messages are obtained from the second node, and the second label is used To instruct the second node to send a sending cycle of the second message.
  • the first label may be obtained according to the second label and an adjustment value corresponding to the second node.
  • the second node sends the second message within the sending period corresponding to the second label.
  • the first node can learn the sending period of the second node according to the second label carried in the second message, and supplementary consideration After the link delay between the second node and the first node, the first node can know at which point in time it can receive all the messages sent by the second node within the corresponding sending period of the second label, so that the first node has Ability to control the queuing delay of the first message, for example, it can be able to forward all the messages sent by the second node within the corresponding sending cycle of the second label as soon as possible, preferably, also sending in the same sending cycle of the first node Go out to further ensure the delay of the message, that is, replace the second tag carried in the second message with the first tag, and send it out within the sending period corresponding to the first tag.
  • the first message obtained in step S201 may further include a message from a third node.
  • step S201 further includes: obtaining L third messages from the third node, L Is an integer greater than or equal to 1 but less than or equal to N, the third packet includes a third label, and the third label is used to instruct the third node to send a sending period of the third packet; Three labels and an adjustment value corresponding to the third node to obtain the first label, replace the third label in the third packet with the first label, and obtain L first packets .
  • the first node may be node 103 in FIG. 1A
  • the second node may be node 102 in FIG. 1A
  • the third node may be node 108 in FIG. 1A.
  • the second node sends M second messages to the first node, the second message carries a second label, and the second label is used to instruct the second node to send the second message.
  • the third node sends L third messages to the first node, the third message carries a third label, and the third label is used to indicate the sending period of the third node to send the third message.
  • the labels of the second packet and the third packet of the node are replaced with the first label, and then sent out in the sending cycle corresponding to the first label.
  • FIG. 3A it is a schematic diagram of message transmission according to an embodiment of the present invention.
  • a second node sends a message to a first node, and both the second node and the first node execute the method shown in FIG. It can be seen in 2 that the first node can know at which point in time it has received all the messages sent by the second node within the corresponding transmission period of the second tag.
  • FIG. 3A is only an example and is not a limitation on the transmission period and the like.
  • the second node includes a transmission period x and a transmission period x + 1.
  • the first node includes a transmission period y and a transmission period y + 1.
  • the second node and the first node may also include other transmission periods.
  • a message was sent at the end and was received by the first node after passing the link delay p between the second node and the first node. Considering that the link delay may have jitter, it may pass the link delay p + e is then received by the first node. Because the message shown is sent by the second node at the end of the transmission period x, the time when the first node received the message falls in the transmission period y, so when the transmission period y ends, or the transmission period y + 1 begins Previously, all messages sent by the second node in the sending cycle x were received by the first node, and they could be sent in the next sending cycle y + 1 of the first node.
  • the time difference between the time when the first node receives the last message in the transmission period x and the start time of the transmission period y + 1 is ⁇
  • the single-hop queuing delay of the first node is T + ⁇
  • T is the duration of one transmission cycle
  • the expected value of ⁇ is 0.5T.
  • the transmission period of each node is T
  • the total delay is ⁇ (T + ⁇ )
  • the expected value is 1.5 hT (h is the number of hops)
  • the jitter is a constant 2T.
  • the first node can receive all the messages sent by the second node within the transmission period x before the start of the transmission period. For example, as shown in FIG. 3A, the first node starts at the transmission period y + 1. Before, it was able to receive all the messages sent by the second node within the sending period x. For all the messages sent by the second node in the sending cycle x, if it can be sent in the same sending cycle of the first node, then the delay and jitter of the message can be further guaranteed. The two nodes send out in the next sending cycle after all the messages sent in the sending cycle x, which can further reduce the delay of the message.
  • the message sent by the second node may carry a second label.
  • the second label is used to indicate the sending cycle of the message sent by the second node.
  • the value of the second label is 18, which is used to indicate the sending cycle of the message. Is 18.
  • the first node can know the sending period of the message in the second node by using the label of the received message, thereby sending all the messages sent by the second node in the sending period x in the same sending period of the first node. .
  • the message sent by the second node to the first node carries a tag. If it is sent in the sending cycle x, the tag value is equal to x; the first node can maintain an adjustment value ⁇ X for the second node. The label and the adjustment value corresponding to the second node. The first node can obtain the sending cycle and the corresponding label when forwarding the message. For example, the first node receives a packet with the label x from the second node and replaces the label with x + ⁇ X, and send it out in the transmission period x + ⁇ X.
  • the first node maintains an adjustment value ⁇ X for the second node.
  • the adjustment value can be calculated according to the fiber length between the second node and the first node, and can also be obtained by sending a test packet.
  • a test message is sent at the end with a label x.
  • ⁇ X y + 1-x
  • the second node and the first node do not need time synchronization.
  • the nodes can be synchronized with the clock, that is, the clock frequency of the nodes is 1 / T, and T is the transmission period, that is, the full
  • the network nodes use the same sending cycle, but do not need time synchronization, and the start time of the sending cycle does not need to be aligned.
  • the second node does not need to send a message every cycle, and may send the message at intervals of one sending cycle.
  • the sending periods of the second node and the first node may also be different.
  • the first label x + ⁇ X, the second label x, and the adjustment value ⁇ X corresponding to the second node may be a specific period value, or a value that can implicitly indicate a period.
  • the value of the second label is 18, and the adjustment value corresponding to the second node is 71, and then the value of the first label is 89, and then the value of the second label in the received second packet is replaced by the first 18
  • the value of the label is 89.
  • the specific period value is rounded to 3, for example, the value of the second label is 0 (18 to 3 is rounded to 0), corresponding to the second node.
  • the adjustment value of is 2 (the remainder is 2 from 71 to 3), and the value of the first label is 2 (the remainder is 0 from 89 to 3).
  • the value of the second label in the received second packet is 0. Replace with the value 2 for the first label.
  • the specific period value may be rounded to other values. For example, it may be four queues and the specific period value is rounded to 4. .
  • the value of the implicit period can reduce the bandwidth occupied by the first and second labels. You can use only two bits to represent the first or second label. The values can be 00, 01, 10, and 11 one of the.
  • the second node sends a message at the end of the sending period x, and the time when the first node receives the message falls within the sending period y.
  • the solid arrow of the node represents the left boundary of the jitter, indicating the earliest time that the message may reach the first node
  • the dashed arrow of the second node to the first node represents the right boundary of the jitter, indicating that the message may reach the first node.
  • Latest time The left and right boundaries of the jitter in FIG.
  • 3A are both within the sending period y of the first node, which means that within the sending period y of the first node, the first node will receive the data sent by the second node during the sending period x.
  • One receiving queue corresponds to one sending cycle.
  • the receiving queue corresponding to a message sent by the second node in sending cycle x corresponds to the sending cycle y + 1.
  • the receiving queue is converted into a sending queue for sending.
  • the first node only needs to maintain three queues for circular use.
  • the receiving queue corresponding to the message sent by the second node in the sending cycle x may also correspond to the sending cycle y + 2, that is, in the sending cycle y + 2, the receiving queue is converted into a sending queue for sending, and in the sending cycle y + 1, the receiving queue is still a queue waiting to be sent.
  • the left and right boundaries of the jitter are within two adjacent periods, for example, the left boundary is within the transmission period y of the first node, and the right boundary is within the transmission period y + 1 of the first node, then at the first node In the sending period y + 1, the first node may be able to receive part of the message sent by the second node in the sending period x, part of the message sent by the second node in the sending period x + 1, and the second node in the sending period x +2 sends some messages, so the first node needs to maintain three receiving queues during the sending period y + 1. If the left and right boundaries of the jitter span multiple cycles, the number of required receive queues will increase accordingly, and details are not repeated here.
  • FIG. 3B it is another schematic diagram of packet transmission according to an embodiment of the present invention.
  • the first node includes sending periods 88, 89, and 90.
  • 3B is the three queues of the first node during the sending cycle 89, respectively
  • Q2 the sending queue, including all the messages sent by the third node in the sending cycle 35 and all the messages sent by the second node in the sending cycle 18 Messages
  • Q0 Receive queue, including all messages sent by the third node in send cycle 36 and all messages sent by the second node in send cycle 19
  • Q1 Receive queue, including those sent by the third node in send cycle 37 All messages and all messages sent by the second node in the sending cycle 20.
  • the messages in Q2 have been sent, and Q2 becomes a receiving queue for receiving all the messages sent by the third node in sending cycle 38 and all the messages sent by the second node in sending cycle 21.
  • Q0 becomes the send queue.
  • all messages means that messages can be received. For messages that have not been received or discarded, retransmission may be required. The retransmitted messages will be based on the new sending cycle. Carry a new cycle label.
  • the first node may generate the first label.
  • the fourth packet is determined. If the sending period of the fourth message is the sending period corresponding to the first tag, adding the first tag to the fourth message to obtain the first message.
  • the first node receives a message or generates a message locally, and then schedules and sends these messages, obtains the sending cycle of these messages, and adds a first label to these messages according to the obtained sending cycle. There may not be any in these messages.
  • Fields corresponding to the first label When adding the first label, corresponding fields need to be added to the packets. These packets may also have fields corresponding to the first label, but the corresponding fields are invalid values. Adding the first label is only The corresponding value needs to be replaced with the value of the first label.
  • the first node schedules the message and obtains the sending period of the message.
  • a leaky bucket algorithm can be used.
  • the leaky bucket algorithm is an algorithm often used in traffic shaping or rate limiting in the network. It The main purpose is to control the rate of data injection into the network and smooth out burst traffic on the network.
  • the leaky bucket algorithm provides a mechanism through which burst traffic can be shaped to provide a stable flow to the network.
  • a leaky bucket can be considered as a single server queue with a constant service time. If the leaky bucket (packet buffer) overflows, the data packet will be dropped.
  • the ingress edge node 111 shapes the received message from the host device 110, determines the sending period of the message, and adds a period label corresponding to the sending period to the message, the core node 112, 113 replace the label of the received message and send it in the newly determined sending cycle, then the delay and jitter of the message between the ingress edge node 111 and the egress edge node 115 will be guaranteed.
  • Edge nodes perform traffic shaping. The total bandwidth of the traffic sent in a cycle can not exceed the allocated threshold. The core nodes schedule according to the cycle label. When the core node receives the traffic from multiple edge nodes, it can also forward the report within the corresponding cycle. Because the edge node performs traffic shaping, each packet has a certain scheduling period, which only occupies the reserved resources of the current flow in that period, and does not offset to other periods consuming the reserved resources of other flows.
  • Ai (t) rit + riT
  • Ai (t) is the total traffic bandwidth of data flow i in period t
  • rit is the average bandwidth of data flow i in period t
  • riT is period t Burst of data stream i.
  • Edge nodes perform traffic shaping, and the amount of data sent in each cycle does not exceed T ⁇ ri.
  • a packet passes through the ingress edge node 111, the core node 112, the core node 113, the core node 114, and the egress edge node 115, and the sending cycle of each node is T.
  • the message is shaped periodically at the edge node; the message carries the periodic label and the label is exchanged at the core node.
  • Each hop replaces the periodic label with the periodic label according to the label switching table.
  • the packet uses the label and The label switching table calculates the periodic scheduling queue to be entered; scheduling is performed on a periodic basis. When performing queue scheduling, each node only needs 3 queues. At the beginning of each cycle, one schedule is opened for sending and the other two are received for periodic round-robin scheduling.
  • the core node does not have a flow-by-flow state, and only performs aggregate flow scheduling, which is suitable for large-scale networks (the number of flows is huge) to support long-link and long-distance networks.
  • the shaping of the edge nodes and the scheduling of the core nodes are very simple. Only three queues are required for periodic scheduling, and the buffer requirements of each queue are small.
  • the periodic label is located in the basic header of the three-layer data packet
  • an Internet Protocol Version 6 (IPv6) basic header provided by an embodiment of the present invention includes a version, a traffic class, and a flow label. Label), payload length (Payload length), next header (Next header), hop limit (Hop Limit), source address (Source address) and destination address (Destination Address), the periodic label can be carried by the traffic level field.
  • IPv6 Internet Protocol Version 6
  • a basic version of the fourth version of the Internet Protocol (Internet Protocol Version 4 (IPv4)) provided by the embodiment of the present invention includes a version, a header length (IHL), and a service.
  • Type (of service) length of the entire packet (Total length), packet identification (Identification), fragments (Flags), fragment displacement (Fragment Offset), time to live (TTL), upper layer Protocol number, header checksum, source address, destination address, options, and padding.
  • Period labels can be carried in the service type field.
  • Differentiated Service Code Point (DSCP) is a classification standard of Quality of Service (QoS). DSCP usually uses 6 bits of the service type field, and the service type field also includes 2 unused ones. These two bits can be used to carry the periodic label, and the periodic label can also be carried by the DSCP.
  • the period label is located in the extension header of the three-layer data packet
  • an IPv6 hop-by-hop packet header includes a lower header (Next header), an header length (Header Extension Length, Hdr, Extlen), and an Options (Options) field, and a period.
  • the label may be carried by an options field (Options), for example, it may be carried by a TLV of the options field.
  • an IPv6 routing extension header includes a lower-layer header, an extension header length, a type (Routing Type), a remaining hop (Segment left), and a detailed type.
  • Data Type-specific data
  • the periodic label can be carried by a reserved field (reserve) in the type detailed data, and the type field is set to a new value defined by the standard.
  • an IPv6 Segment Routing (SR) extension header includes a lower-layer header, an extension header length, a Routing Type, and a remaining hop.
  • the last element of the segment list (Last Entry), flag (flag), grouping tag (TAG), at least one segment address and optional TLV (Optional Type Length Value objects), the periodic label can be carried by the optional TLV field
  • the semantics of the TLV per hop can be added to the suffix of the destination address in the basic header of IPv6 to obtain and replace the periodic label.
  • the period label is located in the second layer data packet
  • a Layer 2 Ethernet frame includes a preamble, a frame start character, a MAC target address, a MAC source address, an 802.1Q tag (optional), and an EtherType.
  • Payload Payload
  • CRC redundancy check
  • the periodic label can be carried by the EtherType field, or the 802.1Q tag field.
  • the periodic label is located in the MPLS header field
  • a Multiprotocol Label Switching MPLS header field includes a routing label (Label), a priority (Exp), a stack bottom (S), and survival. Period.
  • the period label can be carried by the priority field.
  • each hop device on the path needs to obtain a second label from the popped upper-layer routing label, calculate the first label, and then write the lower-layer routing label to complete the periodic label exchange.
  • the label storage location may be as shown in FIG. 4G, or may be carried by a priority field.
  • the second label in the second message is replaced with the first label.
  • the replacement here may also be called swap, exchange, rewrite, etc., which may be directly in the second message. Change the value of the field carrying the second label to the value of the first label; or pop up the field carrying the second label in the second message, and then push the field including the first label into the first message; or It is to pop out the field carrying the second label in the second packet, and then modify the values of other fields in the second packet to the values of the first label, etc.
  • replacement In addition to replacing the second label in the second packet with the first label, other fields in the second packet can also be operated, such as modifying the hop limit field and modifying the lifetime. There are no restrictions here.
  • FIG. 5 is a message processing device according to an embodiment of the present invention.
  • the message processing device implements some or all functions of the first node by using software, hardware, or a combination of the two.
  • the message processing device may be a first node, or may be a chip applied to the first node.
  • the message processing apparatus includes a processing module 501 and a sending module 502, where:
  • a processing module 501 configured to obtain N first packets, where N is an integer greater than or equal to 1, and the first packet includes a first label;
  • the sending module 502 is configured to send the N first packets in a sending period corresponding to the first tag.
  • the processing module is configured to obtain M second messages, where M is an integer greater than or equal to 1 but less than or equal to N, and the second message includes a second label.
  • Two tags obtain the first tag, replace the second tag in the second message with the first tag, and obtain M first messages.
  • it further includes a receiving module, and the processor obtains the second message through the receiving module.
  • the processing module is configured to obtain M second messages from a second node, and the second label is used to instruct the second node to send a sending period of the second message .
  • the processing module is configured to obtain the first label according to the second label and an adjustment value corresponding to the second node.
  • the processing module is further configured to obtain L third messages from a third node, where L is an integer greater than or equal to 1 but less than or equal to N, and the third message includes a third label
  • the third label is used to instruct the third node to send a third packet sending cycle, and the first label is obtained according to the third label and an adjustment value corresponding to the third node, The third label in the third message is replaced with the first label, and L first messages are obtained.
  • the processing module is configured to determine a sending period of a fourth packet. If the sending period of the fourth packet is a sending period corresponding to the first tag, The first label is added to the message to obtain the first message.
  • different first tags correspond to different sending periods.
  • the first message is a layer 2 data frame
  • the first label is located in a frame header portion of the layer 2 data frame.
  • the first packet is a three-layer data packet
  • the first label is located in at least one of a basic header and an extended header of the three-layer data packet.
  • the first tag includes two bits, and the value is one of 00, 01, 10, and 11.
  • one sending cycle corresponds to one sending queue
  • the first node includes three sending queues used periodically.
  • the sending cycle corresponding to the first tag is the next sending cycle after receiving all the second messages.
  • the foregoing device is configured to execute the foregoing method embodiment, and its implementation principles and technical effects are similar, and details are not described herein again.
  • the sending module in the foregoing embodiment may be a transmitter
  • the receiving module may be a receiver
  • the processing module may be a processor, and details are not described herein again.
  • each module of the above device is only a division of logical functions. In actual implementation, it can be fully or partially integrated into a physical entity, or it can be physically separated. And these modules can all be implemented in the form of software through processing element calls; they can also be implemented in hardware; all modules can be implemented in the form of software called by processing elements, and some modules can be implemented in hardware.
  • the sending module can be a separately established component, or it can be integrated into one of the chips of the above-mentioned device for implementation.
  • it can also be stored in the memory of the above-mentioned device in the form of program code and called by a certain processing element of the above-mentioned device. And execute the functions of the above identified modules.
  • each step of the above method or each of the above modules may be completed by an integrated logic circuit of hardware in a processor element or an instruction in the form of software.
  • the above modules may be one or more integrated circuits configured to implement the above method, for example, one or more specific integrated circuits (ASIC), or one or more microprocessors (Digital Signal Processor (DSP), or one or more Field Programmable Gate Array (FPGA).
  • ASIC application-specific integrated circuit
  • DSP Digital Signal Processor
  • FPGA Field Programmable Gate Array
  • the processing element may be a general-purpose processor, such as a central processing unit (Central Processing Unit) or other processor that can call program code.
  • these modules can be integrated together and implemented in the form of a system-on-a-chip (SOC).
  • SOC system-on-a-chip
  • FIG. 6 is a schematic structural diagram of a bit block processing apparatus according to an embodiment of the present invention.
  • the apparatus may be a node 101, 102, 103, 104, 105, or 106 in FIG.
  • the apparatus includes: a memory 602 and a processor 601.
  • the memory 602 may be an independent physical unit, and may be connected to the processor 601 through a bus.
  • the memory 602 and the processor 601 may also be integrated together and implemented by hardware.
  • the memory 602 is configured to store a program that implements the foregoing method embodiment, or each module of the embodiment shown in FIG. 5, and the processor 601 calls the program to perform the operations of the foregoing method embodiment.
  • the foregoing apparatus may also include only a processor.
  • the memory for storing the program is located outside the access device, and the processor is connected to the memory through a circuit / wire to read and execute the program stored in the memory.
  • the processor may be a central processing unit (Central Processing Unit), a network processor (Network Processor), or a combination of CPU and NP.
  • Central Processing Unit Central Processing Unit
  • Network Processor Network Processor
  • the processor may further include a hardware chip.
  • the above-mentioned hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (Programmable Logic Device, PLD), or a combination thereof.
  • the PLD may be a complex programmable logic device (Complex Programmable Logic Device, CPLD), a field programmable logic gate array (Field-programmable Gate Array, FPGA), a universal array logic (Generic Array Logic, GAL), or any combination thereof.
  • the memory may include volatile memory (for example, Random-Access Memory, RAM); the memory may also include non-volatile memory (for example, Flash memory) Hard disk (Hard Disk Drive, HDD) or solid state drive (Solid-State Drive, SSD); the storage may also include a combination of the above types of storage.
  • volatile memory for example, Random-Access Memory, RAM
  • non-volatile memory for example, Flash memory
  • Hard disk Hard Disk Drive, HDD
  • SSD solid state drive
  • the storage may also include a combination of the above types of storage.
  • An embodiment of the present invention further provides a computer storage medium storing a computer program, where the computer program is used to execute the service data transmission method provided by the foregoing embodiment.
  • An embodiment of the present invention also provides a computer program product containing instructions, which when executed on a computer, causes the computer to execute the service data transmission method provided by the foregoing embodiment.
  • the embodiments of the present invention may be provided as a method, a system, or a computer program product. Therefore, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
  • computer-usable storage media including, but not limited to, disk storage, CD-ROM, optical storage, etc.
  • These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to work in a specific manner such that the instructions stored in the computer-readable memory produce a manufactured article including an instruction device, the instructions
  • the device implements the functions specified in one or more flowcharts and / or one or more blocks of the block diagram.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of steps can be performed on the computer or other programmable device to produce a computer-implemented process, which can be executed on the computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more flowcharts and / or one or more blocks of the block diagrams.

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Abstract

本发明实施例提供一种报文处理方法，应用于第一节点，包括：获取N个第一报文，N为大于等于1的整数，所述第一报文中包括第一标签；在所述第一标签对应的发送周期内发送所述N个第一报文。本发明实施例中，第一节点发送的第一报文中携带了第一标签，并且第一报文是在第一标签对应的发送周期内发送出去的，接收节点接收到第一报文后，可以根据第一标签获知第一节点发送该第一报文的发送周期，从而接收节点有能力控制第一报文的排队时延。

Description

一种报文处理方法和装置 技术领域
本申请涉及通信技术领域，特别涉及一种报文处理方法和装置。
背景技术
确定性网络是当前通信技术领域的研究热点，确定性网络的需求主要来自工业互联网、智能工厂、可编程逻辑控制器(Programmable Logic Controller，PLC)的拉远和云化、增强现实(augmented reality，AR)/虚拟现实(virtual reality，VR)的实时交互、远程手术、触觉互联网等。确定性网络的核心在于保证业务流的端到端带宽、时延和抖动。
现有技术中节点对接收到报文的信息缺乏了解，可能无法做到及时调度，节点无法保证报文在本节点的排队时延。
发明内容
本发明实施例提供一种报文处理方法和装置，用以解决现有技术中报文的时延难以保证和获知的问题。
第一方面，一种报文处理方法，应用于第一节点，包括：获取N个第一报文，N为大于等于1的整数，所述第一报文中包括第一标签；在所述第一标签对应的发送周期内发送所述N个第一报文。
本发明实施例中，第一节点发送的第一报文中携带了第一标签，并且第一报文是在第一标签对应的发送周期内发送出去的，接收节点接收到第一报文后，可以根据第一标签获知第一节点发送该第一报文的发送周期，从而接收节点有能力控制第一报文的排队时延。
在一种可能的设计中，所述获取N个第一报文包括：获取M个第二报文，M为大于等于1但小于等于N的整数，所述第二报文中包括第二标签；根据所述第二标签获取所述第一标签，将所述第二报文中的所述第二标签替换为所述第一标签，得到M个所述第一报文。
在一种可能的设计中，所述获取M个第二报文包括：获取来自第二节点的M个第二报文，所述第二标签用于指示所述第二节点发送所述第二报文的发送周期。
在一种可能的设计中，根据所述第二标签获取所述第一标签包括：根据所述第二标签和对应所述第二节点的调整值获取所述第一标签。
在一种可能的设计中，所述获取N个第一报文还包括：获取来自第三节点的L个第三报文，L为大于等于1但小于等于N的整数，所述第三报文包括第三标签，所述第三标签用于指示所述第三节点发送所述第三报文的发送周期；根据所述第三标签和对应所述第三节点的调整值获取所述第一标签，将所述第三报文中的所述第三标签替换为所述第一标签，得到L个所述第一报文。
在一种可能的设计中，所述获取N个第一报文包括：确定第四报文的发送周期，如果所述第四报文的发送周期为所述第一标签对应的发送周期，则在所述第四报文中添加所述第一标签，得到所述第一报文。
在一种可能的设计中，不同的第一标签对应不同的发送周期。
在一种可能的设计中，所述第一报文为二层数据帧，所述第一标签位于所述二层数据帧的帧头部分。
在一种可能的设计中，所述第一报文为三层数据包，所述第一标签位于所述三层数据包的基本头和扩展头中的至少一个。
在一种可能的设计中，所述第一标签包括两个比特，取值为00,01,10和11中的一个。
在一种可能的设计中，一个发送周期对应一个发送队列，所述第一节点包括周期性使用的三个发送队列。
在一种可能的设计中，所述第一标签对应的发送周期为接收到所有第二报文后的下一个发送周期。
第二方面，一种报文处理装置，包括：处理模块，用于获取N个第一报文，N为大于等于1的整数，所述第一报文中包括第一标签；发送模块，用于在所述第一标签对应的发送周期内发送所述N个第一报文。
在一种可能的设计中，所述处理模块用于获取M个第二报文，M为大于等于1但小于等于N的整数，所述第二报文中包括第二标签，根据所述第二标签获取所述第一标签，将所述第二报文中的所述第二标签替换为所述第一标签，得到M个所述第一报文。
在一种可能的设计中，所述处理模块用于获取来自第二节点的M个第二报文，所述第二标签用于指示所述第二节点发送所述第二报文的发送周期。
在一种可能的设计中，所述处理模块用于根据所述第二标签和对应所述第二节点的调整值获取所述第一标签。
在一种可能的设计中，所述处理模块还用于获取来自第三节点的L个第三报文，L为大于等于1但小于等于N的整数，所述第三报文包括第三标签，所述第三标签用于指示所述第三节点发送所述第三报文的发送周期，根据所述第三标签和对应所述第三节点的调整值获取所述第一标签，将所述第三报文中的所述第三标签替换为所述第一标签，得到L个所述第一报文。
在一种可能的设计中，所述处理模块用于确定第四报文的发送周期，如果所述第四报文的发送周期为所述第一标签对应的发送周期，则在所述第四报文中添加所述第一标签，得到所述第一报文。
在一种可能的设计中，不同的第一标签对应不同的发送周期。
在一种可能的设计中，所述第一报文为二层数据帧，所述第一标签位于所述二层数据帧的帧头部分。
在一种可能的设计中，所述第一报文为三层数据包，所述第一标签位于所述三层数据包的基本头和扩展头中的至少一个。
在一种可能的设计中，所述第一标签包括两个比特，取值为00,01,10和11中的一个。
在一种可能的设计中，一个发送周期对应一个发送队列，所述第一节点包括周期性使用的三个发送队列。
在一种可能的设计中，所述第一标签对应的发送周期为接收到所有第二报文后的下一个发送周期。
第三方面，一种报文处理装置，所述装置包括处理模块和存储器，存储器用于存储程序，处理模块调用存储器存储的程序，以执行本发明第一方面提供的方法。
第四方面，一种报文处理装置，包括用于执行以上第一方面的方法的至少一个处理元件(或芯片)。
第五方面，一种计算机存储介质，包括程序，所述程序用于执行以上第一方面的方法。
附图说明
图1A为本发明实施例提供的一种网络的结构示意图；
图1B为本发明实施例提供的另一种网络的结构示意图；
图2为本发明实施例提供的一种报文处理方法的流程图；
图3A为本发明实施例提供的一种报文传输示意图；
图3B为本发明实施例提供的一种报文传输示意图；
图4A为本发明实施例提供的一种IPv6基本头；
图4B为本发明实施例提供的一种IPv4基本头；
图4C为本发明实施例提供的一种IPv6逐跳包头；
图4D为本发明实施例提供的一种IPv6路由扩展头；
图4E为本发明实施例提供的一种IPv6分段路由扩展头；
图4F本本发明实施例提供的一种二层以太帧；
图4G为本发明实施例提供的一种MPLS头域；
图5为本发明实施例提供的一种报文处理装置的结构示意图；
图6为本发明实施例提供的另一种报文处理装置的结构示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。
如图1A所示，为本发明实施例提供的一种网络的结构示意图，包括节点101、节点102、节点103、节点104、节点105、节点106、节点107和节点108，节点101、节点102、节点103、节点104、节点105和节点106依次相连，节点107和节点108相连，节点108和节点103相连。节点之间发送报文，如何保证报文的时延是亟需解决的问题，例如节点101向节点106发送报文，节点107也向节点106发送报文，节点103至节点105会处理两个节点发送的报文，如何对报文进行调度以保证报文的时延成为业界难题，特别是节点之间的链路是长链路的情况下。
如图1B所示，为本发明实施例提供的另一种网络的结构示意图，包括主机设备110和主机设备116，主机设备110需要向主机设备116发送报文，主机设备110发送的报文经过边缘网络、核心网络和另一个边缘网络到达主机设备116，具体经过节点111、节点112、节点113、节点114、节点115到达主机设备116，节点111作为入口边缘节点，节点112、节点113和节点114作为核心节点，节点115作为出口边缘节点。如果主机设备110和主机设备116的端到端时延能够保证并且抖动较小，那么互联网将能满足实时性要求较高的业务的需求。
如图2所示，为本发明实施例提供的一种报文处理方法的流程图，可以应用到图1A和图1B中的任何一个节点上，例如叫做第一节点，具体包括：
S201，获取N个第一报文，N为大于等于1的整数，所述第一报文中包括第一标签。
S202，在所述第一标签对应的发送周期内发送所述N个第一报文。
本发明实施例中，第一节点发送的第一报文中携带了第一标签，并且第一报文是在第一标签对应的发送周期内发送出去的，接收节点接收到第一报文后，可以根据第一标 签获知第一节点发送该第一报文的发送周期，从而接收节点有能力控制第一报文的排队时延。
如果图2所示方法的执行主体为中间节点，可以根据来自上游节点的报文来获取第一报文，在一种可能的设计中，步骤S201可以具体包括：获取M个第二报文，M为大于等于1但小于等于N的整数，所述第二报文中包括第二标签；根据所述第二标签获取所述第一标签，将所述第二报文中的所述第二标签替换为所述第一标签，得到M个所述第一报文。
具体的，获取的M个第二报文可以来自第二节点，并且第二节点也采用图2类似的发送方法，即获取来自第二节点的M个第二报文，所述第二标签用于指示所述第二节点发送所述第二报文的发送周期。此时可以根据所述第二标签和对应所述第二节点的调整值获取所述第一标签。
第二节点在第二标签对应发送周期内发送第二报文，第一节点收到第二报文后，能够根据第二报文中携带的第二标签获知第二节点的发送周期，补充考虑第二节点和第一节点之间的链路时延后，第一节点能够获知在哪个时间点可以接收到第二节点在第二标签对应发送周期内发送的所有报文，从而第一节点有能力控制第一报文的排队时延，例如可以能够尽快将第二节点在第二标签对应发送周期内发送的所有报文转发出去，优选的，也在第一节点的同一个发送周期内发送出去，以进一步保证报文的时延，即将第二报文中携带的第二标签替换为第一标签，并在第一标签对应的发送周期内发送出去。
此外，步骤S201中获取的第一报文中还可以包括来自第三节点的报文，在一种可能的设计中，步骤S201还包括：获取来自第三节点的L个第三报文，L为大于等于1但小于等于N的整数，所述第三报文包括第三标签，所述第三标签用于指示所述第三节点发送所述第三报文的发送周期；根据所述第三标签和对应所述第三节点的调整值获取所述第一标签，将所述第三报文中的所述第三标签替换为所述第一标签，得到L个所述第一报文。第一节点可以为图1A中的节点103，第二节点可以为图1A中的节点102，第三节点可以为图1A中的节点108。
在上述实施例中第二节点向第一节点发送M个第二报文，第二报文中携带第二标签，第二标签用于指示所述第二节点发送所述第二报文的发送周期，第三节点向第一节点发送L个第三报文，第三报文携带第三标签，第三标签用于指示所述第三节点发送所述第三报文的发送周期，第一节点第二报文和第三报文的标签均替换为第一标签，然后在第一标签对应的发送周期发送出去，以下实施例将针对该情况进行举例说明。
如图3A所示，为本发明实施例提供的一种报文传输示意图，第二节点发送报文到第一节点，第二节点和第一节点均执行如图2所示的方法，从图2中可以看出第一节点为什么能够获知在哪个时间点接收到第二节点在第二标签对应发送周期内发送的所有报文，图3A仅为举例说明，并不是对发送周期等的限制。第二节点包括发送周期x和发送周期x+1，第一节点包括发送周期y和发送周期y+1，第二节点和第一节点还可以包括其它发送周期，第二节点在发送周期x的末尾发送了一个报文，经过第二节点和第一节点之间的链路时延p之后，被第一节点接收，考虑到链路时延可能存在抖动，因此可能在经过链路时延p+e之后被第一节点接收。因为所示报文为第二节点在发送周期x的末尾发送，第一节点接收到该报文的时间落在了发送周期y，因此在发送周期y结束时，或者说发送周期y+1开始前，第二节点在发送周期x内发送的所有报文被第一节点接收，在第一节点的下一个发送周期y+1内可以发送出去。
如图3A所示，第一节点接收到发送周期x内发送最后一个报文的时间距离发送周期 y+1开始时间的时间差为τ，那么第一节点的单跳排队时延为T+τ，T为一个发送周期的时长，τ的期望值为0.5T。对于h跳的路径，如果每个节点的发送周期均为T，那么总延时为Σ(T+τ)，期望值为1.5hT(h为跳数)，抖动为常数2T。
第一节点在哪个发送周期开始前能够接收到第二节点在发送周期x内发送的所有报文是可以确定的，例如如图3A所示的实施例，第一节点在发送周期y+1开始前，能够接收到第二节点在发送周期x内发送的所有报文。对于第二节点在发送周期x内发送的所有报文，如果能够在第一节点的同一个发送周期内发送出去，那么该报文的时延和抖动可以得到进一步保障，如果能够在接收到第二节点在发送周期x内发送的所有报文后的下一个发送周期内发送出去，也可以进一步降低报文的时延。第二节点发送的报文可以携带第二标签，第二标签用于指示第二节点发送所述报文的发送周期，例如第二标签的取值为18，用于指示该报文的发送周期为18。第一节点可以通过接收到的报文的标签获知报文在第二节点的发送周期，从而将第二节点在发送周期x内发送的所有报文在第一节点的同一个发送周期内发送出去。
第二节点发送到第一节点的报文中携带标签，如果在发送周期x发出，标签值就等于x；第一节点可以为第二节点维护一个调整值ΔX，通过接收到的报文携带的标签以及对应第二节点的调整值，第一节点可以得到转发该报文时的发送周期和对应的标签，例如第一节点从第二节点收到一个标签为x的报文，将标签替换为x+ΔX，并在发送周期x+ΔX发送出去。
第一节点为第二节点维护一个调整值ΔX，该调整值可以根据第二节点和第一节点之间的光纤长度等计算，也可以通过发送测试报文获得，例如第二节点在发送周期x的末尾发送一个测试报文，携带标签x，第一节点接收到该测试报文时处于发送周期y，则ΔX＝y+1-x；或者第二节点在发送周期x的开始发送一个测试报文，携带标签x，第一节点接收到该测试报文时处于发送周期y，则ΔX＝y+2-x。
第二节点和第一节点的不需要时间同步，为了方便的在大的网络中使用，其中的节点可以时钟同步，即节点的时钟频率都是1/T，T为发送周期，也就是说全网节点使用相同的发送周期，但是不需要时间同步，发送周期的起始时间不需要对齐。在一些实施例中，第二节点不需要每个周期都有报文发送，可以间隔一个发送周期进行报文的发送。在一些实施例中，第二节点和第一节点的的发送周期也可以不相同。
第一标签x+ΔX、第二标签x以及对应第二节点的调整值ΔX可以是具体的周期值，也可以是能够隐含表示周期的取值。例如第二标签的值为18，对应第二节点的调整值为71，进而获得第一标签的值为89，然后将接收到的第二报文中的第二标签的值18替换为第一标签的值89。如果第一节点和第二节点均包括循环使用三个队列，则将具体的周期值对3进行取余，例如第二标签的值为0(18对3取余为0)，对应第二节点的调整值为2(71对3取余为2)，进而获得第一标签的值为2(89对3取余为0)，将接收到的第二报文中的第二标签的值0替换为第一标签的值2。当然，如果第一节点和第二节点使用的队列个数是其它值，也可以将具体的周期值对其它值进行取余，例如可以是四个队列，将具体的周期值对4进行取余。使用隐含表示周期的取值可以减少第一标签和第二标签占用报文的带宽，可以仅使用两个比特来表示第一标签或第二标签，取值可以为00,01,10和11中的一个。
如图3A所示，第二节点在发送周期x的末尾发送报文，第一节点接收到该报文的时间落在了发送周期y，链路时延可能存在抖动，第二节点到第一节点的实线箭头表征抖动的 左界，表明该报文可能到达第一节点的最早时间，第二节点到第一节点的虚线箭头表征抖动的右界，表明该报文可能到达第一节点的最晚时间。图3A中抖动的左界和右界均在第一节点的发送周期y内，这也就意味着第一节点在发送周期y内，第一节点将会接收第二节点在发送周期x发送的部分报文和第二节点在发送周期x+1发送的部分报文，因此第一节点在发送周期y内，需要维护两个接收队列，分别对应第二节点在发送周期x发送的报文和第二节点在发送周期x+1发送的报文。一个接收队列对应一个发送周期，例如第二节点在发送周期x发送的报文对应的接收队列和发送周期y+1对应，即在发送周期y+1，该接收队列转变为发送队列进行发送，这种情况下第一节点仅需要维护循环使用的三个队列即可。当然，第二节点在发送周期x发送的报文对应的接收队列也可以和发送周期y+2等对应，即在发送周期y+2，该接收队列才转变为发送队列进行发送，在发送周期y+1，该接收队列依旧为等待发送的队列。
如果抖动的左界和右界分别在相邻的两个周期内，例如左界在第一节点的发送周期y内，右界在第一节点的发送周期y+1内，那么在第一节点在发送周期y+1内，第一节点将会可能接收第二节点在发送周期x发送的部分报文、第二节点在发送周期x+1发送的部分报文以及第二节点在发送周期x+2发送的部分报文，因此第一节点在发送周期y+1内，需要维护三个接收队列。如果抖动的左界和右界横跨多个周期，那么需要的接收队列数将会相应增加，在此不再赘述。
如图3B所示，为本发明实施例提供的另一种报文传输示意图。在图3B的右上部包括三个节点，分别为第二节点,第一节点和第三节点，其中第二节点和第三节点均向第一节点发送报文，第一节点将接收到的报文转发出去，报文的传输方向如图中的带箭头虚线所示。在图3B的左边，第一节点包括发送周期88,89和90，在发送周期88结束时，第三节点在发送周期35发送的所有报文和第二节点在发送周期18发送的所有报文将被接收；在发送周期89内，第三节点在发送周期36发送的部分报文和发送周期37发送的部分报文将被接收，第二节点在发送周期19发送的部分报文和发送周期20发送的部分报文将被接收；在发送周期89结束时，第三节点在发送周期36发送的所有报文和第二节点在发送周期19发送的所有报文将被接收。图3B的右下部为第一节点在发送周期89期间的三个队列，分别为Q2：发送队列，包括第三节点在发送周期35发送的所有报文和第二节点在发送周期18发送的所有报文；Q0：接收队列，包括第三节点在发送周期36发送的所有报文和第二节点在发送周期19发送的所有报文；Q1：接收队列，包括第三节点在发送周期37发送的所有报文和第二节点在发送周期20发送的所有报文。在发送周期90期间，Q2中的报文已经被发送出去，Q2变为接收队列，用于接收第三节点在发送周期38发送的所有报文和第二节点在发送周期21发送的所有报文，Q0变为发送队列。需要说明的是，上面提到的“所有报文”指的是能够接收到报文，对于没有接收到的或者丢弃的报文，可能需要重传，重传的报文会根据新的发送周期携带新的周期标签。
如果图2所示的方法的执行主体为源节点，或者来自上游节点的报文中没有携带周期标签，第一节点可以生成第一标签，在一种可能的实施例中，确定第四报文的发送周期，如果所述第四报文的发送周期为所述第一标签对应的发送周期，则在所述第四报文中添加所述第一标签，得到所述第一报文。第一节点接收报文或者本地生成报文，然后对这些报文进行调度发送，获取这些报文的发送周期，根据获取的发送周期在这些报文中添加第一标签，这些报文中可能没有第一标签对应的字段，添加第一标签时需要在报文中增加相应的字段，这些报文中也可能有第一标签对应的字段，但是对应的字段为无效值， 添加第一标签是仅需要将对应的值替换为第一标签的值即可。
第一节点对报文进行调度，获取报文的发送周期，可以采用漏桶算法，漏桶算法是网络中流量整形(Traffic Shaping)或速率限制(Rate Limiting)时经常使用的一种算法，它的主要目的是控制数据注入到网络的速率，平滑网络上的突发流量。漏桶算法提供了一种机制，通过它，突发流量可以被整形以便为网络提供一个稳定的流量。漏桶可以看作是一个带有常量服务时间的单服务器队列，如果漏桶(包缓存)溢出，那么数据包会被丢弃。
在如图1B所示的网络中，如果入口边缘节点111对接收的来自主机设备110的报文进行整形，确定报文的发送周期，并在报文中添加发送周期对应的周期标签，核心节点112,113对接收到报文进行标签替换，并在新确定的发送周期中发送出去，那么报文在入口边缘节点111和出口边缘节点115之间的时延和抖动将得到保障。边缘节点进行流量整形，一个周期内发送的流量总带宽可以不超过分配的阈值，核心节点按照周期标签进行调度，核心节点接收到来自多个边缘节点的流量时，也能够在对应周期内转发报文，因为边缘节点进行了流量整形，每个报文都有确定的调度周期，只占用本流在该周期的预留资源，并不会偏移到其他周期占用其他流的预留资源。
为了实现全网的端到端时延，在这里设计了一种模型，该模型仅为举例使用，假设一条数据流的路径确定，路径上各节点在对应接口上为该数据流预留带宽ri，该数据流的流量模型为Ai(t)＝rit+riT，其中Ai(t)为周期t内数据流i的总流量带宽，rit为周期t内数据流i的平均带宽，riT为周期t内数据流i的突发流量。边缘节点进行流量整形，每个周期内发送的数据量不超过TΣri。
在如图1B所示的网络中，报文经过入口边缘节点111、核心节点112、核心节点113、核心节点114和出口边缘节点115，每个节点的发送周期均为T。报文在边缘节点按周期做整形；报文携带周期标签，在核心节点做标签交换，每一跳将周期标签根据标签交换表替换为本跳周期标签；报文在路径每一跳根据标签和标签交换表计算出要进入的周期调度队列；按周期进行调度。进行队列调度时，每节点只需要3个队列，每周期开始时，打开1个调度发送，另外2个接收，进行周期性轮转调度。核心节点没有逐流状态，只做聚合流调度，适合大规模网络(流的数量巨大)支持长链路、长距离网络。端到端存在确定性时延和抖动，其中端到端排队延时Σ(T+τ)，期望值为1.5Th，端到端延时抖动小于等于2T(即±T)，与跳数无关，此外无需全网节点的周期起始时间对齐，边缘节点的整形与核心节点的调度都非常简单，只需三个队列进行周期性调度，每个队列的缓存需求小。
周期标签在报文中的位置可以有很多种方式，下面针对集中典型的情况进行说明。
一、周期标签位于三层数据包的基本头
A、如图4A所示，为本发明实施例提供的一种互联网协议第六版(Internet Protocol Version 6，IPv6)基本头，包括版本(Version)、流量等级(Traffic Class)、流标签(Flow Label)、载荷长度(Payload Length)、下一报头(Next Header)、跳数限制(Hop Limit)、源地址(Source Address)和目的地址(Destination Address)，周期标签可以由流量等级字段携带。
B、如图4B所示，为本发明实施例提供的一种互联网协议第四版(Internet Protocol Version 4，IPv4)基本头，包括版本(Version)、头长(IP Header Length,IHL)、服务类型(Type of Service)、整个数据包的长度(Total Length)、数据包标识 (Identification)、分片(Flags)、分片的位移(Fragment Offset)、生存时间(Time to Live,TTL)、上层协议号(Protocol)、头部校验和(Header Checksum)、源地址(Source Address)、目的地址(Destination Address)、可选项(Options)以及补齐(padding)，周期标签可以由服务类型字段携带，差分服务代码点(Differentiated Services Code Point，DSCP)是一种服务质量(Quality of Service，Qos)的分类标准，DSCP通常使用服务类型字段的6个比特，服务类型字段还包括未使用的2个比特，这两个比特可以用来携带周期标签，周期标签也可以由DSCP来携带。
二、周期标签位于三层数据包的扩展头
C、如图4C所示，为本发明实施例提供的一种IPv6逐跳包头，包括下层包头(Next Header)、扩展头长度(Header Extension Length，Hdr Ext len)和选项(Options)字段，周期标签可以由选项字段(Options)携带，例如可以由选项字段的一个TLV携带。
D、如图4D所示，为本发明实施例提供的一种IPv6路由扩展头(Routing Header)，包括下层包头、扩展头长度、类型(Routing Type)、剩余跳数(Segment left)、类型详细数据(Type-specific data)，周期标签可以由类型详细数据中的保留字段(reserve)携带，类型字段设置为一个标准定义的新值。
E、如图4E所示，为本发明实施例提供的一种IPv6分段路由(Segment Routing，SR)扩展头，包括下层包头，扩展头长度、类型(Routing Type)、剩余跳数(Segment left)、分段列表的最后元素(Last Entry)、标志(Flag)、分组标记(TAG)、至少一个分段地址和可选项TLV(Optional Type Length Value objects)，周期标签可以由可选项TLV字段携带，为了能够解析到该可选项TLV，可以在IPv6的基本头中的目的地址的后缀增加每跳解析TLV的语义以获取和替换周期标签。
三、周期标签位于二层数据包
如图4F所示，为本本发明实施例提供的一种二层以太帧，包括前导码、帧开始符、MAC目标地址、MAC源地址、802.1Q标签(可选)、以太类型(Ether Type)、负载(Payload)、冗余校验(CRC)，周期标签可以由以太类型(Ether Type)字段携带，也可以由802.1Q标签字段携带。
四、周期标签位于MPLS头域
G、如图4G所示，为本发明实施例提供的一种多协议标签交换(Multiprotocol Label Switching MPLS)头域，包括路由标签(Label)、优先级(Exp)、栈底(S)和生存周期，周期标签可以由优先级字段携带。
此外，对于MPLS SR场景，可能存在多层MPLS路由标签，路径每一跳设备需要从弹出的上层路由标签中获取第二标签，计算得到第一标签后写入下层路由标签，完成周期标签交换。标签存放位置可以如同图4G所示，也可以由优先级字段携带。
本发明实施例中，将所述第二报文中的所述第二标签替换为所述第一标签，这里的替换也可以叫做swap，交换，改写等，可以是直接将第二报文中携带第二标签的字段的值更改为第一标签的值；或者是将第二报文中携带第二标签的字段弹出，然后将包括第一标签的字段压入得到第一报文；也可以是将第二报文中携带第二标签的字段弹出，然后将第二报文的其它字段的值修改为第一标签的值等等，替换的方式可以有很多。此外除了将第二报文中的所述第二标签替换为所述第一标签，还可以对第二报文的其它字段进行操作，例如对跳数限制字段进行修改，对生存时间进行修改等，在此不做限制。
图5为本发明实施例提供的一种报文处理装置，该报文处理装置通过软件、硬件或者 两者的结合实现上述第一节点的部分或者全部功能。该报文处理装置可以为第一节点，也可以为应用于第一节点的芯片。如图5所示，该报文处理装置包括处理模块501和发送模块502，其中，
处理模块501，用于获取N个第一报文，N为大于等于1的整数，所述第一报文中包括第一标签；
发送模块502，用于在所述第一标签对应的发送周期内发送所述N个第一报文。
在一种可能的设计中，所述处理模块用于获取M个第二报文，M为大于等于1但小于等于N的整数，所述第二报文中包括第二标签，根据所述第二标签获取所述第一标签，将所述第二报文中的所述第二标签替换为所述第一标签，得到M个所述第一报文。
在一种可能的设计中，还包括接收模块，处理器通过接收模块获取所述第二报文。
在一种可能的设计中，所述处理模块用于获取来自第二节点的M个第二报文，所述第二标签用于指示所述第二节点发送所述第二报文的发送周期。
在一种可能的设计中，所述处理模块用于根据所述第二标签和对应所述第二节点的调整值获取所述第一标签。
在一种可能的设计中，所述处理模块还用于获取来自第三节点的L个第三报文，L为大于等于1但小于等于N的整数，所述第三报文包括第三标签，所述第三标签用于指示所述第三节点发送所述第三报文的发送周期，根据所述第三标签和对应所述第三节点的调整值获取所述第一标签，将所述第三报文中的所述第三标签替换为所述第一标签，得到L个所述第一报文。
在一种可能的设计中，所述处理模块用于确定第四报文的发送周期，如果所述第四报文的发送周期为所述第一标签对应的发送周期，则在所述第四报文中添加所述第一标签，得到所述第一报文。
在一种可能的设计中，不同的第一标签对应不同的发送周期。
在一种可能的设计中，所述第一报文为二层数据帧，所述第一标签位于所述二层数据帧的帧头部分。
在一种可能的设计中，所述第一报文为三层数据包，所述第一标签位于所述三层数据包的基本头和扩展头中的至少一个。
在一种可能的设计中，所述第一标签包括两个比特，取值为00,01,10和11中的一个。
在一种可能的设计中，一个发送周期对应一个发送队列，所述第一节点包括周期性使用的三个发送队列。
在一种可能的设计中，所述第一标签对应的发送周期为接收到所有第二报文后的下一个发送周期。
上述装置用于执行前述方法实施例，其实现原理和技术效果类似，在此不再赘述。此外，上述实施例中的发送模块可以为发送机，接收模块可以为接收机，处理模块可以为处理器，在此不再赘述。
需要说明的是，应理解以上设备的各个模块的划分仅仅是一种逻辑功能的划分，实际实现时可以全部或部分集成到一个物理实体上，也可以物理上分开。且这些模块可以全部以软件通过处理元件调用的形式实现；也可以全部以硬件的形式实现；还可以部分模块通过处理元件调用软件的形式实现，部分模块通过硬件的形式实现。例如，发送模块可以为单独设立的元件，也可以集成在上述设备的某一个芯片中实现，此外，也可以以程序代码的形式存储于上述设备的存储器中，由上述设备的某一个处理元件调用并执 行以上确定模块的功能。其它模块的实现与之类似。此外这些模块全部或部分可以集成在一起，也可以独立实现。这里所述的处理元件可以是一种集成电路，具有信号的处理能力。此外，应理解以上发送模块实际实现时可以为发送器，接收模块实际实现时可以为接收器，而处理模块可以以软件通过处理元件调用的形式实现；也可以以硬件的形式实现。在实现过程中，上述方法的各步骤或以上各个模块可以通过处理器元件中的硬件的集成逻辑电路或者软件形式的指令完成。
例如，以上这些模块可以是被配置成实施以上方法的一个或多个集成电路，例如：一个或多个特定集成电路(Application Specific Integrated Circuit，ASIC)，或，一个或多个微处理器(Digital Signal Processor，DSP)，或，一个或者多个现场可编程门阵列(Field Programmable Gate Array，FPGA)等。再如，当以上某个模块通过处理元件调度程序代码的形式实现时，该处理元件可以是通用处理器，例如中央处理器(Central Processing Unit，CPU)或其它可以调用程序代码的处理器。再如，这些模块可以集成在一起，以片上系统(system-on-a-chip，SOC)的形式实现。
应理解，本文中涉及的第一、第二、第三、第四以及各种数字编号仅为描述方便进行的区分，并不用来限制本发明实施例的范围。
图6为本发明实施例提供的比特块处理装置的结构示意图，该装置可以是图1中的节点101,102,103,104,105或106。如图6所示，该装置包括：存储器602和处理器601。
存储器602可以是独立的物理单元，与处理器601可以通过总线连接。存储器602、处理器601也可以集成在一起，通过硬件实现等。
存储器602用于存储实现以上方法实施例，或者图5所示实施例各个模块的程序，处理器601调用该程序，执行以上方法实施例的操作。
可选地，当上述实施例的业务数据传输方法中的部分或全部通过软件实现时，上述装置也可以只包括处理器。用于存储程序的存储器位于接入设备之外，处理器通过电路/电线与存储器连接，用于读取并执行存储器中存储的程序。
处理器可以是中央处理器(Central Processing Unit，CPU)，网络处理器(Network Processor，NP)或者CPU和NP的组合。
处理器还可以进一步包括硬件芯片。上述硬件芯片可以是专用集成电路(Application-specific Integrated Circuit，ASIC)，可编程逻辑器件(Programmable Logic Device，PLD)或其组合。上述PLD可以是复杂可编程逻辑器件(Complex Programmable Logic Device，CPLD)，现场可编程逻辑门阵列(Field-programmable Gate Array，FPGA)，通用阵列逻辑(Generic Array Logic，GAL)或其任意组合。
存储器可以包括易失性存储器(volatile memory)，例如随机存取存储器(Random-Access Memory，RAM)；存储器也可以包括非易失性存储器(non-volatile memory)，例如快闪存储器(flash memory)，硬盘(Hard Disk Drive，HDD)或固态硬盘(Solid-State Drive，SSD)；存储器还可以包括上述种类的存储器的组合。
本发明实施例还提供了一种计算机存储介质，存储有计算机程序，该计算机程序用于执行上述实施例提供的业务数据传输方法。
本发明实施例还提供了一种包含指令的计算机程序产品，当其在计算机上运行时，使得计算机执行上述实施例提供的业务数据传输方法。
本领域内的技术人员应明白，本发明的实施例可提供为方法、系统、或计算机程序产品。因此，本发明可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面 的实施例的形式。而且，本发明可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本发明是参照根据本发明实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。

Claims (24)

  1. 一种报文处理方法，应用于第一节点，其特征在于，包括：
    获取N个第一报文，N为大于等于1的整数，所述第一报文中包括第一标签；
    在所述第一标签对应的发送周期内发送所述N个第一报文。
  2. 根据权利要求1所述的方法，所述获取N个第一报文包括：
    获取M个第二报文，M为大于等于1但小于等于N的整数，所述第二报文中包括第二标签；
    根据所述第二标签获取所述第一标签，将所述第二报文中的所述第二标签替换为所述第一标签，得到M个所述第一报文。
  3. 根据权利要求2所述的方法，所述获取M个第二报文包括：
    获取来自第二节点的M个第二报文，所述第二标签用于指示所述第二节点发送所述第二报文的发送周期。
  4. 根据权利要求3所述的方法，根据所述第二标签获取所述第一标签包括：
    根据所述第二标签和对应所述第二节点的调整值获取所述第一标签。
  5. 根据权利要求4所述的方法，所述获取N个第一报文还包括：
    获取来自第三节点的L个第三报文，L为大于等于1但小于等于N的整数，所述第三报文包括第三标签，所述第三标签用于指示所述第三节点发送所述第三报文的发送周期；
    根据所述第三标签和对应所述第三节点的调整值获取所述第一标签，将所述第三报文中的所述第三标签替换为所述第一标签，得到L个所述第一报文。
  6. 根据权利要求1至5中任一项所述的方法，所述获取N个第一报文包括：
    确定第四报文的发送周期，如果所述第四报文的发送周期为所述第一标签对应的发送周期，则在所述第四报文中添加所述第一标签，得到所述第一报文。
  7. 根据权利要求1所述的方法，不同的第一标签对应不同的发送周期。
  8. 根据权利要求1所述的方法，所述第一报文为二层数据帧，所述第一标签位于所述二层数据帧的帧头部分。
  9. 根据权利要求1所述的方法，所述第一报文为三层数据包，所述第一标签位于所述三层数据包的基本头和扩展头中的至少一个。
  10. 根据权利要求1所述的方法，所述第一标签包括两个比特，取值为00,01,10和11中的一个。
  11. 根据权利要求1所述的方法，一个发送周期对应一个发送队列，所述第一节点包括周期性使用的三个发送队列。
  12. 根据权利要求2所述的方法，所述第一标签对应的发送周期为接收到所有第二报文后的下一个发送周期。
  13. 一种报文处理装置，其特征在于，包括：
    处理模块，用于获取N个第一报文，N为大于等于1的整数，所述第一报文中包括第一标签；
    发送模块，用于在所述第一标签对应的发送周期内发送所述N个第一报文。
  14. 根据权利要求13所述的装置，所述处理模块用于获取M个第二报文，M为大于等于1但小于等于N的整数，所述第二报文中包括第二标签，根据所述第二标签获取所述第一标签，将所述第二报文中的所述第二标签替换为所述第一标签，得到M个所述第一报文。
  15. 根据权利要求14所述的装置，所述处理模块用于获取来自第二节点的M个第二报文，所述第二标签用于指示所述第二节点发送所述第二报文的发送周期。
  16. 根据权利要求15所述的装置，所述处理模块用于根据所述第二标签和对应所述第二节点的调整值获取所述第一标签。
  17. 根据权利要求16所述的装置，所述处理模块还用于获取来自第三节点的L个第三报文，L为大于等于1但小于等于N的整数，所述第三报文包括第三标签，所述第三标签用于指示所述第三节点发送所述第三报文的发送周期，根据所述第三标签和对应所述第三节点的调整值获取所述第一标签，将所述第三报文中的所述第三标签替换为所述第一标签，得到L个所述第一报文。
  18. 根据权利要求13至17中任一项所述的装置，所述处理模块用于确定第四报文的发送周期，如果所述第四报文的发送周期为所述第一标签对应的发送周期，则在所述第四报文中添加所述第一标签，得到所述第一报文。
  19. 根据权利要求13所述的装置，不同的第一标签对应不同的发送周期。
  20. 根据权利要求13所述的装置，所述第一报文为二层数据帧，所述第一标签位于所述二层数据帧的帧头部分。
  21. 根据权利要求13所述的装置，所述第一报文为三层数据包，所述第一标签位于所述三层数据包的基本头和扩展头中的至少一个。
  22. 根据权利要求13所述的装置，所述第一标签包括两个比特，取值为00,01,10和11中的一个。
  23. 根据权利要求13所述的装置，一个发送周期对应一个发送队列，所述第一节点包括周期性使用的三个发送队列。
  24. 根据权利要求14所述的装置，所述第一标签对应的发送周期为接收到所有第二报文后的下一个发送周期。
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KR102247446B1 (ko) * 2019-12-26 2021-05-03 상명대학교 산학협력단 통합 플로우와 인터리브드 레귤레이터 기반 네트워크 지연시간 보장 시스템
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CN112787953B (zh) * 2020-06-03 2022-09-02 中兴通讯股份有限公司 确定性业务流传送方法和装置、电子设备、存储介质
CN114500163A (zh) * 2020-10-23 2022-05-13 中国移动通信有限公司研究院 一种通信调度方法、装置和存储介质
CN114679418A (zh) * 2020-12-24 2022-06-28 中兴通讯股份有限公司 数据传输方法、电子设备和存储介质
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CN115348216A (zh) * 2021-05-14 2022-11-15 华为技术有限公司 报文转发的方法和相关装置
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090073977A1 (en) * 2002-06-04 2009-03-19 Fortinet, Inc. Routing traffic through a virtual router-based network switch
CN104917641A (zh) * 2014-03-11 2015-09-16 中国电信股份有限公司 一种用于测试丢包的方法、测试设备和系统
CN105281969A (zh) * 2014-07-04 2016-01-27 华为技术有限公司 一种统计信息获取方法及装置
WO2016049872A1 (zh) * 2014-09-30 2016-04-07 华为技术有限公司 一种网络丢包的测量装置及方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101237386A (zh) * 2007-02-02 2008-08-06 北京三星通信技术研究有限公司 在以太网网络中进行流调度的方法
CN100596363C (zh) * 2007-05-31 2010-03-31 北京泛亚创知科技发展有限公司 一种信标无线个域网中中心节点与设备节点间的测距方法
US8493984B2 (en) * 2008-06-13 2013-07-23 Cisco Technology, Inc. System and method for establishment of a multiprotocol label switching (MPLS) tunnel
CN101931884B (zh) * 2009-06-23 2016-05-18 北京三星通信技术研究有限公司 一种数据同步方法和系统
US8923293B2 (en) * 2009-10-21 2014-12-30 Palo Alto Research Center Incorporated Adaptive multi-interface use for content networking
CN102014431B (zh) * 2010-11-08 2013-09-11 华为技术有限公司 防抖动的数据传输方法、设备及系统
CN102904775B (zh) * 2012-09-29 2015-04-29 华为技术有限公司 网络丢包测量方法、设备和系统
US9374309B2 (en) * 2013-04-16 2016-06-21 Facebook, Inc. Server controlled routing system
US9456378B2 (en) * 2013-09-25 2016-09-27 Intel Corporation End-to-end (E2E) tunneling for multi-radio access technology (multi-rat)
CN103929263B (zh) * 2014-04-30 2016-10-26 北京华力创通科技股份有限公司 网络通信方法
US9716664B2 (en) * 2014-12-03 2017-07-25 Cisco Technology, Inc. Tracking queuing delay and performing related congestion control in information centric networking
US9838311B2 (en) * 2015-01-30 2017-12-05 Huawei Technologies Co., Ltd. Node, network controller, and associated methods for routing data packets in a network
WO2016128931A1 (en) * 2015-02-11 2016-08-18 Telefonaktiebolaget Lm Ericsson (Publ) Ethernet congestion control and prevention
US10063374B2 (en) * 2015-05-31 2018-08-28 Massachusetts Institute Of Technology System and method for continuous authentication in internet of things
US10749995B2 (en) * 2016-10-07 2020-08-18 Cisco Technology, Inc. System and method to facilitate integration of information-centric networking into internet protocol networks
US10764188B2 (en) * 2017-02-22 2020-09-01 Cisco Technology, Inc. System and method to facilitate robust traffic load balancing and remote adaptive active queue management in an information-centric networking environment
WO2018195728A1 (zh) * 2017-04-24 2018-11-01 华为技术有限公司 一种客户业务传输方法和装置
US20180367452A1 (en) * 2017-06-19 2018-12-20 Futurewei Technologies, Inc. Information centric networking over multi-access network interfaces
US20190158370A1 (en) * 2017-11-17 2019-05-23 Electronics And Telecommunications Research Institute Computing system and method for intelligent ioe information framework
US10873533B1 (en) * 2019-09-04 2020-12-22 Cisco Technology, Inc. Traffic class-specific congestion signatures for improving traffic shaping and other network operations

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090073977A1 (en) * 2002-06-04 2009-03-19 Fortinet, Inc. Routing traffic through a virtual router-based network switch
CN104917641A (zh) * 2014-03-11 2015-09-16 中国电信股份有限公司 一种用于测试丢包的方法、测试设备和系统
CN105281969A (zh) * 2014-07-04 2016-01-27 华为技术有限公司 一种统计信息获取方法及装置
WO2016049872A1 (zh) * 2014-09-30 2016-04-07 华为技术有限公司 一种网络丢包的测量装置及方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3817307A4 *

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