WO2019225418A1 - Dc voltage conversion circuit and power supply system - Google Patents

Dc voltage conversion circuit and power supply system Download PDF

Info

Publication number
WO2019225418A1
WO2019225418A1 PCT/JP2019/019237 JP2019019237W WO2019225418A1 WO 2019225418 A1 WO2019225418 A1 WO 2019225418A1 JP 2019019237 W JP2019019237 W JP 2019019237W WO 2019225418 A1 WO2019225418 A1 WO 2019225418A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
field effect
effect transistor
node
circuit
Prior art date
Application number
PCT/JP2019/019237
Other languages
French (fr)
Japanese (ja)
Inventor
大之 山下
正和 杉山
克彦 津野
佳代 小池
藤井 克司
和田 智之
Original Assignee
国立研究開発法人理化学研究所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 国立研究開発法人理化学研究所 filed Critical 国立研究開発法人理化学研究所
Publication of WO2019225418A1 publication Critical patent/WO2019225418A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00Circuit arrangements for dc mains or dc distribution networks
    • H02J1/001Hot plugging or unplugging of load or power modules to or from power distribution networks
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60LPROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L50/00Electric propulsion with power supplied within the vehicle
    • B60L50/50Electric propulsion with power supplied within the vehicle using propulsion power supplied by batteries or fuel cells
    • B60L50/70Electric propulsion with power supplied within the vehicle using propulsion power supplied by batteries or fuel cells using power supplied by fuel cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M8/00Fuel cells; Manufacture thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M8/00Fuel cells; Manufacture thereof
    • H01M8/04Auxiliary arrangements, e.g. for control of pressure or for circulation of fluids
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M8/00Fuel cells; Manufacture thereof
    • H01M8/04Auxiliary arrangements, e.g. for control of pressure or for circulation of fluids
    • H01M8/04298Processes for controlling fuel cells or fuel cell systems
    • H01M8/04694Processes for controlling fuel cells or fuel cell systems characterised by variables to be controlled
    • H01M8/04858Electric variables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M8/00Fuel cells; Manufacture thereof
    • H01M8/06Combination of fuel cells with means for production of reactants or for treatment of residues
    • H01M8/0606Combination of fuel cells with means for production of reactants or for treatment of residues with means for production of gaseous reactants
    • H01M8/0656Combination of fuel cells with means for production of reactants or for treatment of residues with means for production of gaseous reactants by electrochemical means
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/30Hydrogen technology
    • Y02E60/50Fuel cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02TCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T90/00Enabling technologies or technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02T90/40Application of hydrogen technology to transportation, e.g. using fuel cells

Definitions

  • the present invention relates to a DC voltage conversion circuit and a power supply system.
  • a DC / DC converter that converts a direct current (DC) voltage into a voltage is mounted on various devices.
  • a DC / DC converter is mounted on a power generation device that generates power using a solar cell, a power generation device that generates power using wind power, a power generation device that generates power using a fuel cell, a hybrid vehicle, or the like.
  • Patent Document 1 discloses a DC / DC converter that generates a desired DC voltage from a plurality of DC voltages using an FCBB (forward-conducting-bidirectional-blocking) switch.
  • Patent Document 2 discloses a DC / DC converter that generates a desired DC voltage from a plurality of DC voltages using a bidirectional switch.
  • the present invention has been made in view of such circumstances, and an object thereof is to provide a DC voltage conversion circuit capable of converting a DC voltage with a simple configuration and control, and a power supply system. .
  • the DC voltage conversion apparatus includes a DC voltage selection circuit that electrically connects a plurality of voltage input units to which a plurality of different DC voltages are supplied to the merging node in a time division manner; An inductor connected between the junction node and the voltage output unit; a reference node to which a reference voltage is supplied; and a rectifier circuit connected between the junction node.
  • the DC voltage selection circuit includes a plurality of switch circuits connected between each of the plurality of voltage input units and the junction node, At least one of the plurality of switch circuits is connected between the switch element connected between the voltage input unit and the first node, and between the first node and the junction node, and from the junction node to the And a reverse current prevention element for preventing generation of a reverse current toward the first node.
  • At least one of the plurality of switch circuits is a first in which a drain is connected to the voltage input unit and a source is connected to the first node. And a second field effect transistor having a source connected to the first node and a drain connected to the junction node, the second field effect transistor formed between the source and the drain. Body diode.
  • each of the plurality of switch circuits includes the first field effect transistor and the second field effect transistor, and the switch circuit includes the first field effect transistor and the first field effect transistor.
  • a control circuit that performs switch control of the plurality of switch circuits by controlling a pulse width of a gate signal of the field effect transistor and a gate signal of the second field effect transistor;
  • a fifth aspect is the boost diode according to any one of the first to third aspects, wherein an anode is connected to the output side terminal of the inductor, and a cathode is connected to the voltage output unit. And a step-up switch circuit connected between the output side terminal and the reference node.
  • the step-up switch circuit includes a field effect transistor having a source connected to the reference node and a drain connected to the output side terminal.
  • a seventh aspect is based on a control signal having a duty ratio corresponding to a boost ratio while performing switch control of the plurality of switch circuits by pulse width control in the fifth aspect or the sixth aspect. And a control circuit for performing switch control of the boosting switch circuit.
  • the rectifier circuit in any one of the first to seventh aspects, includes a diode having an anode connected to the reference node and a cathode connected to the junction node. .
  • the power supply system includes a voltage conversion circuit that converts the first DC voltage output from the first power generation device into a predetermined voltage, the first DC voltage, and the second power generation device.
  • a DC voltage conversion circuit according to any one of the first to eighth aspects for supplying a direct current voltage generated based on the second direct current voltage output from a load to a load, wherein the second power generator comprises: The second DC voltage is generated by an electrochemical reaction using a chemical substance generated by electrolysis by an electrolyzer that receives electrical energy from the voltage conversion circuit.
  • a tenth aspect includes, in the ninth aspect, at least one of the first power generation device, the second power generation device, and the electrolysis device.
  • the first power generation device includes a photovoltaic cell
  • the second power generation device includes a fuel cell
  • the electrolysis device includes: In the water electrolysis apparatus, the chemical substance is hydrogen.
  • the DC voltage conversion circuit according to the embodiment can generate a composite voltage based on a plurality of different DC voltages, and can output a desired voltage by stepping down or boosting the generated composite voltage.
  • the power supply system according to the embodiment includes the DC voltage conversion circuit according to the embodiment, can generate a desired voltage based on voltages supplied from a plurality of power generators, and can supply the generated voltage to a load It is.
  • FIG. 1 is a schematic diagram illustrating an example of a basic configuration of a DC / DC converter according to an embodiment.
  • the DC / DC converter 1 includes a plurality of voltage input terminals TM0 to TMN (N is an integer of 2 or more), a voltage output terminal TMout, capacitors C1 to CN and Cout, a DC voltage selection circuit 10, and a rectifier circuit 20. Inductor 30 and control circuit 100 are included.
  • the DC / DC converter 1 is supplied with a plurality of different DC voltages from a plurality of DC power sources.
  • the plurality of DC power supplies have different current-voltage characteristics.
  • a DC voltage V1 from a first DC power supply (not shown) is supplied to the voltage input terminal TM1.
  • the voltage input terminal TM2 is supplied with a DC voltage V2 from a second DC power supply having a current voltage characteristic different from that of the first DC power supply.
  • the voltage input terminal TMN is supplied with a DC voltage VN from an Nth DC power supply having current-voltage characteristics different from those of the first DC power supply to the (N ⁇ 1) th DC power supply.
  • the ground voltage GND as the reference voltage Vref is supplied to the voltage input terminal TM0.
  • the DC / DC converter 1 steps down the combined voltage generated by outputting the plurality of DC voltages V1 to VN supplied to the plurality of voltage input terminals TM1 to TMN to the junction node NDM in a time division manner.
  • a load (not shown) is connected to the voltage output terminal TMout.
  • the output voltage Vout generated by stepping down the combined voltage of the plurality of DC voltages V1 to VN is supplied to the load via the voltage output terminal TMout.
  • Capacitors C1 to CN are capacitive elements for holding input voltages (DC voltages V1 to VN). That is, the capacitors C1 to CN hold the voltages supplied to the voltage input terminals TM1 to TMN, respectively.
  • One electrode of the capacitor C1 is electrically connected to the voltage input terminal TM1
  • the other electrode of the capacitor C1 is electrically connected to the voltage input terminal TM0 (reference node NDref).
  • One electrode of the capacitor C2 is electrically connected to the voltage input terminal TM2, and the other electrode of the capacitor C2 is electrically connected to the voltage input terminal TM0.
  • one electrode of capacitor CN is electrically connected to voltage input terminal TMN, and the other electrode of capacitor CN is electrically connected to voltage input terminal TM0.
  • the capacitor Cout is a capacitive element for holding the output voltage. That is, the capacitor Cout holds the output voltage Vout of the voltage output terminal TMout.
  • One electrode of the capacitor Cout is electrically connected to the voltage output terminal TMout, and the other electrode of the capacitor Cout is electrically connected to the voltage input terminal TM0.
  • At least one of the capacitors C1 to CN and Cout is provided outside the DC / DC converter 1.
  • the capacitors C1 to CN are provided in the voltage output unit of the corresponding DC power supply.
  • the capacitor Cout is provided in the voltage input unit of the load.
  • the DC voltage selection circuit 10 electrically connects a plurality of voltage input terminals TM1 to TMN supplied with a plurality of DC voltages V1 to VN to the junction node NDM in a time division manner. Thus, a plurality of DC voltages V1 to VN are supplied to the junction node NDM in a time division manner.
  • DC voltage selection circuit 10 electrically connects or disconnects voltage input terminals TM1 to TMN and merging node NDM based on a control signal from control circuit 100.
  • the DC voltage selection circuit 10 includes a plurality of switch circuits provided corresponding to the plurality of voltage input terminals TM1 to TMN, respectively.
  • the plurality of switch circuits are connected between each of the plurality of voltage input terminals TM1 to TMN and the junction node NDM.
  • At least one of the plurality of switch circuits includes a switch element and a reverse current prevention element.
  • each of the plurality of switch circuits includes a switch element and a reverse current prevention element.
  • the switch element is connected between the voltage input terminal and a predetermined first node (see FIG. 2).
  • the switch element is switch-controlled based on a control signal from the control circuit 100.
  • the reverse current prevention element is connected between the first node and the junction node NDM, and prevents the generation of a reverse current from the junction node NDM toward the first node.
  • a rectifier circuit 20 and an inductor 30 are connected to the junction node NDM.
  • the rectifier circuit 20 is connected between the reference node NDref and the junction node NDM.
  • the rectifier circuit 20 passes a current from the reference node NDref to the junction node NDM and cuts off a current from the junction node NDM to the reference node NDref.
  • the rectifier circuit 20 operates as a circuit for reflux during the step-down operation, and also operates as a surge voltage protection circuit at the junction node NDM.
  • the inductor 30 is connected between the junction node NDM and the voltage output terminal TMout.
  • a transformer is provided instead of the inductor 30.
  • the rectifier circuit 20 is connected in parallel to the primary side of the transformer, and the voltage output terminal TMout is connected to the secondary side of the transformer.
  • the control circuit 100 mainly controls the DC voltage selection circuit 10.
  • the control circuit 100 can perform switch control of the switch circuit by outputting a control signal to the switch circuit.
  • the rectifier circuit 20 includes a field effect transistor
  • the control circuit 100 can perform switch control by controlling the gate of the field effect transistor.
  • the control circuit 100 includes a processor.
  • the functions of the processor include, for example, a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), an ASIC (Application Specific Integrated Circuit), and a programmable logic device (for example, SPLD (Simple ProgLD). And a circuit such as an FPGA (Field Programmable Gate Array).
  • the function of the control circuit 100 can be realized, for example, by a processor reading and executing a program stored in a storage circuit or a storage device.
  • the DC voltage selection circuit 10 includes the control circuit 100, and the DC voltage selection circuit 10 realizes the function of the control circuit 100.
  • FIG. 2 shows a first configuration example of the DC / DC converter 1 according to the embodiment.
  • the same parts as those in FIG. 2 are identical parts as those in FIG. 2
  • the DC voltage selection circuit 10 includes switch circuits SW1 and SW2 provided corresponding to the voltage input terminals TM1 and TM2, respectively.
  • the switch circuit SW1 includes a first field effect transistor Tr11 and a second field effect transistor Tr12.
  • Each of the first field effect transistor Tr11 and the second field effect transistor Tr12 is an N-channel type MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
  • the first field effect transistor Tr11 and the second field effect transistor Tr12 are connected so-called back-to-back. That is, the drain of the first field effect transistor Tr11 is electrically connected to the voltage input terminal TM1, and the source is electrically connected to the first node ND1.
  • a body diode is formed between the source and the drain. The anode of the body diode is the source of the field effect transistor, and the cathode is the drain of the field effect transistor.
  • the source of the second field effect transistor Tr12 is electrically connected to the first node ND1, and the drain is electrically connected to the junction node NDM.
  • a body diode is formed between the source and the drain. A body diode formed between the source and drain of the second field effect transistor Tr12 functions as the reverse current prevention element.
  • the gate signal (control signal) G1 from the control circuit 100 is supplied to the gate of the first field effect transistor Tr11 and the gate of the second field effect transistor Tr12.
  • the source and drain of the first field effect transistor Tr11 are in a conducting state, and the source and drain of the second field effect transistor Tr12 are in a conducting state.
  • the current between the voltage input terminal TM1 and the junction node NDM passes between the source and the drain having a lower impedance.
  • the gate signal G1 When the gate signal G1 is an off voltage, the source and drain of the first field effect transistor Tr11 are in a non-conductive state, and the source and drain of the second field effect transistor Tr12 are in a non-conductive state.
  • the DC voltage V1 is higher than the voltage (combined voltage) at the junction node NDM, the current flowing toward the junction node NDM can be blocked by the body diode formed in the first field effect transistor Tr11.
  • the current (reverse current) flowing toward the voltage input terminal TM1 can be blocked by the body diode formed in the second field effect transistor Tr12. In this case, damage due to the reverse current in the DC power supply connected to the voltage flow input terminal TM1 can be avoided.
  • the switch circuit SW2 has the same configuration as the switch circuit SW1. That is, the switch circuit SW2 also includes a first field effect transistor Tr21 and a second field effect transistor Tr22. Each of the first field effect transistor Tr21 and the second field effect transistor Tr22 is an N-channel MOSFET. The first field effect transistor Tr21 and the second field effect transistor Tr22 are connected back to back.
  • the gate signal G2 from the control circuit 100 is supplied to the gate of the first field effect transistor Tr21 and the gate of the second field effect transistor Tr22.
  • the control circuit 100 performs switch control of the switch circuit SW1 by controlling the pulse width of the gate signal G1. Further, the control circuit 100 controls the switch circuit SW2 by controlling the pulse width of the gate signal G2.
  • the rectifier circuit 20 includes a diode 21.
  • the anode of the diode 21 is electrically connected to the reference node NDref, and the cathode is electrically connected to the junction node NDM.
  • FIG. 3 schematically shows an example of the timing of the gate signals G1 and G2.
  • the horizontal axis represents time
  • the vertical axis represents signal level (voltage).
  • the high potential side voltages of the gate signals G1 and G2 are represented as ON voltages
  • the low potential side voltages are represented as OFF voltages.
  • the control circuit 100 outputs, as gate signals G1 and G2, pulse signals having a period T in which the on-voltage periods do not overlap.
  • the high potential side voltage is an on voltage
  • the low potential side voltage is an off voltage.
  • the control circuit 100 provides a dead time Td1 (Td1> 0) between the pulse of the gate signal G1 (pulse width Ton1) and the pulse of the gate signal G2 (pulse width Ton2), and the gate signals G1, G2 Can be output.
  • the control circuit 100 can output the gate signals G1 and G2 by providing a dead time Td2 (Td2> 0) between the pulse of the gate signal G2 and the pulse of the gate signal G1.
  • the dead time Td2 is substantially the same as the dead time Td1.
  • the control circuit 100 includes a control register for setting the waveforms of the gate signals G1, G2. Setting information for setting a waveform for each gate signal is set in the control register by accessing from a processor or the like.
  • the setting information includes, for example, a pulse period, a pulse rising timing based on a reference timing, and a pulse width.
  • the control circuit 100 can output a pulse signal corresponding to such control register setting information as a gate signal.
  • the control register is set to the dead time between the pulses of the gate signals G1, G2. In this case, a dead time set in the control register is provided between the pulse of the gate signal G1 and the pulse of the gate signal G2.
  • the DC voltages V1 and V2 are supplied to the junction node NDM in a time division manner.
  • the inductor 30 stores magnetic energy corresponding to the current.
  • the diode 21 circulates a current from the reference node NDref to the merging node NDM as a freewheeling diode. Further, the diode 21 serves as a surge voltage protection circuit and protects the switch circuits SW1, SW2, and the like against the surge voltage of the junction node NDM during the dead time.
  • the output voltage Vout can be set to a desired voltage by changing the duty ratio of the gate signals G1 and G2.
  • control circuit 100 outputs gate signals G1 and G2 that can change the number of pulses having a predetermined pulse width within a predetermined period. In this case, by changing the number of pulses, the energy supplied from a plurality of DC power supplies can be adjusted, and the output voltage Vout can be set to a desired voltage.
  • FIG. 4 and 5 show an example of an operation simulation of the DC / DC converter 1 according to the first configuration example. 5 differs from FIG. 4 in the dead time between the pulses of the gate signals G1 and G2.
  • the DC voltage V1 is 10 [V]
  • the DC voltage V2 is 5 [V].
  • the current I SW1 flowing through the switch circuit SW1 is represented as I SW2
  • the current flowing through the diode 21 is represented as ID
  • the current flowing through the inductor 30 is represented by I L and represents, represents a synthetic voltage in the combined node NDM and V NDM.
  • the current ISW1 is a current that flows from the source of the first field effect transistor Tr11 to the source of the second field effect transistor Tr12.
  • the current ISW2 is a current that flows from the source of the first field effect transistor Tr21 to the source of the second field effect transistor Tr22.
  • a surge voltage is generated when each of the switch circuits SW1 and SW2 is changed from the conductive state to the nonconductive state by the gate signals G1 and G2, and the surge current is generated via the diode 21. Flowing. Further, when both the switch circuits SW1 and SW2 are set to the non-conductive state, a reflux current flows through the diode 21.
  • Second Configuration Example >> In the first configuration example, the case where the body diode formed in the MOSFET is used as a reverse current prevention element has been described. However, the configuration of the DC / DC converter 1 according to the embodiment is limited to the configuration shown in the first configuration example. It is not a thing.
  • FIG. 6 shows a second configuration example of the DC / DC converter 1 according to the embodiment.
  • the same parts as those in FIG. 6 are identical to FIG. 6, the same parts as those in FIG.
  • the configuration of the DC / DC converter 1 in the second configuration example is different from the configuration of the DC / DC converter 1 in the first configuration example in the configuration of the switch circuits SW1 and SW2.
  • the configuration of the switch circuit SW1 in the second configuration example is different from the configuration of the switch circuit SW1 in the first configuration example in that a diode D1 is provided instead of the second field effect transistor Tr12.
  • the configuration of the switch circuit SW2 in the second configuration example is different from the configuration of the switch circuit SW2 in the first configuration example in that a diode D2 is provided instead of the second field effect transistor Tr22.
  • the anode of the diode D1 is electrically connected to the source (first node) of the first field effect transistor Tr11, and the cathode is electrically connected to the junction node NDM.
  • the gate signal G1 from the control circuit 100 is supplied only to the gate of the first field effect transistor Tr11.
  • the anode of the diode D2 is electrically connected to the source (first node) of the first field effect transistor Tr21, and the cathode is electrically connected to the junction node NDM.
  • the gate signal G2 from the control circuit 100 is supplied only to the gate of the first field effect transistor Tr21.
  • the diodes D1 and D2 function as reverse current prevention elements.
  • the source / drain of the first field effect transistor Tr11 is in a conductive state. At this time, in the first field effect transistor Tr11, the current between the voltage input terminal TM1 and the junction node NDM passes between the source and drain of the first field effect transistor Tr11 having a lower impedance.
  • the gate signal G1 When the gate signal G1 is an off voltage, the source and drain of the first field effect transistor Tr11 are in a non-conductive state.
  • the DC voltage V1 When the DC voltage V1 is higher than the voltage at the junction node NDM, the current flowing toward the junction node NDM can be blocked by the body diode formed in the first field effect transistor Tr11.
  • the DC voltage V1 When the DC voltage V1 is lower than the voltage at the junction node NDM, the current (reverse current) flowing toward the voltage input terminal TM1 (or the DC power source connected to the voltage flow input terminal TM1) can be blocked by the diode D1.
  • DC voltages V1 and V2 are supplied to the junction node NDM in a time division manner by the gate signals G1 and G2 shown in FIG.
  • an output voltage Vout as shown in Expression (1) is generated.
  • the output voltage Vout can be set to a desired voltage by changing the duty ratio of the gate signals G1 and G2.
  • FIG. 7 shows a third configuration example of the DC / DC converter 1 according to the embodiment.
  • the same parts as those in FIG. 7 are identical to FIG. 7 in FIG. 7, the same parts as those in FIG. 7 in FIG. 7, the same parts as those in FIG. 7
  • the configuration of the DC / DC converter 1 in the third configuration example is different from the configuration of the DC / DC converter 1 in the first configuration example in the configuration of the rectifier circuit 20.
  • the configuration of the rectifier circuit 20 in the third configuration example is different from the configuration of the rectifier circuit 20 in the first configuration example in that a switch element is provided instead of the diode 21.
  • the switch element functions as a synchronous rectifier element.
  • the rectifier circuit 20 according to the third configuration example includes a third field effect transistor Tr31 as a switch element.
  • the third field effect transistor Tr31 is an N-channel type MOSFET.
  • the drain of the third field effect transistor Tr31 is electrically connected to the junction node NDM, and the source is electrically connected to the reference node NDref.
  • a body diode is formed between the source and the drain.
  • the gate signal G3 from the control circuit 100 is supplied to the gate of the third field effect transistor Tr31.
  • the gate signal G3 is on-voltage
  • the source and drain of the third field effect transistor Tr31 are in a conducting state
  • the gate signal G3 is off-voltage
  • the source and drain of the third field effect transistor Tr31 are in a non-conducting state. become.
  • the body diode formed in the third field effect transistor Tr31 has the same function as the diode 21.
  • FIG. 8 schematically shows an example of the timing of the gate signals G1, G2, and G3.
  • the horizontal axis represents time
  • the vertical axis represents signal level (voltage).
  • the high potential side voltages of the gate signals G1, G2, and G3 are represented as ON voltages
  • the low potential side voltages are represented as OFF voltages.
  • the control circuit 100 outputs, as the gate signals G1 and G2, pulse signals having a period T in which the ON voltage periods do not overlap as in FIG.
  • the control circuit 100 outputs a gate signal G3 having a pulse synchronized with the gate signals G1 and G2.
  • the control circuit 100 outputs a gate signal G3 having a period T having a pulse that is turned on when both the gate signals G1 and G2 are turned off.
  • the control circuit 100 outputs a gate signal G3 having a waveform corresponding to the setting information of the control register. In some embodiments, the control circuit 100 generates a gate signal G3 that is turned on when both the gate signals G1 and G2 are off based on the waveforms of the gate signals G1 and G2 set in the control register. Output.
  • the DC voltages V1 and V2 are supplied to the junction node NDM in a time division manner.
  • the inductor 30 stores magnetic energy corresponding to the current.
  • the gate signal G3 is an on-voltage
  • the current flowing from the reference node NDref to the junction node NDM flows through between the source and drain of the third field effect transistor Tr31.
  • the gate signal G3 is an off-voltage
  • the source and drain of the third field effect transistor Tr31 are in a non-conductive state, and the body diode formed in the third field effect transistor Tr31 is a freewheeling diode and a surge voltage as in the diode 21. Functions as a protection circuit.
  • the output voltage Vout is expressed as in Expression (1).
  • the rectifier circuit 20 can return the current without the voltage drop of the diode 21 as in the first configuration example, the efficiency of voltage conversion can be improved.
  • FIG. 9 shows an example of an operation simulation of the DC / DC converter 1 according to the third configuration example.
  • the DC voltage V1 is 10 [V]
  • the DC voltage V2 is 5 [V].
  • a current I SW1 through the switch circuit SW1 represents the current flowing through the switch circuit SW2 and I SW2
  • a current flowing through the switching element represents a I SW3
  • a current flowing through the inductor 30 represents the I L
  • the combined voltage at the junction node NDM is represented as V NDM .
  • the current ISW1 is a current that flows from the source of the first field effect transistor Tr11 to the source of the second field effect transistor Tr12.
  • the current ISW2 is a current that flows from the source of the first field effect transistor Tr21 to the source of the second field effect transistor Tr22.
  • Current I SW3 is a current flowing between the source and drain of the third field effect transistor Tr31 (or body diode).
  • a surge current generated when each of the switch circuits SW1 and SW2 is changed from the conductive state to the nonconductive state by the gate signals G1 and G2 is generated between the source and the drain of the third field effect transistor Tr31 (or Flows through the body diode). Further, when both the switch circuits SW1 and SW2 are set to the non-conductive state, the third field effect transistor Tr31 is set to the conductive state by the gate signal G3, thereby passing between the source and the drain of the third field effect transistor Tr31. As a result, a reflux current flows.
  • 3.0 [V] is output as the output voltage Vout as shown in Expression (1).
  • the DC / DC converter 1 according to the fourth configuration example can boost the combined voltage at the junction node NDM by adding a diode and a switch circuit to the configurations shown in the first configuration example to the third configuration example.
  • a diode and a switch circuit are added to the DC / DC converter 1 according to the first configuration example will be described with respect to the fourth configuration example, but the DC / DC converter 1 according to the second configuration example or the third configuration example will be described. The same applies when a diode and a switch circuit are added.
  • FIG. 10 shows a fourth configuration example of the DC / DC converter 1 according to the embodiment. 10, parts that are the same as those in FIG. 2 are given the same reference numerals, and explanation thereof is omitted as appropriate.
  • the configuration of the DC / DC converter 1 in the fourth configuration example is different from the configuration of the DC / DC converter 1 in the first configuration example.
  • the DC / DC converter 1 in the first configuration example includes a boost diode 40 and a boost switch circuit. This is a point where SW10 is added.
  • the step-up diode 40 has an anode electrically connected to the output side terminal of the inductor 30 and a cathode electrically connected to the voltage output terminal TMout.
  • Boosting switch circuit SW10 is connected between the output-side terminal of inductor 30 and reference node NDref.
  • the step-up switch circuit SW10 is switch-controlled by a control signal from the control circuit 100.
  • the step-up switch circuit SW10 includes a field effect transistor Tr101.
  • the field effect transistor Tr101 is an N-channel type MOSFET.
  • the drain of the field effect transistor Tr101 is electrically connected to the output side terminal of the inductor 30, and the source is electrically connected to the reference node NDref.
  • a body diode is formed between the source and the drain.
  • the gate signal G10 from the control circuit 100 is supplied to the gate of the field effect transistor Tr101.
  • the control circuit 100 outputs a pulse signal having a duty ratio corresponding to the boost ratio as the gate signal G10.
  • the gate signal G10 is on-voltage, the source and drain of the field effect transistor Tr101 are conductive, and when the gate signal G10 is off-voltage, the source and drain of the field effect transistor Tr101 are non-conductive.
  • FIG. 11 schematically shows an example of the timing of the gate signals G1, G2, and G10.
  • the horizontal axis represents time
  • the vertical axis represents signal level (voltage).
  • the high potential side voltages of the gate signals G1, G2, and G10 are represented as ON voltages
  • the low potential side voltages are represented as OFF voltages.
  • the control circuit 100 outputs a pulse signal having a period T1 as the gate signals G1 and G2 so that the voltage at the confluence node NDM becomes a desired combined voltage.
  • the control circuit 100 outputs a pulse signal having a period T2 as a gate signal G10.
  • the gate signals G1, G2 and the gate signal G10 are asynchronous.
  • the control circuit 100 includes a control register for setting the waveform of the gate signal G10.
  • a pulse cycle, a pulse rising timing based on a reference timing, a pulse width, and the like are set.
  • the control circuit 100 can output a pulse signal corresponding to such setting information (setting contents) of the control register as the gate signal G10.
  • the DC voltages V1 and V2 are supplied to the junction node NDM in a time division manner.
  • the inductor 30 stores magnetic energy corresponding to the current.
  • the gate signal G10 is an on-voltage
  • a current generated by the magnetic energy accumulated in the inductor 30 flows between the source and drain of the field effect transistor Tr101.
  • the gate signal G10 is an off-voltage
  • a current generated by the magnetic energy accumulated in the inductor 30 flows through the boosting diode 40, and an output voltage Vout is generated at the voltage output terminal TMout.
  • the output voltage Vout is expressed by the following equation.
  • the composite voltage at the junction node NDM is adjusted by changing the duty ratio of the gate signals G1 and G2, and the output voltage Vout is set to a desired voltage by boosting the adjusted composite voltage at a predetermined boost ratio.
  • the output voltage Vout can be set to a desired voltage by boosting a predetermined combined voltage by adjusting the boost ratio by changing the duty ratio of the gate signal G10.
  • the output voltage Vout can be set to a desired voltage by changing the duty ratio of the gate signals G1, G2, and G10.
  • FIG. 12 shows an example of an operation simulation of the DC / DC converter 1 according to the fourth configuration example.
  • the DC voltage V1 is 10 [V]
  • the DC voltage V2 is 5 [V].
  • current I SW1 flowing through the switch circuit SW 1 is represented
  • current flowing through the switch circuit SW 2 is represented as I SW 2
  • current flowing through the boost switch circuit is represented as I SW 10
  • the current ISW1 is a current that flows from the source of the first field effect transistor Tr11 to the source of the second field effect transistor Tr12.
  • the current ISW2 is a current that flows from the source of the first field effect transistor Tr21 to the source of the second field effect transistor Tr22.
  • Current I SW10 is a current flowing between the source and drain of the field effect transistor Tr101.
  • a composite voltage V NDM is generated at the junction node NDM.
  • FIG. 13 shows a fifth configuration example of the DC / DC converter 1 according to the embodiment.
  • the same parts as those in FIG. 13 are identical parts as those in FIG. 13
  • the configuration of the DC / DC converter 1 in the fifth configuration example is different from the configuration of the DC / DC converter 1 in the fourth configuration example in that a switch circuit SW11 is provided instead of the boosting diode 40.
  • the switch circuit SW11 includes a field effect transistor Tr111.
  • the field effect transistor Tr111 is an N-channel type MOSFET.
  • the source of the field effect transistor Tr111 is electrically connected to the output side terminal of the inductor 30, and the drain is electrically connected to the voltage output terminal TMout.
  • a body diode is formed between the source and the drain.
  • the body diode formed in the field effect transistor Tr111 has a function similar to that of the boosting diode 40.
  • the gate signal G11 from the control circuit 100 is supplied to the gate of the field effect transistor Tr111.
  • the gate signal G11 is generated so that the field effect transistor Tr111 is in a conductive state when the field effect transistor Tr101 is in a nonconductive state.
  • the gate signal G11 is on-voltage, the source and drain of the field effect transistor Tr111 are in a conducting state, and when the gate signal G11 is off-voltage, the source and drain of the field effect transistor Tr111 are in a non-conducting state.
  • the efficiency of voltage conversion can be improved.
  • FIG. 14 shows an example of an operation simulation of the DC / DC converter 1 according to the fifth configuration example.
  • the DC voltage V1 is 10 [V]
  • the DC voltage V2 is 5 [V].
  • a current flowing through the boost switch circuit SW10 represents an I SW10
  • a current flowing through the inductor 30 represents the I L
  • the current ISW1 is a current that flows from the source of the first field effect transistor Tr11 to the source of the second field effect transistor Tr12.
  • the current ISW2 is a current that flows from the source of the first field effect transistor Tr21 to the source of the second field effect transistor Tr22.
  • Current I SW10 is a current flowing between the source and drain of the field effect transistor Tr101 (or body diode).
  • Current I SW11 is a current flowing between the source and drain of the field effect transistor Tr 111 (or body diode).
  • a composite voltage V NDM is generated at the junction node NDM.
  • the gate signal G10 When the gate signal G10 is on-voltage, a current flows between the source and drain of the field effect transistor Tr101. At this time, the gate signal G11 is an off voltage, and magnetic energy is accumulated in the inductor 30. A current is supplied to a load (not shown) using the charge that has been charged in the capacitor Cout until then.
  • the gate signal G10 When the gate signal G10 is an off voltage, the gate signal G11 becomes an on voltage, and the output voltage Vout is generated at the voltage output terminal TMout via the source and drain of the field effect transistor Tr111 by the magnetic energy accumulated in the inductor 30. .
  • the capacitor Cout is charged with electric charge.
  • the merge node NDM when switching the voltage input terminal electrically connected to the merge node NDM, the merge node NDM is electrically connected to two or more voltage input terminals for a predetermined period.
  • the control circuit 100 changes the gate signals G1 and G2 so that the gate signal G2 is switched from the off voltage to the on voltage immediately before the gate signal G1 is switched from the on voltage to the off voltage. Can be generated.
  • the control circuit 100 can generate the gate signals G1 and G2 such that the gate signal G2 is switched from the on voltage to the off voltage after the gate signal G1 is switched from the off voltage to the on voltage.
  • one of the first DC power source that outputs the DC voltage V1 and the second DC power source that outputs the DC voltage V2 supplies one DC power source that outputs a high voltage to the other DC power source. It becomes possible.
  • the DC power source that outputs a low voltage is a secondary battery, the DC power source can be charged.
  • the energy system according to the embodiment includes two or more power generation devices, generates a desired voltage from two or more DC voltages output from the two or more power generation devices, and supplies the generated voltage to a load. At this time, a substance necessary for one of the two or more power generation devices can be generated using energy supplied from another power generation device.
  • FIG. 15 shows a configuration example of the energy system 200 according to the embodiment. 15, parts similar to those in FIGS. 1 to 14 are given the same reference numerals, and description thereof will be omitted as appropriate.
  • the energy system 200 includes the DC / DC converter 1 according to the embodiment and a water electrolysis cell converter 210.
  • the energy system 200 is supplied with a DC voltage V 1 from the photovoltaic cell 300 and a DC voltage V 2 from the fuel cell 310.
  • the photovoltaic cell 300 converts light energy such as sunlight into electrical energy, and outputs a DC voltage V1 using the converted electrical energy.
  • the fuel cell 310 extracts electrical energy by an electrochemical reaction between hydrogen and oxygen, and outputs a DC voltage V2 using the extracted electrical energy.
  • the DC / DC converter 1 supplies the load LD with a voltage obtained by stepping down or boosting the combined voltage generated from the DC voltages V1 and V2 as described above.
  • the water electrolysis cell converter 210 receives the DC voltage V1 from the photovoltaic cell 300 and converts it to a predetermined voltage to be supplied to the water electrolysis cell 320 that generates hydrogen necessary for power generation by the fuel cell 310.
  • the function of the water electrolysis cell converter 210 is realized by a known DC / DC converter or DC / AC converter.
  • the water electrolysis cell 320 is supplied with voltage from the water electrolysis cell converter 210 and electrolyzes water by a known method to generate hydrogen. Hydrogen generated by the water electrolysis cell 320 is sent to the fuel cell 310 by a known method. That is, fuel cell 310 generates DC voltage V ⁇ b> 2 by an electrochemical reaction using hydrogen generated by electrolysis by water electrolysis cell 320 that receives electrical energy from water electrolysis cell converter 210.
  • the energy system 200 further includes at least one of a photovoltaic cell 300, a fuel cell 310, and a water electrolysis cell 320.
  • the energy system 200 it is possible to efficiently supply power to a load using renewable energy with a simple configuration.
  • the DC / DC converter 1 is an example of a “DC voltage conversion circuit” according to the embodiment.
  • the voltage input terminals TM1 to TMN are examples of the “voltage input unit” according to the embodiment.
  • the voltage output terminal TMout is an example of a “voltage output unit” according to the embodiment.
  • the body diode formed in the boosting diode 40 or the field effect transistor Tr111 is an example of the “boosting diode” according to the embodiment.
  • the field effect transistor Tr101 is an example of a “boost switch circuit” according to the embodiment.
  • the energy system 200 is an example of a “power supply system” according to the embodiment.
  • the photovoltaic cell 300 is an example of the “first power generation device” according to the embodiment.
  • the fuel cell 310 is an example of a “second power generation device” according to the embodiment.
  • the DC voltage V1 is an example of a “first DC voltage” according to the embodiment.
  • the DC voltage V2 is an example of a “second DC voltage” according to the embodiment.
  • the water electrolysis cell converter 210 is an example of a “voltage conversion circuit” according to the embodiment.
  • Hydrogen is an example of the “chemical substance” according to the embodiment.
  • the water electrolysis cell 320 is an example of the “electrolysis device” according to the embodiment.
  • the DC voltage conversion circuit (DC / DC converter 1) includes a DC voltage selection circuit (10), an inductor (30), and a rectification circuit (20).
  • the DC voltage selection circuit electrically connects a plurality of voltage input units (voltage input terminals TM1 to TMN) to which a plurality of different DC voltages (V1 to VN) are supplied to the junction node (NDM) in a time division manner.
  • the inductor is connected between the junction node and the voltage output unit (voltage output terminal TMout).
  • the rectifier circuit is connected between a reference node (NDref) to which a reference voltage (Vref) is supplied and a junction node.
  • the combined voltage is generated by outputting a plurality of DC voltages to the junction node in a time division manner, and the combined voltage is stepped down using the inductor and the rectifier circuit, so the configuration is simplified. Therefore, it is possible to perform voltage conversion of DC voltage by simple switch control regardless of the level of a plurality of DC voltages.
  • the DC voltage selection circuit includes a plurality of switch circuits (SW1, SW2) connected between each of the plurality of voltage input units and the junction node. At least one of the plurality of switch circuits includes a switch element (first field effect transistors Tr11 and Tr21) connected between the voltage input unit and the first node (ND1), and between the first node and the junction node. And a reverse current prevention element (body diodes formed on the second field effect transistors Tr12 and Tr22, diodes D1 and D2) for preventing the generation of a reverse current from the junction node to the first node.
  • the reverse current prevention element for preventing the reverse current toward the DC power source is provided in at least one of the plurality of switch circuits corresponding to each of the plurality of voltage input units. Even when the voltage is higher than the DC voltage supplied to the voltage input unit, it is possible to avoid damage to the DC power source due to the reverse current.
  • At least one of the plurality of switch circuits includes a first field effect transistor (Tr11) having a drain connected to the voltage input unit and a source connected to the first node. , Tr21) and a second field effect transistor (Tr12, Tr22) having a source connected to the first node and a drain connected to the junction node, the second field effect transistor between the source and the drain Including a body diode.
  • the body diode formed in the field effect transistor is provided in at least one of the plurality of switch circuits corresponding to each of the plurality of voltage input units, the voltage at the junction node is the voltage. Even when the voltage is higher than the DC voltage supplied to the input unit, it is possible to avoid damage to the DC power source due to the reverse current.
  • each of the plurality of switch circuits includes a first field effect transistor and a second field effect transistor, and a gate signal of the first field effect transistor of each switch circuit.
  • a control circuit (100) that performs switch control of the plurality of switch circuits by controlling the pulse widths of the gate signals (G1, G2) of (G1, G2) and the second field effect transistor.
  • the composite voltage can be generated according to the type of the DC power source that outputs the DC voltage. It is possible to provide a DC voltage conversion circuit capable of flexibly converting a DC voltage.
  • the DC voltage conversion circuits are formed in a boost diode (a boost diode 40 and a field effect transistor Tr111) having an anode connected to an output side terminal of an inductor and a cathode connected to a voltage output unit. And a step-up switch circuit (SW10) connected between the output side terminal and the reference node.
  • a boost diode a boost diode 40 and a field effect transistor Tr111
  • SW10 step-up switch circuit
  • the boosting diode and the boosting switch element are added to the DC voltage conversion circuit having the above configuration, and the combined voltage is boosted by the control of the DC voltage selection circuit and the boosting switch element.
  • the configuration can be simplified, and the voltage conversion of the DC voltage can be performed by simple switch control regardless of the level of the plurality of DC voltages.
  • the boosting switch circuit includes a field effect transistor (Tr101) having a source connected to the reference node and a drain connected to the output side terminal.
  • Tr101 field effect transistor
  • the boosting switch element is configured to include the field effect transistor, the boosting control of the combined voltage can be simplified with a simple configuration.
  • the DC voltage conversion circuit performs switch control of a plurality of switch circuits by pulse width control and boosts based on a control signal (gate signal G10) having a duty ratio corresponding to the boost ratio.
  • the control circuit (100) which performs switch control of the switch circuit for a circuit is included.
  • a control voltage having a duty ratio corresponding to the boost ratio is generated by outputting a plurality of DC voltages in a time-sharing manner by a plurality of switch circuits subjected to switch control by pulse width control. Since the step-up switch element is controlled by the signal, the configuration can be simplified and the voltage conversion of the DC voltage can be performed by the simple switch control regardless of the level of the plurality of DC voltages.
  • the rectifier circuit includes a diode (21, a body formed in the third field effect transistor Tr31) having an anode connected to the reference node and a cathode connected to the junction node. Diode).
  • the rectifier circuit is configured to include a diode, the configuration of the DC voltage conversion circuit can be simplified.
  • a power supply system (energy system 200) includes a voltage conversion circuit (a voltage conversion circuit) that converts a first DC voltage (DC voltage V1) output from a first power generation device (photocell 300) into a predetermined voltage.
  • DC voltage output voltage Vout
  • a DC voltage conversion circuit according to any one of the above, wherein the second power generator is generated by electrolysis by an electrolyzer (water electrolysis cell 320) that receives electrical energy from the voltage converter circuit
  • a second DC voltage is generated by an electrochemical reaction using the chemical substance (hydrogen).
  • an electric power using the first DC voltage is supplied to the load while the conversion voltage generated based on the first DC voltage and the second DC voltage is supplied to the load using the DC voltage conversion circuit. Since a chemical substance is generated by decomposition and the second DC voltage is generated by an electrochemical reaction using the generated chemical substance, a power supply system to which a DC voltage conversion circuit with simplified control and configuration is applied Can be made more efficient.
  • the power supply system further includes at least one of a first power generation device, a second power generation device, and an electrolysis device.
  • At least one of the first power generation device, the second power generation device, and the electrolysis device is included.
  • a power supply system to which a simplified DC voltage conversion circuit is applied can be provided.
  • the first power generation device includes a photovoltaic cell
  • the second power generation device includes a fuel cell
  • the electrolysis device is a water electrolysis device
  • the chemical substance is hydrogen
  • the hydrogen used for the fuel cell by electrolysis is supplied to the load with the conversion voltage generated based on the first DC voltage and the second DC voltage using the DC voltage conversion circuit. Since the second DC voltage is generated by an electrochemical reaction using the generated hydrogen, the control and configuration are simplified, and power is efficiently supplied to the load using renewable energy and hydrogen energy. It is possible to provide a power supply system capable of performing the above.
  • the field effect transistor when the function of the diode is realized by the body diode of the field effect transistor, the field effect transistor may be connected in parallel with the diode. Further, a bipolar transistor or IGBT (Insulated Gate Bipolar Transistor) may be used instead of the field effect transistor.
  • IGBT Insulated Gate Bipolar Transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Sustainable Development (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Energy (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Transportation (AREA)
  • Mechanical Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Fuel Cell (AREA)

Abstract

Provided are a DC voltage conversion circuit capable of converting a DC voltage by means of a simple configuration and control, and a power supply system. The DC voltage conversion circuit (1) includes a DC voltage selection circuit (10), an inductor (30), and a rectification circuit (20). The DC voltage selection circuit (10) electrically connects a plurality of voltage input portions (TM1 to TMN), to which a plurality of mutually different DC voltages are supplied, to a converging node (NDM) in a time-divided manner. The inductor (30) is connected between the converging node (NDM) and a voltage output portion (TMout). The rectification circuit (20) is connected between a reference node (NDref) to which a reference voltage is supplied and the converging node (NDM).

Description

直流電圧変換回路、及び電源システムDC voltage conversion circuit and power supply system
 本発明は、直流電圧変換回路、及び電源システムに関する。 The present invention relates to a DC voltage conversion circuit and a power supply system.
 近年、化石エネルギーや原子力エネルギーの代替エネルギーとして、太陽光、風力、波力、バイオマス、地熱等を利用した発電エネルギーや水素エネルギーなどの再生可能エネルギーが注目されている。それにより、このような各種のエネルギーを利用した発電装置の多様化が進んでいる。 In recent years, renewable energy such as solar energy, wind power, wave power, biomass, geothermal heat, and other renewable energy has attracted attention as alternative energy to fossil energy and nuclear energy. As a result, the diversification of power generation devices using such various types of energy is progressing.
 発電装置の多様化は、発電電力(発電電圧、発電電流)レベルやその安定性の多様化を招くため、発電装置により得られた電圧を所望の電圧に変換することが可能な電圧変換回路の重要性が増大している。 Since diversification of power generation devices leads to diversification of the level of generated power (generated voltage, generated current) and its stability, a voltage conversion circuit capable of converting the voltage obtained by the power generation device into a desired voltage The importance is increasing.
 電圧変換回路のうち例えば直流(Direct Current:DC)電圧を電圧変換するDC/DCコンバータは、様々な装置に搭載されている。例えば、太陽電池を用いた発電を行う発電装置、風力を用いた発電を行う発電装置、燃料電池を用いた発電を行う発電装置、ハイブリッド自動車等には、DC/DCコンバータが搭載されている。 Among the voltage conversion circuits, for example, a DC / DC converter that converts a direct current (DC) voltage into a voltage is mounted on various devices. For example, a DC / DC converter is mounted on a power generation device that generates power using a solar cell, a power generation device that generates power using wind power, a power generation device that generates power using a fuel cell, a hybrid vehicle, or the like.
 このようなDC/DCコンバータに関する技術は、いくつか提案されている。例えば、特許文献1には、FCBB(forward-conducting-bidirectional-blocking)スイッチを用いて複数の直流電圧から所望の直流電圧を生成するDC/DCコンバータが開示されている。例えば、特許文献2には、双方向スイッチを用いて複数の直流電圧から所望の直流電圧を生成するDC/DCコンバータが開示されている。 Several technologies related to such DC / DC converters have been proposed. For example, Patent Document 1 discloses a DC / DC converter that generates a desired DC voltage from a plurality of DC voltages using an FCBB (forward-conducting-bidirectional-blocking) switch. For example, Patent Document 2 discloses a DC / DC converter that generates a desired DC voltage from a plurality of DC voltages using a bidirectional switch.
米国特許第7227277号明細書US Pat. No. 7,227,277 米国特許出願公開第2010/0148587号明細書US Patent Application Publication No. 2010/0148587
 しかしながら、特許文献1及び特許文献2に開示された手法では、複数の直流電圧を供給するための複数のFCBBスイッチや複数の双方向スイッチを一斉に導通状態にした後、いくつかのスイッチを順次に非導通状態になるようにスイッチ制御が行われる。 However, in the methods disclosed in Patent Document 1 and Patent Document 2, after a plurality of FCBB switches and a plurality of bidirectional switches for supplying a plurality of DC voltages are turned on simultaneously, several switches are sequentially turned on. Switch control is performed so as to be in a non-conductive state.
 この場合、複数のFCBBスイッチ等が導通状態である期間では、最も高い直流電圧を出力する直流電源だけがDC/DCコンバータにエネルギー供給を行う。従って、複数の直流電圧の高低が変化すると、複数のFCBBスイッチや複数の双方向スイッチの制御方法を変更する必要がある。その結果、複数の直流電圧を監視する必要があり、DC/DCコンバータの構成や制御が複雑になる。 In this case, only the DC power source that outputs the highest DC voltage supplies energy to the DC / DC converter during a period in which a plurality of FCBB switches and the like are in a conductive state. Therefore, when the levels of the plurality of DC voltages change, it is necessary to change the control method for the plurality of FCBB switches and the plurality of bidirectional switches. As a result, it is necessary to monitor a plurality of DC voltages, and the configuration and control of the DC / DC converter are complicated.
 本発明は、このような事情を鑑みてなされたものであり、その目的は、簡素な構成及び制御で直流電圧を変換することが可能な直流電圧変換回路、及び電源システムを提供することにある。 The present invention has been made in view of such circumstances, and an object thereof is to provide a DC voltage conversion circuit capable of converting a DC voltage with a simple configuration and control, and a power supply system. .
 いくつかの実施形態の第1態様では、直流電圧変換装置は、互いに異なる複数の直流電圧が供給される複数の電圧入力部を時分割で合流ノードに電気的に接続する直流電圧選択回路と、前記合流ノードと電圧出力部との間に接続されたインダクタと、基準電圧が供給される基準ノードと前記合流ノードとの間に接続された整流回路と、を含む。 In a first aspect of some embodiments, the DC voltage conversion apparatus includes a DC voltage selection circuit that electrically connects a plurality of voltage input units to which a plurality of different DC voltages are supplied to the merging node in a time division manner; An inductor connected between the junction node and the voltage output unit; a reference node to which a reference voltage is supplied; and a rectifier circuit connected between the junction node.
 いくつかの実施形態に係る第2態様では、第1態様において、前記直流電圧選択回路は、前記複数の電圧入力部のそれぞれと前記合流ノードとの間に接続された複数のスイッチ回路を含み、前記複数のスイッチ回路の少なくとも1つは、前記電圧入力部と第1ノードとの間に接続されたスイッチ素子と、前記第1ノードと前記合流ノードとの間に接続され、前記合流ノードから前記第1ノードに向かう逆電流の発生を防止する逆電流防止素子と、を含む。 In a second aspect according to some embodiments, in the first aspect, the DC voltage selection circuit includes a plurality of switch circuits connected between each of the plurality of voltage input units and the junction node, At least one of the plurality of switch circuits is connected between the switch element connected between the voltage input unit and the first node, and between the first node and the junction node, and from the junction node to the And a reverse current prevention element for preventing generation of a reverse current toward the first node.
 いくつかの実施形態に係る第3態様では、第2態様において、前記複数のスイッチ回路の少なくとも1つは、前記電圧入力部にドレインが接続され、前記第1ノードにソースが接続された第1電界効果トランジスタと、前記第1ノードにソースが接続され、前記合流ノードにドレインが接続された第2電界効果トランジスタと、を含み、前記第2電界効果トランジスタは、ソースとドレインとの間に形成されたボディダイオードを含む。 In a third aspect according to some embodiments, in the second aspect, at least one of the plurality of switch circuits is a first in which a drain is connected to the voltage input unit and a source is connected to the first node. And a second field effect transistor having a source connected to the first node and a drain connected to the junction node, the second field effect transistor formed between the source and the drain. Body diode.
 いくつかの実施形態に係る第4態様では、第3態様において、前記複数のスイッチ回路のそれぞれは、前記第1電界効果トランジスタと前記第2電界効果トランジスタとを含み、各スイッチ回路の前記第1電界効果トランジスタのゲート信号及び前記第2電界効果トランジスタのゲート信号のパルス幅を制御することにより前記複数のスイッチ回路のスイッチ制御を行う制御回路を含む。 In a fourth aspect according to some embodiments, in the third aspect, each of the plurality of switch circuits includes the first field effect transistor and the second field effect transistor, and the switch circuit includes the first field effect transistor and the first field effect transistor. A control circuit that performs switch control of the plurality of switch circuits by controlling a pulse width of a gate signal of the field effect transistor and a gate signal of the second field effect transistor;
 いくつかの実施形態に係る第5態様は、第1態様~第3態様のいずれかにおいて、前記インダクタの出力側端子にアノードが接続され、前記電圧出力部にカソードが接続された昇圧用ダイオードと、前記出力側端子と前記基準ノードとの間に接続された昇圧用スイッチ回路と、を含む。 A fifth aspect according to some embodiments is the boost diode according to any one of the first to third aspects, wherein an anode is connected to the output side terminal of the inductor, and a cathode is connected to the voltage output unit. And a step-up switch circuit connected between the output side terminal and the reference node.
 いくつかの実施形態に係る第6態様では、第5態様において、前記昇圧用スイッチ回路は、前記基準ノードにソースが接続され、前記出力側端子にドレインが接続された電界効果トランジスタを含む。 In a sixth aspect according to some embodiments, in the fifth aspect, the step-up switch circuit includes a field effect transistor having a source connected to the reference node and a drain connected to the output side terminal.
 いくつかの実施形態に係る第7態様は、第5態様又は第6態様において、パルス幅制御により前記複数のスイッチ回路のスイッチ制御を行うと共に、昇圧比に対応したデューティ比を有する制御信号に基づいて前記昇圧用スイッチ回路のスイッチ制御を行う制御回路を含む。 A seventh aspect according to some embodiments is based on a control signal having a duty ratio corresponding to a boost ratio while performing switch control of the plurality of switch circuits by pulse width control in the fifth aspect or the sixth aspect. And a control circuit for performing switch control of the boosting switch circuit.
 いくつかの実施形態に係る第8態様では、第1態様~第7態様のいずれかにおいて、前記整流回路は、前記基準ノードにアノードが接続され、前記合流ノードにカソードが接続されたダイオードを含む。 In an eighth aspect according to some embodiments, in any one of the first to seventh aspects, the rectifier circuit includes a diode having an anode connected to the reference node and a cathode connected to the junction node. .
 いくつかの実施形態に係る第9態様では、電源システムは、第1発電装置から出力された第1直流電圧を所定の電圧に変換する電圧変換回路と、前記第1直流電圧と第2発電装置から出力された第2直流電圧とに基づいて生成された直流電圧を負荷に供給する第1態様~第8態様のいずれかに記載の直流電圧変換回路と、を含み、前記第2発電装置は、前記電圧変換回路から電気エネルギーを受けた電気分解装置による電気分解によって生成された化学物質を用いた電気化学反応により前記第2直流電圧を生成する。 In a ninth aspect according to some embodiments, the power supply system includes a voltage conversion circuit that converts the first DC voltage output from the first power generation device into a predetermined voltage, the first DC voltage, and the second power generation device. And a DC voltage conversion circuit according to any one of the first to eighth aspects for supplying a direct current voltage generated based on the second direct current voltage output from a load to a load, wherein the second power generator comprises: The second DC voltage is generated by an electrochemical reaction using a chemical substance generated by electrolysis by an electrolyzer that receives electrical energy from the voltage conversion circuit.
 いくつかの実施形態に係る第10態様は、第9態様において、更に、前記第1発電装置、前記第2発電装置、及び前記電気分解装置のうち少なくとも1つを含む。 A tenth aspect according to some embodiments includes, in the ninth aspect, at least one of the first power generation device, the second power generation device, and the electrolysis device.
 いくつかの実施形態に係る第11態様では、第9態様又は第10態様において、前記第1発電装置は、光電池を含み、前記第2発電装置は、燃料電池を含み、前記電気分解装置は、水電解装置であり、前記化学物質は、水素である。 In an eleventh aspect according to some embodiments, in the ninth aspect or the tenth aspect, the first power generation device includes a photovoltaic cell, the second power generation device includes a fuel cell, and the electrolysis device includes: In the water electrolysis apparatus, the chemical substance is hydrogen.
 本発明によれば、簡素な構成及び制御で直流電圧を変換することが可能な直流電圧変換回路、及び電源システムを提供することが可能になる。 According to the present invention, it is possible to provide a DC voltage conversion circuit and a power supply system capable of converting a DC voltage with a simple configuration and control.
実施形態に係るDC/DCコンバータの原理的構成例を示す概略図である。It is the schematic which shows the example of a fundamental structure of the DC / DC converter which concerns on embodiment. 実施形態に係るDC/DCコンバータの第1構成例を示す概略図である。It is the schematic which shows the 1st structural example of the DC / DC converter which concerns on embodiment. 実施形態の第1構成例に係るDC/DCコンバータの制御タイミングの一例を示す概略図である。It is the schematic which shows an example of the control timing of the DC / DC converter which concerns on the 1st structural example of embodiment. 実施形態の第1構成例に係るDC/DCコンバータの動作シミュレーションの一例を示す概略図である。It is the schematic which shows an example of the operation simulation of the DC / DC converter which concerns on the 1st structural example of embodiment. 実施形態の第1構成例に係るDC/DCコンバータの動作シミュレーションの一例を示す概略図である。It is the schematic which shows an example of the operation simulation of the DC / DC converter which concerns on the 1st structural example of embodiment. 実施形態に係るDC/DCコンバータの第2構成例を示す概略図である。It is the schematic which shows the 2nd structural example of the DC / DC converter which concerns on embodiment. 実施形態に係るDC/DCコンバータの第3構成例を示す概略図である。It is the schematic which shows the 3rd structural example of the DC / DC converter which concerns on embodiment. 実施形態の第3構成例に係るDC/DCコンバータの制御タイミングの一例を示す概略図である。It is the schematic which shows an example of the control timing of the DC / DC converter which concerns on the 3rd structural example of embodiment. 実施形態の第3構成例に係るDC/DCコンバータの動作シミュレーションの一例を示す概略図である。It is the schematic which shows an example of the operation simulation of the DC / DC converter which concerns on the 3rd structural example of embodiment. 実施形態に係るDC/DCコンバータの第4構成例を示す概略図である。It is the schematic which shows the 4th structural example of the DC / DC converter which concerns on embodiment. 実施形態の第4構成例に係るDC/DCコンバータの制御タイミングの一例を示す概略図である。It is the schematic which shows an example of the control timing of the DC / DC converter which concerns on the 4th structural example of embodiment. 実施形態の第4構成例に係るDC/DCコンバータの動作シミュレーションの一例を示す概略図である。It is the schematic which shows an example of the operation simulation of the DC / DC converter which concerns on the 4th structural example of embodiment. 実施形態に係るDC/DCコンバータの第5構成例を示す概略図である。It is the schematic which shows the 5th structural example of the DC / DC converter which concerns on embodiment. 実施形態の第5構成例に係るDC/DCコンバータの動作シミュレーションの一例を示す概略図である。It is the schematic which shows an example of the operation simulation of the DC / DC converter which concerns on the 5th structural example of embodiment. 実施形態に係る電源システムの構成例を示す概略図である。It is the schematic which shows the structural example of the power supply system which concerns on embodiment.
 この発明に係る直流電圧変換回路、及び電源システムの実施形態の例について、図面を参照しながら詳細に説明する。なお、この明細書において引用された文献の記載内容や任意の公知技術を、以下の実施形態に援用することが可能である。 Examples of embodiments of a DC voltage conversion circuit and a power supply system according to the present invention will be described in detail with reference to the drawings. In addition, it is possible to use the description content of the literature referred in this specification, and arbitrary well-known techniques for the following embodiment.
 実施形態に係る直流電圧変換回路は、互いに異なる複数の直流電圧に基づいて合成電圧を生成し、生成された合成電圧を降圧又は昇圧することにより所望の電圧を出力することが可能である。実施形態に係る電源システムは、実施形態に係る直流電圧変換回路を含み、複数の発電装置から供給された電圧に基づいて所望の電圧を生成し、生成された電圧を負荷に供給することが可能である。 The DC voltage conversion circuit according to the embodiment can generate a composite voltage based on a plurality of different DC voltages, and can output a desired voltage by stepping down or boosting the generated composite voltage. The power supply system according to the embodiment includes the DC voltage conversion circuit according to the embodiment, can generate a desired voltage based on voltages supplied from a plurality of power generators, and can supply the generated voltage to a load It is.
 以下、実施形態に係る直流電圧変換回路が適用されたDC/DCコンバータと、実施形態に係る電源システムが適用されたエネルギーシステムについて説明する。 Hereinafter, a DC / DC converter to which the DC voltage conversion circuit according to the embodiment is applied and an energy system to which the power supply system according to the embodiment is applied will be described.
<DC/DCコンバータ>
 図1に、実施形態に係るDC/DCコンバータの原理的構成例の概略図を示す。
<DC / DC converter>
FIG. 1 is a schematic diagram illustrating an example of a basic configuration of a DC / DC converter according to an embodiment.
 DC/DCコンバータ1は、複数の電圧入力端子TM0~TMN(Nは2以上の整数)と、電圧出力端子TMoutと、キャパシタC1~CN、Coutと、直流電圧選択回路10と、整流回路20と、インダクタ30と、制御回路100とを含む。 The DC / DC converter 1 includes a plurality of voltage input terminals TM0 to TMN (N is an integer of 2 or more), a voltage output terminal TMout, capacitors C1 to CN and Cout, a DC voltage selection circuit 10, and a rectifier circuit 20. Inductor 30 and control circuit 100 are included.
 DC/DCコンバータ1には、複数の直流電源から互いに異なる複数の直流電圧が供給される。いくつかの実施形態において、複数の直流電源は、互いに電流電圧特性が異なる。電圧入力端子TM1には、図示しない第1直流電源からの直流電圧V1が供給される。
電圧入力端子TM2には、第1直流電源と異なる電流電圧特性を有する第2直流電源からの直流電圧V2が供給される。電圧入力端子TMNには、第1直流電源~第(N-1)直流電源と異なる電流電圧特性を有する第N直流電源からの直流電圧VNが供給される。電圧入力端子TM0には、基準電圧Vrefとしての接地電圧GNDが供給される
The DC / DC converter 1 is supplied with a plurality of different DC voltages from a plurality of DC power sources. In some embodiments, the plurality of DC power supplies have different current-voltage characteristics. A DC voltage V1 from a first DC power supply (not shown) is supplied to the voltage input terminal TM1.
The voltage input terminal TM2 is supplied with a DC voltage V2 from a second DC power supply having a current voltage characteristic different from that of the first DC power supply. The voltage input terminal TMN is supplied with a DC voltage VN from an Nth DC power supply having current-voltage characteristics different from those of the first DC power supply to the (N−1) th DC power supply. The ground voltage GND as the reference voltage Vref is supplied to the voltage input terminal TM0.
 DC/DCコンバータ1は、複数の電圧入力端子TM1~TMNに供給された複数の直流電圧V1~VNを時分割で合流ノードNDMに出力することにより生成された合成電圧を降圧する。 The DC / DC converter 1 steps down the combined voltage generated by outputting the plurality of DC voltages V1 to VN supplied to the plurality of voltage input terminals TM1 to TMN to the junction node NDM in a time division manner.
 電圧出力端子TMoutには、例えば、図示しない負荷が接続される。複数の直流電圧V1~VNの合成電圧を降圧することにより生成された出力電圧Voutは、電圧出力端子TMoutを介して負荷に供給される。 For example, a load (not shown) is connected to the voltage output terminal TMout. The output voltage Vout generated by stepping down the combined voltage of the plurality of DC voltages V1 to VN is supplied to the load via the voltage output terminal TMout.
 キャパシタC1~CNは、入力電圧(直流電圧V1~VN)を保持するための容量素子である。すなわち、キャパシタC1~CNは、電圧入力端子TM1~TMNのそれぞれに供給された電圧を保持する。キャパシタC1の一方の電極は電圧入力端子TM1に電気的に接続され、キャパシタC1の他方の電極は電圧入力端子TM0(基準ノードNDref)に電気的に接続される。キャパシタC2の一方の電極は電圧入力端子TM2に電気的に接続され、キャパシタC2の他方の電極は電圧入力端子TM0に電気的に接続される。同様に、キャパシタCNの一方の電極は電圧入力端子TMNに電気的に接続され、キャパシタCNの他方の電極は電圧入力端子TM0に電気的に接続される。 Capacitors C1 to CN are capacitive elements for holding input voltages (DC voltages V1 to VN). That is, the capacitors C1 to CN hold the voltages supplied to the voltage input terminals TM1 to TMN, respectively. One electrode of the capacitor C1 is electrically connected to the voltage input terminal TM1, and the other electrode of the capacitor C1 is electrically connected to the voltage input terminal TM0 (reference node NDref). One electrode of the capacitor C2 is electrically connected to the voltage input terminal TM2, and the other electrode of the capacitor C2 is electrically connected to the voltage input terminal TM0. Similarly, one electrode of capacitor CN is electrically connected to voltage input terminal TMN, and the other electrode of capacitor CN is electrically connected to voltage input terminal TM0.
 キャパシタCoutは、出力電圧を保持するための容量素子である。すなわち、キャパシタCoutは、電圧出力端子TMoutの出力電圧Voutを保持する。キャパシタCoutの一方の電極は電圧出力端子TMoutに電気的に接続され、キャパシタCoutの他方の電極は電圧入力端子TM0に電気的に接続される。 The capacitor Cout is a capacitive element for holding the output voltage. That is, the capacitor Cout holds the output voltage Vout of the voltage output terminal TMout. One electrode of the capacitor Cout is electrically connected to the voltage output terminal TMout, and the other electrode of the capacitor Cout is electrically connected to the voltage input terminal TM0.
 いくつかの実施形態では、キャパシタC1~CN、Coutの少なくとも1つは、DC/DCコンバータ1の外部に設けられる。例えば、キャパシタC1~CNは、対応する直流電源の電圧出力部に設けられる。例えば、キャパシタCoutは、負荷の電圧入力部に設けられる。 In some embodiments, at least one of the capacitors C1 to CN and Cout is provided outside the DC / DC converter 1. For example, the capacitors C1 to CN are provided in the voltage output unit of the corresponding DC power supply. For example, the capacitor Cout is provided in the voltage input unit of the load.
(直流電圧選択回路10)
 直流電圧選択回路10は、複数の直流電圧V1~VNが供給される複数の電圧入力端子TM1~TMNを時分割で合流ノードNDMに電気的に接続する。それにより、複数の直流電圧V1~VNが時分割で合流ノードNDMに供給される。直流電圧選択回路10は、制御回路100からの制御信号に基づいて電圧入力端子TM1~TMNと合流ノードNDMとを電気的に接続したり遮断したりする。
(DC voltage selection circuit 10)
The DC voltage selection circuit 10 electrically connects a plurality of voltage input terminals TM1 to TMN supplied with a plurality of DC voltages V1 to VN to the junction node NDM in a time division manner. Thus, a plurality of DC voltages V1 to VN are supplied to the junction node NDM in a time division manner. DC voltage selection circuit 10 electrically connects or disconnects voltage input terminals TM1 to TMN and merging node NDM based on a control signal from control circuit 100.
 いくつかの実施形態では、直流電圧選択回路10は、複数の電圧入力端子TM1~TMNのそれぞれに対応して設けられた複数のスイッチ回路を含む。複数のスイッチ回路は、複数の電圧入力端子TM1~TMNのそれぞれと合流ノードNDMとの間に接続される。複数のスイッチ回路の少なくとも1つは、スイッチ素子と、逆電流防止素子とを含む。いくつかの実施形態では、複数のスイッチ回路のそれぞれは、スイッチ素子と、逆電流防止素子とを含む。 In some embodiments, the DC voltage selection circuit 10 includes a plurality of switch circuits provided corresponding to the plurality of voltage input terminals TM1 to TMN, respectively. The plurality of switch circuits are connected between each of the plurality of voltage input terminals TM1 to TMN and the junction node NDM. At least one of the plurality of switch circuits includes a switch element and a reverse current prevention element. In some embodiments, each of the plurality of switch circuits includes a switch element and a reverse current prevention element.
 スイッチ素子は、電圧入力端子と所定の第1ノード(図2参照)との間に接続される。スイッチ素子は、制御回路100からの制御信号に基づいてスイッチ制御される。逆電流防止素子は、第1ノードと合流ノードNDMとの間に接続され、合流ノードNDMから第1ノードに向かう逆電流の発生を防止する。 The switch element is connected between the voltage input terminal and a predetermined first node (see FIG. 2). The switch element is switch-controlled based on a control signal from the control circuit 100. The reverse current prevention element is connected between the first node and the junction node NDM, and prevents the generation of a reverse current from the junction node NDM toward the first node.
 合流ノードNDMには、整流回路20とインダクタ30とが接続されている。 A rectifier circuit 20 and an inductor 30 are connected to the junction node NDM.
(整流回路20)
 整流回路20は、基準ノードNDrefと合流ノードNDMとの間に接続されている。整流回路20は、基準ノードNDrefから合流ノードNDMに向かう電流を通し、合流ノードNDMから基準ノードNDrefに向かう電流を遮断する。整流回路20は、降圧動作時の還流用回路として動作すると共に、合流ノードNDMにおけるサージ電圧の保護回路として動作する。
(Rectifier circuit 20)
The rectifier circuit 20 is connected between the reference node NDref and the junction node NDM. The rectifier circuit 20 passes a current from the reference node NDref to the junction node NDM and cuts off a current from the junction node NDM to the reference node NDref. The rectifier circuit 20 operates as a circuit for reflux during the step-down operation, and also operates as a surge voltage protection circuit at the junction node NDM.
(インダクタ30)
 インダクタ30は、合流ノードNDMと電圧出力端子TMoutとの間に接続されている。
(Inductor 30)
The inductor 30 is connected between the junction node NDM and the voltage output terminal TMout.
 いくつかの実施形態では、インダクタ30に代えて変圧器が設けられる。この場合、変圧器の1次側に整流回路20が並列に接続され、変圧器の2次側に電圧出力端子TMoutが接続される。 In some embodiments, a transformer is provided instead of the inductor 30. In this case, the rectifier circuit 20 is connected in parallel to the primary side of the transformer, and the voltage output terminal TMout is connected to the secondary side of the transformer.
(制御回路100)
 制御回路100は、主として、直流電圧選択回路10を制御する。直流電圧選択回路10がスイッチ回路を含む場合、制御回路100は、スイッチ回路に対して制御信号を出力することによりスイッチ回路のスイッチ制御を行うことが可能である。整流回路20が電界効果トランジスタを含む場合、制御回路100は、当該電界効果トランジスタのゲートを制御することによりスイッチ制御を行うことが可能である。
(Control circuit 100)
The control circuit 100 mainly controls the DC voltage selection circuit 10. When the DC voltage selection circuit 10 includes a switch circuit, the control circuit 100 can perform switch control of the switch circuit by outputting a control signal to the switch circuit. When the rectifier circuit 20 includes a field effect transistor, the control circuit 100 can perform switch control by controlling the gate of the field effect transistor.
 いくつかの実施形態では、制御回路100は、プロセッサを含む。プロセッサの機能は、例えば、CPU(Central Processing Unit)、GPU(Graphics Processing Unit)、ASIC(Application Specific Integrated Circuit)、プログラマブル論理デバイス(例えば、SPLD(Simple Programmable Logic Device)、CPLD(Complex Programmable Logic Device)、FPGA(Field Programmable Gate Array))等の回路により実現される。制御回路100の機能は、例えば、プロセッサが記憶回路や記憶装置に格納されているプログラムを読み出し実行することで実現することが可能である。 In some embodiments, the control circuit 100 includes a processor. The functions of the processor include, for example, a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), an ASIC (Application Specific Integrated Circuit), and a programmable logic device (for example, SPLD (Simple ProgLD). And a circuit such as an FPGA (Field Programmable Gate Array). The function of the control circuit 100 can be realized, for example, by a processor reading and executing a program stored in a storage circuit or a storage device.
 いくつかの実施形態では、直流電圧選択回路10が制御回路100を含み、直流電圧選択回路10が制御回路100の機能を実現する。 In some embodiments, the DC voltage selection circuit 10 includes the control circuit 100, and the DC voltage selection circuit 10 realizes the function of the control circuit 100.
 以下、実施形態に係るDC/DCコンバータ1の構成例について説明する。説明の便宜上、Nが2である場合について説明するが、Nが3以上であっても同様である。 Hereinafter, a configuration example of the DC / DC converter 1 according to the embodiment will be described. For convenience of explanation, the case where N is 2 will be described, but the same applies even if N is 3 or more.
<<第1構成例>>
 図2に、実施形態に係るDC/DCコンバータ1の第1構成例を示す。図2において、図1と同様の部分には同一符号を付し、適宜説明を省略する。
<< First Configuration Example >>
FIG. 2 shows a first configuration example of the DC / DC converter 1 according to the embodiment. In FIG. 2, the same parts as those in FIG.
 第1構成例において、直流電圧選択回路10は、電圧入力端子TM1~TM2のそれぞれに対応して設けられたスイッチ回路SW1、SW2を含む。 In the first configuration example, the DC voltage selection circuit 10 includes switch circuits SW1 and SW2 provided corresponding to the voltage input terminals TM1 and TM2, respectively.
 スイッチ回路SW1は、第1電界効果トランジスタTr11と、第2電界効果トランジスタTr12とを含む。第1電界効果トランジスタTr11及び第2電界効果トランジスタTr12のそれぞれは、Nチャネル型のMOSFET(Metal Oxide Semiconductor Field Effect Transistor)である。 The switch circuit SW1 includes a first field effect transistor Tr11 and a second field effect transistor Tr12. Each of the first field effect transistor Tr11 and the second field effect transistor Tr12 is an N-channel type MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
 第1電界効果トランジスタTr11及び第2電界効果トランジスタTr12は、いわゆる背中合わせ(back-to-back)に接続される。すなわち、第1電界効果トランジスタTr11のドレインが電圧入力端子TM1に電気的に接続され、ソースが第1ノードND1に電気的に接続される。第1電界効果トランジスタTr11には、ソースとドレインとの間にボディダイオードが形成される。ボディダイオードのアノードは、電界効果トランジスタのソースであり、カソードは電界効果トランジスタのドレインである。また、第2電界効果トランジスタTr12のソースが第1ノードND1に電気的に接続され、ドレインが合流ノードNDMに電気的に接続される。第2電界効果トランジスタTr12には、ソースとドレインとの間にボディダイオードが形成される。第2電界効果トランジスタTr12のソースとドレインとの間に形成されたボディダイオードが、上記の逆電流防止素子として機能する。 The first field effect transistor Tr11 and the second field effect transistor Tr12 are connected so-called back-to-back. That is, the drain of the first field effect transistor Tr11 is electrically connected to the voltage input terminal TM1, and the source is electrically connected to the first node ND1. In the first field effect transistor Tr11, a body diode is formed between the source and the drain. The anode of the body diode is the source of the field effect transistor, and the cathode is the drain of the field effect transistor. Further, the source of the second field effect transistor Tr12 is electrically connected to the first node ND1, and the drain is electrically connected to the junction node NDM. In the second field effect transistor Tr12, a body diode is formed between the source and the drain. A body diode formed between the source and drain of the second field effect transistor Tr12 functions as the reverse current prevention element.
 第1電界効果トランジスタTr11のゲート及び第2の電界効果トランジスタTr12のゲートには、制御回路100からのゲート信号(制御信号)G1が供給される。 The gate signal (control signal) G1 from the control circuit 100 is supplied to the gate of the first field effect transistor Tr11 and the gate of the second field effect transistor Tr12.
 ゲート信号G1がオン電圧のとき、第1電界効果トランジスタTr11のソース・ドレイン間が導通状態になり、第2電界効果トランジスタTr12のソース・ドレイン間が導通状態になる。このとき、各電界効果トランジスタでは、電圧入力端子TM1と合流ノードNDMとの間の電流は、よりインピーダンスが低いソース・ドレイン間を経由する。 When the gate signal G1 is on-voltage, the source and drain of the first field effect transistor Tr11 are in a conducting state, and the source and drain of the second field effect transistor Tr12 are in a conducting state. At this time, in each field effect transistor, the current between the voltage input terminal TM1 and the junction node NDM passes between the source and the drain having a lower impedance.
 ゲート信号G1がオフ電圧のとき、第1電界効果トランジスタTr11のソース・ドレイン間が非導通状態になり、第2電界効果トランジスタTr12のソース・ドレイン間が非導通状態になる。直流電圧V1が合流ノードNDMにおける電圧(合成電圧)より高い場合、第1電界効果トランジスタTr11に形成されたボディダイオードによって合流ノードNDMに向かって流れる電流を遮断することができる。直流電圧V1が合流ノードNDMにおける電圧より低い場合、第2電界効果トランジスタTr12に形成されたボディダイオードによって電圧入力端子TM1に向かって流れる電流(逆電流)を遮断することができる。この場合、電圧流入力端子TM1に接続された直流電源における逆電流に起因した損傷を回避することができる。 When the gate signal G1 is an off voltage, the source and drain of the first field effect transistor Tr11 are in a non-conductive state, and the source and drain of the second field effect transistor Tr12 are in a non-conductive state. When the DC voltage V1 is higher than the voltage (combined voltage) at the junction node NDM, the current flowing toward the junction node NDM can be blocked by the body diode formed in the first field effect transistor Tr11. When the DC voltage V1 is lower than the voltage at the junction node NDM, the current (reverse current) flowing toward the voltage input terminal TM1 can be blocked by the body diode formed in the second field effect transistor Tr12. In this case, damage due to the reverse current in the DC power supply connected to the voltage flow input terminal TM1 can be avoided.
 スイッチ回路SW2は、スイッチ回路SW1と同様の構成を有する。すなわち、スイッチ回路SW2もまた、第1電界効果トランジスタTr21と、第2電界効果トランジスタTr22とを含む。第1電界効果トランジスタTr21及び第2電界効果トランジスタTr22のそれぞれは、Nチャネル型のMOSFETである。第1電界効果トランジスタTr21及び第2電界効果トランジスタTr22は、いわゆる背中合わせに接続される。 The switch circuit SW2 has the same configuration as the switch circuit SW1. That is, the switch circuit SW2 also includes a first field effect transistor Tr21 and a second field effect transistor Tr22. Each of the first field effect transistor Tr21 and the second field effect transistor Tr22 is an N-channel MOSFET. The first field effect transistor Tr21 and the second field effect transistor Tr22 are connected back to back.
 第1電界効果トランジスタTr21のゲート及び第2電界効果トランジスタTr22のゲートには、制御回路100からのゲート信号G2が供給される。 The gate signal G2 from the control circuit 100 is supplied to the gate of the first field effect transistor Tr21 and the gate of the second field effect transistor Tr22.
 制御回路100は、ゲート信号G1のパルス幅を制御することによりスイッチ回路SW1のスイッチ制御を行う。また、制御回路100は、ゲート信号G2のパルス幅を制御することによりスイッチ回路SW2のスイッチ制御を行う。 The control circuit 100 performs switch control of the switch circuit SW1 by controlling the pulse width of the gate signal G1. Further, the control circuit 100 controls the switch circuit SW2 by controlling the pulse width of the gate signal G2.
 整流回路20は、ダイオード21を含む。ダイオード21のアノードは、基準ノードNDrefに電気的に接続され、カソードは合流ノードNDMに電気的に接続される。 The rectifier circuit 20 includes a diode 21. The anode of the diode 21 is electrically connected to the reference node NDref, and the cathode is electrically connected to the junction node NDM.
 図3に、ゲート信号G1、G2のタイミングの一例を模式的に示す。図3において、横軸は時間を表し、縦軸は信号レベル(電圧)を表す。図3では、ゲート信号G1、G2の高電位側電圧をオン電圧とし、低電位側電圧をオフ電圧として表されている。 FIG. 3 schematically shows an example of the timing of the gate signals G1 and G2. In FIG. 3, the horizontal axis represents time, and the vertical axis represents signal level (voltage). In FIG. 3, the high potential side voltages of the gate signals G1 and G2 are represented as ON voltages, and the low potential side voltages are represented as OFF voltages.
 制御回路100は、オン電圧の期間が重複しない周期Tのパルス信号をゲート信号G1、G2として出力する。ゲート信号G1、G2において、高電位側電圧はオン電圧であり、低電位側電圧はオフ電圧である。図3では、制御回路100は、ゲート信号G1のパルス(パルス幅Ton1)とゲート信号G2のパルス(パルス幅Ton2)との間にデッドタイムTd1(Td1>0)を設けてゲート信号G1、G2を出力することができる。また、制御回路100は、ゲート信号G2のパルスとゲート信号G1のパルスとの間のデッドタイムTd2(Td2>0)を設けてゲート信号G1、G2を出力することができる。いくつかの実施形態では、デッドタイムTd2はデッドタイムTd1と略同一である。 The control circuit 100 outputs, as gate signals G1 and G2, pulse signals having a period T in which the on-voltage periods do not overlap. In the gate signals G1 and G2, the high potential side voltage is an on voltage, and the low potential side voltage is an off voltage. In FIG. 3, the control circuit 100 provides a dead time Td1 (Td1> 0) between the pulse of the gate signal G1 (pulse width Ton1) and the pulse of the gate signal G2 (pulse width Ton2), and the gate signals G1, G2 Can be output. Further, the control circuit 100 can output the gate signals G1 and G2 by providing a dead time Td2 (Td2> 0) between the pulse of the gate signal G2 and the pulse of the gate signal G1. In some embodiments, the dead time Td2 is substantially the same as the dead time Td1.
 いくつかの実施形態では、制御回路100は、ゲート信号G1、G2の波形を設定するための制御レジスタを含む。制御レジスタには、プロセッサ等からアクセスすることによりゲート信号毎に波形を設定するための設定情報が設定される。設定情報には、例えば、パルスの周期、基準タイミングを基準としたパルスの立ち上がりタイミング、及びパルス幅などがある。制御回路100は、このような制御レジスタの設定情報に対応したパルス信号をゲート信号として出力することができる。いくつかの実施形態では、制御レジスタには、ゲート信号G1、G2のパルス間のデッドタイムが設定される。この場合、ゲート信号G1のパルスとゲート信号G2のパルスとの間に、制御レジスタに設定されたデッドタイムが設けられる。 In some embodiments, the control circuit 100 includes a control register for setting the waveforms of the gate signals G1, G2. Setting information for setting a waveform for each gate signal is set in the control register by accessing from a processor or the like. The setting information includes, for example, a pulse period, a pulse rising timing based on a reference timing, and a pulse width. The control circuit 100 can output a pulse signal corresponding to such control register setting information as a gate signal. In some embodiments, the control register is set to the dead time between the pulses of the gate signals G1, G2. In this case, a dead time set in the control register is provided between the pulse of the gate signal G1 and the pulse of the gate signal G2.
 図3に示すようなゲート信号G1、G2がスイッチ回路SW1、SW2に供給されると、合流ノードNDMには直流電圧V1、V2が時分割で供給される。インダクタ30は、電流に対応した磁気エネルギーを蓄積する。このとき、ダイオード21は、還流ダイオード(freewheel diode)として基準ノードNDrefから合流ノードNDMに向かう電流を還流させる。また、ダイオード21は、サージ電圧保護回路として、デッドタイムにおける合流ノードNDMのサージ電圧に対するスイッチ回路SW1、SW2等を保護する。 When the gate signals G1 and G2 as shown in FIG. 3 are supplied to the switch circuits SW1 and SW2, the DC voltages V1 and V2 are supplied to the junction node NDM in a time division manner. The inductor 30 stores magnetic energy corresponding to the current. At this time, the diode 21 circulates a current from the reference node NDref to the merging node NDM as a freewheeling diode. Further, the diode 21 serves as a surge voltage protection circuit and protects the switch circuits SW1, SW2, and the like against the surge voltage of the junction node NDM during the dead time.
 ゲート信号G1のパルス幅をTon1とし、ゲート信号G2のパルス幅をTon2とすると、出力電圧Voutは、以下の式で表される。 When the pulse width of the gate signal G1 is Ton1, and the pulse width of the gate signal G2 is Ton2, the output voltage Vout is expressed by the following equation.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
 例えば、ゲート信号G1、G2のデューティ比を変更することにより、出力電圧Voutを所望の電圧に設定することができる。 For example, the output voltage Vout can be set to a desired voltage by changing the duty ratio of the gate signals G1 and G2.
 いくつかの実施形態では、制御回路100は、所定の期間内に所定のパルス幅を有するパルスの数を変更可能なゲート信号G1、G2を出力する。この場合、パルス数を変更することにより、複数の直流電源から供給されるエネルギーを調整し、出力電圧Voutを所望の電圧に設定することができる。 In some embodiments, the control circuit 100 outputs gate signals G1 and G2 that can change the number of pulses having a predetermined pulse width within a predetermined period. In this case, by changing the number of pulses, the energy supplied from a plurality of DC power supplies can be adjusted, and the output voltage Vout can be set to a desired voltage.
 図4及び図5に、第1構成例に係るDC/DCコンバータ1の動作シミュレーションの一例を示す。図5が図4と異なる点は、ゲート信号G1、G2のパルスの間のデッドタイムである。 4 and 5 show an example of an operation simulation of the DC / DC converter 1 according to the first configuration example. 5 differs from FIG. 4 in the dead time between the pulses of the gate signals G1 and G2.
 図4及び図5では、直流電圧V1は10[V]であり、直流電圧V2は5[V]である。なお、図4及び図5において、スイッチ回路SW1に流れる電流ISW1と表し、スイッチ回路SW2に流れる電流をISW2と表し、ダイオード21に流れる電流をIと表し、インダクタ30に流れる電流をIと表し、合流ノードNDMにおける合成電圧をVNDMと表す。電流ISW1は、第1電界効果トランジスタTr11のソースから第2電界効果トランジスタTr12のソースに流れる電流である。電流ISW2は、第1電界効果トランジスタTr21のソースから第2電界効果トランジスタTr22のソースに流れる電流である。 4 and 5, the DC voltage V1 is 10 [V], and the DC voltage V2 is 5 [V]. 4 and 5, the current I SW1 flowing through the switch circuit SW1, the current flowing through the switch circuit SW2 is represented as I SW2 , the current flowing through the diode 21 is represented as ID, and the current flowing through the inductor 30 is represented by I L and represents, represents a synthetic voltage in the combined node NDM and V NDM. The current ISW1 is a current that flows from the source of the first field effect transistor Tr11 to the source of the second field effect transistor Tr12. The current ISW2 is a current that flows from the source of the first field effect transistor Tr21 to the source of the second field effect transistor Tr22.
 図4及び図5に示すように、ゲート信号G1、G2によりスイッチ回路SW1、SW2のそれぞれが導通状態から非導通状態になったときにサージ電圧が発生し、ダイオード21を経由してサージ電流が流れる。また、スイッチ回路SW1、SW2が共に非導通状態に設定されたとき、ダイオード21を経由して還流電流が流れる。 As shown in FIGS. 4 and 5, a surge voltage is generated when each of the switch circuits SW1 and SW2 is changed from the conductive state to the nonconductive state by the gate signals G1 and G2, and the surge current is generated via the diode 21. Flowing. Further, when both the switch circuits SW1 and SW2 are set to the non-conductive state, a reflux current flows through the diode 21.
 図4及び図5では、Ton1/T=Ton2/T=0.2であるため、出力電圧Voutとして式(1)に示すように3.0[V]が出力される。 4 and 5, since Ton1 / T = Ton2 / T = 0.2, 3.0 [V] is output as the output voltage Vout as shown in Expression (1).
<<第2構成例>>
 第1構成例では、MOSFETに形成されたボディダイオードを逆電流防止素子として利用する場合について説明したが、実施形態に係るDC/DCコンバータ1の構成は第1構成例に示す構成に限定されるものではない。
<< Second Configuration Example >>
In the first configuration example, the case where the body diode formed in the MOSFET is used as a reverse current prevention element has been described. However, the configuration of the DC / DC converter 1 according to the embodiment is limited to the configuration shown in the first configuration example. It is not a thing.
 図6に、実施形態に係るDC/DCコンバータ1の第2構成例を示す。図6において、図2と同様の部分には同一符号を付し、適宜説明を省略する。 FIG. 6 shows a second configuration example of the DC / DC converter 1 according to the embodiment. In FIG. 6, the same parts as those in FIG.
 第2構成例におけるDC/DCコンバータ1の構成が第1構成例におけるDC/DCコンバータ1の構成と異なる点は、スイッチ回路SW1、SW2の構成である。第2構成例におけるスイッチ回路SW1の構成が第1構成例におけるスイッチ回路SW1の構成と異なる点は、第2電界効果トランジスタTr12に代えてダイオードD1が設けられている点である。同様に、第2構成例におけるスイッチ回路SW2の構成が第1構成例におけるスイッチ回路SW2の構成と異なる点は、第2電界効果トランジスタTr22に代えてダイオードD2が設けられている点である。 The configuration of the DC / DC converter 1 in the second configuration example is different from the configuration of the DC / DC converter 1 in the first configuration example in the configuration of the switch circuits SW1 and SW2. The configuration of the switch circuit SW1 in the second configuration example is different from the configuration of the switch circuit SW1 in the first configuration example in that a diode D1 is provided instead of the second field effect transistor Tr12. Similarly, the configuration of the switch circuit SW2 in the second configuration example is different from the configuration of the switch circuit SW2 in the first configuration example in that a diode D2 is provided instead of the second field effect transistor Tr22.
 ダイオードD1のアノードは、第1電界効果トランジスタTr11のソース(第1ノード)に電気的に接続され、カソードは合流ノードNDMに電気的に接続される。制御回路100からのゲート信号G1は、第1電界効果トランジスタTr11のゲートだけに供給される。 The anode of the diode D1 is electrically connected to the source (first node) of the first field effect transistor Tr11, and the cathode is electrically connected to the junction node NDM. The gate signal G1 from the control circuit 100 is supplied only to the gate of the first field effect transistor Tr11.
 同様に、ダイオードD2のアノードは、第1電界効果トランジスタTr21のソース(第1ノード)に電気的に接続され、カソードは合流ノードNDMに電気的に接続される。制御回路100からのゲート信号G2は、第1電界効果トランジスタTr21のゲートだけに供給される。 Similarly, the anode of the diode D2 is electrically connected to the source (first node) of the first field effect transistor Tr21, and the cathode is electrically connected to the junction node NDM. The gate signal G2 from the control circuit 100 is supplied only to the gate of the first field effect transistor Tr21.
 第2構成例において、ダイオードD1、D2は、逆電流防止素子として機能する。 In the second configuration example, the diodes D1 and D2 function as reverse current prevention elements.
 ゲート信号G1がオン電圧のとき、第1電界効果トランジスタTr11のソース・ドレインの間が導通状態になる。このとき、第1電界効果トランジスタTr11では、電圧入力端子TM1と合流ノードNDMとの間の電流は、よりインピーダンスが低い第1電界効果トランジスタTr11のソース・ドレイン間を経由する。 When the gate signal G1 is on-voltage, the source / drain of the first field effect transistor Tr11 is in a conductive state. At this time, in the first field effect transistor Tr11, the current between the voltage input terminal TM1 and the junction node NDM passes between the source and drain of the first field effect transistor Tr11 having a lower impedance.
 ゲート信号G1がオフ電圧のとき、第1電界効果トランジスタTr11のソース・ドレイン間が非導通状態になる。直流電圧V1が合流ノードNDMにおける電圧より高い場合、第1電界効果トランジスタTr11に形成されたボディダイオードによって合流ノードNDMに向かって流れる電流を遮断することができる。直流電圧V1が合流ノードNDMにおける電圧より低い場合、ダイオードD1によって電圧入力端子TM1(又は電圧流入力端子TM1に接続された直流電源)に向かって流れる電流(逆電流)を遮断することができる。 When the gate signal G1 is an off voltage, the source and drain of the first field effect transistor Tr11 are in a non-conductive state. When the DC voltage V1 is higher than the voltage at the junction node NDM, the current flowing toward the junction node NDM can be blocked by the body diode formed in the first field effect transistor Tr11. When the DC voltage V1 is lower than the voltage at the junction node NDM, the current (reverse current) flowing toward the voltage input terminal TM1 (or the DC power source connected to the voltage flow input terminal TM1) can be blocked by the diode D1.
 第2構成例において、第1構成例と同様に、図3に示すゲート信号G1、G2により合流ノードNDMには直流電圧V1、V2が時分割で供給される。その結果、式(1)に示すような出力電圧Voutが生成される。例えば、ゲート信号G1、G2のデューティ比を変更することにより、出力電圧Voutを所望の電圧に設定することができる。 In the second configuration example, as in the first configuration example, DC voltages V1 and V2 are supplied to the junction node NDM in a time division manner by the gate signals G1 and G2 shown in FIG. As a result, an output voltage Vout as shown in Expression (1) is generated. For example, the output voltage Vout can be set to a desired voltage by changing the duty ratio of the gate signals G1 and G2.
<<第3構成例>>
 第1構成例及び第2構成例では、整流回路20がダイオード21を含む場合について説明したが、実施形態に係るDC/DCコンバータ1の構成は第1構成例及び第2構成例に示す構成に限定されるものではない。
<< Third Configuration Example >>
In the first configuration example and the second configuration example, the case where the rectifier circuit 20 includes the diode 21 has been described. However, the configuration of the DC / DC converter 1 according to the embodiment is the configuration shown in the first configuration example and the second configuration example. It is not limited.
 図7に、実施形態に係るDC/DCコンバータ1の第3構成例を示す。図7において、図2と同様の部分には同一符号を付し、適宜説明を省略する。 FIG. 7 shows a third configuration example of the DC / DC converter 1 according to the embodiment. In FIG. 7, the same parts as those in FIG.
 第3構成例におけるDC/DCコンバータ1の構成が第1構成例におけるDC/DCコンバータ1の構成と異なる点は、整流回路20の構成である。第3構成例における整流回路20の構成が第1構成例における整流回路20の構成と異なる点は、ダイオード21に代えてスイッチ素子が設けられている点である。スイッチ素子は、同期整流素子として機能する。 The configuration of the DC / DC converter 1 in the third configuration example is different from the configuration of the DC / DC converter 1 in the first configuration example in the configuration of the rectifier circuit 20. The configuration of the rectifier circuit 20 in the third configuration example is different from the configuration of the rectifier circuit 20 in the first configuration example in that a switch element is provided instead of the diode 21. The switch element functions as a synchronous rectifier element.
 第3構成例に係る整流回路20は、スイッチ素子として第3電界効果トランジスタTr31を含む。第3電界効果トランジスタTr31は、Nチャネル型のMOSFETである。第3電界効果トランジスタTr31のドレインが合流ノードNDMに電気的に接続され、ソースが基準ノードNDrefに電気的に接続される。第3電界効果トランジスタTr31には、ソースとドレインとの間にボディダイオードが形成される。 The rectifier circuit 20 according to the third configuration example includes a third field effect transistor Tr31 as a switch element. The third field effect transistor Tr31 is an N-channel type MOSFET. The drain of the third field effect transistor Tr31 is electrically connected to the junction node NDM, and the source is electrically connected to the reference node NDref. In the third field effect transistor Tr31, a body diode is formed between the source and the drain.
 第3構成例において、第3電界効果トランジスタTr31のゲートには、制御回路100からのゲート信号G3が供給される。ゲート信号G3がオン電圧のとき、第3電界効果トランジスタTr31のソース・ドレイン間が導通状態になり、ゲート信号G3がオフ電圧のとき、第3電界効果トランジスタTr31のソース・ドレイン間が非導通状態になる。第3電界効果トランジスタTr31に形成されたボディダイオードは、ダイオード21と同様の機能を有する。 In the third configuration example, the gate signal G3 from the control circuit 100 is supplied to the gate of the third field effect transistor Tr31. When the gate signal G3 is on-voltage, the source and drain of the third field effect transistor Tr31 are in a conducting state, and when the gate signal G3 is off-voltage, the source and drain of the third field effect transistor Tr31 are in a non-conducting state. become. The body diode formed in the third field effect transistor Tr31 has the same function as the diode 21.
 図8に、ゲート信号G1、G2、G3のタイミングの一例を模式的に示す。図8において、図3と同様に、横軸は時間を表し、縦軸は信号レベル(電圧)を表す。図8においても、ゲート信号G1、G2、G3の高電位側電圧をオン電圧とし、低電位側電圧をオフ電圧として表されている。 FIG. 8 schematically shows an example of the timing of the gate signals G1, G2, and G3. In FIG. 8, as in FIG. 3, the horizontal axis represents time, and the vertical axis represents signal level (voltage). Also in FIG. 8, the high potential side voltages of the gate signals G1, G2, and G3 are represented as ON voltages, and the low potential side voltages are represented as OFF voltages.
 制御回路100は、図3と同様に、オン電圧の期間が重複しない周期Tのパルス信号をゲート信号G1、G2として出力する。制御回路100は、ゲート信号G1、G2に同期したパルスを有するゲート信号G3を出力する。制御回路100は、ゲート信号G1、G2の双方がオフ電圧のときにオン電圧となるパルスを有する周期Tのゲート信号G3を出力する。 The control circuit 100 outputs, as the gate signals G1 and G2, pulse signals having a period T in which the ON voltage periods do not overlap as in FIG. The control circuit 100 outputs a gate signal G3 having a pulse synchronized with the gate signals G1 and G2. The control circuit 100 outputs a gate signal G3 having a period T having a pulse that is turned on when both the gate signals G1 and G2 are turned off.
 いくつかの実施形態では、第1構成例と同様に、制御回路100は、制御レジスタの設定情報に対応した波形を有するゲート信号G3を出力する。いくつかの実施形態では、制御回路100は、制御レジスタにおいて設定されたゲート信号G1、G2の波形に基づいて、ゲート信号G1、G2の双方がオフ電圧のときにオン電圧となるゲート信号G3を出力する。 In some embodiments, as in the first configuration example, the control circuit 100 outputs a gate signal G3 having a waveform corresponding to the setting information of the control register. In some embodiments, the control circuit 100 generates a gate signal G3 that is turned on when both the gate signals G1 and G2 are off based on the waveforms of the gate signals G1 and G2 set in the control register. Output.
 図8に示すようなゲート信号G1、G2がスイッチ回路SW1、SW2に供給されると、合流ノードNDMには直流電圧V1、V2が時分割で供給される。インダクタ30は、電流に対応した磁気エネルギーを蓄積する。このとき、ゲート信号G3がオン電圧のとき、第3電界効果トランジスタTr31のソース・ドレイン間を経由して基準ノードNDrefから合流ノードNDMに向かう電流が還流する。ゲート信号G3がオフ電圧のとき、第3電界効果トランジスタTr31のソース・ドレイン間が非導通状態になり、第3電界効果トランジスタTr31に形成されたボディダイオードがダイオード21と同様に還流ダイオード及びサージ電圧保護回路として機能する。 When the gate signals G1 and G2 as shown in FIG. 8 are supplied to the switch circuits SW1 and SW2, the DC voltages V1 and V2 are supplied to the junction node NDM in a time division manner. The inductor 30 stores magnetic energy corresponding to the current. At this time, when the gate signal G3 is an on-voltage, the current flowing from the reference node NDref to the junction node NDM flows through between the source and drain of the third field effect transistor Tr31. When the gate signal G3 is an off-voltage, the source and drain of the third field effect transistor Tr31 are in a non-conductive state, and the body diode formed in the third field effect transistor Tr31 is a freewheeling diode and a surge voltage as in the diode 21. Functions as a protection circuit.
 第1構成例と同様に、ゲート信号G1のパルス幅をTon1とし、ゲート信号G2のパルス幅をTon2とすると、出力電圧Voutは、式(1)のように表される。 As in the first configuration example, assuming that the pulse width of the gate signal G1 is Ton1 and the pulse width of the gate signal G2 is Ton2, the output voltage Vout is expressed as in Expression (1).
 第3構成例によれば、整流回路20が、第1構成例のようなダイオード21の電圧降下を伴うことなく電流を還流させることができるので、電圧変換の効率を向上させることができる。 According to the third configuration example, since the rectifier circuit 20 can return the current without the voltage drop of the diode 21 as in the first configuration example, the efficiency of voltage conversion can be improved.
 図9に、第3構成例に係るDC/DCコンバータ1の動作シミュレーションの一例を示す。 FIG. 9 shows an example of an operation simulation of the DC / DC converter 1 according to the third configuration example.
 図9では、直流電圧V1は10[V]であり、直流電圧V2は5[V]である。なお、図9において、スイッチ回路SW1に流れる電流ISW1と表し、スイッチ回路SW2に流れる電流をISW2と表し、スイッチ素子に流れる電流をISW3と表し、インダクタ30に流れる電流をIと表し、合流ノードNDMにおける合成電圧をVNDMと表す。電流ISW1は、第1電界効果トランジスタTr11のソースから第2電界効果トランジスタTr12のソースに流れる電流である。電流ISW2は、第1電界効果トランジスタTr21のソースから第2電界効果トランジスタTr22のソースに流れる電流である。電流ISW3は、第3電界効果トランジスタTr31のソース・ドレイン間(又はボディダイオード)に流れる電流である。 In FIG. 9, the DC voltage V1 is 10 [V], and the DC voltage V2 is 5 [V]. Note that in FIG. 9 represents a current I SW1 through the switch circuit SW1, represents the current flowing through the switch circuit SW2 and I SW2, a current flowing through the switching element represents a I SW3, a current flowing through the inductor 30 represents the I L The combined voltage at the junction node NDM is represented as V NDM . The current ISW1 is a current that flows from the source of the first field effect transistor Tr11 to the source of the second field effect transistor Tr12. The current ISW2 is a current that flows from the source of the first field effect transistor Tr21 to the source of the second field effect transistor Tr22. Current I SW3 is a current flowing between the source and drain of the third field effect transistor Tr31 (or body diode).
 図9に示すように、ゲート信号G1、G2によりスイッチ回路SW1、SW2のそれぞれが導通状態から非導通状態になったときに発生するサージ電流が第3電界効果トランジスタTr31のソース・ドレイン間(又はボディダイオード)を経由して流れる。また、スイッチ回路SW1、SW2が共に非導通状態に設定されたとき、ゲート信号G3により第3電界効果トランジスタTr31を導通状態に設定することで、第3電界効果トランジスタTr31のソース・ドレイン間を経由して還流電流が流れる。 As shown in FIG. 9, a surge current generated when each of the switch circuits SW1 and SW2 is changed from the conductive state to the nonconductive state by the gate signals G1 and G2 is generated between the source and the drain of the third field effect transistor Tr31 (or Flows through the body diode). Further, when both the switch circuits SW1 and SW2 are set to the non-conductive state, the third field effect transistor Tr31 is set to the conductive state by the gate signal G3, thereby passing between the source and the drain of the third field effect transistor Tr31. As a result, a reflux current flows.
 図9においても、Ton1/T=Ton2/T=0.2であるため、出力電圧Voutとして式(1)に示すように3.0[V]が出力される。 Also in FIG. 9, since Ton1 / T = Ton2 / T = 0.2, 3.0 [V] is output as the output voltage Vout as shown in Expression (1).
<<第4構成例>>
 第1構成例~第3構成例では、複数の直流電圧が時分割で供給された合流ノードNDMにおける合成電圧を降圧する場合について説明したが、実施形態に係るDC/DCコンバータ1の構成は図1に示す構成や第1構成例~第3構成例に示す構成に限定されるものではない。
<< Fourth Configuration Example >>
In the first configuration example to the third configuration example, the case has been described in which the combined voltage at the junction node NDM to which a plurality of DC voltages are supplied in a time division manner is stepped down, but the configuration of the DC / DC converter 1 according to the embodiment is not The configuration shown in FIG. 1 and the configurations shown in the first to third configuration examples are not limited.
 第4構成例に係るDC/DCコンバータ1は、第1構成例~第3構成例に示す構成にダイオード及びスイッチ回路を追加することにより、合流ノードNDMにおける合成電圧を昇圧することができる。以下、第4構成例について、第1構成例に係るDC/DCコンバータ1にダイオード及びスイッチ回路を追加した場合について説明するが、第2構成例又は第3構成例に係るDC/DCコンバータ1にダイオード及びスイッチ回路を追加した場合でも同様である。 The DC / DC converter 1 according to the fourth configuration example can boost the combined voltage at the junction node NDM by adding a diode and a switch circuit to the configurations shown in the first configuration example to the third configuration example. Hereinafter, a case where a diode and a switch circuit are added to the DC / DC converter 1 according to the first configuration example will be described with respect to the fourth configuration example, but the DC / DC converter 1 according to the second configuration example or the third configuration example will be described. The same applies when a diode and a switch circuit are added.
 図10に、実施形態に係るDC/DCコンバータ1の第4構成例を示す。図10において、図2と同様の部分には同一符号を付し、適宜説明を省略する。 FIG. 10 shows a fourth configuration example of the DC / DC converter 1 according to the embodiment. 10, parts that are the same as those in FIG. 2 are given the same reference numerals, and explanation thereof is omitted as appropriate.
 第4構成例におけるDC/DCコンバータ1の構成が第1構成例におけるDC/DCコンバータ1の構成と異なる点は、第1構成例におけるDC/DCコンバータ1に昇圧用ダイオード40及び昇圧用スイッチ回路SW10が追加された点である。昇圧用ダイオード40は、インダクタ30の出力側端子にアノードが電気的に接続され、電圧出力端子TMoutにカソードが電気的に接続される。昇圧用スイッチ回路SW10は、インダクタ30の出力側端子と基準ノードNDrefとの間に接続される。昇圧用スイッチ回路SW10は、制御回路100からの制御信号によりスイッチ制御される。 The configuration of the DC / DC converter 1 in the fourth configuration example is different from the configuration of the DC / DC converter 1 in the first configuration example. The DC / DC converter 1 in the first configuration example includes a boost diode 40 and a boost switch circuit. This is a point where SW10 is added. The step-up diode 40 has an anode electrically connected to the output side terminal of the inductor 30 and a cathode electrically connected to the voltage output terminal TMout. Boosting switch circuit SW10 is connected between the output-side terminal of inductor 30 and reference node NDref. The step-up switch circuit SW10 is switch-controlled by a control signal from the control circuit 100.
 昇圧用スイッチ回路SW10は、電界効果トランジスタTr101を含む。電界効果トランジスタTr101は、Nチャネル型のMOSFETである。電界効果トランジスタTr101のドレインがインダクタ30の出力側端子に電気的に接続され、ソースが基準ノードNDrefに電気的に接続される。電界効果トランジスタTr101には、ソースとドレインとの間にボディダイオードが形成される。 The step-up switch circuit SW10 includes a field effect transistor Tr101. The field effect transistor Tr101 is an N-channel type MOSFET. The drain of the field effect transistor Tr101 is electrically connected to the output side terminal of the inductor 30, and the source is electrically connected to the reference node NDref. In the field effect transistor Tr101, a body diode is formed between the source and the drain.
 第4構成例において、電界効果トランジスタTr101のゲートには、制御回路100からのゲート信号G10が供給される。制御回路100は、昇圧比に応じたデューティ比を有するパルス信号をゲート信号G10として出力する。ゲート信号G10がオン電圧のとき、電界効果トランジスタTr101のソース・ドレイン間が導通状態になり、ゲート信号G10がオフ電圧のとき、電界効果トランジスタTr101のソース・ドレイン間が非導通状態になる。 In the fourth configuration example, the gate signal G10 from the control circuit 100 is supplied to the gate of the field effect transistor Tr101. The control circuit 100 outputs a pulse signal having a duty ratio corresponding to the boost ratio as the gate signal G10. When the gate signal G10 is on-voltage, the source and drain of the field effect transistor Tr101 are conductive, and when the gate signal G10 is off-voltage, the source and drain of the field effect transistor Tr101 are non-conductive.
 図11に、ゲート信号G1、G2、G10のタイミングの一例を模式的に示す。図11において、横軸は時間を表し、縦軸は信号レベル(電圧)を表す。図11においても、ゲート信号G1、G2、G10の高電位側電圧をオン電圧とし、低電位側電圧をオフ電圧として表されている。 FIG. 11 schematically shows an example of the timing of the gate signals G1, G2, and G10. In FIG. 11, the horizontal axis represents time, and the vertical axis represents signal level (voltage). Also in FIG. 11, the high potential side voltages of the gate signals G1, G2, and G10 are represented as ON voltages, and the low potential side voltages are represented as OFF voltages.
 制御回路100は、第1構成例で説明したように、合流ノードNDMにおける電圧を所望の合成電圧にするように周期T1のパルス信号をゲート信号G1、G2として出力する。制御回路100は、周期T2のパルス信号をゲート信号G10として出力する。いくつかの実施形態では、ゲート信号G1、G2とゲート信号G10とは非同期である。 As described in the first configuration example, the control circuit 100 outputs a pulse signal having a period T1 as the gate signals G1 and G2 so that the voltage at the confluence node NDM becomes a desired combined voltage. The control circuit 100 outputs a pulse signal having a period T2 as a gate signal G10. In some embodiments, the gate signals G1, G2 and the gate signal G10 are asynchronous.
 いくつかの実施形態では、制御回路100は、ゲート信号G10の波形を設定するための制御レジスタを含む。制御レジスタには、パルスの周期、基準タイミングを基準としたパルスの立ち上がりタイミング、及びパルス幅等が設定される。制御回路100は、このような制御レジスタの設定情報(設定内容)に対応したパルス信号をゲート信号G10として出力することができる。 In some embodiments, the control circuit 100 includes a control register for setting the waveform of the gate signal G10. In the control register, a pulse cycle, a pulse rising timing based on a reference timing, a pulse width, and the like are set. The control circuit 100 can output a pulse signal corresponding to such setting information (setting contents) of the control register as the gate signal G10.
 図11に示すようなゲート信号G1、G2がスイッチ回路SW1、SW2に供給されると、合流ノードNDMには直流電圧V1、V2が時分割で供給される。インダクタ30は、電流に対応した磁気エネルギーを蓄積する。ゲート信号G10がオン電圧のとき、インダクタ30に蓄積された磁気エネルギーにより発生した電流は電界効果トランジスタTr101のソース・ドレイン間を流れる。ゲート信号G10がオフ電圧のとき、インダクタ30に蓄積された磁気エネルギーにより発生した電流が昇圧用ダイオード40を介して流れ、電圧出力端子TMoutに出力電圧Voutが発生する。 When the gate signals G1 and G2 as shown in FIG. 11 are supplied to the switch circuits SW1 and SW2, the DC voltages V1 and V2 are supplied to the junction node NDM in a time division manner. The inductor 30 stores magnetic energy corresponding to the current. When the gate signal G10 is an on-voltage, a current generated by the magnetic energy accumulated in the inductor 30 flows between the source and drain of the field effect transistor Tr101. When the gate signal G10 is an off-voltage, a current generated by the magnetic energy accumulated in the inductor 30 flows through the boosting diode 40, and an output voltage Vout is generated at the voltage output terminal TMout.
 ゲート信号G1のパルス幅をTon1とし、ゲート信号G2のパルス幅をTon2とし、ゲート信号G10のパルス幅をTon10とすると、出力電圧Voutは、以下の式で表される。 When the pulse width of the gate signal G1 is Ton1, the pulse width of the gate signal G2 is Ton2, and the pulse width of the gate signal G10 is Ton10, the output voltage Vout is expressed by the following equation.
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
 例えば、ゲート信号G1、G2のデューティ比を変更することにより合流ノードNDMにおける合成電圧を調整し、調整された合成電圧を所定の昇圧比で昇圧することで、出力電圧Voutを所望の電圧に設定することができる。例えば、ゲート信号G10のデューティ比を変更することにより昇圧比を調整することにより所定の合成電圧を昇圧することで、出力電圧Voutを所望の電圧に設定することができる。例えば、ゲート信号G1、G2、G10のデューティ比を変更することにより、出力電圧Voutを所望の電圧に設定することができる。 For example, the composite voltage at the junction node NDM is adjusted by changing the duty ratio of the gate signals G1 and G2, and the output voltage Vout is set to a desired voltage by boosting the adjusted composite voltage at a predetermined boost ratio. can do. For example, the output voltage Vout can be set to a desired voltage by boosting a predetermined combined voltage by adjusting the boost ratio by changing the duty ratio of the gate signal G10. For example, the output voltage Vout can be set to a desired voltage by changing the duty ratio of the gate signals G1, G2, and G10.
 図12に、第4構成例に係るDC/DCコンバータ1の動作シミュレーションの一例を示す。 FIG. 12 shows an example of an operation simulation of the DC / DC converter 1 according to the fourth configuration example.
 図12では、直流電圧V1は10[V]であり、直流電圧V2は5[V]である。なお、図12において、スイッチ回路SW1に流れる電流ISW1と表し、スイッチ回路SW2に流れる電流をISW2と表し、昇圧用スイッチ回路に流れる電流をISW10と表し、ダイオード21に流れる電流をIと表し、インダクタ30に流れる電流をIと表し、合流ノードNDMにおける合成電圧をVNDMと表す。電流ISW1は、第1電界効果トランジスタTr11のソースから第2電界効果トランジスタTr12のソースに流れる電流である。電流ISW2は、第1電界効果トランジスタTr21のソースから第2電界効果トランジスタTr22のソースに流れる電流である。電流ISW10は、電界効果トランジスタTr101のソース・ドレイン間に流れる電流である。 In FIG. 12, the DC voltage V1 is 10 [V], and the DC voltage V2 is 5 [V]. In FIG. 12, current I SW1 flowing through the switch circuit SW 1 is represented, current flowing through the switch circuit SW 2 is represented as I SW 2 , current flowing through the boost switch circuit is represented as I SW 10, and current flowing through the diode 21 is represented by I D and represents the current flowing through the inductor 30 represents the I L, represents the combined voltage in the combined node NDM and V NDM. The current ISW1 is a current that flows from the source of the first field effect transistor Tr11 to the source of the second field effect transistor Tr12. The current ISW2 is a current that flows from the source of the first field effect transistor Tr21 to the source of the second field effect transistor Tr22. Current I SW10 is a current flowing between the source and drain of the field effect transistor Tr101.
 図12に示すように、ゲート信号G1、G2にスイッチ回路SW1、SW2を供給することで合流ノードNDMに合成電圧VNDMが生成される。スイッチ回路SW1、SW2のそれぞれが導通状態から非導通状態になったときに発生するサージ電流がダイオード21を経由して流れる。 As shown in FIG. 12, by supplying the switch signals SW1 and SW2 to the gate signals G1 and G2, a composite voltage V NDM is generated at the junction node NDM. A surge current generated when each of the switch circuits SW1 and SW2 changes from the conductive state to the non-conductive state flows through the diode 21.
 ゲート信号G10がオン電圧のとき、電界効果トランジスタTr101のソース・ドレイン間に電流が流れる。このとき、インダクタ30に磁気エネルギーが蓄積される。図示しない負荷に対して、それまでキャパシタCoutに充電されていた電荷を用いて電流が供給される。ゲート信号G10がオフ電圧のとき、インダクタ30に蓄積された磁気エネルギーにより昇圧用ダイオード40を介して電圧出力端子TMoutに出力電圧Voutが発生する。キャパシタCoutには、電荷が充電される。 When the gate signal G10 is on-voltage, a current flows between the source and drain of the field effect transistor Tr101. At this time, magnetic energy is accumulated in the inductor 30. A current is supplied to a load (not shown) using the charge that has been charged in the capacitor Cout until then. When the gate signal G10 is an off-voltage, the output voltage Vout is generated at the voltage output terminal TMout through the boosting diode 40 by the magnetic energy accumulated in the inductor 30. The capacitor Cout is charged with electric charge.
 図12では、Ton1/T1=Ton2/T1=0.4であり、Ton10/T2=0.5であるため、出力電圧Voutとして式(2)に示すように12[V]が出力される。 In FIG. 12, since Ton1 / T1 = Ton2 / T1 = 0.4 and Ton10 / T2 = 0.5, 12 [V] is output as the output voltage Vout as shown in Expression (2).
<<第5構成例>>
 第4構成例では、昇圧用ダイオード40を介して出力電圧Voutを出力する場合について説明したが、昇圧が可能な実施形態に係るDC/DCコンバータ1の構成は第4構成例に示す構成に限定されるものではない。
<< Fifth Configuration Example >>
In the fourth configuration example, the case where the output voltage Vout is output via the boosting diode 40 has been described. However, the configuration of the DC / DC converter 1 according to the embodiment capable of boosting is limited to the configuration shown in the fourth configuration example. Is not to be done.
 図13に、実施形態に係るDC/DCコンバータ1の第5構成例を示す。図13において、図11と同様の部分には同一符号を付し、適宜説明を省略する。 FIG. 13 shows a fifth configuration example of the DC / DC converter 1 according to the embodiment. In FIG. 13, the same parts as those in FIG.
 第5構成例におけるDC/DCコンバータ1の構成が第4構成例におけるDC/DCコンバータ1の構成と異なる点は、昇圧用ダイオード40に代えてスイッチ回路SW11が設けられている点である。 The configuration of the DC / DC converter 1 in the fifth configuration example is different from the configuration of the DC / DC converter 1 in the fourth configuration example in that a switch circuit SW11 is provided instead of the boosting diode 40.
 第5構成例では、スイッチ回路SW11は、電界効果トランジスタTr111を含む。電界効果トランジスタTr111は、Nチャネル型のMOSFETである。電界効果トランジスタTr111のソースがインダクタ30の出力側端子に電気的に接続され、ドレインが電圧出力端子TMoutに電気的に接続される。電界効果トランジスタTr111には、ソースとドレインとの間にボディダイオードが形成される。電界効果トランジスタTr111に形成されたボディダイオードは、昇圧用ダイオード40と同様の機能を有する。 In the fifth configuration example, the switch circuit SW11 includes a field effect transistor Tr111. The field effect transistor Tr111 is an N-channel type MOSFET. The source of the field effect transistor Tr111 is electrically connected to the output side terminal of the inductor 30, and the drain is electrically connected to the voltage output terminal TMout. In the field effect transistor Tr111, a body diode is formed between the source and the drain. The body diode formed in the field effect transistor Tr111 has a function similar to that of the boosting diode 40.
 第5構成例において、電界効果トランジスタTr111のゲートには、制御回路100からのゲート信号G11が供給される。ゲート信号G11は、電界効果トランジスタTr101が非導通状態のとき電界効果トランジスタTr111が導通状態になるように生成される。ゲート信号G11がオン電圧のとき、電界効果トランジスタTr111のソース・ドレイン間が導通状態になり、ゲート信号G11がオフ電圧のとき、電界効果トランジスタTr111のソース・ドレイン間が非導通状態になる。 In the fifth configuration example, the gate signal G11 from the control circuit 100 is supplied to the gate of the field effect transistor Tr111. The gate signal G11 is generated so that the field effect transistor Tr111 is in a conductive state when the field effect transistor Tr101 is in a nonconductive state. When the gate signal G11 is on-voltage, the source and drain of the field effect transistor Tr111 are in a conducting state, and when the gate signal G11 is off-voltage, the source and drain of the field effect transistor Tr111 are in a non-conducting state.
 第5構成例によれば、第4構成例のような昇圧用ダイオード40を介してインダクタ30からの電流が電圧出力端子TMoutに向かうことがなくなるので、電圧変換の効率を向上させることができる。 According to the fifth configuration example, since the current from the inductor 30 does not go to the voltage output terminal TMout via the boosting diode 40 as in the fourth configuration example, the efficiency of voltage conversion can be improved.
 図14に、第5構成例に係るDC/DCコンバータ1の動作シミュレーションの一例を示す。 FIG. 14 shows an example of an operation simulation of the DC / DC converter 1 according to the fifth configuration example.
 図14では、直流電圧V1は10[V]であり、直流電圧V2は5[V]である。なお、図14において、スイッチ回路SW1に流れる電流ISW1と表し、スイッチ回路SW2に流れる電流をISW2と表し、昇圧用スイッチ回路SW10に流れる電流をISW10と表し、スイッチ回路SW11に流れる電流をISW11と表し、インダクタ30に流れる電流をIと表し、合流ノードNDMにおける合成電圧をVNDMと表す。電流ISW1は、第1電界効果トランジスタTr11のソースから第2電界効果トランジスタTr12のソースに流れる電流である。電流ISW2は、第1電界効果トランジスタTr21のソースから第2電界効果トランジスタTr22のソースに流れる電流である。電流ISW10は、電界効果トランジスタTr101のソース・ドレイン間(又はボディダイオード)に流れる電流である。電流ISW11は、電界効果トランジスタTr111のソース・ドレイン間(又はボディダイオード)に流れる電流である。 In FIG. 14, the DC voltage V1 is 10 [V], and the DC voltage V2 is 5 [V]. Incidentally, in FIG. 14 represents the current I SW1 through the switch circuit SW1, the current flowing in the switch circuit SW2 represents the I SW2, a current flowing through the boost switch circuit SW10 represents an I SW10, the current flowing through the switching circuit SW11 expressed as I SW11, a current flowing through the inductor 30 represents the I L, represents the combined voltage in the combined node NDM and V NDM. The current ISW1 is a current that flows from the source of the first field effect transistor Tr11 to the source of the second field effect transistor Tr12. The current ISW2 is a current that flows from the source of the first field effect transistor Tr21 to the source of the second field effect transistor Tr22. Current I SW10 is a current flowing between the source and drain of the field effect transistor Tr101 (or body diode). Current I SW11 is a current flowing between the source and drain of the field effect transistor Tr 111 (or body diode).
 図14に示すように、ゲート信号G1、G2にスイッチ回路SW1、SW2を供給することで合流ノードNDMに合成電圧VNDMが生成される。スイッチ回路SW1、SW2のそれぞれが導通状態から非導通状態になったときに発生するサージ電流がダイオード21を経由して流れる。 As shown in FIG. 14, by supplying the switch circuits SW1 and SW2 to the gate signals G1 and G2, a composite voltage V NDM is generated at the junction node NDM. A surge current generated when each of the switch circuits SW1 and SW2 changes from the conductive state to the non-conductive state flows through the diode 21.
 ゲート信号G10がオン電圧のとき、電界効果トランジスタTr101のソース・ドレイン間に電流が流れる。このとき、ゲート信号G11がオフ電圧であり、インダクタ30に磁気エネルギーが蓄積される。図示しない負荷に対して、それまでキャパシタCoutに充電されていた電荷を用いて電流が供給される。ゲート信号G10がオフ電圧のとき、ゲート信号G11がオン電圧になり、インダクタ30に蓄積された磁気エネルギーにより電界効果トランジスタTr111のソース・ドレイン間を介して電圧出力端子TMoutに出力電圧Voutが発生する。キャパシタCoutには、電荷が充電される。 When the gate signal G10 is on-voltage, a current flows between the source and drain of the field effect transistor Tr101. At this time, the gate signal G11 is an off voltage, and magnetic energy is accumulated in the inductor 30. A current is supplied to a load (not shown) using the charge that has been charged in the capacitor Cout until then. When the gate signal G10 is an off voltage, the gate signal G11 becomes an on voltage, and the output voltage Vout is generated at the voltage output terminal TMout via the source and drain of the field effect transistor Tr111 by the magnetic energy accumulated in the inductor 30. . The capacitor Cout is charged with electric charge.
 図14では、Ton1/T1=Ton2/T1=0.4であり、Ton10/T2=0.5であるため、出力電圧Voutとして式(2)に示すように12[V]が出力される。 In FIG. 14, since Ton1 / T1 = Ton2 / T1 = 0.4 and Ton10 / T2 = 0.5, 12 [V] is output as the output voltage Vout as shown in Expression (2).
<<その他の変形例>>
 第1構成例~第5構成例では、直流電圧選択回路10が時分割で複数の直流電圧を合流ノードNDMに供給する場合について説明したが、実施形態に係るDC/DCコンバータ1の構成はこれらに限定されるものではない。
<< Other Modifications >>
In the first configuration example to the fifth configuration example, the case where the DC voltage selection circuit 10 supplies a plurality of DC voltages to the junction node NDM in a time division manner has been described. However, the configuration of the DC / DC converter 1 according to the embodiment is not limited to these configurations. It is not limited to.
 いくつかの実施形態では、合流ノードNDMに電気的に接続する電圧入力端子を切り替えるとき、所定の期間だけ合流ノードNDMを2以上の電圧入力端子に電気的に接続する。例えば、第1構成例~第5構成例において、制御回路100は、ゲート信号G1がオン電圧からオフ電圧に切り替わる直前にゲート信号G2がオフ電圧からオン電圧に切り替わるようにゲート信号G1、G2を生成することができる。或いは、制御回路100は、ゲート信号G1がオフ電圧からオン電圧に切り替わった後にゲート信号G2がオン電圧からオフ電圧に切り替わるようにゲート信号G1、G2を生成することができる。 In some embodiments, when switching the voltage input terminal electrically connected to the merge node NDM, the merge node NDM is electrically connected to two or more voltage input terminals for a predetermined period. For example, in the first to fifth configuration examples, the control circuit 100 changes the gate signals G1 and G2 so that the gate signal G2 is switched from the off voltage to the on voltage immediately before the gate signal G1 is switched from the on voltage to the off voltage. Can be generated. Alternatively, the control circuit 100 can generate the gate signals G1 and G2 such that the gate signal G2 is switched from the on voltage to the off voltage after the gate signal G1 is switched from the off voltage to the on voltage.
 このような構成によれば、直流電圧V1を出力する第1直流電源及び直流電圧V2を出力する第2直流電源のうち高い電圧を出力する一方の直流電源が他方の直流電源に電圧を供給することが可能になる。低い電圧を出力する直流電源が二次電池の場合、当該直流電源への充電を行うことができる。 According to such a configuration, one of the first DC power source that outputs the DC voltage V1 and the second DC power source that outputs the DC voltage V2 supplies one DC power source that outputs a high voltage to the other DC power source. It becomes possible. When the DC power source that outputs a low voltage is a secondary battery, the DC power source can be charged.
<エネルギーシステム>
 次に、実施形態に係るDC/DCコンバータ1が適用されたエネルギーシステムについて説明する。
<Energy system>
Next, an energy system to which the DC / DC converter 1 according to the embodiment is applied will be described.
 実施形態に係るエネルギーシステムは、2以上の発電装置を含み、2以上の発電装置から出力された2以上の直流電圧から所望の電圧を生成し、生成された電圧を負荷に供給する。このとき、2以上の発電装置の1つに必要な物質を他の発電装置から供給されたエネルギーを用いて生成することができる。 The energy system according to the embodiment includes two or more power generation devices, generates a desired voltage from two or more DC voltages output from the two or more power generation devices, and supplies the generated voltage to a load. At this time, a substance necessary for one of the two or more power generation devices can be generated using energy supplied from another power generation device.
 図15に、実施形態に係るエネルギーシステム200の構成例を示す。図15において、図1~図14と同様の部分には同一符号を付し、適宜説明を省略する。 FIG. 15 shows a configuration example of the energy system 200 according to the embodiment. 15, parts similar to those in FIGS. 1 to 14 are given the same reference numerals, and description thereof will be omitted as appropriate.
 エネルギーシステム200は、実施形態に係るDC/DCコンバータ1と、水電解セル用コンバータ210とを含む。エネルギーシステム200には、光電池300からの直流電圧V1と燃料電池310からの直流電圧V2とが供給される。光電池300は、太陽光などの光のエネルギーを電気エネルギーに変換し、変換された電気エネルギーを用いて直流電圧V1を出力する。燃料電池310は、水素と酸素の電気化学反応により電気エネルギーを取り出し、取り出した電気エネルギーを用いて直流電圧V2を出力する。 The energy system 200 includes the DC / DC converter 1 according to the embodiment and a water electrolysis cell converter 210. The energy system 200 is supplied with a DC voltage V 1 from the photovoltaic cell 300 and a DC voltage V 2 from the fuel cell 310. The photovoltaic cell 300 converts light energy such as sunlight into electrical energy, and outputs a DC voltage V1 using the converted electrical energy. The fuel cell 310 extracts electrical energy by an electrochemical reaction between hydrogen and oxygen, and outputs a DC voltage V2 using the extracted electrical energy.
 DC/DCコンバータ1は、直流電圧V1、V2から生成された合成電圧を上記のように降圧又は昇圧した電圧を負荷LDに供給する。 The DC / DC converter 1 supplies the load LD with a voltage obtained by stepping down or boosting the combined voltage generated from the DC voltages V1 and V2 as described above.
 水電解セル用コンバータ210は、光電池300からの直流電圧V1を受け、燃料電池310による発電に必要な水素を生成する水電解セル320に供給するための所定の電圧に変換する。水電解セル用コンバータ210の機能は、公知のDC/DCコンバータ又はDC/ACコンバータにより実現される。 The water electrolysis cell converter 210 receives the DC voltage V1 from the photovoltaic cell 300 and converts it to a predetermined voltage to be supplied to the water electrolysis cell 320 that generates hydrogen necessary for power generation by the fuel cell 310. The function of the water electrolysis cell converter 210 is realized by a known DC / DC converter or DC / AC converter.
 水電解セル320は、水電解セル用コンバータ210から電圧が供給され、公知の手法で水を電気分解して水素を生成する。水電解セル320により生成された水素は、公知の手法で燃料電池310に送られる。すなわち、燃料電池310は、水電解セル用コンバータ210から電気エネルギーを受けた水電解セル320による電気分解によって生成された水素を用いた電気化学反応により直流電圧V2を生成する。 The water electrolysis cell 320 is supplied with voltage from the water electrolysis cell converter 210 and electrolyzes water by a known method to generate hydrogen. Hydrogen generated by the water electrolysis cell 320 is sent to the fuel cell 310 by a known method. That is, fuel cell 310 generates DC voltage V <b> 2 by an electrochemical reaction using hydrogen generated by electrolysis by water electrolysis cell 320 that receives electrical energy from water electrolysis cell converter 210.
 いくつかの実施形態では、エネルギーシステム200は、光電池300、燃料電池310、及び水電解セル320のうち少なくとも1つを更に含む。 In some embodiments, the energy system 200 further includes at least one of a photovoltaic cell 300, a fuel cell 310, and a water electrolysis cell 320.
 以上説明したように、実施形態に係るエネルギーシステム200によれば、簡素な構成で、再生可能エネルギーを用いて負荷に対して効率的に電力を供給することが可能になる。 As described above, according to the energy system 200 according to the embodiment, it is possible to efficiently supply power to a load using renewable energy with a simple configuration.
 DC/DCコンバータ1は、実施形態に係る「直流電圧変換回路」の一例である。電圧入力端子TM1~TMNは、実施形態に係る「電圧入力部」の一例である。電圧出力端子TMoutは、実施形態に係る「電圧出力部」の一例である。昇圧用ダイオード40又は電界効果トランジスタTr111に形成されたボディダイオードは、実施形態に係る「昇圧用ダイオード」の一例である。電界効果トランジスタTr101は、実施形態に係る「昇圧用スイッチ回路」の一例である。エネルギーシステム200は、実施形態に係る「電源システム」の一例である。光電池300は、実施形態に係る「第1発電装置」の一例である。燃料電池310は、実施形態に係る「第2発電装置」の一例である。直流電圧V1は、実施形態に係る「第1直流電圧」の一例である。直流電圧V2は、実施形態に係る「第2直流電圧」の一例である。水電解セル用コンバータ210は、実施形態に係る「電圧変換回路」の一例である。水素は、実施形態に係る「化学物質」の一例である。水電解セル320は、実施形態に係る「電気分解装置」の一例である。 The DC / DC converter 1 is an example of a “DC voltage conversion circuit” according to the embodiment. The voltage input terminals TM1 to TMN are examples of the “voltage input unit” according to the embodiment. The voltage output terminal TMout is an example of a “voltage output unit” according to the embodiment. The body diode formed in the boosting diode 40 or the field effect transistor Tr111 is an example of the “boosting diode” according to the embodiment. The field effect transistor Tr101 is an example of a “boost switch circuit” according to the embodiment. The energy system 200 is an example of a “power supply system” according to the embodiment. The photovoltaic cell 300 is an example of the “first power generation device” according to the embodiment. The fuel cell 310 is an example of a “second power generation device” according to the embodiment. The DC voltage V1 is an example of a “first DC voltage” according to the embodiment. The DC voltage V2 is an example of a “second DC voltage” according to the embodiment. The water electrolysis cell converter 210 is an example of a “voltage conversion circuit” according to the embodiment. Hydrogen is an example of the “chemical substance” according to the embodiment. The water electrolysis cell 320 is an example of the “electrolysis device” according to the embodiment.
[作用・効果]
 実施形態に係る直流電圧変換回路、及び電源システムの作用及び効果について説明する。
[Action / Effect]
The operation and effect of the DC voltage conversion circuit and the power supply system according to the embodiment will be described.
 いくつかの実施形態に係る直流電圧変換回路(DC/DCコンバータ1)は、直流電圧選択回路(10)と、インダクタ(30)と、整流回路(20)とを含む。直流電圧選択回路は、互いに異なる複数の直流電圧(V1~VN)が供給される複数の電圧入力部(電圧入力端子TM1~TMN)を時分割で合流ノード(NDM)に電気的に接続する。インダクタは、合流ノードと電圧出力部(電圧出力端子TMout)との間に接続される。整流回路は、基準電圧(Vref)が供給される基準ノード(NDref)と合流ノードとの間に接続される。 The DC voltage conversion circuit (DC / DC converter 1) according to some embodiments includes a DC voltage selection circuit (10), an inductor (30), and a rectification circuit (20). The DC voltage selection circuit electrically connects a plurality of voltage input units (voltage input terminals TM1 to TMN) to which a plurality of different DC voltages (V1 to VN) are supplied to the junction node (NDM) in a time division manner. The inductor is connected between the junction node and the voltage output unit (voltage output terminal TMout). The rectifier circuit is connected between a reference node (NDref) to which a reference voltage (Vref) is supplied and a junction node.
 このような構成によれば、複数の直流電圧を時分割で合流ノードに出力することにより合成電圧を生成し、インダクタと整流回路とを用いて合成電圧を降圧するようにしたので、構成を簡素化し、複数の直流電圧の高低にかかわらず簡素なスイッチ制御で直流電圧の電圧変換を行うことができる。 According to such a configuration, the combined voltage is generated by outputting a plurality of DC voltages to the junction node in a time division manner, and the combined voltage is stepped down using the inductor and the rectifier circuit, so the configuration is simplified. Therefore, it is possible to perform voltage conversion of DC voltage by simple switch control regardless of the level of a plurality of DC voltages.
 また、いくつかの実施形態に係る直流電圧変換回路では、直流電圧選択回路は、複数の電圧入力部のそれぞれと合流ノードとの間に接続された複数のスイッチ回路(SW1、SW2)を含む。複数のスイッチ回路の少なくとも1つは、電圧入力部と第1ノード(ND1)との間に接続されたスイッチ素子(第1電界効果トランジスタTr11、Tr21)と、第1ノードと合流ノードとの間に接続され、合流ノードから第1ノードに向かう逆電流の発生を防止する逆電流防止素子(第2電界効果トランジスタTr12、Tr22に形成されたボディダイオード、ダイオードD1、D2)と、を含む。 Also, in the DC voltage conversion circuits according to some embodiments, the DC voltage selection circuit includes a plurality of switch circuits (SW1, SW2) connected between each of the plurality of voltage input units and the junction node. At least one of the plurality of switch circuits includes a switch element (first field effect transistors Tr11 and Tr21) connected between the voltage input unit and the first node (ND1), and between the first node and the junction node. And a reverse current prevention element (body diodes formed on the second field effect transistors Tr12 and Tr22, diodes D1 and D2) for preventing the generation of a reverse current from the junction node to the first node.
 このような構成によれば、複数の電圧入力部のそれぞれに対応した複数のスイッチ回路の少なくとも1つに直流電源に向かう逆電流を防止する逆電流防止素子を設けるようにしたので、合流ノードの電圧が電圧入力部に供給される直流電圧より高い場合であっても、逆電流に起因した直流電源の損傷を回避することが可能になる。 According to such a configuration, the reverse current prevention element for preventing the reverse current toward the DC power source is provided in at least one of the plurality of switch circuits corresponding to each of the plurality of voltage input units. Even when the voltage is higher than the DC voltage supplied to the voltage input unit, it is possible to avoid damage to the DC power source due to the reverse current.
 また、いくつかの実施形態に係る直流電圧変換回路では、複数のスイッチ回路の少なくとも1つは、電圧入力部にドレインが接続され、第1ノードにソースが接続された第1電界効果トランジスタ(Tr11、Tr21)と、第1ノードにソースが接続され、合流ノードにドレインが接続された第2電界効果トランジスタ(Tr12、Tr22)と、を含み、第2電界効果トランジスタは、ソースとドレインとの間に形成されたボディダイオードを含む。 In the DC voltage conversion circuits according to some embodiments, at least one of the plurality of switch circuits includes a first field effect transistor (Tr11) having a drain connected to the voltage input unit and a source connected to the first node. , Tr21) and a second field effect transistor (Tr12, Tr22) having a source connected to the first node and a drain connected to the junction node, the second field effect transistor between the source and the drain Including a body diode.
 このような構成によれば、複数の電圧入力部のそれぞれに対応した複数のスイッチ回路の少なくとも1つに、電界効果トランジスタに形成されたボディダイオードを設けるようにしたので、合流ノードの電圧が電圧入力部に供給される直流電圧より高い場合であっても、逆電流に起因した直流電源の損傷を回避することが可能になる。 According to such a configuration, since the body diode formed in the field effect transistor is provided in at least one of the plurality of switch circuits corresponding to each of the plurality of voltage input units, the voltage at the junction node is the voltage. Even when the voltage is higher than the DC voltage supplied to the input unit, it is possible to avoid damage to the DC power source due to the reverse current.
 また、いくつかの実施形態に係る直流電圧変換回路では、複数のスイッチ回路のそれぞれは、第1電界効果トランジスタと第2電界効果トランジスタとを含み、各スイッチ回路の第1電界効果トランジスタのゲート信号(G1、G2)及び第2電界効果トランジスタのゲート信号(G1、G2)のパルス幅を制御することにより複数のスイッチ回路のスイッチ制御を行う制御回路(100)を含む。 In the DC voltage conversion circuits according to some embodiments, each of the plurality of switch circuits includes a first field effect transistor and a second field effect transistor, and a gate signal of the first field effect transistor of each switch circuit. A control circuit (100) that performs switch control of the plurality of switch circuits by controlling the pulse widths of the gate signals (G1, G2) of (G1, G2) and the second field effect transistor.
 このような構成によれば、パルス幅制御により複数のスイッチ回路のスイッチ制御を行うようにしたので、例えば、直流電圧を出力する直流電源の種別に応じて合成電圧を生成することができるので、柔軟に直流電圧を変換することが可能な直流電圧変換回路を提供することが可能になる。 According to such a configuration, since the switch control of the plurality of switch circuits is performed by the pulse width control, for example, the composite voltage can be generated according to the type of the DC power source that outputs the DC voltage. It is possible to provide a DC voltage conversion circuit capable of flexibly converting a DC voltage.
 また、いくつかの実施形態に係る直流電圧変換回路は、インダクタの出力側端子にアノードが接続され、電圧出力部にカソードが接続された昇圧用ダイオード(昇圧用ダイオード40、電界効果トランジスタTr111に形成されたボディダイオード)と、出力側端子と基準ノードとの間に接続された昇圧用スイッチ回路(SW10)と、を含む。 In addition, the DC voltage conversion circuits according to some embodiments are formed in a boost diode (a boost diode 40 and a field effect transistor Tr111) having an anode connected to an output side terminal of an inductor and a cathode connected to a voltage output unit. And a step-up switch circuit (SW10) connected between the output side terminal and the reference node.
 このような構成によれば、上記の構成を有する直流電圧変換回路に対して昇圧用ダイオードと昇圧用スイッチ素子とを追加し、直流電圧選択回路と昇圧用スイッチ素子との制御により合成電圧を昇圧するようにしたので、構成を簡素化し、複数の直流電圧の高低にかかわらず簡素なスイッチ制御で直流電圧の電圧変換を行うことができる。 According to such a configuration, the boosting diode and the boosting switch element are added to the DC voltage conversion circuit having the above configuration, and the combined voltage is boosted by the control of the DC voltage selection circuit and the boosting switch element. Thus, the configuration can be simplified, and the voltage conversion of the DC voltage can be performed by simple switch control regardless of the level of the plurality of DC voltages.
 また、いくつかの実施形態に係る直流電圧変換回路では、昇圧用スイッチ回路は、基準ノードにソースが接続され、出力側端子にドレインが接続された電界効果トランジスタ(Tr101)を含む。 In addition, in the DC voltage conversion circuits according to some embodiments, the boosting switch circuit includes a field effect transistor (Tr101) having a source connected to the reference node and a drain connected to the output side terminal.
 このような構成によれば、昇圧用スイッチ素子が電界効果トランジスタを含むように構成したので、簡素な構成で、合成電圧の昇圧制御を簡素化することができる。 According to such a configuration, since the boosting switch element is configured to include the field effect transistor, the boosting control of the combined voltage can be simplified with a simple configuration.
 また、いくつかの実施形態に係る直流電圧変換回路は、パルス幅制御により複数のスイッチ回路のスイッチ制御を行うと共に、昇圧比に対応したデューティ比を有する制御信号(ゲート信号G10)に基づいて昇圧用スイッチ回路のスイッチ制御を行う制御回路(100)を含む。 In addition, the DC voltage conversion circuit according to some embodiments performs switch control of a plurality of switch circuits by pulse width control and boosts based on a control signal (gate signal G10) having a duty ratio corresponding to the boost ratio. The control circuit (100) which performs switch control of the switch circuit for a circuit is included.
 このような構成によれば、パルス幅制御によりスイッチ制御が行われた複数のスイッチ回路により時分割で複数の直流電圧を出力して合成電圧を生成し、昇圧比に応じたディーティ比を有する制御信号により昇圧用スイッチ素子を制御するようにしたので、構成を簡素化し、複数の直流電圧の高低にかかわらず簡素なスイッチ制御で直流電圧の電圧変換を行うことができる。 According to such a configuration, a control voltage having a duty ratio corresponding to the boost ratio is generated by outputting a plurality of DC voltages in a time-sharing manner by a plurality of switch circuits subjected to switch control by pulse width control. Since the step-up switch element is controlled by the signal, the configuration can be simplified and the voltage conversion of the DC voltage can be performed by the simple switch control regardless of the level of the plurality of DC voltages.
 また、いくつかの実施形態に係る直流電圧変換回路では、整流回路は、基準ノードにアノードが接続され、合流ノードにカソードが接続されたダイオード(21、第3電界効果トランジスタTr31に形成されたボディダイオード)を含む。 Further, in the DC voltage conversion circuit according to some embodiments, the rectifier circuit includes a diode (21, a body formed in the third field effect transistor Tr31) having an anode connected to the reference node and a cathode connected to the junction node. Diode).
 このような構成によれば、整流回路がダイオードを含むように構成したので、直流電圧変換回路の構成を簡素化することができる。 According to such a configuration, since the rectifier circuit is configured to include a diode, the configuration of the DC voltage conversion circuit can be simplified.
 また、いくつかの実施形態に係る電源システム(エネルギーシステム200)は、第1発電装置(光電池300)から出力された第1直流電圧(直流電圧V1)を所定の電圧に変換する電圧変換回路(水電解セル用コンバータ210)と、第1直流電圧と第2発電装置(燃料電池310)から出力された第2直流電圧(直流電圧V2)とに基づいて生成された直流電圧(出力電圧Vout)を負荷に供給する上記のいずれかに記載の直流電圧変換回路と、を含み、第2発電装置は、電圧変換回路から電気エネルギーを受けた電気分解装置(水電解セル320)による電気分解によって生成された化学物質(水素)を用いた電気化学反応により第2直流電圧を生成する。 In addition, a power supply system (energy system 200) according to some embodiments includes a voltage conversion circuit (a voltage conversion circuit) that converts a first DC voltage (DC voltage V1) output from a first power generation device (photocell 300) into a predetermined voltage. DC voltage (output voltage Vout) generated based on water electrolysis cell converter 210), the first DC voltage, and the second DC voltage (DC voltage V2) output from the second power generator (fuel cell 310). A DC voltage conversion circuit according to any one of the above, wherein the second power generator is generated by electrolysis by an electrolyzer (water electrolysis cell 320) that receives electrical energy from the voltage converter circuit A second DC voltage is generated by an electrochemical reaction using the chemical substance (hydrogen).
 このような構成によれば、上記の直流電圧変換回路を用いて第1直流電圧と第2直流電圧とに基づいて生成された変換電圧を負荷に供給しつつ、第1直流電圧を用いた電気分解により化学物質を生成し、生成された化学物質を用いた電気化学反応により第2直流電圧を生成するようにしたので、制御及び構成が簡素化された直流電圧変換回路が適用された電源システムの効率化を図ることができる。 According to such a configuration, an electric power using the first DC voltage is supplied to the load while the conversion voltage generated based on the first DC voltage and the second DC voltage is supplied to the load using the DC voltage conversion circuit. Since a chemical substance is generated by decomposition and the second DC voltage is generated by an electrochemical reaction using the generated chemical substance, a power supply system to which a DC voltage conversion circuit with simplified control and configuration is applied Can be made more efficient.
 また、実施形態に係る電源システムは、更に、第1発電装置、第2発電装置、及び電気分解装置のうち少なくとも1つを含む。 In addition, the power supply system according to the embodiment further includes at least one of a first power generation device, a second power generation device, and an electrolysis device.
 このような構成によれば、上記の直流電圧変換回路及び電圧変換回路に加えて、第1発電装置、第2発電装置及び電気分解装置の少なくとも1つを含めるようにしたので、制御及び構成が簡素化された直流電圧変換回路が適用された電源システムを提供することができる。 According to such a configuration, in addition to the DC voltage conversion circuit and the voltage conversion circuit, at least one of the first power generation device, the second power generation device, and the electrolysis device is included. A power supply system to which a simplified DC voltage conversion circuit is applied can be provided.
 また、実施形態に係る電源システムでは、第1発電装置は、光電池を含み、第2発電装置は、燃料電池を含み、電気分解装置は、水電解装置であり、化学物質は、水素である。 In the power supply system according to the embodiment, the first power generation device includes a photovoltaic cell, the second power generation device includes a fuel cell, the electrolysis device is a water electrolysis device, and the chemical substance is hydrogen.
 このような構成によれば、上記の直流電圧変換回路を用いて第1直流電圧と第2直流電圧とに基づいて生成された変換電圧を負荷に供給しつつ、電気分解により燃料電池に用いる水素を生成し、生成された水素を用いた電気化学反応により第2直流電圧を生成するようにしたので、制御及び構成を簡素化し、再生可能エネルギーや水素エネルギーを用いて効率的に負荷に給電することが可能な電源システムを提供することができる。 According to such a configuration, the hydrogen used for the fuel cell by electrolysis is supplied to the load with the conversion voltage generated based on the first DC voltage and the second DC voltage using the DC voltage conversion circuit. Since the second DC voltage is generated by an electrochemical reaction using the generated hydrogen, the control and configuration are simplified, and power is efficiently supplied to the load using renewable energy and hydrogen energy. It is possible to provide a power supply system capable of performing the above.
<その他>
 以上に示された実施形態は、この発明を実施するための一例に過ぎない。この発明を実施しようとする者は、この発明の要旨の範囲内において任意の変形、省略、追加等を施すことが可能である。
<Others>
The embodiment described above is merely an example for carrying out the present invention. A person who intends to implement the present invention can make arbitrary modifications, omissions, additions and the like within the scope of the present invention.
 実施形態の第1構成例~第5構成例において、ダイオードの機能を電界効果トランジスタのボディダイオードで実現する場合に、ダイオードと並列に電界効果トランジスタを接続するようにしてもよい。また、電界効果トランジスタに代えてバイポーラトランジスタやIGBT(Insulated Gate Bipolar Transistor)を用いてもよい。 In the first to fifth configuration examples of the embodiment, when the function of the diode is realized by the body diode of the field effect transistor, the field effect transistor may be connected in parallel with the diode. Further, a bipolar transistor or IGBT (Insulated Gate Bipolar Transistor) may be used instead of the field effect transistor.
1 DC/DCコンバータ
10 直流電圧選択回路
20 整流回路
21、40、D1、D2 ダイオード
30 インダクタ
100 制御回路
200 エネルギーシステム
210 水電解セル用コンバータ
300 光電池
310 燃料電池
320 水電解セル
C1~CN、Cout キャパシタ
G1、G2、G3、G10、G11 ゲート信号
NDM 合流ノード
NDref 基準ノード
SW1、SW2、SW11 スイッチ回路
SW10 昇圧用スイッチ回路
Tr11、Tr21 第1電界効果トランジスタ
Tr12、Tr22 第2電界効果トランジスタ
Tr31 第3電界効果トランジスタ
Tr101、Tr111 電界効果トランジスタ
TM0~TMN 電圧入力端子
TMout 電圧出力端子
V1、V2、VN 直流電圧
Vout 出力電圧
Vref 基準電圧
1 DC / DC converter 10 DC voltage selection circuit 20 Rectifier circuit 21, 40, D1, D2 Diode 30 Inductor 100 Control circuit 200 Energy system 210 Converter for water electrolysis cell 300 Photocell 310 Fuel cell 320 Water electrolysis cells C1 to CN, Cout capacitor G1, G2, G3, G10, G11 Gate signal NDM Junction node NDref Reference node SW1, SW2, SW11 Switch circuit SW10 Boost switch circuit Tr11, Tr21 First field effect transistor Tr12, Tr22 Second field effect transistor Tr31 Third field effect Transistors Tr101, Tr111 Field effect transistors TM0 to TMN Voltage input terminal TMout Voltage output terminals V1, V2, VN DC voltage Vout Output voltage Vref Reference voltage

Claims (11)

  1.  互いに異なる複数の直流電圧が供給される複数の電圧入力部を時分割で合流ノードに電気的に接続する直流電圧選択回路と、
     前記合流ノードと電圧出力部との間に接続されたインダクタと、
     基準電圧が供給される基準ノードと前記合流ノードとの間に接続された整流回路と、
     を含む直流電圧変換回路。
    A DC voltage selection circuit that electrically connects a plurality of voltage input units to which a plurality of different DC voltages are supplied to a merging node in a time-sharing manner;
    An inductor connected between the junction node and the voltage output unit;
    A rectifier circuit connected between a reference node to which a reference voltage is supplied and the junction node;
    DC voltage conversion circuit including.
  2.  前記直流電圧選択回路は、
     前記複数の電圧入力部のそれぞれと前記合流ノードとの間に接続された複数のスイッチ回路を含み、
     前記複数のスイッチ回路の少なくとも1つは、
     前記電圧入力部と第1ノードとの間に接続されたスイッチ素子と、
     前記第1ノードと前記合流ノードとの間に接続され、前記合流ノードから前記第1ノードに向かう逆電流の発生を防止する逆電流防止素子と、
     を含む
     ことを特徴とする請求項1に記載に直流電圧変換回路。
    The DC voltage selection circuit includes:
    A plurality of switch circuits connected between each of the plurality of voltage input units and the junction node;
    At least one of the plurality of switch circuits is
    A switch element connected between the voltage input unit and the first node;
    A reverse current prevention element that is connected between the first node and the junction node and prevents the generation of a reverse current from the junction node toward the first node;
    The DC voltage conversion circuit according to claim 1, comprising:
  3.  前記複数のスイッチ回路の少なくとも1つは、
     前記電圧入力部にドレインが接続され、前記第1ノードにソースが接続された第1電界効果トランジスタと、
     前記第1ノードにソースが接続され、前記合流ノードにドレインが接続された第2電界効果トランジスタと、
     を含み、
     前記第2電界効果トランジスタは、ソースとドレインとの間に形成されたボディダイオードを含む
     ことを特徴とする請求項2に記載の直流電圧変換回路。
    At least one of the plurality of switch circuits is
    A first field effect transistor having a drain connected to the voltage input unit and a source connected to the first node;
    A second field effect transistor having a source connected to the first node and a drain connected to the junction node;
    Including
    The DC voltage conversion circuit according to claim 2, wherein the second field effect transistor includes a body diode formed between a source and a drain.
  4.  前記複数のスイッチ回路のそれぞれは、前記第1電界効果トランジスタと前記第2電界効果トランジスタとを含み、
     各スイッチ回路の前記第1電界効果トランジスタのゲート信号及び前記第2電界効果トランジスタのゲート信号のパルス幅を制御することにより前記複数のスイッチ回路のスイッチ制御を行う制御回路を含む
     ことを特徴とする請求項3に記載の直流電圧変換回路。
    Each of the plurality of switch circuits includes the first field effect transistor and the second field effect transistor,
    A control circuit that performs switch control of the plurality of switch circuits by controlling a pulse width of the gate signal of the first field effect transistor and the gate signal of the second field effect transistor of each switch circuit. The DC voltage conversion circuit according to claim 3.
  5.  前記インダクタの出力側端子にアノードが接続され、前記電圧出力部にカソードが接続された昇圧用ダイオードと、
     前記出力側端子と前記基準ノードとの間に接続された昇圧用スイッチ回路と、
     を含む
     ことを特徴とする請求項1~請求項3のいずれか一項に記載の直流電圧変換回路。
    A boosting diode having an anode connected to the output side terminal of the inductor and a cathode connected to the voltage output unit;
    A step-up switch circuit connected between the output-side terminal and the reference node;
    The DC voltage conversion circuit according to any one of claims 1 to 3, wherein the DC voltage conversion circuit includes:
  6.  前記昇圧用スイッチ回路は、
     前記基準ノードにソースが接続され、前記出力側端子にドレインが接続された電界効果トランジスタを含む
     ことを特徴とする請求項5に記載の直流電圧変換回路。
    The boosting switch circuit includes:
    The DC voltage conversion circuit according to claim 5, further comprising: a field effect transistor having a source connected to the reference node and a drain connected to the output terminal.
  7.  パルス幅制御により前記複数のスイッチ回路のスイッチ制御を行うと共に、昇圧比に対応したデューティ比を有する制御信号に基づいて前記昇圧用スイッチ回路のスイッチ制御を行う制御回路を含む
     ことを特徴とする請求項5又は請求項6に記載の直流電圧変換回路。
    A control circuit that performs switch control of the plurality of switch circuits by pulse width control and performs switch control of the boost switch circuit based on a control signal having a duty ratio corresponding to the boost ratio. Item 7. The DC voltage conversion circuit according to Item 5 or Item 6.
  8.  前記整流回路は、前記基準ノードにアノードが接続され、前記合流ノードにカソードが接続されたダイオードを含む
     ことを特徴とする請求項1~請求項7のいずれか一項に記載の直流電圧変換回路。
    The DC voltage conversion circuit according to any one of claims 1 to 7, wherein the rectifier circuit includes a diode having an anode connected to the reference node and a cathode connected to the junction node. .
  9.  第1発電装置から出力された第1直流電圧を所定の電圧に変換する電圧変換回路と、
     前記第1直流電圧と第2発電装置から出力された第2直流電圧とに基づいて生成された直流電圧を負荷に供給する請求項1~請求項8のいずれか一項に記載の直流電圧変換回路と、
     を含み、
     前記第2発電装置は、前記電圧変換回路から電気エネルギーを受けた電気分解装置による電気分解によって生成された化学物質を用いた電気化学反応により前記第2直流電圧を生成する
     ことを特徴とする電源システム。
    A voltage conversion circuit that converts the first DC voltage output from the first power generator into a predetermined voltage;
    The DC voltage conversion according to any one of claims 1 to 8, wherein a DC voltage generated based on the first DC voltage and the second DC voltage output from the second power generator is supplied to a load. Circuit,
    Including
    The second power generator generates the second DC voltage by an electrochemical reaction using a chemical substance generated by electrolysis by an electrolyzer that receives electrical energy from the voltage conversion circuit. system.
  10.  更に、前記第1発電装置、前記第2発電装置、及び前記電気分解装置のうち少なくとも1つを含む
     ことを特徴とする請求項9に記載の電源システム。
    The power supply system according to claim 9, further comprising at least one of the first power generation device, the second power generation device, and the electrolysis device.
  11.  前記第1発電装置は、光電池を含み、
     前記第2発電装置は、燃料電池を含み、
     前記電気分解装置は、水電解装置であり、
     前記化学物質は、水素である
     ことを特徴とする請求項9又は請求項10に記載の電源システム。
    The first power generation device includes a photovoltaic cell,
    The second power generator includes a fuel cell,
    The electrolysis device is a water electrolysis device,
    The power supply system according to claim 9 or 10, wherein the chemical substance is hydrogen.
PCT/JP2019/019237 2018-05-25 2019-05-15 Dc voltage conversion circuit and power supply system WO2019225418A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-100840 2018-05-25
JP2018100840A JP2019205321A (en) 2018-05-25 2018-05-25 Dc voltage conversion circuit, and power supply system

Publications (1)

Publication Number Publication Date
WO2019225418A1 true WO2019225418A1 (en) 2019-11-28

Family

ID=68616366

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2019/019237 WO2019225418A1 (en) 2018-05-25 2019-05-15 Dc voltage conversion circuit and power supply system

Country Status (2)

Country Link
JP (1) JP2019205321A (en)
WO (1) WO2019225418A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112217408B (en) * 2020-09-30 2022-05-24 阳光电源股份有限公司 Cascaded multi-port converter and three-phase medium-voltage input system
JP7348667B2 (en) * 2021-02-19 2023-09-21 株式会社エディックシステムズ switching power supply
JP2022165284A (en) * 2021-04-19 2022-10-31 株式会社今仙電機製作所 Power supply device for vehicle

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09285005A (en) * 1996-04-09 1997-10-31 Mitsubishi Heavy Ind Ltd Dc-dc converter
JP2001338672A (en) * 2000-05-26 2001-12-07 Shinko Pantec Co Ltd Home-use electric power supply system
JP2009232575A (en) * 2008-03-24 2009-10-08 Nec Access Technica Ltd Power supply circuit using plurality of batteries and method for controlling power supply
JP2014060890A (en) * 2012-09-19 2014-04-03 Kuzumi Denshi Kogyo Kk Power supply device
US20150162822A1 (en) * 2013-12-05 2015-06-11 Abb Technology Ag Bridgeless power factor correction circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09285005A (en) * 1996-04-09 1997-10-31 Mitsubishi Heavy Ind Ltd Dc-dc converter
JP2001338672A (en) * 2000-05-26 2001-12-07 Shinko Pantec Co Ltd Home-use electric power supply system
JP2009232575A (en) * 2008-03-24 2009-10-08 Nec Access Technica Ltd Power supply circuit using plurality of batteries and method for controlling power supply
JP2014060890A (en) * 2012-09-19 2014-04-03 Kuzumi Denshi Kogyo Kk Power supply device
US20150162822A1 (en) * 2013-12-05 2015-06-11 Abb Technology Ag Bridgeless power factor correction circuit

Also Published As

Publication number Publication date
JP2019205321A (en) 2019-11-28

Similar Documents

Publication Publication Date Title
Saravanan et al. A modified high step-up non-isolated DC-DC converter for PV application
Hasan et al. A three-phase symmetrical DC-link multilevel inverter with reduced number of DC sources
WO2019225418A1 (en) Dc voltage conversion circuit and power supply system
US9024594B2 (en) System and method for power conversion for renewable energy sources
CN105917543A (en) Power generation system for power generation device harnessing natural energy, and DC power supply combination device having reverse-current blocking device and no power loss used in said power generation system
Shringi et al. Comparative study of buck-boost, Cuk and Zeta converter for maximum output power using P&O technique with solar
Joshi et al. Modeling and simulation of single phase grid connected solar photovoltaic system
Nag et al. Solar PV based DC power supply for rural homes with analog, multiplier-less MPPT controller
Gavris et al. Dual input hybrid buck LC converter
Shafeek et al. Modelling and simulation of DC-DC boost converter and inverter for PV system
Renaudineau et al. Reconfigurable step-up/down partial power converter for PV power optimizer
Pal et al. Modeling of solar energy grid integration system using typhoon HIL
KR20080096098A (en) Power inverter using a charge pump technique
JP7096194B2 (en) Operating point control circuit device for series-connected solar cells or other power sources
Mishra et al. Simulation and analysis of open loop PV system with double stage conversion
JPH0965657A (en) Power converter for solar power generation
Akhil Raj et al. Solar supplied two-output DC–DC converters in the application of low power
Krithiga et al. PV fed water pumping system in a smart home
Poure et al. High step-up DC-DC converter for renewable energy harvesting applications
Chatterjee et al. Design of an intra-module DC-DC converter for PV application: Design considerations and prototype
Majumdar et al. A single phase SPWM boost inverter with high step-up ratio for photovoltaic energy application
Umayal Single ended primary inductor converter for delta conversion of PV systems
Bawane A Study on SEPIC Converter for Voltage Modification Fed by Solar Photovoltaic Systems
Mala Comparative study of ZETA and Single Stage High Voltage Gain DC-DC Converters
Amutha et al. A novel parallel power conversion technique for efficiency improvement in hybrid DC/DC converter based rural telephony

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19807592

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19807592

Country of ref document: EP

Kind code of ref document: A1