WO2019205050A1

WO2019205050A1 - Signal processing circuit and digital transmitter

Info

Publication number: WO2019205050A1
Application number: PCT/CN2018/084593
Authority: WO
Inventors: 司小书; 任志雄
Original assignee: 华为技术有限公司
Priority date: 2018-04-26
Filing date: 2018-04-26
Publication date: 2019-10-31

Abstract

Disclosed by the present application is a signal processing circuit for processing signals of different system bandwidths, improving signal processing efficiency, and reducing tuning difficulty. The signal processing circuit comprises: a signal processing module and an amplifying module; the signal processing module includes at least two baseband processing modules, and the amplifying module includes at least two digital power amplifier (DPA) units; the at least two baseband processing modules and the at least two DPA units form at least two signal processing branches, and signals carried in each signal processing branch have the same slope; the signal processing module is configured to generate a baseband signal according to an input signal, and transmit the baseband signal to the amplifying module; and the amplifying module is configured to modulate the baseband signal and convert the baseband signal to an analog signal for output to an external circuit.

Description

Signal processing circuit and digital transmitter

Technical field

The present application relates to the field of communications, and in particular, to a signal processing circuit and a digital transmitter.

Background technique

In the communication system, the transmitter is one of the most important components, which plays the role of modulating, upconverting and finally amplifying the baseband signal. The transmitter can be used in a wireless system or cable television cable (CABLE) system. At present, the maximum system bandwidth of a wireless system is about 100 MHz, while the maximum system bandwidth of a CABLE system is 1.2 GHz, and may expand to 1.8 GHz in the future.

In the prior art, a transmitter structure for a CABLE system is provided, as shown in FIG. 1A, which consists of a digital board and an analog board. The digital board includes a baseband modulation module and a digital to analog converter (DAC). The analog board includes a temperature compensation and flatness adjustment circuit, a front stage power amplifier, an equalization/slope adjustment module, an equalization/slope compensation circuit, and a final stage power amplifier. The equalization/slope adjustment module adjusts the spectrum of the RF signal of the preamp output so that the low frequency attenuation is large and the high frequency attenuation is small. As shown in Fig. 1B, after the amplification of the final stage power amplifier, the signal spectrum input to the CABLE system has a slope. Because of the characteristics of the CABLE cable, the higher the input signal frequency, the power of the output signal after passing through the CABLE cable. The greater the amount of attenuation, the more the input signal is transmitted through the CABLE system to the terminal, and the flat spectrum is recovered. Because the front-end power amplifier and the final-stage power amplifier generate a large amount of heat, the high-temperature effect will cause the flatness of the signal and the slope of the output to not meet the requirements of the system. Therefore, the analog RF signal generated by the digital board enters the front stage of the analog board. Before the power amplifier, it needs to be processed by the temperature compensation and flatness adjustment circuit. Similarly, before the analog signal enters the final stage power amplifier, it needs to be processed by the equalization/slope compensation circuit.

In the existing scheme, because the class A power amplifier and the analog device are used, the efficiency of the transmitter is low and the volume is large, and the temperature compensation and flatness adjustment circuit and the equalization/slope compensation circuit need to be separately adjusted under high temperature conditions, and the tuning is difficult. .

Summary of the invention

The embodiment of the present application provides a signal processing circuit and a digital transmitter for processing signals of different system bandwidths, improving signal processing efficiency, and reducing tuning difficulty.

A first aspect of the embodiments of the present application provides a signal processing circuit, including: a signal processing module and an amplification module; the signal processing module includes at least two baseband processing modules, the amplification module includes at least two digital power amplifier DPA units; The two baseband processing modules and the at least two DPA units respectively form at least two signal processing branches, and each of the signal processing branches includes a baseband processing module and a DPA unit, and signals carried in each signal processing branch have The same slope; wherein, the output ports of the baseband processing modules of each signal processing branch are respectively connected to the input ports of the DPA units belonging to the same signal processing branch; the signal processing module is configured to generate baseband signals according to the input signals, and transmit to the baseband signals An amplification module; the amplification module is used to modulate the baseband signal and convert it into an analog signal for output to an external circuit. The input signal of different bandwidths is processed by a plurality of signal processing branches, and the baseband signals obtained by decomposing the input signals are modulated by a plurality of signal processing branches to obtain a modulated signal having the same slope, thereby eliminating the conventional equalization module. The power loss is reduced, the signal processing efficiency is improved, and since there is basically no analog device, the heat generation is small, the system has no temperature effect, no additional temperature compensation circuit and slope compensation circuit are needed, and the signal tuning difficulty is reduced.

In a possible design, in a first implementation manner of the first aspect of the embodiments of the present application, the signal processing circuit further includes: a digital predistortion kernel and a feedback module; each signal processing branch further includes a digital predistortion The core, the digital predistortion core is located between the DPA unit and the baseband processing module in each signal processing branch; the output port of each DPA unit is connected to the input port of the feedback module, the output port of the feedback module and each baseband processing module Input port connections; baseband processing blocks in each signal processing branch are used to generate baseband signals; digital predistortion cores in each signal processing branch are used to compensate for nonlinear distortion of the DPA elements based on predistortion coefficients; The DPA unit in the signal processing branch is configured to modulate the baseband signal of the associated signal processing branch to obtain a modulated signal corresponding to the associated signal processing branch; the feedback module is configured to determine the predistortion of each signal processing branch according to each modulated signal The coefficients are fed back to the digital predistortion core of the corresponding signal processing branch. A feedback module is added, and a digital predistortion kernel is added to each signal processing branch, and the digital predistortion kernel can perform nonlinear distortion on the baseband signal in each signal processing branch according to the predistortion coefficient determined by the feedback module. After compensation, the compensated baseband signal is divided into two paths after being modulated by the DPA unit, one is output to the external circuit, and the other is transmitted to the feedback module, which improves the linearity of the signal and increases the signal quality of the signal transmitted in the broadband system.

In a possible design, in a second implementation manner of the first aspect of the embodiments of the present application, the feedback module includes a transfer switch, an analog-to-digital converter, and a digital pre-distortion engine; the switch has at least two input ports. The number of input ports is the same as the number of signal processing branches; the input ports of the switch are respectively connected to the output ports of the respective DPA units, and the output port of the switch is connected to the input port of the analog-to-digital converter, analog-to-digital conversion The output port of the device is connected to the input port of the digital predistortion engine, the output port of the digital predistortion engine is connected to the input port of the digital predistortion core, and the switch is used for time-sharing the modulated signal to the analog to digital converter; An analog to digital converter is configured to convert the received modulated signal from an analog signal to a digital signal and transmit the signal to a digital predistortion engine; the digital predistortion engine is configured to determine a target predistortion coefficient of the signal processing branch corresponding to the digital signal, The target predistortion coefficient is fed back to the digital predistortion core of the corresponding signal processing branch. A specific structure of the feedback module is provided, including a transfer switch, an analog-to-digital converter and a digital pre-distortion engine, and a pre-distortion coefficient of each signal processing branch is determined by a digital pre-distortion engine, and the pre-distortion coefficient is fed back to the corresponding signal The processing branch circuit compensates the nonlinear distortion of the DPA unit, increases the linearity of the signal in the signal processing branch, and improves the signal quality.

In a possible design, in a third implementation manner of the first aspect of the embodiments of the present application, the signal processing circuit further includes: a synthesis module, configured to perform modulation signals on the at least two signal processing branches Synthesizing, an output signal is obtained; the bandwidth of the output signal is the sum of the bandwidths of the respective modulated signals in at least two signal processing branches. The final output signal is obtained through the synthesis module, and the slope modulation of the signal is completed, thereby improving the efficiency of signal processing.

In a possible design, in a fourth implementation manner of the first aspect of the embodiment, the bandwidth of the output signal is the same as the bandwidth of the input signal. Ensure that the bandwidth of the output signal is the same as the bandwidth of the input signal, improving the accuracy of the signal.

In a possible design, in a fifth implementation manner of the first aspect of the embodiments of the present application, the power spectral density difference of the output signal is equal to a sum of signal power spectral density differences of the respective signal processing branches, where The difference in power spectral density is the difference between the average energy of the signal at the maximum frequency and the average energy of the signal at the minimum frequency. Through a plurality of signal processing branches, the baseband signals in each signal processing branch are respectively adjusted in slope, and finally an output signal having a target power spectral density difference is obtained, and the target power spectral density difference is each signal processing branch. The sum of the power spectral density differences of the roads more accurately adjusts the power spectral density difference of the input signal.

In a possible design, in a sixth implementation manner of the first aspect of the embodiments of the present application, the power spectral density difference of the output signal meets a preset first threshold. The slope of the output signal is limited so that the output signal can meet the transmission performance requirements of the broadband system.

In a possible design, in the seventh implementation manner of the first aspect of the embodiment of the present application, the frequency ranges of the modulated signals in the respective signal processing branches are different. The frequency range of the signals in each signal processing branch is limited to avoid exceeding the maximum processing bandwidth of the signal processing branch, and the processing efficiency is improved.

In a possible design, in an eighth implementation manner of the first aspect of the embodiments of the present application, the synthesizing module includes at least one duplexer; the duplexer is configured to synthesize the two modulated signals. A composition of the synthesis module is provided, which increases the implementation of the present application.

In a possible design, in a ninth implementation manner of the first aspect of the embodiments of the present application, the signal processing circuit has five signal processing branches; the signal processing circuit has five signal processing branches; the synthesis module The utility model comprises a duplexer, a triplexer and a synthesizer; the duplexer is configured to synthesize the modulated signals in the two signal processing branches of the five signal processing branches to obtain the first intermediate signal; The triplexer is configured to synthesize the modulated signals in the three signal processing branches spaced apart from the five signal processing branches to obtain a second intermediate signal; the synthesizer is configured to synthesize the first intermediate signal and the second intermediate signal into an output signal. The modulated signals on the five signal processing branches are synthesized by two or two, and the two signal processing branches are separated, which fully utilizes the out-of-band rejection capability of the duplexer and the triplexer, which reduces the difficulty of the digital predistortion algorithm and improves the difficulty. The calculation efficiency.

In a possible design, in a tenth implementation manner of the first aspect of the embodiments of the present application, the baseband signals in each of the at least two signal processing branches have the same bandwidth and the bandwidth is smaller than a second threshold, the bandwidth is used to indicate a difference between a maximum frequency and a minimum frequency of the baseband signal, and the second threshold is a maximum bandwidth that the baseband processing module can process; or, in a signal processing branch of the at least two signal processing branches The bandwidth of the input signal is less than the second threshold, and the bandwidth of the baseband signal of the remaining signal processing branches in the at least two signal processing branches is equal to a second threshold, the bandwidth being used to indicate the difference between the maximum frequency and the minimum frequency of the input signal, The second threshold is the maximum bandwidth that the baseband processing module can handle. The bandwidth of each signal processing branch is limited, and various specific implementation modes are provided to improve the efficiency of signal processing.

In a possible design, in an eleventh implementation manner of the first aspect of the embodiments of the present application, the signal processing module is a field programmable gate array FPGA. The signal processing module is defined to provide a realistic way.

A second aspect of the embodiments of the present application provides a digital transmitter, including: a signal processing circuit and a transmitting circuit; the signal processing circuit is configured to generate a modulated signal, where the signal processing circuit includes the first aspect to the first aspect A signal processing circuit according to any one of the eleventh implementations; the transmitting circuit is configured to transmit the modulated signal. A digital transmitter is provided which reduces the volume of the digital transmitter and improves the efficiency of the digital transmitter in signal processing, thereby reducing the difficulty of signal tuning.

In the technical solution provided by the embodiment of the present application, the signal processing circuit includes: a signal processing module and an amplifying module; the signal processing module includes at least two baseband processing modules, where the amplifying module includes at least two digital power amplifier DPA units; at least two The baseband processing module and the at least two DPA units respectively form at least two signal processing branches, and each of the signal processing branches includes a baseband processing module and a DPA unit, and signals carried in each signal processing branch have the same a slope; wherein an output port of the baseband processing module of each signal processing branch is respectively connected to an input port of a DPA unit belonging to the same signal processing branch; the signal processing module is configured to generate a baseband signal according to the input signal, and transmit to the amplification Module; the amplification module is used to modulate the baseband signal and convert it to an analog signal for output to an external circuit. The input signals of different bandwidths are processed by a plurality of signal processing branches, and the decomposed baseband signals are modulated by a plurality of signal processing branches to obtain modulated signals having the same slope, thereby eliminating the conventional equalization module and reducing the number of signals. The power loss improves the signal processing efficiency; and since there is basically no analog device, the heat generation is small, the system has no temperature effect, no additional temperature compensation circuit and slope compensation circuit are needed, and the signal tuning difficulty is reduced.

DRAWINGS

1A is a schematic diagram of a transmitter structure in the prior art;

Figure 1B is a schematic diagram showing the change in slope of a signal after transmission through the system;

2A is a schematic structural view of a conventional classic transmitter;

2B is a schematic structural diagram of a conventional digital transmitter;

2C is another schematic structural diagram of a conventional digital transmitter;

3A is a schematic diagram of an embodiment of a signal processing circuit in an embodiment of the present application;

FIG. 3B is a schematic diagram of another embodiment of a signal processing circuit according to an embodiment of the present application; FIG.

3C is a schematic diagram of a slope of a signal in an embodiment of the present application;

FIG. 3D is a schematic diagram of another embodiment of a signal processing circuit according to an embodiment of the present application; FIG.

4 is a schematic diagram of another embodiment of a signal processing circuit according to an embodiment of the present application;

FIG. 5 is a schematic structural diagram of a digital transmitter in an embodiment of the present application.

detailed description

The technical solutions in the embodiments of the present application are clearly and completely described in the following with reference to the drawings in the embodiments of the present application. It is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.

The "first" or "second" and the like referred to in the present application are used to distinguish similar objects, and are not necessarily used to describe a specific order or order. In addition, the words "including" or "comprising", and any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product, or device that comprises a series of steps or units is not necessarily limited Those steps or units that are clearly listed may include other steps or units that are not explicitly listed or inherent to such processes, methods, products, or devices.

At present, the structure diagram of a relatively classic transmitter is composed of a digital part and an analog part, as shown in FIG. 2A. The digital part includes a baseband modulation module and a digital to analog converter (DAC), and the analog part includes a filter, a preamplifier (or prevention), and a final stage power amplifier. Since this architecture contains a large number of analog devices, such as filters, the volume is generally large; while the preamplifier and the final stage power amplifier generally use a class A power amplifier (or a class A power amplifier), and the amplification efficiency is low. The heat generation is large, and the temperature effect causes the analog device index to float. In order to maintain the consistency of the output index, it is often necessary to add a complicated temperature compensation module to achieve uniformity of output indicators.

In order to solve the above problems, a digital transmitter structure is provided in the prior art. As shown in FIG. 2B, in the structure of the transmitter, there is basically no analog device, and a switching type power amplifier is used instead of the class A power amplifier. The digital transmitter structure has the advantages of high efficiency and small size. With the development of wireless communication technologies, handheld wireless terminal devices are moving toward low power consumption, high efficiency and small size, and the digital transmitter structure can meet this demand. Therefore, this digital transmitter structure has been widely used in wireless.

At present, the maximum system bandwidth of wireless applications is about 100 MHz, and the cable bandwidth of cable television (CABLE) is about 1 GHz. The basic unit for realizing signal amplification in the digital transmitter shown in FIG. 2B is a switch tube, and the signal bandwidth determines the on/off frequency of the switch tube. Too high on/off frequency causes the linearity of the output signal to drastically decrease, thereby achieving no To the requirements of the system. The on/off frequency of the switch is subject to current manufacturing processes. Currently, the supported signal bandwidth is approximately 200 MHz. Therefore, the all-digital transmitter cannot be applied to the CABLE system.

A digital transmitter structure is also provided in the prior art. As shown in FIG. 2C, the digital transmitter structure includes a local oscillator, a digital encoding module, a digital power amplifier (DPA) module, and a coordinate rotation digital computer ( The coordinate rotation dIgital computer, CORDIC) module. The digital baseband signal is a complex signal composed of a real part I and an imaginary part Q. After polar decomposition, the complex signal CORDIC module is decomposed into an amplitude A and a phase θ. The amplitude A is digitally encoded to obtain an amplitude control word (ACW), and the phase θ is phase-modulated by a local oscillator (LO) to obtain a phase envelope of a constant envelope. ACW and phase modulation (PM) signals are input to the DPA module. The DPA module consists of multiple sub-power amplifiers (sub-PAs). A single sub-PA is equivalent to a switching transistor, which has a very high amplification efficiency but a small signal amplification capability. The DPA module can contain thousands of sub-PA units, and all sub-PA unit outputs are accumulated to achieve signal amplification. The input PM signal is input to each sub-PA unit, and the ACW controls the opening or closing of each sub-PA unit. For example, if the amplitude A is zero, the ACW obtained by digital encoding is also zero. At this time, all sub-PA units in the DPA module are in the off state, and the output power is also zero. The larger the amplitude A, the larger the ACW, the more sub-PA units are turned on, and the higher the output power is. In this way, the DPA module achieves linear amplification of the signal. Because the wider bandwidth allows the switching transistor to operate at a faster on/off frequency, resulting in a worse linearity of the switching transistor, the system bandwidth supported by the digital transmitter structure is too narrow in the current process. Directly applied to the CABLE system.

For a broadband system, such as a CABLE system, the present application provides a signal processing circuit and a digital transmitter. Referring to FIG. 3A, an embodiment of the signal processing circuit 300 in the embodiment of the present application includes:

a signal processing module 301 and an amplification module 302;

The signal processing module 301 includes at least two baseband processing modules 3011, the amplification module 302 includes at least two digital power amplifiers (DPA) 3021;

The at least two baseband processing modules 3011 and the at least two DPA units 3021 constitute at least two signal processing branches 303, each of which includes a baseband processing module 3011 and a DPA unit 3021, each of which The signals carried in the signal processing branch 303 have the same slope, wherein the output ports of the baseband processing module 3011 of each signal processing branch 303 are respectively connected to the input ports of the DPA unit 3021 belonging to the same signal processing branch;

The signal processing module 301 is configured to generate a baseband signal according to the input signal, and transmit to the amplifying module 302;

The amplifying module 302 is configured to modulate the baseband signal, convert it into an analog signal, and output the signal to an external circuit.

It should be noted that before inputting to the signal processing module, the input signal is transmitted to the corresponding physical channel according to the preset logical channel, and the branch input signals of each signal processing branch are obtained, and each branch input signal is respectively input to the corresponding The baseband processing module is processed by the baseband processing module to obtain a corresponding baseband signal.

It can be understood that at least two baseband processing modules can also be integrated into one baseband processing module, and the baseband processing module generates the same number of baseband signals as the DPA unit, that is, the number of baseband processing modules is different from the number of DPA units, specifically here. Not limited. In the present application, the case where the number of baseband processing modules and the number of DPA units are the same is taken as an example for description.

In this embodiment, at least two signal processing branches are included, and the maximum processing bandwidth of each signal processing branch is 200 MHz, and the number of signal processing branches can be adjusted according to the bandwidth of the signal processing circuit actually applied.

In the embodiment of the present application, the input signal is branched into a plurality of branch input signals through a physical channel, and the branch input signal generates a baseband signal through a baseband processing module in the signal processing branch, and the generated baseband signal passes through the DPA of the signal processing branch. The unit modulates to obtain a modulated signal; the modulated signal is transmitted to an external circuit. The input signals of different bandwidths are processed by a plurality of signal processing branches, and the decomposed input signals are modulated by a plurality of signal processing branches to obtain modulated signals having the same slope, thereby eliminating the conventional equalization module and reducing the number of signals. Power loss. And because there is basically no analog device, the heat generation is small, the system does not have a temperature effect, and no additional temperature compensation circuit and slope compensation circuit are needed, thereby reducing the difficulty of signal tuning.

In a possible implementation, as shown in FIG. 3B, the signal processing circuit 300 further includes:

Digital predistortion kernel 3012 and feedback module 304;

Each signal processing branch 303 also includes a digital pre-distortion (DPD) core 3012, which is located in each of the signal processing branches 303, a DPA unit 3021 and a baseband processing module 3011. between;

An output port of each of the DPA units 3021 is connected to an input port of the feedback module 304, and an output port of the feedback module 304 is connected to an input port of each baseband processing module 3011;

The baseband processing module 3011 in each signal processing branch 303 is configured to generate a baseband signal;

The digital predistortion kernel 3012 in each signal processing branch 303 is configured to compensate for nonlinear distortion of the DPA unit 3021 based on the predistortion coefficients;

The DPA unit 3021 in each signal processing branch 303 is configured to modulate the baseband signal of the associated signal processing branch to obtain a modulated signal corresponding to the associated signal processing branch;

The feedback module 304 is configured to determine the pre-distortion coefficients of the respective signal processing branches 303 for each of the modulated signals, and feed back to the digital pre-distortion kernel 3012 of the corresponding signal processing branch.

In this implementation manner, a digital pre-distortion kernel is added to each signal processing branch, and a feedback module is added, and the digital pre-distortion kernel can process the baseband in each signal processing branch according to the pre-distortion coefficient determined by the feedback module. The signal is nonlinearly compensated. The compensated baseband signal is modulated by the DPA unit and split into two modulated signals. One output is output to the external circuit and the other is transmitted to the feedback module, which improves the linearity of the signal and increases the signal in the broadband system. The quality of the signal after transmission.

In a possible implementation, as shown in FIG. 3B, the feedback module 304 includes a changeover switch 3041, an analog to digital converter 3042, and a digital predistortion engine 3043;

The transfer switch 3041 has at least two input ports, and the number of input ports is the same as the number of signal processing branches 303;

Each input port of the transfer switch 3041 is connected to an output port of each DPA unit 3021, and an output port of the transfer switch 3041 is connected to an input port of the analog-to-digital converter 3042, and an output of the analog-to-digital converter 3042 a port is coupled to an input port of the digital predistortion engine 3043, and an output port of the digital predistortion engine 3043 is coupled to an input port of the digital predistortion core 3012;

The transfer switch 3041 is configured to transmit the modulated signal to the analog to digital converter 3042 in time division;

The analog to digital converter 3042 is configured to convert the received modulated signal from an analog signal to a digital signal, and transmit to the digital predistortion engine 3043;

The digital predistortion engine 3043 is configured to determine a target predistortion coefficient of a signal processing branch corresponding to the digital signal, and feed back the target predistortion coefficient to a digital predistortion core 3012 of a corresponding signal processing branch.

It should be noted that the changeover switch has a plurality of input ports and one output port, wherein each input port is connected to an output port of one DPA unit, that is, the number of input ports is determined by the number of DPA units. As shown in FIG. 3B, when the signal processing circuit has two signal processing branches, the first input port (not shown) of the changeover switch is connected to the output port of the DPA unit in the first signal processing branch. A second input port (not shown) of the transfer switch is coupled to an output port of the DPA unit in the second signal processing branch. The switch controls the duration of the input signal to the analog-to-digital converter by the time-division control technique, ensuring that the switch only connects one signal processing branch at a time, and the modulation of the connected signal processing branch The signal is transmitted to the analog-to-digital converter, and the analog signal is converted into a digital signal. The time-sharing control technology is prior art and will not be described here.

In this implementation manner, a specific structure of the feedback module is provided, including a switch, an analog-to-digital converter and a digital pre-distortion engine, and a pre-distortion coefficient of each signal processing branch is determined by a digital pre-distortion engine, and the pre-distortion coefficient is Feedback to the corresponding signal processing branch, compensating for the nonlinear distortion of the DPA unit, increasing the linearity of the signal in the signal processing branch, and improving the signal quality.

a synthesizing module 305, configured to synthesize the modulated signals in the at least two signal processing branches to obtain an output signal;

The bandwidth of the output signal is the sum of the bandwidths of the respective modulated signals in the at least two signal processing branches.

It should be noted that the synthesis module may include one or more synthesis devices that implement signal synthesis functions. For example, when the signal processing circuit has two signal processing branches, the synthesis module may include a duplexer; when the signal processing circuit has When the three signal processing branches, the synthesis module may include a triplexer; when the signal processing circuit has four signal processing branches, the synthesis module may include two duplexers, a synthesizer, or a duplexer. And a triplexer, which is not limited here.

In this implementation manner, the final output signal is obtained by the synthesis module, and the slope modulation of the signal is completed, thereby improving the efficiency of signal processing.

In a possible implementation, as shown in FIG. 3B, the bandwidth of the output signal is the same as the bandwidth of the input signal.

In this implementation manner, the bandwidth of the output signal is ensured to be the same as the bandwidth of the input signal, and the accuracy of the signal is improved.

It should be noted that the bandwidth of the input signal is divided into multiple sub-bandwidths in the signal processing module, and the sum of the sizes of the plurality of sub-bandwidths is equal to the bandwidth of the input signal. After the processing of the signal processing branch, the signal of each signal processing branch is processed. The bandwidth does not change. Finally, the bandwidth of the output signal obtained by the synthesis module is the sum of the bandwidths of the signals of the respective signal processing branches.

In a possible implementation, as shown in FIG. 3C, the power spectral density (PSD) difference of the output signal is equal to the sum of signal power spectral density differences of the respective signal processing branches, where The power spectral density difference is the difference between the signal average energy of the maximum frequency and the signal average energy of the minimum frequency.

For example, in FIG. 3C, DPA1, DPA2, DPA3, DPA4, and DPA5 are respectively DPA units of five signal processing branches, wherein the bandwidth of the baseband signal processed by DPA1 is 200 MHz, and the frequency range of the output modulated signal after DPA1 processing is 200 MHz. -400MHz; DPA2 processing baseband signal bandwidth is 200MHz, DPA2 processing output modulation signal frequency range is 400MHz-600MHz; DPA3 processing baseband signal bandwidth is 200MHz, DPA3 processing output modulation signal frequency range is 600MHz-800MHz; DPA4 The processed baseband signal bandwidth is 200MHz, the frequency range of the output modulated signal after DPA4 processing is 1GHz-800MHz; the bandwidth of the baseband signal processed by DPA5 is 200MHz, and the frequency range of the output modulated signal after DPA5 processing is 1.2GHz-1GHz.

For example, the power spectral density difference of the baseband signal processed in DPA1 is 4 dB, the power spectral density difference of the baseband signal processed in DPA2 is 4 dB, and the power spectral density difference of the baseband signal processed in DPA3 is 4 dB, which is processed in DPA44. The power spectral density difference of the baseband signal is 4 dB, the power spectral density difference of the baseband signal processed in DPA5 is 4 dB, and the power spectral density difference of the resulting output signal is 20 dB.

In this implementation manner, the slope of the baseband signal in each signal processing branch is separately adjusted by using a plurality of signal processing branches, and finally an output signal having a target power spectral density difference is obtained, and the target power spectral density difference is obtained. For the sum of the power spectral density differences of the individual signal processing branches, the power spectral density difference of the input signal is more accurately adjusted.

In a possible implementation manner, as shown in FIG. 3C, the power spectral density difference of the output signal satisfies a preset first threshold.

In this implementation, the power spectral density difference of the output signal is limited, so that the output signal can meet the transmission performance requirements of the broadband system.

It should be noted that the first threshold is set according to an actual situation. For example, as shown in FIG. 3C, the first threshold is 20 dB; and may be set to other values, for example, the first threshold is 16 dB or 12 dB, etc. There is no limit here.

In a possible implementation, as shown in Figure 3C, the frequency ranges of the modulated signals in the various signal processing branches are different.

It should be noted that, in the signal processing circuit corresponding to FIG. 3C (as shown in FIG. 4), the signal processing branch where the DPA1 is located is used as the first signal processing branch, and the signal processing branch where the DPA2 is located is used as the second signal. The branch is processed, and the signal processing branch where DPA3 is located is used as the third signal processing branch, and the signal processing branch where DPA4 is located is used as the fourth signal processing branch, and the signal processing branch where DPA5 is located is used as the fifth signal processing branch. The frequency range of the modulated signal in the first signal processing branch is 200 MHz-400 MHz, and the frequency range of the modulated signal in the second signal processing branch is 400 MHz-600 MHz, and the third signal processing branch is modulated. The frequency range of the latter signal is 600MHz-800MHz, the frequency range of the modulated signal in the fourth signal processing branch is 800MHz-1GHz, and the frequency range of the modulated signal in the fifth signal processing branch is 1GHz-1.2GHz. The signal frequency range of each signal processing branch output is strictly non-overlapping.

In this implementation manner, the frequency range of the output signal in each signal processing branch is limited to avoid exceeding the maximum bandwidth that the signal processing branch can process, and the processing efficiency is improved.

In a possible implementation, as shown in Figure 3D, the synthesis module 305 includes at least one duplexer 3051;

The duplexer is used to synthesize two modulated signals.

In this implementation manner, a composition manner of the synthesis module is provided, and an implementation manner of the present application is added.

In a feasible implementation manner, as shown in FIG. 4, the signal processing circuit 300 has five signal processing branches;

The synthesis module includes a duplexer 3051, a triplexer 3052, and a synthesizer 3053;

The duplexer 3051 is configured to synthesize the modulated signals in the two signal processing branches of the five signal processing branches to obtain a first intermediate signal;

The triplexer 3052 is configured to synthesize the modulated signals in the three signal processing branches of the five signal processing branches to obtain a second intermediate signal;

The synthesizer 3053 is configured to synthesize the first intermediate signal and the second intermediate signal into the output signal.

It should be noted that the number of signal processing branches and the bandwidth supported by each channel can be flexibly configured according to actual scenarios. For example, under the premise of a maximum system bandwidth of 1 GHz, each DPA unit supports a maximum bandwidth of 200 MHz, and the amplification module needs to include five. DPA units. If the actual bandwidth requirement of the application scenario is less than 200MHz, only one DPA unit is required, that is, one signal processing branch is configured; if the bandwidth requirement exceeds 200MHz, less than 400MHz, two signal processing branches are configured; and so on, no longer here. Narration.

It can be understood that the triplexer can be replaced by two duplexers to achieve the same function, which is not limited herein.

In this implementation manner, the modulated signals of the five signal processing branches are combined by two and two, wherein the two signal processing branches are separated, for example, the duplexer combines the two signals of the interval, 400 MHz to 600 MHz. The signal is synthesized with a duplexer using signals from 800MHz to 1GHz, making full use of the out-of-band rejection of duplexers and triplexers, so that digital predistortion does not take into account too much out-of-band distortion suppression (eg out-of-band distortion from 600MHz to 800MHz) Suppression) reduces the difficulty of the digital predistortion algorithm and improves the computational efficiency; the synthesizer combines the outputs of the duplexer and the triplexer to obtain the final full-band output signal.

In a possible implementation, the baseband signals in each of the at least two signal processing branches have the same bandwidth, and the bandwidth is less than a second threshold, where the bandwidth is used to indicate Determining a difference between a maximum frequency and a minimum frequency of the baseband signal, the second threshold being a maximum bandwidth that the baseband processing module can process;

Or the bandwidth of the input signal in one of the at least two signal processing branches is smaller than the second threshold, and the baseband signals of the remaining signal processing branches of the at least two signal processing branches The bandwidth is equal to the second threshold, the bandwidth is used to indicate a difference between a maximum frequency and a minimum frequency of the input signal, and the second threshold is a maximum bandwidth that the baseband processing module can process.

For example, as shown in FIG. 4, when the signal processing circuit has five signal processing branches, the maximum processing bandwidth of each signal processing branch is 200 MHz, and when the bandwidth of the input signal is 900 MHz, the input signal can be evenly distributed. For 5 signal processing branches, the bandwidth of each signal processing branch is 180MHz, which is less than the maximum processing bandwidth of each signal processing branch is 200MHz; or, 4 signal processing branches are allocated the maximum bandwidth that can be processed , that is, 200 MHz, the bandwidth of the remaining signal processing branch is 100 MHz, which is not limited herein.

In this implementation manner, the bandwidth of each signal processing branch is limited, and various specific implementation manners are provided, thereby improving the efficiency of signal processing.

In a possible implementation, the signal processing module is a field-programmable gate array (FPGA). In this implementation manner, the signal processing module is limited, and an achievable manner is provided.

It should be noted that the baseband processing module may also be other circuit structures or chips that are responsible for signal signal processing, and are not limited herein.

Referring to FIG. 5, an embodiment of a digital transmitter in the embodiment of the present application includes:

Signal processing circuit 300 and transmitting circuit 400;

The signal processing circuit 300 is configured to generate a modulation signal, and the signal processing circuit 300 includes the signal processing circuit of any of the above embodiments and embodiments.

The transmitting circuit 400 is configured to transmit the modulated signal.

The present embodiment provides a digital transmitter that reduces the volume of the digital transmitter and improves the efficiency of the digital transmitter in performing signal processing, thereby reducing the difficulty of signal tuning.

The above embodiments are only used to explain the technical solutions of the present application, and are not limited thereto; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still The technical solutions described in the embodiments are modified, or the equivalents of the technical features are replaced by the equivalents. The modifications and substitutions of the embodiments do not depart from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

A signal processing circuit, comprising:

a signal processing module and an amplification module;

The signal processing module includes at least two baseband processing modules, and the amplification module includes at least two digital power amplifier DPA units;

The at least two baseband processing modules and the at least two DPA units form at least two signal processing branches, each of which includes a baseband processing module and a DPA unit, each of which is carried in a signal processing branch The signals have the same slope, wherein the output ports of the baseband processing modules of each signal processing branch are respectively connected to the input ports of the DPA units belonging to the same signal processing branch;

The signal processing module is configured to generate a baseband signal according to the input signal, and transmit the signal to the amplifying module;

The amplification module is configured to modulate a baseband signal and convert it into an analog signal for output to an external circuit.
The signal processing circuit according to claim 1, wherein the signal processing circuit further comprises:

Digital predistortion kernel and feedback module;

Each signal processing branch further includes one of said digital predistortion cores, said digital predistortion core being located between each of the signal processing branches between the DPA unit and the baseband processing module;

An output port of each DPA unit is connected to an input port of the feedback module, and an output port of the feedback module is connected to an input port of each baseband processing module;

A baseband processing module in each signal processing branch is used to generate a baseband signal;

a digital predistortion kernel in each signal processing branch for compensating for nonlinear distortion of the DPA unit based on predistortion coefficients;

The DPA unit in each signal processing branch is configured to modulate the baseband signal of the associated signal processing branch to obtain a modulated signal corresponding to the associated signal processing branch;

The feedback module is configured to determine pre-distortion coefficients of the respective signal processing branches according to the respective modulation signals, and feed back to the digital pre-distortion kernel of the corresponding signal processing branch.
A signal processing circuit according to claim 2, wherein

The feedback module includes a transfer switch, an analog to digital converter, and a digital predistortion engine;

The transfer switch has at least two input ports, and the number of input ports is the same as the number of signal processing branches;

Each input port of the transfer switch is respectively connected to an output port of each DPA unit, an output port of the transfer switch is connected to an input port of the analog to digital converter, an output port of the analog to digital converter and the number An input port of the predistortion engine is connected, and an output port of the digital predistortion engine is connected to an input port of the digital predistortion core;

The transfer switch is configured to transmit the modulated signal to the analog to digital converter in a time division manner;

The analog to digital converter is configured to convert the received modulated signal from an analog signal to a digital signal and transmit the signal to the digital predistortion engine;

The digital predistortion engine is configured to determine a target predistortion coefficient of a signal processing branch corresponding to the digital signal, and feed back the target predistortion coefficient to a digital predistortion core of a corresponding signal processing branch.
The signal processing circuit according to claim 2 or 3, wherein the signal processing circuit further comprises:

a synthesis module, configured to synthesize the modulated signals in the at least two signal processing branches to obtain an output signal;

The bandwidth of the output signal is the sum of the bandwidths of the respective modulated signals in the at least two signal processing branches.
A signal processing circuit according to claim 4, characterized in that

The bandwidth of the output signal is the same as the bandwidth of the input signal.
A signal processing circuit according to claim 4 or 5, characterized in that

The power spectral density difference of the output signal is equal to a sum of signal power spectral density differences of the respective signal processing branches, wherein the power spectral density difference is a signal average energy of the maximum frequency and a signal average energy of the minimum frequency difference.
A signal processing circuit according to claim 6, wherein

The power spectral density difference of the output signal satisfies a preset first threshold.
A signal processing circuit according to any of claims 2-7, characterized in that

The frequency range of the modulated signal in each signal processing branch is different.
A signal processing circuit according to any of claims 4-8, characterized in that

The synthesis module includes at least one duplexer;

The duplexer is used to synthesize two modulated signals.
A signal processing circuit according to claim 9, wherein:

The signal processing circuit has five signal processing branches;

The synthesis module includes a duplexer, a triplexer, and a synthesizer;

The duplexer is configured to synthesize a modulated signal in two signal processing branches spaced apart from the five signal processing branches to obtain a first intermediate signal;

The triplexer is configured to synthesize the modulated signals in the three signal processing branches spaced apart from the five signal processing branches to obtain a second intermediate signal;

The synthesizer is configured to combine the first intermediate signal and the second intermediate signal into the output signal.
A signal processing circuit according to any one of claims 1 to 10, characterized in that

The baseband signals in each of the at least two signal processing branches have the same bandwidth, and the bandwidth is less than a second threshold, the bandwidth is used to indicate the maximum frequency and the minimum frequency of the baseband signal The difference between the second threshold is a maximum bandwidth that the baseband processing module can process;

Or the bandwidth of the input signal in one of the at least two signal processing branches is smaller than the second threshold, and the baseband signals of the remaining signal processing branches of the at least two signal processing branches The bandwidth is equal to the second threshold, the bandwidth is used to indicate a difference between a maximum frequency and a minimum frequency of the input signal, and the second threshold is a maximum bandwidth that the baseband processing module can process.
A signal processing circuit according to any of claims 1-11, characterized in that

The signal processing module is a field programmable gate array FPGA.
A digital transmitter, comprising:

Signal processing circuit and transmitting circuit;

The signal processing circuit is operative to generate a modulated signal, the signal processing circuit comprising the signal processing circuit of any of claims 1-12;

The transmitting circuit is configured to transmit the modulated signal.