WO2019187279A1 - Light-emitting element drive device - Google Patents

Light-emitting element drive device Download PDF

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Publication number
WO2019187279A1
WO2019187279A1 PCT/JP2018/039634 JP2018039634W WO2019187279A1 WO 2019187279 A1 WO2019187279 A1 WO 2019187279A1 JP 2018039634 W JP2018039634 W JP 2018039634W WO 2019187279 A1 WO2019187279 A1 WO 2019187279A1
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WO
WIPO (PCT)
Prior art keywords
current
emitting element
light
light emitting
voltage
Prior art date
Application number
PCT/JP2018/039634
Other languages
French (fr)
Japanese (ja)
Inventor
中山 昌昭
Original Assignee
ローム株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ローム株式会社 filed Critical ローム株式会社
Priority to DE112018007350.5T priority Critical patent/DE112018007350T5/en
Priority to JP2020509589A priority patent/JP7018124B2/en
Priority to CN201880091696.XA priority patent/CN111902951A/en
Publication of WO2019187279A1 publication Critical patent/WO2019187279A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/40Details of LED load circuits
    • H05B45/44Details of LED load circuits with an active control inside an LED matrix
    • H05B45/48Details of LED load circuits with an active control inside an LED matrix having LEDs organised in strings and incorporating parallel shunting devices
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30Driver circuits
    • H05B45/345Current stabilisation; Maintaining constant current
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30Driver circuits
    • H05B45/395Linear regulators
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Definitions

  • the invention disclosed in this specification relates to a light emitting element driving device.
  • LEDs light-emitting diodes
  • Patent Document 1 can be cited as an example of the related art related to the above.
  • the invention disclosed in the present specification provides a light emitting element driving device capable of maintaining the lighting of the light emitting element light source even when the power supply voltage is lowered in view of the above-described problems found by the inventors of the present application.
  • the purpose is to do.
  • a light-emitting element driving device disclosed in the present specification includes a current driver that generates an output current that flows to a light-emitting element light source connected between a power supply voltage application terminal and a ground terminal, and when the power supply voltage decreases.
  • a bypass function unit that bypasses at least one of the plurality of light emitting elements constituting the light emitting element light source and reduces the number of series stages of the light emitting elements through which the output current flows (first configuration) is provided.
  • the bypass function unit compares the power supply voltage or a divided voltage thereof with a predetermined threshold voltage to generate a comparison signal, and the comparison signal And a switch that switches whether or not to bypass at least one of the plurality of light-emitting elements.
  • the comparator may be a hysteresis comparator (third configuration).
  • the bypass function unit gradually changes the output current flowing through the light emitting element to be bypassed when switching the number of series stages of the light emitting elements through which the output current flows.
  • a configuration (fourth configuration) is preferable.
  • the bypass function unit passes through the light emitting element to be bypassed among the output currents based on a control current corresponding to the power supply voltage or a divided voltage thereof.
  • a configuration (fifth configuration) in which the set value of the branch current not to be variably controlled is good.
  • the control current starts to flow when the power supply voltage or the divided voltage becomes higher than a predetermined threshold voltage (sixth configuration). Good.
  • the set value of the branch current decreases from the maximum value larger than the target value of the output current as the control current increases.
  • a configuration (seventh configuration) is preferable.
  • the bypass function unit In the light emitting element driving apparatus having any one of the fifth to seventh configurations, the bypass function unit generates the control current so that a terminal voltage of a bypass control terminal through which the control current flows matches a threshold voltage.
  • the control current generator may be configured (eighth configuration).
  • the terminal voltage is a voltage obtained by subtracting a voltage drop corresponding to the control current from the power supply voltage or the divided voltage (ninth configuration). ).
  • the bypass function unit includes a first coefficient multiplying unit that multiplies a reference coefficient for determining a target value of the output current by a first coefficient, A second coefficient multiplier that multiplies the control current by a second coefficient, a subtractor that subtracts the output signal of the second coefficient multiplier from the output signal of the first coefficient multiplier, and the output signal of the subtractor according to the output signal And a current source that generates a branch current (a tenth configuration).
  • the bypass function unit includes a reference voltage generation unit that generates a reference voltage corresponding to a target value of the output current, and a response corresponding to the branch current.
  • a current detection unit that generates a sense voltage; an offset applying unit that applies an offset voltage corresponding to the control current to the sense voltage; and the branch so that the sense voltage to which the offset voltage is applied matches the reference voltage It may be configured to further include a branch current generation unit that generates a current (an eleventh configuration).
  • the first end is connected to the power supply voltage application end and the second end is connected to the divided voltage application end.
  • a configuration in which a third resistor having two ends connected to the bypass control terminal is externally attached (a twelfth configuration) may be employed.
  • the bypass control terminal may be configured to be adjacent to the power supply voltage input terminal (a thirteenth configuration).
  • the external terminal through which the branch current flows is adjacent to at least one of the output terminal and the ground terminal of the output current (fourteenth configuration).
  • the current driver may be configured to be a current source type (fifteenth configuration).
  • the current driver may be configured to be a current sink type (sixteenth configuration).
  • the light-emitting device disclosed in this specification includes a light-emitting element light source formed by connecting a plurality of light-emitting elements in series and any of the first to sixteenth configurations, and drives the light-emitting element light source.
  • a light emitting element driving device (a seventeenth configuration).
  • the light emitting element may be a light emitting diode or an organic EL element (eighteenth configuration).
  • the light emitting device having the seventeenth or eighteenth configuration further includes a substrate on which a wiring pattern for mounting the light emitting element light source and the light emitting element driving device is laid, and a socket for mounting the substrate. It is preferable to have the configuration (19th configuration).
  • the vehicle disclosed in the present specification has a configuration (twentieth configuration) having a light emitting device having any one of the seventeenth to nineteenth configurations.
  • the light emitting element driving device disclosed in the present specification, it is possible to keep the light emitting element light source on even if the power supply voltage decreases.
  • Timing chart showing an example of bypass operation in the first embodiment The figure which shows 2nd Embodiment of a bypass function part.
  • Timing chart showing an example of bypass operation in the second embodiment The figure which shows the element addition example of LED light-emitting device
  • the figure which shows the 2nd setting example of external resistance (Iout 600mA)
  • FIG. 1 is a diagram illustrating an overall configuration of a vehicle including an LED light emitting device.
  • the vehicle X in the figure includes an LED light emitting device X1, a battery X2, and power switches X3a and X3b.
  • the LED light emitting device X1 is an in-vehicle lamp that is lit by receiving the supply of the power supply voltage Vin from the battery X2.
  • Examples of the light emitting device X1 include a headlamp, a daytime running lamp, a tail lamp, a stop lamp, or a turn lamp.
  • the battery X2 is a power source of the vehicle X, and a lead storage battery or a lithium ion battery is preferably used.
  • the power switches X3a and X2b are respectively connected between the light emitting device X1 and the battery X2, and are turned on / off in response to a control signal from a controller (not shown).
  • the LED light-emitting device X1 includes an LED driving device 100 and an LED light source 200, and various discrete components externally attached to the LED driving device 100 include resistors R1 to R4, capacitors C1 to C3, and diodes D1 to D3. Negative characteristic thermistor NTC.
  • the LED driving device 100 has a plurality of external terminals (in this figure, VIN pin, PBUS pin, SWCNT pin, CRT pin, DISC pin, GND pin as means for establishing electrical connection with the outside of the device. , ISET pin, THD pin, SW pin, and IOUT pin).
  • the VIN pin is a power supply voltage input terminal.
  • the PBUS pin is an abnormality detection input / output terminal.
  • the SWCNT pin is a power supply voltage monitoring terminal.
  • the CRT pin is a CR timer setting terminal.
  • the DISC pin is a CR timer discharge terminal.
  • the GND pin is a ground terminal.
  • the ISET pin is a reference current setting terminal.
  • the THD pin is a temperature derating setting terminal.
  • the SW pin is a bypass switch connection terminal.
  • the IOUT pin is an output current output terminal.
  • the positive terminal of the battery X2 is connected to the first terminal of each of the power switches X3a and X3b.
  • the negative terminal of the battery X2 is connected to the ground terminal.
  • the second end of the power switch X3a is connected to the anode of the diode D1.
  • the second end of the power switch X3b is connected to the anodes of the diodes D2 and D3.
  • the cathodes of the diodes D1 and D2 are connected to the VIN pin.
  • the cathode of the diode D3 is connected to the CRT pin.
  • the diodes D1 to D3 connected in this way function as a backflow prevention diode for interrupting a backflow current from the light emitting device X1 to the battery X2.
  • Resistors R1 and R2 are connected in series between the VIN pin and the ground terminal. A connection node between the resistors R1 and R2 is connected to the SWCNT pin.
  • the resistor R3 is connected between the CRT pin and the DISC pin, and functions as a part of the CR timer 106.
  • the resistor R4 is connected between the ISET pin and the ground terminal, and functions as a part of the reference current setting unit 109.
  • the capacitor C1 is connected between the VIN pin and the ground terminal, and functions as an input smoothing capacitor.
  • the capacitor C2 is connected between the IOUT pin and the ground terminal, and functions as an output smoothing capacitor.
  • the capacitor C3 is connected between the CRT pin and the ground terminal, and functions as a part of the CR timer 106.
  • the negative characteristic thermistor NTC is connected between the THD pin and the ground terminal, and functions as a part of the reference current setting unit 109 (temperature detection element).
  • the LED driving device 100 is a silicon monolithic semiconductor integrated circuit device (so-called LED driver IC) that operates by receiving the supply voltage Vin from the battery X2 and generates an output current Iout to be supplied to the LED light source 200.
  • LED driver IC silicon monolithic semiconductor integrated circuit device
  • the LED light source 200 is an LED string including a plurality of LED chips connected in series (in this figure, LED chips 201 to 203).
  • LED chips 201 to 203 When the LED chips 201 to 203 are viewed individually, each can be understood as a single LED element, or can be understood as a light emitting element assembly in which a plurality of LED elements are combined in series or in parallel. .
  • the power switch X3a is turned on and the power switch X3b is turned off.
  • the power supply voltage Vin is applied from the battery X2 to the VIN pin via the power switch X3a and the diode D1.
  • the CRT pin is in an open state with respect to the battery X2.
  • the power switch X3a is turned off and the power switch X3b is turned on.
  • the power supply voltage Vin is applied from the battery X2 to the VIN pin via the power switch X3b and the diode D2.
  • the LED driving device 100 includes a current driver 101, a reference voltage generation unit 102, an open mask function unit 103, an overvoltage mute unit 104, a protect bus function unit 105, a CR timer 106, an LED open detection unit 107, LED short detection unit 108, reference current setting unit 109, ISET open / short detection unit 110, control logic unit 111, bypass function unit 112, N-channel MOS (metal oxide semiconductor) field effect transistors N1 and N2 And current sources CS1 and CS2 and switches SW1 and SW2 are integrated. Further, although not explicitly shown in the drawing, the LED driving device 100 also has other circuit parts (such as UVLO [under voltage locked out] function part and TSD [thermal shutdown] function part) integrated therein.
  • UVLO under voltage locked out
  • TSD thermal shutdown
  • the current driver 101 performs constant current control of the output current Iout so that the output current Iout flowing through the LED light source 200 matches a predetermined target value.
  • the current driver 101 includes, for example, an output transistor provided on a current path through which the output current Iout flows, a sense resistor that converts the output current Iout into a feedback voltage, a feedback voltage, and a reference voltage. And an operational amplifier that performs linear drive of the output transistor so that they match. Note that the target value of the output current Iout can be arbitrarily set according to the reference current Iset.
  • the reference voltage generation unit 102 generates a predetermined reference voltage VREG (for example, 5V) from the power supply voltage Vin (for example, 5.5V to 20V), and outputs this to each unit of the LED driving device 100.
  • a predetermined reference voltage VREG for example, 5V
  • Vin for example, 5.5V to 20V
  • the open mask function unit 103 When the power supply voltage Vin is lower than a predetermined threshold voltage, the open mask function unit 103 notifies the detection result to the control logic unit 111 and masks the detection result of the LED open detection unit 107. With such an open mask function, for example, it is possible to eliminate erroneous detection of LED open when the power supply voltage Vin rises.
  • the overvoltage mute unit 104 reduces the reference current Iset (and thus the output current Iout) according to the difference value between the two (in excess of Vin).
  • a predetermined threshold voltage for example, 16 V
  • the overvoltage mute unit 104 reduces the reference current Iset (and thus the output current Iout) according to the difference value between the two (in excess of Vin).
  • the reference current setting unit 109 is controlled.
  • Such overvoltage mute processing can suppress abnormal heat generation of the LED driving device 100.
  • the protect bus function unit 105 shares the abnormality detection results among the plurality of LED driving devices 100 and reflects them in the abnormality protection operation by the control logic unit 111. For example, when a certain abnormality (LED open, LED short, UVLO, temperature abnormality, etc.) is detected in the LED driving device 100, the protect bus function unit 105 outputs an abnormality detection signal to the outside via the PBUS pin. Further, when an abnormality detection signal is externally input via the PBUS pin, the protect bus function unit 105 transfers this to the control logic unit 111. By such an operation, for example, if an abnormality is detected in one LED driving device, a cooperative protection operation can be realized such that all the LED driving devices are stopped.
  • a certain abnormality LED open, LED short, UVLO, temperature abnormality, etc.
  • the CR timer 106 pulses the PWM dimming signal S1 to the control logic unit 111 in order to perform PWM dimming of the LED light source 200 in the PWM dimming mode (X3b off) in which no DC voltage is applied to the CRT pin. .
  • the CR timer 106 performs on / off control of the switch SW1 and the transistors N1 and N2 using the PWM dimming signal S1, and periodically switches charging / discharging of the capacitor C3, thereby changing the terminal voltage of the CRT pin to a triangle.
  • Driving in a wave form is performed to drive the PWM dimming signal S1.
  • the time average value of the output current Iout (and hence the luminance of the LED light source 200) changes according to the on-duty of the PWM dimming signal S1.
  • the cycle and on-duty of the PWM dimming signal S1 can be arbitrarily set by adjusting the resistance value of the resistor R3 and the capacitance value of the capacitor C3.
  • the CR timer 106 fixes the logic level of the PWM dimming signal S1 in the DC dimming mode (X3b ON) in which a DC voltage is applied to the CRT pin.
  • the control logic unit 111 performs constant current control of the output current Iout.
  • the LED driving device 100 has the CR timer 106 built-in, PWM dimming without a microcomputer can be realized, so that the cost of the LED light emitting device X1 can be reduced.
  • the CR timer 106 has a function of outputting a PWM signal as a PWM dimming signal S1 to the control logic unit 111 when a PWM signal is externally input to the CRT pin. It is possible to cope with.
  • a predetermined threshold voltage for example, 0.6 V / 0.8 V
  • ground fault refers to a short circuit to the ground terminal or a low potential terminal equivalent thereto.
  • the reference current setting unit 109 generates a reference current Iset for setting a target value for the output current Iout.
  • the reference current Iset can be arbitrarily set by adjusting the resistance value of the resistor R4.
  • the reference current setting unit 109 also has a temperature derating function for adjusting the reference current Iset according to the resistance value of the negative characteristic thermistor NTC.
  • the ISET open / short detection unit 110 detects whether an open / short has occurred in the ISET pin by comparing the terminal voltage of the ISET pin with a predetermined threshold voltage, and the detection result is controlled by the control logic unit 111. Notify
  • the control logic unit 111 is a main body that comprehensively controls the operation of the entire LED driving device 100.
  • the control logic unit 111 detects detections obtained by various abnormality detection units (overvoltage mute unit 104, protect bus function unit 105, LED open detection unit 107, LED short detection unit 108, ISET open / short detection unit 110). It has a function of variably controlling the current value of the output current Iout according to the result and switching its output availability.
  • the output current Iout flows by bypassing at least one of the plurality of LED chips 201 to 203 (the LED chip 203 in this figure) constituting the LED light source 200. The total number of LED chips in series is reduced, and the total forward voltage drop Vf_total of the LED light source 200 is lowered.
  • the total forward voltage drop Vf_total of the LED light source 200 can be reduced from “3 Vf” to “2 Vf” (where Vf is the LED chip) 201-203 forward voltage drop).
  • bypass function unit 112 By incorporating such a bypass function unit 112, it is possible to keep the LED light source 200 on even if the power supply voltage Vin decreases.
  • the configuration and operation of the bypass function unit 112 will be described in detail later.
  • Transistors N1 and N2 are connected between the DISC pin and the ground terminal, and are on / off controlled by the CR timer 106.
  • the current source CS1 and the switch SW1 are connected in series between the application terminal of the reference voltage VREG and the CRT pin.
  • the current source CS1 generates a source current for charging the capacitor C3.
  • the switch SW1 is turned on / off in response to the PWM dimming signal S1 output from the CR timer 106.
  • the current source CS2 and the switch SW2 are connected in series between the VIN pin and the IOUT pin.
  • the current source CS2 generates a source current (for example, 1 mA) for preventing the LED short detection unit 108 from malfunctioning.
  • FIG. 2 is a diagram illustrating a first embodiment of the bypass function unit 112.
  • the bypass function unit 112 of the present embodiment includes a comparator 112a and a switch 112b (in this embodiment, an N-channel MOS field effect transistor).
  • the logic level of the comparison signal Sa is not unnecessarily switched even when noise or the like is superimposed on the monitoring voltage Vm. Therefore, it is possible to improve the operational stability of the bypass function unit 112.
  • the resistors R1 and R2 may be omitted and the power supply voltage Vin may be directly input to the comparator 112a.
  • the switch 112b is connected between the SW pin and the ground terminal, and is turned on / off in accordance with the comparison signal Sa to turn on at least one of the LED chips 201 to 203 (the LED chip 203 in the example of this figure). Switches whether to bypass.
  • the switch 112b is turned off, so that the LED chip 203 is not bypassed.
  • the output current Iout output from the IOUT pin flows through the first current path to the ground terminal via all the LED chips 201 to 203.
  • the switch 112b is turned on, so that the LED chip 203 is bypassed. At this time, the output current Iout output from the IOUT pin flows into the second current path from the cathode of the LED chip 202 to the SW pin and reaching the ground terminal.
  • IoutA the first output current flowing through the first current path
  • IoutB the second output current flowing through the second current path
  • FIG. 3 is a timing chart showing an example of the bypass operation in the first embodiment.
  • the power supply voltage Vin, the output current Iout, the first output current IoutA, and the second output current IoutB are depicted in order from the top. ing.
  • the LED chip 203 is bypassed, the number of series stages of the LED chips through which the output current Iout flows is reduced, and the total forward drop voltage Vf_total of the LED light source 200 is reduced. The lighting of 200 is maintained.
  • the LED light source 200 is turned on with the maximum luminance by releasing the bypass of the LED chip 203 and causing all the LED chips 201 to 203 to emit light.
  • the comparison signal Sa is maintained at a low level while Vin> VthL ⁇ ⁇ (R1 + R2) / R2 ⁇ , that is, Vm> VthL, and the switch 112b is turned off. Will remain.
  • the LED light source 200 is continuously lit at the maximum luminance.
  • the bypass function unit 112 compares the power supply voltage Vin with the bypass release voltage VthH ⁇ ⁇ (R1 + R2) / R2 ⁇ and the bypass start voltage VthL ⁇ ⁇ (R1 + R2) / R2 ⁇ . Bypass control is performed. Note that both the bypass release voltage and the bypass start voltage can be arbitrarily set by adjusting the resistance values of the resistors R1 and R2 externally attached to the SWCNT pin.
  • FIG. 4 is a diagram illustrating a second embodiment of the bypass function unit 112.
  • the bypass function unit 112 of the present embodiment includes operational amplifiers AMP1 to AMP3, N-channel MOS field effect transistors M1 to M3, current mirrors CM1 and CM2, a current control unit CTRL, and resistors Ra to Rd.
  • the LED driving device 100 is provided with an ISINK pin, a SET pin, and an RVIN pin instead of the SW pin and the SWCNT pin of FIG.
  • resistors RSET and RVIN are externally attached to the SET pin and the RVIN pin, respectively.
  • a predetermined reference voltage VREF (for example, a band gap voltage) is input to the non-inverting input terminal (+) of the operational amplifier AMP1.
  • the inverting input terminal ( ⁇ ) of the operational amplifier AMP1 is connected to the SET pin and the source and back gate of the transistor M1.
  • the output terminal of the operational amplifier AMP1 is connected to the gate of the transistor M1.
  • the drain of the transistor M1 is connected to the current input terminal of the current mirror CM1.
  • the current output terminal of the current mirror CM1 is connected to the current input terminal of the current mirror CM2.
  • the resistors Ra and Rb are connected in series between the input terminal of the power supply voltage Vin and the ground terminal.
  • the non-inverting input terminal (+) of the operational amplifier AMP2 is connected to a connection node between the resistors Ra and Rb.
  • the inverting input terminal ( ⁇ ) of the operational amplifier AMP2 is connected to the RVIN pin and the source and back gate of the transistor M2.
  • the output terminal of the operational amplifier AMP2 is connected to the gate of the transistor M2.
  • a second end of the resistor Rc is connected to the ground end.
  • the non-inverting input terminal (+) of the operational amplifier AMP3 is connected to the first terminal of the resistor Rc.
  • the inverting input terminal ( ⁇ ) of the operational amplifier AMP3 is connected to the first terminal of the resistor Rd and the source and back gate of the transistor M3.
  • the second end of the resistor Rd is connected to the ground end.
  • the output terminal of the operational amplifier AMP3 is connected to the gate of the transistor M3.
  • the drain of transistor M3 is connected to the ISINK pin.
  • the operational amplifier AMP1, the transistor M1, the resistor RSET, and the current mirrors CM1 and CM2 function as a first internal current generation unit that generates a fixed-value internal current Ia.
  • the operational amplifier AMP2, the transistor M2, the resistor RVIN, and the resistors Ra and Rb function as a second internal current generator that generates an internal current Ib having a variable value corresponding to the power supply voltage Vin.
  • the operational amplifier AMP3, the transistor M3, and the resistors Rc and Rd function as a current sink unit that draws the second output current IoutB corresponding to the internal current Ic from the ISINK pin.
  • FIG. 5 is a timing chart showing an example of the bypass operation in the second embodiment. Similarly to FIG. 3, the power supply voltage Vin, the output current Iout, the first output current IoutA, and the second The output current IoutB is depicted.
  • the bypass function unit 112 of the second embodiment controls whether to bypass the LED chip 203 and switches the number of LED chips in series in which the output current Iout flows, from the cathode of the LED chip 202.
  • the bypass function unit 112 of the present embodiment when the bypass state of the LED chip 203 is switched, the luminance change of the LED light source 200 is moderate as compared to the first embodiment (FIG. 2). The user does not feel uncomfortable.
  • FIG. 6 is a diagram illustrating an example of adding elements of the LED light emitting device X1.
  • the LED light-emitting device X1 of this configuration example further includes resistors R5 to R7 based on FIG.
  • the resistor R5 is connected between the anode of each of the diodes D2 and D3 and the ground terminal.
  • the resistor R6 is connected between the THD pin and the ground terminal.
  • the resistor R7 is connected between the THD pin and the negative characteristic thermistor NTC.
  • FIG. 7 is a diagram illustrating a third embodiment of the bypass function unit 112 (and the LED driving device 100 including the bypass function unit 112).
  • the LED drive device 100 of the present embodiment has basically the same configuration as that of the first embodiment (FIG. 1), but some components are not illustrated.
  • the respective codes are changed (IOUT ⁇ OUT, ISET ⁇ SET, SW ⁇ ISLINK, SWCNT ⁇ BPCNT, IoutB ⁇ Isink, R1 ⁇ RBP1, R2 ⁇ RBP2, R4 ⁇ RSET. ).
  • each function is basically unchanged.
  • the connection relationship between the resistors RBP1 to RBP3 will be specifically described.
  • a first end of the resistor RBP1 is connected to an application end of the power supply voltage Vin.
  • a second end of the resistor RBP2 is connected to the ground end.
  • a second end of the resistor RBP3 is connected to the BPCNT pin.
  • the bypass function unit 112 having a new configuration will be described mainly.
  • the bypass function unit 112 of the present embodiment includes an operational amplifier 112A, a P-channel MOS field effect transistor 112B, coefficient multiplication units 112C and 112D, a subtraction unit 112E, and a current source 112F.
  • the non-inverting input terminal (+) of the operational amplifier 112A is connected to the application terminal of the threshold voltage VBP.
  • the output terminal of the operational amplifier 112A is connected to the gate of the transistor 112B.
  • the source and back gate of transistor 112B are connected to the BPCNT pin.
  • the drain of the transistor 112B is connected to the input terminal of the coefficient multiplier 112D.
  • the operational amplifier 112A and the transistor 112B connected in this way function as a control current generation unit that generates the control current IBPCTL so that the terminal voltage Vin_div2 of the BPCTL pin matches the threshold voltage VBP.
  • the subtractor 112E subtracts the output signal of the coefficient multiplier 112D from the output signal of the coefficient multiplier 112C.
  • the set value of the sink current I sink and the maximum value I sink_max thereof, and the control current IBPCNT can be calculated by the following equations (1a), (1b), and (1c), respectively.
  • the bypass function unit 112 of the present embodiment can variably control the set value of the sink current Isink based on the control current IBPCTL corresponding to the power supply voltage Vin or the divided voltage Vin_div.
  • the ISINK pin may be connected to GND, and the BPCNT pin may be connected to a resistor pull-down or GND.
  • FIG. 8 is a timing chart showing an example of the bypass operation in the third embodiment.
  • the power supply voltage Vin, the divided voltage Vin_div and the terminal voltage Vin_div2 the output current Iout, the control current IBPCNT, the sink current Isink, and ,
  • the maximum value I sink_max may be set to a value larger than the target value of the output current Iout. According to such setting, the output current Iout can be entirely covered by the sink current Isink, so that the output current IoutA flowing through the LED chip 203 is maintained at a zero value.
  • the LED chip 203 is completely bypassed, and only the LED chips 201 and 202 are lit.
  • the LED chip 203 can be bypassed to reduce the number of LED chips connected in series, and the total forward voltage drop Vf_total of the LED light source 200 can be reduced.
  • the LED light source 200 can be kept on.
  • the output current I out is all covered by the sink current I sink.
  • the output current IoutA flowing through the LED chip 203 remains at a zero value.
  • the sink current I sink gradually decreases as the power supply voltage Vin increases, and the output current IoutA increases complementarily by the decrease.
  • the output current Iout flows as the output current IoutA, that is, the bypass of the LED chip 203 is completely released. Become.
  • the sink current I sink drawn from the cathode of the LED chip 202 to the ISINK pin and the LED chip 203 to be bypassed as in the second embodiment (FIG. 4).
  • the power supply voltage Vin starting to decrease the set value of the sink current I sink by appropriately adjusting the resistance values of the external resistors RBP1, RBP2, and RBP3, and the sink Both the slope when the set value of the current I sink is lowered (the power supply voltage Vin at which the sink current I sink does not flow) can be arbitrarily set.
  • the set value of the current I sink is lowered (the power supply voltage Vin at which the sink current I sink does not flow)
  • the horizontal axis represents the power supply voltage Vin [V]
  • the vertical axis represents the set value [mA] of the sink current I sink.
  • VBPstart corresponds to the power supply voltage Vin at which the set value of the sink current I sink starts to decrease.
  • ⁇ VBP [V] indicates an increase width of the power supply voltage Vin required from when the set value of the sink current I sink starts to decrease to the zero value.
  • RBP1 18.9 k ⁇
  • RBP2 10.0 k ⁇
  • RBP3 18.8 k ⁇
  • RBP1 30.6 k ⁇
  • RBP2 10.0 k ⁇
  • RBP3 64.8 k ⁇
  • the horizontal axis represents the power supply voltage Vin [V]
  • the vertical axis represents the set value [mA] of the sink current Isink.
  • RBP1 15.6 k ⁇
  • RBP2 10.0 k ⁇
  • RBP3 13.0 k ⁇
  • RBP1 30.6 k ⁇
  • RBP2 10.0 k ⁇
  • RBP3 4.52 k ⁇
  • RBP1 11.18 k ⁇
  • RBP2 3.30 k ⁇
  • RBP3 0.24 k ⁇ , respectively.
  • FIG. 11 is a diagram illustrating a fourth embodiment of the bypass function unit 112.
  • the bypass function unit 112 of the present embodiment is a configuration embodying the third embodiment (FIG. 7), and includes the previous operational amplifier 112A and the transistor 112B, as well as coefficient multiplication units 112C and 112D, a subtraction unit 112E, As the components corresponding to the current source 112F, an operational amplifier 112G, a current source 112H, an N-channel MOS field effect transistor 112I, and resistors RA, RB, and RC are included.
  • the first end of the current source 112H is connected to the power supply end.
  • the second end of the current source 112H and the first end of the resistor RA are connected to the non-inverting input terminal (+) of the operational amplifier 112G.
  • a second end of the resistor RA is connected to the ground end.
  • the inverting input terminal ( ⁇ ) of the operational amplifier 112G is connected to the drain of the transistor 112B and the first terminal of the resistor RC.
  • the output terminal of the operational amplifier 112G is connected to the gate of the transistor 112I.
  • the drain of transistor 112I is connected to the ISINK pin.
  • the source and back gate of the transistor 112I are connected to the first end of the resistor RB and the second end of the resistor RC.
  • a second end of the resistor RB is connected to the ground end.
  • the current source 112H generates a reference current Iset (or a constant current corresponding thereto) for determining a target value of the output current Iout.
  • the resistor RA is a current / voltage conversion element that converts the reference current Iset into a reference voltage Vref.
  • the resistor RB is a current / voltage conversion element that converts the sink current I sink into the sense voltage Vs.
  • Vofs ′ IBPCTL ⁇ RB
  • the resistors RB and RC may be understood as the offset applying unit. .
  • the operational amplifier 112G and the transistor 112I function as a sink current generator that generates the sink current I sink so that the offset sense voltage (Vs + Vofs) matches the reference voltage Vref.
  • the sink current Isink is generated so that the sense voltage Vs to which no offset is applied matches the reference voltage Vref.
  • This state corresponds to a state where the set value of the sink current I sink is set to the maximum value I sink_max and the output current IoutA does not flow at all, that is, the LED chip 203 is completely bypassed.
  • the offset voltage Vofs corresponding to the current value is added to the sense voltage Vs and fed back to the operational amplifier 112G.
  • the feedback loop reaches equilibrium with a smaller sink current I sink.
  • This state corresponds to a state where the set value of the sink current I sink is lowered from the maximum value I sink_max, that is, a state where complementary linear cross control of the sink current I sink and the output current I outA is performed.
  • This state is a state where all the output current Iout flows as the output current IoutA, that is, a state where the bypass of the LED chip 203 is completely released.
  • FIG. 12 is a diagram showing a terminal arrangement of the LED driving device 100 in FIGS. 7 and 11.
  • the LED driving device 100 is sealed in a VSON (Very-thin Small Outline No Lead) package, and has ten external terminals (VIN pin, BPCNT as means for establishing electrical connection with the outside of the device).
  • VIN pin, BPCNT as means for establishing electrical connection with the outside of the device.
  • the VIN pin (pin 1) is a power supply voltage input terminal.
  • the BPCNT pin (pin 2) is a current bypass function setting terminal at the time of power reduction.
  • the PBUS pin (pin 3) is an abnormal state flag output / output current off control input terminal.
  • the CRT pin (pin 4) and the DISC pin (pin 5) are CR timer setting terminals, respectively.
  • the THD pin (pin 6) is a temperature derating setting terminal.
  • the SET pin (pin 7) is an output current setting terminal.
  • the GND pin (8 pin) is a ground terminal.
  • the ISINK pin (pin 9) is a current sink terminal.
  • the OUT pin (10 pin) is a current output terminal.
  • the BPCNT pin (pin 2) is a resistance voltage dividing input terminal for the power supply voltage Vin, it is desirable to provide it adjacent to the VIN pin (pin 1).
  • both the OUT pin (10 pin) and the ISINK pin (9 pin) are terminals connected to the LED light source 200, it is desirable to provide them adjacent to each other.
  • the LED driving device 100 is provided with a heat radiation pad EXP-PAD on the lower surface of the package.
  • the heat dissipation pad EXP-PAD may be GND-connected.
  • FIG. 13 is a plan view showing a socket-type LED module Y as an example of realizing the LED light-emitting device X1 described so far.
  • the socket type LED module Y of this configuration example is, for example, an in-vehicle lighting fixture, and includes a substrate 300, an LED chip 400 (corresponding to the above-described LED chips 201 to 203), a white resin 480, a reflector 600, a terminal 800, Various electronic components (LED driving device 100, resistors R1 to R7, capacitors C1 to C3, diodes D1 to D3, negative characteristic thermistor NTC) and a socket 900 are provided.
  • the substrate 300 has a base material and a wiring pattern formed thereon (see the hatched area in the figure).
  • the substrate has a rectangular shape and is made of, for example, a glass epoxy resin.
  • the wiring pattern is a conductive member laid on the surface of the base material for mounting the LED chip 400 and various electronic components, and is made of, for example, a metal such as Cu or Ag.
  • the LED driving device 100, resistors R1 to R7, capacitors C1 to C3, diodes D1 to D3, and a negative characteristic thermistor NTC are mounted on the upper surface of the substrate 300.
  • Each electronic component is connected by a wiring pattern laid on the upper and lower surfaces of the substrate 300 to form a circuit, and is for lighting the LED chip 400 in a desired light emitting state.
  • the up, down, left, and right directions of the page are defined as the up, down, left, and right directions of the substrate 300
  • the component arrangement direction parallel to the up and down direction of the substrate 300 is defined as the vertical direction
  • the direction is defined as horizontal
  • the arrangement of electronic components (depicted by a thin broken frame in the drawing) will be described.
  • the LED driving device 100 is arranged in the upper left area of the substrate 300 so that the arrangement direction of the pins is horizontal.
  • the resistor R1 is disposed sideways on the upper right side of the LED driving device 100 in the upper central region of the substrate 300.
  • the resistor R2 is disposed sideways on the upper side of the LED driving device 100 (left side of the resistor R1) in the upper left region of the substrate 300.
  • the resistor R ⁇ b> 3 is arranged vertically on the left side of the LED driving device 100 in the upper left region of the substrate 300.
  • the resistor R ⁇ b> 4 is disposed laterally below the LED driving device 100 in the upper left region of the substrate 300.
  • the resistor R5 is disposed horizontally on the right side of the diode D2 in the lower left region of the substrate 300.
  • the resistor R ⁇ b> 6 is disposed sideways on the left side of the LED driving device 100 in the upper left region of the substrate 300.
  • the resistor R7 is disposed in the horizontal direction on the lower left side of the LED driving device 100 (below the resistor R6) in the upper left region of the substrate 300.
  • Negative characteristic thermistor NTC is arranged vertically below resistor R7 in the left center region of substrate 300.
  • the capacitor C ⁇ b> 1 is arranged vertically on the right side of the LED driving device 100 in the upper center region of the substrate 300.
  • the capacitor C ⁇ b> 2 is disposed sideways on the right side of the LED driving device 100 in the upper center region of the substrate 300.
  • the capacitor C3 is arranged in the vertical direction on the left side of the resistor R3 and above the resistor R6 in the upper left region of the substrate 300.
  • the diode D1 is arranged vertically in the lower right region of the substrate 300.
  • the diode D ⁇ b> 2 is arranged in the vertical direction in the lower left region of the substrate 300.
  • the diode D3 is arranged vertically in the left center region of the substrate 300 on the left side of the negative characteristic thermistor NTC.
  • the diode D3 is smaller than the diodes D1 and D2.
  • the reflector 600 is made of, for example, a white resin, and is fixed to the central region of the substrate 300 so as to surround the LED chip 400.
  • the reflector 600 is for reflecting upward the light emitted from the LED chip 400 to the side.
  • a reflecting surface 601 is formed on the reflector 600.
  • the reflective surface 601 surrounds the LED chip 400.
  • the reflective surface 601 moves away from the LED chip 400 in the direction perpendicular to the thickness direction of the substrate 300 as it is separated from the substrate 300 in the thickness direction of the substrate 300. It is inclined to. That is, the reflecting surface 601 has a tapered shape in which a cross section orthogonal to the thickness direction of the substrate 300 increases toward the opening side of the reflector 600.
  • the LED chip 400 is a light source of the socket type LED module Y and emits red light, for example.
  • the three LED chips 400 are mounted on the substrate 300 so as to be surrounded by the reflector 600.
  • three LED chips 400 are respectively arranged at positions corresponding to the vertices of the equilateral triangle.
  • the layout of the LED chip 400 is not limited to this, and for example, as shown in FIG. 14, the three LED chips 400 may be arranged in a line along the left-right direction of the substrate 300. .
  • the emission color of the LED chip 400 is not limited thereto.
  • the white resin 480 is made of a white resin material that does not transmit light from the LED chip 400 and corresponds to an example of an opaque resin. As can be understood from FIG. 13, the white resin 480 surrounds the LED chip 400, and the outer peripheral edge reaches the reflecting surface 601 of the reflector 600. For this reason, in FIG. 13, the region extending from the LED chip 400 to the reflection surface 601 in the vertical direction and the horizontal direction in the drawing is filled with the white resin 480.
  • the terminal 800 is a metal wire serving as an electrode, and is provided through the substrate 300 and the socket 900. One end of the terminal 800 is connected to a part of the wiring pattern by, for example, solder.
  • the socket 900 is a component that mounts the substrate 300 and is attached to, for example, an automobile.
  • the socket 900 is made of, for example, a synthetic resin, and is formed by, for example, injection molding.
  • the socket 900 includes a mounting portion 910 for mounting the substrate 300 and an attachment portion for attachment to an automobile or the like.
  • the mounting portion 910 has a cylindrical shape with one opening, and the substrate 300 is mounted on the inner bottom surface of the mounting portion 910.
  • a heat radiating plate 950 which is a circular plate made of, for example, aluminum, is fixed to the inner bottom surface of the mounting portion 910.
  • the substrate 300 is mounted on the mounting portion 910 of the socket 900 by bonding the lower surface to the upper surface of the heat sink 950 with an adhesive.
  • the white resin 480 covers the entire annular region from the support substrate of the LED chip 400 to the reflection surface 601 of the reflector 600. Therefore, the area surrounded by the reflective surface 601 is covered with the white resin 480 except for the area occupied by the LED chip 400. Thereby, more light from the semiconductor layer of the LED chip 400 can be reflected. This is suitable for increasing the brightness of the socket type LED module Y. In addition, it is not necessary to separately perform a process for suitably reflecting light in the region surrounded by the reflection surface 601 of the substrate 300.
  • the reflector 600 having the reflective surface 601 By providing the reflector 600 having the reflective surface 601, the direction directly above the socket-type LED module Y can be illuminated more brightly.
  • the LED chips 400 serving as the light source are concentrated in one place. Therefore, even if any one of the LED chips 400 is bypassed by using the bypass function unit 112 when the power supply voltage Vin is decreased, only the brightness of one LED chip is decreased. It will never go out.
  • in-vehicle lamps are required to comply with the law that the lighting state must be maintained even when the power supply voltage Vin decreases.
  • the LED driving device 100 including the bypass function unit 112 is very suitable as a driving subject of the in-vehicle lamp.
  • the LED chip disposed at the end may be targeted for bypass.
  • the LED driving device 100 described so far includes, for example, as shown in FIGS. 15 and 16, a headlamp (including a high beam / low beam / small lamp / fog lamp, etc.) X11 of a vehicle X10, a daytime running lamp. (DRL [daylight running lamps]) X12, tail lamps (including small lamps and back lamps as appropriate) X13, stop lamps X14, turn lamps X15 and the like can be incorporated and used.
  • a headlamp including a high beam / low beam / small lamp / fog lamp, etc.
  • X11 of a vehicle X10 a daytime running lamp.
  • DSL [daylight running lamps] daytime running lamps]
  • tail lamps including small lamps and back lamps as appropriate
  • stop lamps X14 stop lamps X14
  • turn lamps X15 and the like can be incorporated and used.
  • the LED driving device 100 includes a module (socket-type LED module Y in FIGS. 13 to 14, LED headlamp module Y10 in FIG. 17, LED turn lamp module Y20 in FIG. 19 may be provided as an LED rear lamp module Y30 of FIG. 19, or may be provided as an IC unit independently of the LED light source 200.
  • a module ocket-type LED module Y in FIGS. 13 to 14, LED headlamp module Y10 in FIG. 17, LED turn lamp module Y20 in FIG. 19 may be provided as an LED rear lamp module Y30 of FIG. 19, or may be provided as an IC unit independently of the LED light source 200.
  • the configuration using a light emitting diode as a light emitting element has been described as an example.
  • the configuration of the present invention is not limited thereto, and for example, an organic EL [electro- It is also possible to use a luminescence] element.
  • the LED chip 203 arranged on the lowest potential side is set as a bypass target. It is also possible to make a bypass target.
  • a plurality of threshold voltages Vth1 and Vth2 (where Vth1 ⁇ Vth2) to be compared with the power supply voltage Vin are prepared.
  • Vin ⁇ Vth1 both the LED chips 202 and 203 are bypassed, and Vth1 ⁇ Vin
  • Vth2 the bypass of the LED chip 202 is released and only the LED chip 203 is bypassed, and when Vin> Vth2, the bypass of both the LED chips 202 and 203 is released. It is also possible.
  • the invention disclosed in the present specification can be used, for example, in an in-vehicle light emitting element driving device to maintain lighting of a light emitting element light source even when a power supply voltage is lowered.
  • LED driving device (light emitting element driving device) DESCRIPTION OF SYMBOLS 101 Current driver 102 Reference voltage generation part 103 Open mask function part 104 Overvoltage mute part 105 Protect bus function part 106 CR timer 107 LED open detection part 108 LED short detection part 109 Reference current setting part 110 ISET open / short detection part 111 Control logic Unit 112 bypass function unit 112a comparator 112b switch 112A operational amplifier 112B P channel type MOS field effect transistor 112C, 112D coefficient multiplication unit 112E subtraction unit 112F current source 112G operational amplifier 112H current source 112I N channel type MOS field effect transistor 200 LED light source (light emitting element) light source) 201, 202, 203 LED element (light emitting element) 300 Substrate 400 LED chip 480 White resin 600 Reflector 601 Reflecting surface 800 Terminal 900 Socket 910 Mounting portion 950 Heat sink R1-R4, R5-R7 Resistor C1-C3 Capacitor D1-D3

Abstract

A light-emitting apparatus X1 has: a light-emitting element light source 200 formed by connecting a plurality of light-emitting elements 201-203 (for example, light-emitting diodes) in series; and a light-emitting element drive device 100 that drives the light-emitting element light source 200. The light-emitting element drive device 100 has: a current driver 101 that generates an output current Iout flowing in the light-emitting element light source 200 and that is connected between the application end of a power supply voltage Vin and the ground end; and a bypass functioning unit 112 that bypasses at least one of the plurality of light-emitting elements 201-203 constituting the light-emitting element light source 200 so as to decrease the number of series stages of the light-emitting elements in which the output current Iout flows when the power supply voltage Vin decreases.

Description

発光素子駆動装置Light emitting element driving device
 本明細書中に開示されている発明は、発光素子駆動装置に関する。 The invention disclosed in this specification relates to a light emitting element driving device.
 従来、発光ダイオード(以下ではLED[light emitting diode]と表記する)などの発光素子を駆動する発光素子駆動装置が様々に開発されてきている。 Conventionally, various light-emitting element driving devices for driving light-emitting elements such as light-emitting diodes (hereinafter referred to as LEDs [light emitting diodes]) have been developed.
 なお、上記に関連する従来技術の一例としては、特許文献1を挙げることができる。 Note that Patent Document 1 can be cited as an example of the related art related to the above.
特開2011-244677号公報Japanese Patent Application Laid-Open No. 2011-244677
 しかしながら、複数の発光素子を直列に接続して成る発光素子光源を駆動対象とする場合、従来の発光素子駆動装置では、電源電圧が発光素子光源の総順方向降下電圧付近まで低下すると、発光素子光源が消灯してしまうという不具合があった。 However, when a light emitting element light source formed by connecting a plurality of light emitting elements in series is to be driven, in the conventional light emitting element driving device, when the power supply voltage decreases to near the total forward voltage drop of the light emitting element light source, the light emitting element There was a problem that the light source was turned off.
 本明細書中に開示されている発明は、本願の発明者により見出された上記課題に鑑み、電源電圧が低下しても発光素子光源の点灯を維持することのできる発光素子駆動装置を提供することを目的とする。 The invention disclosed in the present specification provides a light emitting element driving device capable of maintaining the lighting of the light emitting element light source even when the power supply voltage is lowered in view of the above-described problems found by the inventors of the present application. The purpose is to do.
 本明細書中に開示されている発光素子駆動装置は、電源電圧の印加端と接地端との間に接続された発光素子光源に流れる出力電流を生成する電流ドライバと、前記電源電圧の低下時に前記発光素子光源を構成する複数の発光素子の少なくとも一つをバイパスして前記出力電流が流れる発光素子の直列段数を減らすバイパス機能部と、を有する構成(第1の構成)とされている。 A light-emitting element driving device disclosed in the present specification includes a current driver that generates an output current that flows to a light-emitting element light source connected between a power supply voltage application terminal and a ground terminal, and when the power supply voltage decreases. A bypass function unit that bypasses at least one of the plurality of light emitting elements constituting the light emitting element light source and reduces the number of series stages of the light emitting elements through which the output current flows (first configuration) is provided.
 なお、上記第1の構成から成る発光素子駆動装置において、前記バイパス機能部は、前記電源電圧またはその分圧電圧と所定の閾値電圧とを比較して比較信号を生成するコンパレータと、前記比較信号に応じて前記複数の発光素子の少なくとも一つをバイパスするか否かを切り替えるスイッチと、を含む構成(第2の構成)にするとよい。 In the light emitting element driving device having the first configuration, the bypass function unit compares the power supply voltage or a divided voltage thereof with a predetermined threshold voltage to generate a comparison signal, and the comparison signal And a switch that switches whether or not to bypass at least one of the plurality of light-emitting elements.
 また、上記第2の構成から成る発光素子駆動装置において、前記コンパレータは、ヒステリシスコンパレータである構成(第3の構成)にするとよい。 Further, in the light emitting element driving device having the second configuration, the comparator may be a hysteresis comparator (third configuration).
 また、上記第1の構成から成る発光素子駆動装置において、前記バイパス機能部は、前記出力電流が流れる発光素子の直列段数を切り替える際に、バイパス対象の発光素子に流れる出力電流を徐々に変化させる構成(第4の構成)にするとよい。 Further, in the light emitting element driving apparatus having the first configuration, the bypass function unit gradually changes the output current flowing through the light emitting element to be bypassed when switching the number of series stages of the light emitting elements through which the output current flows. A configuration (fourth configuration) is preferable.
 また、上記第4の構成から成る発光素子駆動装置において、前記バイパス機能部は、前記電源電圧またはその分圧電圧に応じた制御電流に基づいて前記出力電流のうち前記バイパス対象の発光素子を経由しない分岐電流の設定値を可変制御する構成(第5の構成)にするとよい。 Further, in the light emitting element driving device having the fourth configuration, the bypass function unit passes through the light emitting element to be bypassed among the output currents based on a control current corresponding to the power supply voltage or a divided voltage thereof. A configuration (fifth configuration) in which the set value of the branch current not to be variably controlled is good.
 また、上記第5の構成から成る発光素子駆動装置において、前記制御電流は、前記電源電圧または前記分圧電圧が所定の閾値電圧よりも高くなったときに流れ始める構成(第6の構成)にするとよい。 In the light emitting element driving device having the fifth configuration, the control current starts to flow when the power supply voltage or the divided voltage becomes higher than a predetermined threshold voltage (sixth configuration). Good.
 また、上記第5または第6の構成から成る発光素子駆動装置において、前記分岐電流の設定値は、前記出力電流の目標値よりも大きい最大値から前記制御電流の増大に伴って減少していく構成(第7の構成)にするとよい。 In the light emitting element driving device having the fifth or sixth configuration, the set value of the branch current decreases from the maximum value larger than the target value of the output current as the control current increases. A configuration (seventh configuration) is preferable.
 また、上記第5~第7いずれかの構成から成る発光素子駆動装置において、前記バイパス機能部は、前記制御電流が流れるバイパス制御端子の端子電圧が閾値電圧と一致するように前記制御電流を生成する制御電流生成部を含む構成(第8の構成)にするとよい。 In the light emitting element driving apparatus having any one of the fifth to seventh configurations, the bypass function unit generates the control current so that a terminal voltage of a bypass control terminal through which the control current flows matches a threshold voltage. The control current generator may be configured (eighth configuration).
 また、上記第8の構成から成る発光素子駆動装置において、前記端子電圧は、前記電源電圧または前記分圧電圧から前記制御電流に応じた電圧降下分を差し引いた電圧である構成(第9の構成)にするとよい。 In the light emitting element driving device having the eighth configuration, the terminal voltage is a voltage obtained by subtracting a voltage drop corresponding to the control current from the power supply voltage or the divided voltage (ninth configuration). ).
 また、上記第8または第9の構成から成る発光素子駆動装置において、前記バイパス機能部は、前記出力電流の目標値を定めるための基準電流に第1係数を乗ずる第1係数乗算部と、前記制御電流に第2係数を乗ずる第2係数乗算部と、前記第1係数乗算部の出力信号から前記第2係数乗算部の出力信号を減ずる減算部と、前記減算部の出力信号に応じて前記分岐電流を生成する電流源と、をさらに含む構成(第10の構成)にするとよい。 Further, in the light emitting element driving device having the eighth or ninth configuration, the bypass function unit includes a first coefficient multiplying unit that multiplies a reference coefficient for determining a target value of the output current by a first coefficient, A second coefficient multiplier that multiplies the control current by a second coefficient, a subtractor that subtracts the output signal of the second coefficient multiplier from the output signal of the first coefficient multiplier, and the output signal of the subtractor according to the output signal And a current source that generates a branch current (a tenth configuration).
 また、上記第8または第9の構成から成る発光素子駆動装置において、前記バイパス機能部は、前記出力電流の目標値に応じた参照電圧を生成する参照電圧生成部と、前記分岐電流に応じたセンス電圧を生成する電流検出部と、前記制御電流に応じたオフセット電圧を前記センス電圧に与えるオフセット付与部と、前記オフセット電圧が付与された前記センス電圧が前記参照電圧と一致するように前記分岐電流を生成する分岐電流生成部と、をさらに含む構成(第11の構成)にするとよい。 Further, in the light emitting element driving device having the eighth or ninth configuration, the bypass function unit includes a reference voltage generation unit that generates a reference voltage corresponding to a target value of the output current, and a response corresponding to the branch current. A current detection unit that generates a sense voltage; an offset applying unit that applies an offset voltage corresponding to the control current to the sense voltage; and the branch so that the sense voltage to which the offset voltage is applied matches the reference voltage It may be configured to further include a branch current generation unit that generates a current (an eleventh configuration).
 また、上記第8~第11いずれかの構成から成る発光素子駆動装置は、第1端が前記電源電圧の印加端に接続されて第2端が前記分圧電圧の印加端に接続された第1抵抗と、第1端が前記分圧電圧の印加端に接続されて第2端が接地端に接続された第2抵抗と、第1端が前記分圧電圧の印加端に接続されて第2端が前記バイパス制御端子に接続された第3抵抗が外付けされる構成(第12の構成)にするとよい。 In the light emitting element driving device having any one of the eighth to eleventh configurations, the first end is connected to the power supply voltage application end and the second end is connected to the divided voltage application end. A first resistor connected to the divided voltage application terminal, a second resistor connected to the ground terminal, and a first terminal connected to the divided voltage application terminal. A configuration in which a third resistor having two ends connected to the bypass control terminal is externally attached (a twelfth configuration) may be employed.
 また、上記第8~第12いずれかの構成から成る発光素子駆動装置において、前記バイパス制御端子は前記電源電圧の入力端子に隣接する構成(第13の構成)にするとよい。 In the light emitting element driving apparatus having any one of the eighth to twelfth configurations, the bypass control terminal may be configured to be adjacent to the power supply voltage input terminal (a thirteenth configuration).
 また、上記第8~第13いずれかの構成から成る発光素子駆動装置において、前記分岐電流が流れる外部端子は、前記出力電流の出力端子及び接地端子の少なくとも一方に隣接する構成(第14の構成)にするとよい。 In the light emitting element driving apparatus having any one of the eighth to thirteenth configurations, the external terminal through which the branch current flows is adjacent to at least one of the output terminal and the ground terminal of the output current (fourteenth configuration). ).
 また、上記第1~第14いずれかの構成から成る発光素子駆動装置において、前記電流ドライバは、電流ソース型である構成(第15の構成)にするとよい。 Further, in the light emitting element driving apparatus having any one of the first to fourteenth configurations, the current driver may be configured to be a current source type (fifteenth configuration).
 また、上記第1~第14いずれかの構成から成る発光素子駆動装置において、前記電流ドライバは、電流シンク型である構成(第16の構成)にしてもよい。 Further, in the light emitting element driving apparatus having any one of the first to fourteenth configurations, the current driver may be configured to be a current sink type (sixteenth configuration).
 また、本明細書中に開示されている発光装置は、複数の発光素子を直列に接続して成る発光素子光源と、上記第1~第16いずれかの構成から成り、前記発光素子光源を駆動する発光素子駆動装置と、を有する構成(第17の構成)とされている。 The light-emitting device disclosed in this specification includes a light-emitting element light source formed by connecting a plurality of light-emitting elements in series and any of the first to sixteenth configurations, and drives the light-emitting element light source. A light emitting element driving device (a seventeenth configuration).
 なお、上記第17の構成から成る発光装置において、前記発光素子は、発光ダイオードまたは有機EL素子である構成(第18の構成)にするとよい。 In the light emitting device having the seventeenth configuration, the light emitting element may be a light emitting diode or an organic EL element (eighteenth configuration).
 また、上記第17または第18の構成から成る発光装置は、前記発光素子光源や前記発光素子駆動装置を実装するための配線パターンが敷設された基板と、前記基板を搭載するソケットと、をさらに有する構成(第19の構成)にするとよい。 The light emitting device having the seventeenth or eighteenth configuration further includes a substrate on which a wiring pattern for mounting the light emitting element light source and the light emitting element driving device is laid, and a socket for mounting the substrate. It is preferable to have the configuration (19th configuration).
 また、本明細書中に開示されている車両は、上記第17~第19いずれかの構成から成る発光装置を有する構成(第20の構成)とされている。 Further, the vehicle disclosed in the present specification has a configuration (twentieth configuration) having a light emitting device having any one of the seventeenth to nineteenth configurations.
 本明細書中に開示されている発光素子駆動装置によれば、電源電圧が低下しても発光素子光源の点灯を維持することが可能となる。 According to the light emitting element driving device disclosed in the present specification, it is possible to keep the light emitting element light source on even if the power supply voltage decreases.
LED発光装置を備えた車両の全体構成を示す図The figure which shows the whole structure of the vehicle provided with LED light-emitting device. バイパス機能部の第1実施形態を示す図The figure which shows 1st Embodiment of a bypass function part. 第1実施形態におけるバイパス動作の一例を示すタイミングチャートTiming chart showing an example of bypass operation in the first embodiment バイパス機能部の第2実施形態を示す図The figure which shows 2nd Embodiment of a bypass function part. 第2実施形態におけるバイパス動作の一例を示すタイミングチャートTiming chart showing an example of bypass operation in the second embodiment LED発光装置の素子追加例を示す図The figure which shows the element addition example of LED light-emitting device バイパス機能部の第3実施形態を示す図The figure which shows 3rd Embodiment of a bypass function part. 第3実施形態におけるバイパス動作の一例を示すタイミングチャートTiming chart showing an example of bypass operation in the third embodiment 外付け抵抗の第1設定例を示す図(Iout=100mA)The figure which shows the 1st example of a setting of external resistance (Iout = 100mA) 外付け抵抗の第2設定例を示す図(Iout=600mA)The figure which shows the 2nd setting example of external resistance (Iout = 600mA) バイパス機能部の第4実施形態を示す図The figure which shows 4th Embodiment of a bypass function part. LED駆動装置の端子配置を示す図The figure which shows terminal arrangement of an LED drive device ソケット型LEDモジュールの平面図Top view of socket type LED module LEDチップの別レイアウトを示す平面図Plan view showing another layout of LED chip LED発光装置が搭載される車両の外観図(前面)External view of vehicle equipped with LED light emitting device (front) LED発光装置が搭載される車両の外観図(背面)External view of vehicle equipped with LED light emitting device (back) LEDヘッドランプモジュールの外観図External view of LED headlamp module LEDターンランプモジュールの外観図External view of LED turn lamp module LEDリアランプモジュールの外観図External view of LED rear lamp module
<全体構成>
 図1は、LED発光装置を備えた車両の全体構成を示す図である。本図の車両Xは、LED発光装置X1と、バッテリX2と、電源スイッチX3a及びX3bと、を有する。
<Overall configuration>
FIG. 1 is a diagram illustrating an overall configuration of a vehicle including an LED light emitting device. The vehicle X in the figure includes an LED light emitting device X1, a battery X2, and power switches X3a and X3b.
 LED発光装置X1は、バッテリX2から電源電圧Vinの供給を受けて点灯する車載ランプである。なお、発光装置X1の一例としては、ヘッドランプ、昼間走行用ランプ、テールランプ、ストップランプ、ないしは、ターンランプなどを挙げることができる。 The LED light emitting device X1 is an in-vehicle lamp that is lit by receiving the supply of the power supply voltage Vin from the battery X2. Examples of the light emitting device X1 include a headlamp, a daytime running lamp, a tail lamp, a stop lamp, or a turn lamp.
 バッテリX2は、車両Xの電源であり、鉛蓄電池やリチウムイオン電池などが好適に用いられる。 The battery X2 is a power source of the vehicle X, and a lead storage battery or a lithium ion battery is preferably used.
 電源スイッチX3a及びX2bは、それぞれ、発光装置X1とバッテリX2との間に接続されており、不図示のコントローラから制御信号を受けてオン/オフされる。 The power switches X3a and X2b are respectively connected between the light emitting device X1 and the battery X2, and are turned on / off in response to a control signal from a controller (not shown).
<LED発光装置>
 次に、LED発光装置X1の内部構成について説明する。LED発光装置X1は、LED駆動装置100とLED光源200を含むほか、LED駆動装置100に外付けされる種々のディスクリート部品として、抵抗R1~R4と、キャパシタC1~C3と、ダイオードD1~D3と、負特性サーミスタNTCと、を含む。
<LED light emitting device>
Next, the internal configuration of the LED light emitting device X1 will be described. The LED light-emitting device X1 includes an LED driving device 100 and an LED light source 200, and various discrete components externally attached to the LED driving device 100 include resistors R1 to R4, capacitors C1 to C3, and diodes D1 to D3. Negative characteristic thermistor NTC.
 なお、LED駆動装置100は、装置外部との電気的な接続を確立するための手段として、複数の外部端子(本図では、VINピン、PBUSピン、SWCNTピン、CRTピン、DISCピン、GNDピン、ISETピン、THDピン、SWピン、及び、IOUTピン)を有する。VINピンは、電源電圧入力端子である。PBUSピンは、異常検出入出力端子である。SWCNTピンは、電源電圧監視端子である。CRTピンは、CRタイマ設定端子である。DISCピンは、CRタイマ放電端子である。GNDピンは、接地端子である。ISETピンは、基準電流設定端子である。THDピンは、温度ディレーティング設定端子である。SWピンは、バイパススイッチ接続端子である。IOUTピンは、出力電流出力端子である。 The LED driving device 100 has a plurality of external terminals (in this figure, VIN pin, PBUS pin, SWCNT pin, CRT pin, DISC pin, GND pin as means for establishing electrical connection with the outside of the device. , ISET pin, THD pin, SW pin, and IOUT pin). The VIN pin is a power supply voltage input terminal. The PBUS pin is an abnormality detection input / output terminal. The SWCNT pin is a power supply voltage monitoring terminal. The CRT pin is a CR timer setting terminal. The DISC pin is a CR timer discharge terminal. The GND pin is a ground terminal. The ISET pin is a reference current setting terminal. The THD pin is a temperature derating setting terminal. The SW pin is a bypass switch connection terminal. The IOUT pin is an output current output terminal.
 バッテリX2の正極端は、電源スイッチX3a及びX3bそれぞれの第1端に接続されている。バッテリX2の負極端は、接地端に接続されている。電源スイッチX3aの第2端は、ダイオードD1のアノードに接続されている。電源スイッチX3bの第2端は、ダイオードD2及びD3それぞれのアノードに接続されている。ダイオードD1及びD2それぞれのカソードは、VINピンに接続されている。ダイオードD3のカソードは、CRTピンに接続されている。このように接続されたダイオードD1~D3は、発光装置X1からバッテリX2への逆流電流を遮断するための逆流防止ダイオードとして機能する。 The positive terminal of the battery X2 is connected to the first terminal of each of the power switches X3a and X3b. The negative terminal of the battery X2 is connected to the ground terminal. The second end of the power switch X3a is connected to the anode of the diode D1. The second end of the power switch X3b is connected to the anodes of the diodes D2 and D3. The cathodes of the diodes D1 and D2 are connected to the VIN pin. The cathode of the diode D3 is connected to the CRT pin. The diodes D1 to D3 connected in this way function as a backflow prevention diode for interrupting a backflow current from the light emitting device X1 to the battery X2.
 抵抗R1及びR2は、VINピンと接地端との間に直列接続されている。抵抗R1及びR2相互間の接続ノードは、SWCNTピンに接続されている。このように接続された抵抗R1及びR2は、電源電圧Vinに応じた監視電圧Vm(=Vin×{R2/(R1+R2)})を生成する分圧回路として機能する。抵抗R3は、CRTピンとDISCピンとの間に接続されており、CRタイマ106の一部として機能する。抵抗R4は、ISETピンと接地端との間に接続されており、基準電流設定部109の一部として機能する。 Resistors R1 and R2 are connected in series between the VIN pin and the ground terminal. A connection node between the resistors R1 and R2 is connected to the SWCNT pin. The resistors R1 and R2 connected in this way function as a voltage dividing circuit that generates a monitoring voltage Vm (= Vin × {R2 / (R1 + R2)}) corresponding to the power supply voltage Vin. The resistor R3 is connected between the CRT pin and the DISC pin, and functions as a part of the CR timer 106. The resistor R4 is connected between the ISET pin and the ground terminal, and functions as a part of the reference current setting unit 109.
 キャパシタC1は、VINピンと接地端との間に接続されており、入力平滑キャパシタとして機能する。キャパシタC2は、IOUTピンと接地端との間に接続されており、出力平滑キャパシタとして機能する。キャパシタC3は、CRTピンと接地端との間に接続されており、CRタイマ106の一部として機能する。 The capacitor C1 is connected between the VIN pin and the ground terminal, and functions as an input smoothing capacitor. The capacitor C2 is connected between the IOUT pin and the ground terminal, and functions as an output smoothing capacitor. The capacitor C3 is connected between the CRT pin and the ground terminal, and functions as a part of the CR timer 106.
 負特性サーミスタNTCは、THDピンと接地端との間に接続されており、基準電流設定部109の一部(温度検出素子)として機能する。 The negative characteristic thermistor NTC is connected between the THD pin and the ground terminal, and functions as a part of the reference current setting unit 109 (temperature detection element).
 LED駆動装置100は、バッテリX2から電源電圧Vinの供給を受けて動作し、LED光源200に供給するための出力電流Ioutを生成するシリコンモノリシック半導体集積回路装置(いわゆるLEDドライバIC)である。 The LED driving device 100 is a silicon monolithic semiconductor integrated circuit device (so-called LED driver IC) that operates by receiving the supply voltage Vin from the battery X2 and generates an output current Iout to be supplied to the LED light source 200.
 LED光源200は、直列接続された複数のLEDチップ(本図ではLEDチップ201~203)を含むLEDストリングである。LEDチップ201~203を個別に見た場合、それぞれを単一のLED素子として理解することもできるし、或いは、複数のLED素子を直列ないしは並列に組み合わせた発光素子集合体として理解することもできる。 The LED light source 200 is an LED string including a plurality of LED chips connected in series (in this figure, LED chips 201 to 203). When the LED chips 201 to 203 are viewed individually, each can be understood as a single LED element, or can be understood as a light emitting element assembly in which a plurality of LED elements are combined in series or in parallel. .
 なお、本実施形態のLED発光装置X1において、LED光源200のアノード(=最も高電位側に配列されたLEDチップ201のアノード)は、LED駆動装置100のIOUTピン(=出力電流Ioutの出力端)に接続されている。一方、LED光源200のカソード(=最も低電位側に配列されたLEDチップ203のカソード)は、接地端に接続されている。また、LEDチップ203のアノード(=LEDチップ202のカソード)は、LED駆動装置100のSWピンに接続されているが、その理由は後述する。 In the LED light emitting device X1 of the present embodiment, the anode of the LED light source 200 (= the anode of the LED chip 201 arranged on the highest potential side) is the IOUT pin (= the output terminal of the output current Iout) of the LED driving device 100. )It is connected to the. On the other hand, the cathode of the LED light source 200 (= the cathode of the LED chip 203 arranged on the lowest potential side) is connected to the ground terminal. The anode of the LED chip 203 (= the cathode of the LED chip 202) is connected to the SW pin of the LED driving device 100, and the reason will be described later.
 車両Xにおいて、PWM[pulse width modulation]調光モード時には、電源スイッチX3aがオンされて電源スイッチX3bがオフされる。その結果、PWM調光モード時には、バッテリX2から電源スイッチX3aとダイオードD1を介してVINピンに電源電圧Vinが印加される。また、CRTピンは、バッテリX2に対してオープン状態とされる。一方、DC調光モード時には、電源スイッチX3aがオフされて電源スイッチX3bがオンされる。その結果、DC調光モード時には、バッテリX2から電源スイッチX3bとダイオードD2を介してVINピンに電源電圧Vinが印加される。また、CRTピンには、バッテリX2から電源スイッチX3bとダイオードD3を介してDC電圧(=バッテリ電圧VB)が印加される。 In the vehicle X, in the PWM [pulse width modulation] dimming mode, the power switch X3a is turned on and the power switch X3b is turned off. As a result, in the PWM dimming mode, the power supply voltage Vin is applied from the battery X2 to the VIN pin via the power switch X3a and the diode D1. Further, the CRT pin is in an open state with respect to the battery X2. On the other hand, in the DC dimming mode, the power switch X3a is turned off and the power switch X3b is turned on. As a result, in the DC dimming mode, the power supply voltage Vin is applied from the battery X2 to the VIN pin via the power switch X3b and the diode D2. A DC voltage (= battery voltage VB) is applied to the CRT pin from the battery X2 via the power switch X3b and the diode D3.
<LED駆動装置>
 引き続き、図1を参照しながらLED駆動装置100の内部構成について説明する。LED駆動装置100は、電流ドライバ101と、基準電圧生成部102と、オープンマスク機能部103と、過電圧ミュート部104と、プロテクトバス機能部105と、CRタイマ106と、LEDオープン検出部107と、LEDショート検出部108と、基準電流設定部109と、ISETオープン/ショート検出部110と、制御ロジック部111と、バイパス機能部112と、Nチャネル型MOS[metal oxide semiconductor]電界効果トランジスタN1及びN2と、電流源CS1及びCS2と、スイッチSW1及びSW2を集積化して成る。また、本図では明示されていないが、LED駆動装置100には、その他の回路部(UVLO[under voltage locked out]機能部やTSD[thermal shutdown]機能部など)も集積化されている。
<LED drive device>
Next, the internal configuration of the LED driving device 100 will be described with reference to FIG. The LED driving device 100 includes a current driver 101, a reference voltage generation unit 102, an open mask function unit 103, an overvoltage mute unit 104, a protect bus function unit 105, a CR timer 106, an LED open detection unit 107, LED short detection unit 108, reference current setting unit 109, ISET open / short detection unit 110, control logic unit 111, bypass function unit 112, N-channel MOS (metal oxide semiconductor) field effect transistors N1 and N2 And current sources CS1 and CS2 and switches SW1 and SW2 are integrated. Further, although not explicitly shown in the drawing, the LED driving device 100 also has other circuit parts (such as UVLO [under voltage locked out] function part and TSD [thermal shutdown] function part) integrated therein.
 電流ドライバ101は、LED光源200に流れる出力電流Ioutが所定の目標値と一致するように、出力電流Ioutの定電流制御を行う。本図では明示していないが、電流ドライバ101は、例えば、出力電流Ioutの流れる電流経路上に設けられた出力トランジスタと、出力電流Ioutを帰還電圧に変換するセンス抵抗と、帰還電圧と参照電圧が一致するように出力トランジスタのリニア駆動を行うオペアンプと、を含む構成とすればよい。なお、出力電流Ioutの目標値は、基準電流Isetに応じて任意に設定することが可能である。 The current driver 101 performs constant current control of the output current Iout so that the output current Iout flowing through the LED light source 200 matches a predetermined target value. Although not explicitly shown in the figure, the current driver 101 includes, for example, an output transistor provided on a current path through which the output current Iout flows, a sense resistor that converts the output current Iout into a feedback voltage, a feedback voltage, and a reference voltage. And an operational amplifier that performs linear drive of the output transistor so that they match. Note that the target value of the output current Iout can be arbitrarily set according to the reference current Iset.
 基準電圧生成部102は、電源電圧Vin(例えば5.5V~20V)から所定の基準電圧VREG(例えば5V)を生成し、これをLED駆動装置100の各部に出力する。 The reference voltage generation unit 102 generates a predetermined reference voltage VREG (for example, 5V) from the power supply voltage Vin (for example, 5.5V to 20V), and outputs this to each unit of the LED driving device 100.
 オープンマスク機能部103は、電源電圧Vinが所定の閾値電圧を下回っているときに、その検出結果を制御ロジック部111に通知して、LEDオープン検出部107の検出結果をマスクさせる。このようなオープンマスク機能により、例えば、電源電圧Vinの立上げ時におけるLEDオープンの誤検出を解消することが可能となる。 When the power supply voltage Vin is lower than a predetermined threshold voltage, the open mask function unit 103 notifies the detection result to the control logic unit 111 and masks the detection result of the LED open detection unit 107. With such an open mask function, for example, it is possible to eliminate erroneous detection of LED open when the power supply voltage Vin rises.
 過電圧ミュート部104は、電源電圧Vinが所定の閾値電圧(例えば16V)を上回っているときに、両者の差分値(Vin超過分)に応じて基準電流Iset(延いては出力電流Iout)を引き下げるように、基準電流設定部109を制御する。このような過電圧ミュート処理により、LED駆動装置100の異常発熱を抑えることが可能となる。 When the power supply voltage Vin exceeds a predetermined threshold voltage (for example, 16 V), the overvoltage mute unit 104 reduces the reference current Iset (and thus the output current Iout) according to the difference value between the two (in excess of Vin). Thus, the reference current setting unit 109 is controlled. Such overvoltage mute processing can suppress abnormal heat generation of the LED driving device 100.
 プロテクトバス機能部105は、複数のLED駆動装置100相互間でそれぞれの異常検出結果を共有し、制御ロジック部111による異常保護動作に反映させる。例えば、プロテクトバス機能部105は、LED駆動装置100で何らかの異常(LEDオープン、LEDショート、UVLO、温度異常など)が検出されたときに、PBUSピンを介して異常検出信号を外部出力する。また、プロテクトバス機能部105は、PBUSピンを介して異常検出信号が外部入力されたときには、これを制御ロジック部111に転送する。このような動作により、例えば、一つのLED駆動装置で異常が検出されれば、全てのLED駆動装置を停止するというように、連携的な保護動作を実現することが可能となる。 The protect bus function unit 105 shares the abnormality detection results among the plurality of LED driving devices 100 and reflects them in the abnormality protection operation by the control logic unit 111. For example, when a certain abnormality (LED open, LED short, UVLO, temperature abnormality, etc.) is detected in the LED driving device 100, the protect bus function unit 105 outputs an abnormality detection signal to the outside via the PBUS pin. Further, when an abnormality detection signal is externally input via the PBUS pin, the protect bus function unit 105 transfers this to the control logic unit 111. By such an operation, for example, if an abnormality is detected in one LED driving device, a cooperative protection operation can be realized such that all the LED driving devices are stopped.
 CRタイマ106は、CRTピンにDC電圧が印加されないPWM調光モード(X3bオフ)において、LED光源200のPWM調光を実施するために制御ロジック部111へのPWM調光信号S1をパルス駆動する。例えば、CRタイマ106は、PWM調光信号S1を用いてスイッチSW1及びトランジスタN1及びN2のオン/オフ制御を行い、キャパシタC3の充放電を周期的に切り替えることにより、CRTピンの端子電圧を三角波状に駆動してPWM調光信号S1のパルス駆動を行う。なお、出力電流Ioutの時間平均値(延いてはLED光源200の輝度)は、PWM調光信号S1のオンデューティに応じて変化する。PWM調光信号S1の周期やオンデューティは、抵抗R3の抵抗値やキャパシタC3の容量値を調整することにより、任意に設定することが可能である。 The CR timer 106 pulses the PWM dimming signal S1 to the control logic unit 111 in order to perform PWM dimming of the LED light source 200 in the PWM dimming mode (X3b off) in which no DC voltage is applied to the CRT pin. . For example, the CR timer 106 performs on / off control of the switch SW1 and the transistors N1 and N2 using the PWM dimming signal S1, and periodically switches charging / discharging of the capacitor C3, thereby changing the terminal voltage of the CRT pin to a triangle. Driving in a wave form is performed to drive the PWM dimming signal S1. Note that the time average value of the output current Iout (and hence the luminance of the LED light source 200) changes according to the on-duty of the PWM dimming signal S1. The cycle and on-duty of the PWM dimming signal S1 can be arbitrarily set by adjusting the resistance value of the resistor R3 and the capacitance value of the capacitor C3.
 一方、CRタイマ106は、CRTピンにDC電圧が印加されるDC調光モード(X3bオン)において、PWM調光信号S1の論理レベルを固定する。このとき、制御ロジック部111では、出力電流Ioutの定電流制御が実施される。 On the other hand, the CR timer 106 fixes the logic level of the PWM dimming signal S1 in the DC dimming mode (X3b ON) in which a DC voltage is applied to the CRT pin. At this time, the control logic unit 111 performs constant current control of the output current Iout.
 このように、LED駆動装置100にCRタイマ106を内蔵した構成であれば、マイコンレスによるPWM調光を実現することができるので、LED発光装置X1の低コスト化を図ることが可能となる。さらに、CRタイマ106は、CRTピンにPWM信号が外部入力された場合に、これをPWM調光信号S1として制御ロジック部111に出力する機能も備えているので、マイコン等を用いたPWM調光にも対応することが可能である。 As described above, if the LED driving device 100 has the CR timer 106 built-in, PWM dimming without a microcomputer can be realized, so that the cost of the LED light emitting device X1 can be reduced. Further, the CR timer 106 has a function of outputting a PWM signal as a PWM dimming signal S1 to the control logic unit 111 when a PWM signal is externally input to the CRT pin. It is possible to cope with.
 LEDオープン検出部107は、IOUTピンの端子電圧(=出力電圧Vout)と所定の閾値電圧(例えばVin-0.05V)とを比較して、LED光源200のオープン異常が生じているか否かを検出し、その検出結果を制御ロジック部111に通知する。 The LED open detection unit 107 compares the terminal voltage of the IOUT pin (= output voltage Vout) with a predetermined threshold voltage (for example, Vin−0.05 V) to determine whether or not an open abnormality of the LED light source 200 has occurred. The detection result is notified to the control logic unit 111.
 LEDショート検出部108は、IOUTピンの端子電圧(=出力電圧Vout)と所定の閾値電圧(例えば0.6V/0.8V)とを比較して、LED光源200のショート異常(例えば地絡)が生じているか否かを検出し、その検出結果を制御ロジック部111に通知する。なお、本明細書中において、「地絡」とは、接地端またはこれに準ずる低電位端への短絡を指すものとする。 The LED short detection unit 108 compares the terminal voltage (= output voltage Vout) of the IOUT pin with a predetermined threshold voltage (for example, 0.6 V / 0.8 V), and the LED light source 200 has a short circuit abnormality (for example, ground fault). Is detected, and the detection result is notified to the control logic unit 111. Note that in this specification, “ground fault” refers to a short circuit to the ground terminal or a low potential terminal equivalent thereto.
 基準電流設定部109は、出力電流Ioutの目標値を設定するための基準電流Isetを生成する。なお、基準電流Isetは、抵抗R4の抵抗値を調整することにより、任意に設定することができる。また、基準電流設定部109は、負特性サーミスタNTCの抵抗値に応じて基準電流Isetを調整する温度ディレーティング機能も備えている。 The reference current setting unit 109 generates a reference current Iset for setting a target value for the output current Iout. The reference current Iset can be arbitrarily set by adjusting the resistance value of the resistor R4. The reference current setting unit 109 also has a temperature derating function for adjusting the reference current Iset according to the resistance value of the negative characteristic thermistor NTC.
 ISETオープン/ショート検出部110は、ISETピンの端子電圧と所定の閾値電圧とを比較することにより、ISETピンにオープン/ショートが生じているか否かを検出し、その検出結果を制御ロジック部111に通知する。 The ISET open / short detection unit 110 detects whether an open / short has occurred in the ISET pin by comparing the terminal voltage of the ISET pin with a predetermined threshold voltage, and the detection result is controlled by the control logic unit 111. Notify
 制御ロジック部111は、LED駆動装置100全体の動作を統括的に制御する主体である。例えば、制御ロジック部111は、各種の異常検出部(過電圧ミュート部104、プロテクトバス機能部105、LEDオープン検出部107、LEDショート検出部108、ISETオープン/ショート検出部110)で得られた検出結果に応じて出力電流Ioutの電流値を可変制御したり、その出力可否を切り替えたりする機能を備えている。 The control logic unit 111 is a main body that comprehensively controls the operation of the entire LED driving device 100. For example, the control logic unit 111 detects detections obtained by various abnormality detection units (overvoltage mute unit 104, protect bus function unit 105, LED open detection unit 107, LED short detection unit 108, ISET open / short detection unit 110). It has a function of variably controlling the current value of the output current Iout according to the result and switching its output availability.
 バイパス機能部112は、SWCNTピンに入力される監視電圧Vm(=電源電圧Vinの分圧電圧)を監視し、電源電圧Vinの低下時(=LED光源200の総順方向降下電圧Vf_totalを確保できない電圧値まで電源電圧Vinが低下したとき)には、LED光源200を構成する複数のLEDチップ201~203の少なくとも一つ(本図ではLEDチップ203)をバイパスすることにより、出力電流Ioutが流れるLEDチップの直列段数を減らして、LED光源200の総順方向降下電圧Vf_totalを引き下げる。 The bypass function unit 112 monitors the monitoring voltage Vm (= divided voltage of the power supply voltage Vin) input to the SWCNT pin, and cannot ensure the total forward voltage drop Vf_total of the LED light source 200 when the power supply voltage Vin decreases (= the LED light source 200). When the power supply voltage Vin decreases to the voltage value), the output current Iout flows by bypassing at least one of the plurality of LED chips 201 to 203 (the LED chip 203 in this figure) constituting the LED light source 200. The total number of LED chips in series is reduced, and the total forward voltage drop Vf_total of the LED light source 200 is lowered.
 例えば、LEDチップの直列段数を「3」から「2」に減らすことにより、LED光源200の総順方向降下電圧Vf_totalを「3Vf」から「2Vf」に引き下げることができる(ただし、VfはLEDチップ201~203それぞれの順方向降下電圧)。 For example, by reducing the number of LED chips in series from “3” to “2”, the total forward voltage drop Vf_total of the LED light source 200 can be reduced from “3 Vf” to “2 Vf” (where Vf is the LED chip) 201-203 forward voltage drop).
 このようなバイパス機能部112を内蔵することにより、電源電圧Vinが低下してもLED光源200の点灯を維持することが可能となる。なお、バイパス機能部112の構成及び動作については、後ほど詳細に説明する。 By incorporating such a bypass function unit 112, it is possible to keep the LED light source 200 on even if the power supply voltage Vin decreases. The configuration and operation of the bypass function unit 112 will be described in detail later.
 トランジスタN1及びN2は、それぞれ、DISCピンと接地端との間に接続されており、CRタイマ106によりオン/オフ制御される。 Transistors N1 and N2 are connected between the DISC pin and the ground terminal, and are on / off controlled by the CR timer 106.
 電流源CS1とスイッチSW1は、基準電圧VREGの印加端とCRTピンとの間に直列接続されている。なお、電流源CS1は、キャパシタC3を充電するためのソース電流を生成する。スイッチSW1は、先にも述べたように、CRタイマ106から出力されるPWM調光信号S1に応じてオン/オフされる。 The current source CS1 and the switch SW1 are connected in series between the application terminal of the reference voltage VREG and the CRT pin. The current source CS1 generates a source current for charging the capacitor C3. As described above, the switch SW1 is turned on / off in response to the PWM dimming signal S1 output from the CR timer 106.
 電流源CS2とスイッチSW2は、VINピンとIOUTピンとの間に直列接続されている。なお、電流源CS2は、LEDショート検出部108の誤動作を防止するためのソース電流(例えば1mA)を生成する。スイッチSW1は、例えば、IOUTピンの端子電圧(=出力電圧Vout)が所定の閾値電圧(例えば0.8V)よりも低くなると、オンされる。 The current source CS2 and the switch SW2 are connected in series between the VIN pin and the IOUT pin. The current source CS2 generates a source current (for example, 1 mA) for preventing the LED short detection unit 108 from malfunctioning. For example, the switch SW1 is turned on when the terminal voltage of the IOUT pin (= output voltage Vout) becomes lower than a predetermined threshold voltage (for example, 0.8 V).
<バイパス機能部(第1実施形態)>
 図2は、バイパス機能部112の第1実施形態を示す図である。本実施形態のバイパス機能部112は、コンパレータ112aとスイッチ112b(本実施形態では、Nチャネル型MOS電界効果トランジスタ)を含む。
<Bypass function unit (first embodiment)>
FIG. 2 is a diagram illustrating a first embodiment of the bypass function unit 112. The bypass function unit 112 of the present embodiment includes a comparator 112a and a switch 112b (in this embodiment, an N-channel MOS field effect transistor).
 コンパレータ112aは、反転入力端(-)に入力される監視電圧Vm(=電源電圧Vinの分圧電圧)と、非反転入力端(+)に入力される閾値電圧VthL/VthH(ただしVthL<VthH)を比較して比較信号Saを生成する。なお、比較信号Saは、電源電圧Vinの上昇時において、Vm>VthH(例えばVthH=2.0V)となったときに、ハイレベルからローレベルに立ち下がる。一方、比較信号Saは、電源電圧Vinの低下時において、Vm<VthL(例えばVthL=1.8V)となったときに、ローレベルからハイレベルに立ち上がる。 The comparator 112a includes a monitoring voltage Vm (= divided voltage of the power supply voltage Vin) input to the inverting input terminal (−) and a threshold voltage VthL / VthH (where VthL <VthH) input to the non-inverting input terminal (+). ) To generate a comparison signal Sa. The comparison signal Sa falls from the high level to the low level when Vm> VthH (for example, VthH = 2.0 V) when the power supply voltage Vin increases. On the other hand, the comparison signal Sa rises from a low level to a high level when Vm <VthL (for example, VthL = 1.8 V) when the power supply voltage Vin decreases.
 このように、コンパレータ112aとして、閾値電圧VthL/VthHにヒステリシスを持つヒステリシスコンパレータを用いることにより、監視電圧Vmにノイズ等が重畳しても、比較信号Saの論理レベルが不必要に切り替わることがないので、バイパス機能部112の動作安定性を高めることが可能となる。 As described above, by using a hysteresis comparator having hysteresis in the threshold voltage VthL / VthH as the comparator 112a, the logic level of the comparison signal Sa is not unnecessarily switched even when noise or the like is superimposed on the monitoring voltage Vm. Therefore, it is possible to improve the operational stability of the bypass function unit 112.
 なお、電源電圧Vinがコンパレータ112aの入力ダイナミックレンジに収まっている場合には、抵抗R1及びR2を割愛し、電源電圧Vinをコンパレータ112aに直接入力しても構わない。 If the power supply voltage Vin is within the input dynamic range of the comparator 112a, the resistors R1 and R2 may be omitted and the power supply voltage Vin may be directly input to the comparator 112a.
 スイッチ112bは、SWピンと接地端との間に接続されており、比較信号Saに応じてオン/オフされることでLEDチップ201~203の少なくとも一つ(本図の例ではLEDチップ203)をバイパスするか否かを切り替える。 The switch 112b is connected between the SW pin and the ground terminal, and is turned on / off in accordance with the comparison signal Sa to turn on at least one of the LED chips 201 to 203 (the LED chip 203 in the example of this figure). Switches whether to bypass.
 より具体的に述べると、比較信号Saがローレベルであるときには、スイッチ112bがオフするので、LEDチップ203がバイパスされていない状態となる。このとき、IOUTピンから出力される出力電流Ioutは、LEDチップ201~203全てを介して、接地端に至る第1の電流経路に流れる。 More specifically, when the comparison signal Sa is at a low level, the switch 112b is turned off, so that the LED chip 203 is not bypassed. At this time, the output current Iout output from the IOUT pin flows through the first current path to the ground terminal via all the LED chips 201 to 203.
 一方、比較信号Saがハイレベルであるときには、スイッチ112bがオンするので、LEDチップ203がバイパスされている状態となる。このとき、IOUTピンから出力される出力電流Ioutは、LEDチップ202のカソードからSWピンに引き込まれて接地端に至る第2の電流経路に流れる。 On the other hand, when the comparison signal Sa is at the high level, the switch 112b is turned on, so that the LED chip 203 is bypassed. At this time, the output current Iout output from the IOUT pin flows into the second current path from the cathode of the LED chip 202 to the SW pin and reaching the ground terminal.
 以下では、第1の電流経路に流れる第1の出力電流をIoutAと呼び、第2の電流経路に流れる第2の出力電流をIoutBと呼ぶ。なお、IOUTピンから出力される出力電流Ioutと、第1の出力電流IoutA及び第2の出力電流IoutBとの間には、Iout=IoutA+IoutBという関係が成立する。 Hereinafter, the first output current flowing through the first current path is referred to as IoutA, and the second output current flowing through the second current path is referred to as IoutB. Note that a relationship of Iout = IoutA + IoutB is established between the output current Iout output from the IOUT pin, the first output current IoutA, and the second output current IoutB.
 図3は、第1実施形態におけるバイパス動作の一例を示すタイミングチャートであり、上から順に、電源電圧Vin、出力電流Iout、第1の出力電流IoutA、及び、第2の出力電流IoutBが描写されている。 FIG. 3 is a timing chart showing an example of the bypass operation in the first embodiment. The power supply voltage Vin, the output current Iout, the first output current IoutA, and the second output current IoutB are depicted in order from the top. ing.
 例えば、電源電圧Vinの立ち上げ時には、Vin<VthH×{(R1+R2)/R2}である間、すなわちVm<VthHである間、比較信号Saがハイレベルとなり、スイッチ112bがオンする。その結果、LED光源200は、LEDチップ203がバイパスされた状態となる。このとき、出力電流Ioutは、LEDチップ203を介する第1の電流経路ではなく、SWピンを介する第2の電流経路に流れる。従って、IoutA=0となり、IoutB=Ioutとなる。 For example, when the power supply voltage Vin rises, while Vin <VthH × {(R1 + R2) / R2}, that is, while Vm <VthH, the comparison signal Sa becomes high level and the switch 112b is turned on. As a result, the LED light source 200 is in a state where the LED chip 203 is bypassed. At this time, the output current Iout flows through the second current path via the SW pin instead of the first current path via the LED chip 203. Therefore, IoutA = 0 and IoutB = Iout.
 このように、電源電圧Vinが低い間は、LEDチップ203をバイパスして、出力電流Ioutが流れるLEDチップの直列段数を減らし、LED光源200の総順方向降下電圧Vf_totalを引き下げることにより、LED光源200の点灯が維持される。 As described above, while the power supply voltage Vin is low, the LED chip 203 is bypassed, the number of series stages of the LED chips through which the output current Iout flows is reduced, and the total forward drop voltage Vf_total of the LED light source 200 is reduced. The lighting of 200 is maintained.
 その後、電源電圧Vinが十分に立ち上がり、Vin>VthH×{(R1+R2)/R2}、すなわちVm>VthHになると、比較信号Saがローレベルに立ち下がり、スイッチ112bがオフする。その結果、LED光源200は、LEDチップ203がバイパスされていない状態となる。このとき、出力電流Ioutは、SWピンを介する第2の電流経路ではなく、LEDチップ203を介する第1の電流経路に流れる。従って、IoutB=0となり、IoutA=Ioutとなる。 Thereafter, when the power supply voltage Vin rises sufficiently and Vin> VthH × {(R1 + R2) / R2}, that is, Vm> VthH, the comparison signal Sa falls to the low level, and the switch 112b is turned off. As a result, the LED light source 200 is in a state where the LED chip 203 is not bypassed. At this time, the output current Iout flows through the first current path via the LED chip 203 instead of the second current path via the SW pin. Therefore, IoutB = 0 and IoutA = Iout.
 このように、電源電圧Vinが高くなると、LEDチップ203のバイパスを解除し、LEDチップ201~203を全て発光させることにより、LED光源200が最大輝度で点灯される。 As described above, when the power supply voltage Vin becomes high, the LED light source 200 is turned on with the maximum luminance by releasing the bypass of the LED chip 203 and causing all the LED chips 201 to 203 to emit light.
 なお、電源電圧Vinが一旦立ち上がった後は、Vin>VthL×{(R1+R2)/R2}である間、すなわちVm>VthLである間、比較信号Saがローレベルに維持され、スイッチ112bがオフされたままとなる。その結果、LEDチップ203のバイパス解除状態が継続されるので、LED光源200は、引き続き最大輝度で点灯される。 After the power supply voltage Vin once rises, the comparison signal Sa is maintained at a low level while Vin> VthL × {(R1 + R2) / R2}, that is, Vm> VthL, and the switch 112b is turned off. Will remain. As a result, since the bypass release state of the LED chip 203 is continued, the LED light source 200 is continuously lit at the maximum luminance.
 ただし、電源電圧Vinがさらに低下して、Vin<VthL×{(R1+R2)/R2}、すなわちVm<VthLになると、比較信号Saがハイレベルに立ち上がり、スイッチ112bがオンする。その結果、LEDチップ203が再びバイパスされて、LED光源200の総順方向降下電圧Vf_totalが引き下げられるので、LED光源200の点灯が維持される。 However, when the power supply voltage Vin further decreases and Vin <VthL × {(R1 + R2) / R2}, that is, Vm <VthL, the comparison signal Sa rises to a high level and the switch 112b is turned on. As a result, the LED chip 203 is bypassed again, and the total forward voltage drop Vf_total of the LED light source 200 is lowered, so that the LED light source 200 is kept on.
 このように、バイパス機能部112では、電源電圧Vinとバイパス解除電圧VthH×{(R1+R2)/R2}及びバイパス開始電圧VthL×{(R1+R2)/R2}とをそれぞれ比較して、LEDチップ203のバイパス制御が行われる。なお、上記のバイパス解除電圧とバイパス開始電圧は、いずれも、SWCNTピンに外付けされる抵抗R1及びR2それぞれの抵抗値を調整することにより、任意に設定することが可能である。 As described above, the bypass function unit 112 compares the power supply voltage Vin with the bypass release voltage VthH × {(R1 + R2) / R2} and the bypass start voltage VthL × {(R1 + R2) / R2}. Bypass control is performed. Note that both the bypass release voltage and the bypass start voltage can be arbitrarily set by adjusting the resistance values of the resistors R1 and R2 externally attached to the SWCNT pin.
<バイパス機能部(第2実施形態)>
 図4は、バイパス機能部112の第2実施形態を示す図である。本実施形態のバイパス機能部112は、オペアンプAMP1~AMP3と、Nチャネル型MOS電界効果トランジスタM1~M3と、カレントミラーCM1及びCM2と、電流制御部CTRLと、抵抗Ra~Rdとを含む。LED駆動装置100には、図1のSWピン及びSWCNTピンに代えて、ISINKピン、SETピン、及び、RVINピンが設けられている。なお、ISINKピンには、LEDチップ203のアノード(=LEDチップ202のカソード)が接続されている。また、SETピン及びRVINピンには、それぞれ、抵抗RSET及びRVINが外付けされている。以下では、LED駆動装置100の内部における各要素の接続関係について具体的に説明する。
<Bypass function unit (second embodiment)>
FIG. 4 is a diagram illustrating a second embodiment of the bypass function unit 112. The bypass function unit 112 of the present embodiment includes operational amplifiers AMP1 to AMP3, N-channel MOS field effect transistors M1 to M3, current mirrors CM1 and CM2, a current control unit CTRL, and resistors Ra to Rd. The LED driving device 100 is provided with an ISINK pin, a SET pin, and an RVIN pin instead of the SW pin and the SWCNT pin of FIG. Note that the anode of the LED chip 203 (= the cathode of the LED chip 202) is connected to the ISINK pin. Further, resistors RSET and RVIN are externally attached to the SET pin and the RVIN pin, respectively. Below, the connection relationship of each element in the LED drive device 100 is demonstrated concretely.
 オペアンプAMP1の非反転入力端(+)には、所定の参照電圧VREF(例えばバンドギャップ電圧)が入力されている。オペアンプAMP1の反転入力端(-)は、SETピンとトランジスタM1のソース及びバックゲートに接続されている。オペアンプAMP1の出力端は、トランジスタM1のゲートに接続されている。トランジスタM1のドレインは、カレントミラーCM1の電流入力端に接続されている。カレントミラーCM1の電流出力端は、カレントミラーCM2の電流入力端に接続されている。カレントミラーCM2の電流出力端は、電流制御部CTRLの第1電流入力端(=内部電流Iaの入力端)に接続されている。 A predetermined reference voltage VREF (for example, a band gap voltage) is input to the non-inverting input terminal (+) of the operational amplifier AMP1. The inverting input terminal (−) of the operational amplifier AMP1 is connected to the SET pin and the source and back gate of the transistor M1. The output terminal of the operational amplifier AMP1 is connected to the gate of the transistor M1. The drain of the transistor M1 is connected to the current input terminal of the current mirror CM1. The current output terminal of the current mirror CM1 is connected to the current input terminal of the current mirror CM2. The current output terminal of the current mirror CM2 is connected to the first current input terminal (= input terminal of the internal current Ia) of the current control unit CTRL.
 抵抗Ra及びRbは、電源電圧Vinの入力端と接地端との間に直列接続されている。オペアンプAMP2の非反転入力端(+)は、抵抗Ra及びRb相互間の接続ノードに接続されている。オペアンプAMP2の反転入力端(-)は、RVINピンとトランジスタM2のソース及びバックゲートに接続されている。オペアンプAMP2の出力端は、トランジスタM2のゲートに接続されている。トランジスタM2のドレインは、電流制御部CTRLの第2電流入力端(=内部電流Ibの入力端)に接続されている。 The resistors Ra and Rb are connected in series between the input terminal of the power supply voltage Vin and the ground terminal. The non-inverting input terminal (+) of the operational amplifier AMP2 is connected to a connection node between the resistors Ra and Rb. The inverting input terminal (−) of the operational amplifier AMP2 is connected to the RVIN pin and the source and back gate of the transistor M2. The output terminal of the operational amplifier AMP2 is connected to the gate of the transistor M2. The drain of the transistor M2 is connected to the second current input terminal (= input terminal of the internal current Ib) of the current control unit CTRL.
 抵抗Rcの第1端は、電流制御部CTRLの電流出力端(=内部電流Icの出力端)に接続されている。抵抗Rcの第2端は、接地端に接続されている。オペアンプAMP3の非反転入力端(+)は、抵抗Rcの第1端に接続されている。オペアンプAMP3の反転入力端(-)は、抵抗Rdの第1端とトランジスタM3のソース及びバックゲートに接続されている。抵抗Rdの第2端は、接地端に接続されている。オペアンプAMP3の出力端は、トランジスタM3のゲートに接続されている。トランジスタM3のドレインは、ISINKピンに接続されている。 The first end of the resistor Rc is connected to the current output end (= output end of the internal current Ic) of the current control unit CTRL. A second end of the resistor Rc is connected to the ground end. The non-inverting input terminal (+) of the operational amplifier AMP3 is connected to the first terminal of the resistor Rc. The inverting input terminal (−) of the operational amplifier AMP3 is connected to the first terminal of the resistor Rd and the source and back gate of the transistor M3. The second end of the resistor Rd is connected to the ground end. The output terminal of the operational amplifier AMP3 is connected to the gate of the transistor M3. The drain of transistor M3 is connected to the ISINK pin.
 本実施形態のバイパス機能部112において、オペアンプAMP1は、その2入力端子がイマジナリショートするように、トランジスタM1のゲート制御を行う。従って、トランジスタM1のドレイン電流は、参照電圧VREFと抵抗RSETに応じた電流値(=VREF/RSET)となる。 In the bypass function unit 112 of the present embodiment, the operational amplifier AMP1 controls the gate of the transistor M1 so that its two input terminals are imaginarily short-circuited. Therefore, the drain current of the transistor M1 has a current value (= VREF / RSET) corresponding to the reference voltage VREF and the resistor RSET.
 カレントミラーCM1は、内部電源電圧VREGの印加端とトランジスタM1との間に接続されており、入力電流(=トランジスタM1のドレイン電流)をミラーして、出力電流(=カレントミラーCM2に流し込まれるソース電流)を生成する。 The current mirror CM1 is connected between the application terminal of the internal power supply voltage VREG and the transistor M1, and mirrors an input current (= drain current of the transistor M1) to output current (= source flowing into the current mirror CM2). Current).
 カレントミラーCM2は、カレントミラーCM1の電流出力端と接地端との間に接続されており、入力電流(=カレントミラーCM1から流し込まれるソース電流)をミラーして、出力電流(=電流制御部CTRLから引き込まれるシンク電流であり、内部電流Iaに相当)を生成する。 The current mirror CM2 is connected between the current output terminal and the ground terminal of the current mirror CM1, and mirrors the input current (= source current flowing from the current mirror CM1) to output current (= current control unit CTRL). , Which is a sink current drawn from, and corresponds to the internal current Ia).
 なお、Ia設定用の係数(=カレントミラーCM1及びCM2トータルのミラー比)をαとすると、内部電流Iaの電流値は、Ia=α×VREF/RSETで求められる。 If the coefficient for setting Ia (= the mirror ratio of the current mirrors CM1 and CM2) is α, the current value of the internal current Ia is obtained by Ia = α × VREF / RSET.
 このように、オペアンプAMP1、トランジスタM1、抵抗RSET、並びに、カレントミラーCM1及びCM2は、固定値の内部電流Iaを生成する第1の内部電流生成部として機能する。 As described above, the operational amplifier AMP1, the transistor M1, the resistor RSET, and the current mirrors CM1 and CM2 function as a first internal current generation unit that generates a fixed-value internal current Ia.
 一方、オペアンプAMP2は、その2入力端子がイマジナリショートするように、トランジスタM2のゲート制御を行う。従って、トランジスタM2のドレイン電流(=電流制御部CTRLから引き込まれるシンク電流であり、内部電流Ibに相当)は、電源電圧Vinと抵抗RVINに応じた電流値(=β×Vin/RVIN)となる。なお、式中のβは、Ib設定用の係数であり、抵抗Ra及びRbの分圧比(=Rb/(Ra+Rb))として表すことができる。 On the other hand, the operational amplifier AMP2 controls the gate of the transistor M2 so that its two input terminals are imaginarily short-circuited. Accordingly, the drain current of the transistor M2 (= the sink current drawn from the current control unit CTRL and corresponding to the internal current Ib) becomes a current value (= β × Vin / RVIN) corresponding to the power supply voltage Vin and the resistance RVIN. . Note that β in the formula is a coefficient for setting Ib, and can be expressed as a voltage dividing ratio of the resistors Ra and Rb (= Rb / (Ra + Rb)).
 このように、オペアンプAMP2、トランジスタM2、抵抗RVIN、並びに、抵抗Ra及びRbは、電源電圧Vinに応じた可変値の内部電流Ibを生成する第2の内部電流生成部として機能する。 As described above, the operational amplifier AMP2, the transistor M2, the resistor RVIN, and the resistors Ra and Rb function as a second internal current generator that generates an internal current Ib having a variable value corresponding to the power supply voltage Vin.
 電流制御部CTRLは、内部電流Iaから内部電流Ibを差し引くことにより、内部電流Ic(=Ia-Ib)を生成する。 The current control unit CTRL generates an internal current Ic (= Ia−Ib) by subtracting the internal current Ib from the internal current Ia.
 オペアンプAMP3は、その2入力端子がイマジナリショートするように、トランジスタM3のゲート制御を行う。従って、トランジスタM3のドレイン電流(=ISINKピンから引き込まれるシンク電流であり、第2の出力電流IoutBに相当)は、内部電流Icと抵抗Rc及びRdに応じた電流値(=Ic×Rc/Rd)となる。 The operational amplifier AMP3 controls the gate of the transistor M3 so that its two input terminals are imaginary short-circuited. Accordingly, the drain current of the transistor M3 (= the sink current drawn from the ISINK pin and corresponding to the second output current IoutB) is a current value (= Ic × Rc / Rd) corresponding to the internal current Ic and the resistors Rc and Rd. )
 このように、オペアンプAMP3、トランジスタM3、抵抗Rc及びRdは、ISINKピンから内部電流Icに応じた第2の出力電流IoutBを引き込む電流シンク部として機能する。 As described above, the operational amplifier AMP3, the transistor M3, and the resistors Rc and Rd function as a current sink unit that draws the second output current IoutB corresponding to the internal current Ic from the ISINK pin.
 図5は、第2実施形態におけるバイパス動作の一例を示すタイミングチャートであり、先の図3と同じく、上から順に、電源電圧Vin、出力電流Iout、第1の出力電流IoutA、及び、第2の出力電流IoutBが描写されている。 FIG. 5 is a timing chart showing an example of the bypass operation in the second embodiment. Similarly to FIG. 3, the power supply voltage Vin, the output current Iout, the first output current IoutA, and the second The output current IoutB is depicted.
 例えば、電源電圧Vinの立ち上げ時において、Vinが所定の設定電圧(=VREF×(RVIN/RSET)×(α/β))よりも低いときには、Ia>Ibとなり、IoutB>0となる。このとき、IoutB>Ioutとなるように、係数α及びβを設定しておけば、出力電流Ioutが全てISINKピンに流れ込むので、IoutA=0となる。すなわち、LED光源200は、LEDチップ203が完全にバイパスされた状態となり、LEDチップ201及び202のみが点灯する(図中の期間(1)を参照)。 For example, when the power supply voltage Vin is raised, if Vin is lower than a predetermined set voltage (= VREF × (RVIN / RSET) × (α / β)), Ia> Ib and IoutB> 0. At this time, if the coefficients α and β are set so that IoutB> Iout, all the output current Iout flows into the ISINK pin, so that IoutA = 0. That is, in the LED light source 200, the LED chip 203 is completely bypassed, and only the LED chips 201 and 202 are lit (see period (1) in the drawing).
 その後、電源電圧VinがIoutB=Ioutとなる電圧値(=VREF×(RVIN/RSET)×(α/β)-(Rd/Rc)×(RVIN/β)×Iout)に達すると、第2の出力電流IoutBが減少し始める。そして、これ以降、電源電圧Vinの上昇とともに、第2の出力電流IoutBが徐々に減少していき、その減少分だけ第1の出力電流IoutAが相補的に増大していく(図中の期間(2)を参照)。 Thereafter, when the power supply voltage Vin reaches a voltage value (= VREF × (RVIN / RSET) × (α / β) − (Rd / Rc) × (RVIN / β) × Iout) where IoutB = Iout) The output current IoutB starts to decrease. Thereafter, as the power supply voltage Vin increases, the second output current IoutB gradually decreases, and the first output current IoutA increases in a complementary manner by the amount of the decrease (period ( See 2)).
 さらに、電源電圧Vinが上昇し、Vin>VREF×(RVIN/RSET)×(α/β)になると、LEDチップ203のバイパスが完全に解除された状態となる。このとき、出力電流Ioutは、ISINKピンを介する第2の電流経路ではなく、LEDチップ203を介する第1の電流経路に全て流れる。従って、IoutB=0となり、IoutA=Ioutとなる(図中の期間(3)を参照)。 Furthermore, when the power supply voltage Vin rises and Vin> VREF × (RVIN / RSET) × (α / β), the bypass of the LED chip 203 is completely released. At this time, all of the output current Iout flows through the first current path via the LED chip 203 instead of the second current path via the ISINK pin. Therefore, IoutB = 0 and IoutA = Iout (see period (3) in the figure).
 上記とは逆に、電源電圧Vinの低下時には、Vin<VREF×(RVIN/RSET)×(α/β)となったときに、第1の出力電流IoutAが減少し始め、その減少分だけ第2の出力電流IoutBが相補的に増大し始める。 Contrary to the above, when the power supply voltage Vin decreases, when Vin <VREF × (RVIN / RSET) × (α / β), the first output current IoutA starts to decrease, and the decrease is the first. The output current IoutB of 2 begins to increase complementarily.
 その後、電源電圧Vinがさらに低下して、VREF×(RVIN/RSET)×(α/β)-(Rd/Rc)×(RVIN/β)×Ioutになると、LEDチップ203が完全にバイパスされた状態に戻る。従って、IoutA=0となり、IoutB=Ioutとなる。 After that, when the power supply voltage Vin is further decreased to VREF × (RVIN / RSET) × (α / β) − (Rd / Rc) × (RVIN / β) × Iout, the LED chip 203 is completely bypassed. Return to state. Therefore, IoutA = 0 and IoutB = Iout.
 上記したように、第2実施形態のバイパス機能部112は、LEDチップ203をバイパスするか否かを制御して出力電流Ioutが流れるLEDチップの直列段数を切り替える際に、LEDチップ202のカソードからSWピンに引き込む第2の出力電流IoutBのリニア制御を行うことにより、第2の出力電流IoutBに対して相補的に変動する第1の出力電流IoutA(=バイパス対象のLEDチップ203に流れる出力電流)を徐々に変化させる。すなわち、第1の出力電流IoutAと第2の出力電流IoutBの相補的なリニアクロス制御が実施される。 As described above, the bypass function unit 112 of the second embodiment controls whether to bypass the LED chip 203 and switches the number of LED chips in series in which the output current Iout flows, from the cathode of the LED chip 202. By performing linear control of the second output current IoutB drawn into the SW pin, the first output current IoutA that fluctuates complementarily to the second output current IoutB (= the output current flowing through the LED chip 203 to be bypassed) ) Is gradually changed. That is, complementary linear cross control of the first output current IoutA and the second output current IoutB is performed.
 本実施形態のバイパス機能部112であれば、LEDチップ203のバイパス状態が切り替わる際に、先出の第1実施形態(図2)と比べて、LED光源200の輝度変化が緩やかになるので、使用者の目に違和感を感じさせずに済む。 In the case of the bypass function unit 112 of the present embodiment, when the bypass state of the LED chip 203 is switched, the luminance change of the LED light source 200 is moderate as compared to the first embodiment (FIG. 2). The user does not feel uncomfortable.
<LED発光装置(素子追加例)>
 図6は、LED発光装置X1の素子追加例を示す図である。本構成例のLED発光装置X1は、先の図1をベースとしつつ、抵抗R5~R7をさらに有する。抵抗R5は、ダイオードD2及びD3それぞれのアノードと接地端との間に接続されている。抵抗R6は、THDピンと接地端との間に接続されている。抵抗R7は、THDピンと負特性サーミスタNTCとの間に接続されている。
<LED light emitting device (element addition example)>
FIG. 6 is a diagram illustrating an example of adding elements of the LED light emitting device X1. The LED light-emitting device X1 of this configuration example further includes resistors R5 to R7 based on FIG. The resistor R5 is connected between the anode of each of the diodes D2 and D3 and the ground terminal. The resistor R6 is connected between the THD pin and the ground terminal. The resistor R7 is connected between the THD pin and the negative characteristic thermistor NTC.
<バイパス機能部(第3実施形態)>
 図7は、バイパス機能部112(及びこれを備えたLED駆動装置100)の第3実施形態を示す図である。本実施形態のLED駆動装置100は、基本的に第1実施形態(図1)と同様の構成であるが、一部の構成要素については、描写が割愛されている。
<Bypass function unit (third embodiment)>
FIG. 7 is a diagram illustrating a third embodiment of the bypass function unit 112 (and the LED driving device 100 including the bypass function unit 112). The LED drive device 100 of the present embodiment has basically the same configuration as that of the first embodiment (FIG. 1), but some components are not illustrated.
 また、一部の構成要素については、それぞれの符号が変更されている(IOUT→OUT、ISET→SET、SW→ISINK、SWCNT→BPCNT、IoutB→Isink、R1→RBP1、R2→RBP2、R4→RSET)。ただし、それぞれの機能については、基本的に変更されていない。 In addition, for some components, the respective codes are changed (IOUT → OUT, ISET → SET, SW → ISLINK, SWCNT → BPCNT, IoutB → Isink, R1 → RBP1, R2 → RBP2, R4 → RSET. ). However, each function is basically unchanged.
 また、抵抗RBP1及びRBP2相互間の接続ノード(=分圧電圧Vin_divの印加端)とBPCNTピンとの間には、抵抗RBP3が新たに外付けされている。抵抗RBP1~RBP3の接続関係について具体的に説明しておく。抵抗RBP1の第1端は、電源電圧Vinの印加端に接続されている。抵抗RBP1の第2端と抵抗RBP2及びRBP3それぞれの第1端は、分圧電圧Vin_div(=Vin×{RBP2/(RBP1+RBP2)})の印加端に接続されている。抵抗RBP2の第2端は、接地端に接続されている。抵抗RBP3の第2端は、BPCNTピンに接続されている。 Also, a resistor RBP3 is newly provided between the connection node between the resistors RBP1 and RBP2 (= applied end of the divided voltage Vin_div) and the BPCNT pin. The connection relationship between the resistors RBP1 to RBP3 will be specifically described. A first end of the resistor RBP1 is connected to an application end of the power supply voltage Vin. A second end of the resistor RBP1 and a first end of each of the resistors RBP2 and RBP3 are connected to an application end of the divided voltage Vin_div (= Vin × {RBP2 / (RBP1 + RBP2)}). A second end of the resistor RBP2 is connected to the ground end. A second end of the resistor RBP3 is connected to the BPCNT pin.
 以下では、新規な構成を備えたバイパス機能部112について、重点的な説明を行う。本実施形態のバイパス機能部112は、オペアンプ112Aと、Pチャネル型MOS電界効果トランジスタ112Bと、係数乗算部112C及び112Dと、減算部112Eと、電流源112Fと、を含む。 Hereinafter, the bypass function unit 112 having a new configuration will be described mainly. The bypass function unit 112 of the present embodiment includes an operational amplifier 112A, a P-channel MOS field effect transistor 112B, coefficient multiplication units 112C and 112D, a subtraction unit 112E, and a current source 112F.
 オペアンプ112Aの反転入力端(-)は、BPCNTピン(=バイパス制御端子に相当)に接続されている。オペアンプ112Aの非反転入力端(+)は、閾値電圧VBPの印加端に接続されている。オペアンプ112Aの出力端は、トランジスタ112Bのゲートに接続されている。トランジスタ112Bのソース及びバックゲートは、BPCNTピンに接続されている。トランジスタ112Bのドレインは、係数乗算部112Dの入力端に接続されている。 The inverting input terminal (−) of the operational amplifier 112A is connected to the BPCNT pin (= corresponding to a bypass control terminal). The non-inverting input terminal (+) of the operational amplifier 112A is connected to the application terminal of the threshold voltage VBP. The output terminal of the operational amplifier 112A is connected to the gate of the transistor 112B. The source and back gate of transistor 112B are connected to the BPCNT pin. The drain of the transistor 112B is connected to the input terminal of the coefficient multiplier 112D.
 このように接続されたオペアンプ112Aとトランジスタ112Bは、BPCTLピンの端子電圧Vin_div2が閾値電圧VBPと一致するように、制御電流IBPCTLを生成する制御電流生成部として機能する。 The operational amplifier 112A and the transistor 112B connected in this way function as a control current generation unit that generates the control current IBPCTL so that the terminal voltage Vin_div2 of the BPCTL pin matches the threshold voltage VBP.
 なお、制御電流IBPCTLは、分圧電圧Vin_divの印加端から抵抗RBP3を介してトランジスタ112Bに流れる。従って、端子電圧Vin_div2は、分圧電圧Vin_divから、制御電流IBPCTLに応じた抵抗RBP3での電圧降下分を差し引いた電圧(=Vin_div-IBPCTL×RBP3)となる。 Note that the control current IBPCTL flows from the application end of the divided voltage Vin_div to the transistor 112B via the resistor RBP3. Accordingly, the terminal voltage Vin_div2 is a voltage obtained by subtracting the voltage drop at the resistor RBP3 corresponding to the control current IBPCTL from the divided voltage Vin_div (= Vin_div−IBPCTL × RBP3).
 係数乗算部112Cは、出力電流Ioutの目標値を定めるための基準電流Isetに係数Ksink(=Isink電流設定係数)を乗ずる。 The coefficient multiplication unit 112C multiplies the reference current Iset for determining the target value of the output current Iout by a coefficient Ksink (= Isink current setting coefficient).
 係数乗算部112Dは、制御電流IBPCNTに係数Gsink(=Isink電流ゲイン)を乗ずる。 The coefficient multiplier 112D multiplies the control current IBPCNT by the coefficient G sink (= I sink current gain).
 減算部112Eは、係数乗算部112Cの出力信号から係数乗算部112Dの出力信号を減ずる。 The subtractor 112E subtracts the output signal of the coefficient multiplier 112D from the output signal of the coefficient multiplier 112C.
 電流源112Fは、減算部112Eの出力信号に応じて、LEDチップ202のカソードからISINKピンに引き込まれるシンク電流Isink(=出力電流Ioutのうちバイパス対象のLEDチップ203を経由しない分岐電流に相当)を生成する。 The current source 112F is a sink current I sink that is drawn from the cathode of the LED chip 202 to the ISINK pin in accordance with the output signal of the subtractor 112E (= corresponding to the branch current that does not pass through the bypassed LED chip 203 in the output current Iout) Is generated.
 なお、シンク電流Isinkの設定値とその最大値Isink_max、並びに、制御電流IBPCNTは、それぞれ、次の(1a)式及び(1b)式、並びに、(1c)式により、それぞれ算出することができる。 The set value of the sink current I sink and the maximum value I sink_max thereof, and the control current IBPCNT can be calculated by the following equations (1a), (1b), and (1c), respectively.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
 上式から分かるように、本実施形態のバイパス機能部112では、電源電圧Vinまたはその分圧電圧Vin_divに応じた制御電流IBPCTLに基づいて、シンク電流Isinkの設定値を可変制御することができる。 As can be seen from the above equation, the bypass function unit 112 of the present embodiment can variably control the set value of the sink current Isink based on the control current IBPCTL corresponding to the power supply voltage Vin or the divided voltage Vin_div.
 なお、バイパス機能部112を使用しない場合には、ISINKピンをGND接続し、BPCNTピンを抵抗プルダウンまたはGND接続するとよい。 If the bypass function unit 112 is not used, the ISINK pin may be connected to GND, and the BPCNT pin may be connected to a resistor pull-down or GND.
 図8は、第3実施形態におけるバイパス動作の一例を示すタイミングチャートであり、上から順に、電源電圧Vin、分圧電圧Vin_div及び端子電圧Vin_div2、出力電流Iout、制御電流IBPCNT、シンク電流Isink、及び、出力電流IoutA(=Iout-Isink)が描写されている。 FIG. 8 is a timing chart showing an example of the bypass operation in the third embodiment. In order from the top, the power supply voltage Vin, the divided voltage Vin_div and the terminal voltage Vin_div2, the output current Iout, the control current IBPCNT, the sink current Isink, and , The output current IoutA (= Iout−Isink) is depicted.
 時刻t1以前には、電源電圧Vinが十分に上昇しておらず、端子電圧Vin_div2(この時点では分圧電圧Vin_divと同値)が閾値電圧VBPを下回っている。従って、オペアンプ112Aの出力信号が出力ダイナミックレンジの上限値(=ハイレベル電位)に張り付くので、トランジスタ112Bがフルオフ状態となり、制御電流IBPCTLが一切流れない状態(IBPCTL=0)となる。その結果、シンク電流Isinkの設定値は、その最大値Isink_max(=先出の(1b)式を参照)となる。 Before time t1, the power supply voltage Vin is not sufficiently increased, and the terminal voltage Vin_div2 (the same value as the divided voltage Vin_div at this time) is lower than the threshold voltage VBP. Therefore, since the output signal of the operational amplifier 112A sticks to the upper limit value (= high level potential) of the output dynamic range, the transistor 112B is in a full-off state, and the control current IBPCTL does not flow at all (IBPCTL = 0). As a result, the set value of the sink current I sink is the maximum value I sink_max (= see the above equation (1b)).
 ここで、上記の最大値Isink_maxは、出力電流Ioutの目標値よりも大きい値に設定しておけばよい。このような設定によれば、出力電流Ioutを全てシンク電流Isinkで賄うことができるので、LEDチップ203に流れる出力電流IoutAがゼロ値に維持される。 Here, the maximum value I sink_max may be set to a value larger than the target value of the output current Iout. According to such setting, the output current Iout can be entirely covered by the sink current Isink, so that the output current IoutA flowing through the LED chip 203 is maintained at a zero value.
 すなわち、LED光源200は、LEDチップ203が完全にバイパスされた状態となり、LEDチップ201及び202のみが点灯する。このように、電源電圧Vinが低い間は、LEDチップ203をバイパスして、出力電流Ioutが流れるLEDチップの直列段数を減らすことができるので、LED光源200の総順方向降下電圧Vf_totalを引き下げて、LED光源200の点灯を維持することが可能となる。 That is, in the LED light source 200, the LED chip 203 is completely bypassed, and only the LED chips 201 and 202 are lit. Thus, while the power supply voltage Vin is low, the LED chip 203 can be bypassed to reduce the number of LED chips connected in series, and the total forward voltage drop Vf_total of the LED light source 200 can be reduced. The LED light source 200 can be kept on.
 その後、電源電圧Vinの上昇に伴い、時刻t1において、端子電圧Vin_div2(=分圧電圧Vin_div)が閾値電圧VBPを上回ると、オペアンプ112Aの出力信号が低下するので、トランジスタ112Bに制御電流IBPCTLが流れ始める。その結果、シンク電流Isinkの設定値は、その最大値Isink_maxから制御電流IBPCNTの増大に伴って減少していく。 After that, when the terminal voltage Vin_div2 (= divided voltage Vin_div) exceeds the threshold voltage VBP at time t1, as the power supply voltage Vin increases, the output signal of the operational amplifier 112A decreases, so that the control current IBPCTL flows through the transistor 112B. start. As a result, the set value of the sink current I sink decreases from the maximum value I sink_max as the control current IBPCNT increases.
 ただし、時刻t1の時点では、未だシンク電流Isinkの設定値の方が出力電流Ioutの目標値よりも高いので、出力電流Ioutは、全てシンク電流Isinkで賄われる。その結果、LEDチップ203に流れる出力電流IoutAはゼロ値のままとなる。 However, since the set value of the sink current I sink is still higher than the target value of the output current I out at the time t1, the output current I out is all covered by the sink current I sink. As a result, the output current IoutA flowing through the LED chip 203 remains at a zero value.
 また、制御電流IBPCTLが流れ始めることにより、端子電圧Vin_div2は、分圧電圧Vin_divから、制御電流IBPCTLに応じた抵抗RBP3での電圧降下分を差し引いた電圧(=Vin_div-IBPCTL×RBP3)となる。これ以降、端子電圧Vin_div2は、閾値電圧VBPと等しい電圧値(ないしはほぼ等しい電圧値)に維持される。 Further, when the control current IBPCTL starts to flow, the terminal voltage Vin_div2 becomes a voltage obtained by subtracting the voltage drop at the resistor RBP3 corresponding to the control current IBPCTL from the divided voltage Vin_div (= Vin_div−IBPCTL × RBP3). Thereafter, the terminal voltage Vin_div2 is maintained at a voltage value (or a voltage value substantially equal to) the threshold voltage VBP.
 さらに、電源電圧Vinが上昇し、時刻t2において、シンク電流Isinkの設定値が出力電流Ioutの目標値よりも低くなると、出力電流Ioutの全てをシンク電流Isinkで賄うことができなくなる。その結果、時刻t2以降、電源電圧Vinの上昇とともに、シンク電流Isinkが徐々に減少していき、その減少分だけ出力電流IoutAが相補的に増大していく。 Furthermore, when the power supply voltage Vin rises and the set value of the sink current I sink becomes lower than the target value of the output current Iout at time t2, it is impossible to cover all of the output current Iout with the sink current I sink. As a result, after time t2, the sink current I sink gradually decreases as the power supply voltage Vin increases, and the output current IoutA increases complementarily by the decrease.
 その後、電源電圧Vinの更なる上昇により、時刻t3において、シンク電流Isinkが流れなくなると、出力電流Ioutが全て出力電流IoutAとして流れる状態、すなわち、LEDチップ203のバイパスが完全に解除された状態となる。 Thereafter, when the sink current I sink does not flow at time t3 due to a further increase in the power supply voltage Vin, the output current Iout flows as the output current IoutA, that is, the bypass of the LED chip 203 is completely released. Become.
 このように、本実施形態のバイパス機能部112であれば、先の第2実施形態(図4)と同じく、LEDチップ202のカソードからISINKピンに引き込むシンク電流Isinkと、バイパス対象のLEDチップ203に流れる出力電流IoutAとの相補的なリニアクロス制御を実施することができる。 Thus, in the bypass function unit 112 of the present embodiment, the sink current I sink drawn from the cathode of the LED chip 202 to the ISINK pin and the LED chip 203 to be bypassed, as in the second embodiment (FIG. 4). Complementary linear cross control with the output current IoutA flowing through the
 また、本実施形態のバイパス機能部112であれば、外付けの抵抗RBP1、RBP2及びRBP3それぞれの抵抗値を適宜調整することにより、シンク電流Isinkの設定値が低下し始める電源電圧Vinと、シンク電流Isinkの設定値が低下するときの傾き(延いてはシンク電流Isinkが流れなくなる電源電圧Vin)の双方を任意に設定することができる。以下、具体例を挙げて説明する。 In the case of the bypass function unit 112 of the present embodiment, the power supply voltage Vin starting to decrease the set value of the sink current I sink by appropriately adjusting the resistance values of the external resistors RBP1, RBP2, and RBP3, and the sink Both the slope when the set value of the current I sink is lowered (the power supply voltage Vin at which the sink current I sink does not flow) can be arbitrarily set. Hereinafter, a specific example will be described.
 図9は、抵抗RBP1、RBP2及びRBP3の第1設定例(Iout=100mA)を示す図である。なお、横軸には電源電圧Vin[V]が示されており、縦軸にはシンク電流Isinkの設定値[mA]が示されている。また、以下の説明において、VBPstartは、シンク電流Isinkの設定値が低下し始める電源電圧Vinに相当する。また、ΔVBP[V]は、シンク電流Isinkの設定値が低下し始めてからゼロ値に至るまでに要する電源電圧Vinの上昇幅を示している。 FIG. 9 is a diagram illustrating a first setting example (Iout = 100 mA) of the resistors RBP1, RBP2, and RBP3. The horizontal axis represents the power supply voltage Vin [V], and the vertical axis represents the set value [mA] of the sink current I sink. In the following description, VBPstart corresponds to the power supply voltage Vin at which the set value of the sink current I sink starts to decrease. Further, ΔVBP [V] indicates an increase width of the power supply voltage Vin required from when the set value of the sink current I sink starts to decrease to the zero value.
 まず、実線(1)で示したように、VBPstart=6V、ΔVBP=4Vに設定する場合を考える。この場合には、RBP1=46.7kΩ、RBP2=30.0kΩ、RBP3=96.5kΩにそれぞれ調整すればよい。 First, consider the case where VBPstart = 6V and ΔVBP = 4V are set as indicated by the solid line (1). In this case, adjustment may be made to RBP1 = 46.7 kΩ, RBP2 = 30.0 kΩ, and RBP3 = 96.5 kΩ, respectively.
 次に、小破線(2)で示したように、VBPstart=6V、ΔVBP=1Vに設定する場合を考える。この場合には、RBP1=18.9kΩ、RBP2=10.0kΩ、RBP3=18.8kΩにそれぞれ調整すればよい。 Next, consider the case where VBPstart = 6V and ΔVBP = 1V are set as indicated by a small broken line (2). In this case, RBP1 = 18.9 kΩ, RBP2 = 10.0 kΩ, and RBP3 = 18.8 kΩ may be adjusted.
 次に、大破線(3)で示したように、VBPstart=9V、ΔVBP=4Vに設定する場合を考える。この場合には、RBP1=30.6kΩ、RBP2=10.0kΩ、RBP3=64.8kΩにそれぞれ調整すればよい。 Next, consider the case where VBPstart = 9V and ΔVBP = 4V are set as indicated by the large broken line (3). In this case, RBP1 = 30.6 kΩ, RBP2 = 10.0 kΩ, and RBP3 = 64.8 kΩ may be adjusted.
 最後に、一点鎖線(4)で示したように、VBPstart=9V、ΔVBP=1Vに設定する場合を考える。この場合には、RBP1=33.9kΩ、RBP2=10.0kΩ、RBP3=8.99kΩにそれぞれ調整すればよい。 Finally, consider the case where VBPstart = 9V and ΔVBP = 1V are set as indicated by the alternate long and short dash line (4). In this case, adjustment may be made to RBP1 = 33.9 kΩ, RBP2 = 10.0 kΩ, and RBP3 = 8.99 kΩ, respectively.
 図10は、抵抗RBP1、RBP2、RBP3の第2設定例(Iout=600mA)を示す図である。なお、先の図9と同じく、横軸には電源電圧Vin[V]が示されており、縦軸にはシンク電流Isinkの設定値[mA]が示されている。 FIG. 10 is a diagram illustrating a second setting example (Iout = 600 mA) of the resistors RBP1, RBP2, and RBP3. As in FIG. 9, the horizontal axis represents the power supply voltage Vin [V], and the vertical axis represents the set value [mA] of the sink current Isink.
 まず、実線(1)で示したように、VBPstart=6V、ΔVBP=4Vに設定する場合を考える。この場合には、RBP1=15.6kΩ、RBP2=10.0kΩ、RBP3=13.0kΩにそれぞれ調整すればよい。 First, consider the case where VBPstart = 6V and ΔVBP = 4V are set as indicated by the solid line (1). In this case, RBP1 = 15.6 kΩ, RBP2 = 10.0 kΩ, and RBP3 = 13.0 kΩ may be adjusted.
 次に、小破線(2)で示したように、VBPstart=6V、ΔVBP=1Vに設定する場合を考える。この場合には、RBP1=10.58kΩ、RBP2=5.6kΩ、RBP3=0.57kΩにそれぞれ調整すればよい。 Next, consider the case where VBPstart = 6V and ΔVBP = 1V are set as indicated by a small broken line (2). In this case, adjustment may be made to RBP1 = 10.58 kΩ, RBP2 = 5.6 kΩ, and RBP3 = 0.57 kΩ, respectively.
 次に、大破線(3)で示したように、VBPstart=9V、ΔVBP=4Vに設定する場合を考える。この場合には、RBP1=30.6kΩ、RBP2=10.0kΩ、RBP3=4.52kΩにそれぞれ調整すればよい。 Next, consider the case where VBPstart = 9V and ΔVBP = 4V are set as indicated by the large broken line (3). In this case, RBP1 = 30.6 kΩ, RBP2 = 10.0 kΩ, and RBP3 = 4.52 kΩ may be adjusted.
 最後に、一点鎖線(4)で示したように、VBPstart=9V、ΔVBP=1Vに設定する場合を考える。この場合には、RBP1=11.18kΩ、RBP2=3.30kΩ、RBP3=0.24kΩにそれぞれ調整すればよい。 Finally, consider the case where VBPstart = 9V and ΔVBP = 1V are set as indicated by the alternate long and short dash line (4). In this case, RBP1 = 11.18 kΩ, RBP2 = 3.30 kΩ, and RBP3 = 0.24 kΩ, respectively.
<バイパス機能部(第4実施形態)>
 図11は、バイパス機能部112の第4実施形態を示す図である。本実施形態のバイパス機能部112は、先の第3実施形態(図7)を具体化した構成であり、先のオペアンプ112A及びトランジスタ112Bを含むほか、係数乗算部112C及び112D、減算部112E、及び、電流源112Fに相当する構成要素として、オペアンプ112Gと、電流源112Hと、Nチャネル型MOS電界効果トランジスタ112Iと、抵抗RA、RB及びRCと、を含む。
<Bypass function unit (fourth embodiment)>
FIG. 11 is a diagram illustrating a fourth embodiment of the bypass function unit 112. The bypass function unit 112 of the present embodiment is a configuration embodying the third embodiment (FIG. 7), and includes the previous operational amplifier 112A and the transistor 112B, as well as coefficient multiplication units 112C and 112D, a subtraction unit 112E, As the components corresponding to the current source 112F, an operational amplifier 112G, a current source 112H, an N-channel MOS field effect transistor 112I, and resistors RA, RB, and RC are included.
 電流源112Hの第1端は、電源端に接続されている。電流源112Hの第2端と抵抗RAの第1端は、オペアンプ112Gの非反転入力端(+)に接続されている。抵抗RAの第2端は、接地端に接続されている。オペアンプ112Gの反転入力端(-)は、トランジスタ112Bのドレインと抵抗RCの第1端に接続されている。オペアンプ112Gの出力端は、トランジスタ112Iのゲートに接続されている。トランジスタ112Iのドレインは、ISINKピンに接続されている。トランジスタ112Iのソース及びバックゲートは、抵抗RBの第1端と抵抗RCの第2端に接続されている。抵抗RBの第2端は、接地端に接続されている。 The first end of the current source 112H is connected to the power supply end. The second end of the current source 112H and the first end of the resistor RA are connected to the non-inverting input terminal (+) of the operational amplifier 112G. A second end of the resistor RA is connected to the ground end. The inverting input terminal (−) of the operational amplifier 112G is connected to the drain of the transistor 112B and the first terminal of the resistor RC. The output terminal of the operational amplifier 112G is connected to the gate of the transistor 112I. The drain of transistor 112I is connected to the ISINK pin. The source and back gate of the transistor 112I are connected to the first end of the resistor RB and the second end of the resistor RC. A second end of the resistor RB is connected to the ground end.
 電流源112Hは、出力電流Ioutの目標値を定めるための基準電流Iset(ないしはこれに応じた定電流)を生成する。また、抵抗RAは、基準電流Isetを参照電圧Vrefに変換する電流/電圧変換素子である。このように、電流源112Hと抵抗RAは、出力電流Ioutの目標値に応じた参照電圧Vref(=Iset×RA)を生成する参照電圧生成部として機能する。 The current source 112H generates a reference current Iset (or a constant current corresponding thereto) for determining a target value of the output current Iout. The resistor RA is a current / voltage conversion element that converts the reference current Iset into a reference voltage Vref. As described above, the current source 112H and the resistor RA function as a reference voltage generation unit that generates the reference voltage Vref (= Iset × RA) corresponding to the target value of the output current Iout.
 抵抗RBは、シンク電流Isinkをセンス電圧Vsに変換する電流/電圧変換素子である。このように、抵抗RBは、シンク電流Isinkに応じたセンス電圧Vs(=Isink×RB)を生成する電流検出部として機能する。 The resistor RB is a current / voltage conversion element that converts the sink current I sink into the sense voltage Vs. Thus, the resistor RB functions as a current detection unit that generates the sense voltage Vs (= I sink × RB) corresponding to the sink current I sink.
 抵抗RCは、制御電流IBPCTLに応じたオフセット電圧Vofs(=IBPCTL×RC)を生成し、これをセンス電圧Vsに足し合わせるオフセット付与部として機能する。なお、制御電流IBPCTLに応じて抵抗RBの両端間に生じるオフセット電圧Vofs’(=IBPCTL×RB)を無視することができない場合には、抵抗RB及びRCを上記のオフセット付与部として理解すればよい。 The resistor RC generates an offset voltage Vofs (= IBPCTL × RC) corresponding to the control current IBPCTL, and functions as an offset applying unit that adds this to the sense voltage Vs. When the offset voltage Vofs ′ (= IBPCTL × RB) generated between both ends of the resistor RB in accordance with the control current IBPCTL cannot be ignored, the resistors RB and RC may be understood as the offset applying unit. .
 オペアンプ112Gとトランジスタ112Iは、オフセット済みのセンス電圧(Vs+Vofs)が参照電圧Vrefと一致するように、シンク電流Isinkを生成するシンク電流生成部として機能する。 The operational amplifier 112G and the transistor 112I function as a sink current generator that generates the sink current I sink so that the offset sense voltage (Vs + Vofs) matches the reference voltage Vref.
 例えば、電源電圧Vinが低く、制御電流IBPCTLが流れていないときには、オフセットの与えられていないセンス電圧Vsが参照電圧Vrefと一致するように、シンク電流Isinkが生成される。この状態は、シンク電流Isinkの設定値がその最大値Isink_maxに設定されて出力電流IoutAが一切流れない状態、すなわち、LEDチップ203が完全にバイパスされた状態に相当する。 For example, when the power supply voltage Vin is low and the control current IBPCTL is not flowing, the sink current Isink is generated so that the sense voltage Vs to which no offset is applied matches the reference voltage Vref. This state corresponds to a state where the set value of the sink current I sink is set to the maximum value I sink_max and the output current IoutA does not flow at all, that is, the LED chip 203 is completely bypassed.
 一方、電源電圧Vinが上昇して、制御電流IBPCTLが流れ始めると、その電流値に応じたオフセット電圧Vofsがセンス電圧Vsに足し合わされて、オペアンプ112Gに帰還入力される。その結果、より少ないシンク電流Isinkで帰還ループが平衡に至るようになる。この状態は、シンク電流Isinkの設定値がその最大値Isink_maxから引き下げられた状態、すなわち、シンク電流Isinkと出力電流IoutAとの相補的なリニアクロス制御が行われている状態に相当する。 On the other hand, when the power supply voltage Vin rises and the control current IBPCTL starts to flow, the offset voltage Vofs corresponding to the current value is added to the sense voltage Vs and fed back to the operational amplifier 112G. As a result, the feedback loop reaches equilibrium with a smaller sink current I sink. This state corresponds to a state where the set value of the sink current I sink is lowered from the maximum value I sink_max, that is, a state where complementary linear cross control of the sink current I sink and the output current I outA is performed.
 最終的に、制御電流IBPCTLに応じたオフセット電圧Vofsが所定の参照電圧Vrefを上回るまで電源電圧Vinが上昇すると、もはやシンク電流Isinkが流れなくなる。この状態は、出力電流Ioutが全て出力電流IoutAとして流れる状態、すなわち、LEDチップ203のバイパスが完全に解除された状態となる。 Finally, when the power supply voltage Vin rises until the offset voltage Vofs corresponding to the control current IBPCTL exceeds a predetermined reference voltage Vref, the sink current I sink no longer flows. This state is a state where all the output current Iout flows as the output current IoutA, that is, a state where the bypass of the LED chip 203 is completely released.
<端子配置>
 図12は、図7及び図11におけるLED駆動装置100の端子配置を示す図である。LED駆動装置100は、VSON[Very-thin Small Outline No Lead]パッケージに封止されており、装置外部との電気的な接続を確立するための手段として、10本の外部端子(VINピン、BPCNTピン、PBUSピン、CRTピン、DISCピン、THDピン、SETピン、GNDピン、ISINKピン、OUTピン)が設けられている。
<Terminal arrangement>
FIG. 12 is a diagram showing a terminal arrangement of the LED driving device 100 in FIGS. 7 and 11. The LED driving device 100 is sealed in a VSON (Very-thin Small Outline No Lead) package, and has ten external terminals (VIN pin, BPCNT as means for establishing electrical connection with the outside of the device). Pin, PBUS pin, CRT pin, DISC pin, THD pin, SET pin, GND pin, ISINK pin, and OUT pin).
 VINピン(1ピン)は、電源電圧入力端子である。BPCNTピン(2ピン)は、減電時電流バイパス機能設定端子である。PBUSピン(3ピン)は、異常状態フラグ出力/出力電流オフ制御入力端子である。CRTピン(4ピン)及びDISCピン(5ピン)は、それぞれCRタイマ設定端子である。THDピン(6ピン)は、温度ディレーティング設定端子である。SETピン(7ピン)は、出力電流設定端子である。GNDピン(8ピン)は、接地端子である。ISINKピン(9ピン)は、電流シンク端子である。OUTピン(10ピン)は、電流出力端子である。 The VIN pin (pin 1) is a power supply voltage input terminal. The BPCNT pin (pin 2) is a current bypass function setting terminal at the time of power reduction. The PBUS pin (pin 3) is an abnormal state flag output / output current off control input terminal. The CRT pin (pin 4) and the DISC pin (pin 5) are CR timer setting terminals, respectively. The THD pin (pin 6) is a temperature derating setting terminal. The SET pin (pin 7) is an output current setting terminal. The GND pin (8 pin) is a ground terminal. The ISINK pin (pin 9) is a current sink terminal. The OUT pin (10 pin) is a current output terminal.
 なお、BPCNTピン(2ピン)は、電源電圧Vinの抵抗分圧入力端子であることから、VINピン(1ピン)に隣接して設けることが望ましい。 In addition, since the BPCNT pin (pin 2) is a resistance voltage dividing input terminal for the power supply voltage Vin, it is desirable to provide it adjacent to the VIN pin (pin 1).
 また、OUTピン(10ピン)とISINKピン(9ピン)は、いずれもLED光源200に接続される端子であることから、互いに隣接して設けることが望ましい。このようなピン配置を採用すれば、OUTピンとISINKピンがショートしても、LED光源200の一部(=OUT-ISINK間に接続されたLEDチップ201及び202)が消灯するのみであり、LED駆動装置100の破壊には至らない。なお、電源電圧Vinが上昇すると、最下段のLEDチップ203は点灯する。 Also, since both the OUT pin (10 pin) and the ISINK pin (9 pin) are terminals connected to the LED light source 200, it is desirable to provide them adjacent to each other. By adopting such a pin arrangement, even if the OUT pin and the ISINK pin are short-circuited, only a part of the LED light source 200 (= LED chips 201 and 202 connected between OUT and ISINK) is turned off. The drive device 100 is not destroyed. When the power supply voltage Vin rises, the lowermost LED chip 203 is lit.
 また、ISINKピン(9ピン)は、GNDピン(8ピン)に隣接して設けることが望ましい。このようなピン配置を採用すれば、ISINKピンとGNDピンがショートしても、LED光源200の一部(=OUT-ISINK間に接続されたLEDチップ201及び202)は点灯する。 Also, it is desirable to provide the ISINK pin (9 pins) adjacent to the GND pin (8 pins). If such a pin arrangement is adopted, even if the ISINK pin and the GND pin are short-circuited, a part of the LED light source 200 (= LED chips 201 and 202 connected between OUT and ISINK) is lit.
 また、LED駆動装置100には、パッケージの下面に放熱パッドEXP-PADが設けられている。なお、放熱パッドEXP-PADは、GND接続しておけばよい。 Further, the LED driving device 100 is provided with a heat radiation pad EXP-PAD on the lower surface of the package. Note that the heat dissipation pad EXP-PAD may be GND-connected.
<ソケット型LEDモジュール>
 図13は、これまでに説明してきたLED発光装置X1を具現化した一例として、ソケット型LEDモジュールYを示す平面図である。本構成例のソケット型LEDモジュールYは、例えば車載用の照明器具であって、基板300、LEDチップ400(先出のLEDチップ201~203に相当)、白色樹脂480、リフレクタ600、端子800、種々の電子部品(LED駆動装置100、抵抗R1~R7、キャパシタC1~C3、ダイオードD1~D3、負特性サーミスタNTC)、並びに、ソケット900を備えている。
<Socket type LED module>
FIG. 13 is a plan view showing a socket-type LED module Y as an example of realizing the LED light-emitting device X1 described so far. The socket type LED module Y of this configuration example is, for example, an in-vehicle lighting fixture, and includes a substrate 300, an LED chip 400 (corresponding to the above-described LED chips 201 to 203), a white resin 480, a reflector 600, a terminal 800, Various electronic components (LED driving device 100, resistors R1 to R7, capacitors C1 to C3, diodes D1 to D3, negative characteristic thermistor NTC) and a socket 900 are provided.
 基板300は、基材とこれに形成された配線パターン(本図の斜線ハッチング領域を参照)を有している。基材は、矩形状であり、例えばガラスエポキシ樹脂から成る。配線パターンは、LEDチップ400や種々の電子部品を実装するために基材の表面上に敷設された導電性部材であり、例えば、CuまたはAgなどの金属から成る。基板300の上面には、LED駆動装置100、抵抗R1~R7、キャパシタC1~C3、ダイオードD1~D3、及び、負特性サーミスタNTCが搭載されている。各電子部品は、基板300の上面及び下面に敷設された配線パターンによって接続されて回路を構成しており、LEDチップ400を所望の発光状態で点灯させるためのものである。 The substrate 300 has a base material and a wiring pattern formed thereon (see the hatched area in the figure). The substrate has a rectangular shape and is made of, for example, a glass epoxy resin. The wiring pattern is a conductive member laid on the surface of the base material for mounting the LED chip 400 and various electronic components, and is made of, for example, a metal such as Cu or Ag. On the upper surface of the substrate 300, the LED driving device 100, resistors R1 to R7, capacitors C1 to C3, diodes D1 to D3, and a negative characteristic thermistor NTC are mounted. Each electronic component is connected by a wiring pattern laid on the upper and lower surfaces of the substrate 300 to form a circuit, and is for lighting the LED chip 400 in a desired light emitting state.
 以下では、紙面の上下左右方向をそれぞれ基板300の上下左右方向と定義し、基板300の上下方向と平行になる部品配置方向を縦向きと定義し、基板300の左右方向と平行になる部品配置方向を横向きと定義した上、電子部品の配置(図中では細い破線枠で描写)に関する説明を行う。 In the following, the up, down, left, and right directions of the page are defined as the up, down, left, and right directions of the substrate 300, the component arrangement direction parallel to the up and down direction of the substrate 300 is defined as the vertical direction, The direction is defined as horizontal, and the arrangement of electronic components (depicted by a thin broken frame in the drawing) will be described.
 LED駆動装置100は、基板300の左上領域において、ピンの配列方向が横向きとなるように配置されている。 The LED driving device 100 is arranged in the upper left area of the substrate 300 so that the arrangement direction of the pins is horizontal.
 抵抗R1は、基板300の上側中央領域において、LED駆動装置100の右上側に横向きで配置されている。抵抗R2は、基板300の左上領域において、LED駆動装置100の上側(抵抗R1の左側)に横向きで配置されている。抵抗R3は、基板300の左上領域において、LED駆動装置100の左側に縦向きで配置されている。抵抗R4は、基板300の左上領域において、LED駆動装置100の下側に横向きで配置されている。抵抗R5は、基板300の左下領域において、ダイオードD2の右側に横向きで配置されている。抵抗R6は、基板300の左上領域において、LED駆動装置100の左側に横向きで配置されている。抵抗R7は、基板300の左上領域において、LED駆動装置100の左下側(抵抗R6の下側)に横向きで配置されている。負特性サーミスタNTCは、基板300の左中央領域において、抵抗R7の下側に縦向きで配置されている。 The resistor R1 is disposed sideways on the upper right side of the LED driving device 100 in the upper central region of the substrate 300. The resistor R2 is disposed sideways on the upper side of the LED driving device 100 (left side of the resistor R1) in the upper left region of the substrate 300. The resistor R <b> 3 is arranged vertically on the left side of the LED driving device 100 in the upper left region of the substrate 300. The resistor R <b> 4 is disposed laterally below the LED driving device 100 in the upper left region of the substrate 300. The resistor R5 is disposed horizontally on the right side of the diode D2 in the lower left region of the substrate 300. The resistor R <b> 6 is disposed sideways on the left side of the LED driving device 100 in the upper left region of the substrate 300. The resistor R7 is disposed in the horizontal direction on the lower left side of the LED driving device 100 (below the resistor R6) in the upper left region of the substrate 300. Negative characteristic thermistor NTC is arranged vertically below resistor R7 in the left center region of substrate 300.
 キャパシタC1は、基板300の上側中央領域において、LED駆動装置100の右側に縦向きで配置されている。キャパシタC2は、基板300の上側中央領域において、LED駆動装置100の右側に横向きで配置されている。キャパシタC3は、基板300の左上領域において、抵抗R3の左側かつ抵抗R6の上側に縦向きで配置されている。 The capacitor C <b> 1 is arranged vertically on the right side of the LED driving device 100 in the upper center region of the substrate 300. The capacitor C <b> 2 is disposed sideways on the right side of the LED driving device 100 in the upper center region of the substrate 300. The capacitor C3 is arranged in the vertical direction on the left side of the resistor R3 and above the resistor R6 in the upper left region of the substrate 300.
 ダイオードD1は、基板300の右下領域に縦向きで配置されている。ダイオードD2は、基板300の左下領域に縦向きで配置されている。ダイオードD3は、基板300の左中央領域において、負特性サーミスタNTCの左側に縦向きで配置されている。なお、ダイオードD3は、ダイオードD1及びD2よりも小型である。 The diode D1 is arranged vertically in the lower right region of the substrate 300. The diode D <b> 2 is arranged in the vertical direction in the lower left region of the substrate 300. The diode D3 is arranged vertically in the left center region of the substrate 300 on the left side of the negative characteristic thermistor NTC. The diode D3 is smaller than the diodes D1 and D2.
 なお、電子部品の種類、個数、及び、配置場所は上記に限定されない。 Note that the type, number and location of electronic components are not limited to the above.
 リフレクタ600は、例えば白色樹脂から成り、LEDチップ400を囲むようにして基板300の中央領域に固定されている。リフレクタ600は、LEDチップ400から側方に発せられた光を上方に向けて反射するためのものである。リフレクタ600には、反射面601が形成されている。反射面601は、LEDチップ400を囲んでいる。なお、図13では分かりにくいが、反射面601は、基板300の厚さ方向において、基板300から離間するほど、基板300の厚さ方向に対して直角である方向において、LEDチップ400から遠ざかるように傾斜している。つまり、反射面601は、基板300の厚さ方向に直交する断面が、リフレクタ600の開口側に向かうほど大きくなるテーパ形状になっている。 The reflector 600 is made of, for example, a white resin, and is fixed to the central region of the substrate 300 so as to surround the LED chip 400. The reflector 600 is for reflecting upward the light emitted from the LED chip 400 to the side. A reflecting surface 601 is formed on the reflector 600. The reflective surface 601 surrounds the LED chip 400. Although it is difficult to understand in FIG. 13, the reflective surface 601 moves away from the LED chip 400 in the direction perpendicular to the thickness direction of the substrate 300 as it is separated from the substrate 300 in the thickness direction of the substrate 300. It is inclined to. That is, the reflecting surface 601 has a tapered shape in which a cross section orthogonal to the thickness direction of the substrate 300 increases toward the opening side of the reflector 600.
 LEDチップ400は、ソケット型LEDモジュールYの光源であり、例えば赤色光を発する。本構成例では、3つのLEDチップ400が、リフレクタ600に囲まれるようにして基板300に搭載されている。なお、本図では、正三角形の各頂点となる位置に、3つのLEDチップ400がそれぞれ配置されている。ただし、LEDチップ400のレイアウトは、これに限定されるものではなく、例えば、図14で示したように、3つのLEDチップ400を基板300の左右方向に沿って一列に並べて配置してもよい。 The LED chip 400 is a light source of the socket type LED module Y and emits red light, for example. In this configuration example, the three LED chips 400 are mounted on the substrate 300 so as to be surrounded by the reflector 600. In the drawing, three LED chips 400 are respectively arranged at positions corresponding to the vertices of the equilateral triangle. However, the layout of the LED chip 400 is not limited to this, and for example, as shown in FIG. 14, the three LED chips 400 may be arranged in a line along the left-right direction of the substrate 300. .
 なお、本構成例においては、LEDチップ400が赤色光を発する場合について説明したが、LEDチップ400の発光色はこれに限られない。 In this configuration example, the case where the LED chip 400 emits red light has been described. However, the emission color of the LED chip 400 is not limited thereto.
 白色樹脂480は、LEDチップ400からの光を透過しない、白色を呈する樹脂材料から成り、不透明樹脂の一例に相当する。図13から理解されるように、白色樹脂480はLEDチップ400を囲んでおり、その外周縁がリフレクタ600の反射面601に到達している。このため、図13において、LEDチップ400から反射面601へと図中上下方向および左右方向に広がる領域は、白色樹脂480によって埋められている。 The white resin 480 is made of a white resin material that does not transmit light from the LED chip 400 and corresponds to an example of an opaque resin. As can be understood from FIG. 13, the white resin 480 surrounds the LED chip 400, and the outer peripheral edge reaches the reflecting surface 601 of the reflector 600. For this reason, in FIG. 13, the region extending from the LED chip 400 to the reflection surface 601 in the vertical direction and the horizontal direction in the drawing is filled with the white resin 480.
 端子800は、電極となる金属線であって、基板300およびソケット900を貫通して設けられている。端子800の一方端は、配線パターンの一部に、例えばハンダによって接続されている。 The terminal 800 is a metal wire serving as an electrode, and is provided through the substrate 300 and the socket 900. One end of the terminal 800 is connected to a part of the wiring pattern by, for example, solder.
 ソケット900は、基板300を搭載して、例えば自動車などに取り付けるための部品である。ソケット900は、例えば合成樹脂から成り、例えば射出成形によって形成される。ソケット900は、基板300を搭載するための搭載部910及び自動車などに取り付けるための取付部を備えている。搭載部910は、一方が開口した円筒形状をなしており、搭載部910の内側底面に基板300が搭載される。搭載部910の内側底面には、例えばアルミニウム製の円形の板である放熱板950が固定されている。基板300は、下面を放熱板950の上面に接着剤で接着することで、ソケット900の搭載部910に搭載される。 The socket 900 is a component that mounts the substrate 300 and is attached to, for example, an automobile. The socket 900 is made of, for example, a synthetic resin, and is formed by, for example, injection molding. The socket 900 includes a mounting portion 910 for mounting the substrate 300 and an attachment portion for attachment to an automobile or the like. The mounting portion 910 has a cylindrical shape with one opening, and the substrate 300 is mounted on the inner bottom surface of the mounting portion 910. A heat radiating plate 950, which is a circular plate made of, for example, aluminum, is fixed to the inner bottom surface of the mounting portion 910. The substrate 300 is mounted on the mounting portion 910 of the socket 900 by bonding the lower surface to the upper surface of the heat sink 950 with an adhesive.
 次に、ソケット型LEDモジュールYの作用について説明する。 Next, the operation of the socket type LED module Y will be described.
 白色樹脂480は、LEDチップ400の支持基板からリフレクタ600の反射面601にいたる環状領域のすべてを覆っている。従って、反射面601に囲まれた領域は、LEDチップ400が占める領域を除き、白色樹脂480によって覆われている。これにより、LEDチップ400の半導体層からの光をより多く反射することが可能である。これは、ソケット型LEDモジュールYの高輝度化に好適である。また、基板300の反射面601に囲まれた領域に、光を好適に反射させる処理を別途施しておく必要がない。 The white resin 480 covers the entire annular region from the support substrate of the LED chip 400 to the reflection surface 601 of the reflector 600. Therefore, the area surrounded by the reflective surface 601 is covered with the white resin 480 except for the area occupied by the LED chip 400. Thereby, more light from the semiconductor layer of the LED chip 400 can be reflected. This is suitable for increasing the brightness of the socket type LED module Y. In addition, it is not necessary to separately perform a process for suitably reflecting light in the region surrounded by the reflection surface 601 of the substrate 300.
 反射面601を有するリフレクタ600を備えることにより、ソケット型LEDモジュールYの直上方向をより明るく照らすことができる。 By providing the reflector 600 having the reflective surface 601, the direction directly above the socket-type LED module Y can be illuminated more brightly.
 なお、ソケット型LEDモジュールYでは、光源となるLEDチップ400が1ヶ所に集中して配置されている。従って、電源電圧Vinの低下時にバイパス機能部112を用いてLEDチップ400のいずれか一つをバイパスしても、LEDチップ一つ分の輝度が低下するだけであり、ソケット型LEDモジュールY全体が消灯してしまうことはない。 In the socket type LED module Y, the LED chips 400 serving as the light source are concentrated in one place. Therefore, even if any one of the LED chips 400 is bypassed by using the bypass function unit 112 when the power supply voltage Vin is decreased, only the brightness of one LED chip is decreased. It will never go out.
 特に、車載ランプには、電源電圧Vinの低下時でも点灯状態を維持しなければならないという法規の遵守が求められる。これを鑑みると、バイパス機能部112を備えたLED駆動装置100は、車載ランプの駆動主体として非常に好適であると言える。 In particular, in-vehicle lamps are required to comply with the law that the lighting state must be maintained even when the power supply voltage Vin decreases. In view of this, it can be said that the LED driving device 100 including the bypass function unit 112 is very suitable as a driving subject of the in-vehicle lamp.
 なお、ソケット型LEDモジュールYの均一発光を優先する場合には、例えば図14において、中央部に配置されたLEDチップをバイパス対象とすることが望ましい。一方、プリント配線の敷設容易性を優先するのであれば、例えば、図14において、端部に配置されたLEDチップをバイパス対象とすればよい。 In the case where priority is given to uniform light emission of the socket type LED module Y, for example, in FIG. On the other hand, if priority is given to the ease of laying the printed wiring, for example, in FIG. 14, the LED chip disposed at the end may be targeted for bypass.
<用途>
 これまでに説明してきたLED駆動装置100は、例えば、図15や図16で示したように、車両X10のヘッドランプ(ハイビーム/ロービーム/スモールランプ/フォグランプなどを適宜含む)X11、昼間走行用ランプ(DRL[daylight running lamps])X12、テールランプ(スモールランプやバックランプなどを適宜含む)X13、ストップランプX14、ターンランプX15などの発光装置に組み込んで用いることができる。
<Application>
The LED driving device 100 described so far includes, for example, as shown in FIGS. 15 and 16, a headlamp (including a high beam / low beam / small lamp / fog lamp, etc.) X11 of a vehicle X10, a daytime running lamp. (DRL [daylight running lamps]) X12, tail lamps (including small lamps and back lamps as appropriate) X13, stop lamps X14, turn lamps X15 and the like can be incorporated and used.
 なお、LED駆動装置100は、駆動対象となるLED光源200とともにモジュール(図13~図14のソケット型LEDモジュールY、図17のLEDヘッドランプモジュールY10、図18のLEDターンランプモジュールY20、及び、図19のLEDリアランプモジュールY30など)として提供されるものであってもよいし、LED光源200とは独立にIC単体として提供されるものであってもよい。 The LED driving device 100 includes a module (socket-type LED module Y in FIGS. 13 to 14, LED headlamp module Y10 in FIG. 17, LED turn lamp module Y20 in FIG. 19 may be provided as an LED rear lamp module Y30 of FIG. 19, or may be provided as an IC unit independently of the LED light source 200.
<その他の変形例>
 上記の実施形態では、発光素子として発光ダイオードを用いた構成を例に挙げて説明を行ったが、本発明の構成はこれに限定されるものではなく、例えば、発光素子として有機EL[electro-luminescence]素子を用いることも可能である。
<Other variations>
In the above embodiment, the configuration using a light emitting diode as a light emitting element has been described as an example. However, the configuration of the present invention is not limited thereto, and for example, an organic EL [electro- It is also possible to use a luminescence] element.
 また、上記の実施形態では、電流ドライバ101が電流ソース型(=電源端からLED光源200のアノードに出力電流Ioutを流し込む出力形式)である場合を例に挙げたが、LED駆動装置100の構成は何らこれに限定されるものではなく、電流ドライバ101が電流シンク型(=LED光源200のカソードから接地端に向けて出力電流Ioutを引き込む出力形式)である場合にも、バイパス機能部112の導入は有効である。 In the above-described embodiment, the case where the current driver 101 is of a current source type (= an output format in which the output current Iout flows from the power supply terminal to the anode of the LED light source 200) is taken as an example. However, the present invention is not limited to this, and even when the current driver 101 is a current sink type (= an output type that draws the output current Iout from the cathode of the LED light source 200 toward the ground terminal), Introduction is effective.
 また、上記の実施形態では、LED光源200を構成する3つのLEDチップ201~203のうち、最も低電位側に配列されたLEDチップ203をバイパス対象としたが、他のLEDチップ201または202をバイパス対象とすることも可能である。 In the above embodiment, among the three LED chips 201 to 203 constituting the LED light source 200, the LED chip 203 arranged on the lowest potential side is set as a bypass target. It is also possible to make a bypass target.
 また、例えば、電源電圧Vinと比較される複数の閾値電圧Vth1及びVth2(ただしVth1<Vth2)を用意しておき、Vin<Vth1であるときには、LEDチップ202及び203双方をバイパスし、Vth1<Vin<Vth2であるときには、LEDチップ202のバイパスを解除してLEDチップ203のみをバイパスし、Vin>Vth2であるときには、LEDチップ202及び203双方のバイパスを解除する、といった段階的なバイパス制御を行うことも可能である。 Also, for example, a plurality of threshold voltages Vth1 and Vth2 (where Vth1 <Vth2) to be compared with the power supply voltage Vin are prepared. When Vin <Vth1, both the LED chips 202 and 203 are bypassed, and Vth1 <Vin When Vth2, the bypass of the LED chip 202 is released and only the LED chip 203 is bypassed, and when Vin> Vth2, the bypass of both the LED chips 202 and 203 is released. It is also possible.
 このように、本明細書中に開示されている種々の技術的特徴は、上記実施形態のほか、その技術的創作の主旨を逸脱しない範囲において種々の変更を加えることが可能である。例えば、バイポーラトランジスタとMOS電界効果トランジスタとの相互置換や、各種信号の論理レベル反転は任意である。すなわち、上記実施形態は、全ての点で例示であって制限的なものではないと考えられるべきであり、本発明の技術的範囲は、上記実施形態に限定されるものではなく、特許請求の範囲と均等の意味及び範囲内に属する全ての変更が含まれると理解されるべきである。 As described above, various technical features disclosed in the present specification can be variously modified within the scope of the technical creation in addition to the above-described embodiment. For example, mutual replacement of a bipolar transistor and a MOS field effect transistor and logic level inversion of various signals are arbitrary. That is, the above-described embodiment should be considered as illustrative in all points and not restrictive, and the technical scope of the present invention is not limited to the above-described embodiment, and It should be understood that all modifications that fall within the meaning and range are included.
 本明細書中に開示されている発明は、例えば、車載用の発光素子駆動装置において、電源電圧が低下しても発光素子光源の点灯を維持するために利用することが可能である。 The invention disclosed in the present specification can be used, for example, in an in-vehicle light emitting element driving device to maintain lighting of a light emitting element light source even when a power supply voltage is lowered.
   100  LED駆動装置(発光素子駆動装置)
   101  電流ドライバ
   102  基準電圧生成部
   103  オープンマスク機能部
   104  過電圧ミュート部
   105  プロテクトバス機能部
   106  CRタイマ
   107  LEDオープン検出部
   108  LEDショート検出部
   109  基準電流設定部
   110  ISETオープン/ショート検出部
   111  制御ロジック部
   112  バイパス機能部
   112a  コンパレータ
   112b  スイッチ
   112A  オペアンプ
   112B  Pチャネル型MOS電界効果トランジスタ
   112C、112D  係数乗算部
   112E  減算部
   112F  電流源
   112G  オペアンプ
   112H  電流源
   112I  Nチャネル型MOS電界効果トランジスタ
   200  LED光源(発光素子光源)
   201、202、203  LED素子(発光素子)
   300  基板
   400  LEDチップ
   480  白色樹脂
   600  リフレクタ
   601  反射面
   800  端子
   900  ソケット
   910  搭載部
   950  放熱板
   R1~R4、R5~R7  抵抗
   C1~C3  キャパシタ
   D1~D3  ダイオード
   NTC  負特性サーミスタ
   N1、N2  Nチャネル型MOS電界効果トランジスタ
   CS1、CS2  電流源
   SW1、SW2  スイッチ
   AMP1~AMP3  オペアンプ
   CM1、CM2  カレントミラー
   CTRL  電流制御部
   M1~M3  Nチャネル型MOS電界効果トランジスタ
   Ra~Rd、RA、RB、RC、RSET、RVIN、RBP1~3  抵抗
   X  車両
   X1  LED発光装置
   X2  バッテリ
   X3a、X3b  電源スイッチ
   X10  車両
   X11  ヘッドランプ
   X12  昼間走行用ランプ
   X13  テールランプ
   X14  ストップランプ
   X15  ターンランプ
   Y  ソケット型LEDモジュール
   Y10  LEDヘッドランプモジュール
   Y20  LEDターンランプモジュール
   Y30  LEDリアランプモジュール
100 LED driving device (light emitting element driving device)
DESCRIPTION OF SYMBOLS 101 Current driver 102 Reference voltage generation part 103 Open mask function part 104 Overvoltage mute part 105 Protect bus function part 106 CR timer 107 LED open detection part 108 LED short detection part 109 Reference current setting part 110 ISET open / short detection part 111 Control logic Unit 112 bypass function unit 112a comparator 112b switch 112A operational amplifier 112B P channel type MOS field effect transistor 112C, 112D coefficient multiplication unit 112E subtraction unit 112F current source 112G operational amplifier 112H current source 112I N channel type MOS field effect transistor 200 LED light source (light emitting element) light source)
201, 202, 203 LED element (light emitting element)
300 Substrate 400 LED chip 480 White resin 600 Reflector 601 Reflecting surface 800 Terminal 900 Socket 910 Mounting portion 950 Heat sink R1-R4, R5-R7 Resistor C1-C3 Capacitor D1-D3 Diode NTC Negative characteristic thermistor N1, N2 N-channel type MOS Field effect transistor CS1, CS2 Current source SW1, SW2 Switch AMP1 to AMP3 Operational amplifier CM1, CM2 Current mirror CTRL Current control unit M1 to M3 N-channel MOS field effect transistor Ra to Rd, RA, RB, RC, RSET, RVIN, RBP1 3 Resistance X Vehicle X1 LED light emitting device X2 Battery X3a, X3b Power switch X10 Vehicle X11 Headlamp X 2 daytime running lamp X13 tail lamp X14 stop lamp X15 turn lamp Y socket type LED module Y10 LED headlamp module Y20 LED turn lamp module Y 30 LED Rear lamp module

Claims (20)

  1.  電源電圧の印加端と接地端との間に接続された発光素子光源に流れる出力電流を生成する電流ドライバと、
     前記電源電圧の低下時に前記発光素子光源を構成する複数の発光素子の少なくとも一つをバイパスして前記出力電流が流れる発光素子の直列段数を減らすバイパス機能部と、
     を有することを特徴とする発光素子駆動装置。
    A current driver that generates an output current that flows to a light emitting element light source connected between a power supply voltage application terminal and a ground terminal;
    A bypass function unit that bypasses at least one of a plurality of light-emitting elements constituting the light-emitting element light source when the power supply voltage decreases, and reduces the number of series stages of light-emitting elements through which the output current flows;
    A light-emitting element driving device comprising:
  2.  前記バイパス機能部は、
     前記電源電圧またはその分圧電圧と所定の閾値電圧とを比較して比較信号を生成するコンパレータと、
     前記比較信号に応じて前記複数の発光素子の少なくとも一つをバイパスするか否かを切り替えるスイッチと、
     を含むことを特徴とする請求項1に記載の発光素子駆動装置。
    The bypass function unit is
    A comparator that compares the power supply voltage or a divided voltage thereof with a predetermined threshold voltage to generate a comparison signal;
    A switch for switching whether or not to bypass at least one of the plurality of light emitting elements according to the comparison signal;
    The light-emitting element driving device according to claim 1, comprising:
  3.  前記コンパレータは、ヒステリシスコンパレータであることを特徴とする請求項2に記載の発光素子駆動装置。 3. The light emitting element driving device according to claim 2, wherein the comparator is a hysteresis comparator.
  4.  前記バイパス機能部は、前記出力電流が流れる発光素子の直列段数を切り替える際に、バイパス対象の発光素子に流れる出力電流を徐々に変化させることを特徴とする請求項1に記載の発光素子駆動装置。 2. The light emitting element driving device according to claim 1, wherein the bypass function unit gradually changes an output current flowing through a light emitting element to be bypassed when switching a series number of light emitting elements through which the output current flows. .
  5.  前記バイパス機能部は、前記電源電圧またはその分圧電圧に応じた制御電流に基づいて前記出力電流のうち前記バイパス対象の発光素子を経由しない分岐電流の設定値を可変制御することを特徴とする請求項4に記載の発光素子駆動装置。 The bypass function unit variably controls a set value of a branch current that does not pass through the light-emitting element to be bypassed among the output currents based on a control current corresponding to the power supply voltage or a divided voltage thereof. The light emitting element drive device according to claim 4.
  6.  前記制御電流は、前記電源電圧または前記分圧電圧が所定の閾値電圧よりも高くなったときに流れ始めることを特徴とする請求項5に記載の発光素子駆動装置。 The light emitting element driving device according to claim 5, wherein the control current starts to flow when the power supply voltage or the divided voltage becomes higher than a predetermined threshold voltage.
  7.  前記分岐電流の設定値は、前記出力電流の目標値よりも大きい最大値から前記制御電流の増大に伴って減少していくことを特徴とする請求項5または請求項6に記載の発光素子駆動装置。 7. The light emitting element drive according to claim 5, wherein the set value of the branch current decreases from a maximum value larger than a target value of the output current as the control current increases. apparatus.
  8.  前記バイパス機能部は、前記制御電流が流れるバイパス制御端子の端子電圧が所定の閾値電圧と一致するように前記制御電流を生成する制御電流生成部を含むことを特徴とする請求項5~請求項7のいずれか一項に記載の発光素子駆動装置。 The bypass function unit includes a control current generation unit configured to generate the control current so that a terminal voltage of a bypass control terminal through which the control current flows matches a predetermined threshold voltage. The light-emitting element driving device according to claim 7.
  9.  前記端子電圧は、前記電源電圧または前記分圧電圧から前記制御電流に応じた電圧降下分を差し引いた電圧であることを特徴とする請求項8に記載の発光素子駆動装置。 9. The light emitting element driving device according to claim 8, wherein the terminal voltage is a voltage obtained by subtracting a voltage drop corresponding to the control current from the power supply voltage or the divided voltage.
  10.  前記バイパス機能部は、
     前記出力電流の目標値を定めるための基準電流に第1係数を乗ずる第1係数乗算部と、
     前記制御電流に第2係数を乗ずる第2係数乗算部と、
     前記第1係数乗算部の出力信号から前記第2係数乗算部の出力信号を減ずる減算部と、
     前記減算部の出力信号に応じて前記分岐電流を生成する電流源と、
     をさらに含むことを特徴とする請求項8または請求項9に記載に発光素子駆動装置。
    The bypass function unit is
    A first coefficient multiplier for multiplying a reference current for determining a target value of the output current by a first coefficient;
    A second coefficient multiplier for multiplying the control current by a second coefficient;
    A subtractor for subtracting the output signal of the second coefficient multiplier from the output signal of the first coefficient multiplier;
    A current source that generates the branch current according to an output signal of the subtracting unit;
    The light-emitting element driving device according to claim 8, further comprising:
  11.  前記バイパス機能部は、
     前記出力電流の目標値に応じた参照電圧を生成する参照電圧生成部と、
     前記分岐電流に応じたセンス電圧を生成する電流検出部と、
     前記制御電流に応じたオフセット電圧を前記センス電圧に与えるオフセット付与部と、
     前記オフセット電圧が付与された前記センス電圧が前記参照電圧と一致するように前記分岐電流を生成する分岐電流生成部と、
     をさらに含むことを特徴とする請求項8または請求項9に記載の発光素子駆動装置。
    The bypass function unit is
    A reference voltage generation unit that generates a reference voltage according to a target value of the output current;
    A current detection unit that generates a sense voltage according to the branch current;
    An offset applying unit that gives the sense voltage an offset voltage corresponding to the control current;
    A branch current generation unit that generates the branch current so that the sense voltage to which the offset voltage is applied matches the reference voltage;
    The light-emitting element driving device according to claim 8, further comprising:
  12.  第1端が前記電源電圧の印加端に接続されて第2端が前記分圧電圧の印加端に接続された第1抵抗と、第1端が前記分圧電圧の印加端に接続されて第2端が接地端に接続された第2抵抗と、第1端が前記分圧電圧の印加端に接続されて第2端が前記バイパス制御端子に接続された第3抵抗が外付けされることを特徴とする請求項8~請求項11のいずれか一項に記載の発光素子駆動装置。 A first resistor connected to the power supply voltage application terminal and a second terminal connected to the divided voltage application terminal; a first terminal connected to the divided voltage application terminal; A second resistor having two ends connected to the ground end and a third resistor having the first end connected to the divided voltage application end and the second end connected to the bypass control terminal are externally attached. The light-emitting element driving device according to any one of claims 8 to 11, wherein:
  13.  前記バイパス制御端子は、前記電源電圧の入力端子に隣接することを特徴とする請求項8~請求項12のいずれか一項に記載の発光素子駆動装置。 The light-emitting element driving device according to any one of claims 8 to 12, wherein the bypass control terminal is adjacent to an input terminal of the power supply voltage.
  14.  前記分岐電流が流れる外部端子は、前記出力電流の出力端子及び接地端子の少なくとも一方に隣接することを特徴とする請求項8~請求項13のいずれか一項に記載の発光素子駆動装置。 14. The light emitting element driving apparatus according to claim 8, wherein the external terminal through which the branch current flows is adjacent to at least one of an output terminal and a ground terminal of the output current.
  15.  前記電流ドライバは、電流ソース型であることを特徴とする請求項1~請求項14のいずれか一項に記載の発光素子駆動装置。 15. The light-emitting element driving device according to claim 1, wherein the current driver is a current source type.
  16.  前記電流ドライバは、電流シンク型であることを特徴とする請求項1~請求項14のいずれか一項に記載の発光素子駆動装置。 The light-emitting element driving device according to any one of claims 1 to 14, wherein the current driver is a current sink type.
  17.  複数の発光素子を直列に接続して成る発光素子光源と、
     前記発光素子光源を駆動する請求項1~請求項16のいずれか一項に記載の発光素子駆動装置と、
     を有することを特徴とする発光装置。
    A light emitting element light source formed by connecting a plurality of light emitting elements in series;
    The light emitting element driving device according to any one of claims 1 to 16, which drives the light emitting element light source;
    A light emitting device comprising:
  18.  前記発光素子は、発光ダイオード、または、有機EL素子であることを特徴とする請求項17に記載の発光装置。 The light emitting device according to claim 17, wherein the light emitting element is a light emitting diode or an organic EL element.
  19.  前記発光素子光源や前記発光素子駆動装置を実装するための配線パターンが敷設された基板と、
     前記基板を搭載するソケットと、
     をさらに有することを特徴とする請求項17または請求項18に記載の発光装置。
    A substrate on which a wiring pattern for mounting the light emitting element light source and the light emitting element driving device is laid;
    A socket for mounting the substrate;
    The light-emitting device according to claim 17 or 18, further comprising:
  20.  請求項17~請求項19のいずれか一項に記載の発光装置を有することを特徴とする車両。 A vehicle comprising the light-emitting device according to any one of claims 17 to 19.
PCT/JP2018/039634 2018-03-28 2018-10-25 Light-emitting element drive device WO2019187279A1 (en)

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