WO2019166503A3 - Data bus system and allocation of bus addresses in such a data bus system - Google Patents

Data bus system and allocation of bus addresses in such a data bus system Download PDF

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Publication number
WO2019166503A3
WO2019166503A3 PCT/EP2019/054887 EP2019054887W WO2019166503A3 WO 2019166503 A3 WO2019166503 A3 WO 2019166503A3 EP 2019054887 W EP2019054887 W EP 2019054887W WO 2019166503 A3 WO2019166503 A3 WO 2019166503A3
Authority
WO
WIPO (PCT)
Prior art keywords
bus
shunt resistor
data bus
current
node
Prior art date
Application number
PCT/EP2019/054887
Other languages
German (de)
French (fr)
Other versions
WO2019166503A2 (en
Inventor
Christian Schmitz
Bernd Burchard
Original Assignee
Elmos Semiconductor Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elmos Semiconductor Aktiengesellschaft filed Critical Elmos Semiconductor Aktiengesellschaft
Priority to DE112019000222.8T priority Critical patent/DE112019000222A5/en
Publication of WO2019166503A2 publication Critical patent/WO2019166503A2/en
Publication of WO2019166503A3 publication Critical patent/WO2019166503A3/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40006—Architecture of a communication node
    • H04L12/40019—Details regarding a bus master
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L61/00—Network arrangements, protocols or services for addressing or naming
    • H04L61/50—Address allocation
    • H04L61/5038—Address allocation for local use, e.g. in LAN or USB networks, or in a controller area network [CAN]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L2012/40208—Bus networks characterized by the use of a particular bus standard
    • H04L2012/40234—Local Interconnect Network LIN

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Debugging And Monitoring (AREA)
  • Small-Scale Networks (AREA)

Abstract

The invention relates to a data bus system comprising bus nodes (SL1, SL2, SL2) for a serial data bus, each of which has a bus shunt resistor (R2) which is respectively inserted into the data bus. Furthermore, they should have an addressing current source (Iq1, Iq2, Iq2) for determining the bus position of the bus node in the data bus, which can additionally feed an addressing current in a regulated manner into the data bus in such a way that the total current (i1, i2, i3) through the bus shunt resistor (R2) of the bus node (SL1, SL2, SL3) corresponds to a predetermined or calculated or otherwise determined total current (Iref). The regulation is carried out via said control circuit (R2, D1, D3, F, Iq1, Iq2, Iq3). In this case, the addressing current flows through the bus shunt resistor (R2) of the relevant autoaddressing bus node. A variant of the proposed bus node has means (R2, D1) in order to detect the current through the bus shunt resistor (R2), which can comprise the detection of a measurement value. This detected current through the bus shunt resistor (R2) can be used for a self-test in such a way that the errors described above (for example bus shunt resistor rupture) can be detected. In a particularly preferred variant of the autoaddressing bus node, the addressing current source (Iq1, Iq2, Iq2) increases the addressing current with a first time constant (τ1) and decreases it with a second time constant (τ2) which is smaller than the first time constant (τ1).
PCT/EP2019/054887 2018-02-27 2019-02-27 Data bus system and allocation of bus addresses in such a data bus system WO2019166503A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE112019000222.8T DE112019000222A5 (en) 2018-02-27 2019-02-27 Data bus system and assignment of bus addresses in such a data bus system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102018104489.5 2018-02-27
DE102018104489.5A DE102018104489A1 (en) 2018-02-27 2018-02-27 Self-testable bus system and use of this self-test capability for the assignment of bus node addresses with possibility of mixing

Publications (2)

Publication Number Publication Date
WO2019166503A2 WO2019166503A2 (en) 2019-09-06
WO2019166503A3 true WO2019166503A3 (en) 2019-10-24

Family

ID=65724360

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2019/054887 WO2019166503A2 (en) 2018-02-27 2019-02-27 Data bus system and allocation of bus addresses in such a data bus system

Country Status (2)

Country Link
DE (2) DE102018104489A1 (en)
WO (1) WO2019166503A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3703344B1 (en) 2019-02-27 2021-05-12 Elmos Semiconductor SE Method for providing the possibility of checking the correctness of addresses previously allocated to bus nodes of a serial data bus system
DE102020113332A1 (en) 2020-05-18 2021-11-18 Elmos Semiconductor Se Downwardly compatible bus system with low bus resistance with the ability to assign bus node addresses using AMR or GMR measuring equipment
US20220043135A1 (en) * 2020-08-05 2022-02-10 Rockwell Automation Technologies, Inc. Automatic device ordering
CN113949692A (en) * 2021-09-27 2022-01-18 北京三快在线科技有限公司 Address allocation method and device, electronic equipment and computer readable storage medium
CN114017118B (en) * 2021-10-12 2023-11-03 天地（常州）自动化股份有限公司 Multifunctional addressing device and addressing method for multi-loop mining explosion-proof switch
CN115086278B (en) * 2022-08-19 2022-10-28 上海泰矽微电子有限公司 LIN bus system and automatic addressing method of slave machines thereof
CN115150222B (en) * 2022-09-02 2022-12-16 上海泰矽微电子有限公司 Method and system for automatically distributing node address by LIN bus and SOC
DE102022210907B3 (en) 2022-10-14 2024-01-11 Elmos Semiconductor Se DATA PROCESSING DEVICE FOR CONNECTING TO A COMMUNICATIONS BUS OF A MOTOR VEHICLE AND METHOD FOR OPERATING THE DATA PROCESSING DEVICE

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040078097A1 (en) * 2001-02-26 2004-04-22 Christophe Bruzy Method of identifying nodes in a computer network in a motor vehicle air conditioning installation
DE102010026431A1 (en) * 2010-07-06 2012-01-12 Jörg Hartzsch Method for dispatching address of control device e.g. parking sensor to bus system, involves stopping supply of additional power to control devices so that device current increases up to maximum current only
EP2717547A2 (en) * 2012-10-02 2014-04-09 Melexis Technologies NV Method for addressing the participants of a bus system

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10147512B4 (en) * 2001-09-26 2004-08-26 Elmos Semiconductor Ag Method for addressing the participants in a bus system
EP1490772B1 (en) * 2002-05-02 2005-06-01 ELMOS Semiconductor AG Method for addressing the users of a bus system by means of identification flows
US8122159B2 (en) * 2009-01-16 2012-02-21 Allegro Microsystems, Inc. Determining addresses of electrical components arranged in a daisy chain
US9331866B2 (en) * 2012-04-20 2016-05-03 Nxp B.V. Network communications apparatus, system, and method
CN103386735B (en) 2012-05-08 2016-11-23 贝尔罗斯(广州)电子部件有限公司 A kind of method forming integral component and the integral component formed
US9609928B2 (en) 2014-03-22 2017-04-04 Samantha Larue Gerdes Concealed carry purse
US9588155B2 (en) * 2014-10-16 2017-03-07 Freescale Semiconductor, Inc. Current detection circuit with over-current protection
DE102017122365B3 (en) * 2017-09-26 2018-07-19 Elmos Semiconductor Aktiengesellschaft Self-testable bus system and use of this self-test capability for assigning bus node addresses

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040078097A1 (en) * 2001-02-26 2004-04-22 Christophe Bruzy Method of identifying nodes in a computer network in a motor vehicle air conditioning installation
DE102010026431A1 (en) * 2010-07-06 2012-01-12 Jörg Hartzsch Method for dispatching address of control device e.g. parking sensor to bus system, involves stopping supply of additional power to control devices so that device current increases up to maximum current only
EP2717547A2 (en) * 2012-10-02 2014-04-09 Melexis Technologies NV Method for addressing the participants of a bus system

Also Published As

Publication number Publication date
DE102018104489A1 (en) 2019-08-29
WO2019166503A2 (en) 2019-09-06
DE112019000222A5 (en) 2020-08-27

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