WO2019136975A1

WO2019136975A1 - Wear leveling method and device for nonvolatile memory

Info

Publication number: WO2019136975A1
Application number: PCT/CN2018/099754
Authority: WO
Inventors: 许豪江; 李庭育; 魏智汎; 黄中柱
Original assignee: 江苏华存电子科技有限公司
Priority date: 2018-01-12
Filing date: 2018-08-09
Publication date: 2019-07-18
Also published as: CN107918530A

Abstract

Disclosed in the present invention are a wear leveling method and device for a nonvolatile memory, comprising a host, an address converter and a nonvolatile memory device, wherein the host is connected to the address converter by means of a bus, the address converter is connected to the nonvolatile memory device by means of a bus, and the address converter is configured to convert a logical address from the host to a physical address of a physical block pointing to the nonvolatile memory. The address converter comprises a memory which stores mapping information between the logic and the physical block. With the present invention, the durability of a nonvolatile storage device provided with the nonvolatile memory may be adjusted under the same hardware configuration.

Description

Wear leveling method and device for non-volatile memory

Technical field

The present invention relates to the field of memory technologies, and in particular, to a wear leveling method and apparatus for a nonvolatile memory.

Background technique

Non-volatile memory devices such as solid state drives or USB flash drives have an internal mapping table to represent the physical address from the received logical address to the internal non-volatile memory. In order to evenly wear the physical blocks of each non-volatile memory, the host may need more time to write addresses other than the specific logical block address at runtime. As shown in Figure 1, a logical address is translated from the host to the physical address by address translation. The physical address is used for data reading and writing of non-volatile memory such as flash memory. The address translator can include memory that stores the logical address mapped physical address required for address translation.

Storing mapped memory is critical to cost. Larger memory increases costs. Moreover, if the size of the memory is not large enough, all image data cannot be obtained at one time. So if the memory storage capacity is insufficient, you can create a window to solve this problem.

The non-volatile memory device is divided into a plurality of block groups and distinguishes different components into different windows. For example, the wear leveling algorithm first processes block group 0, and the memory only stores the map data of window 1. Therefore, the size of the memory can be fixed, even if there is a large non-volatile memory to increase the amount of mapping. However, this method only makes the number of writes/erases of the same window consistent and the windows are still uneven.

Summary of the invention

SUMMARY OF THE INVENTION An object of the present invention is to provide a wear leveling method and apparatus for a nonvolatile memory to solve the problems set forth in the above background art.

In order to achieve the above object, the present invention provides the following technical solution: a wear leveling device for a nonvolatile memory, including a host, an address converter, and a nonvolatile memory device, wherein the host is connected to an address converter via a bus, An address translator is coupled to the non-volatile memory device via a bus, the address converter being configured to convert a logical address from the host to a physical address of a physical block directed to the non-volatile memory; the address translator including storage logic A memory that maps information between physical blocks.

Preferably, the non-volatile memory device is divided into a window and a gap, and there is a gap between every two adjacent windows; the window includes a physical block image to a logical address, and the gap includes a physics not mapped to a logical address Piece.

Preferably, the window further includes a free physical block that is not mapped to a logical address; the physical block moves to a front window of the free physical block when the window bandwidth is changed, and when converted, the pointer to the free physical block is changed to point to the physical block.

Preferably, a method of a wear leveling device for a non-volatile memory, comprising the steps of:

A, non-volatile memory is divided into four windows, window 0, window 1, window 2 and window 3; the window does not occupy all non-volatile memory, and window 0 and window 1, window 1 and window 2, window There is a gap between 2 and window 3 and between window 3 and window 0;

B, window 0 moves on its boundary to contact with window 1, that is, the gap between window 0 and window 1 is eliminated;

C, then window 3 is shifted to the right, window 2 and window 1 are shifted at the appropriate time, and as a result all windows are shifted to the right by a gap;

D, the shift can be repeated, so part of window 3 moves to the non-volatile memory of window 0; after all the windows are shifted, the window rotates or runs through the entire non-volatile memory for one cycle and returns to their original The location; if a window is written or erased more than a predetermined number of times, the window moves again.

An advantage of the present invention over the prior art is that the present invention is capable of adjusting the durability of a non-volatile memory device having a non-volatile memory in the same hardware configuration.

DRAWINGS

Figure 1 is a schematic view of the overall structure of the present invention;

Figure 2 is a flow chart of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

Referring to FIG. 1-2, the present invention provides a technical solution: a wear leveling device for a non-volatile memory, including a host 1, an address converter 2, and a non-volatile memory device 3, the host 1 passing through a bus An address converter 2 is connected, which is connected to a non-volatile memory device 3 via a bus, the address converter 2 being configured to convert a logical address from the host 1 into a physical block directed to the non-volatile memory Physical address; the address converter 2 includes a memory 4 that stores mapping information between logical and physical blocks; the non-volatile memory device is divided into windows and gaps, and there is a gap between each two adjacent windows; The window includes a physical block map to a logical address, and the gap includes a physical block that is not mapped to a logical address; the window is transferred to a non-volatile memory in which the physical block in the window to be moved The mapping is converted to some or all of the physical blocks in the gap; the logical address of the physical block pointing to the shifting window is changed to point to the physical block in the gap when switching; Further comprising a free physical block is not mapped to the logical address; the bandwidth of the physical blocks in the window of the front window to move free physical blocks, when the conversion, the points of free physical block pointer is changed to point to the physical blocks.

In the present invention, a method of a wear leveling device for a nonvolatile memory includes the following steps:

The window is moved to the entire non-volatile memory at least once before the erasure/program durability of the non-volatile memory device of the non-volatile memory fails. In practice, durability can be predicted or pre-erased/written. According to the present invention, window shifting does not move the entire window data, but moves the window by changing a small number of mappings.

According to current flash operations, one physical block can indicate a logical address of 0-255, and a logical address of the next physical block of 256-511 can be indicated. This mapping can vary depending on the new flash memory. However, an example of a logical address pointing to a physical block is as follows. For a multi-level cell flash with 4096 physical blocks of 5000 program/erase cycles, each window includes 1022 physical blocks, each gap including 2 physical blocks 1022 and physical blocks 1023. Logical address 0 is mapped to physical block 1021, logical address 1 is mapped to physical block 2, logical address 2 is mapped to physical block 0, and logical address 1021 is mapped to physical block 1. After window 0 is programmed and/or erased a predetermined number of times, for example, window 0 has been programmed and/or erased 2400 times, window 0 will be shifted by 2 blocks. Logical address 0 is mapped to physical block 1021, logical address 1 is mapped to physical block 2, logical address 2 is mapped to physical block 0, and logical address 1021 is mapped to physical block 1. After window 0 is written or erased a predetermined number of times, for example, the window has been written or erased 2400 times, window 0 will be shifted by 2 blocks. According to the present invention, if the amount of physical quantity is insufficient and/or written in the window, the shifting continues. After the shift, the logical addresses 2 and 1021 originally mapped to the physical block 0 and the physical block 1 are changed to the physical block 1023 mapped to the physical block 1022 and the blank, and the other mappings are not changed. For example, logical address 1 is initially mapped to physical block 2, and after shifting, logical address 1 is still mapped to physical block 2. In other words, the data of physical block 2 is not moved or changed. Therefore, the data movement is only two physical blocks, so the impact on performance is negligible; in step 1, the window for generating the corresponding physical address is obtained, and in step 2, the number of writes or erasures of the flash memory to the inspection window of step 3 is erased. Go to the moving line and move the window.

In addition, the increase in gap size has further advantages, especially in terms of customization. For example, if 25 physical blocks are damaged, the flash memory has a window of 1000 logical addresses corresponding to 1024 physical blocks, and it does not work normally. However, if there are too many failed blocks, the window may move when there is a gap until the window contains more than 1000 available physical blocks in the window.

The present invention is capable of adjusting the durability of a non-volatile memory device having a non-volatile memory in the same hardware configuration.

While the embodiments of the present invention have been shown and described, it will be understood by those skilled in the art The scope of the invention is defined by the appended claims and their equivalents.

Claims

A wear leveling device for a non-volatile memory, comprising a host (1), an address converter (2) and a non-volatile memory device (3), characterized in that: the host (1) is converted by a bus connection address (2), the address converter (2) is connected to the non-volatile memory device (3) via a bus, the address converter (2) being configured to convert the logical address from the host (1) to point non- The physical address of the physical block of the volatile memory; the address translator (2) includes a memory (4) that stores mapping information between the logical and physical blocks.
A wear leveling device for a nonvolatile memory according to claim 1, wherein said nonvolatile memory device is divided into a window and a gap, and a gap is formed between each two adjacent windows; The window includes a physical block map to a logical address, and the gap includes physical blocks that are not mapped to logical addresses.
A wear leveling apparatus for a nonvolatile memory according to claim 2, wherein said window further comprises a free physical block that is not mapped to a logical address; and the physical block is before the window bandwidth is changed to a free physical block The window is shifted, and when converted, the pointer to the free physical block is changed to point to the physical block.
A method for implementing a wear leveling device for a nonvolatile memory according to claim 1, comprising the steps of:

A, non-volatile memory is divided into four windows, window 0, window 1, window 2 and window 3; the window does not occupy all non-volatile memory, and window 0 and window 1, window 1 and window 2, window There is a gap between 2 and window 3 and between window 3 and window 0;

B, window 0 moves on its boundary to contact with window 1, that is, the gap between window 0 and window 1 is eliminated;

C, then window 3 is shifted to the right, window 2 and window 1 are shifted at the appropriate time, and as a result all windows are shifted to the right by a gap;

D, the shift can be repeated, so part of window 3 moves to the non-volatile memory of window 0; after all the windows are shifted, the window rotates or runs through the entire non-volatile memory for one cycle and returns to their original The location; if a window is written or erased more than a predetermined number of times, the window moves again.