WO2019129167A1 - 一种处理数据报文的方法和网卡 - Google Patents

一种处理数据报文的方法和网卡 Download PDF

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Publication number
WO2019129167A1
WO2019129167A1 PCT/CN2018/124560 CN2018124560W WO2019129167A1 WO 2019129167 A1 WO2019129167 A1 WO 2019129167A1 CN 2018124560 W CN2018124560 W CN 2018124560W WO 2019129167 A1 WO2019129167 A1 WO 2019129167A1
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Prior art keywords
network card
processed
data packet
data message
integrated circuit
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PCT/CN2018/124560
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English (en)
French (fr)
Inventor
姚益民
高俊恩
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华为技术有限公司
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Publication of WO2019129167A1 publication Critical patent/WO2019129167A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/46—Interconnection of networks
    • H04L12/4633—Interconnection of networks using encapsulation techniques, e.g. tunneling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/46—Interconnection of networks
    • H04L12/4641—Virtual LANs, VLANs, e.g. virtual private networks [VPN]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9005—Buffering arrangements using dynamic buffer space allocation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9057—Arrangements for supporting packet reassembly or resequencing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L61/00—Network arrangements, protocols or services for addressing or naming
    • H04L61/09—Mapping addresses
    • H04L61/10—Mapping addresses of different types
    • H04L61/103—Mapping addresses of different types across network layers, e.g. resolution of network layer into physical layer addresses or address resolution protocol [ARP]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L61/00—Network arrangements, protocols or services for addressing or naming
    • H04L61/09—Mapping addresses
    • H04L61/25—Mapping addresses of the same type
    • H04L61/2503—Translation of Internet protocol [IP] addresses
    • H04L61/2592—Translation of Internet protocol [IP] addresses using tunnelling or encapsulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/02—Protocol performance
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/16—Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
    • H04L69/161—Implementation details of TCP/IP or UDP/IP stack architecture; Specification of modified or new header fields

Definitions

  • the present application relates to the field of communications, and in particular, to a method and a network card for processing a data message.
  • a hardware offloading technology of the network card is developed.
  • the offloading technology of the network card offloads the work that needs to be processed by the CPU to the network card, and is processed by the network card.
  • a network card with an offloading function needs to re-spin an application specific integrated circuit (ASIC) chip, which has a long period of time, large investment, and poor flexibility.
  • ASIC application specific integrated circuit
  • RISC Reduced Instruction Set Computer
  • ARM Acorn RISC Machine
  • the embodiment of the present invention provides a method for processing a data packet and a network card, which can solve the problem that the load of the CPU cannot be well reduced due to limited performance of the network card.
  • the embodiment of the present application provides a method for processing a data packet, which is applied to a network card, where the network card includes an acceleration interface, and the acceleration interface is connected to the programmable integrated circuit, and the method includes: the network card receiving the data packet to be processed; The network card forwards the data message to be processed to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data message to be processed according to a preset policy; the network card receives the programmable integrated circuit and returns through the acceleration interface. The processed data message; the network card sends the processed data message. Compared with the prior art, the network card processes the data message through the integrated processor.
  • the embodiment of the present application can forward the data message to be processed to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data to be processed according to a preset policy.
  • the message can reduce the load on the CPU.
  • the preset policy can be flexibly configured according to the application scenario of the network card.
  • the acceleration interface is independent of the system side interface and the line side interface, and is dedicated to signal communication between the network card and the programmable integrated circuit, and does not affect the functions of the system side interface and the line side interface.
  • the method further includes: when the network card receives the data message to be processed from the line side interface, The network card determines that the data packet to be processed has a corresponding relationship with the protocol keyword in the policy list stored on the network card. When the network card receives the data packet to be processed from the system side interface, the network card determines the data packet to be processed. Match the flow table stored on the NIC. Therefore, before forwarding the data packet to be processed to the programmable integrated circuit, the network card can determine whether the data packet to be processed meets the preset condition, and the preset condition includes the data packet to be processed and the network card.
  • the protocol keywords in the policy list have a corresponding relationship, or the data packets to be processed match the flow table stored on the network card.
  • the data packet to be processed satisfies the preset condition, the data packet to be processed is forwarded to the programmable integrated circuit through the acceleration interface, which can better satisfy the high performance and needs to provide a programmable acceleration capability.
  • the network card determines that the data packet to be processed has a corresponding relationship with the protocol keyword in the policy list stored on the network card, including: the network card acquires a protocol keyword of the data packet to be processed; and the network card determines the network card. Whether the protocol keyword of the data packet to be processed exists in the stored policy list; if the network card determines that the protocol keyword of the data packet to be processed exists in the policy list stored on the network card, the network card determines the data packet to be processed and The protocol keywords in the policy list stored on the NIC have a corresponding relationship.
  • the network card determines that there is a protocol key of the data message to be processed in the policy list stored on the network card, the network card forwards the data message to be processed to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit
  • the processing of the data packets to be processed according to the preset policy can better meet the high performance and the scenario of providing programmable acceleration capability.
  • the network card determines that the data packet to be processed matches the flow table stored on the network card, where the network card obtains the header information of the data packet to be processed, and the network card determines whether the packet header field of the flow table matches the pending The header information of the data packet; if the network card determines that the header field of the flow table matches the header information of the data packet to be processed, the network card determines that the data packet to be processed matches the flow table stored on the network card. Therefore, if the network card determines that the data message to be processed matches the flow table stored on the network card, the network card is forwarded to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data message to be processed according to a preset policy. It can better meet high performance and needs to provide programmable acceleration capabilities.
  • the method further includes: when the network card receives the data message to be processed from the line side interface, the network card determines a protocol key in the data message to be processed and the policy list stored on the network card. If the NIC receives the data packet to be processed from the system side interface, the network card determines that the data packet to be processed does not match the flow table stored on the network card; the network card processes the data packet to be processed. Therefore, if the network card determines that the data packet to be processed does not match the flow table stored on the network card, the network card can process the data packet to be processed, which can save the overhead of forwarding the data packet to the programmable integrated circuit, and can satisfy the requirement.
  • General performance requirements are examples of the data packet to be processed from the line side interface.
  • the programmable integrated circuit is connected to the storage device, and the storage device is used to buffer the data message to be processed, which can enhance the processing performance of the programmable integrated circuit.
  • the embodiment of the present application provides a network card, including: a receiving unit, configured to receive a data message to be processed; and an acceleration interface, configured to forward the data message to be processed to a programmable integrated circuit, so that The programmed integrated circuit processes the data message to be processed according to a preset policy; the receiving unit is further configured to receive the processed data message returned by the programmable integrated circuit through the acceleration interface; and the sending unit is configured to send the processed data message Data message.
  • the determining unit further includes: determining, in the case that the network card receives the data packet to be processed from the line side interface, the data packet to be processed and the policy list stored on the network card
  • the protocol keyword has a corresponding relationship.
  • the determining unit is configured to: obtain a protocol keyword of the data message to be processed; and determine a policy list stored on the network card. Whether there is a protocol keyword of the data packet to be processed; if it is determined that the protocol keyword of the data packet to be processed exists in the policy list stored on the network card, the data packet to be processed is determined in the policy list stored on the network card.
  • the protocol keywords have a corresponding relationship.
  • the determining unit when the network card receives the data message to be processed from the system side interface, the determining unit is configured to: obtain the header information of the data packet to be processed; and determine whether the header field of the flow table is Matching the header information of the data packet to be processed; if it is determined that the header field of the flow table matches the header information of the data packet to be processed, it is determined that the data packet to be processed matches the flow table stored on the network card.
  • the processing unit is further configured to: when the network card receives the data packet to be processed from the line side interface, determine, by the determining unit, the data packet to be processed and the policy stored on the network card.
  • the protocol keyword in the list does not have a corresponding relationship; or when the network card receives the data packet to be processed from the system side interface, the determining unit determines that the data packet to be processed does not match the flow table stored on the network card; Data message.
  • the programmable integrated circuit is connected to the storage device, and the storage device is used to cache the data message to be processed.
  • an embodiment of the present invention provides a network card, where the network card exists in a product form of a chip.
  • the network card includes a processor and a memory, where the memory is used to couple with a processor, and save necessary program instructions of the network card.
  • the processor is configured to execute program instructions stored in the memory, such that the network card performs the function of the network card in the above method.
  • an embodiment of the present invention provides a network card, where the network card can implement the functions performed by the network card in the foregoing method, and the functions can be implemented by using hardware or by executing corresponding software through hardware.
  • the hardware or software includes one or more modules corresponding to the above functions.
  • the structure of the network card includes a processor and a communication interface configured to support the network card to perform the corresponding functions in the above method.
  • the communication interface is used to support communication between the network card and other network elements.
  • the network card can also include a memory for coupling with the processor that retains the necessary program instructions and data for the network card.
  • an embodiment of the present invention provides a network card readable storage medium, including instructions, when the network card is running on the network card, causing the network card to perform any one of the methods provided by the first aspect.
  • an embodiment of the present invention provides a program product including an instruction, when the network card is running on the network card, causing the network card to perform any one of the methods provided by the first aspect.
  • the network card processes the data message through the integrated processor. Due to the limited processing power and programmable resources of the internal integrated processor, the performance of the network card is limited, so that the load of the CPU cannot be well reduced.
  • the embodiment of the present application can forward the data message to be processed to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data to be processed according to a preset policy.
  • the message can reduce the load on the CPU.
  • the preset policy can be flexibly configured according to the application scenario of the network card.
  • the acceleration interface is independent of the system side interface and the line side interface, and is dedicated to signal communication between the network card and the programmable integrated circuit, and does not affect the functions of the system side interface and the line side interface.
  • FIG. 1 is a schematic structural diagram of a system according to an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of an internal structure of a network card according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of connection of a network card, a programmable integrated circuit, and a storage device according to an embodiment of the present application;
  • FIG. 4 is a schematic flowchart of a method for processing a data packet according to an embodiment of the present disclosure
  • FIG. 5 is a schematic flowchart of a method for processing a data packet according to an embodiment of the present disclosure
  • FIG. 6 is a schematic structural diagram of a network card according to an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a network card according to an embodiment of the present application.
  • the line side interface that is, the interface used by the network card to receive data packets sent by other network devices.
  • the line side interface is, for example but not limited to, a small form factor-factor (SFP) interface, a quad small form-factor pluggable (QSFP) interface, or a KR interface.
  • SFP small form factor-factor
  • QSFP quad small form-factor pluggable
  • KR KR interface
  • the system-side interface that is, the interface that the network card uses to receive data packets sent by the CPU.
  • the system side interface is, for example but not limited to, an extended Peripheral Component Interconnect Express (PCI) interface.
  • PCI Peripheral Component Interconnect Express
  • the acceleration interface independent of the line side interface and the system side interface, can be used to connect programmable integrated circuits.
  • the acceleration interface is, for example but not limited to, a PCIe interface, a Cache Coherent Interconnect for Accelerators (CCIX) interface, a QSFP interface, a 40G Parallel Physical Interface (XLPPI) interface, or a QSFP interface.
  • the embodiment of the present invention provides a method for processing a data packet and a network card, which can be applied to a processing scenario of various data packets or data packets.
  • TCP Transmission Control Protocol
  • IP Internet Protocol
  • Checksum Checksum
  • IPsec IP Security
  • TLS Secure Transport Layer Protocol
  • VQ virtual machine Queue
  • RSS Receiveive Side Scaling
  • NVGRE Routing Encapsulation
  • VXLAN Virtual eXtensible Local Area Network
  • GEMVE Generic Network Virtualization Encapsulation
  • Remote Direct Memory Access Remote Direct Memory Access
  • RDMA Remote Direct Memory Access
  • DPDK data plane development kit
  • OpenvSwitch OpenvSwitch
  • OVS open source virtual switch
  • Cloud hard disk Elastic Volume Service
  • a schematic diagram of a system architecture provided by an embodiment of the present application includes a network device and an external device (for example, a switch).
  • the network device includes a network card, a memory, and a CPU.
  • the network card can receive data packets sent by the switch from the line side interface, or receive data packets sent by the CPU from the system side interface.
  • FIG. 2 is a schematic diagram showing the internal structure of a network card according to an embodiment of the present application.
  • the system-side interface provided by the network card is used to connect a host device (host device) such as a CPU.
  • the line side interface provided by the NIC is used to connect to the switch or other network card.
  • the network card provides functional modules such as a physical layer, a media access control (MAC) layer, and a buffer (BUFFER).
  • the network card can provide a function module such as a queue, a sending engine, and a receiving engine.
  • the network card provides a built-in processor for implementing internal resource management, scheduling, and network card function programming of the network card.
  • the network card provides a memory interface, such as a double rate synchronous dynamic random access memory (DDR) interface, for extending the chip BUFFER.
  • DDR double rate synchronous dynamic random access memory
  • the network card includes an acceleration interface for connecting to a programmable integrated circuit.
  • the network card can forward the data message to be processed to the programmable integrated circuit, so that the programmable integrated circuit processes the data message to be processed according to a preset policy.
  • a programmable integrated circuit is coupled to a storage device for buffering data messages to be processed.
  • the acceleration interface is independent of the system side interface or the line side interface, that is, the acceleration interface does not affect the functions of the existing system side interface or the line side interface.
  • the embodiment of the present application provides a method for processing a data packet, and the network card receives the data packet to be processed from the line side interface as an example. As shown in FIG. 4, the method includes:
  • the network card receives a data packet to be processed from the line side interface.
  • the network card receives the data packet to be processed sent by the external device from the line side interface.
  • the data packet to be processed may be a data packet encapsulated according to the IPSec protocol.
  • the data packet encapsulated by the IPSec packet is an encrypted data packet and needs to be decrypted.
  • the network card determines whether the data packet to be processed has a correspondence relationship with a protocol keyword in a policy list stored on the network card.
  • the network card obtains a protocol keyword of the data packet to be processed; the network card determines whether there is a protocol keyword of the data packet to be processed in the policy list stored on the network card; if the network card determines that the policy list stored on the network card exists The protocol key of the processed data packet, the network card determines that the data packet to be processed has a corresponding relationship with the protocol keyword in the policy list stored on the network card.
  • the policy list stored on the network card may include multiple protocol keywords, and the protocol keywords are used to indicate the protocol type, as shown in Table 1:
  • the protocol key of the data message to be processed indicates the protocol type of the data packet to be processed.
  • the protocol keyword of the data packet may be of an IPSec type.
  • the network card determines that the protocol keyword in the policy list stored on the network card includes the IPSec type, the network card determines that the data packet to be processed has a corresponding relationship with the protocol keyword in the policy list stored on the network card.
  • steps 403, 404, and 406 are performed.
  • steps 405 and 406 are performed.
  • the network card forwards the data message to be processed to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data message to be processed according to a preset policy.
  • the programmable integrated circuit may include a Field-Programmable Gate Array (FPGA), an ASIC, or a Programmable Logic Device (PLD), which is not limited in this application.
  • FPGA Field-Programmable Gate Array
  • ASIC ASIC
  • PLD Programmable Logic Device
  • the data message to be processed can be processed according to a preset policy.
  • the preset policy can be flexibly configured according to the application scenario of the network card. For example, when the data message to be processed is an IPSec-encapsulated data message, the programmable integrated circuit can decrypt the IPSec-encapsulated data message.
  • the programmable integrated circuit supports an external storage device, and the storage device can cache the data packet to be processed.
  • the storage device may be a random access memory (RAM), a dynamic random access memory (DRAM), an Erasable Programmable Read Only Memory (EPROM), or the like. One or more of them are not limited in this application.
  • the network card receives the processed data message returned by the programmable integrated circuit through the acceleration interface.
  • the processed data message can be returned to the network card, so that the network card sends the processed data message to the CPU.
  • the network card processes the data packet to be processed.
  • the network card determines that the data packet to be processed does not correspond to the protocol keyword in the policy list stored on the network card, the network card does not send the data packet to be processed to the programmable integrated circuit, and the network card can process the pending processing by itself. Data message.
  • the network card may not send the data packet to be processed to the programmable integrated circuit, and the network card may process the data packet to be processed by itself.
  • the network card sends the processed data packet.
  • the network card can send the processed data message to the CPU through the PCIe interface, so that the CPU can further process the processed data message.
  • the network card can generate an interrupt, and the processed data message is sent to the memory managed by the CPU through direct memory access (DMA).
  • DMA direct memory access
  • the network card processes the data message through the integrated processor. Due to the limited processing power and programmable resources of the internal integrated processor, the performance of the network card is limited, so that the load of the CPU cannot be well reduced.
  • the embodiment of the present application can forward the received data message to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data message to be processed according to a preset policy, thereby reducing the CPU. load.
  • the preset policy can be flexibly configured according to the application scenario of the network card.
  • the acceleration interface is independent of the system side interface and the line side interface, and is dedicated to signal communication between the network card and the programmable integrated circuit, and does not affect the functions of the system side interface and the line side interface.
  • the network card when the network card receives the data message to be processed from the line side interface, the network card determines whether the data message to be processed has a corresponding relationship with the protocol keyword in the policy list stored on the network card. If the network card determines that the data packet to be processed has a corresponding relationship with the protocol keyword in the policy list stored on the network card, the network card is forwarded to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data according to the preset policy.
  • the processed data message can better meet the high performance and needs to provide programmable acceleration capability.
  • the network card determines that the data packet to be processed does not correspond to the protocol keyword in the policy list stored on the network card, the network card processes the data packet to be processed by itself, thereby saving the overhead of forwarding the data packet to the programmable integrated circuit. Can meet the general performance requirements.
  • a further embodiment of the present application provides a method for processing a data packet, and the network card receives the data packet to be processed from the system side as an example. As shown in FIG. 5, the method includes:
  • the network card receives the data packet to be processed from the system side interface.
  • the network card receives the data packet to be processed sent by the CPU from the system side interface.
  • the data packet to be processed may be a data packet that needs to be encapsulated by the IPSec protocol, that is, the data packet to be processed needs to be encrypted.
  • the network card determines whether the data packet to be processed matches the flow table stored on the network card.
  • the network card obtains the header information of the data packet to be processed; the network card determines whether the packet header field of the flow table matches the header information of the data packet to be processed; if the network card determines that the packet header field of the flow table matches the to-be-processed datagram The header information of the text, the network card determines that the data packet to be processed matches the flow table stored on the network card.
  • the header field of the flow table stored on the network card may include an output port, a transport protocol, and a destination IP address, as shown in Table 2:
  • the header information of the data packet to be processed includes an output port, a transmission protocol, and a destination IP address corresponding to the data packet to be processed.
  • the network card determines that the network card determines that the output port corresponding to the data packet to be processed is port 1 and the destination IP address is 223.255.14.151.
  • the transmission protocol of the processed data packet is IPSec, so that the data packet to be processed matches the flow table stored on the network card.
  • steps 503, 504, and 506 are performed.
  • steps 505 and 506 are performed.
  • the network card forwards the data message to be processed to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data message to be processed according to a preset policy.
  • the programmable integrated circuit may be an FPGA, an ASIC, or a PLD, which is not limited in this application.
  • the data message to be processed can be processed according to a preset policy.
  • the programmable integrated circuit can encrypt the data packet to be processed.
  • the programmable integrated circuit supports an external storage device, and the storage device can cache the data packet to be processed.
  • the storage device may be a RAM, a DRAM, an EPROM, etc., which is not limited in this application.
  • the network card receives the processed data message returned by the programmable integrated circuit through the acceleration interface.
  • the processed data packet can be returned to the network card, so that the network card sends the processed data packet to the external device or the CPU.
  • the network card processes the data packet to be processed.
  • the network card determines that the data packet to be processed does not match the stream stored on the network card, the network card does not send the data packet to be processed to the programmable integrated circuit, and the network card can process the data packet to be processed by itself.
  • the network card sends the processed data packet.
  • the network card can directly forward the processed data packet to the external device through the line side interface.
  • the network card processes the data message through the integrated processor. Due to the limited processing power and programmable resources of the internal integrated processor, the performance of the network card is limited, so that the load of the CPU cannot be well reduced.
  • the embodiment of the present application can forward the received data message to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data message to be processed according to a preset policy, thereby reducing the CPU. load.
  • the preset policy can be flexibly configured according to the application scenario of the network card.
  • the acceleration interface is independent of the system side interface and the line side interface, and is dedicated to signal communication between the network card and the programmable integrated circuit, and does not affect the functions of the system side interface and the line side interface.
  • the network card when the network card receives the data packet to be processed from the line side interface, the network card determines whether the data packet to be processed matches the flow table stored on the network card, and if the network card determines the datagram to be processed.
  • the text matches the flow table stored on the network card, and the network card is forwarded to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data message to be processed according to the preset policy, which can better meet the high performance and needs to be provided.
  • Programmable acceleration capability scenario when the network card receives the data packet to be processed from the line side interface, the network card determines whether the data packet to be processed matches the flow table stored on the network card, and if the network card determines the datagram to be processed.
  • the text matches the flow table stored on the network card, and the network card is forwarded to the programmable integrated circuit through the acceleration interface, so that the programmable integrated circuit processes the data message to be processed according to the preset policy, which can better meet the high performance and needs to be
  • the network card determines that the data packet to be processed does not match the flow table stored on the network card, the network card processes the data packet to be processed by itself, which can save the overhead of forwarding the data packet to the programmable integrated circuit, and can meet the general performance requirements.
  • the network card includes corresponding hardware structures and/or software modules for performing various functions.
  • the present application can be implemented in hardware or a combination of hardware and software in combination with the algorithm steps described in the embodiments disclosed herein. Whether a function is implemented in hardware or software-driven hardware depends on the specific application and design constraints of the solution. A person skilled in the art can use different methods to implement the described functions for each particular application, but such implementation should not be considered to be beyond the scope of the present application.
  • the embodiment of the present application may divide the function module into the network card according to the foregoing method example.
  • each function module may be divided according to each function, or two or more functions may be integrated into one processing module.
  • the above integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of the module in the embodiment of the present application is schematic, and is only a logical function division, and the actual implementation may have another division manner.
  • FIG. 6 is a schematic diagram showing a possible structure of the network card 6 involved in the foregoing embodiment.
  • the network card includes: a receiving unit 601, an acceleration interface 602, and a sending unit 603.
  • the receiving unit 601 is configured to support the network card to perform the processes 401 and 404 in FIG. 4, the processes 501 and 504 in FIG.
  • the determining unit 604 is configured to support the network card to perform the process 402 in FIG. 4, the process 502 in FIG.
  • the acceleration interface 602 is used to support the network card to perform the process 403 in FIG. 4, the process 503 in FIG.
  • the sending unit 603 is configured to support the network card to perform the process 406 in FIG. 4, the process 506 in FIG.
  • the processing unit 605 is configured to support the network card to perform the process 405 in FIG. 4, the process 505 in FIG. All the related content of the steps involved in the foregoing method embodiments may be referred to the functional descriptions of the corresponding functional modules, and details are not described herein again.
  • the network card can be implemented by the network card in FIG.
  • FIG. 7 is a schematic diagram of a network card provided by an embodiment of the present application.
  • the network card 700 includes at least one processor 701, a communication bus 702, a memory 703, and at least one communication interface 704.
  • the processor 701 can be a general purpose CPU, microprocessor, ASIC, or one or more integrated circuits for controlling the execution of the program of the present application.
  • Communication bus 702 can include a path for communicating information between the components described above.
  • the communication interface 704 is used for communicating with other network cards or communication networks, such as an Ethernet, a Radio Access Network (RAN), and a Wireless Local Area Networks (WLAN).
  • network cards or communication networks such as an Ethernet, a Radio Access Network (RAN), and a Wireless Local Area Networks (WLAN).
  • RAN Radio Access Network
  • WLAN Wireless Local Area Networks
  • the memory 703 may be a Read-Only Memory (ROM) or other type of static storage device that can store static information and instructions, RAM or other types of dynamic storage devices that can store information and instructions, or may be electrically Electrically Erasable Programmable Read-Only Memory (EEPROM), Compact Disc Read-Only Memory (CD-ROM) or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, Digital versatile disc, Blu-ray disc, etc.), magnetic storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of an instruction or data structure and accessible by a network card, but is not limited to this.
  • the memory can exist independently and be connected to the processor via a bus.
  • the memory can also be integrated with the processor.
  • the memory 703 is used to store application code for executing the solution of the present application, and is controlled by the processor 701 for execution.
  • the processor 701 is configured to execute application code stored in the memory 703 to implement the functions in the method of the present application.
  • the processor 701 may include one or more CPUs, such as CPU0 and CPU1 in FIG.
  • the network card 700 may include multiple processors, such as the processor 701 and the processor 705 in FIG. Each of these processors can be a single-CPU processor or a multi-core processor.
  • a processor herein may refer to one or more devices, circuits, and/or processing cores for processing data, such as network card program instructions.
  • the network card 700 described above may be a universal network card or a dedicated network card.
  • the network card 700 can be a desktop computer, a portable computer, a server, a storage device, a network device, a personal digital assistant (PDA), a mobile phone, a tablet, a wireless terminal device, a communication device, an embedded device, or There is a device of similar construction in Figure 7.
  • the embodiment of the present application does not limit the type of the network card 700.
  • the steps of a method or algorithm described in connection with the present disclosure may be implemented in a hardware or may be implemented by a processor executing software instructions.
  • the software instructions may be comprised of corresponding software modules that may be stored in RAM, flash memory, ROM, EPROM, EEPROM, registers, hard disk, removable hard disk, read-only optical disk, or any other form of storage medium known in the art.
  • An exemplary storage medium is coupled to the processor to enable the processor to read information from, and write information to, the storage medium.
  • the storage medium can also be an integral part of the processor.
  • the processor and the storage medium can be located in an ASIC. Additionally, the ASIC can be located in a core network interface device.
  • the processor and the storage medium may also exist as discrete components in the core network interface device.
  • the functions described herein can be implemented in hardware, software, firmware, or any combination thereof.
  • the functions may be stored in a network card readable medium or transmitted as one or more instructions or code on a network card readable medium.
  • the network card readable medium includes a network card storage medium and a communication medium, wherein the communication medium includes any medium that facilitates the transfer of a network card program from one location to another.
  • the storage medium can be any available media that can be accessed by a general purpose or special purpose network card.

Abstract

一种处理数据报文的方法和网卡，涉及通信领域，能够解决网卡的性能有限导致的不能很好地降低CPU的负载的问题。该方法应用于网卡处理数据报文的过程中，网卡包括加速接口，加速接口与可编程的集成电路连接，该方法包括：网卡接收待处理的数据报文（401）；网卡通过加速接口将待处理的数据报文转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文（403）；网卡接收可编程的集成电路通过加速接口返回的处理后的数据报文（404）；网卡发送处理后的数据报文（406）。

Description

一种处理数据报文的方法和网卡 技术领域
本申请涉及通信领域，尤其涉及一种处理数据报文的方法和网卡。
背景技术
随着网络业务的快速发展，网络中的流量急剧增加，为了实现对硬件资源的充分利用，虚拟化技术和云计算得到了越来越广泛的利用，这样一来，增加了中央处理器(Central Processing Unit，CPU)的资源占用率。
为了降低CPU的负载，发展出一种网卡的硬件卸载(offloading)技术。网卡的offloading技术即将原本需要CPU进行处理的工作卸载到网卡上，由网卡进行处理。具备offloading功能的网卡需要对专有集成电路(Application Specific Integrated Circuit，ASIC)芯片重新流片，具有周期久，投入大，灵活度差等问题。
为了解决上述问题，一些厂商在网卡的ASIC芯片内部集成了精简指令集计算机(Reduced Instruction Set Computer，RISC)或ARM(Acorn RISC Machine)类型的处理器，支持一定的可编程能力。但是内部集成的处理器的处理能力和可编程资源等有限，限制了网卡的性能，从而不能很好地降低CPU的负载。
发明内容
本申请实施例提供一种处理数据报文的方法和网卡，能够解决网卡的性能有限导致的不能很好地降低CPU的负载的问题。
第一方面，本申请实施例提供一种处理数据报文的方法，应用于网卡，网卡包括加速接口，加速接口与可编程的集成电路连接，该方法包括：网卡接收待处理的数据报文；网卡通过加速接口将待处理的数据报文转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文；网卡接收可编程的集成电路通过加速接口返回的处理后的数据报文；网卡发送处理后的数据报文。相比现有技术，网卡通过内部集成的处理器处理数据报文，由于内部集成的处理器的处理能力和可编程资源等有限，限制了网卡的性能，从而不能很好地降低CPU的负载。本申请实施例可以将接收到的待处理的数据报文，通过加速接口将待处理的数据报文转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文，能够降低CPU的负载。其中，预设的策略可以根据网卡的应用场景灵活配置。同时，加速接口独立于系统侧接口和线路侧接口，专用于网卡与可编程的集成电路之间的信号通信，不影响系统侧接口和线路侧接口的功能。
在一种可能的实现方式中，网卡通过加速接口将待处理的数据报文转发到可编程的集成电路之前，该方法还包括：在网卡从线路侧接口接收待处理的数据报文的情况下，网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系；在网卡从系统侧接口接收待处理的数据报文的情况下，网卡确定待处理的数据报文匹配网卡上存储的流表。由此，网卡将待处理的数据报文转发到可编程的集成电路之前， 可以确定待处理的数据报文是否满足预设的条件，预设的条件包括待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系，或待处理的数据报文匹配网卡上存储的流表。当待处理的数据报文满足预设的条件时，通过加速接口将待处理的数据报文转发到可编程的集成电路，可以更好的满足高性能，需要提供可编程加速能力的场景。
在一种可能的实现方式中，网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系包括：网卡获取待处理的数据报文的协议关键字；网卡确定网卡上存储的策略列表中是否存在待处理的数据报文的协议关键字；若网卡确定网卡上存储的策略列表中存在待处理的数据报文的协议关键字，网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系。由此，若网卡确定网卡上存储的策略列表中存在待处理的数据报文的协议关键字，网卡通过加速接口将待处理的数据报文转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文，可以更好的满足高性能，需要提供可编程加速能力的场景。
在一种可能的实现方式中，网卡确定待处理的数据报文匹配网卡上存储的流表包括：网卡获取待处理的数据报文的头部信息；网卡确定流表的包头域是否匹配待处理的数据报文的头部信息；若网卡确定流表的包头域匹配待处理的数据报文的头部信息，网卡确定待处理的数据报文匹配网卡上存储的流表。由此，若网卡确定待处理的数据报文匹配网卡上存储的流表，网卡通过加速接口转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文，可以更好的满足高性能，需要提供可编程加速能力的场景。
在一种可能的实现方式中，该方法还包括：在网卡从线路侧接口接收待处理的数据报文的情况下，网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字没有对应关系；或在网卡从系统侧接口接收待处理的数据报文的情况下，网卡确定待处理的数据报文不匹配网卡上存储的流表；网卡处理待处理的数据报文。由此，若网卡确定待处理的数据报文不匹配网卡上存储的流表，可以由网卡处理待处理的数据报文，可以节省将数据报文转发到可编程的集成电路的开销，能够满足普通性能要求。
在一种可能的实现方式中，可编程的集成电路与存储设备连接，存储设备用于缓存待处理的数据报文，能够加强可编程的集成电路的处理性能。
第二方面，本申请实施例提供一种网卡，包括：接收单元，用于接收待处理的数据报文；加速接口，用于将待处理的数据报文转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文；接收单元，还用于接收可编程的集成电路通过加速接口返回的处理后的数据报文；发送单元，用于发送处理后的数据报文。
在一种可能的实现方式中，还包括确定单元，用于：在网卡从线路侧接口接收待处理的数据报文的情况下，确定待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系；在网卡从系统侧接口接收待处理的数据报文的情况下，确定待处理的数据报文匹配网卡上存储的流表。
在一种可能的实现方式中，在网卡从线路侧接口接收待处理的数据报文的情况下，确定单元用于：获取待处理的数据报文的协议关键字；确定网卡上存储的策略列表中 是否存在待处理的数据报文的协议关键字；若确定网卡上存储的策略列表中存在待处理的数据报文的协议关键字，确定待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系。
在一种可能的实现方式中，在网卡从系统侧接口接收待处理的数据报文的情况下，确定单元用于：获取待处理的数据报文的头部信息；确定流表的包头域是否匹配待处理的数据报文的头部信息；若确定流表的包头域匹配待处理的数据报文的头部信息，确定待处理的数据报文匹配网卡上存储的流表。
在一种可能的实现方式中，还包括处理单元，用于：在网卡从线路侧接口接收待处理的数据报文的情况下，通过确定单元确定待处理的数据报文与网卡上存储的策略列表中的协议关键字没有对应关系；或在网卡从系统侧接口接收待处理的数据报文的情况下，通过确定单元确定待处理的数据报文不匹配网卡上存储的流表；处理待处理的数据报文。
在一种可能的实现方式中，可编程的集成电路与存储设备连接，存储设备用于缓存待处理的数据报文。
第三方面，本发明实施例提供了一种网卡，该网卡以芯片的产品形态存在，该网卡的结构中包括处理器和存储器，该存储器用于与处理器耦合，保存该网卡必要的程序指令和数据，该处理器用于执行存储器中存储的程序指令，使得该网卡执行上述方法中网卡的功能。
第四方面，本发明实施例提供了一种网卡，该网卡可以实现上述方法中网卡所执行的功能，功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。硬件或软件包括一个或多个上述功能相应的模块。
在一种可能的设计中，该网卡的结构中包括处理器和通信接口，该处理器被配置为支持该网卡执行上述方法中相应的功能。该通信接口用于支持该网卡与其他网元之间的通信。该网卡还可以包括存储器，该存储器用于与处理器耦合，其保存该网卡必要的程序指令和数据。
第五方面，本发明实施例提供一种网卡可读存储介质，包括指令，当其在网卡上运行时，使得网卡执行第一方面提供的任意一种方法。
第六方面，本发明实施例提供了一种包含指令的程序产品，当其在网卡上运行时，使得网卡执行第一方面提供的任意一种方法。
相比现有技术，网卡通过内部集成的处理器处理数据报文，由于内部集成的处理器的处理能力和可编程资源等有限，限制了网卡的性能，从而不能很好地降低CPU的负载。本申请实施例可以将接收到的待处理的数据报文，通过加速接口将待处理的数据报文转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文，能够降低CPU的负载。其中，预设的策略可以根据网卡的应用场景灵活配置。同时，加速接口独立于系统侧接口和线路侧接口，专用于网卡与可编程的集成电路之间的信号通信，不影响系统侧接口和线路侧接口的功能。
附图说明
图1为本申请实施例提供的一种系统架构示意图；
图2为本申请实施例提供的一种网卡的内部结构示意图；
图3为本申请实施例提供的一种网卡、可编程的集成电路以及存储设备的连接示意图；
图4为本申请实施例提供的一种处理数据报文的方法的流程示意图；
图5为本申请实施例提供的一种处理数据报文的方法的流程示意图；
图6为本申请实施例提供的一种网卡的结构示意图；
图7为本申请实施例提供的一种网卡的结构示意图。
具体实施方式
为了下述各实施例的描述清楚简洁，首先给出相关概念或技术的简要介绍：
线路侧接口，即网卡用于接收其他网络设备发送的数据报文的接口。线路侧接口例如但不限于为，小型可插拔式(Small Form-factor，SFP)接口、四通道小型可插拔式(Quad Small Form-factor Pluggable，QSFP)接口或KR接口。
系统侧接口，即网卡用于接收CPU发送的数据报文的接口。系统侧接口例如但不限于为扩展的外部设备互连总线(PCI(Peripheral Component Interconnect)Express，PCIe)接口。
加速接口，独立于线路侧接口和系统侧接口，可以用于连接可编程的集成电路。加速接口例如但不限于为，PCIe接口，同调汇流互连加速器(Cache Coherent Interconnect for Accelerators，CCIX)接口，QSFP接口，40G平行物理接口(40Gbps Parallel Physical Interface，XLPPI)接口或者QSFP接口。
本申请实施例提供一种处理数据报文的方法和网卡，可以应用于各种数据报文或数据包的处理场景中。例如，传输控制协议(Transmission Control Protocol，TCP)/网际协议(Internet Protocol，IP)校验和(Checksum)场景，IPsec(IP Security)以及安全传输层协议(Transport Layer Security Protocol，TLS)等加解密场景，TCP切片卸载(TCP Segmentation Offload，TSO)场景，虚拟机队列(Virtual Machine Queue，VMQ)操作(Steering)场景，RSS(Receive Side Scaling)操作场景，虚拟网络的通用路由封装(Network Virtualization using Generic Routing Encapsulation，NVGRE)、增强型虚拟局域网(Virtual eXtensible Local Area Network，VXLAN)和通用虚拟网络封装(Generic Network Virtualization Encapsulation，GENEVE)等Overlay网络卸载场景，以及远程直接数据存取(Remote Direct Memory Access，RDMA)场景等。另外，还可以应用于数据平面开发套件(Data Plane Development Kit，DPDK)，开源虚拟交换机(OpenvSwitch，OVS)以及云硬盘(Elastic Volume Service，EVS)等处理场景中。
如图1所示，为本申请实施例提供的一种系统架构示意图，包括网络设备和外部设备(例如，交换机)。其中，网络设备包括网卡、存储器和CPU。网卡可以从线路侧接口接收交换机发送的数据报文，或从系统侧接口接收CPU发送的数据报文。
如图2所示，为本申请实施例提供的一种网卡的内部结构示意图。其中，网卡提供的系统侧接口用于连接CPU等主设备(host设备)。网卡提供的线路侧接口用于对接交换机或者其他网卡。网卡提供物理层、媒体接入控制(Media Access Control，MAC)层以及缓冲(BUFFER)等功能模块。可选的，网卡可以提供队列，发送引擎，接收引擎等功能模块。可选的，网卡提供内置的处理器，用于实现网卡内部资源管理，调度，网卡功能编程等。可选的，网卡提供存储器接口，如双倍速率同步动态随机存储 器(Double Data Rate，DDR)接口，用于扩展芯片BUFFER。
如图3所示，网卡包括加速接口，用于连接可编程的集成电路。网卡可以将待处理的数据报文转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文。在一种可能的设计中，可编程的集成电路与存储设备连接，存储设备用于缓存待处理的数据报文。需要说明的是，加速接口和系统侧接口或线路侧接口无关，也就是说，加速接口不影响现有的系统侧接口或线路侧接口的功能。
本申请实施例提供一种处理数据报文的方法，以网卡从线路侧接口接收待处理的数据报文为例进行说明，如图4所示，包括：
401、网卡从线路侧接口接收待处理的数据报文。
即网卡从线路侧接口接收外部设备发送的待处理的数据报文。
举例来说，待处理的数据报文可以是根据IPSec协议封装的数据报文，IPSec封装的数据报文是经过加密的数据报文，需要进行解密处理。
402、网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字是否有对应关系。
具体的，网卡获取待处理的数据报文的协议关键字；网卡确定网卡上存储的策略列表中是否存在待处理的数据报文的协议关键字；若网卡确定网卡上存储的策略列表中存在待处理的数据报文的协议关键字，网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系。
示例性的，网卡上存储的策略列表可以包括多种协议关键字，协议关键字用于指示协议类型，如表1所示：
表1
协议类型 协议关键字
IPSec协议 IPSec
TLS协议 TLS
...... ......
IP协议 IP
待处理的数据报文的协议关键字指明了待处理的数据包的协议类型。举例来说，当待处理的数据报文是根据IPSec封装的数据报文时，数据报文的协议关键字可以是IPSec类型。当网卡确定网卡上存储的策略列表中的协议关键字包括IPSec类型时，网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系。
若网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系，执行步骤403、404和406。
若网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字没有对应关系，执行步骤405和406。
403、网卡通过加速接口将待处理的数据报文转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文。
其中，可编程的集成电路可以包括现场可编程门阵列(Field-Programmable Gate Array，FPGA)、ASIC或可编程逻辑器件(Programmable Logic Device，PLD)，本申请对此不进行限定。
可编程的集成电路接收到网卡通过加速接口发送的待处理的数据报文时，可以根据预设的策略处理待处理的数据报文。其中，预设的策略可以根据网卡的应用场景灵活配置。例如，当待处理的数据报文是IPSec封装的数据报文时，可编程的集成电路可以对IPSec封装的数据报文进行解密处理。
可选的，可编程的集成电路支持外接存储设备，存储设备可以缓存待处理的数据报文。存储设备可以为随机存取存储器(Random Access Memory，RAM)、动态随机存取存储器(Dynamic Random Access Memory，DRAM)，可擦除可编程只读寄存器(Erasable Programmable Read Only Memory，EPROM)等中的一种或多种，本申请不做限定。
404、网卡接收可编程的集成电路通过加速接口返回的处理后的数据报文。
即可编程的集成电路根据预设的策略处理待处理的数据报文完成后，可以将处理后的数据报文返回给网卡，以便网卡将处理后的数据报文发送给CPU。
405、网卡处理待处理的数据报文。
即当网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字没有对应关系时，网卡不向可编程的集成电路发送待处理的数据报文，网卡可以自行处理待处理的数据报文。
举例来说，当待处理的数据报文不是根据IPSec封装的数据报文时，网卡可以不向可编程的集成电路发送待处理的数据报文，网卡可以自行处理待处理的数据报文。
406、网卡发送处理后的数据报文。
在一种可能的设计中，网卡可以通过PCIe接口向CPU发送处理后的数据报文，以便CPU对该处理后的数据报文进一步处理。
在一种可能的设计中，网卡可以产生中断，通过直接内存访问(Direct Memory Access，DMA)将处理后的数据报文发送给CPU管理的内存。
相比现有技术，网卡通过内部集成的处理器处理数据报文，由于内部集成的处理器的处理能力和可编程资源等有限，限制了网卡的性能，从而不能很好地降低CPU的负载。本申请实施例可以将接收到的待处理的数据报文，通过加速接口转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文，能够降低CPU的负载。其中，预设的策略可以根据网卡的应用场景灵活配置。同时，加速接口独立于系统侧接口和线路侧接口，专用于网卡和可编程的集成电路的信号通信，不影响系统侧接口和线路侧接口的功能。
在一种可能的设计中，在网卡从线路侧接口接收待处理的数据报文的情况下，网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字是否有对应关系，若网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字有对应关系，网卡通过加速接口转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文，可以更好的满足高性能，需要提供可编程加速能力的场景。若网卡确定待处理的数据报文与网卡上存储的策略列表中的协议关键字没有对应关系，网卡自行处理待处理的数据报文，可以节省将数据报文转发到可编程的集成电路的开销，能够满足普通性能要求。
本申请的又一实施例提供一种处理数据报文的方法，以网卡从系统侧接收待处理 的数据报文为例进行说明，如图5所示，包括：
501、网卡从系统侧接口接收待处理的数据报文。
即网卡从系统侧接口接收CPU发送的待处理的数据报文。
举例来说，待处理的数据报文可以是需要进行IPSec协议封装的数据报文，也就是说，待处理的数据报文需要进行加密处理。
502、网卡确定待处理的数据报文是否匹配网卡上存储的流表。
具体的，网卡获取待处理的数据报文的头部信息；网卡确定流表的包头域是否匹配待处理的数据报文的头部信息；若网卡确定流表的包头域匹配待处理的数据报文的头部信息，网卡确定待处理的数据报文匹配网卡上存储的流表。
示例性的，网卡上存储的流表的包头域可以包括输出端口、传输协议和目的IP地址，如表2所示：
表2
输出端口 传输协议 目的IP地址
端口1 IPSec 223.255.14.151
...... ...... ......
端口2 TLS 223.255.14.152
待处理的数据报文的头部信息包括待处理的数据报文对应的输出端口、传输协议和目的IP地址。
举例来说，假设网卡上存储的流表的包头域如表2所示，那么当网卡确定待处理的数据报文对应的输出端口为端口1、目的IP地址为223.255.14.151时，网卡确定待处理的数据报文的传输协议为IPSec，从而确定待处理的数据报文匹配网卡上存储的流表。
若网卡确定待处理的数据报文匹配网卡上存储的流表，执行步骤503、504和506。
若网卡确定待处理的数据报文不匹配网卡上存储的流表，执行步骤505和506。
503、网卡通过加速接口将待处理的数据报文转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文。
其中，可编程的集成电路可以为FPGA、ASIC或PLD，本申请对此不作限定。
可编程的集成电路接收到网卡通过加速接口发送的待处理的数据报文时，可以根据预设的策略处理待处理的数据报文。例如，当待处理的数据报文是需要进行IPSec封装的数据报文时，可编程的集成电路可以对待处理的数据报文进行加密处理。
可选的，可编程的集成电路支持外接存储设备，存储设备可以缓存待处理的数据报文。存储设备可以为RAM，DRAM，EPROM等，本申请不做限定。
504、网卡接收可编程的集成电路通过加速接口返回的处理后的数据报文。
即可编程的集成电路根据预设的策略处理待处理的数据报文完成后，可以将处理后的数据报文返回给网卡，以便网卡将处理后的数据报文发送给外部设备或CPU。
505、网卡处理待处理的数据报文。
即当网卡确定待处理的数据报文不匹配网卡上存储的流时，网卡不向可编程的集成电路发送待处理的数据报文，网卡可以自行处理待处理的数据报文。
506、网卡发送处理后的数据报文。
即网卡可以通过线路侧接口直接向外部设备转发处理后的数据报文。
相比现有技术，网卡通过内部集成的处理器处理数据报文，由于内部集成的处理器的处理能力和可编程资源等有限，限制了网卡的性能，从而不能很好地降低CPU的负载。本申请实施例可以将接收到的待处理的数据报文，通过加速接口转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文，能够降低CPU的负载。其中，预设的策略可以根据网卡的应用场景灵活配置。同时，加速接口独立于系统侧接口和线路侧接口，专用于网卡与可编程的集成电路之间的信号通信，不影响系统侧接口和线路侧接口的功能。
在一种可能的设计中，在网卡从线路侧接口接收待处理的数据报文的情况下，网卡确定待处理的数据报文是否匹配网卡上存储的流表，若网卡确定待处理的数据报文匹配网卡上存储的流表，网卡通过加速接口转发到可编程的集成电路，使可编程的集成电路根据预设的策略处理待处理的数据报文，可以更好的满足高性能，需要提供可编程加速能力的场景。若网卡确定待处理的数据报文不匹配网卡上存储的流表，网卡自行处理待处理的数据报文，可以节省将数据报文转发到可编程的集成电路的开销，能够满足普通性能要求。
上述主要从网卡的角度对本申请实施例提供的方案进行了介绍。可以理解的是，网卡为了实现上述功能，其包括了执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到，结合本文中所公开的实施例描述的算法步骤，本申请能够以硬件或硬件和软件的结合形式来实现。某个功能究竟以硬件还是软件驱动硬件的方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
本申请实施例可以根据上述方法示例对网卡进行功能模块的划分，例如，可以对应各个功能划分各个功能模块，也可以将两个或两个以上的功能集成在一个处理模块中。上述集成的模块既可以采用硬件的形式实现，也可以采用软件功能模块的形式实现。需要说明的是，本申请实施例中对模块的划分是示意性的，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式。
在采用对应各个功能划分各个功能模块的情况下，图6示出了上述实施例中所涉及的网卡6的一种可能的结构示意图，网卡包括：接收单元601，加速接口602，发送单元603，确定单元604和处理单元605。接收单元601用于支持网卡执行图4中的过程401和404，图5中的过程501和504。确定单元604用于支持网卡执行图4中的过程402，图5中的过程502。加速接口602用于支持网卡执行图4中的过程403，图5中的过程503。发送单元603用于支持网卡执行图4中的过程406，图5中的过程506。处理单元605用于支持网卡执行图4中的过程405，图5中的过程505。其中，上述方法实施例涉及的各步骤的所有相关内容均可以援引到对应功能模块的功能描述，在此不再赘述。
在一种可能的设计中，网卡可以通过图7中的网卡来实现。
图7所示为本申请实施例提供的网卡示意图。网卡700包括至少一个处理器701，通信总线702，存储器703以及至少一个通信接口704。
处理器701可以是一个通用CPU，微处理器，ASIC，或一个或多个用于控制本申请方案程序执行的集成电路。
通信总线702可包括一通路，在上述组件之间传送信息。
通信接口704，网卡用于与其他网卡或通信网络通信，如以太网，无线接入网(Radio Access Network，RAN)，无线局域网(Wireless Local Area Networks，WLAN)等。
存储器703可以是只读存储器(Read-Only Memory，ROM)或可存储静态信息和指令的其他类型的静态存储设备，RAM或者可存储信息和指令的其他类型的动态存储设备，也可以是电可擦可编程只读存储器(Electrically Erasable Programmable Read-Only Memory，EEPROM)、只读光盘(Compact Disc read-Only Memory，CD-ROM)或其他光盘存储、光碟存储(包括压缩光碟、激光碟、光碟、数字通用光碟、蓝光光碟等)、磁盘存储介质或者其他磁存储设备、或者能够用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由网卡存取的任何其他介质，但不限于此。存储器可以是独立存在，通过总线与处理器相连接。存储器也可以和处理器集成在一起。
其中，存储器703用于存储执行本申请方案的应用程序代码，并由处理器701来控制执行。处理器701用于执行存储器703中存储的应用程序代码，从而实现本申请方法中的功能。
在具体实现中，作为一种实施例，处理器701可以包括一个或多个CPU，例如图7中的CPU0和CPU1。
在具体实现中，作为一种实施例，网卡700可以包括多个处理器，例如图7中的处理器701和处理器705。这些处理器中的每一个可以是一个单核(single-CPU)处理器，也可以是一个多核(multi-CPU)处理器。这里的处理器可以指一个或多个设备、电路、和/或用于处理数据(例如网卡程序指令)的处理核。
上述的网卡700可以是一个通用网卡或者是一个专用网卡。在具体实现中，网卡700可以是台式机、便携式电脑、服务器、存储设备、网络设备、掌上电脑(Personal Digital Assistant，PDA)、移动手机、平板电脑、无线终端设备、通信设备、嵌入式设备或有图7中类似结构的设备。本申请实施例不限定网卡700的类型。
结合本申请公开内容所描述的方法或者算法的步骤可以硬件的方式来实现，也可以是由处理器执行软件指令的方式来实现。软件指令可以由相应的软件模块组成，软件模块可以被存放于RAM、闪存、ROM、EPROM、EEPROM、寄存器、硬盘、移动硬盘、只读光盘或者本领域熟知的任何其它形式的存储介质中。一种示例性的存储介质耦合至处理器，从而使处理器能够从该存储介质读取信息，且可向该存储介质写入信息。当然，存储介质也可以是处理器的组成部分。处理器和存储介质可以位于ASIC中。另外，该ASIC可以位于核心网接口设备中。当然，处理器和存储介质也可以作为分立组件存在于核心网接口设备中。
本领域技术人员应该可以意识到，在上述一个或多个示例中，本申请所描述的功能可以用硬件、软件、固件或它们的任意组合来实现。当使用软件实现时，可以将这些功能存储在网卡可读介质中或者作为网卡可读介质上的一个或多个指令或代码进行传输。网卡可读介质包括网卡存储介质和通信介质，其中通信介质包括便于从一个地方向另一个地方传送网卡程序的任何介质。存储介质可以是通用或专用网卡能够存取 的任何可用介质。
以上所述的具体实施方式，对本申请的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本申请的具体实施方式而已，并不用于限定本申请的保护范围，凡在本申请的技术方案的基础之上，所做的任何修改、等同替换、改进等，均应包括在本申请的保护范围之内。

Claims (13)

  1. 一种处理数据报文的方法，应用于网卡，其特征在于，所述网卡包括加速接口，所述加速接口与可编程的集成电路连接，所述方法包括：
    所述网卡接收待处理的数据报文；
    所述网卡通过所述加速接口将所述待处理的数据报文转发到所述可编程的集成电路，使所述可编程的集成电路根据预设的策略处理所述待处理的数据报文；
    所述网卡接收所述可编程的集成电路通过所述加速接口返回的处理后的数据报文；
    所述网卡发送所述处理后的数据报文。
  2. 根据权利要求1所述的方法，其特征在于，所述网卡通过所述加速接口将所述待处理的数据报文转发到所述可编程的集成电路之前，所述方法还包括：
    在所述网卡从线路侧接口接收所述待处理的数据报文的情况下，所述网卡确定所述待处理的数据报文与所述网卡上存储的策略列表中的协议关键字有对应关系；
    在所述网卡从系统侧接口接收所述待处理的数据报文的情况下，所述网卡确定所述待处理的数据报文匹配所述网卡上存储的流表。
  3. 根据权利要求2所述的方法，其特征在于，所述网卡确定所述待处理的数据报文与所述网卡上存储的策略列表中的协议关键字有对应关系包括：
    所述网卡获取所述待处理的数据报文的协议关键字；
    所述网卡确定所述网卡上存储的策略列表中是否存在所述待处理的数据报文的协议关键字；
    若所述网卡确定所述网卡上存储的策略列表中存在所述待处理的数据报文的协议关键字，所述网卡确定所述待处理的数据报文与所述网卡上存储的策略列表中的协议关键字有对应关系。
  4. 根据权利要求2所述的方法，其特征在于，所述网卡确定所述待处理的数据报文匹配所述网卡上存储的流表包括：
    所述网卡获取所述待处理的数据报文的头部信息；
    所述网卡确定所述流表的包头域是否匹配所述待处理的数据报文的头部信息；
    若所述网卡确定所述流表的包头域匹配所述待处理的数据报文的头部信息，所述网卡确定所述待处理的数据报文匹配所述网卡上存储的流表。
  5. 根据权利要求1-4任一项所述的方法，其特征在于，所述方法还包括：
    在所述网卡从线路侧接口接收所述待处理的数据报文的情况下，所述网卡确定所述待处理的数据报文与所述网卡上存储的策略列表中的协议关键字没有对应关系；或
    在所述网卡从系统侧接口接收所述待处理的数据报文的情况下，所述网卡确定所述待处理的数据报文不匹配所述网卡上存储的流表；
    所述网卡处理所述待处理的数据报文。
  6. 根据权利要求1-5任一项所述的方法，其特征在于，所述可编程的集成电路与存储设备连接，所述存储设备用于缓存所述待处理的数据报文。
  7. 一种网卡，其特征在于，包括：
    接收单元，用于接收待处理的数据报文；
    加速接口，用于将所述待处理的数据报文转发到所述可编程的集成电路，使所述 可编程的集成电路根据预设的策略处理所述待处理的数据报文；
    所述接收单元，还用于接收所述可编程的集成电路通过所述加速接口返回的处理后的数据报文；
    发送单元，用于发送所述处理后的数据报文。
  8. 根据权利要求7所述的网卡，其特征在于，还包括确定单元，用于：
    在所述网卡从线路侧接口接收所述待处理的数据报文的情况下，确定所述待处理的数据报文与所述网卡上存储的策略列表中的协议关键字有对应关系；
    在所述网卡从系统侧接口接收所述待处理的数据报文的情况下，确定所述待处理的数据报文匹配所述网卡上存储的流表。
  9. 根据权利要求8所述的网卡，其特征在于，在所述网卡从线路侧接口接收所述待处理的数据报文的情况下，所述确定单元用于：
    获取所述待处理的数据报文的协议关键字；
    确定所述网卡上存储的策略列表中是否存在所述待处理的数据报文的协议关键字；
    若确定所述网卡上存储的策略列表中存在所述待处理的数据报文的协议关键字，确定所述待处理的数据报文与所述网卡上存储的策略列表中的协议关键字有对应关系。
  10. 根据权利要求8所述的网卡，其特征在于，在所述网卡从系统侧接口接收所述待处理的数据报文的情况下，所述确定单元用于：
    获取所述待处理的数据报文的头部信息；
    确定所述流表的包头域是否匹配所述待处理的数据报文的头部信息；
    若确定所述流表的包头域匹配所述待处理的数据报文的头部信息，确定所述待处理的数据报文匹配所述网卡上存储的流表。
  11. 根据权利要求7-10任一项所述的网卡，其特征在于，还包括处理单元，用于：
    在所述网卡从线路侧接口接收所述待处理的数据报文的情况下，通过所述确定单元确定所述待处理的数据报文与所述网卡上存储的策略列表中的协议关键字没有对应关系；或
    在所述网卡从系统侧接口接收所述待处理的数据报文的情况下，通过所述确定单元确定所述待处理的数据报文不匹配所述网卡上存储的流表；
    处理所述待处理的数据报文。
  12. 根据权利要求7-11任一项所述的网卡，其特征在于，所述可编程的集成电路与存储设备连接，所述存储设备用于缓存所述待处理的数据报文。
  13. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质上存储有计算机程序，所述计算机程序被所述处理器执行时实现权利要求1-6任一项所述的处理数据报文的方法。
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