WO2019128602A1 - 信用卡及其工作方法 - Google Patents

信用卡及其工作方法 Download PDF

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Publication number
WO2019128602A1
WO2019128602A1 PCT/CN2018/117819 CN2018117819W WO2019128602A1 WO 2019128602 A1 WO2019128602 A1 WO 2019128602A1 CN 2018117819 W CN2018117819 W CN 2018117819W WO 2019128602 A1 WO2019128602 A1 WO 2019128602A1
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WIPO (PCT)
Prior art keywords
data
data block
microprocessor
unit
preset
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PCT/CN2018/117819
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English (en)
French (fr)
Inventor
陆舟
于华章
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飞天诚信科技股份有限公司
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Priority to US16/628,726 priority Critical patent/US11275869B2/en
Publication of WO2019128602A1 publication Critical patent/WO2019128602A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
    • G06F21/31—User authentication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/602—Providing cryptographic facilities or services
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/62—Protecting access to data via a platform, e.g. using keys or access control rules
    • G06F21/6218—Protecting access to data via a platform, e.g. using keys or access control rules to a system of files or objects, e.g. local or distributed file system or database
    • G06F21/6245—Protecting personal data, e.g. for financial or medical purposes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/341—Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/355—Personalisation of cards for use
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/356—Aspects of software for card payments
    • G06Q20/3563—Software being resident on card
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/38—Payment protocols; Details thereof
    • G06Q20/40—Authorisation, e.g. identification of payer or payee, verification of customer or shop credentials; Review and approval of payers, e.g. check credit lines or negative lists
    • G06Q20/401—Transaction verification
    • G06Q20/4018—Transaction verification using the card verification value [CVV] associated with the card
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/0806—Details of the card
    • G07F7/0813—Specific details related to card security
    • G07F7/0826—Embedded security module
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/0806—Details of the card
    • G07F7/0846—On-card display means
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0891—Revocation or update of secret information, e.g. encryption key update or rekeying
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
    • H04L9/3226—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using a predetermined code, e.g. password, passphrase or PIN
    • H04L9/3228—One-time or temporary data, i.e. information which is sent for every authentication or authorization, e.g. one-time-password, one-time-token or one-time-key

Definitions

  • the invention relates to a credit card and a working method thereof, and belongs to the technical field of information security.
  • a credit card security code is a security code used by a credit card to conduct a network or telephone transaction and is typically used to verify that the payer owns the credit card at the time of the transaction, thereby preventing credit card fraud.
  • shopping on some overseas websites does not require a password.
  • the buyer provides the account number and credit card security code to complete the transaction, there are also merchants in the country to sign a contract with the bank.
  • the credit card security code can be used to complete the telephone billing.
  • the credit card security code is usually a fixed three or four digit number printed on the credit card. If it is remembered during use, the credit card is easily stolen.
  • a method of operating a credit card including a microprocessor provided in the credit card performs the following steps:
  • Step S1 the microprocessor is powered on, and the system is initialized
  • Step S2 the microprocessor sleeps, is awakened when a preset interrupt is detected, and performs step S3;
  • Step S3 the microprocessor enters a preset interrupt processing flow to execute a preset interrupt processing, and when the preset interrupt processing is completed, exits the preset interrupt processing flow, and returns to step S2;
  • the preset interrupt processing process includes:
  • Step a1 The microprocessor acquires a dynamic security code factor, generates a bit stream according to the dynamic security code factor and card personalized data in the card, and divides the bit stream to obtain a first data block and a second data block;
  • Step a2 the microprocessor uses the first data block as data to be encrypted, and encrypts the data to be encrypted to obtain a first data block ciphertext;
  • Step a3 the microprocessor performs an exclusive-OR operation on the first data block ciphertext and the second data block to obtain a third data block;
  • Step a4 the microprocessor uses the third data block as the data to be encrypted, and encrypts the data to be encrypted, to obtain a third data block ciphertext;
  • Step a5 the microprocessor uses the third data block ciphertext as data to be decrypted, and decrypts the data to be decrypted to obtain a fourth data block, and uses the fourth data block as data to be encrypted, and encrypts the data to be encrypted. Obtaining a fourth data block ciphertext;
  • Step a6 The microprocessor extracts, converts, and sorts the ciphertext of the fourth data block, and uses the preset part of the processing result as the current valid credit card security code to display the current valid credit card security code.
  • the method of working the credit card includes the microprocessor provided in the credit card performing the following steps:
  • Step s1 the microprocessor is powered on, and the system is initialized
  • Step s2 the microprocessor checks whether the preset interrupt flag is set, if yes, resets the preset interrupt flag, performs preset interrupt processing, otherwise performs step s3;
  • Step s3 the microprocessor sleeps, is awakened when the preset interrupt is detected, enters the preset interrupt processing flow, sets the preset interrupt flag, exits the preset interrupt processing flow, and returns to step s2;
  • the preset interrupt processing includes:
  • Step s2-1 Obtain a dynamic security code factor, generate a bit stream according to the dynamic security code factor and card personalized data in the card, and divide the bit stream to obtain a first data block and a second data block;
  • Step s2-2 using the first data block as data to be encrypted, encrypting the data to be encrypted, and obtaining a first data block ciphertext;
  • Step s2-3, performing an exclusive-OR operation on the first data block ciphertext and the second data block to obtain a third data block;
  • Step s2-4 the third data block is used as data to be encrypted, and the data to be encrypted is encrypted to obtain a third data block ciphertext;
  • Step s2-5 the third data block ciphertext is used as data to be decrypted, and the data to be decrypted is decrypted to obtain a fourth data block, and the fourth data block is used as data to be encrypted, and the data to be encrypted is encrypted to obtain a fourth data block.
  • step s2-6 the fourth data block ciphertext is extracted, converted, and sorted, and the preset part of the processing result is used as the current valid credit card security code, and the current valid credit card security code is displayed.
  • a credit card in which a microprocessor is disposed, and the microprocessor includes:
  • a power-on module configured to power on the microprocessor
  • An initialization module configured to perform system initialization after the microprocessor is powered on
  • a hibernation module configured to hibernate after the system is initialized by the microprocessor, and to sleep after the microprocessor exits the preset interrupt processing flow;
  • a detecting module configured to detect a preset interrupt when the microprocessor sleeps
  • a wake-up module for the microprocessor to wake up after detecting a preset interrupt
  • An interrupt processing module configured to perform a preset interrupt processing after the microprocessor is woken up, enter a preset interrupt processing flow, and exit the preset interrupt processing flow when the preset interrupt processing is completed;
  • the interrupt processing module specifically includes:
  • An obtaining unit configured to obtain a dynamic security code factor
  • a storage unit for storing card personalization data
  • a generating unit configured to generate a bitstream according to a dynamic security code factor acquired by the acquiring unit and card personalized data stored in the storage unit;
  • a dividing unit configured to divide a bit stream generated by the generating unit to obtain a first data block and a second data block;
  • an encryption unit configured to: use the first data block obtained by the dividing unit as data to be encrypted, encrypt the data to be encrypted, to obtain a first data block ciphertext; and further, use the third data block obtained by the XOR unit as the to-be-encrypted Data, the encrypted data is encrypted, and the third data block ciphertext is obtained; and the fourth data block obtained by the decryption unit is used as the data to be encrypted, and the encrypted data is encrypted to obtain the fourth data block ciphertext;
  • an exclusive OR unit configured to perform an exclusive OR operation on the first data block ciphertext obtained by the encryption unit and the second data block obtained by the dividing unit, to obtain a third data block;
  • a decryption unit configured to use the third data block ciphertext obtained by the encryption unit as data to be decrypted, and decrypt the data to be decrypted to obtain a fourth data block;
  • a processing unit configured to perform extraction, conversion, and sorting processing on the fourth data block ciphertext obtained by the encryption unit, and use a preset part of the processing result as the current valid credit card security code
  • a display unit for controlling the display of the currently valid credit card security code.
  • the microprocessor includes:
  • a power-on module configured to power on the microprocessor
  • An initialization module configured to perform system initialization after the microprocessor is powered on
  • An checking module configured to check whether the preset interrupt flag is set after the system is initialized by the microprocessor, and to check whether the preset interrupt flag is set after the microprocessor exits the interrupt processing flow;
  • An interrupt processing module configured to: when the microprocessor checks that the preset interrupt flag is set, reset the preset interrupt flag, and perform preset interrupt processing;
  • a hibernation module configured to: the microprocessor checks to sleep when no interrupt flag is set;
  • a detecting module configured to detect a preset interrupt when the microprocessor sleeps
  • the wake-up module is used to wake up when the microprocessor detects the preset interrupt, enters the preset interrupt processing flow, sets the preset interrupt flag, and exits the preset interrupt processing flow;
  • the interrupt processing module specifically includes:
  • An obtaining unit configured to obtain a dynamic security code factor
  • a storage unit for storing card personalization data
  • a generating unit configured to generate a bitstream according to a dynamic security code factor acquired by the acquiring unit and card personalized data stored in the storage unit;
  • a dividing unit configured to divide a bit stream generated by the generating unit to obtain a first data block and a second data block;
  • an encryption unit configured to: use the first data block obtained by the dividing unit as data to be encrypted, encrypt the data to be encrypted, to obtain a first data block ciphertext; and further, use the third data block obtained by the XOR unit as the to-be-encrypted Data, the encrypted data is encrypted, and the third data block ciphertext is obtained; and the fourth data block obtained by the decryption unit is used as the data to be encrypted, and the encrypted data is encrypted to obtain the fourth data block ciphertext;
  • an exclusive OR unit configured to perform an exclusive OR operation on the first data block ciphertext obtained by the encryption unit and the second data block obtained by the dividing unit, to obtain a third data block;
  • a decryption unit configured to use the third data block ciphertext obtained by the encryption unit as data to be decrypted, and decrypt the data to be decrypted to obtain a fourth data block;
  • a processing unit configured to perform extraction, conversion, and sorting processing on the fourth data block ciphertext obtained by the encryption unit, and use a preset part of the processing result as the current valid credit card security code
  • a display unit for controlling the display of the currently valid credit card security code.
  • the credit card security code is generated according to a secure encryption algorithm and dynamically changed. In the course of use, even if the currently valid credit card security code is remembered by others, it is difficult to implement the credit card fraud according to the credit card security code. , greatly reducing the risk of credit card being stolen due to the leakage of credit card security code.
  • FIG. 2 is a flowchart of a button interrupt processing according to Embodiment 3 of the present invention.
  • FIG. 3 is a flowchart of a button interrupt processing according to Embodiment 4 of the present invention.
  • FIG. 4 is a flow chart of encrypting data to be encrypted using a preset first key according to the present invention
  • FIG. 5 is a block diagram of a microprocessor in accordance with Embodiment 9 of the present invention.
  • FIG. 6 is a block diagram of a microprocessor in accordance with Embodiment 10 of the present invention.
  • the first embodiment provides a method of operating a credit card including a microprocessor and a power supply circuit, a display circuit, and a communication circuit connected to the microprocessor.
  • the working method of the credit card includes:
  • Step S1 the microprocessor is powered on, and the system is initialized
  • Step S2 the microprocessor sleeps, is awakened when the preset interrupt is detected, and performs step S3;
  • Step S3 the microprocessor enters the preset interrupt processing flow to execute the preset interrupt processing, and when the preset interrupt processing is completed, exits the preset interrupt processing flow, and returns to step S2;
  • the default interrupt handling includes:
  • Step a1 Obtain a dynamic security code factor, generate a bit stream according to the dynamic security code factor and card personalized data in the card, and divide the bit stream to obtain a first data block and a second data block;
  • Step a2 The first data block is used as data to be encrypted, and the data to be encrypted is encrypted to obtain a first data block ciphertext;
  • Step a3 performing an exclusive-OR operation on the first data block ciphertext and the second data block to obtain a third data block;
  • Step a4 The third data block is used as data to be encrypted, and the data to be encrypted is encrypted to obtain a third data block ciphertext;
  • step a5 the third data block ciphertext is used as the data to be decrypted, and the data to be decrypted is decrypted to obtain a fourth data block, and the fourth data block is used as data to be encrypted, and the data to be encrypted is encrypted to obtain a fourth data block ciphertext;
  • step a6 the fourth data block ciphertext is extracted, converted, and sorted, and the preset part of the processing result is used as the current valid credit card security code, and the current valid credit card security code is displayed.
  • the second embodiment provides a working method of a credit card, which includes a microprocessor and a power supply circuit, a display circuit and a communication circuit connected to the microprocessor.
  • the working method of the credit card includes:
  • Step 101 Initialize the system after the microprocessor is powered on.
  • the microprocessor is powered by the power supply circuit; performing system initialization includes initializing system hardware and initializing system variables; the hardware includes an IO interface, a display screen, and the like.
  • Step 102 The microprocessor sleeps, and when it is detected that the interrupt is awakened, step 103 is performed.
  • Step 103 The microprocessor enters an interrupt processing flow to execute an interrupt processing. When the interrupt processing is completed, the interrupt processing flow is exited, and the process returns to step 102.
  • the interrupt specifically includes a communication interrupt and an RTC (real time clock) interrupt:
  • the microprocessor When the microprocessor detects the communication interruption, it is woken up, enters the communication interruption processing flow to execute the communication interruption processing, and when the communication interruption processing is completed, exits the communication interruption processing flow;
  • the communication interruption processing includes: the microprocessor receives the communication data, and performs card personalization according to the received communication data; further, performing card personalization according to the received communication data includes: applying the card according to the received communication data
  • the card personalization data and the preset key are written therein, wherein the personalized data includes but is not limited to a primary account, a card expiration date, and a service code sequence, and the preset key includes but is not limited to the first preset key and the second pre- Set the key.
  • the microprocessor When the microprocessor detects the RTC interrupt, it wakes up, enters the RTC interrupt processing flow to execute the RTC interrupt processing, and when the RTC interrupt processing is completed, exits the RTC interrupt processing flow;
  • the RTC interrupt processing includes:
  • Step 201 The microprocessor updates the timing time
  • Step 202 The microprocessor determines whether the card personalization has been completed. If yes, step 203 is performed; otherwise, the RTC interrupt processing is completed;
  • the microprocessor determines that the card personalization is not completed, the corresponding prompt information may be displayed; in the second embodiment, the microprocessor displays the corresponding prompt information through the display circuit.
  • Step 203 The microprocessor determines whether the credit card security code is to be updated, if yes, step 204 is performed; otherwise, the RTC interrupt processing is completed;
  • the microprocessor determines whether the timing time is an integer multiple of a preset dynamic security code time period, and the credit card security code needs to be updated, otherwise the credit card security code does not need to be updated;
  • the preset dynamic security code time period is 60 seconds.
  • Step 204 The microprocessor acquires a current time factor.
  • the microprocessor acquires the current timing time, calculates the number of seconds between the current timing time and the universal coordination time, and divides the calculated number of seconds by the preset time window value, and takes the integer part of the obtained quotient. If the integer part of the quotient is less than 8 digits, the left side of the integer part of the quotient is filled with 0 to 8 digits to obtain the current time factor. If the integer part of the quotient exceeds 8 digits, the integer part of the quotient is obtained. The left side intercepts 8 numbers to get the current time factor.
  • the universal coordination time is 0:00:00 on January 1, 1970
  • the preset time window value is 28800
  • the current timing time acquired by the microprocessor is 3:24:58 on July 28, 2017, and the current calculation is calculated.
  • the number of seconds between the timing time and the universal coordination time is 1501212298
  • the integer part of the quotient obtained by dividing the calculated number of seconds by the preset time window value is 52125
  • the integer part of the obtained quotient is less than 8 digits, in the integer part of the obtained quotient.
  • the left side is padded with 0 to 8 digits to get the current time factor of 00052125.
  • Step 205 The microprocessor generates a bit stream according to the current time factor and the card personalization data, and divides the bit stream to obtain the first data block and the second data block.
  • the card personalization data is stored in the card, including but not limited to the main account, the card expiration date and the service code sequence;
  • the microprocessor replaces the first preset length data in the primary account with the current time factor, obtains the transformed primary account, and sequentially connects the converted primary account with the card validity period and the service code sequence to obtain connection data, and connects The right side of the data is filled with preset data to obtain a bit stream of a second preset length.
  • the primary account number is 4123456789012345
  • the card validity period is 1704
  • the service code sequence is 888
  • the current time factor is 00052125
  • the microprocessor replaces the first 8 digits of the primary account with the current time factor, and obtains the transformed primary account number 0005212589012345, which will be transformed.
  • the main account is sequentially connected with the card expiration date and the service code sequence to obtain the connection data 00052125890123451704888, and is filled with 0 on the right side of the connection data to obtain a bit stream of length of 128 bits 00052125890123451704888000000000.
  • the microprocessor divides the bit stream evenly, the first 64 bits of the bit stream are the first data block, and the last 64 bits of the bit stream are the second data block;
  • the bit stream is 00052125890123451704888000000000
  • the first data block 0005212589012345 and the second data block 1704888000000000 are obtained.
  • Step 206 The microprocessor encrypts the first data block by using the preset first key to obtain a first data block ciphertext.
  • the microprocessor encrypts the first data block using the preset first key.
  • the first key is 1122334455667788
  • the first data block is 0005212589012345
  • the microprocessor encrypts the first data block using the preset first key to obtain the first data block ciphertext 75C5587D133E88C7.
  • Step 207 The microprocessor performs an exclusive OR operation on the first data block ciphertext and the second data block to obtain a third data block.
  • the first data block ciphertext is 75C5587D133E88C7
  • the second data block is 1704888000000000
  • the microprocessor performs an exclusive OR operation on the first data block ciphertext and the second data block to obtain a third data block 62C1D0FD133E88C7.
  • Step 208 The microprocessor encrypts the third data block by using the preset first key to obtain a third data block ciphertext.
  • the first key is 1122334455667788
  • the third data block is 62C1D0FD133E88C7
  • the microprocessor encrypts the third data block using the preset first key to obtain a third data block ciphertext D2FF50C34545B875.
  • Step 209 The microprocessor decrypts the third data block ciphertext by using the preset second key to obtain a fourth data block, and encrypts the fourth data block by using the preset first key to obtain the fourth data block. Cipher text.
  • the first key is 1122334455667788
  • the second key is 8877655443332211
  • the third data block ciphertext is D2FF50C34545B875
  • the microprocessor decrypts the third data block ciphertext using the preset second key to obtain the fourth data.
  • Block 600F6151E9AB608D encrypts the fourth data block using the preset first key to obtain a fourth data block ciphertext 54476FDF143C0B58.
  • Step 210 The microprocessor extracts, converts, and sorts the ciphertext of the fourth data block, and uses the preset part of the processing result as the current valid credit card security code to display the current valid credit card security code, and the RTC interrupt processing is completed.
  • the microprocessor displays the current valid credit card security code through the display circuit.
  • the microprocessor extracts, transforms, and sorts the ciphertext of the fourth data block, and uses the preset part of the processing result as the current valid credit card security code, which specifically includes:
  • Step 210-1 The microprocessor starts from the left side of the fourth data block ciphertext, and extracts a number between all the first data and the second data in the fourth data block ciphertext to obtain first extracted data; and the fourth data Starting from the left side of the block ciphertext, extracting the numbers between all the third data and the fourth data in the ciphertext of the fourth data block to obtain the second extracted data;
  • Step 210-2 The microprocessor replaces each digit in the second extracted data with the difference between the fifth data and the fifth data to obtain the converted second extracted data.
  • Step 210-3 The microprocessor sequentially splicing the first extracted data and the converted second extracted data to obtain a processing result
  • Step 210-4 The microprocessor intercepts the first 3 digits of the processing result as the current valid credit card security code.
  • the fourth data block ciphertext is 54476FDF143C0B58; the microprocessor starts from the left side of the fourth data block ciphertext, extracts all the numbers between the '0' and '9' in the fourth data block ciphertext, and obtains the first extraction.
  • Data 54476143058 starting from the left side of the fourth data block ciphertext, extracting the numbers between all 'A' to 'F' in the fourth data block ciphertext, obtaining the second extracted data FFCBC; each of the second extracted data The number is replaced by the difference of 10, and the converted second extracted data 53521 is obtained; the first extracted data and the converted second extracted data are sequentially spliced, and the processing result is 5447614305853521; the first 3 of the microprocessor interception processing result The number 544 is used as the current valid credit card security code.
  • the third embodiment provides a working method of a credit card including a microprocessor and a power supply circuit, a display circuit and a communication circuit connected to the microprocessor.
  • the working method of the credit card includes:
  • Step 101 Initialize the system after the microprocessor is powered on.
  • the microprocessor is powered by the power supply circuit; performing system initialization includes initializing system hardware and initializing system variables; the hardware includes an IO interface, a display screen, and the like.
  • Step 102 The microprocessor sleeps and is woken up when an interrupt is detected, and step 103 is performed.
  • Step 103 The microprocessor enters an interrupt processing flow to execute an interrupt processing. When the interrupt processing is completed, the interrupt processing flow is exited, and the process returns to step 102.
  • the interrupts in the third embodiment specifically include a communication interrupt, an RTC interrupt, and a key interrupt:
  • the microprocessor When the microprocessor detects the communication interruption, it is woken up, enters the communication interruption processing flow to execute the communication interruption processing, and when the communication interruption processing is completed, exits the communication interruption processing flow;
  • the communication interruption processing includes: the microprocessor receives the communication data, and performs card personalization according to the received communication data; further, performing card personalization according to the received communication data includes: applying the card according to the received communication data
  • the card personalization data and the preset key are written therein, wherein the personalized data includes but is not limited to a primary account, a card expiration date, and a service code sequence, and the preset key includes but is not limited to the first preset key and the second pre- Set the key.
  • the microprocessor When the microprocessor detects the RTC interrupt, it wakes up, enters the RTC interrupt processing flow to execute the RTC interrupt processing, and when the RTC interrupt processing is completed, exits the RTC interrupt processing flow;
  • the RTC interrupt processing includes: the microprocessor updates the timing time.
  • the microprocessor When the microprocessor detects the key interrupt, it is woken up, enters the key interrupt processing flow, executes the key interrupt processing, and when the key interrupt processing is completed, exits the key interrupt processing flow;
  • the key interrupt processing includes:
  • Step 301 The microprocessor determines whether the card personalization has been completed. If yes, step 302 is performed; otherwise, the key interrupt processing is completed;
  • the microprocessor determines that the card personalization is not completed, the corresponding prompt information may be displayed; in the third embodiment, the microprocessor displays the corresponding prompt information through the display circuit.
  • Step 302 The microprocessor acquires a current time factor.
  • Step 303 The microprocessor generates a bit stream according to the current time factor and the card personalization data, and divides the bit stream to obtain the first data block and the second data block.
  • Step 304 The microprocessor encrypts the first data block by using the preset first key to obtain a first data block ciphertext.
  • Step 305 The microprocessor performs an exclusive OR operation on the first data block ciphertext and the second data block to obtain a third data block.
  • Step 306 The microprocessor encrypts the third data block by using the preset first key to obtain a third data block ciphertext.
  • Step 307 The microprocessor decrypts the third data block ciphertext by using the preset second key to obtain a fourth data block, and encrypts the fourth data block by using the preset first key to obtain the fourth data block. Cipher text.
  • Step 308 The microprocessor extracts, converts, and sorts the ciphertext of the fourth data block, and uses the preset part of the processing result as the current valid credit card security code to display the current valid credit card security code, and the key interrupt processing is completed.
  • the microprocessor displays the current valid credit card security code through the display circuit.
  • the fourth embodiment provides a working method of a credit card, which includes a microprocessor and a power supply circuit, a display circuit and a communication circuit connected to the microprocessor.
  • the working method of the credit card includes:
  • Step 101 Initialize the system after the microprocessor is powered on.
  • the microprocessor is powered by the power supply circuit; performing system initialization includes initializing system hardware and initializing system variables; the hardware includes an IO interface, a display screen, and the like.
  • Step 102 The microprocessor sleeps and is woken up when an interrupt is detected, and step 103 is performed.
  • Step 103 The microprocessor enters an interrupt processing flow to execute an interrupt processing. When the interrupt processing is completed, the interrupt processing flow is exited, and the process returns to step 102.
  • the microprocessor When the microprocessor detects the communication interruption, it is woken up, enters the communication interruption processing flow to execute the communication interruption processing, and when the communication interruption processing is completed, exits the communication interruption processing flow;
  • the communication interruption processing includes: the microprocessor receives the communication data, and performs card personalization according to the received communication data; further, performing card personalization according to the received communication data includes: applying the card according to the received communication data
  • the card personalization data, the preset key, and the initial key number are written, wherein the personalized data includes but is not limited to a primary account number, a card expiration date, and a service code sequence, and the preset key includes but is not limited to the first preset key. And a second preset key.
  • the microprocessor When the microprocessor detects the key interrupt, it is woken up, enters the key interrupt processing flow, executes the key interrupt processing, and when the key interrupt processing is completed, exits the key interrupt processing flow;
  • the key interrupt processing includes:
  • Step 401 The microprocessor updates the number of key presses
  • Step 402 The microprocessor determines whether the card personalization has been completed. If yes, step 403 is performed; otherwise, the button interrupt processing is completed;
  • the microprocessor determines that the card personalization is not completed, the corresponding prompt information may be displayed; in the fourth embodiment, the microprocessor displays the corresponding prompt information through the display circuit.
  • Step 403 The microprocessor acquires a current event factor.
  • the microprocessor obtains the current number of key presses. If the current number of key presses is less than 8 digits, the left side of the current keystrokes is filled with 0 to 8 digits, and the current event factor is obtained, if the current number of keystrokes is 8 If the number is more than 8 digits, the current number of keystrokes is used as the current event factor.
  • Step 404 The microprocessor generates a bit stream according to the current event factor and the card personalization data, and divides the bit stream to obtain the first data block and the second data block.
  • the card personalization data is stored in the card, including but not limited to the primary account number, the card expiration date, and the service code sequence;
  • the microprocessor replaces the first 8 digits of the primary account with the current event factor, obtains the transformed primary account, and sequentially connects the converted primary account with the card validity period and the service code sequence to obtain connection data, on the right side of the connection data. Filled with 0, a bit stream of length 128 bits is obtained.
  • the primary account number is 4123456789012345
  • the card validity period is 1704
  • the service code sequence is 888
  • the current event factor is 00052125
  • the microprocessor replaces the first 8 digits of the primary account with the current time factor, and obtains the transformed primary account number 0005212589012345, which will be transformed.
  • the main account is sequentially connected with the card expiration date and the service code sequence to obtain the connection data 00052125890123451704888, and is filled with 0 on the right side of the connection data to obtain a bit stream of length of 128 bits 00052125890123451704888000000000.
  • the microprocessor divides the bit stream evenly, the first 64 bits of the bit stream are the first data block, and the last 64 bits of the bit stream are the second data block;
  • the bit stream is 00052125890123451704888000000000
  • the first data block 0005212589012345 and the second data block 1704888000000000 are obtained.
  • Step 405 The microprocessor encrypts the first data block by using the preset first key to obtain a first data block ciphertext.
  • Step 406 The microprocessor performs an exclusive OR operation on the first data block ciphertext and the second data block to obtain a third data block.
  • Step 407 The microprocessor encrypts the third data block by using the preset first key to obtain a third data block ciphertext.
  • Step 408 The microprocessor decrypts the third data block ciphertext by using the preset second key to obtain a fourth data block, and encrypts the fourth data block by using the preset first key to obtain the fourth data block. Cipher text.
  • Step 409 The microprocessor extracts, converts, and sorts the ciphertext of the fourth data block, and uses the preset part of the processing result as the current valid credit card security code to display the current valid credit card security code, and the key interrupt processing is completed.
  • the microprocessor displays the current valid credit card security code through the display circuit.
  • steps 405-409 in the embodiment 4 refer to steps 206-210 in the embodiment 2, and details are not described herein again.
  • the fifth embodiment provides a working method of a credit card including a microprocessor and a power supply circuit, a display circuit and a communication circuit connected to the microprocessor.
  • the working method of the credit card includes:
  • Step s1 the microprocessor is powered on, and the system is initialized
  • Step s2 The microprocessor checks whether the preset interrupt flag is set, if yes, resets the preset interrupt flag, and performs preset interrupt processing, otherwise step s3 is performed;
  • Step s3 the microprocessor sleeps, wakes up when the preset interrupt is detected, enters the preset interrupt processing flow, sets the preset interrupt flag, exits the preset interrupt processing flow, and returns to step s2;
  • the default interrupt handling includes:
  • Step s2-1 acquiring a dynamic security code factor, generating a bit stream according to the dynamic security code factor and the card personalized data in the card, and dividing the bit stream to obtain the first data block and the second data block;
  • Step s2-2 using the first data block as data to be encrypted, encrypting the data to be encrypted, and obtaining a first data block ciphertext;
  • Step s2-3, performing an exclusive-OR operation on the first data block ciphertext and the second data block to obtain a third data block;
  • Step s2-4 the third data block is used as data to be encrypted, and the data to be encrypted is encrypted to obtain a third data block ciphertext;
  • Step s2-5 using the third data block ciphertext as the data to be decrypted, decrypting the data to be decrypted, obtaining a fourth data block, using the fourth data block as data to be encrypted, encrypting the data to be encrypted, and obtaining a fourth data block ciphertext ;as well as
  • step s2-6 the fourth data block ciphertext is extracted, converted, and sorted, and the preset part of the processing result is used as the current valid credit card security code, and the current valid credit card security code is displayed.
  • the sixth embodiment provides a working method of a credit card including a microprocessor and a power supply circuit, a display circuit and a communication circuit connected to the microprocessor.
  • the working method of the credit card includes:
  • Step 501 Initialize the system after the microprocessor is powered on.
  • the microprocessor is powered by the power supply circuit; performing system initialization includes initializing system hardware and initializing system variables; the hardware includes an IO interface, a display screen, and the like.
  • Step 502 the microprocessor checks whether the interrupt flag is set, then resets the interrupt flag, performs interrupt processing, otherwise step 503;
  • Step 1 the microprocessor checks whether the communication interrupt flag is set, then resets the communication interrupt flag, performs communication interruption processing, and performs step 2; otherwise, step 2 is performed;
  • Step 2 the microprocessor checks whether the RTC interrupt flag is set, if yes, resets the RTC interrupt flag, performs RTC interrupt processing, and performs step 503; otherwise, step 503 is performed;
  • the content of the communication interruption processing and the RTC interrupt processing in the sixth embodiment is the same as that in the second embodiment, and details are not described herein again.
  • Step 503 the microprocessor sleeps, wakes up when an interrupt is detected, sets the interrupt flag, and returns to step 502.
  • the microprocessor is woken up when detecting the communication interruption or the RTC interrupt; when the microprocessor detects that the communication interruption is awakened, the communication interruption processing flow is entered, the communication interruption flag is set, and the communication is exited.
  • Interrupt processing flow when the microprocessor checks that the RTC interrupt is awakened, it enters the RTC interrupt processing flow, sets the RTC interrupt flag, and exits the RTC interrupt processing flow.
  • the seventh embodiment provides a working method of a credit card including a microprocessor and a power supply circuit, a display circuit and a communication circuit connected to the microprocessor.
  • the working method of the credit card includes:
  • Step 501 Initialize the system after the microprocessor is powered on.
  • the microprocessor is powered by the power supply circuit; performing system initialization includes initializing system hardware and initializing system variables; the hardware includes an IO interface, a display screen, and the like.
  • Step 502 the microprocessor checks whether the interrupt flag is set, if yes, resets the interrupt flag, performs interrupt processing, and performs step 503; otherwise, step 503 is performed;
  • the interruption in the seventh embodiment specifically includes a communication interruption, an RTC interruption, and a key interruption.
  • the step 502 specifically includes:
  • Step 1 the microprocessor checks whether the communication interrupt flag is set, then resets the communication interrupt flag, performs communication interruption processing, and performs step 2; otherwise, step 2 is performed;
  • Step 2 the microprocessor checks whether the key interrupt flag is set, then resets the key interrupt flag, performs key interrupt processing, and performs step 3, otherwise step 3 is performed;
  • Step 3 the microprocessor checks whether the RTC interrupt flag is set, if yes, resets the RTC interrupt flag, performs RTC interrupt processing, and performs step 503; otherwise, step 503 is performed;
  • the content of the communication interruption processing, the RTC interrupt processing, and the key interrupt processing in the seventh embodiment is the same as that in the third embodiment, and details are not described herein again.
  • Step 503 the microprocessor sleeps, wakes up when an interrupt is detected, sets the interrupt flag, and returns to step 502.
  • the microprocessor is woken up when detecting a communication interruption or a key interrupt or an RTC interrupt; when the microprocessor detects that the communication interruption is awakened, the communication interruption processing flow is entered, and the communication interruption flag is set. Exiting the communication interrupt processing flow; when the microprocessor detects that the key interrupt is awakened, enters the key interrupt processing flow, sets the key interrupt flag, and exits the key interrupt processing flow; when the microprocessor detects that the RTC interrupt is awakened, Enter the RTC interrupt processing flow, set the RTC interrupt flag, and exit the RTC interrupt processing flow.
  • the eighth embodiment provides a working method of a credit card including a microprocessor and a power supply circuit, a display circuit and a communication circuit connected to the microprocessor.
  • the working method of the credit card includes:
  • Step 501 Initialize the system after the microprocessor is powered on.
  • the microprocessor is powered by the power supply circuit; performing system initialization includes initializing system hardware and initializing system variables; the hardware includes an IO interface, a display screen, and the like.
  • Step 502 the microprocessor checks whether the interrupt flag is set, if yes, resets the interrupt flag, performs interrupt processing, and performs step 503; otherwise, step 503 is performed;
  • the interruption described in the embodiment 8 specifically includes a communication interruption and a key interruption.
  • the step 502 specifically includes:
  • Step 1 the microprocessor checks whether the communication interrupt flag is set, then resets the communication interrupt flag, performs communication interruption processing, and performs step 2; otherwise, step 2 is performed;
  • Step 2 the microprocessor checks whether the button interrupt flag is set, then resets the button interrupt flag, performs key interrupt processing, step 503 is performed, otherwise step 503 is performed;
  • the content of the communication interruption processing and the key interruption processing is the same as that in the fourth embodiment, and details are not described herein again.
  • Step 503 the microprocessor sleeps, wakes up when an interrupt is detected, sets the interrupt flag, and returns to step 502.
  • the microprocessor is woken up when detecting a communication interruption or a key interruption; when the microprocessor detects that the communication interruption is awakened, the communication interruption processing flow is entered, the communication interruption flag is set, and the communication is exited. Interrupt processing flow; when the microprocessor checks that the key interrupt is awakened, enters the key interrupt processing flow, sets the key interrupt flag, and exits the key interrupt processing flow.
  • the first data block, the third data block or the fourth data block is used as the data to be encrypted, and the data to be encrypted is encrypted by using the preset first key, as shown in FIG. 4, which specifically includes:
  • Step a Create a subkey according to the first key
  • the microprocessor performs the following steps to create a subkey:
  • Step a1 rearranging the bit data of the first key
  • the digits of the first preset list are used as the sequence numbers of the bit data, and the bit data of the first key is rearranged according to the order listed in the first preset list;
  • the first preset list is:
  • the first key is 00010011 00110100 01010111 01111001 10011011 10111100 11011111 11110001, then the first key after rearrangement is 1111000 0110011 0010101 0101111 0101010 1011001 1001111 0001111;
  • Step a2 dividing the rearranged first key to obtain a first key data block C0 and a second key data block D0;
  • the first key after rearranging is rearranged
  • the first key after rearrangement is 1111000 0110011 0010101 0101111 0101010 1011001 1001111 0001111
  • the first key data block C0 obtained by the segmentation is 1111000 0110011 0010101 0101111
  • the second key data block D0 is 0101010 1011001 1001111 0001111;
  • Step a3 cyclically shifting the first key data block C0 to obtain a first sub-key data block Cn; and cyclically shifting the second key data block D0 to obtain a first sub-key data block Cn.
  • the Cn-1 is rotated to the left by a specified number of times to obtain a first subkey data block Cn;
  • the Dn-1 is rotated to the left by a specified number of times to obtain a second subkey data block Dn;
  • n is sequentially taken from 1 to 16 When n is 1, 2, 9, or 16, the loop is shifted left by one; when n is 3, 4, 5, 6, 7, 8, 10, 11, 12, 13, 14, 15, Cycle left 2 times;
  • Step a4 the first sub-key data block Cn and the second sub-key data block Dn corresponding to the first sub-key data block Cn are spliced to obtain a sub-key data block CnDn;
  • Cn and Dn are correspondingly spliced; n is sequentially taken from 1 to 16;
  • Step a5 selecting and arranging bit data of the subkey data block CnDn to obtain a subkey Kn;
  • the digits of the second preset list are used as the sequence numbers of the bit data, and the bit data of the subkey data block CnDn is selected and arranged according to the order listed in the second preset list;
  • the first key data block C0 is 1111000 0110011 0010101 0101111
  • the second key data block D0 is 0101010 1011001 10011110001111, which is sequentially rotated left to obtain:
  • C1D1 111000011001100101010111111010101011001100111100011110
  • C2D2 11000011001100101010101111110101010110011001111000111101
  • C3D3 000011001100101010111111110101011001100111100011110101
  • C4D4 00110011001010101011111111000101100110011110001111010101
  • C5D5 11001100101010101111111100000110011001111000111101010101
  • C6D6 0011001010101111111100001110011001111000111101010101
  • C7D7 1100101010111111110000110001100111100011110101010110
  • C8D8 001010101011111111000011001110011110001111010101011001
  • C9D9 01010101011111111000011001100011110001111010101010110011
  • C10D10 010101011111111000011001100111110001111010101011001100
  • C11D11 01010111111110000110011001011100011110101010101100110011
  • C12D12 01011111111000011001100101010001111010101010110011001111
  • C13D13 0111111110000110011001010101111010101011001100111100
  • C14D14 1111111000011001100101010111101010101100110011110001
  • C15D15 1111100001100110010101011110101010110011001111000111
  • C16D16 1111000011001100101010111101010101100110011110001111
  • the second preset list is:
  • K1 000110 110000 001011 101111 111111 000111 000001 110010;
  • K2 011110 011010 111011 011001 110110 111100 100111 100101
  • K4 011100 101010 110111 010110 110110 110011 010100 011101
  • K5 011111 001110 110000 000111 111010 110101 001110 101000
  • K6 011000 111010 010100 111110 010100 000111 101100 101111
  • K7 111011 001000 010010 110111 111101 100001 100010 111100
  • K8 111101 111000 101000 111010 110000 010011 101111 111011
  • K12 011101 010111 000111 110101 100101 000110 011111 101001
  • K14 010111 110100 001110 110111 111100 101110 011100 111010
  • K16 110010 110011 110110 001011 000011 100001 011111 110101
  • Step b rearranging the bit data of the encrypted data
  • the number of the data in the third preset list is the bit number of the bit data, and the bit data of the encrypted data is rearranged according to the order listed in the third preset list;
  • the third preset list is:
  • the data to be encrypted is 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111, then the data to be encrypted after rearrangement is 1100 1100 0000 0000 1100 1100 1111 1111 1111 0000 1010 1010 1111 0000 1010;
  • Step c dividing the rearranged data to be encrypted to obtain a first intermediate data block L0 and a second intermediate data block R0;
  • the data to be encrypted after rearrangement is 1100 1100 0000 0000 1100 1100 1111 1111 1111 0000 1010 1010 1111 0000 101010
  • the first intermediate data block L0 obtained by the division is 1100 1100 0000 0000 1100 1100 1111 1111
  • the second intermediate data block R0 is 1111 00001010 1010 1111 0000 1010 1010
  • Step d performing an iterative operation on the first intermediate data block L0 and the second intermediate data block R0 according to the created subkey, to obtain a third intermediate data block L16 and a fourth intermediate data block R16;
  • the microprocessor performs 16 iterations on the first intermediate data block L0 and the second intermediate data block R0.
  • Each iteration includes: assigning a value to Ln by using Rn-1, and expanding Rn-1 according to the preset extension table.
  • the extended Rn-1 is XORed with the subkey Kn, and the result of the XOR is group-converted according to a preset sequence, and the packet conversion result is transposed according to the third preset list, and the transposed result and Ln-1 are transposed.
  • Extending the Rn-1 according to the preset extension table preferably by using the number of the bit in the preset extension table as the bit data, and expanding and arranging the bit data of the Rn-1 according to the order listed in the preset extension table;
  • group conversion on the XOR gain according to a preset sequence preferably grouping the XOR gains (preferably 6-bit group), and performing calculation according to each group of data obtained by grouping, in a preset list corresponding to each group of data Finding data corresponding to the calculation result, converting the found data into a binary number, and sequentially splicing to obtain a group conversion result;
  • R0 is 1111 0000 1010 1010 1111 0000 1010 1010
  • L0 is 1100 1100 0000 0000 1100 1100 1111 1111
  • the preset extension table is:
  • the subkey K1 is 000110 110000 001011 101111 111111 000111 000001 110010.
  • each group of 6 bits is divided into 8 groups, and the preset list corresponding to each group is:
  • the fourth preset list is:
  • R0 is assigned to L1
  • R0 is expanded according to the preset extension table, and the expanded R0 is 011110 100001 010101 010101 011110 100001 010101 010101
  • XOR with K1 is 011000010001 011110 111010 100001 100110 010100 100111
  • the XOR gain is grouped to obtain 8 groups of data: 011000, 010001, 011110, 111010, 10001, 100110, 010100, 100111, and the first bit of each group of data.
  • the data 9 is obtained, and the 3rd row and the 3rd column of the preset list S8 are searched to obtain the data 7.
  • the data obtained by the search is converted into a binary number and sequentially spliced to obtain a packet conversion result 0101 1100 1000 00101011 0101 1001 0111, the bit data of the packet conversion result is rearranged according to the order listed in the fourth preset list to obtain the transposition result 0010 00110100 1010 1010 1001 1011 1011, and the transposition result is XORed with L0 to obtain the first iteration.
  • the result of the operation is 1110 1111 0100 1010 0110 0101 0100 0100.
  • Step e splicing the fourth intermediate data block and the third intermediate data block, transposing, and performing a hexadecimal conversion on the transposed result to obtain a ciphertext to be encrypted;
  • the fourth intermediate data block and the third intermediate data block are sequentially spliced, and the number of the data in the fifth preset list is used as the bit number of the bit data, and the bit data of the spliced data is re-ordered according to the order listed in the fifth preset list.
  • the fifth preset list is:
  • the third data block is 0100 0011 0100 0010 0011 0010 0011 0100
  • the fourth data block is 0000 1010 0100 1100 1101 1001 1001 0101
  • the data obtained by sequentially splicing the fourth intermediate data block and the third intermediate data block is 00001010 01001100 11011001 10010101 01000011 0100001000110010 00110100, rearrange the bit data of the spliced data according to the order listed in the fifth preset list, and obtain the transposition result 1000010111101000 00010011 01010100 00001111 00001010 10110100 00000101, convert to hexadecimal, and obtain the second ciphertext data 85E813540F0AB405 .
  • using the third data block ciphertext as the data to be decrypted, and using the preset second key to decrypt the decrypted data may specifically include:
  • Step f Create a subkey according to the second key
  • the microprocessor performs the following steps to create a subkey:
  • Step f1 rearranging the bit data of the second key
  • the digits of the first preset list are used as the sequence numbers of the bit data, and the bit data of the second key is rearranged according to the order listed in the first preset list;
  • Step f2 dividing the rearranged second key to obtain a third key data block C'0 and a fourth key data block D'0;
  • the second key after rearranging is rearranged
  • Step f3 cyclically shifting the third key data block C'0 to obtain a third subkey data block C'n; and cyclically shifting the fourth key data block D'0 to obtain a third sub- a fourth sub-key data block D'n corresponding to the key data block C'n;
  • C'n-1 is rotated to the left by a specified number of times to obtain a first subkey data block C'n;
  • D'n-1 is rotated to the left by a specified number of times to obtain a second subkey data block D'n.
  • n takes values from 1 to 16 in turn; when n takes values 1, 2, 9, and 16, the loop shifts left one time; when n takes values 3, 4, 5, 6, 7, 8, 10, 11, 12 At 13, 14, and 15, the cycle is shifted to the left twice;
  • Step f4 splicing the third subkey data block C'n with the fourth subkey data block D'n corresponding to the third subkey data block C'n to obtain the subkey data block C'nD' n;
  • Step f5 selecting and arranging bit data of the subkey data block C'nD'n to obtain a subkey K'n;
  • the number of the second preset list is used as the bit number of the bit data, and the bit data of the subkey data block C'nD'n is selected and arranged according to the order listed in the second preset list, and n is sequentially used. 1 to 16;
  • Step g rearranging the bit data of the data to be decrypted
  • the data to be decrypted includes the third data block ciphertext
  • the data in the third preset list is the sequence number of the bit data, and the bit data of the decrypted data is rearranged according to the order listed in the third preset list;
  • Step h dividing the rearranged data to be decrypted to obtain a fifth intermediate data block L'0 and a sixth intermediate data block R'0;
  • Step i iterative operation is performed on the fifth intermediate data block L'0 and the sixth intermediate data block R'0, to obtain a seventh intermediate data block L'16 and an eighth intermediate data block R'16;
  • the microprocessor performs 16 iterations on the fifth intermediate data block L'0 and the sixth intermediate data block R'0, and each iteration includes: assigning L'n to the L'n-1, according to a preset extension.
  • the table expands R'n-1, and the extended R'n-1 is XORed with the subkey K'16-n, and the XOR gain is group-converted according to a preset sequence, according to the third preset list. Transpose the result of the packet conversion, and the transposition result is XORed with L'n-1 to obtain R'n; n is sequentially taken from 1 to 16;
  • R'n-1 is extended according to the preset extension table, preferably by using the number of the bit in the preset extension table as the bit data, and the bit data of R'n-1 is expanded according to the order listed in the preset extension table. arrangement;
  • group conversion on the XOR gain according to a preset sequence preferably grouping the XOR gains (preferably 6-bit group), and performing calculation according to each group of data obtained by grouping, in a preset list corresponding to each group of data Finding data corresponding to the calculation result, converting the found data into a binary number, and sequentially splicing to obtain a group conversion result;
  • Step j splicing the eighth intermediate data block and the seventh intermediate data block, transposing according to the fifth preset list, and performing a hexadecimal conversion on the transposed result to obtain a plaintext of the data to be decrypted;
  • the eighth intermediate data block and the seventh intermediate data block are sequentially spliced, and the number of the data in the fifth preset list is used as the bit number of the bit data, and the bit data of the spliced data is re-ordered according to the order listed in the fifth preset list.
  • the embodiment 9 provides a credit card, and the credit card is provided with a microprocessor. As shown in FIG. 5, the microprocessor includes:
  • the power-on module 601 is used for powering on the microprocessor
  • the initialization module 602 is configured to perform system initialization after the microprocessor is powered on;
  • the hibernation module 603 is configured to perform a sleep after the system is initialized by the microprocessor;
  • the detecting module 604 is configured to detect a preset interrupt when the microprocessor sleeps
  • the wake-up module 605 is configured to be woken up after the microprocessor detects the preset interrupt
  • the interrupt processing module 606 is configured to perform a preset interrupt processing after the microprocessor is woken up, enter a preset interrupt processing flow, and exit the preset interrupt processing flow when the preset interrupt processing is completed;
  • the hibernation module 603 is further configured to sleep after the microprocessor exits the preset interrupt processing flow.
  • the interrupt processing module 606 specifically includes:
  • An obtaining unit configured to obtain a dynamic security code factor
  • a storage unit for storing card personalization data
  • a generating unit configured to generate a bit stream according to the dynamic security code factor acquired by the obtaining unit and the card personalized data stored in the storage unit;
  • a dividing unit configured to divide the bit stream generated by the generating unit to obtain a first data block and a second data block
  • An encryption unit configured to use the first data block obtained by the dividing unit as data to be encrypted, and encrypt the data to be encrypted to obtain a first data block ciphertext
  • an exclusive OR unit configured to perform an exclusive OR operation on the first data block ciphertext obtained by the encryption unit and the second data block obtained by the splitting unit, to obtain a third data block;
  • the encryption unit is further configured to: use the third data block obtained by the XOR unit as data to be encrypted, and encrypt the data to be encrypted to obtain a third data block ciphertext;
  • a decryption unit configured to use the third data block ciphertext obtained by the encryption unit as data to be decrypted, and decrypt the data to be decrypted to obtain a fourth data block;
  • the encryption unit is further configured to: use the fourth data block obtained by the decryption unit as data to be encrypted, and encrypt the data to be encrypted to obtain a fourth data block ciphertext;
  • a processing unit configured to perform extraction, conversion, and sorting processing on the fourth data block ciphertext obtained by the encryption unit, and use the preset part of the processing result as the current valid credit card security code
  • a display unit for controlling the display of the currently valid credit card security code.
  • the detecting module 604 is specifically configured to detect a real-time clock interrupt when the microprocessor sleeps
  • the wake-up module 605 is specifically used to wake up after the real-time clock interrupt is detected by the microprocessor; the interrupt processing module 606 is specifically configured to perform a real-time clock interrupt processing process when the microprocessor is woken up and enter the real-time clock interrupt processing process. When the clock interrupt processing is completed, the real-time clock interrupt processing flow is exited.
  • interrupt processing module 606 may further include an update unit and a determining unit:
  • a determining unit configured to determine whether to update the credit card security code
  • the obtaining unit is specifically configured to obtain the current time factor according to the timing time when the determining unit determines that the credit card security code is to be updated.
  • the detecting module 604 is specifically configured to detect that the button is interrupted when the microprocessor is in sleep;
  • the wake-up module 605 is specifically used to wake up after the button is detected by the microprocessor;
  • the interrupt processing module 606 is specifically used to enter the key interrupt processing flow and execute the key interrupt processing after the microprocessor is woken up, and the key interrupt processing is completed. When exiting the key interrupt processing flow.
  • interrupt processing module 606 may further include an update unit:
  • the obtaining unit is specifically configured to obtain a current event factor according to the number of key presses.
  • the detecting module 604 is specifically configured to detect a key interrupt and a real-time clock interrupt when the microprocessor sleeps, correspondingly:
  • the wake-up module 605 is specifically configured to be awakened after the microprocessor detects a button interrupt or a real-time clock interrupt;
  • the interrupt processing module 606 is specifically configured to execute the key interrupt processing when the microprocessor detects that the key interrupt is awakened and enters the key interrupt processing flow. When the key interrupt processing is completed, the key interrupt processing flow is exited, and the microprocessor detects the real time clock. After the interrupt is awakened, the real-time clock interrupt processing flow is executed to execute the real-time clock interrupt processing, and when the real-time clock interrupt processing is completed, the real-time clock interrupt processing flow is exited;
  • the interrupt processing module 606 further includes: a real-time clock interrupt processing unit, configured to update the timing time;
  • the obtaining unit is specifically configured to acquire the current time factor according to the timing time.
  • the detecting module 604 is further configured to detect a communication interruption when the microprocessor sleeps, correspondingly:
  • the wake-up module 605 is further configured to be awakened after the microprocessor detects that the communication is interrupted;
  • the interrupt processing module 606 is further configured to: when the microprocessor detects that the communication interruption is awakened, enter a communication interruption processing flow to perform a communication interruption processing, and when the communication interruption processing is completed, exit the communication interruption processing flow;
  • the interrupt processing module 606 further includes a communication interrupt processing unit and a determining unit; wherein the communication interrupt processing unit is configured to receive the communication data, and perform card personalization according to the received communication data; and the determining unit is configured to determine whether the card personalization has been carry out.
  • the obtaining unit is specifically configured to acquire a dynamic security code factor when the determining unit determines that the card personalization has been completed.
  • the communication interruption processing unit may be specifically configured to receive the communication data, and write the card personalization data and the preset key into the storage unit according to the received communication data.
  • the communication interruption processing unit may be specifically configured to receive the communication data, and write the primary account, the card validity period, the service code sequence, and the preset key to the storage unit according to the received communication data;
  • the generating unit is specifically configured to replace, by using the dynamic security code factor acquired by the acquiring unit, the first preset length data in the primary account stored in the storage unit, to obtain the transformed primary account, and to convert the converted primary account and the card.
  • the validity period and the service code sequence are sequentially connected to obtain connection data, and are filled with preset data on the right side of the connection data to obtain a bit stream of a second preset length.
  • the dividing unit may be specifically configured to obtain the first data block and the second data block by using the bit stream generated by the average dividing generating unit.
  • the processing unit may be specifically configured to extract, from the left side of the fourth data block ciphertext obtained by the encryption unit, a number between all the first data and the second data in the fourth data block ciphertext, to obtain First extracting data, starting from the left side of the fourth data block ciphertext, extracting numbers between all the third data to the fourth data in the fourth data block ciphertext, to obtain second extracted data; Each number is replaced by a difference between the number and the fifth data, and the converted second extracted data is obtained; the first extracted data and the converted second extracted data are sequentially spliced to obtain a processing result.
  • the preset key written by the communication interruption processing unit to the storage unit includes a first key
  • the encryption unit specifically includes:
  • dividing subunit configured to divide the rearranged data to be encrypted to obtain a first intermediate data block and a second intermediate data block
  • An iterative subunit configured to perform an iterative operation on the first intermediate data block and the second intermediate data block obtained by dividing the subunit according to the subkey created by the creating subunit, to obtain a third intermediate data block and a fourth intermediate data block;
  • the transposition subunit is configured to splicing the fourth intermediate data block obtained by the iteration subunit and the third intermediate data block, and transposing the transposed result to obtain a ciphertext to be encrypted;
  • the subunit is created, specifically for rearranging the bit data of the first key; and the first key obtained by dividing the rearranged to obtain the first key data block and the second key data block;
  • the key data block is cyclically shifted to the left to obtain a first subkey data block;
  • the second key data block is cyclically shifted to the left to obtain a second subkey data block corresponding to the first subkey data block;
  • a sub-key data block is spliced with a second sub-key data block corresponding to the first sub-key data block to obtain a sub-key data block;
  • the bit data of the sub-key data block is selected and arranged to obtain a sub-density key.
  • the preset key written by the communication interruption processing unit to the storage unit further includes a second key
  • the decryption unit specifically includes:
  • dividing subunit configured to divide the rearranged data to be decrypted to obtain a fifth intermediate data block and a sixth intermediate data block;
  • An iterative subunit configured to perform an iterative operation on the fifth intermediate data block and the sixth intermediate data block obtained by dividing the subunit, to obtain a seventh intermediate data block and an eighth intermediate data block;
  • the transposition sub-unit is configured to splicing the eighth intermediate data block and the seventh intermediate data block obtained by the iterative sub-unit, and transposing the transposed result to obtain a plaintext of the data to be decrypted.
  • the subunit is created, specifically for rearranging the bit data of the second key; and the second key after the rearrangement is divided to obtain the third key data block and the fourth key data block;
  • the key data block is cyclically shifted to the left to obtain a third sub-key data block;
  • the fourth key data block is cyclically shifted to the left to obtain a fourth sub-key data block corresponding to the third sub-key data block;
  • the third subkey data block is spliced with the fourth subkey data block corresponding to the third subkey data block to obtain a subkey data block;
  • the bit data of the subkey data block is selected and arranged to obtain a sub-density key.
  • the embodiment 10 provides a credit card, and the credit card is provided with a microprocessor. As shown in FIG. 6, the microprocessor includes:
  • the power-on module 701 is configured to power on the microprocessor
  • the initialization module 702 is configured to perform system initialization after the microprocessor is powered on;
  • the checking module 703 is configured to check whether the preset interrupt flag is set after the system performs system initialization
  • the interrupt processing module 704 is configured to: when the microprocessor checks that the preset interrupt flag is set, reset the preset interrupt flag, and perform preset interrupt processing;
  • the hibernation module 705 is configured to check, when the microprocessor detects that no interrupt flag is set, to sleep;
  • the detecting module 706 is configured to detect a preset interrupt when the microprocessor sleeps
  • the wake-up module 707 is used to wake up when the microprocessor detects the preset interrupt, enters the preset interrupt processing flow, sets the preset interrupt flag, and exits the preset interrupt processing flow;
  • the checking module 703 is further configured to check whether the preset interrupt flag is set after the microprocessor exits the interrupt processing flow
  • the interrupt processing module specifically includes:
  • An obtaining unit configured to obtain a dynamic security code factor
  • a storage unit for storing card personalization data
  • a generating unit configured to generate a bit stream according to the dynamic security code factor acquired by the obtaining unit and the card personalized data stored in the storage unit;
  • a dividing unit configured to divide the bit stream generated by the generating unit to obtain a first data block and a second data block
  • an encryption unit configured to use the first data block obtained by the dividing unit as the data to be encrypted, and encrypt the data to be encrypted to obtain the first data block ciphertext; and to use the third data block obtained by the XOR unit as the data to be encrypted, Encrypting the encrypted data to obtain a third data block ciphertext; and further, the fourth data block obtained by the decryption unit is used as data to be encrypted, and the data to be encrypted is encrypted to obtain a fourth data block ciphertext;
  • an exclusive OR unit configured to perform an exclusive OR operation on the first data block ciphertext obtained by the encryption unit and the second data block obtained by the splitting unit, to obtain a third data block;
  • a decryption unit configured to use the third data block ciphertext obtained by the encryption unit as data to be decrypted, and decrypt the data to be decrypted to obtain a fourth data block;
  • a processing unit configured to perform extraction, conversion, and sorting processing on the fourth data block ciphertext obtained by the encryption unit, and use the preset part of the processing result as the current valid credit card security code
  • a display unit for controlling the display of the currently valid credit card security code.
  • the checking module 703 is specifically configured to check whether the real-time clock interrupt flag is set after the system is initialized by the microprocessor, and check whether the real-time clock interrupt flag is set after the microprocessor exits the interrupt processing flow;
  • the interrupt processing module 704 is specifically configured to: when the microprocessor checks that the real-time clock interrupt flag is set, reset the real-time clock interrupt flag, and perform real-time clock interrupt processing; and the detecting module 706 is specifically configured to detect when the microprocessor sleeps.
  • interrupt processing module may further include an update unit and a determining unit:
  • the updating unit is configured to update a timing time
  • the determining unit is configured to determine whether to update the credit card security code
  • the obtaining unit is specifically configured to obtain the current time factor according to the timing time when the determining unit determines that the credit card security code is to be updated.
  • the checking module 703 is specifically configured to check whether the button interrupt flag is set after the system is initialized by the microprocessor, and check whether the button interrupt flag is set after the microprocessor exits the interrupt processing flow;
  • the interrupt processing module 704 is specifically configured to: when the microprocessor checks that the button interrupt flag is set, resets the button interrupt flag, and performs key interrupt processing; and the detecting module 706 is configured to detect that the button is interrupted when the microprocessor is in sleep;
  • the wake-up module 707 is specifically used when the microprocessor detects that the key interrupt is awakened, enters the key interrupt processing flow, sets the key interrupt flag, and exits the key interrupt processing flow.
  • interrupt processing module 704 may further include an update unit:
  • the obtaining unit is specifically configured to obtain a current event factor according to the number of key presses.
  • the checking module 703 is specifically configured to check whether the button interrupt flag and the real-time clock interrupt flag are set after the system is initialized by the microprocessor, and check the button interrupt flag after the microprocessor exits the interrupt processing flow. And whether the real-time clock interrupt flag is set;
  • the interrupt processing module 704 is specifically configured to: when the microprocessor checks that the key interrupt flag is set, resets the key interrupt flag, performs key interrupt processing, and the microprocessor checks to reset the real time clock when the real time clock interrupt flag is set.
  • the interrupt flag is executed to perform real-time clock interrupt processing;
  • the detecting module 706 is specifically configured to detect a key interrupt and a real-time clock interrupt when the microprocessor sleeps; and the wake-up module 707 is specifically used to wake up when the microprocessor detects the key interrupt, and enter the button
  • the interrupt processing flow sets the key interrupt flag, exits the key interrupt processing flow, and wakes up when the microprocessor detects the real-time clock interrupt, enters the real-time clock interrupt processing flow, sets the real-time clock interrupt flag, and exits the real-time clock interrupt processing flow.
  • the interrupt processing module 704 further includes: a real-time clock interrupt processing unit, configured to update the timing time;
  • the obtaining unit is specifically configured to acquire the current time factor according to the timing time.
  • the checking module 703 is further configured to check whether the communication interruption flag is set after the system is initialized by the microprocessor, and the microprocessor will check whether the communication interruption flag is set after exiting the interrupt processing flow, correspondingly :
  • the interrupt processing module 704 is further configured to: when the microprocessor checks that the communication interruption flag is set, reset the communication interruption flag, and perform communication interruption processing;
  • the detecting module 706 is further configured to detect a communication interruption when the microprocessor sleeps
  • the wake-up module 707 is further configured to be woken up when the microprocessor detects the communication interruption, enter a communication interrupt processing flow, set the communication interrupt flag, and exit the communication interruption processing flow;
  • the interrupt processing module 704 further includes a communication interrupt processing unit and a determining unit; wherein the communication interrupt processing unit is configured to receive the communication data, and perform card personalization according to the received communication data; and the determining unit is configured to determine whether the card personalization has been carry out.
  • the obtaining unit is specifically configured to acquire a dynamic security code factor when the determining unit determines that the card personalization has been completed.
  • processing unit in communication may be specifically configured to receive communication data, and write card personalized data and a preset key into the storage unit according to the received communication data.
  • the communication interruption processing unit may be specifically configured to receive the communication data, and write the primary account, the card validity period, the service code sequence, and the preset key to the storage unit according to the received communication data;
  • the generating unit is specifically configured to replace, by using the dynamic security code factor acquired by the acquiring unit, the first preset length data in the primary account stored in the storage unit, to obtain the transformed primary account, and to convert the converted primary account and the card.
  • the validity period and the service code sequence are sequentially connected to obtain connection data, and are filled with preset data on the right side of the connection data to obtain a bit stream of a second preset length.
  • the dividing unit is specifically configured to obtain a first data block and a second data block by using the bit stream generated by the average dividing generating unit.
  • the processing unit may be specifically configured to extract, from the left side of the fourth data block ciphertext obtained by the encryption unit, a number between all the first data and the second data in the fourth data block ciphertext, to obtain First extracting data, starting from the left side of the fourth data block ciphertext, extracting numbers between all the third data to the fourth data in the fourth data block ciphertext, to obtain second extracted data; Each number is replaced by a difference between the number and the fifth data, and the converted second extracted data is obtained; the first extracted data and the converted second extracted data are sequentially spliced to obtain a processing result.
  • the preset key written by the communication interruption processing unit to the storage unit includes a first key
  • the encryption unit specifically includes:
  • dividing subunit configured to divide the rearranged data to be encrypted to obtain a first intermediate data block and a second intermediate data block
  • An iterative subunit configured to perform an iterative operation on the first intermediate data block and the second intermediate data block obtained by dividing the subunit according to the subkey created by the creating subunit, to obtain a third intermediate data block and a fourth intermediate data block;
  • the transposition subunit is configured to splicing the fourth intermediate data block obtained by the iteration subunit and the third intermediate data block, and transposing the transposed result to obtain a ciphertext to be encrypted;
  • the subunit is created, specifically for rearranging the bit data of the first key; and the first key obtained by dividing the rearranged to obtain the first key data block and the second key data block;
  • the key data block is cyclically shifted to the left to obtain a first subkey data block;
  • the second key data block is cyclically shifted to the left to obtain a second subkey data block corresponding to the first subkey data block;
  • a sub-key data block is spliced with a second sub-key data block corresponding to the first sub-key data block to obtain a sub-key data block;
  • the bit data of the sub-key data block is selected and arranged to obtain a sub-density key.
  • the preset key written by the communication interruption processing unit to the storage unit further includes a second key
  • the decryption unit specifically includes:
  • dividing subunit configured to divide the rearranged data to be decrypted to obtain a fifth intermediate data block and a sixth intermediate data block;
  • An iterative subunit configured to perform an iterative operation on the fifth intermediate data block and the sixth intermediate data block obtained by dividing the subunit, to obtain a seventh intermediate data block and an eighth intermediate data block;
  • the transposition sub-unit is configured to splicing the eighth intermediate data block obtained by the iterative sub-unit and the seventh intermediate data block, and transposing, and performing a hexadecimal conversion on the transposed result to obtain a plaintext of the data to be decrypted.
  • the subunit is created, specifically for rearranging the bit data of the second key; and the second key after the rearrangement is divided to obtain the third key data block and the fourth key data block;
  • the key data block is cyclically shifted to the left to obtain a third sub-key data block;
  • the fourth key data block is cyclically shifted to the left to obtain a fourth sub-key data block corresponding to the third sub-key data block;
  • the third subkey data block is spliced with the fourth subkey data block corresponding to the third subkey data block to obtain a subkey data block;
  • the bit data of the subkey data block is selected and arranged to obtain a sub-density key.

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Abstract

一种信用卡的工作方法，所述方法包括:步骤S1、微处理器上电，进行系统初始化；步骤S2、微处理器休眠，当检测到预设中断时被唤醒，执行步骤S3；步骤S3、微处理器进入预设中断处理流程执行预设中断处理，当预设中断处理完成时，退出预设中断处理流程，返回步骤S2。或者所述方法包括:步骤s1、微处理器上电，进行系统初始化；步骤s2、微处理器检查预设中断标志是否被置位，是则复位预设中断标志，执行预设中断处理，否则执行步骤s3；步骤s3、微处理器休眠，当检测到预设中断时被唤醒，将预设中断标志置位，返回步骤s2。本发明可降低信用卡被盗刷的风险。

Description

信用卡及其工作方法 技术领域
本发明涉及信用卡及其工作方法，属于信息安全技术领域。
背景技术
信用卡是当今发展最快的金融业务之一，是一种可在一定范围内替代传统现金流通的电子货币。信用卡安全码，是信用卡在进行网络或电话交易时的一个安全代码，通常被用于证实付款人在交易时是拥有该信用卡的，从而防止信用卡欺诈。然而，在一些境外网站购物是不需要密码的，只要买方提供账号和信用卡安全码即可完成交易，国内也有商家与银行签约，无需提供信用卡密码，仅凭信用卡安全码就可以完成电话划账，但信用卡安全码通常是印刷在信用卡上的固定的三或四位数字，如果在使用过程中被人记住，则容易发生信用卡的盗用。
发明内容
本发明的目的是提供一种信用卡及其工作方法，其可大大降低因信用卡安全码泄露而导致的信用卡被盗刷的风险。
为此，根据本发明的一方面，提供了一种信用卡的工作方法，其包括所述信用卡内设置的微处理器执行以下步骤:
步骤S1、所述微处理器上电，进行系统初始化；
步骤S2、所述微处理器休眠，当检测到预设中断时被唤醒，执行步骤S3；以及
步骤S3、所述微处理器进入预设中断处理流程执行预设中断处理，当所述预设中断处理完成时，退出所述预设中断处理流程，返回步骤S2；
所述预设中断处理流程包括:
步骤a1、所述微处理器获取动态安全码因子，根据所述动态安全码因子和卡内的卡片个人化数据生成比特流，分割所述比特流得到第一数据块和第二数据块；
步骤a2、所述微处理器将所述第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；
步骤a3、所述微处理器对所述第一数据块密文和所述第二数据块进行异或运算，得到第三数据块；
步骤a4、所述微处理器将所述第三数据块最为作为待加密数据，对待加密数据加密，得到第三数据块密文；
步骤a5、所述微处理器将所述第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块，将所述第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；以及
步骤a6、所述微处理器对所述第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码，显示当前有效信用卡安全码。
或者，所述信用卡的工作方法包括所述信用卡内设置的微处理器执行以下步骤:
步骤s1、所述微处理器上电，进行系统初始化；
步骤s2、所述微处理器检查预设中断标志是否被置位，是则复位预设中断标志，执行预设中断处理，否则执行步骤s3；以及
步骤s3、所述微处理器休眠，当检测到预设中断时被唤醒，进入预设中断处理流程将预设中断标志置位，退出所述预设中断处理流程，返回步骤s2；
所述预设中断处理包括:
步骤s2-1、获取动态安全码因子，根据所述动态安全码因子和卡内的卡片个人化数据生成比特流，分割所述比特流得到第一数据块和第二数据块；
步骤s2-2、将所述第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；
步骤s2-3、对所述第一数据块密文和所述第二数据块进行异或运算，得到第三数据块；
步骤s2-4、将所述第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；
步骤s2-5、将所述第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块，将所述第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；以及
步骤s2-6、对所述第四数据块密文进行抽取、转换和排序，将处理结果的预设部分作为当前有效信用卡安全码，显示当前有效信用卡安全码。
根据本发明的另一方面，提供了一种信用卡，所述信用卡内设置有微处理器，所述微处理器中包括:
上电模块，用于所述微处理器上电；
初始化模块，用于所述微处理器上电后进行系统初始化；
休眠模块，用于所述微处理器进行系统初始化后休眠，以及所述微处理器退出预设中断处理流程后休眠；
检测模块，用于所述微处理器休眠时，检测预设中断；
唤醒模块，用于所述微处理器检测到预设中断后被唤醒；以及
中断处理模块，用于所述微处理器被唤醒后进入预设中断处理流程执行预设中断处理，当所述预设中断处理完成时，退出所述预设中断处理流程；
所述中断处理模块具体包括:
获取单元，用于获取动态安全码因子；
存储单元，用于存储卡片个人化数据；
生成单元，用于根据所述获取单元获取的动态安全码因子和所述存储单元中存储的卡片个人化数据生成比特流；
分割单元，用于分割所述生成单元生成的比特流得到第一数据块和第二数据块；
加密单元，用于将所述分割单元得到的第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；还用于将异或单元得到的第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；还用于将解密单元得到的第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；
异或单元，用于对所述加密单元得到的第一数据块密文和所述分割单元得到的第二数据块进行异或运算，得到第三数据块；
解密单元，用于将所述加密单元得到的第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块；
处理单元，用于对所述加密单元得到的第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码；以及
显示单元，用于控制显示当前有效信用卡安全码。
或者，所述微处理器中包括:
上电模块，用于所述微处理器上电；
初始化模块，用于所述微处理器上电后进行系统初始化；
检查模块，用于所述微处理器进行系统初始化后检查预设中断标志是否被置位，以及所述微处理器退出中断处理流程后检查预设中断标志是否被置位；
中断处理模块，用于所述微处理器检查到预设中断标志被置位时复位预设中断标志，执行预设中断处理；
休眠模块，用于所述微处理器检查到没有中断标志被置位时休眠；
检测模块，用于所述微处理器休眠时，检测预设中断；以及
唤醒模块，用于所述微处理器检测到预设中断时被唤醒，进入预设中断处理流程将预设中断标志置位，退出预设中断处理流程；
所述中断处理模块具体包括:
获取单元，用于获取动态安全码因子；
存储单元，用于存储卡片个人化数据；
生成单元，用于根据所述获取单元获取的动态安全码因子和所述存储单元中存储的卡片个人化数据生成比特流；
分割单元，用于分割所述生成单元生成的比特流得到第一数据块和第二数据块；
加密单元，用于将所述分割单元得到的第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；还用于将异或单元得到的第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；还用于将解密单元得到的第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；
异或单元，用于对所述加密单元得到的第一数据块密文和所述分割单元得到的第二数据块进行异或运算，得到第三数据块；
解密单元，用于将所述加密单元得到的第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块；
处理单元，用于对所述加密单元得到的第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码；以及
显示单元，用于控制显示当前有效信用卡安全码。
根据本发明，其信用卡安全码是根据安全的加密算法生成且动态变换的，在使用过程中，即使当前有效的信用卡安全码被他人记住，依据该信用卡安全码也很难实现信用卡的盗刷，大大降低了因信用卡安全码泄露而导致的信用卡被盗刷的风险。
附图说明
图1为根据本发明实施例2的RTC中断处理流程图；
图2为根据本发明实施例3的按键中断处理流程图；
图3为根据本发明实施例4的按键中断处理流程图；
图4为根据本发明提供的使用预置的第一密钥对待加密数据加密的流程图；
图5为根据本发明实施例9的微处理器的方框图；
图6为根据本发明实施例10的微处理器的方框图。
具体实施方式
下面将结合附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例；在不矛盾的情况下，各实施例可互相结合。基于本发明中的实施例，本领域的技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
实施例1：
本实施例1提供一种信用卡的工作方法，所述信用卡包括微处理器以及与微处理器相连的供电电路、显示电路和通信电路。
所述信用卡的工作方法包括:
步骤S1、微处理器上电，进行系统初始化；
步骤S2、微处理器休眠，当检测到预设中断时被唤醒，执行步骤S3；以及
步骤S3、微处理器进入预设中断处理流程执行预设中断处理，当预设中断处理完成时，退出预设中断处理流程，返回步骤S2；
预设中断处理包括:
步骤a1、获取动态安全码因子，根据动态安全码因子和卡内的卡片个人化数据生成比特流，分割比特流得到第一数据块和第二数据块；
步骤a2、将第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；
步骤a3、对第一数据块密文和所述第二数据块进行异或运算，得到第三数据块；
步骤a4、将第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；
步骤a5、将第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块，将第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；以及
步骤a6、对第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码，显示当前有效信用卡安全码。
实施例2：
本实施例2提供一种信用卡的工作方法，所述信用卡包括微处理器以及与微处理器相连的供电电路、显示电路和通信电路。
所述信用卡的工作方法包括:
步骤101、微处理器上电后进行系统初始化。
本实施例2中，通过供电电路对微处理器上电；进行系统初始化包括初始化系统硬件和初始化系统变量；硬件包括IO接口、显示屏等。
步骤102、微处理器休眠，当检测到中断时被唤醒，执行步骤103。
步骤103、微处理器进入中断处理流程执行中断处理，当中断处理完成时，退出中断处理流程，返回步骤102。
本实施例2中，所述中断具体包括通信中断和RTC(实时时钟)中断:
当微处理器检测到通信中断时被唤醒，进入通信中断处理流程执行通信中断处理，当通信中断处理完成时，退出通信中断处理流程；
具体地，通信中断处理包括:微处理器接收通信数据，并根据接收到的通信数据进行卡片个人化；进一步地，根据接收到的通信数据进行卡片个人化包括:根据接收到的通信数据向卡内写入卡片个人化数据和预置密钥，其中，个人化数据包括但不限于主账号、卡有效期和服务代码序列，预置密钥包括但不限于第一预置密钥和第二预置密钥。
当微处理器检测到RTC中断时被唤醒，进入RTC中断处理流程执行RTC中断处理，当RTC中断处理完成时，退出RTC中断处理流程；
具体地，如图1所示，RTC中断处理包括:
步骤201、微处理器更新计时时间；
步骤202、微处理器判断卡片个人化是否已完成，是则执行步骤203，否则RTC中断处理完成；
进一步地，微处理器判断卡片个人化未完成时，可以显示相应提示信息；本实施例2中，微处理器通过显示电路显示相应提示信息。
步骤203、微处理器判断是否要更新信用卡安全码，是则执行步骤204，否则RTC中断处理完成；
具体地，微处理器判断计时时间是否为预设的动态安全码时间周期的整数倍，是则需要更新信用卡安全码，否则不需要更新信用卡安全码；
例如，预设的动态安全码时间周期为60秒。
步骤204、微处理器获取当前时间因子。
本实施例2中，微处理器获取当前计时时间，计算当前计时时间与通用协调时间相距的秒数，用计算所得的秒数除以预设时间窗口值，取所得商的整数部分，若所得商的整数部分不足8个数字，则在所得商的整数部分的左侧用0填充至8个数字，得到当前时间因子，若所得商的整数部分超过8个数字，则在所得商的整数部分的左侧截取8个数字，得到当前时间因子。
例如，通用协调时间为1970年1月1日0:00:00，预设时间窗口值为28800，微处理器获取的当前计时时间为2017年7月28日3:24:58，计算得到当前计时时间与通用协调时间相距的秒数为1501212298，用计算所得的秒数除以预设时间窗口值所得商的整数部分为52125，所得商的整数部分不足8个数字，在所得商的整数部分的左侧用0填充至8个数字，得到当前时间因子00052125。
步骤205、微处理器根据当前时间因子和卡片个人化数据生成比特流，分割比特流得到第一数据块和第二数据块。
本实施例2中，卡片个人化数据存储于卡片，包括但不限于主账号、卡有效期和服务代码序列；
具体地，微处理器用当前时间因子替换主账号中第一预设长度的数据，得到变换后的主账号，将变换后的主账号与卡有效期和服务代码序列依次连接，得到连接数据，在连接数据的右侧用预设数据填充，得到第二预设长度的比特流。
例如，主账号为4123456789012345，卡有效期为1704，服务代码序列为888；当前时间因子为00052125；微处理器用当前时间因子替换主账号的前8位，得到变换后的主账号0005212589012345，将变换后的主账号与卡有效期和服务代码序列依次连接，得到连接数据00052125890123451704888，在连接数据的右侧用0填充，得到长度为128比特的比特流00052125890123451704888000000000。
具体地，微处理器平均分割比特流，比特流的前64比特为第一数据块，比特流的后64比特为第二数据块；
例如，比特流00052125890123451704888000000000，则分割得到第一数据块0005212589012345，第二数据块1704888000000000。
步骤206、微处理器使用预置的第一密钥对第一数据块加密，得到第一数据块密文。
本实施例2中，微处理器使用预置的第一密钥对第一数据块加密。
例如，第一密钥为1122334455667788，第一数据块为0005212589012345；微处理器使用预置的第一密钥对第一数据块加密，得到第一数据块密文75C5587D133E88C7。
步骤207、微处理器对第一数据块密文和第二数据块进行异或运算，得到第三数据块。
例如，第一数据块密文为75C5587D133E88C7，第二数据块为1704888000000000；微处理器对第一数据块密文和第二数据块进行异或运算，得到第三数据块62C1D0FD133E88C7。
步骤208、微处理器使用预置的第一密钥对第三数据块加密，得到第三数据块密文。
例如，第一密钥为1122334455667788，第三数据块为62C1D0FD133E88C7；微处理器使用预置的第一密钥对第三数据块加密，得到第三数据块密文D2FF50C34545B875。
步骤209、微处理器使用预置的第二密钥对第三数据块密文进行解密，得到第四数据块，使用预置的第一密钥对第四数据块加密，得到第四数据块密文。
例如，第一密钥为1122334455667788，第二密钥为8877665544332211，第三数据块密文为D2FF50C34545B875；微处理器使用预置的第二密钥对第三数据块密文进行解密，得到第四数据块600F6151E9AB608D，使用预置的第一密钥对第四数据块加密，得到第四数据块密文54476FDF143C0B58。
步骤210、微处理器对第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码，显示当前有效信用卡安全码，RTC中断处理完成。
本实施例2中，微处理器通过显示电路显示当前有效信用卡安全码。
本实施例2中，微处理器对第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码，具体包括:
步骤210-1、微处理器从第四数据块密文的左侧开始，抽取第四数据块密文中所有第一数据到第二数据之间的数字，得到第一抽取数据；从第四数据块密文的左侧开始，抽取第四数据块密文中所有第三数据到第四数据之间的数字，得到第二抽取数据；
步骤210-2、微处理器将第二抽取数据中的每个数字用其与第五数据的差替换，得到转换后的第二抽取数据；
步骤210-3、微处理器将第一抽取数据和转换后的第二抽取数据顺序拼接，得到处理结果；
步骤210-4、微处理器截取处理结果的前3个数字，作为当前有效信用卡安全码。
例如，第四数据块密文为54476FDF143C0B58；微处理器从第四数据块密文的左侧开始，抽取第四数据块密文中所有’0’到’9’之间的数字，得到第一抽取数据54476143058；从第四数据块密文的左侧开始，抽取第四数据块密文中所有’A’到’F’之间的数字，得到第二抽取数据FDFCB；将第二抽取数据中的每个数字用其与10的差替换，得到转换后的第二抽取数据53521；将第一抽取数据和转换后的第二抽取数据顺序拼接，得到处理结果5447614305853521；微处理 器截取处理结果的前3个数字544，作为当前有效信用卡安全码。
实施例3：
本实施例3提供一种信用卡的工作方法，所述信用卡包括微处理器以及与微处理器相连的供电电路、显示电路和通信电路。
所述信用卡的工作方法包括:
步骤101、微处理器上电后进行系统初始化。
本实施例3中，通过供电电路对微处理器上电；进行系统初始化包括初始化系统硬件和初始化系统变量；硬件包括IO接口、显示屏等。
步骤102、微处理器休眠，待检测到中断时被唤醒，执行步骤103。
步骤103、微处理器进入中断处理流程执行中断处理，当中断处理完成时，退出中断处理流程，返回步骤102。
本实施例3中所述中断具体包括通信中断、RTC中断和按键中断:
当微处理器检测到通信中断时被唤醒，进入通信中断处理流程执行通信中断处理，当通信中断处理完成时，退出通信中断处理流程；
具体地，通信中断处理包括:微处理器接收通信数据，并根据接收到的通信数据进行卡片个人化；进一步地，根据接收到的通信数据进行卡片个人化包括:根据接收到的通信数据向卡内写入卡片个人化数据和预置密钥，其中，个人化数据包括但不限于主账号、卡有效期和服务代码序列，预置密钥包括但不限于第一预置密钥和第二预置密钥。
当微处理器检测到RTC中断时被唤醒，进入RTC中断处理流程执行RTC中断处理，当RTC中断处理完成时，退出RTC中断处理流程；
具体地，RTC中断处理包括:微处理器更新计时时间。
当微处理器检测到按键中断时被唤醒，进入按键中断处理流程执行按键中断处理，当按键中断处理完成时，退出按键中断处理流程；
具体地，如图2所示，按键中断处理包括:
步骤301、微处理器判断卡片个人化是否已完成，是则执行步骤302，否则按键中断处理完成；
进一步地，微处理器判断卡片个人化未完成时，可以显示相应提示信息；本实施例3中，微处理器通过显示电路显示相应提示信息。
步骤302、微处理器获取当前时间因子。
步骤303、微处理器根据当前时间因子和卡片个人化数据生成比特流，分割比特流得到第一数据块和第二数据块。
步骤304、微处理器使用预置的第一密钥对第一数据块加密，得到第一数据块密文。
步骤305、微处理器对第一数据块密文和第二数据块进行异或运算，得到第三数据块。
步骤306、微处理器使用预置的第一密钥对第三数据块加密，得到第三数据块密文。
步骤307、微处理器使用预置的第二密钥对第三数据块密文进行解密，得到第四数据块，使用预置的第一密钥对第四数据块加密，得到第四数据块密文。
步骤308、微处理器对第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码，显示当前有效信用卡安全码，按键中断处理完成。
本实施例3中，微处理器通过显示电路显示当前有效信用卡安全码。
本实施例3中，步骤302-308的具体实现可参考实施例2中的步骤204-210，在此不再赘述。
实施例4：
本实施例4提供一种信用卡的工作方法，所述信用卡包括微处理器以及与微处理器相连的供电电路、显示电路和通信电路。
所述信用卡的工作方法包括:
步骤101、微处理器上电后进行系统初始化。
本实施例4中，通过供电电路对微处理器上电；进行系统初始化包括初始化系统硬件和初始化系统变量；硬件包括IO接口、显示屏等。
步骤102、微处理器休眠，待检测到中断时被唤醒，执行步骤103。
步骤103、微处理器进入中断处理流程执行中断处理，当中断处理完成时，退出中断处理流程，返回步骤102。
本实施例4中所述的中断具体包括通信中断和按键中断:
当微处理器检测到通信中断时被唤醒，进入通信中断处理流程执行通信中断处理，当通信中断处理完成时，退出通信中断处理流程；
具体地，通信中断处理包括:微处理器接收通信数据，并根据接收到的通信数据进行卡片个人化；进一步地，根据 接收到的通信数据进行卡片个人化包括:根据接收到的通信数据向卡内写入卡片个人化数据、预置密钥和初始按键次数，其中，个人化数据包括但不限于主账号、卡有效期和服务代码序列，预置密钥包括但不限于第一预置密钥和第二预置密钥。
当微处理器检测到按键中断时被唤醒，进入按键中断处理流程执行按键中断处理，当按键中断处理完成时，退出按键中断处理流程；
具体地，如图3所示，按键中断处理包括:
步骤401、微处理器更新按键次数；
步骤402、微处理器判断卡片个人化是否已完成，是则执行步骤403，否则按键中断处理完成；
进一步地，微处理器判断卡片个人化未完成时，可以显示相应提示信息；本实施例4中，微处理器通过显示电路显示相应提示信息。
步骤403、微处理器获取当前事件因子；
本实施例4中，微处理器获取当前按键次数，若当前按键次数不足8个数字，则在当前按键次数的左侧用0填充至8个数字，得到当前事件因子，若当前按键次数为8个数字或超过8个数字，则将当前按键次数作为当前事件因子。
步骤404、微处理器根据当前事件因子和卡片个人化数据生成比特流，分割比特流得到第一数据块和第二数据块。
本实施例4中，卡片个人化数据存储于卡片，包括但不限于主账号、卡有效期和服务代码序列；
具体地，微处理器用当前事件因子替换主账号的前8位，得到变换后的主账号，将变换后的主账号与卡有效期和服务代码序列依次连接，得到连接数据，在连接数据的右侧用0填充，得到长度为128比特的比特流。
例如，主账号为4123456789012345，卡有效期为1704，服务代码序列为888；当前事件因子为00052125；微处理器用当前时间因子替换主账号的前8位，得到变换后的主账号0005212589012345，将变换后的主账号与卡有效期和服务代码序列依次连接，得到连接数据00052125890123451704888，在连接数据的右侧用0填充，得到长度为128比特的比特流00052125890123451704888000000000。
具体地，微处理器平均分割比特流，比特流的前64比特为第一数据块，比特流的后64比特为第二数据块；
例如，比特流00052125890123451704888000000000，则分割得到第一数据块0005212589012345，第二数据块1704888000000000。
步骤405、微处理器使用预置的第一密钥对第一数据块加密，得到第一数据块密文。
步骤406、微处理器对第一数据块密文和第二数据块进行异或运算，得到第三数据块。
步骤407、微处理器使用预置的第一密钥对第三数据块加密，得到第三数据块密文。
步骤408、微处理器使用预置的第二密钥对第三数据块密文进行解密，得到第四数据块，使用预置的第一密钥对第四数据块加密，得到第四数据块密文。
步骤409、微处理器对第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码，显示当前有效信用卡安全码，按键中断处理完成。
本实施例4中，微处理器通过显示电路显示当前有效信用卡安全码。
本实施例4中，步骤405-409的具体实现可参见实施例2中的步骤206-210，在此不再赘述。
本发明中，更新计时时间可以具体为更新计时时间为其当前值加1秒；更新按键次数可以具体为更新按键次数为其当前值加1次。
实施例5：
本实施例5提供一种信用卡的工作方法，所述信用卡包括微处理器以及与微处理器相连的供电电路、显示电路和通信电路。
所述信用卡的工作方法包括:
步骤s1、微处理器上电，进行系统初始化；
步骤s2、微处理器检查预设中断标志是否被置位，是则复位预设中断标志，执行预设中断处理，否则执行步骤s3；以及
步骤s3、微处理器休眠，当检测到预设中断时被唤醒，进入预设中断处理流程将预设中断标志置位，退出预设中断处理流程，返回步骤s2；
预设中断处理包括:
步骤s2-1、获取动态安全码因子，根据动态安全码因子和卡内的卡片个人化数据生成比特流，分割比特流得到第一数据块和第二数据块；
步骤s2-2、将第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；
步骤s2-3、对第一数据块密文和第二数据块进行异或运算，得到第三数据块；
步骤s2-4、将第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；
步骤s2-5、将第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块，将第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；以及
步骤s2-6、对第四数据块密文进行抽取、转换和排序，将处理结果的预设部分作为当前有效信用卡安全码，显示当前有效信用卡安全码。
实施例6：
本实施例6提供一种信用卡的工作方法，所述信用卡包括微处理器以及与微处理器相连的供电电路、显示电路和通信电路。
所述信用卡的工作方法包括:
步骤501、微处理器上电后进行系统初始化。
本实施例6中，通过供电电路对微处理器上电；进行系统初始化包括初始化系统硬件和初始化系统变量；硬件包括IO接口、显示屏等。
步骤502、微处理器检查中断标志是否被置位，是则复位中断标志，执行中断处理，否则执行步骤503；
步骤1、微处理器检查通信中断标志是否被置位，是则复位通信中断标志，执行通信中断处理，执行步骤2，否则执行步骤2；
步骤2、微处理器检查RTC中断标志是否被置位，是则复位RTC中断标志，执行RTC中断处理，执行步骤503，否则执行步骤503；
本实施例6中通信中断处理和RTC中断处理包括的内容与实施例2中相同，在此不再赘述。
进一步地，本实施例6还可以先检查RTC中断标志是否被置位，再检查通信中断标志是否被置位。
步骤503、微处理器休眠，当检测到中断时被唤醒，将中断标志置位，返回步骤502。
具体地，本实施例6中，微处理器检测到通信中断或RTC中断时被唤醒；当微处理器检测到通信中断被唤醒时，进入通信中断处理流程，将通信中断标志置位，退出通信中断处理流程；当微处理器检查到RTC中断被唤醒时，进入RTC中断处理流程，将RTC中断标志置位，退出RTC中断处理流程。
本发明中，更新计时时间可以具体为更新计时时间为其当前值加1秒；更新按键次数可以具体为更新按键次数为其当前值加1次。
实施例7：
本实施例7提供一种信用卡的工作方法，所述信用卡包括微处理器以及与微处理器相连的供电电路、显示电路和通信电路。
所述信用卡的工作方法包括:
步骤501、微处理器上电后进行系统初始化。
本实施例7中，通过供电电路对微处理器上电；进行系统初始化包括初始化系统硬件和初始化系统变量；硬件包括IO接口、显示屏等。
步骤502、微处理器检查中断标志是否被置位，是则复位中断标志，执行中断处理，执行步骤503，否则执行步骤503；
本实施例7中所述中断具体包括通信中断、RTC中断和按键中断，优选地，步骤502具体包括:
步骤1、微处理器检查通信中断标志是否被置位，是则复位通信中断标志，执行通信中断处理，执行步骤2，否则执行步骤2；
步骤2、微处理器检查按键中断标志是否被置位，是则复位按键中断标志，执行按键中断处理，执行步骤3，否则执行步骤3；
步骤3、微处理器检查RTC中断标志是否被置位，是则复位RTC中断标志，执行RTC中断处理，执行步骤503，否则执行步骤503；
本实施例7中通信中断处理、RTC中断处理和按键中断处理包括的内容与实施例3中相同，在此不再赘述。
进一步地，本实施例7中还可以依照其他顺序检查各中断标志是否被置位，在此也不再赘述。
步骤503、微处理器休眠，当检测到中断时被唤醒，将中断标志置位，返回步骤502。
具体地，本实施例7中，微处理器检测到通信中断或按键中断或RTC中断时被唤醒；当微处理器检测到通信中断被唤醒时，进入通信中断处理流程，将通信中断标志置位，退出通信中断处理流程；当微处理器检查到按键中断被唤醒时，进入按键中断处理流程，将按键中断标志置位，退出按键中断处理流程；当微处理器检测到RTC中断被唤醒时，进入RTC中断处理流程，将RTC中断标志置位，退出RTC中断处理流程。
实施例8：
本实施例8提供一种信用卡的工作方法，所述信用卡包括微处理器以及与微处理器相连的供电电路、显示电路和通信电路。
所述信用卡的工作方法包括:
步骤501、微处理器上电后进行系统初始化。
本实施例8中，通过供电电路对微处理器上电；进行系统初始化包括初始化系统硬件和初始化系统变量；硬件包括IO接口、显示屏等。
步骤502、微处理器检查中断标志是否被置位，是则复位中断标志，执行中断处理，执行步骤503，否则执行步骤503；
本实施例8中所述的中断具体包括通信中断和按键中断，优选地，步骤502具体包括:
步骤1、微处理器检查通信中断标志是否被置位，是则复位通信中断标志，执行通信中断处理，执行步骤2，否则执行步骤2；
步骤2、微处理器检查按键中断标志是否被置位，是则复位按键中断标志，执行按键中断处理，执行步骤503，否则执行步骤503；
本实施例8中，通信中断处理和按键中断处理包括的内容与实施例4中相同，在此不再赘述。
进一步地，本实施例8还可以先检查按键中断标志是否被置位，再检查通信中断标志是否被置位。
步骤503、微处理器休眠，当检测到中断时被唤醒，将中断标志置位，返回步骤502。
具体地，本实施例8中，微处理器检测到通信中断或按键中断时被唤醒；当微处理器检测到通信中断被唤醒时，进入通信中断处理流程，将通信中断标志置位，退出通信中断处理流程；当微处理器检查到按键中断被唤醒时，进入按键中断处理流程，将按键中断标志置位，退出按键中断处理流程。
优选地，本发明中，以第一数据块、第三数据块或第四数据块为待加密数据，使用预置的第一密钥对待加密数据加密可如图4所示，具体包括:
步骤a、根据第一密钥创建子密钥；
优选地，微处理器执行以下步骤创建子密钥:
步骤a1、对第一密钥的位数据进行重新排列；
具体地，以第一预设列表中数字为位数据的序号，按照第一预设列表列出的顺序对第一密钥的位数据进行重新排列；
例如，第一预设列表为:
Figure PCTCN2018117819-appb-000001
第一密钥为00010011 00110100 01010111 01111001 10011011 10111100 11011111 11110001，则重新排列后的第一密钥为1111000 0110011 0010101 0101111 0101010 1011001 1001111 0001111；
步骤a2、分割重新排列后的第一密钥得到第一密钥数据块C0和第二密钥数据块D0；
具体地，平均分割重新排列后的第一密钥；
例如，重新排列后的第一密钥为1111000 0110011 0010101 0101111 0101010 1011001 1001111 0001111，分割得到的第一密钥数据块C0为1111000 0110011 0010101 0101111，第二密钥数据块D0为0101010 1011001 1001111 0001111；
步骤a3、对第一密钥数据块C0进行循环左移，得到第一子密钥数据块Cn；对第二密钥数据块D0进行循环左移，得到和第一子密钥数据块Cn对应的第二子密钥数据块Dn；
具体地，将Cn-1循环左移指定次数，得到第一子密钥数据块Cn；将Dn-1循环左移指定次数，得到第二子密钥数据块Dn；n依次取值1至16；当n取值1、2、9、16时，循环左移1次；当n取值为3、4、5、6、7、8、10、11、12、13、14、15时，循环左移2次；
步骤a4、将第一子密钥数据块Cn与和第一子密钥数据块Cn对应的第二子密钥数据块Dn拼接，得到子密钥数据块CnDn；
具体地，将得到的Cn和Dn对应拼接；n依次取值1至16；
步骤a5、对子密钥数据块CnDn的位数据进行选择和排列，得到子密钥Kn；
具体地，以第二预设列表中数字为位数据的序号，按照第二预设列表列出的顺序对子密钥数据块CnDn的位数据进行选择和排列；
例如，第一密钥数据块C0为1111000 0110011 0010101 0101111，第二密钥数据块D0为0101010 1011001 10011110001111，依次循环左移得到:
C1＝1110000110011001010101011111
D1＝1010101011001100111100011110
C2＝1100001100110010101010111111
D2＝0101010110011001111000111101
C3＝0000110011001010101011111111
D3＝0101011001100111100011110101
C4＝0011001100101010101111111100
D4＝0101100110011110001111010101
C5＝1100110010101010111111110000
D5＝0110011001111000111101010101
C6＝0011001010101011111111000011
D6＝1001100111100011110101010101
C7＝1100101010101111111100001100
D7＝0110011110001111010101010110
C8＝0010101010111111110000110011
D8＝1001111000111101010101011001
C9＝0101010101111111100001100110
D9＝0011110001111010101010110011
C10＝0101010111111110000110011001
D10＝1111000111101010101011001100
C11＝0101011111111000011001100101
D11＝1100011110101010101100110011
C12＝0101111111100001100110010101
D12＝0001111010101010110011001111
C13＝0111111110000110011001010101
D13＝0111101010101011001100111100
C14＝1111111000011001100101010101
D14＝1110101010101100110011110001
C15＝1111100001100110010101010111
D15＝1010101010110011001111000111
C16＝1111000011001100101010101111
D16＝0101010101100110011110001111
对应拼接得到:
C1D1＝11100001100110010101010111111010101011001100111100011110
C2D2＝11000011001100101010101111110101010110011001111000111101
C3D3＝00001100110010101010111111110101011001100111100011110101
C4D4＝00110011001010101011111111000101100110011110001111010101
C5D5＝11001100101010101111111100000110011001111000111101010101
C6D6＝00110010101010111111110000111001100111100011110101010101
C7D7＝11001010101011111111000011000110011110001111010101010110
C8D8＝00101010101111111100001100111001111000111101010101011001
C9D9＝01010101011111111000011001100011110001111010101010110011
C10D10＝01010101111111100001100110011111000111101010101011001100
C11D11＝01010111111110000110011001011100011110101010101100110011
C12D12＝01011111111000011001100101010001111010101010110011001111
C13D13＝01111111100001100110010101010111101010101011001100111100
C14D14＝11111110000110011001010101011110101010101100110011110001
C15D15＝11111000011001100101010101111010101010110011001111000111
C16D16＝11110000110011001010101011110101010101100110011110001111
例如，第二预设列表为:
Figure PCTCN2018117819-appb-000002
Figure PCTCN2018117819-appb-000003
按照第二预设表选择和排列后得到子密钥:
K1＝000110 110000 001011 101111 111111 000111 000001 110010；
K2＝011110 011010 111011 011001 110110 111100 100111 100101
K3＝010101 011111 110010 001010 010000 101100 111110 011001
K4＝011100 101010 110111 010110 110110 110011 010100 011101
K5＝011111 001110 110000 000111 111010 110101 001110 101000
K6＝011000 111010 010100 111110 010100 000111 101100 101111
K7＝111011 001000 010010 110111 111101 100001 100010 111100
K8＝111101 111000 101000 111010 110000 010011 101111 111011
K9＝111000 001101 101111 101011 111011 011110 011110 000001
K10＝101100 011111 001101 000111 101110 100100 011001 001111
K11＝001000 010101 111111 010011 110111 101101 001110 000110
K12＝011101 010111 000111 110101 100101 000110 011111 101001
K13＝100101 111100 010111 010001 111110 101011 101001 000001
K14＝010111 110100 001110 110111 111100 101110 011100 111010
K15＝101111 111001 000110 001101 001111 010011 111100 001010
K16＝110010 110011 110110 001011 000011 100001 011111 110101
步骤b、对待加密数据的位数据进行重新排列；
具体地，以第三预设列表中数字为位数据的序号，按照第三预设列表列出的顺序对待加密数据的位数据进行重新排列；
例如，第三预设列表为:
Figure PCTCN2018117819-appb-000004
待加密数据为0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111，则重新排列后的待加密数据为1100 1100 0000 0000 1100 1100 1111 1111 1111 0000 1010 1010 1111 0000 1010 1010；
步骤c、分割重新排列后的待加密数据得到第一中间数据块L0和第二中间数据块R0；
具体地，平等分割重新排列后的待加密数据；
例如，重新排列后的待加密数据为1100 1100 0000 0000 1100 1100 1111 1111 1111 0000 1010 1010 1111 0000 10101010，分割得到的第一中间数据块L0为1100 1100 0000 0000 1100 1100 1111 1111，第二中间数据块R0为1111 00001010 1010 1111 0000 1010 1010；
步骤d、根据创建的子密钥对第一中间数据块L0和第二中间数据块R0做迭代运算，得到第三中间数据块L16和第四中间数据块R16；
具体地，微处理器对第一中间数据块L0和第二中间数据块R0进行16次迭代，每次迭代包括:用Rn-1为Ln赋值，根据预设扩展表对Rn-1进行扩展，扩展后的Rn-1与子密钥Kn进行异或，并按照预设序列对异或所得结果进行分组转换，根据第三预设列表对分组转换结果进行转置，转置结果与Ln-1异或，得到Rn；n依次取值1至16；
根据预设扩展表对Rn-1进行扩展，优选为以预设扩展表中数字为位数据的序号，按照预设扩展表列出的顺序对Rn-1的位数据进行扩展和排列；
按照预设序列对异或所得进行分组转换，优选为对异或所得进行分组(优选为6位一组)，依据分组所得的每组数据分别进行计算，在每组数据对应的预设列表中查找与计算结果对应的数据，将查找到的数据转换为二进制数后顺序拼接得到分组转换结果；
根据第四预设列表对分组转换结果进行转置，优选为以第四预设列表中的数字为位数据的序号，按照第四预设列表列出的顺序对分组转换结果的位数据进行重新排列；
例如，R0为1111 0000 1010 1010 1111 0000 1010 1010，L0为1100 1100 0000 0000 1100 1100 1111 1111，预设扩展表为:
Figure PCTCN2018117819-appb-000005
Figure PCTCN2018117819-appb-000006
子密钥K1为000110 110000 001011 101111 111111 000111 000001 110010，对异或所得结果进行分组时每6位为一组，共分为8组，与各组对应的预设列表依次为:
预设列表S1:
Figure PCTCN2018117819-appb-000007
预设列表S2:
Figure PCTCN2018117819-appb-000008
预设列表S3:
Figure PCTCN2018117819-appb-000009
预设列表S4:
Figure PCTCN2018117819-appb-000010
预设列表S5:
Figure PCTCN2018117819-appb-000011
预设列表S6:
Figure PCTCN2018117819-appb-000012
预设列表S7:
Figure PCTCN2018117819-appb-000013
预设列表S8:
Figure PCTCN2018117819-appb-000014
第四预设列表为:
Figure PCTCN2018117819-appb-000015
Figure PCTCN2018117819-appb-000016
则当n取值1时，用R0为L1赋值，得到L1＝1111 0000 1010 1010 1111 0000 1010 1010，根据预设扩展表对R0进行扩展，扩展后的R0为011110 100001 010101 010101 011110 100001 010101 010101，与K1进行异或所得为011000010001 011110 111010 100001 100110 010100 100111，对异或所得进行分组得到8组数据:011000、010001、011110、111010、100001、100110、010100、100111，将每组数据的第1位和第6位拼接后转换为十进制，得到行序0、1、0、2、3、2、0、3，将每组数据的第2至5位拼接后转换为十进制，得到列序12、8、15、13、0、3、10、3，查找第预设列表S1的第0行第12列，得到数据5，查找预设列表S2的第1行第8列，得到数据12，查找预设列表S3的第0行第15列，得到数据8，查找预设列表S4的第2行第13列，得到数据2，查找预设列表S5的第3行第0列，得到数据11，查找预设列表S6的第2行第3列，得到数据5，查找预设列表S7的第0行第10列，得到数据9，查找预设列表S8的第3行第3列，得到数据7，将查找得到的数据转换为二进制数后顺序拼接得到分组转换结果0101 1100 1000 00101011 0101 1001 0111，按照第四预设列表列出的顺序对分组转换结果的位数据进行重新排列得到转置结果0010 00110100 1010 1010 1001 1011 1011，转置结果与L0异或，得到第一次迭代运算结果1110 1111 0100 1010 0110 0101 0100 0100。
步骤e、将第四中间数据块和第三中间数据块拼接后进行转置，并对转置结果做进制转换，得到待加密数据密文；
具体地，顺序拼接第四中间数据块和第三中间数据块，以第五预设列表中数字为位数据的序号，按照第五预设列表列出的顺序对拼接所得数据的位数据进行重新排列，得到转置结果，将转置结果转换为十六进制，得到待加密数据密文；
例如，第五预设列表为:
Figure PCTCN2018117819-appb-000017
第三数据块为0100 0011 0100 0010 0011 0010 0011 0100，第四数据块为0000 1010 0100 1100 1101 1001 1001 0101，顺序拼接第四中间数据块和第三中间数据块所得的数据为00001010 01001100 11011001 10010101 01000011 0100001000110010 00110100，按照第五预设列表列出的顺序对拼接所得数据的位数据进行重新排列，得到转置结果1000010111101000 00010011 01010100 00001111 00001010 10110100 00000101，转换为十六进制，得到第二密文数据85E813540F0AB405。
相应地，本发明中，以第三数据块密文为待解密数据，使用预置的第二密钥对待解密数据解密可具体包括:
步骤f、根据第二密钥创建子密钥；
优选地，微处理器执行以下步骤创建子密钥:
步骤f1、对第二密钥的位数据进行重新排列；
具体地，以第一预设列表中数字为位数据的序号，按照第一预设列表列出的顺序对第二密钥的位数据进行重新排列；
步骤f2、分割重新排列后的第二密钥得到第三密钥数据块C'0和第四密钥数据块D'0；
具体地，平均分割重新排列后的第二密钥；
步骤f3、对第三密钥数据块C'0进行循环左移，得到第三子密钥数据块C'n；对第四密钥数据块D'0进行循环左移，得到和第三子密钥数据块C'n对应的第四子密钥数据块D'n；
具体地，将C'n-1循环左移指定次数，得到第一子密钥数据块C'n；将D'n-1循环左移指定次数，得到第二子密钥数据块D'n；n依次取值1至16；当n取值1、2、9、16时，循环左移1次；当n取值为3、4、5、6、7、8、10、11、12、13、14、15时，循环左移2次；
步骤f4、将第三子密钥数据块C'n与和第三子密钥数据块C'n对应的第四子密钥数据块D'n拼接，得到子密钥数据块C'nD'n；
具体地，将得到的C'n和D'n对应拼接，n依次取值1至16；
步骤f5、对子密钥数据块C'nD'n的位数据进行选择和排列，得到子密钥K'n；
具体地，以第二预设列表中数字为位数据的序号，按照第二预设列表列出的顺序对子密钥数据块C'nD'n的位数据进行选择和排列，n依次取值1至16；
步骤g、对待解密数据的位数据进行重新排列；
本发明中，待解密数据包括上述第三数据块密文；
具体地，以第三预设列表中数据为位数据的序号，按照第三预设列表列出的顺序对待解密数据的位数据进行重新排列；
步骤h、分割重新排列后的待解密数据得到第五中间数据块L'0和第六中间数据块R'0；
具体地，平等分割重新排列后的待解密数据；
步骤i、对第五中间数据块L'0和第六中间数据块R'0做迭代运算，得到第七中间数据块L'16和第八中间数据块R'16；
具体地，微处理器对第五中间数据块L'0和第六中间数据块R'0进行16次迭代，每次迭代包括:用R'n-1为L'n赋值，根据预设扩展表对R'n-1进行扩展，扩展后的R'n-1与子密钥K'16-n进行异或，并按照预设序列对异或所得进行分组转换，根据第三预设列表对分组转换结果进行转置，转置结果与L'n-1异或，得到R'n；n依次取值1至16；
根据预设扩展表对R'n-1进行扩展，优选为以预设扩展表中数字为位数据的序号，按照预设扩展表列出的顺序对R'n-1的位数据进行扩展和排列；
按照预设序列对异或所得进行分组转换，优选为对异或所得进行分组(优选为6位一组)，依据分组所得的每组数据分别进行计算，在每组数据对应的预设列表中查找与计算结果对应的数据，将查找到的数据转换为二进制数后顺序拼接得到分组转换结果；
根据第四预设列表对分组转换结果进行转置，优选为以第四预设列表中的数字为位数据的序号，按照第四预设列表列出的顺序对分组转换结果的位数据进行重新排列；
步骤j、将第八中间数据块和第七中间数据块拼接后按照第五预设列表进行转置，并对转置结果做进制转换，得到待解密数据明文；
具体地，顺序拼接第八中间数据块和第七中间数据块，以第五预设列表中数字为位数据的序号，按照第五预设列表列出的顺序对拼接所得数据的位数据进行重新排列，得到转置结果，将转置结果转换为十六进制，得到待解密数据明文。
实施例9：
本实施例9提供一种信用卡，所述信用卡内设置有微处理器，如图5所示，所述微处理器中包括:
上电模块601，用于微处理器上电；
初始化模块602，用于微处理器上电后进行系统初始化；
休眠模块603，用于微处理器进行系统初始化后休眠；
检测模块604，用于微处理器休眠时，检测预设中断；
唤醒模块605，用于微处理器检测到预设中断后被唤醒；
中断处理模块606，用于微处理器被唤醒后进入预设中断处理流程执行预设中断处理，当预设中断处理完成时，退出预设中断处理流程；以及
休眠模块603，还用于微处理器退出预设中断处理流程后休眠。
其中，中断处理模块606具体包括:
获取单元，用于获取动态安全码因子；
存储单元，用于存储卡片个人化数据；
生成单元，用于根据获取单元获取的动态安全码因子和存储单元中存储的卡片个人化数据生成比特流；
分割单元，用于分割生成单元生成的比特流得到第一数据块和第二数据块；
加密单元，用于将分割单元得到的第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；
异或单元，用于对加密单元得到的第一数据块密文和分割单元得到的第二数据块进行异或运算，得到第三数据块；
加密单元，还用于将异或单元得到的第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；
解密单元，用于将加密单元得到的第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块；
加密单元，还用于将解密单元得到的第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；
处理单元，用于对加密单元得到的第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码；以及
显示单元，用于控制显示当前有效信用卡安全码。
本实施例9中，检测模块604，具体用于微处理器休眠时，检测实时时钟中断；
相应地，唤醒模块605，具体用于微处理器检测到实时时钟中断后被唤醒；中断处理模块606，具体用于微处理器被唤醒后进入实时时钟中断处理流程执行实时时钟中断处理，当实时时钟中断处理完成时，退出实时时钟中断处理流程。
进一步地，中断处理模块606还可以包括更新单元和判断单元:
更新单元，用于更新计时时间；
判断单元，用于判断是否要更新信用卡安全码；
相应地，获取单元，具体用于判断单元判断要更新信用卡安全码时根据计时时间获取当前时间因子。
或者，本实施例9中，检测模块604，具体用于微处理器休眠时，检测按键中断；
相应地，唤醒模块605，具体用于微处理器检测到按键中断后被唤醒；中断处理模块606，具体用于微处理器被唤醒后进入按键中断处理流程执行按键中断处理，当按键中断处理完成时，退出按键中断处理流程。
进一步地，中断处理模块606还可以包括更新单元:
更新单元，用于更新按键次数；
相应地，获取单元，具体用于根据按键次数获取当前事件因子。
又或者，本实施例9中，检测模块604，具体用于微处理器休眠时，检测按键中断和实时时钟中断，相应地:
唤醒模块605，具体用于微处理器检测到按键中断或实时时钟中断后被唤醒；
中断处理模块606，具体用于微处理器检测到按键中断后被唤醒时进入按键中断处理流程执行按键中断处理，当按键中断处理完成时，退出按键中断处理流程，以及微处理器检测到实时时钟中断后被唤醒时进入实时时钟中断处理流程执行实时时钟中断处理，当实时时钟中断处理完成时，退出实时时钟中断处理流程；
中断处理模块606还包括:实时时钟中断处理单元，用于更新计时时间；
相应地，获取单元，具体用于根据计时时间获取当前时间因子。
本实施例9中，检测模块604，还用于微处理器休眠时，检测通信中断，相应地:
唤醒模块605，还用于微处理器检测到通信中断后被唤醒；
中断处理模块606，还用于微处理器检测到通信中断后被唤醒时进入通信中断处理流程执行通信中断处理，当通信中断处理完成时，退出通信中断处理流程；
中断处理模块606还包括通信中断处理单元和判断单元；其中，通信中断处理单元，用于接收通信数据，并根据接收到的通信数据进行卡片个人化；判断单元，用于判断卡片个人化是否已完成。相应地，获取单元，具体用于当判断单元判断卡片个人化已完成时，获取动态安全码因子。
进一步地，通信中断处理单元，可以具体用于接收通信数据，并根据接收到的通信数据向存储单元中写入卡片个人化数据和预置密钥。
更进一步地，通信中断处理单元，可以具体用于接收通信数据，并根据接收到的通信数据向存储单元中写入主账号、卡有效期、服务代码序列和预置密钥；
相应地，生成单元，具体用于用获取单元获取的动态安全码因子替换存储单元中存储的主账号中第一预设长度的数据，得到变换后的主账号，将变换后的主账号与卡有效期和服务代码序列依次连接，得到连接数据，在连接数据的右侧用预设数据填充，得到第二预设长度的比特流。
本实施例9中，分割单元，可以具体用于平均分割生成单元生成的比特流得到第一数据块和第二数据块。
本实施例9中，处理单元，可以具体用于从加密单元得到的第四数据块密文的左侧开始，抽取第四数据块密文中所有第一数据到第二数据之间的数字，得到第一抽取数据，从第四数据块密文的左侧开始，抽取第四数据块密文中所有第三数据到第四数据之间的数字，得到第二抽取数据；将第二抽取数据中的每个数字替换为该数字与第五数据的差，得到转换后的第二抽取数据；将第一抽取数据和所述转换后的第二抽取数据顺序拼接，得到处理结果。
本实施例9中，通信中断处理单元向存储单元中写入的预置密钥包括第一密钥；
加密单元具体包括:
创建子单元，用于根据第一密钥创建子密钥；
排列子单元，用于对待加密数据的位数据进行重新排列；
分割子单元，用于分割重新排列后的待加密数据得到第一中间数据块和第二中间数据块；
迭代子单元，用于根据创建子单元创建的子密钥对分割子单元得到的第一中间数据块和第二中间数据块做迭代运算，得到第三中间数据块和第四中间数据块；
转置子单元，用于将迭代子单元得到的第四中间数据块和第三中间数据块拼接后进行转置，并对转置结果做进制转换，得到待加密数据密文；
进一步地，创建子单元，具体用于对第一密钥的位数据进行重新排列；分割重新排列后的第一密钥得到第一密钥数据块和第二密钥数据块；对第一密钥数据块进行循环左移，得到第一子密钥数据块；对第二密钥数据块进行循环左移，得到和第一子密钥数据块对应的第二子密钥数据块；将第一子密钥数据块与和第一子密钥数据块对应的第二子密钥数据块拼接，得到子密钥数据块；对子密钥数据块的位数据进行选择和排列，得到子密钥。
本实施例9中，通信中断处理单元向存储单元中写入的预置密钥还包括第二密钥；
解密单元具体包括:
创建子单元，用于根据第二密钥创建子密钥；
排列子单元，用于对待解密数据的位数据进行重新排列；
分割子单元，用于分割重新排列后的待解密数据得到第五中间数据块和第六中间数据块；
迭代子单元，用于对分割子单元得到的第五中间数据块和第六中间数据块做迭代运算，得到第七中间数据块和第八中间数据块；以及
转置子单元，用于将迭代子单元得到的第八中间数据块和第七中间数据块拼接后进行转置，并对转置结果做进制转换，得到待解密数据明文。
进一步地，创建子单元，具体用于对第二密钥的位数据进行重新排列；分割重新排列后的第二密钥得到第三密钥数据块和第四密钥数据块；对第三密钥数据块进行循环左移，得到第三子密钥数据块；对第四密钥数据块进行循环左移，得到和第三子密钥数据块对应的第四子密钥数据块；将第三子密钥数据块与和第三子密钥数据块对应的第四子密钥数据块拼接，得到子密钥数据块；对子密钥数据块的位数据进行选择和排列，得到子密钥。
实施例10：
本实施例10提供一种信用卡，所述信用卡内设置有微处理器，如图6所示，所述微处理器中包括:
上电模块701，用于微处理器上电；
初始化模块702，用于微处理器上电后进行系统初始化；
检查模块703，用于所述微处理器进行系统初始化后检查预设中断标志是否被置位；
中断处理模块704，用于微处理器检查到预设中断标志被置位时复位预设中断标志，执行预设中断处理；
休眠模块705，用于微处理器检查到没有中断标志被置位时休眠；
检测模块706，用于微处理器休眠时，检测预设中断；以及
唤醒模块707，用于微处理器检测到预设中断时被唤醒，进入预设中断处理流程将预设中断标志置位，退出预设中断处理流程；
检查模块703，还用于微处理器退出中断处理流程后检查预设中断标志是否被置位；
其中，中断处理模块具体包括:
获取单元，用于获取动态安全码因子；
存储单元，用于存储卡片个人化数据；
生成单元，用于根据获取单元获取的动态安全码因子和存储单元中存储的卡片个人化数据生成比特流；
分割单元，用于分割生成单元生成的比特流得到第一数据块和第二数据块；
加密单元，用于将分割单元得到的第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；还用于将异或单元得到的第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；还用于将解密单元得到的第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；
异或单元，用于对加密单元得到的第一数据块密文和分割单元得到的第二数据块进行异或运算，得到第三数据块；
解密单元，用于将加密单元得到的第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块；
处理单元，用于对加密单元得到的第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码；以及
显示单元，用于控制显示当前有效信用卡安全码。
本实施例10中，检查模块703，具体用于微处理器进行系统初始化后检查实时时钟中断标志是否被置位，以及微处理器退出中断处理流程后检查实时时钟中断标志是否被置位；
相应地，中断处理模块704，具体用于微处理器检查到实时时钟中断标志被置位时复位实时时钟中断标志，执行实时时钟中断处理；检测模块706，具体用于微处理器休眠时，检测实时时钟中断；唤醒模块707，具体用于微处理器检测到实时时钟中断时被唤醒，进入实时时钟中断处理流程，将实时时钟中断标志置位，退出实时时钟中断处理流程。
进一步地，中断处理模块还可以包括更新单元和判断单元:
所述更新单元，用于更新计时时间；
所述判断单元，用于判断是否要更新信用卡安全码；
相应地，获取单元，具体用于判断单元判断要更新信用卡安全码时根据计时时间获取当前时间因子。
或者，本实施例10中，检查模块703，具体用于微处理器进行系统初始化后检查按键中断标志是否被置位，以及微处理器退出中断处理流程后检查按键中断标志是否被置位；
相应地，中断处理模块704，具体用于微处理器检查到按键中断标志被置位时复位按键中断标志，执行按键中断处理；检测模块706，具体用于微处理器休眠时，检测按键中断；唤醒模块707，具体用于微处理器检测到按键中断时被唤醒，进入按键中断处理流程将按键中断标志置位，退出按键中断处理流程。
进一步地，中断处理模块704还可以包括更新单元:
更新单元，用于更新按键次数；
相应地，获取单元，具体用于根据按键次数获取当前事件因子。
又或者，本实施例10中，检查模块703，具体用于微处理器进行系统初始化后检查按键中断标志和实时时钟中断标志是否被置位，以及微处理器退出中断处理流程后检查按键中断标志和实时时钟中断标志是否被置位；
相应地，中断处理模块704，具体用于微处理器检查到按键中断标志被置位时复位按键中断标志，执行按键中断处理，以及微处理器检查到实时时钟中断标志被置位时复位实时时钟中断标志，执行实时时钟中断处理；检测模块706，具体用于微处理器休眠时，检测按键中断和实时时钟中断；唤醒模块707，具体用于微处理器检测到按键中断时被唤醒，进入按键中断处理流程将按键中断标志置位，退出按键中断处理流程，以及微处理器检测到实时时钟中断时被唤醒，进入实时时钟中断处理流程，将实时时钟中断标志置位，退出实时时钟中断处理流程；
中断处理模块704还包括:实时时钟中断处理单元，用于更新计时时间；
相应地，获取单元，具体用于根据计时时间获取当前时间因子。
本实施例10中，检查模块703，还用于微处理器进行系统初始化后检查通信中断标志是否被置位，以及微处理器将退出中断处理流程后检查通信中断标志是否被置位，相应地:
中断处理模块704，还用于微处理器检查到通信中断标志被置位时复位通信中断标志，执行通信中断处理；
检测模块706，还用于微处理器休眠时，检测通信中断；
唤醒模块707，还用于微处理器检测到通信中断时被唤醒，进入通信中断处理流程将通信中断标志置位，退出通信中断处理流程；
中断处理模块704还包括通信中断处理单元和判断单元；其中，通信中断处理单元，用于接收通信数据，并根据接收到的通信数据进行卡片个人化；判断单元，用于判断卡片个人化是否已完成。相应地，获取单元，具体用于当判断单元判断卡片个人化已完成时，获取动态安全码因子。
进一步地，通信中的处理单元，可以具体用于接收通信数据，并根据接收到的通信数据向存储单元中写入卡片个人化数据和预置密钥。
更进一步地，通信中断处理单元，可以具体用于接收通信数据，并根据接收到的通信数据向存储单元中写入主账号、卡有效期、服务代码序列和预置密钥；
相应地，生成单元，具体用于用获取单元获取的动态安全码因子替换存储单元中存储的主账号中第一预设长度的数据，得到变换后的主账号，将变换后的主账号与卡有效期和服务代码序列依次连接，得到连接数据，在连接数据的右侧用预设数据填充，得到第二预设长度的比特流。
本实施例10中，分割单元，具体用于平均分割生成单元生成的比特流得到第一数据块和第二数据块。
本实施例10中，处理单元，可以具体用于从加密单元得到的第四数据块密文的左侧开始，抽取第四数据块密文中所有第一数据到第二数据之间的数字，得到第一抽取数据，从第四数据块密文的左侧开始，抽取第四数据块密文中所有第三数据到第四数据之间的数字，得到第二抽取数据；将第二抽取数据中的每个数字替换为该数字与第五数据的差，得到转换后的第二抽取数据；将第一抽取数据和所述转换后的第二抽取数据顺序拼接，得到处理结果。
本实施例10中，通信中断处理单元向存储单元中写入的预置密钥包括第一密钥；
加密单元具体包括:
创建子单元，用于根据第一密钥创建子密钥；
排列子单元，用于对待加密数据的位数据进行重新排列；
分割子单元，用于分割重新排列后的待加密数据得到第一中间数据块和第二中间数据块；
迭代子单元，用于根据创建子单元创建的子密钥对分割子单元得到的第一中间数据块和第二中间数据块做迭代运算，得到第三中间数据块和第四中间数据块；
转置子单元，用于将迭代子单元得到的第四中间数据块和第三中间数据块拼接后进行转置，并对转置结果做进制转换，得到待加密数据密文；
进一步地，创建子单元，具体用于对第一密钥的位数据进行重新排列；分割重新排列后的第一密钥得到第一密钥数据块和第二密钥数据块；对第一密钥数据块进行循环左移，得到第一子密钥数据块；对第二密钥数据块进行循环左移，得到和第一子密钥数据块对应的第二子密钥数据块；将第一子密钥数据块与和第一子密钥数据块对应的第二子密钥数据块拼接，得到子密钥数据块；对子密钥数据块的位数据进行选择和排列，得到子密钥。
本实施例10中，通信中断处理单元向存储单元中写入的预置密钥还包括第二密钥；
解密单元具体包括:
创建子单元，用于根据第二密钥创建子密钥；
排列子单元，用于对待解密数据的位数据进行重新排列；
分割子单元，用于分割重新排列后的待解密数据得到第五中间数据块和第六中间数据块；
迭代子单元，用于对分割子单元得到的第五中间数据块和第六中间数据块做迭代运算，得到第七中间数据块和第八中间数据块；以及
转置子单元，用于将迭代子单元得到的第八中间数据块和第七中间数据块拼接后进行转置，并对转置结果做进制 转换，得到待解密数据明文。
进一步地，创建子单元，具体用于对第二密钥的位数据进行重新排列；分割重新排列后的第二密钥得到第三密钥数据块和第四密钥数据块；对第三密钥数据块进行循环左移，得到第三子密钥数据块；对第四密钥数据块进行循环左移，得到和第三子密钥数据块对应的第四子密钥数据块；将第三子密钥数据块与和第三子密钥数据块对应的第四子密钥数据块拼接，得到子密钥数据块；对子密钥数据块的位数据进行选择和排列，得到子密钥。
以上所述，仅为本发明较优选的具体实施方式，但本发明的保护范围并不局限于此，本领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应所述以权利要求书的保护范围为准。

Claims (20)

  1. 一种信用卡工作方法，其特征在于，所述信用卡内设置有微处理器，所述方法包括:
    步骤S1)所述微处理器上电，进行系统初始化；
    步骤S2)所述微处理器休眠，当检测到预设中断时被唤醒，执行步骤S3；以及
    步骤S3)所述微处理器进入预设中断处理流程执行预设中断处理，当所述预设中断处理完成时，退出所述预设中断处理流程，返回步骤S2；
    所述预设中断处理包括:
    步骤a1)获取动态安全码因子，根据所述动态安全码因子和卡内的卡片个人化数据生成比特流，分割所述比特流得到第一数据块和第二数据块；
    步骤a2)将所述第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；
    步骤a3)对所述第一数据块密文和所述第二数据块进行异或运算，得到第三数据块；
    步骤a4)将所述第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；
    步骤a5)将所述第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块，将所述第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；以及
    步骤a6)对所述第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码，显示当前有效信用卡安全码。
  2. 如权利要求1所述的信用卡工作方法，其特征在于，所述获取动态安全码因子具体为:根据所述计时时间获取当前时间因子。
  3. 如权利要求1所述的信用卡工作方法，其特征在于，所述步骤S2中还包括:当所述微处理器检测到通信中断时被唤醒，执行步骤S5；
    所述步骤S5具体包括:所述微处理器进入通信中断处理流程，执行通信中断处理，当所述通信中断处理完成时，退出所述通信中断处理流程；
    所述通信中断处理包括:所述微处理器接收通信数据，并根据接收到的通信数据进行卡片个人化；以及
    所述预设中断处理中还包括:步骤a0、判断卡片个人化是否已完成，是则执行所述步骤a1，否则所述预设中断处理完成。
  4. 如权利要求1所述的信用卡工作方法，其特征在于，所述分割所述比特流具体为平均分割所述比特流。
  5. 如权利要求1所述的信用卡工作方法，其特征在于，所述对第四数据块密文进行抽取、转换和排序处理，具体包括:从所述第四数据块密文的左侧开始，抽取所述第四数据块密文中所有第一数据到第二数据之间的数字，得到第一抽取数据，从所述第四数据块密文的左侧开始，抽取所述第四数据块密文中所有第三数据到第四数据之间的数字，得到第二抽取数据；将所述第二抽取数据中的每个数字替换为该数字与第五数据的差，得到转换后的第二抽取数据；将所述第一抽取数据和所述转换后的第二抽取数据顺序拼接，得到处理结果。
  6. 一种信用卡工作方法，其特征在于，所述信用卡内设置有微处理器，所述方法包括:
    步骤s1)所述微处理器上电，进行系统初始化；
    步骤s2)所述微处理器检查预设中断标志是否被置位，是则复位预设中断标志，执行预设中断处理，否则执行步骤s3；以及
    步骤s3)所述微处理器休眠，当检测到预设中断时被唤醒，进入预设中断处理流程将预设中断标志置位，退出所述预设中断处理流程，返回步骤s2；
    所述预设中断处理包括:
    步骤s2-1)获取动态安全码因子，根据所述动态安全码因子和卡内的卡片个人化数据生成比特流，分割所述比特流得到第一数据块和第二数据块；
    步骤s2-2)将所述第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；
    步骤s2-3)对所述第一数据块密文和所述第二数据块进行异或运算，得到第三数据块；
    步骤s2-4)将所述第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；
    步骤s2-5)将所述第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块，将所述第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；以及
    步骤s2-6)对所述第四数据块密文进行抽取、转换和排序，将处理结果的预设部分作为当前有效信用卡安全码，显示当前有效信用卡安全码。
  7. 如权利要求6所述的信用卡工作方法，其特征在于，所述获取动态码安全因子具体为:根据所述计时时间获取当前时间因子。
  8. 如权利要求6所述的信用卡工作方法，其特征在于，所述步骤s2中还包括:所述微处理器检查通信中断标志是 否被置位以及所述通信中断标志被置位时复位通信中断标志，执行通信中断处理，否则执行所述步骤s3；
    所述通信中断处理包括:所述微处理器接收通信数据，并根据接收到的通信数据进行卡片个人化；
    所述预设中断处理中还包括:步骤s2-0、判断卡片个人化是否已完成，是则执行所述步骤s2-1，否则所述预设中断处理完成；以及
    所述步骤s3中还包括:当检测到通信中断时所述微处理器被唤醒，进入通信中断处理流程将通信中断标志置位，退出所述通信中断处理流程，返回步骤s2。
  9. 如权利要求6所述的信用卡工作方法，其特征在于，所述分割所述比特流具体为平均分割所述比特流。
  10. 如权利要求6所述的信用卡工作方法，其特征在于，所述对第四数据块密文进行抽取、转换和排序，具体包括:从所述第四数据块密文的左侧开始，抽取所述第四数据块密文中所有第一数据到第二数据之间的数字，得到第一抽取数据，从所述第四数据块密文的左侧开始，抽取所述第四数据块密文中所有第三数据到第四数据之间的数字，得到第二抽取数据；将所述第二抽取数据中的每个数字替换为该数字与第五数据的差，得到转换后的第二抽取数据；将所述第一抽取数据和所述转换后的第二抽取数据顺序拼接，得到处理结果。
  11. 一种信用卡，其特征在于，所述信用卡内设置有微处理器，所述微处理器中包括:
    上电模块，用于所述微处理器上电；
    初始化模块，用于所述微处理器上电后进行系统初始化；
    休眠模块，用于所述微处理器进行系统初始化后休眠，以及所述微处理器退出预设中断处理流程后休眠；
    检测模块，用于所述微处理器休眠时，检测预设中断；
    唤醒模块，用于所述微处理器检测到预设中断后被唤醒；
    中断处理模块，用于所述微处理器被唤醒后进入预设中断处理流程执行预设中断处理，当所述预设中断处理完成时，退出所述预设中断处理流程；
    所述中断处理模块具体包括:
    获取单元，用于获取动态安全码因子；
    存储单元，用于存储卡片个人化数据；
    生成单元，用于根据所述获取单元获取的动态安全码因子和所述存储单元中存储的卡片个人化数据生成比特流；
    分割单元，用于分割所述生成单元生成的比特流得到第一数据块和第二数据块；
    加密单元，用于将所述分割单元得到的第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；还用于将异或单元得到的第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；还用于将解密单元得到的第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；
    异或单元，用于对所述加密单元得到的第一数据块密文和所述分割单元得到的第二数据块进行异或运算，得到第三数据块；
    解密单元，用于将所述加密单元得到的第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块；
    处理单元，用于对所述加密单元得到的第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码；以及
    显示单元，用于控制显示当前有效信用卡安全码。
  12. 如权利要求11所述的信用卡，其特征在于，
    所述获取单元具体用于，所述判断单元判断要更新信用卡安全码时根据计时时间获取当前时间因子。
  13. 如权利要求11所述的信用卡，其特征在于，所述检测模块，还用于所述微处理器休眠时，检测通信中断；
    所述唤醒模块，还用于所述微处理器检测到通信中断后被唤醒；
    所述中断处理模块，还用于所述微处理器检测到通信中断后被唤醒时进入通信中断处理流程执行通信中断处理，当所述通信中断处理完成时，退出所述通信中断处理流程；
    所述中断处理模块还包括通信中断处理单元和判断单元；
    所述通信中断处理单元，用于接收通信数据，并根据接收到的通信数据进行卡片个人化；
    所述判断单元，用于判断卡片个人化是否已完成；以及
    所述获取单元，具体用于当所述判断单元判断卡片个人化已完成时，获取动态安全码因子。
  14. 如权利要求11所述的信用卡，其特征在于，所述分割单元，具体用于平均分割所述生成单元生成的比特流得到第一数据块和第二数据块。
  15. 如权利要求11所述的信用卡，其特征在于，所述处理单元，具体用于从所述加密单元得到的第四数据块密文的左侧开始，抽取所述第四数据块密文中所有第一数据到第二数据之间的数字，得到第一抽取数据，从所述第四数据块密文的左侧开始，抽取所述第四数据块密文中所有第三数据到第四数据之间的数字，得到第二抽取数据；将所述第二抽取数据中的每个数字替换为该数字与第五数据的差，得到转换后的第二抽取数据；将所述第一抽取数据和所述转换后的第二抽取数据顺序拼接，得到处理结果。
  16. 一种信用卡，其特征在于，所述信用卡内设置有微处理器，所述微处理器中包括:
    上电模块，用于所述微处理器上电；
    初始化模块，用于所述微处理器上电后进行系统初始化；
    检查模块，用于所述微处理器进行系统初始化后检查预设中断标志是否被置位，以及所述微处理器退出中断处理流程后检查预设中断标志是否被置位；
    中断处理模块，用于所述微处理器检查到预设中断标志被置位时复位预设中断标志，执行预设中断处理；
    休眠模块，用于所述微处理器检查到没有中断标志被置位时休眠；
    检测模块，用于所述微处理器休眠时，检测预设中断；
    唤醒模块，用于所述微处理器检测到预设中断时被唤醒，进入预设中断处理流程将预设中断标志置位，退出预设中断处理流程；
    所述中断处理模块具体包括:
    获取单元，用于获取动态安全码因子；
    存储单元，用于存储卡片个人化数据；
    生成单元，用于根据所述获取单元获取的动态安全码因子和所述存储单元中存储的卡片个人化数据生成比特流；
    分割单元，用于分割所述生成单元生成的比特流得到第一数据块和第二数据块；
    加密单元，用于将所述分割单元得到的第一数据块作为待加密数据，对待加密数据加密，得到第一数据块密文；还用于将异或单元得到的第三数据块作为待加密数据，对待加密数据加密，得到第三数据块密文；还用于将解密单元得到的第四数据块作为待加密数据，对待加密数据加密，得到第四数据块密文；
    异或单元，用于对所述加密单元得到的第一数据块密文和所述分割单元得到的第二数据块进行异或运算，得到第三数据块；
    解密单元，用于将所述加密单元得到的第三数据块密文作为待解密数据，对待解密数据解密，得到第四数据块；
    处理单元，用于对所述加密单元得到的第四数据块密文进行抽取、转换和排序处理，将处理结果的预设部分作为当前有效信用卡安全码；以及
    显示单元，用于控制显示当前有效信用卡安全码。
  17. 如权利要求16所述的信用卡，其特征在于，
    所述获取单元具体用于，所述判断单元判断要更新信用卡安全码时根据计时时间获取当前时间因子。
  18. 如权利要求16所述的信用卡，其特征在于，所述检查模块，还用于所述微处理器进行系统初始化后检查实时时钟中断标志是否被置位，以及所述微处理器退出中断处理流程后检查通信中断标志是否被置位；
    所述中断处理模块，还用于所述微处理器检查到通信中断标志被置位时复位通信中断标志，执行通信中断处理；
    所述中断处理模块还包括通信中断处理单元和判断单元；
    所述通信中断处理单元，用于接收通信数据，并根据接收到的通信数据进行卡片个人化；
    所述判断单元，用于判断卡片个人化是否已完成；
    所述获取单元，具体用于当所述判断单元判断卡片个人化已完成时，获取动态安全码因子；
    所述检测模块，还用于所述微处理器休眠时，检测通信中断；以及
    所述唤醒模块还用于所述微处理器检测到通信中断时被唤醒，进入通信中断处理流程将通信中断标志置位，退出所述通信中断处理流程。
  19. 如权利要求16所述的信用卡，其特征在于，所述分割单元，具体用于平均分割所述生成单元生成的比特流得到第一数据块和第二数据块。
  20. 如权利要求16所述的信用卡，其特征在于，所述处理单元，具体用于从所述加密单元得到的第四数据块密文的左侧开始，抽取所述第四数据块密文中所有第一数据到第二数据之间的数字，得到第一抽取数据，从所述第四数据块密文的左侧开始，抽取所述第四数据块密文中所有第三数据到第四数据之间的数字，得到第二抽取数据；将所述第二抽取数据中的每个数字替换为该数字与第五数据的差，得到转换后的第二抽取数据；将所述第一抽取数据和所述转换后的第二抽取数据顺序拼接，得到处理结果。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104333454A (zh) * 2014-10-28 2015-02-04 飞天诚信科技股份有限公司 一种可更新种子的动态令牌的工作方法
CN104506319A (zh) * 2014-12-15 2015-04-08 飞天诚信科技股份有限公司 一种多种子动态令牌的工作方法
US20160217471A1 (en) * 2006-11-15 2016-07-28 Bank Of America Corporation Method and apparatus for using at least a portion of a one-time password as a dynamic card verification value
CN108234110A (zh) * 2017-12-29 2018-06-29 飞天诚信科技股份有限公司 信用卡及其工作方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2771533B1 (fr) * 1997-11-21 2003-01-31 Taib Thierry Baillie Carte de securite pour paiement securise par carte de credit
US6246769B1 (en) * 2000-02-24 2001-06-12 Michael L. Kohut Authorized user verification by sequential pattern recognition and access code acquisition
JP2004005001A (ja) * 2000-11-15 2004-01-08 Toru Miura 電子商取引の防犯システム
US8365988B1 (en) * 2008-04-11 2013-02-05 United Services Automobile Association (Usaa) Dynamic credit card security code via mobile device
JP2016015107A (ja) * 2014-05-01 2016-01-28 バンクガード株式会社 サーバシステム、通信システム、通信端末装置、プログラム、記録媒体及び通信方法
US10299118B1 (en) * 2015-06-01 2019-05-21 Benten Solutions Inc. Authenticating a person for a third party without requiring input of a password by the person
CN106934606B (zh) * 2015-12-30 2021-09-14 创新先进技术有限公司 一种信用卡支付请求处理方法及装置
CN108134667B (zh) * 2017-11-15 2021-05-11 中国银联股份有限公司 生成动态信用卡安全码的方法和设备、银行卡
US10891618B2 (en) * 2017-11-29 2021-01-12 Fair Isaac Corporation Protecting online payments through one-time payment cards
US20190180272A1 (en) * 2017-12-12 2019-06-13 Janathon R. Douglas Distributed identity protection system and supporting network for providing personally identifiable financial information protection services

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160217471A1 (en) * 2006-11-15 2016-07-28 Bank Of America Corporation Method and apparatus for using at least a portion of a one-time password as a dynamic card verification value
CN104333454A (zh) * 2014-10-28 2015-02-04 飞天诚信科技股份有限公司 一种可更新种子的动态令牌的工作方法
CN104506319A (zh) * 2014-12-15 2015-04-08 飞天诚信科技股份有限公司 一种多种子动态令牌的工作方法
CN108234110A (zh) * 2017-12-29 2018-06-29 飞天诚信科技股份有限公司 信用卡及其工作方法

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