WO2019113893A1

WO2019113893A1 - Control circuits for driving power switches of isolated forward converters

Info

Publication number: WO2019113893A1
Application number: PCT/CN2017/116207
Authority: WO
Inventors: Zhanwu WANG; Qian Zhang
Original assignee: Astec International Limited
Priority date: 2017-12-14
Filing date: 2017-12-14
Publication date: 2019-06-20

Abstract

A switch mode power supply includes a forward converter and a control circuit coupled to the forward converter. The forward converter includes an input, an output, a transformer coupled between the input and the output, a first power switch, and a second power switch. The first power switch and the second power switch are coupled between the input and the transformer. The control circuit is configured to generate a first control signal to turn on the first power switch for a first period of time and a second control signal to turn on the second power switch for a second period of time greater than the first period of time. The first period of time and the second period of time overlap. Other example switch mode power supplies, control circuits and methods of controlling forward converters are also disclosed.

Description

CONTROL CIRCUITS FOR DRIVING POWER SWITCHES OF ISOLATED FORWARD CONVERTERS

FIELD

The present disclosure relates to control circuits for driving power switches of isolated forward converters.

BACKGROUND

This section provides background information related to the present disclosure which is not necessarily prior art.

Forward power converters commonly include power switches controlled by one or more pulse width modulated (PWM) control signals. During normal operation, the power switches may be controlled with control signals having a duty cycle of about thirty percent (30%) . At other times, the duty cycle may decrease to about ten percent (10%) when the power converter’s output voltage is reduced. This decreased duty cycle may occur during start-up of the power converter, during a short circuit condition, and/or during another abnormal condition.

SUMMARY

This section provides a general summary of the disclosure, and is not a comprehensive disclosure of its full scope or all of its features.

According to one aspect of the present disclosure, a switch mode power supply (SMPS) includes a forward converter and a control circuit coupled to the forward converter. The forward converter includes an input, an output, a transformer coupled between the input and the output, a first power switch, and a second power switch. The first power switch and the second power switch are coupled between the input and the transformer. The control circuit is configured to generate a first control signal to turn on the first power switch for a first period of time and a second control signal to turn on the second power switch for a second period of time greater than the first period of time. The first period of time and the second period of time overlap.

According to another aspect of the present disclosure, a control circuit is provided for a forward converter of a SMPS. The forward converter includes an input, an output, a transformer coupled between the input and the output, a first power switch, and a second power switch. The first power switch and the second power switch are coupled between the input and the transformer. The control circuit is configured to generate a first control signal to turn on the first power switch for a first period of time and a second control signal to turn on the second power switch for a second period of time greater than the first period of time. The first period of time and the second period of time overlap.

According to yet another aspect of the present disclosure, a method of controlling a forward converter of a SMPS is provided. The forward converter includes an input, an output and a transformer coupled between the input and the output. The method includes generating a first control signal to turn on a first power switch of the forward converter for a first period of time, and generating a second control signal to turn on a second power switch of the forward converter for a second period of time greater than the first period of time. The first period of time and the second period of time overlap.

Further aspects and areas of applicability will become apparent from the description provided herein. It should be understood that various aspects of this disclosure may be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific examples herein are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.

DRAWINGS

The drawings described herein are for illustrative purposes only of selected embodiments and not all possible implementations, and are not intended to limit the scope of the present disclosure.

Fig. 1 is a block diagram of a SMPS including an isolated forward converter having power switches and a control circuit for controlling the power switches according to one example embodiment of the present disclosure.

Fig. 2 is an electrical schematic of an isolated forward converter including two power switches in which the low side power switch conducts for a greater period of time than the high side power switch according to another example embodiment.

Fig. 3 is a graph of various waveforms representing current flow, a voltage level, and control signals for the forward converter of Fig. 2 according to yet another example embodiment.

Figs. 4-7 are electrical schematics of the isolated forward converter of Fig. 2 showing the current flow of Fig. 3 according to another example embodiment.

Fig. 8 is an electrical schematic of an isolated forward converter including two power switches in which the high side power switch conducts for a greater period of time than the low side power switch according to yet another example embodiment.

Fig. 9 is an electrical schematic of an isolated forward converter similar to the forward converter of Fig. 2, but including three power switches according to another example embodiment.

Fig. 10 is an electrical schematic of an isolated forward converter similar to the forward converter of Fig. 2, but including a power switch and a diode coupled in parallel according to yet another example embodiment.

Fig. 11 is an electrical schematic of a control circuit for controlling one of the power switches of the forward converter of Fig. 9 or the forward converter of Fig. 10, according to another example embodiment.

Fig. 12 is a block diagram of a SMPS including an isolated forward converter and a digital controller according to yet another example embodiment.

Corresponding reference numerals indicate corresponding parts and/or features throughout the several views of the drawings.

DETAILED DESCRIPTION

Example embodiments will now be described more fully with reference to the accompanying drawings.

Example embodiments are provided so that this disclosure will be thorough, and will fully convey the scope to those who are skilled in the art. Numerous specific details are set forth such as examples of specific components, devices, and methods, to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to those skilled in the art that specific details need not be employed, that example embodiments may be embodied in many different forms and that neither should be construed to limit the scope of the disclosure. In some example embodiments, well-known processes, well-known device structures, and well-known technologies are not described in detail.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting. As used herein, the singular forms "a, ” "an, " and "the" may be intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises, " "comprising, " “including, ” and “having, ” are inclusive and therefore specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order discussed or illustrated, unless specifically identified as an order of performance. It is also to be understood that additional or alternative steps may be employed.

Although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region, layer or section from another region, layer or section. Terms such as “first, ” “second, ” and other numerical terms when used herein do not imply a sequence or order unless clearly indicated by the context. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the example embodiments.

Spatially relative terms, such as “inner, ” “outer, ” "beneath, " "below, " "lower, " "above, " "upper, " and the like, may be used herein for ease of description to describe one element or feature's relationship to another element (s) or feature (s) as illustrated in the figures. Spatially relative terms may be intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the example term "below" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

A SMPS according to one example embodiment of the present disclosure is illustrated in Fig. 1, and indicated generally by reference number 100. As shown in Fig. 1, the SMPS 100 includes a forward converter 102 and a control circuit 104 coupled to the forward converter 102. The forward converter 102 includes an input 106, an output 108, a transformer 110 coupled between the input 106 and the output 108, and

power switches

112, 114. As shown, the

power switches

112, 114 are coupled between the input 106 and the transformer 110. As further explained below, the control circuit 104 is configured to generate a control signal 116 to turn on the power switch 112 for a period of time (e.g., on-time) and a control signal 118 to turn on the power switch 114 for another period of time (e.g., on-time) greater than the period of time associated with the power switch 112. The periods of time associated with the

power switches

112, 114 overlap.

In some examples, the longer on-time of the power switch 114 compared to the on-time of the power switch 112 may reduce stress on components in the forward converter 102 compared to forward converters driven in conventional methods. For example, the power switches 112, 114 may be controlled with control signals having a duty cycle of about thirty percent (30%) during normal operation. In some circumstances (e.g., during start-up of the SMPS 100, during a short circuit condition, etc. ) , an output voltage of the SMPS 100 may reduce. In such cases, the duty cycle may decrease to, for example, about ten percent (10%) . At this reduced duty cycle, current stress on components (e.g., a freewheeling rectifier device on a secondary side of the transformer) in the SMPS 100 may become an issue. However, if one power switch (e.g., the power switch 114) has a longer on-time than the other switch (e.g., the power switch 112) , current passing through these components may be distributed differently. This change in the current may reduce stress on the components.

The power switches 112, 114 may turn on and/or turn off at substantially the same time and/or at different times. For example, the control circuit 104 may generate the control signals 116, 118 so that the power switches 112, 114 turn on at the same time. In such examples, the control signals 116, 118 may cause the power switches 112, 114 to turn off at different times. This ensures the power switch 114 stays on for a longer period of time than the power switch 112. For example, the power switch 114 may turn off after the power switch 112 turns off. In other examples, the power switch 114 may turn off before the power switch 112 turns off. Alternatively, the power switches 112, 114 may turn on at different times and turn off at the same time. For example, the control circuit 104 may generate the control signal 116 to turn on the power switch 112 at a particular time, and generate the control signal 118 to turn on the power switch 114 at a different (e.g., later) time. The control circuit 104 may then turn off the power switches 112, 114 at the same time.

In some embodiments, the transformer 110 may reset after both power switches 112, 114 turn off. This may occur in each switching cycle of the power switches 112, 114. For example, the transformer 110 may reset after the power switch 114 turns off. In such examples, the power switches 112, 114 may turn on at substantially the same time as exampled above, and the power switch 112 may turn off before the power switch 114. After the power switch 114 turns off, energy stored in the transformer’s core dissipates over a period of time thereby resetting the transformer 110. As further explained below, the time needed to reset the transformer 110 may be greater than or equal to the on-time of the power switch 112.

Additionally, the on-times of the power switches 112, 114 may be substantially fixed or variable. In some examples, the on-times for the one or both

power switch

112, 114 may vary each switching cycle, every other switching cycle, every five switching cycles, etc.

Further, the on-times of the power switches 112, 114 may be based on one or more parameters. For example, the on-time of the power switch 112 may be a function of a regulation loop parameter such as an output voltage setting, a sensed parameter (e.g., the output voltage) , etc. In other examples, the on-time of the power switch 112 may be a function of another suitable parameter.

The on-time of the power switch 114 may be a function of the on-time of the power switch 112. In such examples, the on-time of the power switch 114 may be limited to ensure the transformer 110 is given adequate time to reset before the next switching cycle, as explained above. For example, if the time required to reset the transformer 110 is greater than or equal to the on-time of the power switch 112 and the transformer 110 resets after the power switch 114 turns off, the on-time of the power switch 114 may be determined as a function of the on-time and the period of the power switch 112 to ensure enough time is preserved in the particular switching cycle to reset (e.g., completely reset) the transformer 110.

As explained above, the on-times of the power switches 112, 114 overlap. In other words, the on-times of the power switches 112, 114 at least partly coincide during each switching cycle. This overlap of the on-times may occur for the duration of the power switch 112 on-time if the power switches 112, 114 turn on at the same time as explained above. In other embodiments, the overlap of the on-times may occur at some other time if the power switches 112, 114 turn on at different times.

In some embodiments, the forward power converter 102 may include a rectification circuit coupled between the transformer 110 and the output 108. For example, Fig. 2 illustrates a forward power converter 200 substantially similar to the forward power converter 102 of Fig. 1, but including a rectification circuit 202. Specifically, the forward power converter 200 includes an input Vin+, Vin- (collectively Vin) , an output Vout+, Vout- (collectively Vout) , a transformer TX1 coupled between the input Vin and the output Vout, and power switches Q1, Q2.The rectification circuit 202 is coupled between the transformer TX1 and the output Vout. As shown in Fig. 2, the forward converter 200 also includes an output filter (e.g., an output inductor L1 and an output capacitor C1) coupled between the transformer TX1 and the output Vout. Additionally, a leakage inductance of the transformer TX1 is represented by an inductance Llk coupled to a primary winding of the transformer TX1. In other embodiments, the transformer TX1 may not have a leakage inductance.

As shown in Fig. 2, the power switches Q1, Q2 are arranged in a two-switch forward converter topology. Additionally, the forward converter 200 includes two diodes D3, D4 coupled between the input Vin and the transformer TX1. As further explained below, the diodes D3, D4 provide a path for transformer magnetizing current, load current during an overlapping period, etc. in the forward converter 200.

As shown in Fig. 2, the rectification circuit 202 includes two diodes D1, D2. The diode D1 is commonly referred to as a forward rectifier diode and the diode D2 is commonly referred to as a freewheeling rectifier diode. In other examples, other suitable rectifying devices may be employed including, for example, one or more switching devices such as metal-oxide semiconductor field-effect transistors (MOSFETs) instead of and/or in conjunction with the diodes D1, D2.

The power switches Q1, Q2 of Fig. 2 may be controlled in a similar manner as the power switches 112, 114 of Fig. 1. For example, a control circuit (not shown) may generate a control signal for turning on the power switch Q1 for a period of time and another control signal for turning on the power switch Q2 for a period of time longer than the period of time associated with the power switch Q1. This switching method is sometimes referred to as asymmetrically switching because the duty cycle for the power switch Q1 is different than the duty cycle for the power switch Q2.

Fig. 3 illustrates waveforms representing control signals for the power switches Q1, Q2 of Fig. 2 and current passing through the diodes D1, D2 of Fig. 2. As shown in Fig. 3, one switching cycle is represented by time t0 to time t4. The

waveforms

302, 304 represent control signals for driving the power switches Q1, Q2, respectively, and the

waveforms

306, 308 represent current flowing through the diodes D1, D2, respectively. The waveform 310 represents the voltage across the primary winding of the transformer TX1. For exemplary purposes only, the input voltage at the input Vin may be 390VDC, the output at the output Vout may be 48V/12.5A, the transformer ratio of the transformer TX1 may be 12: 5, the leakage inductance Llk may be 11 uH, and the switching frequency (fs) of the power switches Q1, Q2 may be 100kHz. In other example embodiments, other optional values for the input voltage, output, transformer ratio, leakage inductance frequency, etc. may be employed without departing from the scope of the disclosure.

As shown in Fig. 3, the control signals 302, 304 are high from time t0 to time t1 thereby indicating the power switches Q1, Q2 are on (e.g., conducting) . During this period, primary side current 402 flows from the input Vin, through the power switch Q1, the primary winding of the transformer TX1, and the power switch Q2, and returns to the input Vin, as shown in the forward converter 200 of Fig. 4. As such, energy transfer from the primary side to the secondary side of the transformer TX1 is active. For example, the input voltage at the input Vin is impressed upon the primary winding of the transformer TX1, and a secondary side voltage is developed across the secondary winding of the transformer TX1. During this on-time period for the power switches Q1, Q2 (e.g., the forward power cycle) , the secondary side voltage causes a secondary side current 404 to flow through the forward diode D1, and the output inductor L1. As shown in Fig. 3, the secondary side current flowing through the forward diode D1 is about 12.5A. During the forward power cycle, the freewheeling diode D2 is reversed biased.

At time t1, the control signal 302 falls to zero and the power switch Q1 turns off. In the particular example of Fig. 3, the on-time (e.g., the period of time) of the power switch Q1 is 3usec. At this time (t1) , the forward converter 200 of Fig. 2 enters its off period. In this particular example, the off period may include three parts. The first part of the off period is represented by the time interval t1-t2, the second part of the off period is represented by the time interval t2-t3, and the third part of the off period is represented by the time interval t3-t4.

During the time interval t1-t2, the control signal 304 is high indicating the power switch Q2 is on. As such, and as shown in Fig. 5, the primary side current 402 flows through the power switch Q2, the diode D4, the leakage inductance Llk, and the primary side winding of the transformer TX1. The energy stored in the leakage inductance Llk during the time interval t0-t1 prevents the primary side current 402 from decreasing. During this time, the voltage across the primary winding of the transformer TX1 is substantially zero (as shown in the waveform 310 of Fig. 3) , and both diodes D1, D2 are forward biased. As such, the secondary side current 404 flows through both diodes D1, D2 during this time interval t1-t2, as shown in the forward converter 200 of Fig. 5.

Specifically, and as shown in Figs. 3 and 5, some of the current flowing through the forward diode D1 is transferred to the freewheeling diode D2. In other words, the secondary side current 404 is at least partially shared between the forward diode D1 and the freewheeling diode D2 during the time interval t1-t2. For example, current through the forward diode D1 begins to decrease (e.g., ramp down) at time t1 and the current through the freewheeling diode D2 begins to increase (e.g., ramp up) at time t1. As shown, this increase in current through the freewheeling diode D2 is equal to the magnitude of the current decrease in the forward diode D1.

This is in contrast to conventional forward converters having both power switches off (during a similar time interval of an off period) , thereby causing the entire secondary side current to pass through a freewheeling diode. Thus, because less secondary side current flows through the freewheeling diode D2 of Fig. 2 as compared to conventional methods, current stress on the freewheeling diode D2 is reduced compared to conventional methods. This may be particularly advantageous when, for example, at least one of the power switches (e.g., the power switch Q1 of Figs. 2 and 3) has a low duty cycle (e.g., less than fifty percent) .

The amount of current transferred (e.g., shared) between the forward diode D1 and the freewheeling diode D2 may be dependent on the speed of current transfer during the time interval t1-t2. As such, speed of current transfer may affect the amount of current stress reduction seen by the freewheeling diode D2. Generally, the speed of current transfer (e.g., the slope of the ramp down/up) depends on power stage parameters. For example, the speed of current transfer may depend on the value of the leakage inductance Llk, a voltage drop along the primary side current 402 path, the amount of time between the time t1 and time t2, etc. The voltage drop may depend on, for example, the forward resistance of the components in the current path and the amount of current flowing.

For example, the time interval t1-t2 may be used to control the level of current distribution between the two paths. In such examples, the freewheeling diode D2 may experience less secondary side current 404 (and the forward diode D1 may experience more secondary side current 404) as the time duration of time interval t1-t2 is increased. As such, the amount of current transferred (e.g., shared) between the forward diode D1 and the freewheeling diode D2 may be altered by controlling the control signal width (e.g., the pulse width modulated (PWM) duty cycle) of the power switches Q1, Q2. However, the time interval t1-t2 (e.g., the period of time in which the power switch Q1 is off and the power switch Q2 is on) may be limited to ensure the transformer TX1 has adequate time to reset. Therefore, the time interval t1-t2 cannot arbitrarily be prolonged. Generally, the time required to reset the transformer TX1 is equal to or greater than the timer interval t0-t1 (e.g., the period of time in which the power switches Q1, Q2 are on) .

By way of example only, the amount of current transferred (di (t) /dt) from the forward diode D1 to the freewheeling diode D2 (at the end of time interval t1-t2) may be determined by the equation (1) below, where the amount of current is represented by i (t) , the forward resistance is represented by R_path, and the leakage inductance is represented by Llk.

At time t2, the control signal 304 falls to zero and the power switch Q2 turns off. In the particular example of Fig. 3, the on-time (e.g., the period of time) of the power switch Q2 is 6usec. During the time interval t2-t3, the transformer TX1 becomes reverse biased by the input voltage at the input Vin (as shown by waveform 310 in Fig. 3) , and energy stored in the transformer TX1 causes the primary side current 402 to flow through the primary winding of the transformer TX1 and the diodes D3, D4 (as shown in the forward converter 200 of Fig. 6) . This initiates the reset process of the transformer TX1.

Additionally, during the time interval t2-t3, the forward diode D1 is reverse bias. As such, all of the secondary side current 404 is transferred to the freewheeling diode D2 from the forward diode D1, as shown in Figs. 3 and 6. However, because some of the secondary side current 404 was transferred to the freewheeling diode D2 from the forward diode D1 during the time interval t1-t2, the change in current through the freewheeling diode D2 is less abrupt than compared to conventional forward converters. In other words, the current transfer between the forward diode D1 and the freewheeling diode D2 of Fig. 2 at time t2 may be smoother than current transfer in conventional forward converters. This less abrupt current change may lower voltage stress on the freewheeling diode D2, reduce electromagnetic interference (EMI) , etc. compared to conventional forward converters.

At time t3, the reset process of the transformer TX1 is complete. This allows the voltage across the primary winding of the transformer TX1 to settle at zero (e.g., after some resonating) during the time interval t3-t4, as shown by waveform 310 in Fig. 3. The voltage across the primary winding of the transformer TX1 remains at zero until the next switching cycle begins at time t4. During the time interval t3-t4, the secondary side current 404 continues to flow through the freewheeling diode D2 and the output inductor L1, as shown in the forward converter 200 of Fig. 7.

In other embodiments, the control signals driving the power switches Q1, Q2 of Fig. 2 may be altered. For example, the control signal driving the power switch Q1 may be high from time t0 to t2, and the control signal driving the power switch Q2 may be high from time t0 to t1 and low from time t1 to t2. Thus, the power switch Q1 is on during the time interval t0-t2, and the power switch Q2 is on during the time interval t0-t1 and off during the time interval t1-t2.

In such examples, current paths for the time intervals t0-t1, t2-t3, t3-t4 are substantially similar to the current paths explained above with reference to Figs. 4, 6 and 7. However, the current path for the time intervals t1-t2 is different. For instance, a primary side current 802 flows through the power switch Q1, the leakage inductance Llk, the primary side winding of the transformer TX1, and the diode D3, as shown in a forward converter 800 of Fig. 8. During this time, a secondary side current 804 flows through both diodes D1, D2 because both diodes D1, D2 are forward biased, as explained above with reference to Fig. 5.

In some embodiments, the forward converter 200 may include three or more power switches coupled between the input Vin and the transformer TX1. This may reduce power dissipation as compared to the forward converter 200 of Figs. 2 and 4-8. For example, the primary side current 402 in the primary switch Q2 and the diode D4 of Figs. 2 and 4-7 may be larger than in conventional forward converters. This may lead to higher power dissipation than in conventional forward converters. However, adding additional power switches between the input Vin and the transformer TX1 (as explained below) may reduce this power dissipation.

For example, Fig. 9 illustrates another forward converter 900 including three power switches Q1, Q2, Q3 and the diode D3 coupled between the input Vin and the transformer TX1. In the particular example of Fig. 9, the three power switches Q1, Q2, Q3 and the diode D3 are arranged in a full bridge topology.

Fig. 10 illustrates another forward converter 1000 including three power switches Q1, Q2, Q3 arranged in a full bridge topology. As shown in Fig. 10, the forward converter 1000 includes the three power switches Q1, Q2, Q3 and the diodes D3, D4 coupled between the input Vin and the transformer TX1. As shown, the power switch Q3 and the diode D4 are coupled in parallel.

The power switches Q1, Q2 of Figs. 9 and 10 may be controlled in a similar manner as explained above. Additionally, the power switch Q3 of Figs. 9 and 10 may be controlled to ensure it is active (e.g., conducting) during particular time intervals. For example, the power switch Q3 of Figs. 9 and 10 may be on during the time interval t1-t2, the time interval t2-t3, etc. as explained above relative to Figs. 2 and 4-7.

Fig. 11 illustrates a control circuit 1100 for ensuring the power switch Q3 of Figs. 9 and 10 is on during the time interval t1-t2. The control circuit 1100 may be a standalone circuit, or a portion of a larger control circuit for controlling other power switches. As shown, the control circuit 1100 includes two

logic gates

1102, 1104. The logic gate 1102 is a “NOT” function and the logic gate 1104 is an “AND” function. The control circuit 1100 receives two input signals representing control signals Dri_Q1, Dri_Q2 for driving the power switches Q1, Q2, and outputs a control signal Dri_Q3 for driving the power switch Q3.

The “NOT” logic gate 1102 receives the control signal Dri_Q1, and the “AND” logic gate 1104 receives the control signal Dri_Q2 and outputs the control signal Dri_Q3. During operation, the “NOT” logic gate 1102 outputs the logical negative of the control signal Dri_Q1. For example, if the control signal Dri_Q1 is low, the “NOT” logic gate 1102 outputs a high signal (or vice versa) . The “AND” logic gate 1104 outputs a low control signal Dri_Q3 if one of the two received inputs is low, and a high control signal Dri_Q3 if both received inputs are high. As such, the control signal Dri_Q3 output from the “AND” logic gate 1104 is high (and therefore the power switch Q3 is on) if the control signal Dri_Q2 is high (e.g., the power switch Q2 is on) and the control signal Dri_Q1 is low (e.g., the power switch Q1 is off) .

The forward converters disclosed herein may be applicable to various different switch mode power supplies. For example, forward converters may be applicable to switch mode power supplies where it is desired to have the forward rectifier conduct the freewheeling current, to share (e.g., balance) current stress between a forward rectifier and a freewheeling rectifier, etc. For instance, the forward converters may be employed in two-switch isolated forward converters, interleaved two-switch isolated forward converters, etc.

The power switches disclosed herein may be any suitable power switches. For example, the power switches may include MOSFETs as shown in Figs. 2, 4-10, 12 and 13. In other embodiments, the power switches may include one or more other types of transistors.

Additionally, although the rectifying devices disclosed herein are shown as diodes, it should be apparent that other suitable rectifying devices may be employed without departing from the scope of the disclosure. For example, the rectifying devices may include one or more MOSFETs and/or another suitable switching device. In some examples, the rectifying devices may include synchronous rectifiers.

The control circuits disclosed herein may include an analog control circuit, a digital control circuit (e.g., a digital signal processor (DSP) , a microprocessor, a microcontroller, etc. ) , or a hybrid control circuit (e.g., a digital control circuit and an analog control circuit) . Thus, the methods disclosed herein may be performed by a digital controller. Additionally, the entire control circuit, some of the control circuit, or none of the control circuit may be an integrated circuit (IC) . For example, Fig. 12 illustrates another SMPS 1200 substantially similar to the SMPS 100 of Fig. 1, but including a digital controller 1204. For example, the SMPS 1200 includes the forward converter 102 of Fig. 1 having the input 106, the power switches 112, 114, and the output 108, and the digital controller 1204 for generating control signals for the power switches 112, 114. As shown, the digital controller 1204 includes a DSP 1206 and two

buffers

1208, 1210. The

buffers

1208, 1210 are coupled between the DSP 1206 and the power switches 112, 114 so that the control signals generated by the DSP 1206 are provided to the power switches 112, 114 via the

buffers

1208, 1210. This allows the

buffers

1208, 1210 to provide isolation between the input 106 and the output 108 in the digital controller 1204 (e.g., the control feedback loop, etc. ) .

By controlling the power switches in a forward converter to ensure one power switch remains on for a longer period of time than another power switch, current stress on a freewheeling rectifying device may be reduced compared to conventional forward converters. Additionally, these control methods may achieve a less abrupt current change when the entire secondary side current is transferred from the forward rectifying device to the freewheeling rectifying device, as explained above. Further, the control methods may be more reliable and have a lower cost than conventional forward converter control methods. For example, due to the reduced current and voltage stress on the rectifying devices, less robust components (e.g., smaller, cheaper, lower quality, etc. rectifying devices and/or heat dissipating devices) may be employed as compared to conventional forward converter control methods that may require more robust components. These benefits may be achieved with a simple implementation that does not add complicated hardware circuits.

The foregoing description of the embodiments has been provided for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same may also be varied in many ways. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.

Claims

A switch mode power supply comprising:

a forward converter including an input, an output, a transformer coupled between the input and the output, a first power switch, and a second power switch, the first power switch and the second power switch coupled between the input and the transformer; and

a control circuit coupled to the forward converter and configured to generate a first control signal to turn on the first power switch for a first period of time and a second control signal to turn on the second power switch for a second period of time greater than the first period of time, the first period of time and the second period of time overlapping.
The switch mode power supply of any preceding claim wherein the forward converter includes three or more power switches coupled between the input and the transformer, and wherein the three or more power switches include the first power switch and the second power switch.
The switch mode power supply of any preceding claim wherein the control circuit is configured to generate the first control signal and the second control signal so that the first power switch and the second power switch turn on at the same time.
The switch mode power supply of any preceding claim wherein the control circuit is configured to generate the first control signal and the second control signal so that the second power switch turns off after the first power switch turns off.
The switch mode power supply of any preceding claim wherein the control circuit is configured to generate the first control signal and the second control signal so that the first power switch and the second power switch turn off at different times.
The switch mode power supply of any preceding claim wherein the transformer is configured to reset after the first power switch and the second power switch turn off.
The switch mode power supply of any preceding claim wherein the transformer is configured to reset during a third period of time and wherein the third period of time begins after the first power switch and the second power switch turn off.
The switch mode power supply of any preceding claim wherein the third period of time is greater than or equal to the first period of time.
The switch mode power supply of any preceding claim wherein the first period of time is a function of at least one of an output voltage setting of the forward converter and a sensed output voltage of the forward converter.
The switch mode power supply of any preceding claim wherein the second period of time is a function of the first period of time.
The switch mode power supply of any preceding claim wherein the second period of time is limited to ensure the transformer is reset during a third period of time after the second period of time has elapsed.
The switch mode power supply of any preceding claim wherein the forward converter includes a rectification circuit coupled between the transformer and the output.
The switch mode power supply of any preceding claim wherein the rectification circuit includes a freewheeling rectifying device and a forward rectifying device.
The switch mode power supply of any preceding claim wherein current flows through the freewheeling rectifying device and the forward rectifying device when the second power switch is on and the first power switch is off.
A control circuit for a forward converter of a switch mode power supply, the forward converter including an input, an output, a transformer coupled between the input and the output, a first power switch, and a second power switch, the first power switch and the second power switch coupled between the input and the transformer, the control circuit configured to generate a first control signal to turn on the first power switch for a first period of time and a second control signal to turn on the second power switch for a second period of time greater than the first period of time, the first period of time and the second period of time overlapping.
The control circuit of any preceding claim wherein the control circuit is configured to generate the first control signal and the second control signal so that the first power switch and the second power switch turn on at the same time.
The control circuit of any preceding claim wherein the control circuit is configured to generate the first control signal and the second control signal so that the second power switch is turned off after the first power switch is turned off.
The control circuit of any preceding claim wherein the control circuit is configured to generate the first control signal and the second control signal so that the first power switch and the second power switch are turned off at different times.
The control circuit of any preceding claim wherein the first period of time is a function of at least one of an output voltage setting of the forward converter and a sensed output voltage of the forward converter.
The control circuit of any preceding claim wherein the second period of time is limited to ensure the transformer is reset during a third period of time after the second period of time has elapsed.
A method of controlling a forward converter of a switch mode power supply, the forward converter including an input, an output and a transformer coupled between the input and the output, the method comprising:

generating a first control signal to turn on a first power switch of the forward converter for a first period of time; and

generating a second control signal to turn on a second power switch of the forward converter for a second period of time greater than the first period of time, the first period of time and the second period of time overlapping.