WO2019111635A1 - Semiconductor element, semiconductor device, method for producing said semiconductor element, and method for producing said semiconductor device - Google Patents

Abstract

According to the present invention, a semiconductor element is provided with: a gate electrode; a gate insulating film that is arranged on the gate electrode; a source electrode and a drain electrode, which are positioned on the gate insulating film, and each of which has a first conductive layer and a second conductive layer that is arranged on the first conductive layer; and a first semiconductor film which is positioned on the gate insulating film, and which is electrically connected to the source electrode and the drain electrode. The first semiconductor film partially covers the first conductive layers of the source electrode and the drain electrode, while being separated from the second conductive layers. This semiconductor element may additionally comprise a pair of second semiconductor films. One of the pair of second semiconductor films may be positioned above the source electrode, while the other one of the pair of second semiconductor films may be positioned above the drain electrode.

Description

Semiconductor device, semiconductor device, and manufacturing method thereof

One embodiment of the present invention relates to a semiconductor element such as a transistor, a semiconductor device including the semiconductor element, and a method for manufacturing them.

Representative examples showing semiconductor characteristics include Group 14 elements such as silicon (silicon) and germanium. In particular, silicon is used in almost all semiconductor devices due to availability, ease of processing, excellent semiconductor characteristics, ease of property control, etc., and is positioned as a material supporting the basis of the electronics industry. There is.

In recent years, semiconductor characteristics have been found in oxides, particularly oxides of Group 13 elements such as indium and gallium, and with this opportunity, energetic research and development have been advanced. Indium-gallium oxide (IGO), indium-gallium-zinc oxide (IGZO), and the like are known as representative examples of oxides exhibiting semiconductor characteristics (hereinafter, oxide semiconductors). As a result of recent intensive research and development, display devices including transistors including these oxide semiconductors as semiconductor elements have been commercially available. For example, Patent Document 1 discloses a structure of a transistor including an oxide semiconductor and a manufacturing method thereof, in which a conductive layer including aluminum in a source electrode and a drain electrode of a bottom gate transistor is a conductive layer including titanium. A sandwiching laminated structure is adopted.

JP, 2016-21470, A

One of the embodiments of the present invention is a semiconductor device. The semiconductor element includes a gate electrode, a gate insulating film over the gate electrode, a source electrode and a drain electrode which are located on the gate insulating film and have a first conductive layer and a second conductive layer over the first conductive layer, A first semiconductor film is provided on the gate insulating film and electrically connected to the source electrode and the drain electrode. The first semiconductor film covers a part of the first conductive layer of the source electrode and the drain electrode, and is separated from the second conductive layer.

One of the embodiments of the present invention is a semiconductor device having a semiconductor element. The semiconductor element includes a gate electrode, a gate insulating film over the gate electrode, a source electrode and a drain electrode which are located on the gate insulating film and have a first conductive layer and a second conductive layer over the first conductive layer, A first semiconductor film is provided on the gate insulating film and electrically connected to the source electrode and the drain electrode. The first semiconductor film covers a part of the first conductive layer of the source electrode and the drain electrode, and is separated from the second conductive layer.

One of the embodiments of the present invention is a method for manufacturing a semiconductor element. In this manufacturing method, a gate electrode is formed, a gate insulating film is formed over the gate electrode, a first conductive layer over the gate insulating film, a second conductive layer over the first conductive layer, and Forming a conductive film having a third conductive layer over the second conductive layer, forming a source electrode and a drain electrode by forming the conductive film, and forming a second electrode in each of the source electrode and the drain electrode. Forming the source electrode and the drain electrode so that the side surface of the conductive layer overlaps the top surface of the first conductive layer and the bottom surface of the third conductive layer, overlapping with the gate electrode through the gate insulating film, and forming the first conductive layer Forming a first semiconductor film so as to cover a portion of the first semiconductor film and to be separated from the second conductive layer.

One of the embodiments of the present invention is a method for manufacturing a semiconductor device. In this manufacturing method, a gate electrode is formed, a gate insulating film is formed over the gate electrode, a first conductive layer over the gate insulating film, a second conductive layer over the first conductive layer, and Forming a conductive film having a third conductive layer on the second conductive layer, forming a source electrode and a drain electrode by forming the conductive film, and second conductive in each of the source electrode and the drain electrode Forming the source electrode and the drain electrode so that the side surface of the layer overlaps the top surface of the first conductive layer and the bottom surface of the third conductive layer, overlapping with the gate electrode through the gate insulating film, and forming the first conductive layer Forming a first semiconductor film so as to cover a part of the first conductive layer and to be separated from the second conductive layer, and forming a display element electrically connected to one of the source electrode and the drain electrode. .

BRIEF DESCRIPTION OF THE DRAWINGS The upper surface schematic diagram of the semiconductor element which is one of embodiment of this invention. BRIEF DESCRIPTION OF THE DRAWINGS The cross-sectional schematic diagram of the semiconductor element which is one of embodiment of this invention. BRIEF DESCRIPTION OF THE DRAWINGS The cross-sectional schematic diagram of the semiconductor element which is one of embodiment of this invention. BRIEF DESCRIPTION OF THE DRAWINGS The cross-sectional schematic diagram of the semiconductor element which is one of embodiment of this invention. FIG. 2 is a schematic cross-sectional view showing a method for manufacturing a semiconductor element which is one of the embodiments of the present invention. FIG. 2 is a schematic cross-sectional view showing a method for manufacturing a semiconductor element which is one of the embodiments of the present invention. FIG. 2 is a schematic cross-sectional view showing a method for manufacturing a semiconductor element which is one of the embodiments of the present invention. FIG. 2 is a schematic cross-sectional view showing a method for manufacturing a semiconductor element which is one of the embodiments of the present invention. FIG. 2 is a schematic cross-sectional view showing a method for manufacturing a semiconductor element which is one of the embodiments of the present invention. FIG. 2 is a schematic cross-sectional view showing a method for manufacturing a semiconductor element which is one of the embodiments of the present invention. FIG. 2 is a schematic cross-sectional view showing a method for manufacturing a semiconductor element which is one of the embodiments of the present invention. FIG. 2 is a schematic cross-sectional view showing a method for manufacturing a semiconductor element which is one of the embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS The upper surface schematic diagram of the semiconductor device which is one of embodiment of this invention. BRIEF DESCRIPTION OF THE DRAWINGS The cross-sectional schematic diagram of the semiconductor device which is one of embodiment of this invention. BRIEF DESCRIPTION OF THE DRAWINGS The upper surface schematic diagram of the pixel of the semiconductor device which is one of embodiment of this invention. BRIEF DESCRIPTION OF THE DRAWINGS The cross-sectional schematic diagram of the semiconductor device which is one of embodiment of this invention. 1 is an equivalent circuit showing a basic configuration of a semiconductor device which is one of the embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS The cross-sectional schematic diagram of the semiconductor device which is one of embodiment of this invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings and the like. However, the present invention can be implemented in various modes without departing from the scope of the present invention, and the present invention is not interpreted as being limited to the description of the embodiments exemplified below.

Although the drawings may be schematically represented with respect to the width, thickness, shape, etc. of each part in comparison with the actual embodiment in order to clarify the explanation, the drawings are merely an example, and the interpretation of the present invention is limited. It is not something to do. In the present specification and the drawings, elements having the same functions as those described with reference to the drawings in the drawings may be denoted by the same reference numerals, and overlapping descriptions may be omitted.

In the present invention, when one film is processed to form a plurality of films, the plurality of films may have different functions and roles. However, the plurality of films are derived from the film formed as the same layer in the same step, and have the same layer structure and the same material. Therefore, these multiple films are defined as existing in the same layer.

In the present specification and claims, when expressing an aspect in which another structure is disposed on a certain structure, in the case where it is simply referred to as “above”, in a certain structure, unless otherwise specified. It includes both the case where another structure is arranged immediately above and the case where another structure is arranged above another structure via another structure so as to be in contact with each other.

In the present specification and claims, the expression "a certain structure is exposed from another structure" means an aspect in which a part of a certain structure is not covered by another structure. The part not covered by the structure also includes the aspect covered by another structure.

First Embodiment
In the present embodiment, a semiconductor device 100 according to one of the embodiments of the present invention will be described.

[1. Construction]
A schematic top view of the semiconductor device 100 is shown in FIG. 1, and a schematic cross-sectional view along the chain line AA 'in FIG. 1 is shown in FIG. 2A. The semiconductor element 100 is a so-called bottom gate type thin film transistor, and as shown in these figures, the gate electrode 106, the gate insulating film 108 on the gate electrode 106, the source electrode 110 on the gate insulating film 108 and The first semiconductor film 114 a is located over the drain electrode 112 and the gate insulating film 108 and is electrically connected to the source electrode 110 and the drain electrode 112. The first semiconductor film 114 a overlaps with the gate electrode 106 with the gate insulating film 108 interposed therebetween. The semiconductor element 100 may further include a pair of second semiconductor films 114 b located on the source electrode 110 and the drain electrode 112, respectively. Hereinafter, the first semiconductor film 114 a and the second semiconductor film 114 b are collectively referred to as a semiconductor film 114. Here, the source electrode and the drain electrode may be interchanged depending on the direction of the current flowing therebetween and the polarity of the semiconductor element. Therefore, in the present specification and claims, the source electrode and the drain electrode may not be determined uniquely, and the source electrode and the drain electrode may function as the drain electrode and the source electrode, respectively. Therefore, it is also possible to define one of the source electrode and the drain electrode arbitrarily selected as the first terminal and the other as the second terminal.

The gate electrode 106 contains a metal such as titanium, tungsten, molybdenum, tantalum, aluminum, copper or the like. Although the gate electrode 106 is depicted as having a single layer structure in FIG. 2A, the gate electrode 106 may be a stack of a plurality of films having different compositions. For example, a structure in which a film containing a metal exhibiting high conductivity such as aluminum is sandwiched by a film containing a metal having a high melting point such as titanium or molybdenum can be employed.

The gate insulating film 108 is a single layer film or a stacked film containing an inorganic compound. Examples of the inorganic compound include inorganic compounds containing silicon such as silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide. The gate insulating film 108 covers at least a part of the gate electrode 106.

Each of the source electrode 110 and the drain electrode 112 is a stack of films including metals usable for the gate electrode 106. For example, the source electrode 110 includes a first conductive layer 110a in contact with the gate insulating film 108, a second conductive layer 110b on the first conductive layer 110a, and a third conductive layer 110c on the second conductive layer 110b. Have. Similarly, the drain electrode 112 is formed of a first conductive layer 112a in contact with the gate insulating film 108, a second conductive layer 112b on the first conductive layer 112a, and a third conductive layer 112c on the second conductive layer 112b. Have. As described later, since the source electrode 110 and the drain electrode 112 are formed in the same step, they are present in the same layer and have the same stacked structure.

In each of the source electrode 110 and the drain electrode 112, the end of the second conductive layer (110b, 112b) is the end of the first conductive layer (110a, 112a) and the third conductive layer (110c, 112c) It exists inside more than. More specifically, as shown in FIGS. 1 and 2A, in the source electrode 110, the side surface of the second conductive layer 110b is closer to the drain electrode 112 than the side surfaces of the first conductive layer 110a and the third conductive layer 110c. Placed far from In other words, the side surfaces of the second conductive layer 110b overlap the top surface of the first conductive layer 110a and the bottom surface of the third conductive layer 110c. Similarly, in the drain electrode 112, the side surface of the second conductive layer 112b is disposed at a position farther from the source electrode 110 than the side surface of the first conductive layer 112a or the third conductive layer 112c. In other words, the side surfaces of the second conductive layer 112b overlap the top surface of the first conductive layer 112a and the bottom surface of the third conductive layer 112c. Due to this structure, the third conductive layer 110c of the source electrode 110 protrudes from the side surface of the second conductive layer 110b in the direction of the drain electrode 112 and is raised relative to the second conductive layer 110b (within the dotted oval). Form the structure). Similarly, the third conductive layer 112c of the drain electrode 112 protrudes from the side surface of the second conductive layer 112b in the direction of the source electrode 110, and forms an eaves with respect to the second conductive layer 112b.

In each of the source electrode 110 and the drain electrode 112, the second conductive layer (110b, 112b) has a resistance compared to the first conductive layer (110a, 112a) or the third conductive layer (110c, 112c). Low, for example, containing aluminum. On the other hand, the first conductive layer (110a, 112a) and the third conductive layer (110c, 112c) have a melting point higher than that of the second conductive layer (110b, 112b), for example, titanium, molybdenum, tungsten, Contains tantalum. The first conductive layers 110a and 112a and the third conductive layers 110c and 112c may have the same chemical composition. The second conductive layers 110b and 112b have the same chemical composition as each other.

The first semiconductor film 114 a is in contact with the gate insulating film 108 and covers part of the first conductive layers 110 a and 112 a. At the same time, the first semiconductor film 114a is separated from the second conductive layers 110b and 112b and the third conductive layers 110c and 112c (FIG. 2A). Therefore, the first semiconductor film 114a is electrically connected to the source electrode 110 and the drain electrode 112 through the first conductive layers 110a and 112a. The first semiconductor film 114 a functions as an active layer in the semiconductor element 100.

On the other hand, the second semiconductor film 114b is in contact with the third conductive layers 110c and 112c, but is separated from the second conductive layers 110b and 112b and the first conductive layers 110a and 112a. The first semiconductor film 114a and the second semiconductor film 114b are separated from each other (FIG. 1, FIG. 2A). However, as described later, since the first semiconductor film 114 a and the second semiconductor film 114 b are formed in the same step, they exist in the same layer and have the same or substantially the same chemical composition. .

The semiconductor film 114 can contain an oxide semiconductor containing a Group 13 element such as silicon or germanium, or indium. The oxide semiconductor can further contain zinc, tin, aluminum, magnesium, silicon and the like, and typically an indium-zinc mixed oxide (IZO) or an indium-gallium-zinc mixed oxide (IGZO) oxide semiconductor It can be used as The crystallinity of the first semiconductor film 114 a and the second semiconductor film 114 b is not limited, and may have any morphology of single crystal, polycrystal, microcrystalline, or amorphous.

As an optional configuration, the semiconductor device 100 may further include an undercoat 104 which is located on the substrate 102 or the substrate 102 and in contact with the substrate 102. The substrate 102 has a function of supporting the semiconductor element 100, and can contain glass, quartz, or plastic. As the plastic, a polymer having a relatively high glass transition temperature, such as polyamide, polyimide or aromatic polycarbonate is used. The undercoat 104 is an insulating film having a function of preventing diffusion of impurities such as alkali metal ions contained in the substrate 102, and contains an inorganic compound including silicon such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide. And a single layer structure or a laminated structure. For example, an insulating film in which a film containing silicon nitride, a film containing silicon oxide, and a film containing silicon nitride are stacked in this order can be used as the undercoat 104. Although not shown, when the undercoat 104 is not provided on the substrate 102, the substrate 102 is in contact with the gate insulating film 108 and the gate electrode 106.

As indicated by dotted lines in the enlarged view of FIG. 2A, source electrode 110 is configured such that the side surfaces of first conductive layer 110a and third conductive layer 110c are on the same plane, and similarly, the first conductive layer The drain electrode 112 is configured such that the side surfaces 112a and the third conductive layer 112c are located on the same plane. However, the configuration of the semiconductor device 100 is not limited to this, and as shown in FIG. 2B, the side surfaces of the first conductive layer 110 a and the third conductive layer 110 c of the source electrode 110 are located on different planes. The side surfaces of the first conductive layer 112 a and the third conductive layer 112 c of the drain electrode 112 may be located on different planes. In this case, in each of the source electrode 110 and the drain electrode 112, the side surface of the third conductive layer (110c, 112c) overlaps the upper surface of the first conductive layer (110a, 112a). In the example shown, the side surfaces of the first conductive layers 110a and 112a, the second conductive layers 110b and 112b, and the third conductive layers 110c and 112c are all inclined from the top surface of the gate electrode 106 or the substrate 102. The angle between the side surface of these conductive layers and the top surface of the gate electrode 106 or the substrate 102 is arbitrary. For example, as shown in FIG. 3, the side surfaces of the second conductive layers 110 b and 112 b correspond to the gate electrode 106 or the substrate 102. It may be perpendicular to the top surface of the.

[2. Production method]
A method of manufacturing the semiconductor element 100 shown in FIGS. 1 and 2A on the substrate 102 will be described using schematic cross sections shown in FIGS. 4A to 5D.

First, the undercoat 104 is formed on the substrate 102 (FIG. 4A). The undercoat 104 can be formed to have a single layer or a laminated structure by applying a chemical vapor deposition (CVD) method, a sputtering method, a sol-gel method, or the like. In the case of using the CVD method, tetraalkoxysilane or the like may be used as a raw material gas. The thickness of the undercoat 104 can be arbitrarily selected in the range of 50 nm to 1000 nm, but it does not have to be constant on the substrate 102 and may have different thicknesses depending on places. Alternatively, the gate electrode 106 may be formed directly on the substrate 102 without forming the undercoat 104.

Next, the gate electrode 106 is formed on the undercoat 104 (FIG. 4A). As described above, the gate electrode 106 can be formed to have a single layer or a stacked structure using a metal such as titanium, aluminum, copper, molybdenum, tungsten, or tantalum, or an alloy thereof. When the semiconductor element 100 is applied to a semiconductor device having a large area such as a display device, for example, a metal having high conductivity such as aluminum or copper is preferably used for the gate electrode 106 in order to prevent signal delay.

Next, a gate insulating film 108 is formed on the gate electrode 106 (FIG. 4B). The gate insulating film 108 may have either a single-layer structure or a stacked-layer structure, and can include the above-described silicon-containing inorganic compound. In the case where an oxide semiconductor is used for the semiconductor film 114, a film containing silicon oxide or a film containing silicon oxide can be used together with the first semiconductor film 114a in order to suppress generation of carriers in the first semiconductor film 114a. It is preferable to form the gate insulating film 108 so as to be in contact with each other. The gate insulating film 108 can be formed by applying a sputtering method, a CVD method, or the like. It is preferable that the atmosphere at the time of film formation does not contain a hydrogen-containing gas such as hydrogen gas or water vapor as much as possible, whereby the composition of hydrogen is small and the gate has a composition of oxygen close to or stoichiometry The insulating film 108 can be formed.

Next, the source electrode 110 and the drain electrode 112 are formed. Specifically, a conductive film 116 is formed on the gate insulating film 108 by CVD or sputtering so as to overlap with the gate electrode 106 via the gate insulating film 108 (FIG. 4B). As described above, the source electrode 110 and the drain electrode 112 have the same laminated structure, and the first conductive layer (110a, 112a), the second conductive layer (110b, 112b), and the third conductive layer ( 110c, 112c). Accordingly, the conductive film 116 also has the first conductive layer 116 a, the second conductive layer 116 b on the first conductive layer 116 a, and the third conductive layer 116 c on the second conductive layer 116 b. The first conductive layer 116a, the second conductive layer 116b, and the third conductive layer 116c are respectively the first conductive layers 110a and 112a, the second conductive layers 110b and 112b, and the third conductive layers 110c and 112c. It has the same composition.

After that, the conductive film 116 is shaped by etching to form the source electrode 110 and the drain electrode 112 (FIGS. 4C and 4D). Here, the etching is performed in two steps. In the first step, the first conductive layer 116a, the second conductive layer 116b, the second conductive layer 116b, the second conductive layer 116b, the second conductive layer 116b, the second conductive layer 116b, the second conductive layer 116b, the second conductive layer 116b, the second conductive layer 116b. The third conductive layer 116c is simultaneously etched to expose a region of the gate insulating film 108 overlapping with the gate electrode 106 (FIG. 4C). At this time, etching is performed so that the side surface of the conductive film 116 exposed by etching is inclined from the top surfaces of the gate electrode 106 and the substrate 102. For example, etching is performed so that the angle between the side surface of the conductive film 116 and the bottom surface of the first conductive layer 116a is 45 ° to less than 90 °, 60 ° to 80 °, or 60 ° to 70 °. Specifically, anisotropic plasma etching may be performed using a gas containing fluorine such as SF ₆ or NF ₃ , or a gas containing chlorine such as BCl ₃ or Cl ₂ . In FIG. 4C, the source electrode 110 is formed such that the side surfaces of the first conductive layer 110a, the second conductive layer 110b, and the third conductive layer 110c are coplanar or substantially coplanar. Similarly, drain electrode 112 is formed such that the side surfaces of first conductive layer 112a, second conductive layer 112b, and third conductive layer 112c are coplanar or substantially coplanar. Aspects are shown. However, the first step etching is performed so that the second conductive layer (110b, 112b) is positioned inside the end of the first conductive layer (110a, 110b) and the third conductive layer (110c, 112c) You may

In the second step, the etching is performed under the condition that the etching rate of the second conductive layer 116 b is larger than that of the first conductive layer 116 a and the third conductive layer 116 c. Specifically, isotropic etching is performed using an alkaline etchant containing sodium hydroxide, potassium hydroxide, ethylenediamine, tetramethylammonium hydroxide (N (CH ₃ ) ₄ OH) or the like. Thereby, the second conductive layer 116b is preferentially etched. As a result, in the source electrode 110, the side surface of the second conductive layer 110b recedes in the direction opposite to that of the drain electrode 112, and the third conductive layer 110c extends from the side surface of the second conductive layer 110b. Protruding in the direction to form a canopy. Similarly, in the drain electrode 112, the side surface of the second conductive layer 112b recedes in the direction opposite to that of the source electrode 110, and the third conductive layer 112c extends from the side surface of the second conductive layer 112b. Protruding in the direction to form a canopy (FIG. 4D).

Next, a semiconductor film 114 is formed to cover the source electrode 110, the drain electrode 112, and the exposed gate insulating film 108. As described above, the third conductive layers 110c and 112c respectively provide an eaves to the second conductive layers 110b and 112b. Therefore, the semiconductor film 114 is not formed under the eaves, and as a result, the first semiconductor film 114a and the pair of second semiconductor films 114b which are separated from each other are provided (FIG. 2A). The former covers a region not covered by the third conductive layers 110 c and 112 c, that is, a part of the first conductive layers 110 a and 112 a and the gate insulating film 108 exposed between the source electrode 110 and the drain electrode 112. The latter are located on the source electrode 110 and the drain electrode 112.

When the semiconductor film 114 contains silicon as a main component, the semiconductor film 114 can be formed by applying a CVD method in the presence of plasma using a gas such as silane (SiH ₄ ) or disilane (Si ₂ H ₆ ). it can.

On the other hand, in the case where the semiconductor film 114 includes an oxide semiconductor, the semiconductor film 114 is formed using a sputtering method or the like. In this case, the semiconductor film 114 can be formed in an atmosphere containing oxygen gas, for example, a mixed atmosphere of argon and oxygen gas. At this time, the partial pressure of argon may be smaller than the partial pressure of oxygen gas.

When the sputtering method is used, the power source applied to the target to be used may be a DC power source or an AC power source, and can be determined by the shape, composition, etc. of the target. As a target, for example, a mixed oxide (In _a Ga _b Zn _c O _d ) containing indium, gallium, and zinc can be used. Here, a, b, c, and d are real numbers of 0 or more, and are not necessarily integers. Therefore, assuming that each element is present as the most stable ion, the above composition is not necessarily an electrically neutral composition. Although InGaZnO ₄ is given as an example of the composition of the target, the composition is not limited to this, and can be appropriately selected so that the first semiconductor film 114 a or the semiconductor element 100 including the same has the intended characteristics.

Heat treatment (annealing) may be performed on the first semiconductor film 114 a and the second semiconductor film 114 b. The heat treatment may be performed at normal pressure or reduced pressure in the presence of nitrogen, dry air, or the atmosphere. The heating temperature can be selected in the range of 250 ° C. to 500 ° C., or 350 ° C. to 450 ° C., and the heating time can be selected in the range of 15 minutes to 1 hour, but heat treatment may be performed outside these ranges. By this heat treatment, oxygen is introduced into oxygen defects of the first semiconductor film 114 a or oxygen is displaced, so that the first semiconductor film 114 a with a clear crystal structure, a small number of crystal defects, and high crystallinity can be obtained. . As a result, it is possible to obtain the semiconductor device 100 having high reliability and excellent electrical characteristics such as high on current, low off current, and low characteristics (threshold voltage) variation.

The method for manufacturing the semiconductor element 100 is not limited to the above-described manufacturing method. For example, as shown in FIG. 5A, the first conductive layer 116a is formed on the gate insulating film 108, and the first conductive layer 116a is etched to expose a region of the gate insulating film 108 overlapping with the gate electrode 106. And the first conductive layer 112a of the drain electrode 112 (FIG. 5B). After that, the second conductive layer 116b and the third conductive layer 116c may be formed (FIG. 5C), and these may be simultaneously etched to form the source electrode 110 and the drain electrode 112 (FIG. 5D). Since the subsequent steps are the same, the description is omitted.

The semiconductor element 100 is manufactured by the above steps. In the semiconductor element 100 formed in this manner, as described above, the first semiconductor film 114a that functions as an active layer and determines the characteristics of the transistor is in contact with the second conductive layers 110b and 112b containing aluminum. do not do. Therefore, in the case where the semiconductor film 114 includes an oxide semiconductor, the first semiconductor film resulting from a reaction between aluminum contained in the second conductive layers 110b and 112b and indium ions present in the first semiconductor film 114a. It is possible to prevent the corrosion of the 114a.

On the other hand, when the second stage etching is not performed, that is, as shown in FIG. 4C, the first conductive layer (110a, 112a) and the second conductive layer (in the source electrode 110 and the drain electrode 112) When the semiconductor film 114 is formed with the side surfaces of 110b, 112b) and the third conductive layer (110c, 112c) being on the same plane or substantially on the same plane, the eaves is the second conductive layer 110b. , And 112b, the semiconductor film 114 is in contact with the second conductive layers 110b and 112b. Therefore, the aluminum contained in the second conductive layers 110 b and 112 b causes electrolytic corrosion of the semiconductor film 114 to deteriorate its characteristics. As a result, the characteristics of the semiconductor element 100 as a transistor deteriorate, or when forming a plurality of semiconductor elements 100, differences in the characteristics occur between the semiconductor elements 100, and the characteristic variations increase.

Therefore, by applying the present embodiment, it is possible to provide a semiconductor element having excellent characteristics as a transistor and having small characteristic variation, and a semiconductor device including the semiconductor element.

Second Embodiment
In this embodiment, as an example of a semiconductor device including the semiconductor element 100, a display device 120 including a light-emitting element as a display element and a manufacturing method thereof will be described. Description of the same or similar structure as the first embodiment may be omitted.

A schematic top view of the display device 120 is shown in FIG. The display device 120 includes a substrate 122 and includes various insulating films, semiconductor films, and conductive films patterned thereon. By appropriately combining these films, driver circuits (a scan line driver circuit 128 and a signal line driver circuit 130) for driving the plurality of pixels 124 and the pixels 124 are formed. Each pixel 124 is a minimum unit for providing color information, and is an area including a display element, a transistor for driving the display element, and a capacitor as described later. The pixels 124 are periodically arranged to define a display area 126. The substrate 122 corresponds to the substrate 102 which is an arbitrary configuration of the semiconductor element 100.

The scanning line drive circuit 128 and the signal line drive circuit 130 are disposed around the display area 126. Wiring 132 extends from the display area 126, the scanning line driving circuit 128, and the signal line driving circuit 130 to the end of the substrate 102, and the wiring 132 is exposed near the end of the substrate 122 to form a terminal. These terminals are electrically connected to a connector 134 such as a flexible printed circuit board (FPC). In the example shown here, a drive IC 136 having an integrated circuit formed on a semiconductor substrate is further mounted on the connector 134. Video signals and power are transmitted from the external circuit (not shown) to the scan line driver circuit 128, the signal line driver circuit 130, and each pixel 124 through the driver IC 136, the connector 134, and the wiring 132. The pixels 124 are controlled and driven based on these video signals and power sources, and a video is displayed on the display area 126. The mode of the drive circuit and the drive IC 136 is not limited to the mode shown in FIG. 6. For example, the drive IC 136 may be mounted on the substrate 122, and a part of the functions of the drive IC 136 is formed on the substrate 122 as a drive circuit. It is also good.

A schematic cross-sectional view of the display area 126 is shown in FIG. FIG. 7 shows one pixel 124 and a part of the pixel 124 adjacent thereto, and an example in which each pixel 124 includes the switching transistor 144, the drive transistor 142, the additional capacitance, and the light emitting element 170 is shown. ing. However, the configuration of the pixel 124 is arbitrary, and, for example, three or more transistors or two or more capacitive elements may be included. Alternatively, no additional capacitance may be provided.

Elements such as the switching transistor 144, the driving transistor 142, the additional capacitance, and the light emitting element 170 are provided on the substrate 122 via the undercoat 140 which is an arbitrary configuration. The undercoat 140 corresponds to the undercoat 104 of the semiconductor device 100 and can have the same configuration as the undercoat 104. Alternatively, gate electrodes 146 a and 146 b described later may be provided in contact with the substrate 122 without the undercoat 140 being provided.

The switching transistor 144 and the driving transistor 142 can each have the same configuration as the semiconductor element 100. Specifically, the switching transistor 144 includes a gate electrode 146 b, a gate insulating film 148 over the gate electrode 146 b, a drain electrode 150 over the gate insulating film 148, a source electrode 152, and a first semiconductor film 154 a. The switching transistor 144 may further include a pair of second semiconductor films 154 b. The drive transistor 142 includes a gate electrode 146a, a gate insulating film 148 over the gate electrode 146a, a drain electrode 156 over the gate insulating film 148, a source electrode 158, and a first semiconductor film 160a. The drive transistor 142 may further include a pair of second semiconductor films 160 b. The gate electrodes 146 a and 146 b correspond to the gate electrode 106 of the semiconductor element 100, and the gate insulating film 148 corresponds to the gate insulating film 108 of the semiconductor element 100. The drain electrodes 150 and 156 correspond to the drain electrode 112 of the semiconductor device 100, and the source electrodes 152 and 158 correspond to the source electrode 110 of the semiconductor device 100. The first semiconductor films 154 a and 160 a correspond to the first semiconductor film 114 a of the semiconductor element 100, and the second semiconductor films 154 b and 160 b correspond to the second semiconductor film 114 b of the semiconductor element 100. The structure up to this point can be formed by applying the manufacturing method of the semiconductor element 100 described in the first embodiment.

A planarization film 162 is further provided on the drive transistor 142 and the switching transistor 144. The planarization film 162 can be formed by applying a photosensitive epoxy resin, an acrylic resin, or the like by using a spin coating method, a printing method, or the like, and exposing, developing, and baking. The planarization film 162 has an opening reaching the source electrode 158 of the drive transistor 142, and a connection electrode 164 covering the opening and a part of the top surface of the planarization film 162 is provided in contact with the source electrode 158. An additional capacitance electrode 166 is further provided on the planarization film 162. The connection electrode 164 and the additional capacitance electrode 166 may be formed at the same time, or may be formed in different steps so as to have different materials. In the former case, the connection electrode 164 and the additional capacitance electrode 166 exist in the same layer and have the same composition. The connection electrode 164 and the additional capacitance electrode 166 can contain a conductive oxide such as ITO or IZO, or a metal such as titanium, molybdenum, tungsten, or tantalum, and can be formed using a sputtering method or a CVD method. it can. Although not illustrated, before forming the planarization film 162, an insulating film containing an inorganic compound containing silicon may be provided to cover the driving transistor 142 and the switching transistor 144.

The display device 120 further has a storage capacitor insulating film 168 so as to cover the connection electrode 164 and the storage capacitor electrode 166. The additional capacitance insulating film 168 contains a silicon-containing inorganic compound such as silicon nitride, silicon oxynitride, or silicon oxide, and is formed by applying a CVD method or the like. The additional capacitance insulating film 168 does not cover a part of the connection electrode 164 at the opening of the planarization film 162, and exposes the upper surface of the connection electrode 164. Accordingly, electrical connection between the pixel electrode 172 and the source electrode 158 provided thereon can be achieved through the connection electrode 164. The additional capacitance insulating film 168 may be provided with an opening 167 for allowing the partition film 169 provided thereon to be in contact with the planarization film 162 by etching. However, the formation of the connection electrode 164 and the opening 167 is optional. By providing the connection electrode 164, corrosion of the surface of the source electrode 158 can be prevented in the subsequent process, and an increase in the contact resistance of the source electrode 158 can be prevented. Impurities in the planarization film 162 can be removed through the openings 167, which can improve the reliability of the light emitting device 170.

A pixel electrode 172 is provided on the additional capacitance insulating film 168 so as to cover the connection electrode 164 and the additional capacitance electrode 166. The storage capacitor insulating film 168 is sandwiched between the storage capacitor electrode 166 and the pixel electrode 172, and a storage capacitor is formed by this structure. The pixel electrode 172 is shared by the additional capacitance and the light emitting element 170.

A partition 169 covering an end of the pixel electrode 172 is provided on the pixel electrode 172. By the partition wall 169, unevenness due to the pixel electrode 172 is alleviated, and cutting of an electroluminescent layer (hereinafter referred to as an EL layer) 174 and a counter electrode 176 provided thereon can be prevented. The partition wall 169 is also formed by applying, exposing, developing, and baking a photosensitive epoxy resin or an acrylic resin, as with the planarizing film 162.

An EL layer 174 and a counter electrode 176 covering the EL layer 174 are provided so as to cover the partition wall 169 and the pixel electrode 172. When light emitted from the light emitting element 170 is extracted through the pixel electrode 172, the pixel electrode 172 is configured to transmit visible light. In this case, as a specific material, a conductive oxide capable of transmitting visible light such as ITO or IZO is used. On the other hand, when light emitted from the light emitting element 170 is extracted through the counter electrode 176, the pixel electrode 172 is configured to reflect visible light. In this case, the pixel electrode 172 contains a metal having a high reflectance of visible light, such as silver or aluminum. Alternatively, the pixel electrode 172 may have a stacked-layer structure of a film containing a conductive oxide and a film containing a metal with high reflectance. For example, a stacked structure of a first conductive film containing a conductive oxide, a second conductive film containing a metal such as silver or aluminum, and a third conductive film containing a conductive oxide can be employed.

The structure of the EL layer 174 is arbitrary, and functional layers such as a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, an electron blocking layer, a hole blocking layer, an exciton blocking layer, etc. It can be formed in combination. These functional layers are formed using a vapor deposition method, a spin coating method, an inkjet method, a printing method, or the like. The structure of the EL layer 174 may be the same between all the pixels 124, and some structures may be different between the adjacent pixels 124. For example, the pixels 124 may be configured such that the structure or material of the light emitting layer is different between adjacent pixels 124, and the other layers have the same structure. In FIG. 7, the hole transport layer 174a, the light emitting layer 174b, and the electron transport layer 174c are shown as representative functional layers in consideration of easy viewing.

When light emitted from the light emitting element 170 is extracted through the pixel electrode 172, the counter electrode 176 is configured to reflect visible light. Specifically, it is formed using a metal with high reflectance such as aluminum, silver, magnesium or an alloy thereof (for example, an alloy of magnesium and silver). On the other hand, in the case where light emitted from the light emitting element 170 is extracted through the counter electrode 176, the pixel electrode 172 is configured to include a conductive oxide which can transmit visible light. Alternatively, the above-described metal or alloy film may be formed to a thickness that allows visible light to pass. In this case, a conductive oxide film showing translucency to visible light may be further formed. The pixel electrode 172 and the counter electrode 176 are also formed using a CVD method, a sputtering method, or an evaporation method. Through the above steps, the light emitting element 170 electrically connected to the driving transistor 142 is formed.

A passivation film 180 is disposed on the counter electrode 176 as an optional configuration. The structure of the passivation film 180 can also be arbitrarily determined, and either a single layer structure or a laminated structure may be employed. In the case of having a stacked structure, for example, a structure in which a first layer 180a containing a silicon-containing inorganic compound, a second layer 180b containing a resin, and a third layer 180c containing a silicon-containing inorganic compound can be sequentially stacked can be employed. . Examples of the silicon-containing inorganic compound include silicon nitride and silicon oxide. Examples of the resin include epoxy resin, acrylic resin, polyester, polycarbonate and the like.

The first layer 180 a may be formed by applying a CVD method or a sputtering method. For the second layer 180b, for example, a polymer can be used, and the polymer can be selected from an epoxy resin, an acrylic resin, a polyimide, a polyester, a polycarbonate, a polysiloxane, and the like. The second layer 180 b can be formed by forming a film of the above-described polymer or a precursor thereof by an ink jet method or a printing method. And may be sprayed onto the first layer 180a and then polymerized by polymerizing the oligomers. The third layer 180c can be formed using a material and a formation method similar to those of the first layer 180a.

The display device 120 is formed by the above steps.

As described in the first embodiment, the drive transistor 142 and the switching transistor 144 included in the display device 120 correspond to the semiconductor element 100 of the first embodiment, and therefore, the variation in characteristics is small. Since light emission of the light emitting element 170 is controlled by these transistors, low variation in characteristics of the driving transistor 142 and the switching transistor 144 contributes to reduction in variation in light emitting characteristics of the light emitting element 170. Therefore, the display device 120 can be used as a display device capable of displaying high quality images.

Third Embodiment
In this embodiment, a display device 200 including a liquid crystal element as a display element and a manufacturing method thereof will be described as an example of a semiconductor device. The description of the same or similar structure as the first and second embodiments may be omitted.

As shown in FIG. 6, similarly to the display device 120, the display device 200 also has a plurality of pixels 124 on the substrate 122, and the pixels 124 include the scan line driver circuit 128, the signal line driver circuit 130, and the driver IC 136. Controlled by A top schematic view of the pixel 124 is shown in FIG. 8, and a schematic cross-sectional view along the dashed-dotted line AA 'in FIG. 8 is shown in FIG.

As shown in FIG. 8, each pixel 124 has a transistor 210 corresponding to the semiconductor element 100, and the transistor 210 extends from the gate signal line 202 extending from the scanning line drive circuit 128 and the signal line drive circuit 130. It is electrically connected to the video signal line 204 to be stretched. The pixel 124 further includes a common electrode 228 and a pixel electrode 224. The basic structure of the liquid crystal element is constituted by the common electrode 228, the pixel electrode 224, and the liquid crystal layer 232 (see FIG. 9). The pixel electrode 224 may have a slit 226. Although the slit 226 shown in FIG. 8 is in a closed shape, it may be an open shape. Alternatively, it may have both open-shaped slits as well as closed-shaped slits 226. The pixel electrode 224 is electrically connected to the transistor 210. A signal corresponding to a video is given to the video signal line 204, and this is applied to the pixel electrode 224 through the transistor 210.

The common electrodes 228 are arranged in stripes in the direction in which the gate signal lines 202 extend, and are shared by the plurality of pixels 124. A fixed potential is applied to the common electrode 228 in a period in which an image is displayed, and functions as one of the electrodes for applying a voltage to the liquid crystal layer 232. Although FIG. 8 shows an example in which the common electrode 228 is disposed in parallel with the gate signal line 202, the common electrode 228 may be disposed in parallel with the video signal line 204.

As shown in FIG. 9, the transistor 210 is provided on the substrate 122 via the undercoat 212. The transistor 210 includes a gate electrode 213, a gate insulating film 216 covering the gate electrode 213, a source electrode 218 over the gate insulating film 216, a drain electrode 220, and a first semiconductor film 214a. The transistor 210 may further include a pair of second semiconductor films 214b. The drain electrode 220 is a part of the video signal line 204 (a part protruding in the right direction in FIG. 8), and a part of the gate signal line 202 (a part protruding in the upper direction in FIG. Function. Although not shown, the pixel 124 may further include a semiconductor element such as a capacitor or another transistor. The undercoat 212 corresponds to the undercoat 104 of the semiconductor device 100. Therefore, the display device 200 may be configured such that the gate electrode 213 is in contact with the substrate 122 without the undercoat 212 being provided.

As understood from FIG. 9, the gate electrode 213 and the gate insulating film 216 correspond to the gate electrode 106 and the gate insulating film 108 of the semiconductor device 100, respectively. The source electrode 218 and the drain electrode 220 correspond to the source electrode 110 and the drain electrode 112 of the semiconductor device 100, respectively. The first semiconductor film 214 a and the second semiconductor film 214 b correspond to the first semiconductor film 114 a and the second semiconductor film 114 b of the semiconductor element 100, respectively. The structure up to this point can be formed by applying the manufacturing method of the semiconductor element 100 described in the first embodiment.

A planarization film 222 is further provided over the transistor 210. The planarizing film 222 can be formed using a material that can be used for the planarizing film 162 of the display device 120 by the same method as the planarizing film 162. Thus, unevenness due to the transistor 210 and the like is absorbed, and a flat surface is provided over the planarization film 222. Although not shown, an insulating film containing an inorganic compound containing silicon may be provided to cover the transistor 210 before the planarization film 222 is formed.

A common electrode 228 is provided on the planarization film 222. The common electrode 228 may be formed by a sputtering method using a conductive oxide which transmits visible light such as ITO or IZO. As an optional configuration, the pixel 124 may have an auxiliary wiring 206 electrically connected to the common electrode 228. The auxiliary wiring 206 extends in the direction in which the video signal line 204 extends, and is shared by the plurality of pixels 124. The auxiliary wiring 206 contains a metal such as titanium, molybdenum, tungsten, or aluminum, and can be formed using a CVD method or a sputtering method. When the common electrode 228 includes a conductive oxide, these oxides have a high resistance compared to metals such as aluminum, copper, tungsten, titanium, and molybdenum, and thus are prone to voltage drop. As a result, between the pixels 124 A large difference occurs in the voltage applied to the common electrode 228. However, by providing the auxiliary wiring 206 containing a metal in contact with the common electrode 228, low conductivity of the conductive oxide can be supplemented, and voltage drop can be prevented or suppressed. The auxiliary wiring 206 may be provided above or below the common electrode 228.

The display device 200 further includes an insulating film 229 covering the common electrode 228 and the planarization film 222. The insulating film 229 has a function of electrically insulating the common electrode 228 and the pixel electrode 224. The insulating film 229 is also an insulating film containing a silicon-containing inorganic compound, and is formed using a CVD method or the like.

The pixel electrode 224 also includes IZO and ITO, and is provided on the planarization film 222 and the insulating film 229 by a sputtering method or the like. The pixel electrode 224 is electrically connected to the source electrode 218 at an opening formed in the planarization film 222 or the insulating film 229. A first alignment film 230 is provided on the pixel electrode 224.

The display device 200 further includes an opposing substrate 240, and the opposing substrate 240 may be provided with a light shielding film (black matrix) 242, a color filter 244, an overcoat 246 covering the light shielding film 242, the color filter 244, and the like. . The counter substrate 240 further has a second alignment film 234 in contact with the overcoat 246. Since the light shielding film 242, the color filter 244, the overcoat 246, and the second alignment film 234 can be formed using a known method, detailed description will be omitted.

The liquid crystal constituting the liquid crystal layer 232 is injected between the substrate 122 and the counter substrate 240. Specifically, the substrate 122 and the counter substrate 240 are bonded such that the first alignment film 230 and the second alignment film 234 face each other, and the space between the first alignment film 230 and the second alignment film 234 is Liquid crystal is injected into the space. Alternatively, liquid crystal may be dropped over the substrate 122 or the counter substrate 240, the counter substrate 240 or the substrate 122 may be disposed thereon, and the liquid crystal layer 232 may be formed by fixing them to each other. Although not shown, in the liquid crystal layer 232, a spacer may be added to keep the distance between the substrate 122 and the counter substrate 240 constant. Alternatively, a spacer may be formed on the counter substrate 240 so as to be located between the adjacent pixels 124.

By providing a potential difference between the common electrode 228 and the pixel electrode 224, an electric field is formed in the liquid crystal layer 232 in a direction substantially parallel to the top surface of the substrate 122. The liquid crystal in the liquid crystal layer 232 is rotated by the electric field, whereby the polarization plane of the polarized light passing through the liquid crystal layer 232 is rotated. Therefore, the display device 200 functions as a Fringe Field Switching (FFS) liquid crystal display device which is a kind of a so-called IPS (In-Plane Switching) liquid crystal display device. However, the display device 200 is not limited to the IPS liquid crystal display device, and may be a TN (Twisted Nematic) liquid crystal display device or a VA (Vertical Alignment) liquid crystal display device.

The display device 200 is formed by the above steps. As described in the first embodiment, the transistor 210 included in the display device 200 corresponds to the semiconductor element 100 of the first embodiment, and thus the variation in characteristics is small. Since the voltage applied to the liquid crystal layer 232 is controlled by the transistor 210, the low variation in the characteristics of the transistor 210 contributes to the reduction in the variation in the characteristics of the liquid crystal element. Therefore, the display device 200 can be used as a display device capable of displaying high quality images.

Fourth Embodiment
In this embodiment, a photosensor 250 including the semiconductor element 100 and a method for manufacturing the same will be described as an example of a semiconductor device. Description of the same or similar structure as the first to third embodiments may be omitted.

FIG. 10 shows a basic circuit configuration of the photo sensor 250, and FIG. 11 shows a schematic cross-sectional view of the photo sensor 250. As shown in FIG. The photosensor 250 includes a photodiode 260 and a transistor 252, and the photodiode 260 is electrically connected to a gate electrode 266 (see FIG. 11) of the transistor 252. The reset potential is input to the terminal 254, whereby the photodiode 260 is turned on, and a charge corresponding to the reset potential is accumulated in the gate electrode 266 of the transistor 252. Reference high potential and low potential are input to the terminal 256 and the terminal 258, respectively. When light is irradiated to the photodiode 260, a photocurrent flows to the photodiode 260, and the charge stored in the gate electrode 266 of the transistor 252 is lost accordingly, and the potential of the gate electrode 266 is changed. As a result, the resistance value between the source electrode 270 and the drain electrode 272 of the transistor 252 changes. By reading the change in the resistance value from the output terminal 259, the intensity of the light irradiated to the photodiode 260 can be estimated. Although not illustrated, the photosensor 250 may further include one or more transistors.

As shown in FIG. 11, the transistor 252 is provided on the substrate 262 via the undercoat 264 which is an optional configuration. The substrate 262 and the undercoat 264 correspond to the substrate 102 and the undercoat 104 of the semiconductor device 100, respectively. When the undercoat 104 is not provided, the gate electrode 266 of the transistor 252 is in contact with the substrate 262.

The transistor 252 includes a gate electrode 266, a gate insulating film 268 over the gate electrode 266, a source electrode 270 over the gate insulating film 268, a drain electrode 272, and a first semiconductor film 274a. The transistor 252 may further include a pair of second semiconductor films 274 b. The gate electrode 266, the gate insulating film 268, the source electrode 270, the drain electrode 272, the first semiconductor film 274a, and the second semiconductor film 274b are the gate electrode 106, the gate insulating film 108, the source electrode 110, and the semiconductor element 100, respectively. It corresponds to the drain electrode 112, the first semiconductor film 114a, and the second semiconductor film 114b. The structure up to this point can be formed by applying the manufacturing method of the semiconductor element 100 described in the first embodiment.

A first planarization film 276 is further provided over the transistor 252. The first planarization film 276 can be formed using a material that can be used for the planarization film 162 of the display device 120 by the same method as the planarization film 162. Thus, unevenness due to the transistor 252 or the like is absorbed, and a flat surface is provided over the first planarization film 276. Although not shown, an insulating film containing an inorganic compound containing silicon may be provided to cover the transistor 252 before the first planarization film 276 is formed.

An opening which exposes the wiring 267 electrically connected to the gate electrode 266 is provided in the first planarization film 276 and the gate insulating film 268, and a connection electrode 278 is formed to cover the opening. At the same time, a first electrode 284 of the photodiode 260 is formed on the first planarization film 276. The connection electrode 278 and the first electrode 284 contain a metal such as titanium, molybdenum, tungsten, or tantalum, and can be formed by a CVD method or a sputtering method.

A semiconductor layer 282 of pin type or pn type is provided over the first electrode 284. For example, the semiconductor layer 282 is a first semiconductor layer having a p-type conductivity, a second semiconductor layer which is a high-resistance semiconductor layer (i-type semiconductor layer) located on the first semiconductor layer, and a second semiconductor layer. A stacked structure including a third semiconductor layer which is located over the semiconductor layer and has n-type conductivity can be provided. These semiconductor layers contain silicon, and their crystallinity is not limited. These semiconductor layers are formed by applying a CVD method, and the conductivity type is controlled by appropriately doping an impurity.

A second planarization film 286 is formed on the semiconductor layer 282. The second planarization film 286 is formed by the same method as the first planarization film 276. Openings which reach the connection electrode 278, the first electrode 284, and the semiconductor layer 282 are formed in the second planarization film 286, and the second electrode 280 and the wiring 288 are formed so as to cover these openings. Ru. That is, the second electrode 280 is arranged to be electrically connected to the connection electrode 278 and the semiconductor layer 282, and the wiring 288 is arranged to be electrically connected to the first electrode 284. The second electrode 280 and the wiring 288 can also be formed in the same manner as the connection electrode 278. The wiring 288 is connected to the terminal 254.

Through the above steps, the photosensor 250 is formed. As described in the first embodiment, the transistor 252 included in the photo sensor 250 corresponds to the semiconductor device 100 of the first embodiment, and thus the variation in characteristics is small. The charge stored in the gate electrode 266 of the transistor 252 corresponds to the amount of light emitted to the photodiode 260. Therefore, the low variation in the characteristics of the transistor 252 contributes to the reduction in the variation in the characteristics of the photosensor 250. Therefore, the photo sensor 250 can be used as a sensor or a light receiving element that accurately measures the light to be emitted.

The embodiments described above as the embodiments of the present invention can be implemented in combination as appropriate as long as they do not contradict each other. In addition, those in which a person skilled in the art appropriately adds, deletes or changes the design of components based on the display device of each embodiment or those in which steps are added, omitted or conditions changed are also included in the present invention. As long as it comprises the gist, it is included in the scope of the present invention.

In the present specification, although a display device and a photo sensor including a light emitting element and a liquid crystal element have been exemplified as the disclosed examples, an electronic paper type display having another self light emitting display, an electrophoretic element and the like as another application example The device may be any flat panel display device such as a device, or a semiconductor device such as a memory device. Moreover, it is applicable without particular limitation from medium size to large size.

Even if other effects or effects different from the effects brought about by the aspects of the above-described embodiments are apparent from the description of the present specification or those which can be easily predicted by those skilled in the art, it is natural. It is understood that the present invention provides.

100: semiconductor device, 102: substrate, 104: undercoat, 106: gate electrode, 108: gate insulating film, 110: source electrode, 110a: first conductive layer, 110b: second conductive layer, 110c: third Conductive layer 112: drain electrode 112a: first conductive layer 112b: second conductive layer 112c: third conductive layer 114: semiconductor film 114a: first semiconductor film 114b: second Semiconductor film 116: conductive film 116a: first conductive layer 116b: second conductive layer 116c: third conductive layer 120: display device 122: substrate 124: pixel 126: display region , 128: scanning line side drive circuit, 130: signal line side drive circuit, 132: wiring, 134: connector, 136: drive IC, 140: undercoat, 142: drive transistor, 14 Switching transistor 146a: gate electrode 146b: gate electrode 148: gate insulating film 150: drain electrode 152: source electrode 154a: first semiconductor film 154b: second semiconductor film 156: drain electrode , 158: source electrode, 160a: first semiconductor film, 160b: second semiconductor film, 162: planarization film, 164: connection electrode, 166: additional capacitance electrode, 167: opening, 168: additional capacitance insulating film, 169: partition wall, 170: light emitting element, 172: pixel electrode, 174: EL layer, 174a: hole transport layer, 174b: light emitting layer, 174c: electron transport layer, 176: counter electrode, 180: passivation film, 180a: first Layer 180b: second layer 180c: third layer 200: display device 202: gate signal line 204: image Signal line, 206: auxiliary wiring, 210: transistor, 212: undercoat, 213: gate electrode, 214a: first semiconductor film, 214b: second semiconductor film, 216: gate insulating film, 218: source electrode, 220 : Drain electrode, 222: planarizing film, 224: pixel electrode, 226: slit, 228: common electrode, 229: insulating film, 230: first alignment film, 232: liquid crystal layer, 234: second alignment film, 240: opposing substrate, 242: light shielding film, 244: color filter, 246: overcoat, 250: photosensor, 252: transistor, 254: terminal, 256: terminal, 258: terminal, 259: output terminal, 260: photodiode , 262: substrate, 264: undercoat, 266: gate electrode, 267: wiring, 268: gate insulating film, 27 0: source electrode, 272: drain electrode, 274a: first semiconductor film, 274b: second semiconductor film, 276: first planarization film, 278: connection electrode, 280: second electrode, 282: semiconductor Layer, 284: first electrode, 286: second flattening film, 288: wiring

Claims (20)

1. Gate electrode,
   A gate insulating film on the gate electrode,
   A source electrode and a drain electrode located on the gate insulating film and having a first conductive layer, a second conductive layer on the first conductive layer, and the source electrode located on the gate insulating film A first semiconductor film electrically connected to the drain electrode;
   The first semiconductor film covers a part of the first conductive layer of the source electrode and the drain electrode, and is separated from the second conductive layer.
2. Further comprising a pair of second semiconductor films;
   The semiconductor device according to claim 1, wherein one of the pair of second semiconductor films is located on the source electrode, and the other is located on the drain electrode.
3. The semiconductor device according to claim 2, wherein the first semiconductor film and the pair of second semiconductor films exist in the same layer.
4. Each of the source electrode and the drain electrode has a third conductive layer on the second conductive layer,
   2. The semiconductor device according to claim 1, wherein in each of the source electrode and the drain electrode, a side surface of the second conductive layer overlaps an upper surface of the first conductive layer and a bottom surface of the third conductive layer.
5. 5. The semiconductor device according to claim 4, wherein in each of the source electrode and the drain electrode, a side surface of the third conductive layer overlaps the upper surface of the first conductive layer.
6. The semiconductor device according to claim 1, wherein the first semiconductor film contains an oxide semiconductor.
7. The method according to claim 4, wherein in each of the source electrode and the drain electrode, the first conductive layer and the third conductive layer include titanium, molybdenum, or tungsten, and the second conductive layer includes aluminum. Semiconductor devices.
8. Having a semiconductor element,
   The semiconductor device is
   A gate electrode,
   A gate insulating film on the gate electrode;
   A source electrode and a drain electrode located on the gate insulating film and having a first conductive layer, and a second conductive layer on the first conductive layer;
   A first semiconductor film located on the gate insulating film and electrically connected to the source electrode and the drain electrode;
   The semiconductor device according to claim 1, wherein the first semiconductor film covers a part of the first conductive layer of the source electrode and the drain electrode and is separated from the second conductive layer.
9. The display device further includes a display element electrically connected to one of the source electrode and the drain electrode.
   The semiconductor device according to claim 8, wherein the display element is selected from a light emitting element and a liquid crystal element.
10. The semiconductor device further comprises a pair of second semiconductor films,
    The semiconductor device according to claim 8, wherein one of the pair of second semiconductor films is located on the source electrode, and the other is located on the drain electrode.
11. The semiconductor device according to claim 10, wherein the first semiconductor film and the pair of second semiconductor films exist in the same layer.
12. Each of the source electrode and the drain electrode has a third conductive layer on the second conductive layer,
    The semiconductor device according to claim 8, wherein in each of the source electrode and the drain electrode, a side surface of the second conductive layer overlaps an upper surface of the first conductive layer and a bottom surface of the third conductive layer.
13. The semiconductor device according to claim 12, wherein in each of the source electrode and the drain electrode, a side surface of the third conductive layer overlaps the upper surface of the first conductive layer.
14. The semiconductor device according to claim 8, wherein the first semiconductor film contains an oxide semiconductor.
15. The method according to claim 12, wherein in each of the source electrode and the drain electrode, the first conductive layer and the third conductive layer contain titanium, molybdenum or tungsten, and the second conductive layer contains aluminum. Semiconductor devices.
16. Form a gate electrode,
    Forming a gate insulating film on the gate electrode;
    A conductive film having a first conductive layer, a second conductive layer on the first conductive layer, and a third conductive layer on the second conductive layer is formed on the gate insulating film,
    A source electrode and a drain electrode are formed by forming the conductive film,
    In each of the source electrode and the drain electrode, the source electrode and the drain electrode are formed such that the side surface of the second conductive layer overlaps the top surface of the first conductive layer and the bottom surface of the third conductive layer. And
    Forming a first semiconductor film so as to overlap with the gate electrode through the gate insulating film, to cover a part of the first conductive layer, and to be separated from the second conductive layer Method of manufacturing a device
17. 17. The manufacturing method according to claim 16, further comprising forming a pair of second semiconductor films respectively located on the source electrode and the drain electrode simultaneously with the formation of the first semiconductor film.
18. In the forming of the conductive film, the third conductive layer of the source electrode protrudes from the side surface of the second conductive layer in the direction of the drain electrode, and the third conductive layer of the drain electrode is the second conductive 17. The method according to claim 16, wherein the method is performed so as to protrude in the direction of the source electrode from the side surface of the layer.
19. The method according to claim 16, wherein in each of the source electrode and the drain electrode, the first conductive layer and the third conductive layer include titanium, molybdenum, or tungsten, and the second conductive layer includes aluminum. How to make
20. The manufacturing method according to claim 16, wherein the first semiconductor film contains an oxide semiconductor.

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