WO2019097281A1 - Fonction de hachage adaptative utilisant une notation des positions de bits pour sélectionner des fenêtres fragmentées - Google Patents

Fonction de hachage adaptative utilisant une notation des positions de bits pour sélectionner des fenêtres fragmentées Download PDF

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Publication number
WO2019097281A1
WO2019097281A1 PCT/IB2017/057239 IB2017057239W WO2019097281A1 WO 2019097281 A1 WO2019097281 A1 WO 2019097281A1 IB 2017057239 W IB2017057239 W IB 2017057239W WO 2019097281 A1 WO2019097281 A1 WO 2019097281A1
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Prior art keywords
bit
bit positions
window
windows
input keys
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PCT/IB2017/057239
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English (en)
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Matias CAVUOTI
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Telefonaktiebolaget Lm Ericsson (Publ)
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Priority to PCT/IB2017/057239 priority Critical patent/WO2019097281A1/fr
Publication of WO2019097281A1 publication Critical patent/WO2019097281A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/10—File systems; File servers
    • G06F16/13—File access structures, e.g. distributed indices
    • G06F16/137—Hash-based

Definitions

  • Embodiments described herein relate to the field of hash tables; and more specifically, to an adaptive hash function that uses a set of fragmented windows of bit positions, which are selected using bit scoring, for use in determining hash table indices.
  • Hash tables have been extensively used for exact match lookups in which input keys may be very wide in length (e.g., 2 8 bits or greater in length).
  • hash functions are used to map input keys into a fixed size index. The fixed size index determines which hash table slot the data associated with the input key will occupy.
  • a particular hash function might be good for a given set of input keys (e.g., able to uniquely identify each input key and associate the input key with a corresponding unique index to avoid collisions between input keys)
  • the same hash function may produce poorer results for another set of input keys (e.g., may result in collisions for another set of input keys).
  • a hash function that performed well initially may soon begin to perform poorly (e.g., increased collisions between input keys).
  • a method for determining one or more windows in a plurality of bit positions for use in determining hash indices for a plurality of input keys, wherein each input key in the plurality of input keys includes a bit value for each bit position in the plurality of bit positions is described.
  • the method comprises generating a set of scores for each bit position in the plurality of bit positions based on the plurality of input keys; determining one or more windows of bit positions in the plurality of bit positions, wherein each window in the one or more windows includes one or more bit positions in the plurality of bit positions and the determination of bit positions in each of the one or more windows is based on the set of scores for each bit position; and building a hash table for the plurality of input keys, wherein the bit values of the plurality of input keys at each bit position of the one or more windows are used as hash indices for the hash table.
  • a network device for determining one or more windows in a plurality of bit positions for use in determining hash indices for a plurality of input keys, wherein each input key in the plurality of input keys includes a bit value for each bit position in the plurality of bit positions, the network device is described.
  • the network device comprises a non-transitory machine- readable storage medium having stored therein an adaptive hash function; and a processor coupled to the non-transitory machine -readable storage medium, the processor configured to execute the adaptive hash function, wherein the adaptive hash function is configured to: generate a set of scores for each bit position in the plurality of bit positions based on the plurality of input keys; determine one or more windows of bit positions in the plurality of bit positions, wherein each window in the one or more windows includes one or more bit positions in the plurality of bit positions and the determination of bit positions in each of the one or more windows is based on the set of scores for each bit position; and build a hash table for the plurality of input keys, wherein the bit values of the plurality of input keys at each bit position of the one or more windows are used as hash indices for the hash table.
  • a non-transitory machine-readable medium for determining one or more windows in a plurality of bit positions for use in determining hash indices for a plurality of input keys, wherein each input key in the plurality of input keys includes a bit value for each bit position in the plurality of bit positions is described.
  • the non-transitory machine-readable medium contains instructions that, when performed by a processor in a computing device, cause the computing device to: generate a set of scores for each bit position in the plurality of bit positions based on the plurality of input keys; determine one or more windows of bit positions in the plurality of bit positions, wherein each window in the one or more windows includes one or more bit positions in the plurality of bit positions and the determination of bit positions in each of the one or more windows is based on the set of scores for each bit position; and build a hash table for the plurality of input keys, wherein the bit values of the plurality of input keys at each bit position of the one or more windows are used as hash indices for the hash table.
  • an adaptive hash function creates a hash table where input keys and corresponding data pairs fit with minimum to no collisions by using a discontinuous set of windows (disjoint bit mask) where the metric used to find these windows is based on the scoring of each bit position by an underlying algorithm. Based on known input keys, each bit position is evaluated and assigned a score based on how well the bit position divides the current input keys. Consideration is given both to the bit positions on their own as well as correlations between bit positions. Once all bit positions have been scored, a fragmented windowing algorithm may use heuristics to pick the highest scoring bit positions to be used for the hash table indexing.
  • the adaptive hash function described here provides a number of benefits, including (1) an adaptive nature by which the function evolves with the input keys to minimize collisions with consequent better performance on the lookup side and (2) a heuristic approach designed to run efficiently even for large sets of input keys such that provisioning of the hash table does not stall when the adaptive hash function needs to morph to adapt to a changing set of input keys.
  • Figure 1 shows a logical representation of an adaptive hash function according to one example embodiment.
  • Figure 2 shows an example set of input keys that may be input to the adaptive hash function according to one example embodiment.
  • Figure 3 shows a first window and a second window in a set of windows according to another example embodiment.
  • Figure 4A shows a first part of a method for calculating a set of windows according to one example embodiment.
  • Figure 4B shows a second part of the method for calculating a set of windows according to one example embodiment.
  • Figure 5 shows a set of input keys and scores for bit positions in the input keys according to one example embodiment.
  • Figure 6 shows a set of counters for bit positions of input keys according to one example embodiment.
  • Figure 7 shows a technique for merging counters to represent counters with less number of history bit positions according to one example embodiment.
  • Figure 8 shows sets of scores generated for the input keys based on two-history bit positions according to one example embodiment.
  • Figure 9 shows sets of scores that are generated for each bit position in a hypothetical set of input keys according to one example embodiment.
  • Figure 10A shows a first window of bit positions according to one example embodiment.
  • Figure 10B shows a set of low scoring bit positions from the first window of bit positions according to one example embodiment.
  • Figure 10C shows a first window and a second window of bit positions according to one example embodiment.
  • Figure 10D shows a set of low scoring bit positions from the second window of bit positions according to one example embodiment.
  • Figure 10E shows a first window and a second window of bit positions according to another example embodiment.
  • Figure 10F shows a set of low scoring bit positions from the second window of bit positions according to another example embodiment.
  • Figure 10G shows a first window, a second window, and a third window of bit positions according to one example embodiment.
  • Figure 11A shows a method for calculating a set of windows 111 according to another example embodiment.
  • Figure 11B shows sub-operations for determining a set of windows of bit positions according to one example embodiment.
  • Figure 12A illustrates connectivity between network devices (NDs) within an exemplary network, as well as three exemplary implementations of the NDs, according to some embodiments.
  • Figure 12B illustrates an exemplary way to implement a special-purpose network device according to some embodiments.
  • FIG. 12C illustrates various exemplary ways in which virtual network elements (VNEs) may be coupled according to some embodiments.
  • VNEs virtual network elements
  • Figure 12D illustrates a network with a single network element (NE) on each of the NDs, and within this straight forward approach contrasts a traditional distributed approach (commonly used by traditional routers) with a centralized approach for maintaining reachability and forwarding information (also called network control), according to some embodiments.
  • Figure 12E illustrates the simple case of where each of the NDs implements a single NE, but a centralized control plane has abstracted multiple of the NEs in different NDs into (to represent) a single NE in one of the virtual network(s), according to some embodiments.
  • Figure 12F illustrates a case where multiple VNEs are implemented on different NDs and are coupled to each other, and where a centralized control plane has abstracted these multiple VNEs such that they appear as a single VNE within one of the virtual networks, according to some embodiments.
  • Figure 13 illustrates a general-purpose control plane device with centralized control plane (CCP) software, according to some embodiments.
  • CCP centralized control plane
  • the following description describes an adaptive hash function that determines one or more windows of bit positions for a plurality of input keys based on a set of scores for each bit position such that the one or more windows of bit positions uniquely identifies each input key in the plurality of input keys.
  • numerous specific details such as logic implementations, opcodes, means to specify operands, resource partitioning/sharing/duplication implementations, types and interrelationships of system components, and logic
  • partitioning/integration choices are set forth in order to provide a more thorough understanding of the present systems, devices, structures, methods, and designs. It will be appreciated, however, by one skilled in the art that the embodiments described herein may be practiced without such specific details. In other instances, control structures, gate level circuits and full software instruction sequences have not been shown in detail in order not to obscure the systems, devices, structures, methods, and designs described herein. Those of ordinary skill in the art, with the included descriptions, will be able to implement appropriate functionality without undue experimentation.
  • references in the specification to“one embodiment,”“an embodiment,”“an example embodiment,” etc. indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
  • Bracketed text and blocks with dashed borders may be used herein to illustrate optional operations that add additional features to embodiments. However, such notation should not be taken to mean that these are the only options or optional operations, and/or that blocks with solid borders are not optional in certain embodiments.
  • Coupled is used to indicate that two or more elements, which may or may not be in direct physical or electrical contact with each other, co-operate or interact with each other.
  • Connected is used to indicate the establishment of communication between two or more elements that are coupled with each other.
  • Figure 1 shows a logical representation of an adaptive hash function 100 according to one example embodiment.
  • the adaptive hash function 100 may receive an input key 101 and may output a hash table index 109 corresponding to the input key 101.
  • the adaptive hash function 100 keeps track of a set of input keys 101 I -101 M that were input or otherwise provided to the adaptive hash function 100.
  • Figure 2 shows an example set of input keys 101 I -101 M that may be input to the adaptive hash function 100 according to one example embodiment.
  • each input key 101 in the set of input keys 101 I -101 M includes a bit value x for each bit position 20li-20lp.
  • the adaptive hash function 100 determines a set of one or more windows 111 N of bit positions 201 from the set of input keys 101 I -101 M that are needed to uniquely identify each input key 101 in the set of input keys 101 I -101 M .
  • the adaptive hash function 100 may operate to select a set of windows 111 N of bit positions 201 for the set of input keys 101 I -101 M based on a set of scores for each bit position 201 (e.g., one or more scores).
  • a set of scores for a bit position 201 indicates the ability of the bit position 201 to divide the set of input keys 101 I -101 M into two equally sized groups of input keys 101 based on bit values x of the bit position 201 in the input keys 101 I -101 M and possibly bit values x of other bit positions 201 in the input keys 101 I-101M (e.g., preceding/history bit positions 201).
  • Figure 3 shows a set of fragmented/discontinuous windows 111 1 and I l k according to one example embodiment.
  • Sets of windows 111 N may be fragmented/discontinuous such that at least one bit position 201, which is not part of a window 111 in the set of windows 111N, separates one or more bit positions 201 in one window 111 in the set of windows 111 N from one or more bit positions 201 in another window 111 in the set of windows 111 N .
  • a first window 1111 in a set of windows 111 N for the set of input keys 101 I-101M includes bit positions 201 2 -201 4 and a second window 111 2 in the set of windows 111 N for the set of input keys 101 I -101 M includes the bit position 20 L ⁇ ,.
  • the first and second windows 1111 and 11 h in the set of windows 111N are fragmented/discontinuous because they are separated by the bit position 2015, which is not included in any of the windows 1111 and 11 within the set of windows 111 N .
  • the adaptive hash function 100 may determine at operation 103 if a new set of windows 111N of bit positions 201, that will replace a current set of windows 11 lc, should be calculated. In one embodiment, this determination to calculate a new set of windows 11 lc may be made in response to the number of input keys 101 I-101M being received by the adaptive hash function 100 exceeding a predefined threshold and/or the input keys 101 I -101 M growing by a predefined percentage.
  • the adaptive hash function 100 may use the current set of windows 11 lc to compute an index 109 for the received input key 101 at operation 105.
  • the bit values x of the input key 101 located at the bit positions 201 within the windows 111 in the set of windows 11 lc may be used to compute an index 109 for the input key.
  • the index 109 computed by the adaptive hash function 100 may be used for accessing a hash table.
  • the hash table may correspond to a forwarding table in a network routing device and the input key 101 may be a destination address for a packet in a network of the network routing device.
  • the index 109 computed by the adaptive hash function 100 may be used for locating an entry in the hash table corresponding to the input key 101 and indicating a forwarding port.
  • the adaptive hash function 100 may move to operation 107.
  • Operation 107 may be used to calculate a new set of windows 111 N and these new set of windows 111 N may replace the current set of windows 11 lc.
  • the new set of windows 111N calculated at operation 107 may be used for determining an index 109 for the input key 101 at operation 105 instead of the current/old set of windows 11 lc.
  • Calculating the set of windows 111 N at operation 107 may be performed using a number of techniques.
  • Figures 4A and 4B show one method 400 for calculating a set of windows 111 N according to one example embodiment. The method 400 may be used by operation 107 of the adaptive hash function 100 to calculate sets of windows 111.
  • the method 400 may be used for calculating a new set of windows 111 N that will replace a current/old set of windows 11 lc that is currently being used by the adaptive has function 100.
  • the method 400 may commence at operation 401 with generation of a set of scores (e.g., one or more scores) for each bit position 201 in the set of input keys 101.
  • a set of scores e.g., one or more scores
  • the set of scores reflect the ability of the corresponding bit position 201 to divide the set of input keys 101 I-101M into two equally sized groups of input keys 101 based on bit values x of the bit position 201 in the input keys lOli-lOl M and possibly bit values x of other bit positions 201 in the input keys 101 I -101 M (e.g., history or preceding bit positions 201). For example, a highest or perfect score may be assigned to bit positions 201 that divide or distinguish the input keys 101 I -101 M into two equal groups of inputs keys 101 and a lowest score may be assigned to bit positions 201 that are unable to divide or distinguish any of the input keys 101 I -101 M .
  • Figure 5 shows a set of input keys 101 according to one example embodiment.
  • Bit position 20lo for the input keys IOI 1 -IOI 4 may divide the set of input keys 101 exactly in half (e.g., into two equal groups of input keys 101).
  • the input keys lOli and IOI 4 with the bit values x of“1” can be distinguished from the second and third input keys lO and IOI 3 with the bit values of“0”.
  • bit position 2011 fails to divide the input keys IOI1-IOI4 at all as all bit values x of the bit position 20b for the input keys IOI 1 -IOI 4 are the same (i.e., all bit values x for bit position 20b for all input keys IOI 1 -IOI 4 in Figure 5 are“0”).
  • Figure 5 shows a score 501 for each bit position 20lo4 that is calculated based on the number of l’s in each bit position 20lo- 4 and the number of total input keys 101.
  • scores 501 described herein may be calculated in relation to any predefined value (e.g., l’s or 0’s) and the number of l’s is purely used for illustrative purposes.
  • the score 501 for each bit position 20lo 4 is based on the ratio of the number of l’s in each bit position 201 04 and the number of total input keys 101. This ratio may be scaled based on a score base 503 to produce the score 501 for each bit position 20lo-4.
  • the score base 503 is one-hundred such that a perfect or maximum score 505 for a bit position 201 (e.g., a bit position 201 that divides the input keys 101 exactly in half) is fifty.
  • another score base 503 may be used (e.g., ten, twenty, one- thousand, etc.).
  • the bit position 20lo includes two l’s for the four input keys lOli- IOI 4 . This ratio when multiplied by the score base 503 produces a score 50lo of fifty.
  • the bit position 201 1 includes two l’s for the four input keys IOI 1 -IOI 4 .
  • the bit position 20 h includes two l’s for the four input keys IOI 1 -IOI 4 . This ratio when multiplied by the score base 503 produces a score 50h of fifty.
  • the bit position 20b includes zero l’s for the four input keys IOI 1 -IOI 4 . This ratio when multiplied by the score base 503 produces a score 50 b of zero.
  • the bit position 20 b includes one 1 for the four input keys IOI 1 -IOI 4 . This ratio when multiplied by the score base 503 produces a score 50 b of twenty-five.
  • generation of the scores 50lo- 4 requires a single counter for each bit position 20lo-4 (e.g., a counter for each bit position 20lo-4 to count the number of l’s in each bit position 20lo over each of the input keys IOI 1 -IOI 4 ).
  • Equation 1 shows a technique according to one example embodiment for generating a score 501 (i.e., Score ) for each bit position 201 (i.e., pos) based on the number of l’s (i.e., one count) and the score base 503 (i.e., score base) in line with the example of Figure 5.
  • Score a score 501
  • pos bit position 201
  • l number of l’s
  • score base 503 i.e., score base
  • Equation 1 a perfect or maximum score 505 would be calculated for a bit position 201 that divides the set of input keys 101 I -101 M in half.
  • the maximum score 505 would be equal to one-half of the score base 503 (e.g., score base).
  • the bit positions 20lo- 2 each have a score 501 with a maximum score 505 (i.e., fifty).
  • Equation 1 views each bit position 201 on its own and does not factor in correlations between bit positions 201.
  • bit positions 20 lo and 20 h from Figure 5 may individually have scores 50lo and 50h that are maximum scores 505 such that each of these bit positions 20lo and 201 2 may individually divide the input keys IOI 1 -IOI 4 in half, since bit values x in bit positions 20lo and 20k for these input keys lOli-lOk are identical, together the bit positions 20lo and 20 k offer no more assistance in uniquely distinguishing input keys 101 in comparison to the bit positions 20lo and 20k taken on their own.
  • bit positions 201 Based on correlations between bit positions 201, it may be necessary to consider multiple bit positions 201 when generating scores 501 for a single bit position 201.
  • one or more previous bit positions 201 may be considered when generating scores 501 for the bit position 201.
  • These previous bit positions 201 may be alternatively referred to as history bit positions 201 and scores 501 generated based on previous/history bit positions 201 may be referred to as correlation scores 501 for purposes of this description.
  • the set of scores 501 for each bit position 201 may include a local score 501 based on the bit position 201 on its own (e.g., using Equation 1) and one or more correlation scores 501 for each set of history bit positions 201.
  • a first score 501 would be a local score 501 that reflects the ability of the bit position 20k by itself to divide the set of input keys 101 I -101 M into equal groups of input keys 101
  • a second score 50 k would be a correlation score 501 that reflects the ability of the bit position 20 k in relation to a first history bit position 20k-i to divide the set of input keys 10 k- 101 M into equal groups of input keys 101
  • a third score 501 would also be a correlation score 501 that reflects the ability of the bit position 20 k in relation to the first history bit position 20k-i and a second history bit position 20k- 2 to divide the set of input keys 101 I -101 M into equal groups of input keys 101.
  • a set of counters may be used for each bit position 201 to generate a set of scores 501, including a local score 501 and one or more correlation scores 501.
  • Figure 6 shows a set of counters 60lo , o-60k ,4 that are used to calculate a set of scores 501 for each bit position 201 using history bit positions 201 according to one example embodiment.
  • the number of counters 601 for each bit position 201 is equal to two to the power of the number of history bit positions 201 (i.e., 2 Num - Hlstoiy - Blt - Positlons ).
  • two history bit positions 201 are used to calculate a set of scores 501 for each bit position 201.
  • there are four counters 6OI0-3 for each bit position 201 i.e., 2 2 counters 601) in the example of Figure 6.
  • the counters 601 may be logically represented in a matrix.
  • there are four counters 601 0-3 for each of the five bit positions 20lo-4 such that there is a four-by-five (4x5) matrix of counters 60lo , o-60k ,4 .
  • bit values x for history bit positions 201 may be used for indexing into the matrix of counters 601o , o-60 ,4 .
  • the bit values x for the history bit positions 2011 and 20lo for the input key 1011 represent the binary number lCh, which is the decimal number 2io. Accordingly, for the history bit positions 201 1 and 20 lo for the input key 101 1 in relation to the bit position 201 2 , the counter 601 2,2 may be modified.
  • each counter 601 may include two parts: a first part 603A indicates how many history bit positions 201 from the input keys 101 I-M have indexed to that counter 601 and a second part 603B may count the number of l’s for the corresponding bit position 201 when the history bit positions 201 indexes to the counter 601.
  • a first part 603A indicates how many history bit positions 201 from the input keys 101 I-M have indexed to that counter 601
  • a second part 603B may count the number of l’s for the corresponding bit position 201 when the history bit positions 201 indexes to the counter 601.
  • the bit values x for the history bit positions 20b and 20 b of the input key 101 1 represent the binary number 10 2 , which is the decimal number 2io.
  • the counter 60b , 4 in the matrix of counters 601 is accessed and the first part 603A of the counter 60 b , 4 is incremented to note that the history bit position 20 b and 20 b for the input key lOli indexed to the counter 60b , 4 .
  • the second part 603B of the counter 60 b , 4 is also incremented because bit position 20b of the input key lOli has a bit value of“1”.
  • bit values x for the history bit positions 20 b and 20 b represent the binary number OO 2 , which is the decimal number O 10 .
  • the counter 60lo ,4 in the matrix of counters 601 is accessed and the first part 603A of the counter 60b , 0 is incremented to note that the history bit position 20b and 20b for the input key lOb indexed to the counter 60lo ,4 .
  • the second part 603B of the counter 60 , 4 is also incremented because bit position 20b of the input key lOb has a bit value of“1”.
  • the bit values x for the history bit positions 20b and 20b represent the binary number OO 2 , which is the decimal number O 10 .
  • the counter 60lo ,4 in the matrix of counters 601 is accessed and the first part 603A of the counter 60lo ,4 is incremented to note that the history bit position 20b and 20b for the input key lOb indexed to the counter 60lo ,4 .
  • the second part 603B of the counter 60b , o is also incremented because bit position 20b of the input key lOb has a bit value of“1”.
  • bit values x for the history bit positions 20b and 20b represent the binary number IO 2 , which is the decimal number 2io.
  • the counter 60b , 4 in the matrix of counters 601 is accessed and the first part 603A of the counter 60b , 2 is incremented to note that the history bit position 20b and 20b for the input key lOb indexed to the counter 60 b , 4 .
  • the second part 603B of the counter 60 b , 4 is not incremented because bit position 20b of the input key lOb has a bit value of“0”.
  • Equation 2 below may be used to calculate scores 501 using history bit positions 201 based on the counters 601, including the first part 603A (i.e., counter keys) and the second part 603B (i.e., counter one count) described above.
  • Figure 7 shows a technique for merging counters 601 to represent counters 601 with less number of history bit positions 201. As shown in Figure 7, the first half of the counters 601 from Figure 6 are added with the second half of the counters 601 from Figure 6 to progressively arrive at a less number of counters 601. Each iteration of counters 601 takes into account one less history bit position 201.
  • Figure 8 shows example sets of scores 501_m generated for the input keys IOI 1 -IOI 4 based on two-history bit positions 201 as represented by the counters 601 from Figure 7. As shown in Figure 8, three scores 50lo ,i -50l 2,i are generated for each of the bit positions 20lo- 4 . For example, with respect to the bit position 20 h, there are three associated scores 501. Score 50lo ,2 is a local score 501 that represents the ability of the bit position 20 h to divide the set of input keys 101 I -101 M into two equally sized groups.
  • Score 50lo ,2 is a maximum score 505 (e.g., 1 ⁇ 2 score base 503, which is fifty).
  • Score 501 1.2 is a correlation score 501 that represents using the bit position 201 2 in relation to the bit position 202 1 to divide the set of input keys 101 I -101 M into two equally sized groups.
  • the score 501 1,2 is a maximum score 505 (e.g., 1 ⁇ 2 score base 503, which is fifty).
  • Score 50l 2,2 is a correlation score 501 that represents using the bit position 20 in relation to the bit position 202i and the bit position 202o to divide the set of input keys 101 I-101M into two equally sized groups.
  • bit position 2011 does not offer much benefit to divide the set of input keys 101 I -101 M into two equally sized groups as the bit positions 20 h and 20 lo have the same bit values x.
  • Figure 9 shows sets of scores 50lo- 27 that are generated for a hypothetical set of input keys 101 with twenty-eight bit positions 20lo- 27 .
  • the sets of scores 50lo- 27 of Figure 9 will be used for explanatory purposes in relation to the method 400.
  • the method 400 may move to operation 403.
  • the method 400 finds a continuous window 111 1 of bit positions with the highest/best cumulative scores 501 using the sets of scores 50lo- 27 .
  • the continuous window 111 1 found at operation 403 may include a number of bit positions 201 equal to a maximum bit position count.
  • the maximum bit position count defines the overall maximum number of bit positions 201 that may be included in a set of windows 111 N determined by the method 400.
  • the maximum bit position count may be set based on the size of the hash table of the adaptive hash function 100. For example, a hash table with 2 18 entries will have a maximum bit position count of eighteen.
  • Figure 9 shows sets of scores 50lo- 27 for twenty-eight bit positions 201 o- 27 associated with a set of input keys 101. As shown in Figure 9, each set of scores 50lo- 27 includes nine individual scores 501i , i-501i ,9 .
  • the first score 501 , ] in each set of scores 50 li ,i -50 li ,9 is relative to zero history bit positions 201
  • the second score 50 h , 2 in each set of scores 50 li ,i -50 li ,9 is relative to one history bit position 201
  • the third score 501, .2 in each set of scores 50 li ,i -50 li ,9 is relative to two history bit positions 201, etc.
  • bit position 20li indicates the ability of the bit position 20li to evenly divide the input keys 101 into two equal groups of input keys 101 relative to the bit position 201, itself, the second score 501, .2 in each set of scores 501, . ] -501, . ⁇ , indicates the ability of the bit position 20 h to evenly divide the input keys 101 into two equal groups of input keys 101 relative to the bit position 201, itself and one history bit position 201,- 1 , the third score 501 , .
  • each set of scores 501i , i-501i ,9 indicates the ability of the bit position 20li to evenly divide the input keys 101 into two equal groups of input keys 101 relative to the bit position 20 h itself and two history bit positions 20 li-i and 20 li_ 2 .
  • Figure 10A shows an example window 111 1 found through performance of operation 403 using the sets of scores 50lo- 27 shown in Figure 9.
  • the maximum bit position count may be eighteen, such that the window 111 1 of Figure 10A has eighteen bit positions 201 10-27 .
  • the window 111 1 of Figure 10A was selected amongst other windows 111 with the maximum bit position count based on the cumulative score 50 lc of the window 1111 in Figure 10A being the highest amongst all windows 111 with the maximum bit position count.
  • the cumulative score 50 lc for the window 111 1 is the sum of one score 501 from each set of scores 50li ,i -50li ,9 for the bit positions 20110- 27 , which are the bit positions 201 in the window 111 1 .
  • the cumulative score 501 c for the window 111 1 may use scores 50110,1 ,
  • scores 501 utilize correlation scores 501 representing the most bit positions 201 in the window 111 1 .
  • the score 50 hop which represents no history bit positions 201, is used for the bit position 20 ho as there are no history bit positions 201 in the window 11 h relative to the bit position 20 ho.
  • the score 50hi ,2 which represents a single history bit position 20 ho, is used for the bit position 20 hi as there is only a single history bit position 20 ho in the window 11 h relative to the bit position 20hi.
  • the score 50li 2,3 which represents two history bit position 20ho and 2l0n is used for the bit position 201 12 as there are two history bit positions 20 ho and 2l0n in the window 11 h relative to the bit position 201 12 .
  • the scores 50 h , 9 are used as there are only eight history bit positions 201 being tracked.
  • the window 11 h selected at operation 403 may be added to the set of windows 111N (e.g., one or more windows 111) that are being considered for use by the adaptive hash function 100 to uniquely identify each input key 101.
  • operation 405 may determine whether the set of windows 111N has enough high scoring bit positions 201 (alternatively referred to as good bit positions 201) such that the bit positions 201 in the windows 111 N are able to uniquely identify each input key 101.
  • operation 405 may determine whether there are enough high scoring bit positions 201 based on the ratio of the cumulative score 50 lc for the windows 111 in the set of windows 111 N to the maximum score 505 for a bit position 201. For example, Equation 3 below may be used to determine whether the set of windows 111N include enough high scoring bit positions 201 such that the bit positions 201 in the set of windows 111 N are able to uniquely identify each input key 101.
  • the bit positions 201 in the set of windows 111 N are able to uniquely identify each input key 101.
  • the method 400 may move to operation 407 to note that processing has been completed.
  • the method 400 may move to operation 409.
  • operation 405 may generally determine whether the bit positions 201 in the set of windows 111 N are able to distinguish between each input key 101 in the set of input keys 101 l-M . For example, this may involve use of sixteen high scoring bit positions 201, thirty low scoring bit positions, or some combination of high and low scoring bit positions 201.
  • determining a particular or adequate number of high scoring bit positions 201 may be genericized to determining whether the bit positions 201 in the set of windows 111N are able to distinguish between each input key 101 in the set of input keys 101 I-M.
  • the method 400 may determine whether the current number of windows 111 in the set of windows 111 N is equal to the maximum number of windows 111 permitted by the adaptive hash function 100.
  • the maximum number of windows 111 may be imposed by a user of the adaptive hash function 100 and defines the number of discontinuous windows 111 in the set of windows 111N.
  • the maximum number of windows 111 may be any number of windows 111, including two, three, four, etc.
  • the method 400 may move to operation 407 to note that processing has been completed.
  • the method 400 may move to operation 411.
  • the method 400 may attempt to locate a window 111 in the set of windows 111 N that can be split.
  • operation 411 may attempt to locate a window 111 in the set of windows 111 N that was not previously analyzed during the current run of the method 400 to locate low scoring bit positions 201.
  • operation 413 may determine that all windows 111 in the set of windows 111 N have already previously been analyzed by the current run of the method 400.
  • the method 400 may move to operation 407 to note that processing has been completed.
  • operation 415 may determine the size of a sub-window to split out of a window 111 in the set of windows 111N.
  • the size of the sub-window to split out of a window 111 in the set of windows 111 N is equal to the number of high scoring bit positions 201 still needed by the set of windows 111N to uniquely identify each input key 101.
  • Equation 3 may determine that there are fourteen high scoring bit positions 201 in the set of windows 111 N .
  • there may be 62,811 input keys 101 i.e., input keys 101i- 6288 ⁇ ).
  • operation 415 may determine that the sub-window has a size of two to meet the gap between the number of high scoring bit positions 201 in the set of windows 111 N (i.e., fourteen high scoring bit positions 201 in the set of windows 111 N ) and the desired number of high scoring bit positions 201 (i.e., sixteen high scoring bit positions 201 in the set of windows 111 N ).
  • operation 417 determines that the size of the sub-window determined at operation 415 is zero (e.g., all current bit positions 201 in the set of windows 111 N are high scoring bit positions 201), the method 400 may move to operation 407 to note that processing has been completed.
  • a low scoring bit position threshold may be used for determining whether a bit position 201 in a window 111 is a low scoring bit position 201.
  • Equation 4 may be used for computing the low scoring bit position threshold.
  • the maximum score 505 (i.e., bit _position_max_score) may be used in conjunction with the average score 501 for windows 111 in the set of windows 111N to determine the low scoring bit position threshold (i.e., low scoring bit _position_thld).
  • the low scoring bit position threshold may be used at operation 419 to compare with bit positions 201 in the window 111 located at operation 411 to find continuous bit positions 201 in the window 111 located at operation 411 with a size of the sub-window determined at operation 415.
  • Figure 10B shows a set of low scoring bit positions 201 io and 20 ln, which are part of window 111 1 according to the example scores 501 of Figure 9.
  • the bit positions 201 io and 20ln are selected as low scoring bit positions 201 by operation 419 as the next bit position 20 ln is not a low scoring bit position 201 to join the continuous set of low scoring bit position 201 io and 201 n.
  • the bit positions 201 selected at operation 419 may be split or partitioned from the window 111 selected at operation 411 such that there is a low scoring window 11 l L and one or more remaining windows 111k from the window 111 selected at operation 411.
  • the low scoring window 11 lL would include the bit positions 201 io and 20ln and the remaining window 111k would include the bit positions 2OI 12 -2OI 27 .
  • I I l R (i.e., window 111 1 ) would be included in the set of windows 111 N to be used by the adaptive hash function 100, while the low scoring window 11 l L will be removed from the set of windows 111 N . If operation 423 determines that operation 421 pushes the number of windows
  • the method 400 returns to operation 411 to locate a new window 111 from the set of windows 111 N to split instead of the currently split window 111.
  • the original window 111 before the split is returned to the set of windows 111 N in place of the one or more remaining windows 11 lR.
  • the method 400 may move to operation 425 to select a new window 111 with a number of bit positions 201 equal to the number of bit positions 201 in the low scoring window 11 l L .
  • the window 111 selected at operation 425 may be the best scoring window 111, outside of the set of windows 1 11 N and previously considered bit positions 201.
  • Figure 10C shows an example new window 11 according to one embodiment. As shown, the bit positions 2015 and 20 h, are included in the new window 11 h since these bit positions 201 represent the highest cumulative scores 501 for windows 111 of bit positions 201 of size two that is not included in the set of windows 111 N and does not include a bit position 201 that was previously considered.
  • the score 501 for bit position 2015 would be 34758 (i.e., score 50ls ,i ) and the score 501 for bit position 2016, taking into account one history bit position 201 (i.e., bit position 2015) would be zero (i.e., score 5016 ,2 ).
  • the cumulative score 50lc for the window 111 2 created by the bit positions 201 5 and 20l 6 is 34758, which is higher than all other potential windows 111 of bit positions 201 considered by operation 425.
  • the method 400 may determine whether the window 111 found at operation 425 has a size equal to zero (i.e., includes no bit positions 201). When operation 427 determines that the window 111 found at operation 425 has a size equal to zero, the method 400 may move to operation 407 to note that processing has been completed. Otherwise, the method 400 may move to operation 429 to insert the window 111 found at operation 425 to the set of windows 111 N . For example, in the case of Figure 10C, the new window 11 may be added to the set of windows 111N.
  • the method 400 may determine whether the set of windows 111 N includes the same windows 111 that were used by the adaptive hash function 100 prior to commencing the method 400 (i.e., the set of windows 11 lc). Upon determining that the set of windows 111 N includes the same windows 111 that were used by the adaptive hash function 100 prior to commencing the method 400, the method 400 may move to operation 411 to attempt to locate a new window 111 in the set of windows 111 N to split. Otherwise, the method 400 may move to operation 405 to determine whether the set of windows 111 N includes enough high scoring bit positions 201.
  • the operations 405-431 may be performed multiple times during a single invocation of the method 400 to produce the set of windows 111 N .
  • Figure 10D shows another example in which a low scoring bit position 201 6 in the window 11 U from Figure 10C is identified and split from the window 11 h.
  • the bit position 201 4 is identified as a best scoring window 111 that was located after splitting the bit position 201 6 from the window 11 h. Since the window 11 h and the window 111 created by the bit position 201 5 are adjacent, these windows 111 are merged into a single window 11 h.
  • bit position 2015 may be identified as a low scoring bit position 201 in the window 11 h and the bit position 201 5 may be split from the window 11 h as shown in Figure 10F.
  • bit position 20 lo is identified as a best scoring window 11 U that was located after splitting the bit position 2015 from the window I I I 2 .
  • the window 1111 i.e., bit positions 2OI1 2 -2OI 27
  • the window I I I 2 i.e., the bit position 2014
  • the window 11 b i.e., the bit position 20 lo
  • operation 405 may determine that the set of windows 111N has enough high scoring bit positions 201 to uniquely identify each input key 101 such that processing may be determined to be done at operation 407.
  • operation 433 may determine whether the set of windows 111 N is identical to the set of windows 11 lc currently being used by the adaptive hash function 100. If the set of windows 111 N and 11 lc are not identical, the method 400 may move to rebuild the hash table associated with the adaptive hash function 100 to ensure maximum occupancy in the hash table at operation 435.
  • bit positions 201 included in windows 111 in the set of windows 111 N are used for calculating indices 109 in the hash table for data based on corresponding input keys 101.
  • bit values x at the bit positions 20 lo, 20 U. and 201 12 -2OI 27 for input keys 101 are used as indices 109 for a hash table associated I 11 ⁇ the adaptive hash function 100. If the set of windows 111N and 11 lc are identical, as determined at operation 433, the method 400 may move to determine to not rebuild the hash table associated with the adaptive hash function 100 at operation 437.
  • the adaptive hash function 100 creates a hash table where input keys 101 and corresponding data pairs associated with the input keys 101 fit with minimum to no collisions by using a discontinuous set of windows 111 N (disjoint bit mask) where the metric used to find these windows 111 is based on the scoring of each bit position 201 by an underlying algorithm. Based on known input keys 101, each bit position 201 is evaluated and assigned a score 501 based on how well the bit position 201 partitions the current input keys 101.
  • the adaptive hash function 100 described here provides a number of benefits, including (1) an adaptive nature by which the function 100 evolves with the input keys 101 to minimize collisions with consequent better performance on the lookup side and (2) a heuristic approach designed to run efficiently even for large set of input keys 101 such that provisioning of the hash table does not stall when the adaptive hash function 100 needs to morph to adapt to a changing set of input keys.
  • FIG. 11A shows a method 1100 for calculating a set of windows 111 according to another example embodiment.
  • the method 1100 may be used by operation 107 of the adaptive hash function 100 to determine one or more windows 111 in a plurality of bit positions 201 i-p for use in determining hash indices 109 for a plurality of input keys IO I I-M, wherein each input key 101 in the plurality of input keys IO I I-M includes a bit value x for each bit position 201 in the plurality of bit positions 201 i-p.
  • the method 1100 may be used for calculating a new set of windows 111 N that will replace an old set of windows 11 lc that is currently being used by the adaptive has function 100.
  • the method 1100 may commence at operation 1101 with generating a set of scores 501 , for each bit position 201 in the plurality of bit positions 20li-p based on the plurality of input keys IO I I-M .
  • the set of scores 501; for a bit position 201 indicates the ability of the bit position 201; to divide the plurality of input keys 101 I-M into two equally sized groups based on values x of the bit position 20 h in the input keys 101 I-M .
  • a first score 50lij in the set of scores 501 for a bit position 201; in the plurality of bit positions 201 l -p is based on bit values x in the bit position 201 , over each of the plurality of input keys 101 l-M and a second score 501 1 ⁇ in the set of scores 50 fl is based on bit values x in the bit position 201; over each of the plurality of input keys 101 I-M and bit values x in one or more adjacent bit positions 201 (e.g., bit position 20 li-i, bit position 20 li_ 2 , etc.) in the plurality of bit positions 20li-p over each of the plurality of input keys 101 I-M .
  • adjacent bit positions 201 e.g., bit position 20 li-i, bit position 20 li_ 2 , etc.
  • generating a set of scores 501 for each bit position 201 , comprises maintaining a set of counters 601 for each bit position 20 li, wherein the number of counters 601 maintained for each bit position 201; is two to the power of the number of adjacent bit positions 201 being used to determine the set of scores 50 h, wherein bit values x for the one or more adjacent bit positions 201 are used to index into the set of counters 601 to increment a first part 603 A of a counter 601 when the bit values x for adjacent bit positions 201 index to the counter 601 and increment a second part 603B of the counter 601 when the corresponding bit position 201 of the counter 601 has a predefined value.
  • the set of scores 501 for each bit position 20 h is based on the ratios of the second part 603B and the first part 603A of each counter 601 in the set of counters 601 along with a score base 503.
  • operation 1103 may determine one or more windows 111 N of bit positions 201 in the plurality of bit positions 201 l -p, wherein each window 111 in the one or more windows 111 N includes one or more bit positions 201 in the plurality of bit positions 20li-p and the determination of bit positions 201 in each of the one or more windows 111 is based on the set of scores 50li for each bit position 20li.
  • Figure 11B shows sub-operations 1103A-11031 for performing operation 1103 according to one example embodiment.
  • operation 1103 may include sub-operation 1103 A.
  • the method 1100 may determine a maximum number of windows 111 for the one or more windows 111 N , wherein a number of windows 111 in the one or more windows 111N does not exceed the maximum number of windows 111.
  • the method 1100 may determine a maximum bit position 201 count for the one or more windows 111 N , wherein a number of bit positions 201 in the one or more windows 111 N collectively does not exceed the maximum bit position 201 count.
  • the method 1100 may determine a first window 111 1 of bit positions 201 with the maximum bit position 201 count, wherein each window 111 of bit positions 201 has a combined score 501 that is the summation of a score 501 from the set of scores 50fi for each bit position 201 in the first window 111 1 .
  • the combined score 501 for the first window 111 1 is the highest amongst possible windows 111 of bit positions 201 in the plurality of bit positions 20li-p with the maximum bit position 201 count.
  • the method 1100 may determine whether the bit positions 201 in the first window 111 1 uniquely identify each of the plurality of input keys 101 I-M .
  • the method 1100 may set the first window 111 1 to be the one or more windows 111 N in response to determining that the bit positions 201 in the first window 111 1 uniquely identify each of the plurality of input keys IO I I-M .
  • the method 1100 may remove one or more bit positions 201 from the first window 1111 with the lowest set of scores 501 in response to determining that the bit positions 201 in the first window 111 1 do not uniquely identify each of the plurality of input keys IO I I-M .
  • sub-operation 1103G may determine a second window 11 h of bit positions 201 with a number of bit positions 201 equal to the number of one or more bit positions 201 removed from the first window 111 1 , wherein the second window 11 has a combined score 501 that is the highest amongst possible windows 111 of bit positions 201 outside of the first window 1111 with the number of bit positions 201 equal to the number of one or more bit positions 201 removed from the first window 111 1 .
  • the method 1100 may determine whether the bit positions 201 in the first window 1111 and the second window 11 h uniquely identify each of the plurality of input keys IO I I-M .
  • the method 1100 may set the first window l l li and the second window 11 to be the one or more windows 111 N in response to determining that the bit positions 201 in the first window 1111 and the second window 11 h uniquely identify each of the plurality of input keys 101 I-M.
  • the first window 1111 and the second window 11 are discontinuous such that at least one bit position 201 outside the first window 111 1 and the second window 11 separates the first window 111 1 and the second window 11 h.
  • operation 1105 may build a hash table for the plurality of input keys 101 I-M , wherein the bit values x of the plurality of input keys 101 I-M at each bit position 201 of the one or more windows 111 N are used as hash indices 109 for the hash table.
  • An electronic device stores and transmits (internally and/or with other electronic devices over a network) code (which is composed of software instructions and which is sometimes referred to as computer program code or a computer program) and/or data using machine-readable media (also called computer-readable media), such as machine-readable storage media (e.g., magnetic disks, optical disks, solid state drives, read only memory (ROM), flash memory devices, phase change memory) and machine -readable transmission media (also called a carrier) (e.g., electrical, optical, radio, acoustical or other form of propagated signals - such as carrier waves, infrared signals).
  • machine-readable media also called computer-readable media
  • machine-readable storage media e.g., magnetic disks, optical disks, solid state drives, read only memory (ROM), flash memory devices, phase change memory
  • machine -readable transmission media also called a carrier
  • carrier e.g., electrical, optical, radio, acoustical or other form of propagated signals - such as carrier waves,
  • an electronic device e.g., a computer
  • hardware and software such as a set of one or more processors (e.g., wherein a processor is a microprocessor, controller, microcontroller, central processing unit, digital signal processor, application specific integrated circuit, field programmable gate array, other electronic circuitry, a combination of one or more of the preceding) coupled to one or more machine-readable storage media to store code for execution on the set of processors and/or to store data.
  • processors e.g., wherein a processor is a microprocessor, controller, microcontroller, central processing unit, digital signal processor, application specific integrated circuit, field programmable gate array, other electronic circuitry, a combination of one or more of the preceding
  • an electronic device may include non-volatile memory containing the code since the non-volatile memory can persist code/data even when the electronic device is turned off (when power is removed), and while the electronic device is turned on that part of the code that is to be executed by the processor(s) of that electronic device is typically copied from the slower non volatile memory into volatile memory (e.g., dynamic random access memory (DRAM), static random access memory (SRAM)) of that electronic device.
  • Typical electronic devices also include a set or one or more physical network interface(s) (NI(s)) to establish network connections (to transmit and/or receive code and/or data using propagating signals) with other electronic devices.
  • NI(s) physical network interface
  • a physical NI may comprise radio circuitry capable of receiving data from other electronic devices over a wireless connection and/or sending data out to other devices via a wireless connection.
  • This radio circuitry may include transmitter(s), receiver(s), and/or transceiver(s) suitable for radiofrequency communication.
  • the radio circuitry may convert digital data into a radio signal having the appropriate parameters (e.g., frequency, timing, channel, bandwidth, etc.). The radio signal may then be transmitted via antennas to the appropriate recipient(s).
  • the set of physical NI(s) may comprise network interface controller(s) (NICs), also known as a network interface card, network adapter, or local area network (LAN) adapter.
  • NICs network interface controller
  • the NIC(s) may facilitate in connecting the electronic device to other electronic devices allowing them to communicate via wire through plugging in a cable to a physical port connected to a NIC.
  • One or more parts of an embodiment may be implemented using different combinations of software, firmware, and/or hardware.
  • a network device is an electronic device that communicatively interconnects other electronic devices on the network (e.g., other network devices, end-user devices).
  • Some network devices are“multiple services network devices” that provide support for multiple networking functions (e.g., routing, bridging, switching, Layer 2 aggregation, session border control, Quality of Service, and/or subscriber management), and/or provide support for multiple application services (e.g., data, voice, and video).
  • Figure 12A illustrates connectivity between network devices (NDs) within an exemplary network, as well as three exemplary implementations of the NDs, according to some embodiments.
  • Figure 12A shows NDs 1200A-H, and their connectivity by way of lines between 1200A-1200B, 1200B-1200C, 1200C-1200D, 1200D-1200E, 1200E-1200F, 1200F-1200G, and 1200A-1200G, as well as between 1200H and each of 1200A, 1200C, 1200D, and 1200G.
  • These NDs are physical devices, and the connectivity between these NDs can be wireless or wired (often referred to as a link).
  • NDs 1200A, 1200E, and 1200F An additional line extending from NDs 1200A, 1200E, and 1200F illustrates that these NDs act as ingress and egress points for the network (and thus, these NDs are sometimes referred to as edge NDs; while the other NDs may be called core NDs).
  • Two of the exemplary ND implementations in Figure 12A are: 1) a special-purpose network device 1202 that uses custom application-specific integrated-circuits (ASICs) and a special-purpose operating system (OS); and 2) a general purpose network device 1204 that uses common off-the-shelf (COTS) processors and a standard OS.
  • ASICs application-specific integrated-circuits
  • OS special-purpose operating system
  • COTS common off-the-shelf
  • the special-purpose network device 1202 includes networking hardware 1210 comprising a set of one or more processor(s) 1212, forwarding resource(s) 1214 (which typically include one or more ASICs and/or network processors), and physical network interfaces (NIs) 1216 (through which network connections are made, such as those shown by the connectivity between NDs 1200A-H), as well as non-transitory machine readable storage media 1218 having stored therein networking software 1220.
  • the networking software 1220 may be executed by the networking hardware 1210 to instantiate a set of one or more networking software instance(s) 1222.
  • Each of the networking software instance(s) 1222, and that part of the networking hardware 1210 that executes that network software instance form a separate virtual network element 1230A-R.
  • Each of the virtual network element(s) (VNEs) 1230A-R includes a control communication and configuration module 1232A-R (sometimes referred to as a local control module or control communication module) and forwarding table(s) 1234A-R, such that a given virtual network element (e.g., 1230A) includes the control communication and configuration module (e.g., 1232A), a set of one or more forwarding table(s) (e.g., 1234A), and that portion of the networking hardware 1210 that executes the virtual network element (e.g., 1230A).
  • a control communication and configuration module 1232A-R sometimes referred to as a local control module or control communication module
  • forwarding table(s) 1234A-R forwarding table(s) 1234A-R
  • the special-purpose network device 1202 is often physically and/or logically considered to include: 1) a ND control plane 1224 (sometimes referred to as a control plane) comprising the processor(s) 1212 that execute the control communication and configuration module(s) 1232A-R; and 2) a ND forwarding plane 1226 (sometimes referred to as a forwarding plane, a data plane, or a media plane) comprising the forwarding resource(s) 1214 that utilize the forwarding table(s) 1234A-R and the physical NIs 1216.
  • a ND control plane 1224 (sometimes referred to as a control plane) comprising the processor(s) 1212 that execute the control communication and configuration module(s) 1232A-R
  • a ND forwarding plane 1226 sometimes referred to as a forwarding plane, a data plane, or a media plane
  • the forwarding resource(s) 1214 that utilize the forwarding table(s) 1234A-R and the physical NIs 1216.
  • the ND control plane 1224 (the processor(s) 1212 executing the control communication and configuration module(s) 1232A-R) is typically responsible for participating in controlling how data (e.g., packets) is to be routed (e.g., the next hop for the data and the outgoing physical NI for that data) and storing that routing information in the forwarding table(s) 1234A-R, and the ND forwarding plane 1226 is responsible for receiving that data on the physical NIs 1216 and forwarding that data out the appropriate ones of the physical NIs 1216 based on the forwarding table(s) 1234A-R.
  • data e.g., packets
  • the ND forwarding plane 1226 is responsible for receiving that data on the physical NIs 1216 and forwarding that data out the appropriate ones of the physical NIs 1216 based on the forwarding table(s) 1234A-R.
  • Figure 12B illustrates an exemplary way to implement the special-purpose network device 1202 according to some embodiments.
  • Figure 12B shows a special-purpose network device including cards 1238 (typically hot pluggable). While in some embodiments the cards 1238 are of two types (one or more that operate as the ND forwarding plane 1226 (sometimes called line cards), and one or more that operate to implement the ND control plane 1224 (sometimes called control cards)), alternative embodiments may combine functionality onto a single card and/or include additional card types (e.g., one additional type of card is called a service card, resource card, or multi -application card).
  • additional card types e.g., one additional type of card is called a service card, resource card, or multi -application card.
  • a service card can provide specialized processing (e.g., Layer 4 to Layer 7 services (e.g., firewall, Internet Protocol Security (IPsec), Secure Sockets Layer (SSL) / Transport Layer Security (TLS), Intrusion Detection System (IDS), peer-to-peer (P2P), Voice over IP (VoIP) Session Border Controller, Mobile Wireless Gateways (Gateway General Packet Radio Service (GPRS) Support Node (GGSN), Evolved Packet Core (EPC) Gateway)).
  • Layer 4 to Layer 7 services e.g., firewall, Internet Protocol Security (IPsec), Secure Sockets Layer (SSL) / Transport Layer Security (TLS), Intrusion Detection System (IDS), peer-to-peer (P2P), Voice over IP (VoIP) Session Border Controller, Mobile Wireless Gateways (Gateway General Packet Radio Service (GPRS) Support Node (GGSN), Evolved Packet Core (EPC) Gateway)
  • GPRS General Pack
  • the general purpose network device 1204 includes hardware 1240 comprising a set of one or more processor(s) 1242 (which are often COTS processors) and physical NIs 1246, as well as non-transitory machine readable storage media 1248 having stored therein software 1250.
  • the processor(s) 1242 execute the software 1250 to instantiate one or more sets of one or more applications 1264A-R. While one embodiment does not implement virtualization, alternative embodiments may use different forms of virtualization.
  • the virtualization layer 1254 represents the kernel of an operating system (or a shim executing on a base operating system) that allows for the creation of multiple instances 1262A-R called software containers that may each be used to execute one (or more) of the sets of applications 1264A-R; where the multiple software containers (also called virtualization engines, virtual private servers, or jails) are user spaces (typically a virtual memory space) that are separate from each other and separate from the kernel space in which the operating system is run; and where the set of applications running in a given user space, unless explicitly allowed, cannot access the memory of the other processes.
  • the multiple software containers also called virtualization engines, virtual private servers, or jails
  • user spaces typically a virtual memory space
  • the virtualization layer 1254 represents a hypervisor (sometimes referred to as a virtual machine monitor (VMM)) or a hypervisor executing on top of a host operating system, and each of the sets of applications 1264A-R is run on top of a guest operating system within an instance 1262A-R called a virtual machine (which may in some cases be considered a tightly isolated form of software container) that is run on top of the hypervisor - the guest operating system and application may not know they are running on a virtual machine as opposed to running on a“bare metal” host electronic device, or through para- virtualization the operating system and/or application may be aware of the presence of virtualization for optimization purposes.
  • a hypervisor sometimes referred to as a virtual machine monitor (VMM)
  • VMM virtual machine monitor
  • one, some or all of the applications are implemented as unikemel(s), which can be generated by compiling directly with an application only a limited set of librari es (e.g., from a library operating system (LibOS) including drivers/libraries of OS services) that provide the particular OS services needed by the application.
  • LibOS library operating system
  • unikemel can be implemented to run directly on hardware 1240, directly on a hypervisor (in which case the unikemel is sometimes described as running within a LibOS virtual machine), or in a software container
  • embodiments can be implemented fully with unikemels running directly on a hypervisor represented by virtualization layer 1254, unikemels running within software containers represented by instances 1262A-R, or as a combination of unikemels and the above-described techniques (e.g., unikemels and virtual machines both mn directly on a hypervisor, unikemels and sets of applications that are mn in different software containers).
  • the instantiation of the one or more sets of one or more applications 1264A-R, as well as virtualization if implemented, are collectively referred to as software instance(s) 1252.
  • the virtual network element(s) 1260A-R perform similar functionality to the virtual network element(s) 1230A-R - e.g., similar to the control communication and configuration module(s) 1232A and forwarding table(s) 1234A (this virtualization of the hardware 1240 is sometimes referred to as network function virtualization (NFV)).
  • NFV network function virtualization
  • CPE customer premise equipment
  • each instance 1262A-R corresponding to one VNE 1260A-R
  • alternative embodiments may implement this correspondence at a finer level granularity (e.g., line card virtual machines virtualize line cards, control card virtual machine virtualize control cards, etc.); it should be understood that the techniques described herein with reference to a correspondence of instances l262A-Rto VNEs also apply to embodiments where such a finer level of granularity and/or unikemels are used.
  • the virtualization layer 1254 includes a virtual switch that provides similar forwarding services as a physical Ethernet switch. Specifically, this virtual switch forwards traffic between instances 1262A-R and the physical NI(s) 1246, as well as optionally between the instances 1262A-R; in addition, this virtual switch may enforce network isolation between the VNEs 1260A-R that by policy are not permitted to communicate with each other (e.g., by honoring virtual local area networks (VLANs)).
  • VLANs virtual local area networks
  • the third exemplary ND implementation in Figure 12A is a hybrid network device 1206, which includes both custom ASICs/special-purpose OS and COTS processors/standard OS in a single ND or a single card within an ND.
  • a platform VM i.e., a VM that that implements the functionality of the special- purpose network device 1202 could provide for para-virtualization to the networking hardware present in the hybrid network device 1206.
  • NE network element
  • each of the VNEs receives data on the physical NIs (e.g., 1216, 1246) and forwards that data out the appropriate ones of the physical NIs (e.g., 1216, 1246).
  • the physical NIs e.g., 1216, 1246
  • a VNE implementing IP router functionality forwards IP packets on the basis of some of the IP header information in the IP packet; where IP header information includes source IP address, destination IP address, source port, destination port (where“source port” and “destination port” refer herein to protocol ports, as opposed to physical ports of a ND), transport protocol (e.g., user datagram protocol (UDP), Transmission Control Protocol (TCP), and differentiated services code point (DSCP) values.
  • transport protocol e.g., user datagram protocol (UDP), Transmission Control Protocol (TCP), and differentiated services code point (DSCP) values.
  • UDP user datagram protocol
  • TCP Transmission Control Protocol
  • DSCP differentiated services code point
  • Figure 12C illustrates various exemplary ways in which VNEs may be coupled according to some embodiments.
  • Figure 12C shows VNEs 1270A.1-1270A.P (and optionally VNEs 1270A.Q-1270A.R) implemented in ND 1200A and VNE 1270H.1 in ND 1200H.
  • VNE 1270A.1 is coupled with VNE 1270H.1, and thus they communicate packets between their respective NDs;
  • VNE 1270A.2-1270A.3 may optionally forward packets between themselves without forwarding them outside of the ND 1200A;
  • VNE 1270A.P may optionally be the first in a chain of VNEs that includes VNE 1270A.Q followed by VNE 1270A.R (this is sometimes referred to as dynamic service chaining, where each of the VNEs in the series of VNEs provides a different service - e.g., one or more layer 4-7 network services).
  • Figure 12C illustrates various exemplary relationships between the VNEs, alternative embodiments may support other relationships (e.g., more/fewer VNEs, more/fewer dynamic service chains, multiple different dynamic service chains with some common VNEs and some different VNEs).
  • the NDs of Figure 12A may form part of the Internet or a private network; and other electronic devices (not shown; such as end user devices including workstations, laptops, netbooks, tablets, palm tops, mobile phones, smartphones, phablets, multimedia phones, Voice Over Internet Protocol (VOIP) phones, terminals, portable media players, GPS units, wearable devices, gaming systems, set-top boxes, Internet enabled household appliances) may be coupled to the network (directly or through other networks such as access networks) to communicate over the network (e.g., the Internet or virtual private networks (VPNs) overlaid on (e.g., tunneled through) the Internet) with each other (directly or through servers) and/or access content and/or services.
  • VOIP Voice Over Internet Protocol
  • Such content and/or services are typically provided by one or more servers (not shown) belonging to a service/content provider or one or more end user devices (not shown) participating in a peer-to-peer (P2P) service, and may include, for example, public webpages (e.g., free content, store fronts, search services), private webpages (e.g., usemame/password accessed webpages providing email services), and/or corporate networks over VPNs.
  • end user devices may be coupled (e.g., through customer premise equipment coupled to an access network (wired or wirelessly)) to edge NDs, which are coupled (e.g., through one or more core NDs) to other edge NDs, which are coupled to electronic devices acting as servers.
  • one or more of the electronic devices operating as the NDs in Figure 12A may also host one or more such servers (e.g., in the case of the general purpose network device 1204, one or more of the software instances 1262A-R may operate as servers; the same would be true for the hybrid network device 1206; in the case of the special-purpose network device 1202, one or more such servers could also be run on a virtualization layer executed by the processor(s) 1212); in which case the servers are said to be co-located with the VNEs of that ND.
  • the servers are said to be co-located with the VNEs of that ND.
  • a virtual network is a logical abstraction of a physical network (such as that in Figure 12A) that provides network services (e.g., L2 and/or L3 services).
  • a virtual network can be implemented as an overlay network (sometimes referred to as a network virtualization overlay) that provides network services (e.g., layer 2 (L2, data link layer) and/or layer 3 (L3, network layer) services) over an underlay network (e.g., an L3 network, such as an Internet Protocol (IP) network that uses tunnels (e.g., generic routing encapsulation (GRE), layer 2 tunneling protocol (L2TP), IPSec) to create the overlay network).
  • IP Internet Protocol
  • a network virtualization edge sits at the edge of the underlay network and participates in implementing the network virtualization; the network-facing side of the NVE uses the underlay network to tunnel frames to and from other NVEs; the outward-facing side of the NVE sends and receives data to and from systems outside the network.
  • a virtual network instance is a specific instance of a virtual network on a NVE (e.g., a NE/VNE on an ND, a part of a NE/VNE on a ND where that NE/VNE is divided into multiple VNEs through emulation); one or more VNIs can be instantiated on an NVE (e.g., as different VNEs on an ND).
  • a virtual access point is a logical connection point on the NVE for connecting external systems to a virtual network; a VAP can be physical or virtual ports identified through logical interface identifiers (e.g., a VLAN ID).
  • Examples of network services include: 1) an Ethernet LAN emulation service (an Ethernet-based multipoint service similar to an Internet Engineering Task Force (IETF) Multiprotocol Label Switching (MPLS) or Ethernet VPN (EVPN) service) in which external systems are interconnected across the network by a LAN environment over the underlay network (e.g., an NVE provides separate L2 VNIs (virtual switching instances) for different such virtual networks, and L3 (e.g., IP/MPLS) tunneling encapsulation across the underlay network); and 2) a virtualized IP forwarding service (similar to IETF IP VPN (e.g., Border Gateway Protocol (BGP)/MPLS IPVPN) from a service definition perspective) in which external systems are interconnected across the network by an L3 environment over the underlay network (e.g., an NVE provides separate L3 VNIs (forwarding and routing instances) for different such virtual networks, and L3 (e.g., IP/MPLS) tunneling encapsulation across the underlay network)
  • Network services may also include quality of service capabilities (e.g., traffic classification marking, traffic conditioning and scheduling), security capabilities (e.g., filters to protect customer premises from network - originated attacks, to avoid malformed route announcements), and management capabilities (e.g., full detection and processing).
  • quality of service capabilities e.g., traffic classification marking, traffic conditioning and scheduling
  • security capabilities e.g., filters to protect customer premises from network - originated attacks, to avoid malformed route announcements
  • management capabilities e.g., full detection and processing
  • Fig. 12D illustrates a network with a single network element on each of the NDs of Figure 12 A, and within this straight forward approach contrasts a traditional distributed approach (commonly used by traditional routers) with a centralized approach for maintaining reachability and forwarding information (also called network control), according to some embodiments.
  • Figure 12D illustrates network elements (NEs) 1270A-H with the same connectivity as the NDs 1200A-H of Figure 12A.
  • Figure 12D illustrates that the distributed approach 1272 distributes responsibility for generating the reachability and forwarding information across the NEs 1270A-H; in other words, the process of neighbor discovery and topology discovery is distributed.
  • the control communication and configuration module(s) 1232A-R of the ND control plane 1224 typically include a reachability and forwarding information module to implement one or more routing protocols (e.g., an exterior gateway protocol such as Border Gateway Protocol (BGP), Interior Gateway Protocol(s) (IGP) (e.g., Open Shortest Path First (OSPF), Intermediate System to Intermediate System (IS-IS), Routing Information Protocol (RIP), Fabel Distribution Protocol (FDP), Resource Reservation Protocol (RSVP) (including RSVP-Traffic Engineering (TE): Extensions to RSVP for ESP Tunnels and Generalized Multi-Protocol Fabel Switching
  • Border Gateway Protocol BGP
  • IGP Interior Gateway Protocol
  • OSPF Open Shortest Path First
  • IS-IS Intermediate System to Intermediate System
  • RIP Routing Information Protocol
  • FDP Fabel Distribution Protocol
  • RSVP Resource Reservation Protocol
  • RSVP-Traffic Engineering TE: Extensions to RSVP for ESP Tunnels and Generalized Multi-Protocol Fabel Switching
  • the NEs 1270A-H e.g., the processor(s) 1212 executing the control communication and configuration module(s) 1232A-R
  • the NEs 1270A-H perform their responsibility for participating in controlling how data (e.g., packets) is to be routed (e.g., the next hop for the data and the outgoing physical NI for that data) by
  • Routes and adjacencies are stored in one or more routing structures (e.g., Routing Information Base (RIB), Label Information Base (LIB), one or more adjacency structures) on the ND control plane 1224.
  • the ND control plane 1224 programs the ND forwarding plane 1226 with information (e.g., adjacency and route information) based on the routing structure(s).
  • the ND control plane 1224 programs the adjacency and route information into one or more forwarding table(s) 1234A-R (e.g., Forwarding Information Base (FIB), Label Forwarding Information Base (LFIB), and one or more adjacency structures) on the ND forwarding plane 1226.
  • the ND can store one or more bridging tables that are used to forward data based on the layer 2 information in that data. While the above example uses the special-purpose network device 1202, the same distributed approach 1272 can be implemented on the general purpose network device 1204 and the hybrid network device 1206.
  • FIG. 12D illustrates that a centralized approach 1274 (also known as software defined networking (SDN)) that decouples the system that makes decisions about where traffic is sent from the underlying systems that forwards traffic to the selected destination.
  • the illustrated centralized approach 1274 has the responsibility for the generation of reachability and forwarding information in a centralized control plane 1276 (sometimes referred to as a SDN control module, controller, network controller, OpenFlow controller, SDN controller, control plane node, network virtualization authority, or management control entity), and thus the process of neighbor discovery and topology discovery is centralized.
  • a centralized control plane 1276 sometimes referred to as a SDN control module, controller, network controller, OpenFlow controller, SDN controller, control plane node, network virtualization authority, or management control entity
  • the centralized control plane 1276 has a south bound interface 1282 with a data plane 1280 (sometime referred to the infrastructure layer, network forwarding plane, or forwarding plane (which should not be confused with a ND forwarding plane)) that includes the NEs 1270A-H (sometimes referred to as switches, forwarding elements, data plane elements, or nodes).
  • the centralized control plane 1276 includes a network controller 1278, which includes a centralized reachability and forwarding information module 1279 that determines the reachability within the network and distributes the forwarding information to the NEs 1270A-H of the data plane 1280 over the south bound interface 1282 (which may use the OpenFlow protocol).
  • the network intelligence is centralized in the centralized control plane 1276 executing on electronic devices that are typically separate from the NDs.
  • each of the control communication and configuration module(s) 1232A-R of the ND control plane 1224 typically include a control agent that provides the VNE side of the south bound interface 1282.
  • the ND control plane 1224 (the processor(s) 1212 executing the control communication and configuration module(s) 1232A-R) performs its responsibility for participating in controlling how data (e.g., packets) is to be routed (e.g., the next hop for the data and the outgoing physical NI for that data) through the control agent communicating with the centralized control plane 1276 to receive the forwarding information (and in some cases, the reachability information) from the centralized reachability and forwarding information module 1279 (it should be understood that in some embodiments, the control communication and configuration module(s) 1232A-R, in addition to communicating with the centralized control plane 1276, may also play some role in determining reachability and/or calculating forwarding information - albeit less so than in the case of a distributed approach; such embodiments are generally considered to fall under the centralized approach 1274, but may also be considered a hybrid approach).
  • data e.g., packets
  • the control agent communicating with the centralized control plane 1276 to receive the forwarding information (and
  • the same centralized approach 1274 can be implemented with the general purpose network device 1204 (e.g., each of the VNE 1260A-R performs its responsibility for controlling how data (e.g., packets) is to be routed (e.g., the next hop for the data and the outgoing physical NI for that data) by communicating with the centralized control plane 1276 to receive the forwarding information (and in some cases, the reachability information) from the centralized reachability and forwarding information module 1279; it should be understood that in some embodiments, the VNEs 1260A-R, in addition to communicating with the centralized control plane 1276, may also play some role in determining reachability and/or calculating forwarding information - albeit less so than in the case of a distributed approach) and the hybrid network device 1206.
  • the general purpose network device 1204 e.g., each of the VNE 1260A-R performs its responsibility for controlling how data (e.g., packets) is to be routed (e.g., the next hop for the data and
  • NFV is able to support SDN by providing an infrastructure upon which the SDN software can be run
  • NFV and SDN both aim to make use of commodity server hardware and physical switches.
  • FIG. 12D also shows that the centralized control plane 1276 has a north bound interface 1284 to an application layer 1286, in which resides application(s) 1288.
  • the centralized control plane 1276 has the ability to form virtual networks 1292 (sometimes referred to as a logical forwarding plane, network services, or overlay networks (with the NEs 1270A-H of the data plane 1280 being the underlay network)) for the application(s) 1288.
  • virtual networks 1292 sometimes referred to as a logical forwarding plane, network services, or overlay networks (with the NEs 1270A-H of the data plane 1280 being the underlay network)
  • the centralized control plane 1276 maintains a global view of all NDs and configured NEs/VNEs, and it maps the virtual networks to the underlying NDs efficiently (including maintaining these mappings as the physical network changes either through hardware (ND, link, or ND component) failure, addition, or removal).
  • Figure 12D shows the distributed approach 1272 separate from the centralized approach 1274
  • the effort of network control may be distributed differently or the two combined in certain embodiments.
  • embodiments may generally use the centralized approach (SDN) 1274, but have certain functions delegated to the NEs (e.g., the distributed approach may be used to implement one or more of fault monitoring, performance monitoring, protection switching, and primitives for neighbor and/or topology discovery); or 2) embodiments may perform neighbor discovery and topology discovery via both the centralized control plane and the distributed protocols, and the results compared to raise exceptions where they do not agree.
  • SDN centralized approach
  • Such embodiments are generally considered to fall under the centralized approach 1274, but may also be considered a hybrid approach.
  • Figure 12D illustrates the simple case where each of the NDs 1200A-H implements a single NE 1270A-H
  • the network control approaches described with reference to Figure 12D also work for networks where one or more of the NDs 1200A-H implement multiple VNEs (e.g., VNEs 1230A-R, VNEs 1260A-R, those in the hybrid network device 1206).
  • the network controller 1278 may also emulate the implementation of multiple VNEs in a single ND.
  • the network controller 1278 may present the implementation of a VNE/NE in a single ND as multiple VNEs in the virtual networks 1292 (all in the same one of the virtual network(s) 1292, each in different ones of the virtual network(s) 1292, or some combination).
  • the network controller 1278 may cause an ND to implement a single VNE (a NE) in the underlay network, and then logically divide up the resources of that NE within the centralized control plane 1276 to present different VNEs in the virtual network(s) 1292 (where these different VNEs in the overlay networks are sharing the resources of the single VNE/NE implementation on the ND in the underlay network).
  • Figures 12E and 12F respectively illustrate exemplary abstractions of NEs and VNEs that the network controller 1278 may present as part of different ones of the virtual networks 1292.
  • Figure 12E illustrates the simple case of where each of the NDs 1200A-H implements a single NE 1270A-H (see Figure 12D), but the centralized control plane 1276 has abstracted multiple of the NEs in different NDs (the NEs 1270A-C and G-H) into (to represent) a single NE 12701 in one of the virtual network(s) 1292 of Figure 12D, according to some embodiments.
  • Figure 12E shows that in this virtual network, the NE 12701 is coupled to NE 1270D and 1270F, which are both still coupled to NE 1270E.
  • Figure 12F illustrates a case where multiple VNEs (VNE 1270A.1 and VNE 1270H.1) are implemented on different NDs (ND 1200A and ND 1200H) and are coupled to each other, and where the centralized control plane 1276 has abstracted these multiple VNEs such that they appear as a single VNE 1270T within one of the virtual networks 1292 of Figure 12D, according to some embodiments.
  • the abstraction of a NE or VNE can span multiple NDs.
  • the electronic device(s) running the centralized control plane 1276 may be implemented a variety of ways (e.g., a special purpose device, a general-purpose (e.g., COTS) device, or hybrid device). These electronic device(s) would similarly include processor(s), a set or one or more physical NIs, and a non-transitory machine-readable storage medium having stored thereon the centralized control plane software.
  • Figure 13 illustrates, a general purpose control plane device 1304 including hardware 1340 comprising a set of one or more processor(s) 1342 (which are often COTS processors) and physical NIs 1346, as well as non-transitory machine readable storage media 1348 having stored therein centralized control plane (CCP) software 1350.
  • processor(s) 1342 which are often COTS processors
  • NIs 1346 physical NIs 1346
  • CCP centralized control plane
  • the processor(s) 1342 typically execute software to instantiate a virtualization layer 1354 (e.g., in one embodiment the virtualization layer 1354 represents the kernel of an operating system (or a shim executing on a base operating system) that allows for the creation of multiple instances 1362A-R called software containers (representing separate user spaces and also called virtualization engines, virtual private servers, or jails) that may each be used to execute a set of one or more applications; in another embodiment the virtualization layer 1354 represents a hypervisor (sometimes referred to as a virtual machine monitor (VMM)) or a hypervisor executing on top of a host operating system, and an application is run on top of a guest operating system within an instance 1362A-R called a virtual machine (which in some cases may be considered a tightly isolated form of software container) that is run by the hypervisor ; in another embodiment, an application is implemented as a unikemel, which can be generated by comp ling directly with an application only a limited set
  • VMM virtual machine monitor
  • an instance of the CCP software 1350 (illustrated as CCP instance 1376A) is executed (e.g., within the instance 1362A) on the virtualization layer 1354.
  • the CCP instance 1376A is executed, as a unikemel or on top of a host operating system, on the“bare metal” general purpose control plane device 1304.
  • the instantiation of the CCP instance 1376A, as well as the virtualization layer 1354 and instances 1362A-R if implemented, are collectively referred to as software instance(s) 1352.
  • the CCP instance 1376A includes a network controller instance 1378.
  • the network controller instance 1378 includes a centralized reachability and forwarding information module instance 1379 (which is a middleware layer providing the context of the network controller 878 to the operating system and communicating with the various NEs), and an CCP application layer 1380 (sometimes referred to as an application layer) over the middleware layer (providing the intelligence required for various network operations such as protocols, network situational awareness, and user - interfaces).
  • this CCP application layer 1380 within the centralized control plane 1276 works with virtual network view(s) (logical view(s) of the network) and the middleware layer provides the conversion from the virtual networks to the physical view.
  • the centralized control plane 1276 transmits relevant messages to the data plane 1280 based on CCP application layer 1380 calculations and middleware layer mapping for each flow.
  • a flow may be defined as a set of packets whose headers match a given pattern of bits; in this sense, traditional IP forwarding is also flow-based forwarding where the flows are defined by the destination IP address for example; however, in other implementations, the given pattern of bits used for a flow definition may include more fields (e.g., 10 or more) in the packet headers.
  • Different NDs/NEs/VNEs of the data plane 1280 may receive different messages, and thus different forwarding information.
  • the data plane 1280 processes these messages and programs the appropriate flow information and corresponding actions in the forwarding tables (sometime referred to as flow tables) of the appropriate NE/VNEs, and then the NEs/VNEs map incoming packets to flows represented in the forwarding tables and forward packets based on the matches in the forwarding tables.
  • Standards such as OpenFlow define the protocols used for the messages, as well as a model for processing the packets.
  • the model for processing packets includes header parsing, packet classification, and making forwarding decisions. Header parsing describes how to interpret a packet based upon a well-known set of protocols. Some protocol fields are used to build a match structure (or key) that will be used in packet classification (e.g., a first key field could be a source media access control (MAC) address, and a second key field could be a destination MAC address).
  • MAC media access control
  • Packet classification involves executing a lookup in memory to classify the packet by determining which entry (also referred to as a forwarding table entry or flow entry) in the forwarding tables best matches the packet based upon the match structure, or key, of the forwarding table entries. It is possible that many flows represented in the forwarding table entries can correspond/match to a packet; in this case the system is typically configured to determine one forwarding table entry from the many according to a defined scheme (e.g., selecting a first forwarding table entry that is matched).
  • Forwarding table entries include both a specific set of match criteria (a set of values or wildcards, or an indication of what portions of a packet should be compared to a particular value/values/wildcards, as defined by the matching capabilities - for specific fields in the packet header, or for some other packet content), and a set of one or more actions for the data plane to take on receiving a matching packet. For example, an action may be to push a header onto the packet, for the packet using a particular port, flood the packet, or simply drop the packet.
  • TCP transmission control protocol
  • an unknown packet for example, a“missed packet” or a“match- miss” as used in OpenFlow parlance
  • the packet (or a subset of the packet header and content) is typically forwarded to the centralized control plane 1276.
  • the centralized control plane 1276 will then program forwarding table entries into the data plane 1280 to accommodate packets belonging to the flow of the unknown packet. Once a specific forwarding table entry has been programmed into the data plane 1280 by the centralized control plane 1276, the next packet with matching credentials will match that forwarding table entry and take the set of actions associated with that matched entry.
  • a network interface may be physical or virtual; and in the context of IP, an interface address is an IP address assigned to a NI, be it a physical NI or virtual NI.
  • a virtual NI may be associated with a physical NI, with another virtual interface, or stand on its own (e.g., a loopback interface, a point-to-point protocol interface).
  • a NI physical or virtual
  • a loopback interface (and its loopback address) is a specific type of virtual NI (and IP address) of a NE/VNE (physical or virtual) often used for management purposes; where such an IP address is referred to as the nodal loopback address.
  • IP addresses of that ND are referred to as IP addresses of that ND; at a more granular level, the IP address(es) assigned to NI(s) assigned to a NE/VNE implemented on a ND can be referred to as IP addresses of that NE/VNE.
  • Next hop selection by the routing system for a given destination may resolve to one path (that is, a routing protocol may generate one next hop on a shortest path); but if the routing system determines there are multiple viable next hops (that is, the routing protocol generated forwarding solution offers more than one next hop on a shortest path - multiple equal cost next hops), some additional criteria is used - for instance, in a connectionless network, Equal Cost Multi Path (ECMP) (also known as Equal Cost Multi Pathing, multipath forwarding and IP multipath) may be used (e.g., typical implementations use as the criteria particular header fields to ensure that the packets of a particular packet flow are always forwarded on the same next hop to preserve packet flow ordering).
  • ECMP Equal Cost Multi Path
  • a packet flow is defined as a set of packets that share an ordering constraint.
  • the set of packets in a particular TCP transfer sequence need to arrive in order, else the TCP logic will interpret the out of order delivery as congestion and slow the TCP transfer rate down.
  • a Layer 3 (L3) Link Aggregation (LAG) link is a link directly connecting two NDs with multiple IP-addressed link paths (each link path is assigned a different IP address), and a load distribution decision across these different link paths is performed at the ND forwarding plane; in which case, a load distribution decision is made between the link paths.
  • L3 Link Aggregation (LAG) link is a link directly connecting two NDs with multiple IP-addressed link paths (each link path is assigned a different IP address), and a load distribution decision across these different link paths is performed at the ND forwarding plane; in which case, a load distribution decision is made between the link paths.
  • Some NDs include functionality for authentication, authorization, and accounting (AAA) protocols (e.g., RADIUS (Remote Authentication Dial-In User Service), Diameter, and/or TACACS+ (Terminal Access Controller Access Control System Plus).
  • AAA can be provided through a client/server model, where the AAA client is implemented on a ND and the AAA server can be implemented either locally on the ND or on a remote electronic device coupled with the ND.
  • Authentication is the process of identifying and verifying a subscriber. For instance, a subscriber might be identified by a combination of a username and a password or through a unique key.
  • Authorization determines what a subscriber can do after being authenticated, such as gaining access to certain electronic device information resources (e.g., through the use of access control policies). Accounting is recording user activity.
  • end user devices may be coupled (e.g., through an access network) through an edge ND (supporting AAA processing) coupled to core NDs coupled to electronic devices implementing servers of service/content providers.
  • AAA processing is performed to identify for a subscriber the subscriber record stored in the AAA server for that subscriber.
  • a subscriber record includes a set of attributes (e.g., subscriber name, password, authentication information, access control information, rate-limiting information, policing information) used during processing of that subscriber’s traffic.
  • Certain NDs internally represent end user devices (or sometimes customer premise equipment (CPE) such as a residential gateway (e.g., a router, modem)) using subscriber circuits.
  • CPE customer premise equipment
  • a subscriber circuit uniquely identifies within the ND a subscriber session and typically exists for the lifetime of the session.
  • a ND typically allocates a subscriber circuit when the subscriber connects to that ND, and correspondingly de allocates that subscriber circuit when that subscriber disconnects.
  • Each subscriber session represents a distinguishable flow of packets communicated between the ND and an end user device (or sometimes CPE such as a residential gateway or modem) using a protocol, such as the point-to-point protocol over another protocol (PPPoX) (e.g., where X is Ethernet or
  • Asynchronous Transfer Mode (ATM)
  • Ethernet 802.1Q Virtual LAN (VLAN), Internet Protocol, or ATM
  • ATM Asynchronous Transfer Mode
  • a subscriber session can be initiated using a variety of mechanisms (e.g., manual provisioning a dynamic host configuration protocol (DHCP), DHCP/client-less internet protocol service (CLIPS) or Media Access Control (MAC) address tracking).
  • DHCP dynamic host configuration protocol
  • CLIPS client-less internet protocol service
  • MAC Media Access Control
  • PPP point-to-point protocol
  • DSL digital subscriber line
  • DSL digital subscriber line
  • DHCP When DHCP is used (e.g., for cable modem services), a username typically is not provided; but in such situations other information (e.g., information that includes the MAC address of the hardware in the end user device (or CPE)) is provided.
  • CPE end user device
  • a virtual circuit synonymous with virtual connection and virtual channel, is a connection oriented communication service that is delivered by means of packet mode communication.
  • Virtual circuit communication resembles circuit switching, since both are connection oriented, meaning that in both cases data is delivered in correct order, and signaling overhead is required during a connection establishment phase.
  • Virtual circuits may exist at different layers. For example, at layer 4, a connection oriented transport layer datalink protocol such as Transmission Control Protocol (TCP) may rely on a connectionless packet switching network layer protocol such as IP, where different packets may be routed over different paths, and thus be delivered out of order.
  • TCP Transmission Control Protocol
  • IP connectionless packet switching network layer protocol
  • the virtual circuit is identified by the source and destination network socket address pair, i.e. the sender and receiver IP address and port number.
  • TCP includes segment numbering and reordering on the receiver side to prevent out-of-order delivery.
  • Virtual circuits are also possible at Layer 3 (network layer) and Layer 2 (datalink layer); such virtual circuit protocols are based on connection oriented packet switching, meaning that data is always delivered along the same network path, i.e. through the same NEs/VNEs.
  • the packets are not routed individually and complete addressing information is not provided in the header of each data packet; only a small virtual channel identifier (VCI) is required in each packet; and routing information is transferred to the NEs/VNEs during the connection establishment phase;
  • VCI virtual channel identifier
  • VCI virtual channel identifier
  • VCI virtual channel identifier
  • VCI virtual channel identifier
  • ATM Asynchronous Transfer Mode
  • VCI virtual path identifier
  • VCI virtual channel identifier
  • GPRS General Packet Radio Service
  • MPLS Multiprotocol label switching
  • Certain NDs use a hierarchy of circuits.
  • the leaf nodes of the hierarchy of circuits are subscriber circuits.
  • the subscriber circuits have parent circuits in the hierarchy that typically represent aggregations of multiple subscriber circuits, and thus the network segments and elements used to provide access network connectivity of those end user devices to the ND.
  • These parent circuits may represent physical or logical aggregations of subscriber circuits (e.g., a virtual local area network (VLAN), a permanent virtual circuit (PVC) (e.g., for Asynchronous Transfer Mode (ATM)), a circuit-group, a channel, a pseudo-wire, a physical NI of the ND, and a link aggregation group).
  • VLAN virtual local area network
  • PVC permanent virtual circuit
  • ATM Asynchronous Transfer Mode
  • a circuit-group is a virtual construct that allows various sets of circuits to be grouped together for configuration purposes, for example aggregate rate control.
  • a pseudo-wire is an emulation of a layer 2 point-to-point connection- oriented service.
  • a link aggregation group is a virtual construct that merges multiple physical NIs for purposes of bandwidth aggregation and redundancy.
  • the parent circuits physically or logically encapsulate the subscriber circuits.
  • Each VNE e.g., a virtual router, a virtual bridge (which may act as a virtual switch instance in a Virtual Private LAN Service (VPLS) is typically independently administrable.
  • each of the virtual routers may share system resources but is separate from the other virtual routers regarding its management domain, AAA (authentication, authorization, and accounting) name space, IP address, and routing database(s).
  • AAA authentication, authorization, and accounting
  • Multiple VNEs may be employed in an edge ND to provide direct network access and/or different classes of services for subscribers of service and/or content providers.
  • “interfaces” that are independent of physical NIs may be configured as part of the VNEs to provide higher-layer protocol and service information (e.g., Layer 3 addressing).
  • the subscriber records in the AAA server identify, in addition to the other subscriber configuration requirements, to which context (e.g., which of the VNEs/NEs) the corresponding subscribers should be bound within the ND.
  • a binding forms an association between a physical entity (e.g., physical NI, channel) or a logical entity (e.g., circuit such as a subscriber circuit or logical circuit (a set of one or more subscriber circuits)) and a context’s interface over which network protocols (e.g., routing protocols, bridging protocols) are configured for that context. Subscriber data flows on the physical entity when some higher-layer protocol interface is configured and associated with that physical entity.
  • a physical entity e.g., physical NI, channel
  • a logical entity e.g., circuit such as a subscriber circuit or logical circuit (a set of one or more subscriber circuits)
  • network protocols e.g., routing protocols, bridging protocols
  • Some NDs provide support for implementing VPNs (Virtual Private Networks) (e.g., Layer 2 VPNs and/or Layer 3 VPNs).
  • VPNs Virtual Private Networks
  • the ND where a provider’s network and a customer’s network are coupled are respectively referred to as PEs (Provider Edge) and CEs (Customer Edge).
  • PEs Provide Edge
  • CEs Customer Edge
  • Layer 2 VPN forwarding typically is performed on the CE(s) on either end of the VPN and traffic is sent across the network (e.g., through one or more PEs coupled by other NDs).
  • Layer 2 circuits are configured between the CEs and PEs (e.g., an Ethernet port, an ATM permanent virtual circuit (PVC), a Frame Relay PVC).
  • PVC ATM permanent virtual circuit
  • Frame Relay PVC Frame Relay PVC
  • routing typically is performed by the PEs.
  • an edge ND that supports multiple VNEs may be deployed as a PE; and a VNE may be configured with a VPN protocol
  • VPLS Virtual Private LAN Service
  • end user devices access content/services provided through the VPLS network by coupling to CEs, which are coupled through PEs coupled by other NDs.
  • VPLS networks can be used for implementing triple play network applications (e.g., data applications (e.g., high speed Internet access), video applications (e.g., television service such as IPTV (Internet Protocol Television), VoD (Video-on-Demand) service), and voice applications (e.g., VoIP (Voice over Internet Protocol) service)), VPN services, etc.
  • VPLS is a type of layer 2 VPN that can be used for multi-point connectivity.
  • VPLS networks also allow end use devices that are coupled with CEs at separate geographical locations to communicate with each other across a Wide Area Network (WAN) as if they were directly attached to each other in a Local Area Network (LAN) (referred to as an emulated LAN).
  • WAN Wide Area Network
  • LAN Local Area Network
  • each CE typically attaches, possibly through an access network (wired and/or wireless), to a bridge module of a PE via an attachment circuit (e.g., a virtual link or connection between the CE and the PE).
  • the bridge module of the PE attaches to an emulated LAN through an emulated LAN interface.
  • Each bridge module acts as a“Virtual Switch Instance” (VSI) by maintaining a forwarding table that maps MAC addresses to pseudowires and attachment circuits.
  • PEs forward frames (received from CEs) to destinations (e.g., other CEs, other PEs) based on the MAC destination address field included in those frames.
  • one or more of operations and functionality described above in relation to Figures 1-7 may be implemented by components described in relation to the approaches and elements of Figures 12A-12F and 13.
  • the adaptive hash function 100 may reside in the control communication and configuration module 1232A of the special purpose device 1202 or an equivalent in the general purpose network device 1204 or the hybrid network device 1206.
  • the adaptive hash function 100 may reside in the centralized reachability and forwarding information module 1279 of the centralized control plane 1276.
  • the adaptive hash function 100 may reside in a machine readable storage medium, including the non-transitory machine-readable storage media 1348 and the processor 1342 may be configured to execute the adaptive hash function 100.
  • virtualization may be utilized to provide NFV.
  • the adaptive hash function 100 may be implemented in a computing device configured to execute one or more virtual machines, containers, and/or microservices to provide NFV.
  • the computing device used to implement the adaptive hash function 100 may be control plane devices (e.g., the general purpose control plane device 1304) that are configured to implement a control plane of SDN.

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Abstract

L'invention concerne un procédé destiné à déterminer une ou plusieurs fenêtres dans une pluralité de positions de bits pour une utilisation dans la détermination d'indices de hachage pour une pluralité de clés d'entrée. Le procédé comprend la génération d'un ensemble de scores pour chaque position de bits de la pluralité de positions de bits d'après la pluralité de clés d'entrée; la détermination d'une ou plusieurs fenêtres de positions de bits de la pluralité de positions de bits, chaque fenêtre comprenant une ou plusieurs positions de bits de la pluralité de positions de bits et la détermination de positions de bits dans la fenêtre ou chacune des fenêtres étant basée sur l'ensemble de scores pour chaque position de bits; et la construction d'une table de hachage pour la pluralité de clés d'entrée, les valeurs de bits de la pluralité de clés d'entrée à chaque position de bits de la ou des fenêtres étant utilisées en tant qu'indices de hachage pour la table de hachage.
PCT/IB2017/057239 2017-11-17 2017-11-17 Fonction de hachage adaptative utilisant une notation des positions de bits pour sélectionner des fenêtres fragmentées WO2019097281A1 (fr)

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CN111813903B (zh) * 2020-05-25 2023-10-20 车智互联（北京）科技有限公司 一种问句匹配方法和计算设备

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