WO2019064729A1 - Display device - Google Patents

Display device Download PDF

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Publication number
WO2019064729A1
WO2019064729A1 PCT/JP2018/023126 JP2018023126W WO2019064729A1 WO 2019064729 A1 WO2019064729 A1 WO 2019064729A1 JP 2018023126 W JP2018023126 W JP 2018023126W WO 2019064729 A1 WO2019064729 A1 WO 2019064729A1
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WO
WIPO (PCT)
Prior art keywords
insulating layer
region
layer
base member
groove
Prior art date
Application number
PCT/JP2018/023126
Other languages
French (fr)
Japanese (ja)
Inventor
丸山 哲
Original Assignee
株式会社ジャパンディスプレイ
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Filing date
Publication date
Application filed by 株式会社ジャパンディスプレイ filed Critical 株式会社ジャパンディスプレイ
Publication of WO2019064729A1 publication Critical patent/WO2019064729A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/02Details
    • H05B33/06Electrode terminals
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • H05B33/22Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of auxiliary dielectric or reflective layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/87Passivation; Containers; Encapsulations
    • H10K59/873Encapsulations
    • H10K59/8731Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers

Definitions

  • One embodiment of the present invention relates to the structure of an interlayer insulating film and a wiring in a display device.
  • the display device has an area in which a display unit in which an image is displayed is arranged, and a peripheral area outside the display unit and in which an input terminal and a driver circuit are arranged.
  • the peripheral area is also referred to as a frame area because it is arranged to surround the display portion.
  • it is required to narrow a frame area that does not directly contribute to the display of an image (this may be referred to as “narrowing of the frame”).
  • narrowing of the frame As a technology for narrowing the frame of the display device, a display device in which a region corresponding to the frame region is bent to the back side of the display unit using a foldable substrate such as a plastic substrate is disclosed (for example, Patent Document 1) reference).
  • a wiring is provided in contact with the insulating layer or sandwiched by the insulating layer.
  • stress acting on the insulating layer and the wiring becomes a problem. For example, peeling of the insulating layer, cracking, disconnection of wiring, or the like caused by bending the substrate is a problem.
  • a display device includes a base member having a first surface and a second surface opposite to the first surface, and a first region including a display unit disposed on the first surface of the base member. And a second region including a wire disposed on the first surface of the base member, a terminal portion disposed on the first surface of the base member, and a drive circuit for outputting a data signal to the display portion. And an insulating layer disposed over the first area and the second area on the first surface of the base member, and the insulating layer is provided along the display portion in the second area. And a through groove having a bottom surface exposing the base member and a side wall surface including a plurality of steps, and the wiring is disposed to intersect the through groove.
  • FIG. 7 is a view showing a structure of a second region of a display device according to an embodiment of the present invention, and is a cross-sectional view taken along line C1-C2. It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. It is sectional drawing which shows the structure of the 2nd area
  • FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel.
  • FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel. It is a figure explaining the manufacturing process of the display apparatus which concerns on one Embodiment of this invention, and shows sectional drawing of a part of 1st area
  • FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel.
  • FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel. It is a figure explaining the manufacturing process of the display apparatus which concerns on one Embodiment of this invention, and shows sectional drawing of a part of 1st area
  • FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel.
  • FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel. It is a figure explaining the manufacturing process of the display apparatus which concerns on one Embodiment of this invention, and shows sectional drawing of a part of 1st area
  • FIG. 1 shows the arrangement of each part constituting a display device 100 according to an embodiment of the present invention.
  • the display device 100 includes a base member 102 having a first surface and a second surface opposite to the first surface.
  • the first surface of the base member 102 includes a display area 112 in which the pixels 120 are arranged, a first area 106 including a first drive circuit 116 a for outputting a scan signal to the display area 112, and a first area 106 adjacent to the first area 106.
  • the second area 108 is an area between the first area 106 and the third area 110, and is an area in which the wirings 118 such as data signal lines and power supply lines are provided.
  • the display unit 112 included in the first area 106 has a plurality of pixels 120 arranged, and forms a screen on which information such as characters and images is displayed.
  • the first drive circuit 116 a disposed along the display unit 112 outputs a scan signal to the pixel 120.
  • a plurality of terminal electrodes are arranged in the terminal portion 114 included in the third region 110, and connected to the flexible printed wiring board.
  • the second drive circuit 116 b is disposed in an area between the display portion 112 and the terminal portion 114, and has a function of outputting a data signal (video signal) to the pixel 120.
  • a wiring 118 connecting the second drive circuit 116b and the display portion 112 is provided in the second region 108.
  • the pixel 120 includes a display element and a thin film transistor which drives the display element.
  • an organic electroluminescent element hereinafter referred to as “an organic electroluminescent element (hereinafter referred to as “an organic EL material”)) is provided between a pair of electrodes distinguished as an anode and a cathode.
  • a liquid crystal element in which a liquid crystal layer is provided between a pair of electrodes, or an electrophoresis element in which a fluid having polarity is disposed between a pair of electrodes.
  • a common contact 122 which applies a common potential to one electrode of the display element is disposed.
  • the first drive circuit 116a a circuit including a shift register or the like is formed using a thin film transistor.
  • the second drive circuit 116 b is formed, for example, of a bare chip integrated circuit and mounted on the base member 102.
  • the base member 102 is flexible and can be bent and bent.
  • a base member 102 is formed using an organic resin material.
  • a polymer material (imide) containing an imide bond in a repeating unit, a polymer material (polyamide) made by bonding a large number of monomers by an amide bond, or the like is applied as the base member 102.
  • Such a base member 102 has a thickness of 5 ⁇ m to 50 ⁇ m, for example 10 ⁇ m.
  • a glass substrate having a thickness of about 100 ⁇ m to 200 ⁇ m can also be used as another member constituting the base member 102. In this case, it is preferable to use an organic resin film by laminating for improvement of impact resistance.
  • the second area 108 is an area where the base member 102 is bent.
  • the display device 100 according to the present embodiment has a structure in which the base member 102 can be bent along the X1-X2 line adjacent to the display unit 112.
  • the wiring 118 disposed in the second region 108 is similarly bent by bending the base member 102.
  • the second region 108 includes a through groove 126 penetrating an insulating layer provided on the first surface of the base member 102 in a region including the X1-X2 line assumed to be a bending line.
  • the details of the through groove 126 will be described with reference to FIG.
  • the through groove 126 may be provided continuously from one end to the other end of the base member 102 as shown in FIG. 1, or may be selectively provided in a region overlapping the wiring 118. In other words, the through groove 126 may be discontinuously provided corresponding to the arrangement of the wiring 118.
  • FIG. 2 shows a simplified stack structure of the display device 100.
  • the cross-sectional structure shown in FIG. 2 corresponds to the line A1-A2 shown in FIG.
  • the display device 100 includes a driving element layer 132 and a display element layer 134 on the first surface of the base member 102.
  • the driving element layer 132 and the display element layer 134 are disposed in the first region 106.
  • the driving element layer 132 is provided on the first surface of the base member 102, and the display element layer 134 is stacked on the driving element layer 132.
  • the display portion 112 and the first drive circuit 116 a are formed by the drive element layer 132 and the display element layer 134.
  • the top and side surfaces of the display element layer 134 are covered by the sealing layer 136.
  • An optical film 138 is disposed on the upper layer side of the sealing layer 136.
  • the display element layer 134 includes a plurality of display elements.
  • a light emitting element is used as the display element.
  • an organic electroluminescent element hereinafter, also referred to as "organic EL element” in which a light emitting layer is formed of an organic electroluminescent material (hereinafter, also referred to as "organic EL material”) is suitably used.
  • the display element layer 134 is configured using a liquid crystal element in which a liquid crystal layer is provided between a pair of electrodes instead of a light emitting element, and an electrophoresis element for controlling fluid of particles having polarity by the action of an electric field. May be
  • a pixel circuit and a drive circuit are formed by active elements such as transistors, and passive elements such as capacitors and resistors.
  • active elements such as transistors
  • passive elements such as capacitors and resistors.
  • an insulating layer, a semiconductor layer, and a conductive layer are appropriately stacked in order to form these circuits.
  • the transistor in the driving element layer 132 and the display element in the display element layer 134 are electrically connected.
  • the sealing layer 136 is provided to protect the display element layer 134 from water vapor contained in air.
  • the sealing layer 136 includes an inorganic insulating film having a low water vapor permeability to block water vapor.
  • the sealing layer 136 is provided in a structure in which the upper layer side and the lower layer side of the organic insulating film are sandwiched by an inorganic insulating film having a low water vapor permeability.
  • the optical film 138 a functional film such as a retardation film, a polarizing film, an antireflective film, or a transparent film having no optical anisotropy is used.
  • the optical film 138 may be configured by combining one or more of these functional films.
  • the optical film 138 has a structure in which a transparent film having no optical anisotropy and a polarizing film are laminated from the sealing layer 136 side.
  • An antireflective film may be further laminated on the polarizing film.
  • the terminal portion 114 is disposed at one end of the base member 102.
  • the second drive circuit 116 b is, for example, a bare chip (integrated circuit not packaged), and is mounted on the base member 102.
  • the terminal portion 114 and the second drive circuit 116 b are exposed from the sealing layer 136 and the optical film 138. That is, the third region 110 is a region where the sealing layer 136 and the optical film 138 are not disposed.
  • the insulating layer 124 extends from the driving element layer 132, and the wiring 118 is provided in contact with the insulating layer 124.
  • the wiring 118 extends from the drive element layer 132 to the third region 110 in which the second drive circuit 116 b and the terminal portion 114 are disposed.
  • the wiring 118 may be covered by the resin layer 130 in the second region 108.
  • the resin layer 130 is provided to cover substantially the entire surface of the second region 108.
  • the insulating layer 124 is provided with a through groove 126.
  • the through groove 126 exposes the upper surface of the base member 102.
  • the side surface of the through groove 126 has a plurality of stepped steps.
  • the side wall of the through groove 126 has a plurality of steps.
  • the plurality of steps provided on the side wall of the through groove 126 alleviates the steep rise of the side wall. That is, in the through groove 126, the side wall surface does not rise sharply from the groove bottom (the upper surface of the base member 102) to the groove upper portion (the upper surface of the insulating layer 124). .
  • the wire 118 is disposed across the through groove 126.
  • the wiring 118 is disposed along the plurality of steps on the side wall surface of the through groove 126. In this manner, the interconnections 118 are prevented from breaking in the region crossing the through groove 126.
  • a support member 104 may be provided on the second surface of the base member 102.
  • the support member 104 is provided in the area corresponding to the first area 106 and the third area 110, and the opening 140 is provided in the area corresponding to the second area 108.
  • the display device 100 can be made more rigid in the regions corresponding to the first region 106 and the third region 110.
  • the second area 108 where the support member 104 is not provided has lower rigidity than the first area 106 and the third area 110. Thereby, the second area 108 can be defined as a bending area of the display device 100.
  • the opening 140 in the support member 104 the region overlapping with the opening 140 can be used as a bending region of the display device 100.
  • FIG. 3 shows a state in which the base member 102 is bent to the second surface side in the second region 108.
  • the wiring 118 and the resin layer 130 can also be bent.
  • the through groove 126 is included in the area to be bent.
  • the radius of curvature of the first region 106 can be, for example, 0.1 mm to 10 mm, preferably 0.5 mm to 5 mm.
  • the radius of curvature of the second region 108 does not have to be constant, and the radius of curvature may change continuously.
  • the angle (bending angle) at which the base member 102 is bent can be set in the range of 0 degree to 180 degrees.
  • the second drive circuit 116 b and the terminal portion 114 are disposed on the rear surface side of the display unit 112 by bending the base member 102 in the second region 108 to the second surface side opposite to the first surface. As a result, a part of the frame area of the display device 100 is hidden behind the display unit 112, and the frame can be substantially narrowed. In other words, since the terminal area 114 and the second drive circuit 116 b are disposed, the third area 110 is a wide area in the frame area. Therefore, by bending the base member 102 so that the third region 110 is disposed on the back surface of the display unit 112, it is possible to more effectively narrow the frame.
  • the insulating layer 124 in the second region 108 is provided with a through groove 126.
  • peeling and cracking of the insulating layer 124 are suppressed by providing the through groove 126 from which the insulating layer 124 is removed in the region where the base member 102 is bent.
  • the stress acting on the interconnection 118 crossing the through groove 126 is dispersed.
  • the wire 118 is prevented from being broken or peeled off. Since the display device 100 is bent in the area where the through groove 126 is provided, the second area 108 can also be referred to as a bending area.
  • FIG. 4 shows a cross-sectional structure of the pixel 120 in the display device 100.
  • the pixel 120 includes at least one transistor 142, a light emitting element 144, and a capacitive element 146.
  • the transistor 142, the light emitting element 144, and the capacitor 146 are electrically connected.
  • the voltage applied to the gate of the transistor 142 controls the current (drain current) flowing between the source and the drain.
  • the light emission intensity of the light emitting element 144 is controlled by the drain current.
  • the gate voltage is applied by connecting between the gate and the source of the transistor 142, and the capacitor 146 is provided to keep the gate voltage constant.
  • the driving element layer 132 includes a first insulating layer 150, a semiconductor layer 152, a second insulating layer 154, a gate electrode 156, a third insulating layer 158, a first wiring 118 a, a fourth insulating layer 162, and a capacitor electrode 164.
  • the display element layer 134 includes a first electrode 168, a sixth insulating layer 170, an organic layer 172, and a second electrode 174.
  • the sealing layer 136 includes a first inorganic insulating film 178, an organic resin film 180, and a second inorganic insulating film 182.
  • a first insulating layer 150 is provided on the first surface of the base member 102. Since the first insulating layer 150 is provided on the lower layer side of the semiconductor layer 152, the first insulating layer 150 is also referred to as a base insulating layer.
  • the first insulating layer 150 is formed by laminating one inorganic insulating film or a plurality of inorganic insulating films.
  • the first insulating layer 150 has a structure in which a silicon oxide film, a silicon nitride film, and a silicon oxide film are stacked in this order from the base member 102 side.
  • the first insulating layer 150 has a thickness of 100 nm to 10000 nm, preferably 400 nm to 800 nm, for example, 600 nm.
  • the transistor 142 provided in the driving element layer 132 has a structure in which the semiconductor layer 152, the second insulating layer 154 (gate insulating layer), and the gate electrode 156 are stacked.
  • the semiconductor layer 152 is formed of a semiconductor material such as amorphous silicon or polycrystalline silicon, or a metal oxide.
  • the semiconductor layer 152 is insulated from the gate electrode 156 by the second insulating layer 154.
  • the second insulating layer 154 is formed of an inorganic insulating film such as a silicon oxide film or a silicon oxynitride film.
  • the second insulating layer 154 is thinner than the first insulating layer 150.
  • the second insulating layer 154 has a thickness of 50 nm to 200 nm, for example, 100 nm.
  • a third insulating layer 158 is provided on the upper layer side of the gate electrode 156.
  • the first wiring 118 a is provided on the upper side of the third insulating layer 158.
  • the first wiring 118 a forms a contact with the semiconductor layer 152 through a contact hole formed in the third insulating layer 158.
  • the third insulating layer 158 is manufactured using an inorganic insulating film.
  • the third insulating layer 158 is formed by stacking a single layer of a silicon oxide film, a silicon nitride film, and a silicon oxide film.
  • the third insulating layer 158 is used as an interlayer insulating film which insulates the gate electrode 156 and the first wiring 118a.
  • the third insulating layer 158 has a thickness of 100 nm to 20000 nm, preferably 500 nm to 10000 nm, for example, 700 nm.
  • the gate electrode 156 and the first wiring 118 a are manufactured using a metal film such as aluminum (Al), molybdenum (Mo), titanium (Ti), tungsten (W) or the like.
  • the first wiring 118a has a three-layer structure in which a titanium (Ti) film is provided on the lower layer side and the upper layer side of the aluminum (Al) film.
  • a fourth insulating layer 162 is provided in the upper layer of the first wiring 118a.
  • the fourth insulating layer 162 is used as a planarizing film which embeds an uneven surface by the semiconductor layer 152, the gate electrode 156, the first wiring 118a, and the like and planarizes the surface.
  • the fourth insulating layer 162 is formed using an organic insulating material such as polyimide resin or acrylic resin.
  • a capacitive electrode 164 is provided on the top surface of the fourth insulating layer 162, and a fifth insulating layer 166 is further formed.
  • the first electrode 168 is provided on the top surface of the fifth insulating layer 166.
  • the first electrode 168 is electrically connected to the first wiring 118 a through a contact hole penetrating the fifth insulating layer 166 and the fourth insulating layer 162.
  • the first electrode 168 is provided to overlap with the capacitor electrode 164 with the fifth insulating layer 166 interposed therebetween.
  • a region where the capacitor electrode 164, the fifth insulating layer 166, and the first electrode 168 overlap is the capacitor 146.
  • As the fifth insulating layer 166 used as a dielectric film of the capacitor 146 an inorganic insulating film such as silicon nitride, silicon oxide, silicon oxynitride or the like is used.
  • the display element layer 134 includes the light emitting element 144 in which the first electrode 168, the organic layer 172, and the second electrode 174 are stacked.
  • the periphery of the first electrode 168 is covered with a sixth insulating layer 170 having an opening, and the inner region is exposed.
  • the organic layer 172 is provided to cover the surface of the sixth insulating layer 170 from the top surface of the first electrode 168 exposed from the sixth insulating layer 170.
  • the second electrode 174 is provided to cover the top surfaces of the organic layer 172 and the sixth insulating layer 170.
  • a region corresponding to the opening of the sixth insulating layer 170 is a light emitting region.
  • the sixth insulating layer 170 is made of an organic insulating material to form a smooth level difference at the open end that exposes the first electrode 168.
  • An acrylic resin, a polyimide resin, a polyamide resin etc. are used as an organic insulation material.
  • the organic layer 172 is manufactured using a low molecular weight or high molecular weight organic EL material.
  • the organic layer 172 is added to the light emitting layer containing the organic EL material, and the carrier injection layer (hole injection layer, electron injection layer) to sandwich the light emitting layer, the carrier transport layer ( A hole transport layer, an electron transport layer, etc. are suitably provided.
  • the organic layer 172 has a structure in which the light emitting layer is sandwiched between the hole injection layer and the electron injection layer.
  • the organic layer 172 is appropriately added with a hole transport layer, an electron transport layer, a hole block layer, an electron block layer, and the like.
  • the light emitting element 144 is a so-called top emission type that emits the light emitted from the organic layer 172 to the second electrode 174 side.
  • the first electrode 168 is manufactured to include a metal film or a metal film so as to reflect light emitted from the organic layer 172.
  • the first electrode 168 is preferably made of a metal film such as aluminum (Al) or silver (Ag) having a high light reflectance in the visible light band.
  • the first electrode 168 is made of indium tin oxide (hereinafter also referred to as “ITO”), indium zinc oxide (hereinafter also referred to as “IZO”), zinc oxide to which aluminum is added (hereinafter referred to as “AZO”).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • AZO zinc oxide to which aluminum is added
  • a transparent conductive film such as zinc oxide (hereinafter also referred to as "GZO") to which gallium is added and a metal film may be stacked.
  • the second electrode 174 is made of a transparent conductive film such as ITO, IZO, AZO, GZO or the like in order to transmit light emitted from the organic layer 172.
  • the second electrode 174 is provided over substantially the entire surface of the display unit 112.
  • the sealing layer 136 is provided on the upper layer side of the second electrode 174. As shown in FIG. 4, the sealing layer 136 may have a structure in which a first inorganic insulating film 178, an organic resin film 180, and a second inorganic insulating film 182 are stacked. As the first inorganic insulating film 178 and the second inorganic insulating film 182, an inorganic insulating material such as a silicon nitride film or an aluminum oxide film is used. As the organic resin film 180, an acrylic resin, a polyimide resin, a polyamide resin, an epoxy resin or the like is used.
  • the first inorganic insulating film 178 and the second inorganic insulating film 182 have a thickness of 0.1 ⁇ m to 10 ⁇ m, preferably 1 ⁇ m to 7 ⁇ m, for example, 5 ⁇ m.
  • the organic resin film 180 has a thickness of 1 ⁇ m to 20 ⁇ m, for example, 10 ⁇ m.
  • An optical film 138 is provided on the top surface of the sealing layer 136.
  • the optical film 138 also has a function as a protective member that protects the display element layer 134 and the drive element layer 132.
  • FIG. 5 shows a cross-sectional structure corresponding to line B1-B2 shown in FIG. That is, FIG. 5 shows a cross-sectional structure of a part of the first region 106, the third region 110, and the second region 108.
  • the first region 106 includes the common contact 122.
  • the common contact 122 is a region where the second electrode 174 extending from the pixel 120 is connected to the common wiring 160.
  • the common wire 160 may be configured by a first common wire 160 a provided on the third insulating layer 158 and a second common wire 160 b interposed between the second electrode 174.
  • the first common wiring 160 a is formed of a conductive film similar to the conductive film forming the first wiring 118 a
  • the second common wiring 160 b is formed of a conductive film similar to the first electrode 168 of the light emitting element 144.
  • the first region 106 includes an open region 184 in which the fourth insulating layer 162 and the sixth insulating layer 170 formed of an organic insulating material are removed.
  • the opening region 184 has a structure in which the sixth insulating layer 170 is divided and the first insulating layer 150, the second insulating layer 154, the third insulating layer 158, and the fifth insulating layer 166 are stacked on the bottom surface.
  • the first insulating layer 150, the second insulating layer 154, the third insulating layer 158, and the fifth insulating layer 166 are formed of an inorganic insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film.
  • the sixth insulating layer 170 is divided (sixth insulating layers 170a and 170b).
  • the sixth insulating layers 170 a and 170 b divided by the opening region 184 serve as a blocking member of the organic resin film 180 in the manufacturing process, and have a function of preventing the outflow to the end of the first inorganic insulating film 178.
  • the organic resin film 180 forming the sealing layer 136 is provided so as not to exceed the sixth insulating layer 170 a. Therefore, in the region beyond the end of the organic resin film 180, the first inorganic insulating film 178 and the second inorganic insulating film 182 are provided in close contact. With such a configuration, the organic resin film 180 that constitutes the sealing layer 136 has a structure that is not exposed to the outside. This structure can prevent moisture from entering the fourth insulating layer 162.
  • the second area 108 may also be referred to as a moisture blocking area.
  • the first region 106 is provided with an optical film 138 via a sealing resin 139.
  • the end of the optical film 138 is disposed to coincide with or outside the end of the sixth insulating layer 170 b.
  • the second wiring 118b is provided between the second insulating layer 154 and the third insulating layer 158.
  • the third wiring 118 c provided on the upper layer side of the third insulating layer 158 is extended to the second region 108.
  • the second region 108 has a structure in which a first insulating layer 150 in contact with the base member 102, a second insulating layer 154 on the first insulating layer 150, and a third insulating layer 158 are stacked.
  • the through groove 126 exposes the first surface of the base member 102 and separates the insulating layers 124.
  • the third wiring 118 c is a side wall surface of the through groove 126 (a side surface of the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158) from the upper surface of the third insulating layer 158 and the third surface of the base member 102. It is arranged in contact with one side.
  • the side surfaces of the first insulating layer 150 and the third insulating layer 158 have at least one step portion 127.
  • a plurality of steps are provided on the side wall surface of the through groove 126 as a whole.
  • the height of the step provided in each of the first insulating layer 150 and the third insulating layer 158 is preferably half or less of the film thickness.
  • the second insulating layer 154 is thinner than the first insulating layer 150 and the third insulating layer 158, it is not necessary to provide a step.
  • the side surface of the second insulating layer 154 may include a step.
  • the end of the second insulating layer 154 is on the outer side than the end of the third insulating layer 158 and the inner side of the end of the first insulating layer 150 in the through groove 126.
  • Oneself may constitute one level difference.
  • the third wiring 118 c is disposed across the through groove 126.
  • the third wiring 118c is formed, for example, in the same structure as the first wiring 118a.
  • the third wiring 118 c disposed in the second region 108 is disposed along the side surfaces of the third insulating layer 158, the second insulating layer 154, and the first insulating layer 150.
  • the through groove 126 has a step portion 127 including a plurality of steps on the side wall surface, whereby the steepness of the groove depth (the height from the surface of the base member 102 to the upper surface of the third insulating layer 158) is alleviated. Ru.
  • the third wiring 118c is provided along the step-like stepped surface in the through groove 126, whereby disconnection is prevented, and as will be described later, a short circuit with an adjacent wiring due to patterning failure is prevented. . Further, even when the base member 102 is bent in the second region 108, concentration of bending stress on the third wiring 118c at the end of the through groove 126 can be suppressed.
  • the second region 108 is provided with a resin layer 130 in which the third wiring 118 c is embedded.
  • the resin layer 130 is used as a protective member for the third wiring 118 c.
  • the resin layer 130 is provided with a thickness not exceeding the height of the optical film 138.
  • an acrylic resin, an epoxy resin, a polyimide resin, or the like is used as the resin layer 130.
  • the second drive circuit 116 b is formed, for example, of a bare chip integrated circuit and mounted on the base member 102.
  • the terminal portion 114 includes a structure in which the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 are stacked, and includes the terminal electrode 148 provided on the upper surface of the third insulating layer 158.
  • the terminal electrode 148 is formed of, for example, a first terminal electrode layer 149a and a second terminal electrode layer 149b.
  • the first terminal electrode layer 149a is formed of the same conductive layer as the conductive layer forming the third wiring 118c
  • the second terminal electrode 148b is formed of the same conductive layer as the first electrode 168 of the light emitting element 144. .
  • FIGS. 6A and 6B show a plan view of the second region 108
  • FIG. 6B shows a cross-sectional structure corresponding to line C1-C2 shown in the drawing.
  • the first region 106 has a region in which the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 are stacked, and the through groove 126 from which the insulating layer is removed.
  • the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 are removed, and the bottom surface 129 where the base member 102 is exposed, the first insulating layer 150, the second insulating layer 154, and And a side wall surface 128 on which the side surface of each layer of the third insulating layer 158 is exposed.
  • Side wall surface 128 has a stepped portion 127.
  • the stepped portion 127 is formed by at least steps formed on the side surfaces of the first insulating layer 150 and the third insulating layer 158. For this reason, in the step portion 127, a plurality of steps are provided in a step-like manner.
  • the third wiring 118 c is disposed to cross the through groove 126 from the top surface of the third insulating layer 158 along the side wall surface 128 and the bottom surface 129.
  • FIG. 6B shows an aspect in which one step is provided in each of the first insulating layer 150 and the third insulating layer 158
  • the present embodiment is not limited to this, and a plurality of side surfaces of each insulating layer are provided. A level difference may be provided.
  • the second insulating layer 154 is smaller in thickness than the first insulating layer 150 and the third insulating layer 158, no stepped portion is provided, but at least one stepped portion is also provided in the second insulating layer 154. It may be provided.
  • the second insulating layer 154 can partially form a step. It may be formed.
  • the height (difference in height) of the step per step is reduced.
  • the step coverage with the third wiring can be improved, and film thickness uniformity and line width uniformity can be achieved.
  • a through groove 126 having a step portion 127 as shown in FIG. 6B is manufactured by etching an insulating layer.
  • the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 are stacked, in order to form the through groove 126, it is necessary to form a resist mask by a photolithography process.
  • the increase in the number of steps is prevented by using multi-tone exposure to form resist masks having different film thicknesses corresponding to the step. can do.
  • a multi-tone photomask is used in the multi-tone exposure method.
  • a multi-tone photomask is provided with a slit equal to or lower than the resolution of the exposure machine as a mask pattern formed on a glass substrate, and the slit blocks a part of light to realize intermediate exposure,
  • a halftone mask is known that uses a film to realize an intermediate exposure
  • both multi-tone photomasks can be used.
  • FIG. 7 shows an aspect in which a resist mask 190 is formed in the first region 106 using the multi-tone photomask 186 when forming the through groove 126.
  • the mask pattern 187 of the multi-tone photomask 186 is designed to have different light transmittances in accordance with the form of the stepped portion 127.
  • the resist film 188 is developed to form resist masks 190 having different film thicknesses corresponding to the regions of the stepped portions 127.
  • a resist mask 190 having a thin film region and a thick film region corresponding to the step shape of the third insulating layer 158 is formed.
  • a step can be formed on the side surface of the third insulating layer 158. Since the third insulating layer 158 is formed of a silicon oxide film or a silicon nitride film, it is preferable to use dry etching to etch these inorganic insulating films continuously. In dry etching, anisotropic etching is preferably performed using a gas such as carbon tetrafluoride (CF 4 ) or methane trifluoride (CHF 3 ) as an etching gas. A stepped portion can be similarly formed for the first insulating layer 150 as well.
  • CF 4 carbon tetrafluoride
  • CHF 3 methane trifluoride
  • the through groove 126 is formed by etching the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158.
  • a plurality of steps can be provided on the side wall surface 128 of the through groove 126 only by using a single photomask.
  • a multi-tone photomask is used.
  • a multi-tone photomask is provided with a slit equal to or less than the resolution of the exposure machine as a mask pattern formed on a glass surface, and the slit blocks a part of light to realize intermediate exposure,
  • a halftone mask is known that uses a film to realize an intermediate exposure
  • both multi-tone photomasks can be used.
  • the form of the side wall surface 128 in the penetration groove 126 is not limited to what is shown to FIG. 6A and 6B.
  • the side surfaces of the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 may be provided substantially vertically. Even if the side wall surface 128 is erected vertically, the height per step is mitigated by including the plurality of step portions 127, and the defect of the third wiring 118c disposed in the first region 106 is prevented. can do.
  • peeling and cracking of the insulating film can be prevented by providing the through groove 126 from which the base insulating film and the interlayer insulating film are removed in the region where the display device 100 is bent.
  • the through groove 126 from which the base insulating film and the interlayer insulating film are removed in the region where the display device 100 is bent.
  • the present embodiment shows an example of a method of manufacturing the display device 100.
  • the display device 100 has the same configuration as that shown in the first embodiment.
  • 9A, 10A, 12A, 13A, and 10A show structures corresponding to the cross section of the pixel 120 in the description of this embodiment, and FIGS. 9B, 10B, 12B, 13B, and 13B.
  • FIG. 10B shows a structure corresponding to a part of the first region 106 and the second region 108.
  • a first resist mask 190 a is formed on the third insulating layer 158 using a multi-tone mask (halftone mask).
  • the first resist mask 190 a has a pattern for processing the third insulating layer and the second insulating layer 154.
  • the first resist mask 190a has a first opening pattern 192a for forming a contact hole reaching the source region and the drain region formed in the semiconductor layer 152 in the region of the pixel 120, and a through groove in the second region 108.
  • a second opening pattern 192 b for forming the first electrode 126.
  • the first resist mask 190a is formed such that the inner region of the second opening pattern 192b has a thinner resist film thickness than the other regions.
  • Such a form of the first resist mask 190a is, for example, applying a positive resist on the base member 102, and the exposure amount of the inner region of the second opening pattern 192b is smaller than the exposure amount of the inner removal region. It is fabricated by exposure using a multi-tone photomask (halftone mask) so as to decrease.
  • the contact hole 167a penetrating the third insulating layer 158 and the second insulating layer 154 is formed in the pixel 120 by the first resist mask 190a, and the third insulating layer 158 is formed in the second region 108.
  • the third insulating layer 158 and the second insulating layer 154 are removed in the region of the through hole 126 and the contact hole 167b for exposing the second wiring 118b.
  • a step is formed on the side surface portion of the third insulating layer 158 by forming the first resist mask 190a using a multi-tone photomask.
  • FIG. 11A and 11B illustrate an embodiment in which the second resist mask 190 b is formed on the third insulating layer 158.
  • the entire surface of the pixel 120 is covered with the second resist mask 190b, and the second region 108 is a resist film in the region corresponding to the through groove 126, like the first resist mask 190a, in the inner region of the third opening pattern 192c.
  • An area of reduced thickness is formed.
  • the first insulating layer 150 is etched using the second resist mask 190 b until the surface of the base member 102 is exposed.
  • FIG. 12A and 12B show a state in which the through groove 126 is formed in the second region 108.
  • FIG. In the pixel 120, the multi-tone exposure method is not applied, so the contact hole 167a is formed in the third insulating layer 158 in a normal form.
  • a step is formed in each of the third insulating layer 158 and the first insulating layer 150 by two-time multi-tone exposure. That is, in the through groove 126, a plurality of steps are formed on the side wall surface 128.
  • FIG. 13A shows an aspect in which the first wiring 118a is formed in the pixel 120
  • FIG. 13B shows that the first common wiring 160a is formed in the first region 106
  • the third wiring 118c is formed in the second region 108.
  • the first wiring 118a, the first common wiring 160a, and the third wiring 118c are formed by forming a conductive film over the third insulating layer 158 and patterning the conductive film through a photolithography process.
  • the third resist mask 190c for forming the third interconnection 118c is formed, the side wall surface 128 of the through groove 126 has a plurality of steps, so the height of the step per step is reduced compared to the case where there is no step. ing.
  • the photoresist is sufficiently exposed also on the side wall surface 128 of the through groove 126, and the resist is prevented from remaining due to the insufficient exposure.
  • a short circuit between adjacent wires is prevented. That is, short circuit defects between adjacent wirings can be prevented, and the manufacturing yield can be improved.
  • the capacitor electrode 164, the fifth insulating layer 166, the first electrode 168, the A step of forming the two common wires 160b, the sixth insulating layer 170, the organic layer 172, and the second electrode 174 is shown.
  • the third wiring 118c can be formed by the same member (the same conductive film) as the first wiring 118a formed in the first region 106. Ru.
  • the sealing layer 136, the optical film 138, the resin layer 130, and the like are provided, the display device 100 shown in FIGS. 5, 6A, and 6B is manufactured.
  • the through groove 126 can be formed without significantly increasing the number of steps, and the sidewall surface 128 of the through groove 126 can be formed.
  • the photoresist can be reliably exposed because the stepped portion is provided.
  • the height of the step portion is high, the step portion can not be sufficiently exposed in the photolithography step, and the resist film remains in the step portion.
  • patterning defects can be eliminated by providing the plurality of step portions on the side wall surface 128 of the through groove 126.
  • FIG. 15 shows a form of the through groove 126 of the display device 100 according to the present embodiment.
  • the through groove 126 includes a bottom surface 129 and a side wall surface 128.
  • the side wall surface 128 is provided with a step in the third insulating layer 158.
  • the first insulating layer 150 is not provided with a step, and has an inclined side (a tapered side) which opens upward.
  • the third insulating layer 158 and the second insulating layer 154 are provided with a resist mask using a multi-gradation photomask (halftone mask) as in the second embodiment, and are processed by dry etching. Do. In this process, since the formation of the contact hole in the first region 106 is also performed simultaneously, it is preferable to process precisely by dry etching.
  • the processing of the first insulating layer 150 is performed by wet etching by providing a resist mask 190 d using a normal photomask.
  • the side surfaces of the first insulating layer 150 can have an inclination angle by forming an undercut.
  • the adhesion of the resist mask 190d may be reduced and wet etching may be performed so as to promote undercut.
  • the density of the first insulating layer 150 is made different in the film thickness direction (specifically, the density on the boundary surface with the resist mask 190 d is reduced with respect to the density on the base member 102 side), and wet etching is performed. Doing so promotes undercutting.
  • the inclination angle of the side surface of the first insulating layer 150 is in the range of 15 ° to 80 °, preferably 30 ° to 60 °.
  • the step of the through groove 126 can be relaxed also by inclining the side surface of the first insulating layer 150.
  • the steepness of the step can be alleviated at the portion where the third wiring 118c rises from the bottom surface 129 of the through groove 126 to the side wall surface 128.
  • etching of the base member 102 can be prevented, and undercutting of the lower surface of the first insulating layer 150 can be prevented. Thereby, disconnection of the third wiring 118c can be prevented. Further, by changing the first insulating layer 150 to wet etching, it is not necessary to use a multi-tone photomask (halftone mask), and the cost of the photomask can be reduced.
  • display device 102 base member 104: support member 106: first region 108: second region 110: third region 112: display Portions 114: Terminal portions 116: Drive circuits 118: Wirings 120: Pixels 122: Common contacts 124: Insulating layers 126: Through grooves 127 ⁇ ⁇ ⁇ Stepped portion, 128 ⁇ ⁇ ⁇ side wall surface, 129 ⁇ ⁇ ⁇ bottom surface ⁇ 130 ⁇ ⁇ ⁇ resin layer, 132 ⁇ ⁇ ⁇ drive element layer, 134 ⁇ ⁇ ⁇ display element layer, 136 ⁇ ⁇ ⁇ sealing layer, 138: optical film, 139: sealing resin, 140: opening, 142: transistor, 144: light emitting element, 146: capacitive element, 148: terminal electrode, 149 ...
  • terminal electrode layer 150 ... first insulating layer, 152 ... Semiconductor layer, 154: second insulating layer, 156: gate electrode, 158: third insulating layer, 160: common wiring, 162: fourth insulating layer, 164: capacitance electrode 166: fifth insulating layer 167: contact hole 168: first electrode 170: sixth insulating layer 172: organic layer 174: second electrode 178 ... First inorganic insulating film, 180 ... Organic resin film, 182 ... Second inorganic insulating film, 184 ... Opening area, 186 ... Multi-tone photomask, 187 ... Mask pattern , 188: resist film, 190: resist mask, 192: opening pattern

Abstract

This display device has: a base member having a first surface and a second surface on the reverse side of the first surface; a first region that includes a display section disposed on the first surface of the base member; a second region including wiring disposed on the first surface of the base member; a third region that includes a terminal section disposed on the first surface of the base member, and a drive circuit that outputs a data signal to the display section; and an insulating layer disposed across the first region and the second region, said insulating layer being on the first surface of the base member. The insulating layer has a through groove in the second region, said throughh groove being disposed along the display section, and having a bottom surface from which the base member is exposed, and side wall surfaces that include a plurality of steps. The wiring is disposed to intersect the through groove.

Description

表示装置Display device
 本発明の一実施形態は、表示装置における層間絶縁膜と配線の構造に関する。 One embodiment of the present invention relates to the structure of an interlayer insulating film and a wiring in a display device.
 表示装置は、画像が表示される表示部が配置される領域と、表示部の外側であって入力端子及び駆動回路が配置される周辺領域と、を有する。周辺領域は、表示部を囲むように配置されることから、額縁領域とも呼ばれる。表示装置は、画像の表示に直接寄与しない額縁領域を狭くすることが求められる(このことを「狭額縁化」と呼ぶこともある。)。表示装置の狭額縁化の技術として、プラスチック基板のような折り曲げ可能な基板を用い、額縁領域に相当する領域を表示部の裏面側に折り曲げた表示装置が開示されている(例えば、特許文献1参照)。 The display device has an area in which a display unit in which an image is displayed is arranged, and a peripheral area outside the display unit and in which an input terminal and a driver circuit are arranged. The peripheral area is also referred to as a frame area because it is arranged to surround the display portion. In a display device, it is required to narrow a frame area that does not directly contribute to the display of an image (this may be referred to as “narrowing of the frame”). As a technology for narrowing the frame of the display device, a display device in which a region corresponding to the frame region is bent to the back side of the display unit using a foldable substrate such as a plastic substrate is disclosed (for example, Patent Document 1) reference).
特開2011-209405号公報JP, 2011-209405, A
 表示装置の額縁領域には、絶縁層に接して、あるいは絶縁層に挟まれて配線が設けられる。表示装置を額縁領域で折り曲げた場合、絶縁層及び配線に作用する応力が問題となる。例えば、基板を折り曲げたことにより生じる、絶縁層の剥離、ひび割れ、配線の断線等が問題となる。 In the frame region of the display device, a wiring is provided in contact with the insulating layer or sandwiched by the insulating layer. When the display device is bent in the frame area, stress acting on the insulating layer and the wiring becomes a problem. For example, peeling of the insulating layer, cracking, disconnection of wiring, or the like caused by bending the substrate is a problem.
 本発明の一実施形態に係る表示装置は、第1面及び第1面と反対側の第2面とを有するベース部材と、ベース部材の第1面に配置された表示部を含む第1領域と、ベース部材の第1面に配設された配線を含む第2領域と、ベース部材の第1面に配置された端子部と、表示部にデータ信号を出力する駆動回路と、を含む第3領域と、ベース部材の第1面に、第1領域及び第2領域に亘って配設される絶縁層と、を有し、絶縁層は、第2領域において、表示部に沿って設けられ、ベース部材を露出させる底面と、複数の段差を含む側壁面と、を有する貫通溝を有し、配線は、貫通溝と交差して配置される。 A display device according to an embodiment of the present invention includes a base member having a first surface and a second surface opposite to the first surface, and a first region including a display unit disposed on the first surface of the base member. And a second region including a wire disposed on the first surface of the base member, a terminal portion disposed on the first surface of the base member, and a drive circuit for outputting a data signal to the display portion. And an insulating layer disposed over the first area and the second area on the first surface of the base member, and the insulating layer is provided along the display portion in the second area. And a through groove having a bottom surface exposing the base member and a side wall surface including a plurality of steps, and the wiring is disposed to intersect the through groove.
本発明の一実施形態に係る表示装置を構成する各部位の配置を示す図である。It is a figure which shows arrangement | positioning of each site | part which comprises the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の積層構造の概略を示す断面図である。It is sectional drawing which shows the outline of the laminated structure of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置を折り曲げた状態を示す断面図である。It is a sectional view showing the state where the display concerning one embodiment of the present invention was bent. 本発明の一実施形態に係る表示装置の画素の構造を示す断面図である。It is sectional drawing which shows the structure of the pixel of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の第1領域の一部、第2領域、及び第3領域の構造を示す断面図である。It is sectional drawing which shows the structure of a part of 1st area | region, 2nd area | region, and 3rd area | region of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の第2領域の構造を示す平面図である。It is a top view which shows the structure of the 2nd field of a display concerning one embodiment of the present invention. 本発明の一実施形態に係る表示装置の第2領域の構造を示す図でありC1-C2線に沿った断面図を示す。FIG. 7 is a view showing a structure of a second region of a display device according to an embodiment of the present invention, and is a cross-sectional view taken along line C1-C2. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の第2領域の構造を示す断面図である。It is sectional drawing which shows the structure of the 2nd area | region of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり画素の断面図を示す。FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり第1領域の一部及び第2領域の断面図を示す。It is a figure explaining the manufacturing process of the display apparatus which concerns on one Embodiment of this invention, and shows sectional drawing of a part of 1st area | region and 2nd area | region. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり画素の断面図を示す。FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり第1領域の一部及び第2領域の断面図を示す。It is a figure explaining the manufacturing process of the display apparatus which concerns on one Embodiment of this invention, and shows sectional drawing of a part of 1st area | region and 2nd area | region. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり画素の断面図を示す。FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり第1領域の一部及び第2領域の断面図を示す。It is a figure explaining the manufacturing process of the display apparatus which concerns on one Embodiment of this invention, and shows sectional drawing of a part of 1st area | region and 2nd area | region. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり画素の断面図を示す。FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり第1領域の一部及び第2領域の断面図を示す。It is a figure explaining the manufacturing process of the display apparatus which concerns on one Embodiment of this invention, and shows sectional drawing of a part of 1st area | region and 2nd area | region. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり画素の断面図を示す。FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり第1領域の一部及び第2領域の断面図を示す。It is a figure explaining the manufacturing process of the display apparatus which concerns on one Embodiment of this invention, and shows sectional drawing of a part of 1st area | region and 2nd area | region. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり画素の断面図を示す。FIG. 14 is a diagram for explaining a manufacturing process of the display device according to the embodiment of the present invention, and showing a cross-sectional view of a pixel. 本発明の一実施形態に係る表示装置の製造工程を説明する図であり第1領域の一部及び第2領域の断面図を示す。It is a figure explaining the manufacturing process of the display apparatus which concerns on one Embodiment of this invention, and shows sectional drawing of a part of 1st area | region and 2nd area | region. 本発明の一実施形態に係る表示装置の第2領域の構造を示す断面図である。It is sectional drawing which shows the structure of the 2nd area | region of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention.
 以下、本発明の実施の形態を、図面等を参照しながら説明する。但し、本発明は多くの異なる態様で実施することが可能であり、以下に例示する実施の形態の記載内容に限定して解釈されるものではない。図面は説明をより明確にするため、実際の態様に比べ、各部の幅、厚さ、形状等について模式的に表される場合があるが、あくまで一例であって、本発明の解釈を限定するものではない。また、本明細書と各図において、既出の図に関して前述したものと同様の要素には、同一の符号(又は数字の後にa、bなどを付した符号)を付して、詳細な説明を適宜省略することがある。さらに各要素に対する「第1」、「第2」と付記された文字は、各要素を区別するために用いられる便宜的な標識であり、特段の説明がない限りそれ以上の意味を有さない。 Hereinafter, embodiments of the present invention will be described with reference to the drawings and the like. However, the present invention can be implemented in many different modes, and is not construed as being limited to the description of the embodiments exemplified below. Although the drawings may be schematically represented with respect to the width, thickness, shape, etc. of each portion in comparison with the actual embodiment in order to make the description clearer, this is merely an example, and the interpretation of the present invention is limited. It is not a thing. Further, in the specification and the drawings, the same elements as those described above with reference to the existing figures are denoted by the same reference numerals (or reference numerals with a, b, etc. added after numbers) for detailed explanation. It may be omitted as appropriate. Furthermore, the letters appended with “first” and “second” for each element are convenient indicators used to distinguish each element and have no further meaning unless specifically stated otherwise .
 本明細書において、ある部材又は領域が他の部材又は領域の「上に(又は下に)」あるとする場合、特段の限定がない限りこれは他の部材又は領域の直上(又は直下)にある場合のみでなく他の部材又は領域の上方(又は下方)にある場合を含み、すなわち、他の部材又は領域の上方(又は下方)において間に別の構成要素が含まれている場合も含む。なお、以下の説明では、特に断りのない限り、断面視においては、基板の一主面に対して画素領域、タッチセンサが配置される側を「上方」に該当するとして説明する。 In this specification, when one member or area is "above (or below)" another member or area, it is immediately above (or just below) the other member or area unless there is a particular limitation. Not only in some cases, but also above (or below) other members or regions, that is, including other components interposed above (or below) other members or regions . In the following description, unless otherwise noted, in the cross-sectional view, the side on which the pixel region and the touch sensor are arranged with respect to one main surface of the substrate is described as “upper”.
第1実施形態:
 図1は、本発明の一実施形態に係る表示装置100を構成する各部位の配置を示す。表示装置100は、第1面と、第1面とは反対側の第2面を有するベース部材102を含む。ベース部材102の第1面は、画素120が配列される表示部112、及び表示部112に走査信号を出力する第1駆動回路116aを含む第1領域106と、第1領域106に隣接する第2領域108と、ベース部材102の端部に配置される端子部114、及び端子部114に隣接して配置され表示部112にデータ信号を出力する第2駆動回路116bを含む第3領域110と、を含む。第2領域108は、第1領域106と第3領域110との間の領域であり、データ信号線、電源線等の配線118が配設される領域である。
First embodiment:
FIG. 1 shows the arrangement of each part constituting a display device 100 according to an embodiment of the present invention. The display device 100 includes a base member 102 having a first surface and a second surface opposite to the first surface. The first surface of the base member 102 includes a display area 112 in which the pixels 120 are arranged, a first area 106 including a first drive circuit 116 a for outputting a scan signal to the display area 112, and a first area 106 adjacent to the first area 106. A second region 108, a terminal portion 114 disposed at an end of the base member 102, and a third region 110 including a second drive circuit 116b disposed adjacent to the terminal portion 114 and outputting a data signal to the display unit 112. ,including. The second area 108 is an area between the first area 106 and the third area 110, and is an area in which the wirings 118 such as data signal lines and power supply lines are provided.
 第1領域106に含まれる表示部112は複数の画素120が配列され、文字、映像等の情報が表示される画面を形成する。表示部112に沿って配置される第1駆動回路116aは、画素120に走査信号を出力する。第3領域110に含まれる端子部114は、複数の端子電極が配列され、フレキシブルプリント配線基板と接続される。第2駆動回路116bは、表示部112と端子部114との間の領域に配置され、画素120にデータ信号(ビデオ信号)を出力する機能を有する。第2領域108は、第2駆動回路116bと表示部112とを繋ぐ配線118が配設される。 The display unit 112 included in the first area 106 has a plurality of pixels 120 arranged, and forms a screen on which information such as characters and images is displayed. The first drive circuit 116 a disposed along the display unit 112 outputs a scan signal to the pixel 120. A plurality of terminal electrodes are arranged in the terminal portion 114 included in the third region 110, and connected to the flexible printed wiring board. The second drive circuit 116 b is disposed in an area between the display portion 112 and the terminal portion 114, and has a function of outputting a data signal (video signal) to the pixel 120. In the second region 108, a wiring 118 connecting the second drive circuit 116b and the display portion 112 is provided.
 画素120は、表示素子と、表示素子を駆動する薄膜トランジスタを含む。表示素子としては、アノード及びカソードとして区別される一対の電極間に有機エレクトロルミネセンス材料(以下、「有機EL材料」ともいう。)を含む有機層が設けられる有機エレクトロルミネセンス素子(以下、「有機EL素子」ともいう。)、一対の電極間に液晶層が設けられた液晶素子、又は一対の電極間に極性を有する流体が配置される電気泳動素子等が適用される。表示部112の近傍には、表示素子の一方の電極にコモン電位を与えるコモンコンタクト122が配置される。 The pixel 120 includes a display element and a thin film transistor which drives the display element. As a display element, an organic electroluminescent element (hereinafter referred to as “an organic electroluminescent element (hereinafter referred to as“ an organic electroluminescent element (hereinafter referred to as “an organic EL material”)) is provided between a pair of electrodes distinguished as an anode and a cathode. Or a liquid crystal element in which a liquid crystal layer is provided between a pair of electrodes, or an electrophoresis element in which a fluid having polarity is disposed between a pair of electrodes. In the vicinity of the display portion 112, a common contact 122 which applies a common potential to one electrode of the display element is disposed.
 第1駆動回路116aは、シフトレジスタ等を含む回路が薄膜トランジスタを用いて形成される。第2駆動回路116bは、例えば、ベアチップの集積回路で形成され、ベース部材102に実装される。 In the first drive circuit 116a, a circuit including a shift register or the like is formed using a thin film transistor. The second drive circuit 116 b is formed, for example, of a bare chip integrated circuit and mounted on the base member 102.
 ベース部材102は可撓性を有し、折り曲げ、湾曲が可能とされる。このようなベース部材102は有機樹脂材料を用いて形成される。例えば、ベース部材102として、繰り返し単位にイミド結合を含む高分子材料(ポリイミド)、アミド結合によって多数のモノマーが結合してできた高分子材料(ポリアミド)等が適用される。このようなベース部材102は、5μm~50μm、例えば、10μmの厚さを有する。ベース部材102を構成する他の部材として、厚さ100μm~200μm程度のガラス基板を用いることもできる。この場合、耐衝撃性の改善のため有機樹脂フィルムを貼り合わせて使用することが好ましい。 The base member 102 is flexible and can be bent and bent. Such a base member 102 is formed using an organic resin material. For example, as the base member 102, a polymer material (imide) containing an imide bond in a repeating unit, a polymer material (polyamide) made by bonding a large number of monomers by an amide bond, or the like is applied. Such a base member 102 has a thickness of 5 μm to 50 μm, for example 10 μm. A glass substrate having a thickness of about 100 μm to 200 μm can also be used as another member constituting the base member 102. In this case, it is preferable to use an organic resin film by laminating for improvement of impact resistance.
 第2領域108は、ベース部材102が曲げられる領域となる。本実施形態に係る表示装置100は、表示部112に隣接するX1-X2線に沿ってベース部材102を折り曲げ可能となる構造を有する。第2領域108に配設される配線118は、ベース部材102を折り曲げることで、同様に折り曲げられる。第2領域108は、折り曲げ線として仮想されるX1-X2線を含む領域に、ベース部材102の第1面に設けられる絶縁層を貫通する貫通溝126を含む。貫通溝126の詳細は、図2により説明される。貫通溝126は、図1に図示されるように、ベース部材102の一端から他端にかけて連続して設けられていてもよいし、配線118と重なる領域に選択的に設けられていてもよい。別言すれば、貫通溝126は、配線118の配置に対応して不連続に設けられていてもよい。 The second area 108 is an area where the base member 102 is bent. The display device 100 according to the present embodiment has a structure in which the base member 102 can be bent along the X1-X2 line adjacent to the display unit 112. The wiring 118 disposed in the second region 108 is similarly bent by bending the base member 102. The second region 108 includes a through groove 126 penetrating an insulating layer provided on the first surface of the base member 102 in a region including the X1-X2 line assumed to be a bending line. The details of the through groove 126 will be described with reference to FIG. The through groove 126 may be provided continuously from one end to the other end of the base member 102 as shown in FIG. 1, or may be selectively provided in a region overlapping the wiring 118. In other words, the through groove 126 may be discontinuously provided corresponding to the arrangement of the wiring 118.
 図2は、表示装置100の簡略化された積層構造を示す。図2に示される断面構造は、図1に示すA1-A2線に対応する。表示装置100は、ベース部材102の第1面に、駆動素子層132及び表示素子層134を含む。駆動素子層132及び表示素子層134は、第1領域106に配置される。駆動素子層132は、ベース部材102の第1面に設けられ、駆動素子層132の上に表示素子層134が積層される。駆動素子層132及び表示素子層134によって、表示部112及び第1駆動回路116aが形成される。表示素子層134は封止層136によって上面及び側面が覆われる。封止層136の上層側は光学フィルム138が配置される。 FIG. 2 shows a simplified stack structure of the display device 100. The cross-sectional structure shown in FIG. 2 corresponds to the line A1-A2 shown in FIG. The display device 100 includes a driving element layer 132 and a display element layer 134 on the first surface of the base member 102. The driving element layer 132 and the display element layer 134 are disposed in the first region 106. The driving element layer 132 is provided on the first surface of the base member 102, and the display element layer 134 is stacked on the driving element layer 132. The display portion 112 and the first drive circuit 116 a are formed by the drive element layer 132 and the display element layer 134. The top and side surfaces of the display element layer 134 are covered by the sealing layer 136. An optical film 138 is disposed on the upper layer side of the sealing layer 136.
 表示素子層134は、複数の表示素子を含む。表示素子としては、例えば、発光素子が用いられる。発光素子としては、有機エレクトロルミネセンス材料(以下、「有機EL材料」ともいう。)で発光層が形成される有機エレクトロルミネセンス素子(以下、「有機EL素子」ともいう。)が好適に用いられる。また、表示素子層134は、発光素子に代えて、一対の電極間に液晶層が設けられた液晶素子、極性を有する粒子の流体を電界の作用によって制御する電気泳動素子等を用いて構成されてもよい。 The display element layer 134 includes a plurality of display elements. For example, a light emitting element is used as the display element. As a light emitting element, an organic electroluminescent element (hereinafter, also referred to as "organic EL element") in which a light emitting layer is formed of an organic electroluminescent material (hereinafter, also referred to as "organic EL material") is suitably used. Be Further, the display element layer 134 is configured using a liquid crystal element in which a liquid crystal layer is provided between a pair of electrodes instead of a light emitting element, and an electrophoresis element for controlling fluid of particles having polarity by the action of an electric field. May be
 駆動素子層132は、トランジスタ等の能動素子、キャパシタ、抵抗等の受動素子により、画素回路及び駆動回路が形成される。駆動素子層132は、これらの回路を形成するため絶縁層、半導体層、導電層が適宜積層される。駆動素子層132のトランジスタと表示素子層134の表示素子は電気的に接続される。 In the drive element layer 132, a pixel circuit and a drive circuit are formed by active elements such as transistors, and passive elements such as capacitors and resistors. In the driving element layer 132, an insulating layer, a semiconductor layer, and a conductive layer are appropriately stacked in order to form these circuits. The transistor in the driving element layer 132 and the display element in the display element layer 134 are electrically connected.
 封止層136は、表示素子層134を、空気中に含まれる水蒸気から保護するために設けられる。封止層136は、水蒸気を遮断するために水蒸気透過率の低い無機絶縁膜を含む。例えば、封止層136は、有機絶縁膜の上層側及び下層側を水蒸気透過率の低い無機絶縁膜で挟んだ構造で設けられる。 The sealing layer 136 is provided to protect the display element layer 134 from water vapor contained in air. The sealing layer 136 includes an inorganic insulating film having a low water vapor permeability to block water vapor. For example, the sealing layer 136 is provided in a structure in which the upper layer side and the lower layer side of the organic insulating film are sandwiched by an inorganic insulating film having a low water vapor permeability.
 光学フィルム138としては、位相差フィルム、偏光フィルム、反射防止フィルム、光学的異方性を有さない透明フィルム等の機能性フィルムが用いられる。光学フィルム138は、これらの機能性フィルムの一つ又は複数を組み合わせて構成されてもよい。例えば、光学フィルム138は、封止層136側から、光学的異方性を有さない透明フィルムと偏光フィルムが積層された構造を有する。偏光フィルムの上には、さらに反射防止フィルムが積層されていてもよい。 As the optical film 138, a functional film such as a retardation film, a polarizing film, an antireflective film, or a transparent film having no optical anisotropy is used. The optical film 138 may be configured by combining one or more of these functional films. For example, the optical film 138 has a structure in which a transparent film having no optical anisotropy and a polarizing film are laminated from the sealing layer 136 side. An antireflective film may be further laminated on the polarizing film.
 第3領域110において、端子部114は、ベース部材102に一端に配置される。第2駆動回路116bは、例えば、ベアチップ(パッケージ化されていない集積回路)であり、ベース部材102に実装される。端子部114及び第2駆動回路116bは、封止層136及び光学フィルム138から露出される。すなわち、第3領域110は、封止層136及び光学フィルム138が配置されない領域となる。 In the third region 110, the terminal portion 114 is disposed at one end of the base member 102. The second drive circuit 116 b is, for example, a bare chip (integrated circuit not packaged), and is mounted on the base member 102. The terminal portion 114 and the second drive circuit 116 b are exposed from the sealing layer 136 and the optical film 138. That is, the third region 110 is a region where the sealing layer 136 and the optical film 138 are not disposed.
 第2領域108は、駆動素子層132から絶縁層124が延在し、絶縁層124に接して配線118が配設される。配線118は、駆動素子層132から、第2駆動回路116b及び端子部114が配置される第3領域110に延びる。第2領域108において、配線118は樹脂層130によって覆われていてもよい。樹脂層130は、第2領域108の略全面を覆うように設けられる。絶縁層124は貫通溝126が設けられる。 In the second region 108, the insulating layer 124 extends from the driving element layer 132, and the wiring 118 is provided in contact with the insulating layer 124. The wiring 118 extends from the drive element layer 132 to the third region 110 in which the second drive circuit 116 b and the terminal portion 114 are disposed. The wiring 118 may be covered by the resin layer 130 in the second region 108. The resin layer 130 is provided to cover substantially the entire surface of the second region 108. The insulating layer 124 is provided with a through groove 126.
 貫通溝126は、ベース部材102の上面を露出させる。貫通溝126の側面は階段状の複数の段差を有する。貫通溝126の側壁は、複数の段差を有する。貫通溝126の側壁に設けられる複数の段差は、側壁の急峻な立ち上がりを緩和する。すなわち、貫通溝126は、溝底部(ベース部材102の上面)から溝上部(絶縁層124の上面)まで側壁面が急峻に立ち上がるのではなく、階段状に立ち上がることにより、急峻性が緩和される。配線118は、貫通溝126を横断して配設される。配線118は、貫通溝126の側壁面において、複数の段差に沿って配設される。このような態様により、配線118は、貫通溝126を横断する領域で断線することが防止される。 The through groove 126 exposes the upper surface of the base member 102. The side surface of the through groove 126 has a plurality of stepped steps. The side wall of the through groove 126 has a plurality of steps. The plurality of steps provided on the side wall of the through groove 126 alleviates the steep rise of the side wall. That is, in the through groove 126, the side wall surface does not rise sharply from the groove bottom (the upper surface of the base member 102) to the groove upper portion (the upper surface of the insulating layer 124). . The wire 118 is disposed across the through groove 126. The wiring 118 is disposed along the plurality of steps on the side wall surface of the through groove 126. In this manner, the interconnections 118 are prevented from breaking in the region crossing the through groove 126.
 ベース部材102の第2面には、支持部材104が設けられてもよい。支持部材104は、第1領域106及び第3領域110に対応する領域に設けられ、第2領域108に対応する領域に開口部140が設けられている。支持部材104を設けることで、表示装置100は、第1領域106及び第3領域110に対応する領域の剛性を高められる。一方、支持部材104が設けられない第2領域108は、第1領域106及び第3領域110と比べて剛性が低くなる。これにより、第2領域108を、表示装置100の曲げ領域として画定することができる。別言すれば、支持部材104に開口部140を設けることで、開口部140と重なる領域を表示装置100の曲げ領域とすることができる。 A support member 104 may be provided on the second surface of the base member 102. The support member 104 is provided in the area corresponding to the first area 106 and the third area 110, and the opening 140 is provided in the area corresponding to the second area 108. By providing the support member 104, the display device 100 can be made more rigid in the regions corresponding to the first region 106 and the third region 110. On the other hand, the second area 108 where the support member 104 is not provided has lower rigidity than the first area 106 and the third area 110. Thereby, the second area 108 can be defined as a bending area of the display device 100. In other words, by providing the opening 140 in the support member 104, the region overlapping with the opening 140 can be used as a bending region of the display device 100.
 図3は、ベース部材102を、第2領域108において第2面側に折り曲げた状態を示す。ベース部材102を折り曲げることで、配線118及び樹脂層130も曲げられる。また、貫通溝126は、折り曲げられる領域の中に含まれる。ベース部材102の厚さが10μm~50μmであるとき、第1領域106の曲率半径は、例えば、0.1mm~10mm、好ましくは0.5mm~5mmとすることができる。なお、第2領域108の曲率半径は一定である必要はなく、曲率半径が連続的に変化していてもよい。また、ベース部材102を曲げる角度(屈曲角)は0度~180度の範囲で設定することができる。 FIG. 3 shows a state in which the base member 102 is bent to the second surface side in the second region 108. By bending the base member 102, the wiring 118 and the resin layer 130 can also be bent. Also, the through groove 126 is included in the area to be bent. When the thickness of the base member 102 is 10 μm to 50 μm, the radius of curvature of the first region 106 can be, for example, 0.1 mm to 10 mm, preferably 0.5 mm to 5 mm. The radius of curvature of the second region 108 does not have to be constant, and the radius of curvature may change continuously. The angle (bending angle) at which the base member 102 is bent can be set in the range of 0 degree to 180 degrees.
 ベース部材102を第2領域108で、第1面とは反対の第2面側に折り曲げることで、第2駆動回路116b及び端子部114は、表示部112の背面側に配置される。これにより、表示装置100の額縁領域の一部は、表示部112の背面に隠れることとなり、実質的に狭額縁化が図られる。別言すれば、第3領域110は、端子部114及び第2駆動回路116bが配置されるため、額縁領域の中でも幅広の領域となる。したがって、第3領域110が表示部112の背面に配置されるようにベース部材102を折り曲げることで、より効果的に狭額縁化を図ることができる。 The second drive circuit 116 b and the terminal portion 114 are disposed on the rear surface side of the display unit 112 by bending the base member 102 in the second region 108 to the second surface side opposite to the first surface. As a result, a part of the frame area of the display device 100 is hidden behind the display unit 112, and the frame can be substantially narrowed. In other words, since the terminal area 114 and the second drive circuit 116 b are disposed, the third area 110 is a wide area in the frame area. Therefore, by bending the base member 102 so that the third region 110 is disposed on the back surface of the display unit 112, it is possible to more effectively narrow the frame.
 第2領域108の絶縁層124は、貫通溝126が設けられる。別言すれば、ベース部材102が曲げられる領域に、絶縁層124が除去された貫通溝126を有することにより、絶縁層124の剥離、ひび割れが抑制される。さらに、貫通溝126の側壁面に複数の段差が設けられていることにより、貫通溝126を横断する配線118に作用する応力が分散される。これにより、配線118は、断線、剥離が防止される。表示装置100は、貫通溝126が設けられた領域で折り曲げられるので、第2領域108は折り曲げ領域とよぶこともできる。 The insulating layer 124 in the second region 108 is provided with a through groove 126. In other words, peeling and cracking of the insulating layer 124 are suppressed by providing the through groove 126 from which the insulating layer 124 is removed in the region where the base member 102 is bent. Furthermore, by providing a plurality of steps on the side wall surface of the through groove 126, the stress acting on the interconnection 118 crossing the through groove 126 is dispersed. Thus, the wire 118 is prevented from being broken or peeled off. Since the display device 100 is bent in the area where the through groove 126 is provided, the second area 108 can also be referred to as a bending area.
 図4は、表示装置100における画素120の断面構造を示す。画素120は、少なくとも一つのトランジスタ142と、発光素子144と、容量素子146とを含む。トランジスタ142、発光素子144及び容量素子146は電気的に接続される。トランジスタ142はゲートに印加される電圧によってソース-ドレイン間を流れる電流(ドレイン電流)が制御される。発光素子144はドレイン電流によって発光強度が制御される。容量素子146は、トランジスタ142のゲート-ソース間に接続されることによりゲート電圧が印加され、ゲート電圧を一定に保つために設けられる。 FIG. 4 shows a cross-sectional structure of the pixel 120 in the display device 100. The pixel 120 includes at least one transistor 142, a light emitting element 144, and a capacitive element 146. The transistor 142, the light emitting element 144, and the capacitor 146 are electrically connected. The voltage applied to the gate of the transistor 142 controls the current (drain current) flowing between the source and the drain. The light emission intensity of the light emitting element 144 is controlled by the drain current. The gate voltage is applied by connecting between the gate and the source of the transistor 142, and the capacitor 146 is provided to keep the gate voltage constant.
 図4において、駆動素子層132は、第1絶縁層150、半導体層152、第2絶縁層154、ゲート電極156、第3絶縁層158、第1配線118a、第4絶縁層162、容量電極164、第5絶縁層166、及び第1電極168を含む。表示素子層134は、第1電極168、第6絶縁層170、有機層172、及び第2電極174を含む。また、封止層136は、第1無機絶縁膜178、有機樹脂膜180、及び第2無機絶縁膜182を含む。 In FIG. 4, the driving element layer 132 includes a first insulating layer 150, a semiconductor layer 152, a second insulating layer 154, a gate electrode 156, a third insulating layer 158, a first wiring 118 a, a fourth insulating layer 162, and a capacitor electrode 164. , The fifth insulating layer 166, and the first electrode 168. The display element layer 134 includes a first electrode 168, a sixth insulating layer 170, an organic layer 172, and a second electrode 174. In addition, the sealing layer 136 includes a first inorganic insulating film 178, an organic resin film 180, and a second inorganic insulating film 182.
 ベース部材102の第1面には、第1絶縁層150が設けられる。第1絶縁層150は、半導体層152の下層側に設けられるので、下地絶縁層とも呼ばれる。第1絶縁層150は1つの無機絶縁膜又は複数の無機絶縁膜を積層して形成される。例えば、第1絶縁層150は、酸化シリコン膜、窒化シリコン膜、及び酸化シリコン膜が、ベース部材102側からこの順で積層された構造を有する。第1絶縁層150は、100nm~10000nm、好ましくは、400nm~800nm、例えば、600nmの膜厚を有する。 A first insulating layer 150 is provided on the first surface of the base member 102. Since the first insulating layer 150 is provided on the lower layer side of the semiconductor layer 152, the first insulating layer 150 is also referred to as a base insulating layer. The first insulating layer 150 is formed by laminating one inorganic insulating film or a plurality of inorganic insulating films. For example, the first insulating layer 150 has a structure in which a silicon oxide film, a silicon nitride film, and a silicon oxide film are stacked in this order from the base member 102 side. The first insulating layer 150 has a thickness of 100 nm to 10000 nm, preferably 400 nm to 800 nm, for example, 600 nm.
 駆動素子層132に設けられるトランジスタ142は、半導体層152、第2絶縁層154(ゲート絶縁層)及びゲート電極156が積層された構造を有する。半導体層152は、非晶質シリコン又は多結晶のシリコン、若しくは金属酸化物等の半導体材料で形成される。半導体層152は第2絶縁層154によってゲート電極156と絶縁される。第2絶縁層154は、酸化シリコン膜、酸窒化シリコン膜等の無機絶縁膜で形成される。第2絶縁層154は、第1絶縁層150よりも薄く形成される。例えば、第2絶縁層154は、50nm~200nm、例えば、100nmの膜厚を有する。 The transistor 142 provided in the driving element layer 132 has a structure in which the semiconductor layer 152, the second insulating layer 154 (gate insulating layer), and the gate electrode 156 are stacked. The semiconductor layer 152 is formed of a semiconductor material such as amorphous silicon or polycrystalline silicon, or a metal oxide. The semiconductor layer 152 is insulated from the gate electrode 156 by the second insulating layer 154. The second insulating layer 154 is formed of an inorganic insulating film such as a silicon oxide film or a silicon oxynitride film. The second insulating layer 154 is thinner than the first insulating layer 150. For example, the second insulating layer 154 has a thickness of 50 nm to 200 nm, for example, 100 nm.
 ゲート電極156の上層側には第3絶縁層158が設けられる。第3絶縁層158の上層側には第1配線118aが設けられる。第1配線118aは、第3絶縁層158に形成されたコンタクトホールを介して半導体層152とコンタクトを形成する。第3絶縁層158は無機絶縁膜を用いて作製される。例えば、第3絶縁層158は、酸化シリコン膜の単層、窒化シリコン膜と酸化シリコン膜とを積層して形成される。第3絶縁層158は、ゲート電極156と第1配線118aとを絶縁する層間絶縁膜として用いられる。そのため、第3絶縁層158は、100nm~20000nm、好ましくは、500nm~10000nm、例えば、700nmの膜厚を有する。また、ゲート電極156、第1配線118aは、アルミニウム(Al)、モリブデン(Mo)、チタン(Ti)、タングステン(W)等の金属膜を用いて作製される。例えば、第1配線118aはアルミニウム(Al)膜の下層側及び上層側にチタン(Ti)膜を設けた3層構造を有する。 A third insulating layer 158 is provided on the upper layer side of the gate electrode 156. The first wiring 118 a is provided on the upper side of the third insulating layer 158. The first wiring 118 a forms a contact with the semiconductor layer 152 through a contact hole formed in the third insulating layer 158. The third insulating layer 158 is manufactured using an inorganic insulating film. For example, the third insulating layer 158 is formed by stacking a single layer of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The third insulating layer 158 is used as an interlayer insulating film which insulates the gate electrode 156 and the first wiring 118a. Therefore, the third insulating layer 158 has a thickness of 100 nm to 20000 nm, preferably 500 nm to 10000 nm, for example, 700 nm. In addition, the gate electrode 156 and the first wiring 118 a are manufactured using a metal film such as aluminum (Al), molybdenum (Mo), titanium (Ti), tungsten (W) or the like. For example, the first wiring 118a has a three-layer structure in which a titanium (Ti) film is provided on the lower layer side and the upper layer side of the aluminum (Al) film.
 第1配線118aの上層には、第4絶縁層162が設けられる。第4絶縁層162は、半導体層152、ゲート電極156及び第1配線118a等による凹凸面を埋め込み、表面を平坦化する平坦化膜として用いられる。第4絶縁層162は、ポリイミド樹脂又はアクリル樹脂等の有機絶縁材料を用いて形成される。 A fourth insulating layer 162 is provided in the upper layer of the first wiring 118a. The fourth insulating layer 162 is used as a planarizing film which embeds an uneven surface by the semiconductor layer 152, the gate electrode 156, the first wiring 118a, and the like and planarizes the surface. The fourth insulating layer 162 is formed using an organic insulating material such as polyimide resin or acrylic resin.
 第4絶縁層162の上面には容量電極164が設けられ、さらに第5絶縁層166が形成される。第5絶縁層166の上面には、第1電極168が設けられる。第1電極168は、第5絶縁層166及び第4絶縁層162を貫通するコンタクトホールを介して第1配線118aと電気的に接続される。第1電極168は、第5絶縁層166を挟んで容量電極164と重なるように設けられる。容量電極164、第5絶縁層166及び第1電極168が重なる領域が容量素子146となる。容量素子146の誘電体膜として用いられる第5絶縁層166は、窒化シリコン、酸化シリコン、窒酸化シリコン等の無機絶縁膜が用いられる。 A capacitive electrode 164 is provided on the top surface of the fourth insulating layer 162, and a fifth insulating layer 166 is further formed. The first electrode 168 is provided on the top surface of the fifth insulating layer 166. The first electrode 168 is electrically connected to the first wiring 118 a through a contact hole penetrating the fifth insulating layer 166 and the fourth insulating layer 162. The first electrode 168 is provided to overlap with the capacitor electrode 164 with the fifth insulating layer 166 interposed therebetween. A region where the capacitor electrode 164, the fifth insulating layer 166, and the first electrode 168 overlap is the capacitor 146. As the fifth insulating layer 166 used as a dielectric film of the capacitor 146, an inorganic insulating film such as silicon nitride, silicon oxide, silicon oxynitride or the like is used.
 表示素子層134は、第1電極168、有機層172、及び第2電極174が積層された発光素子144を含む。第1電極168は、開口部を有する第6絶縁層170によって周縁部が覆われ、内側領域が露出される。有機層172は、第6絶縁層170から露出する第1電極168の上面から、第6絶縁層170の表面を覆うように設けられる。第2電極174は、有機層172及び第6絶縁層170の上面を覆うように設けられる。画素120は、第6絶縁層170の開口部に対応する領域が発光領域となる。第6絶縁層170は、第1電極168を露出する開口端において、滑らかな段差を形成するために有機絶縁材料で作製される。有機絶縁材料としては、アクリル樹脂、ポリイミド樹脂及びポリアミド樹脂等が用いられる。 The display element layer 134 includes the light emitting element 144 in which the first electrode 168, the organic layer 172, and the second electrode 174 are stacked. The periphery of the first electrode 168 is covered with a sixth insulating layer 170 having an opening, and the inner region is exposed. The organic layer 172 is provided to cover the surface of the sixth insulating layer 170 from the top surface of the first electrode 168 exposed from the sixth insulating layer 170. The second electrode 174 is provided to cover the top surfaces of the organic layer 172 and the sixth insulating layer 170. In the pixel 120, a region corresponding to the opening of the sixth insulating layer 170 is a light emitting region. The sixth insulating layer 170 is made of an organic insulating material to form a smooth level difference at the open end that exposes the first electrode 168. An acrylic resin, a polyimide resin, a polyamide resin etc. are used as an organic insulation material.
 有機層172は、低分子系又は高分子系の有機EL材料を用いて作製される。低分子系の有機EL材料を用いる場合、有機層172は有機EL材料を含む発光層に加え、当該発光層を挟むようにキャリア注入層(正孔注入層、電子注入層)、キャリア輸送層(正孔輸送層、電子輸送層)等が適宜設けられる。例えば、有機層172は、発光層を正孔注入層と電子注入層とで挟んだ構造とされる。また、有機層172は、正孔注入層と電子注入層に加え、正孔輸送層、電子輸送層、正孔ブロック層、電子ブロック層などを適宜付加される。 The organic layer 172 is manufactured using a low molecular weight or high molecular weight organic EL material. When a low molecular weight organic EL material is used, the organic layer 172 is added to the light emitting layer containing the organic EL material, and the carrier injection layer (hole injection layer, electron injection layer) to sandwich the light emitting layer, the carrier transport layer ( A hole transport layer, an electron transport layer, etc. are suitably provided. For example, the organic layer 172 has a structure in which the light emitting layer is sandwiched between the hole injection layer and the electron injection layer. In addition to the hole injection layer and the electron injection layer, the organic layer 172 is appropriately added with a hole transport layer, an electron transport layer, a hole block layer, an electron block layer, and the like.
 本実施形態において、発光素子144は、有機層172で発光した光を第2電極174側に放射する、所謂トップエミッション型であるものとする。第1電極168は有機層172で発光した光を反射するように、金属膜又は金属膜を含んで作製される。例えば、第1電極168は、アルミニウム(Al)、銀(Ag)等の可視光帯域において光反射率の高い金属膜を含んで作製されることが好ましい。また、第1電極168は、酸化インジウムスズ(以下、「ITO」ともいう。)、酸化インジウム亜鉛(以下、「IZO」ともいう。)、アルミニウムが添加された酸化亜鉛(以下、「AZO」ともいう。)、ガリウムが添加された酸化亜鉛(以下、「GZO」ともいう。)等の透明導電膜と金属膜とが積層されてもよい。第2電極174は、有機層172で発光した光を透過するため、ITO、IZO、AZO、GZO等の透明導電膜で作製される。第2電極174は表示部112の略全面に亘って設けられる。 In the present embodiment, the light emitting element 144 is a so-called top emission type that emits the light emitted from the organic layer 172 to the second electrode 174 side. The first electrode 168 is manufactured to include a metal film or a metal film so as to reflect light emitted from the organic layer 172. For example, the first electrode 168 is preferably made of a metal film such as aluminum (Al) or silver (Ag) having a high light reflectance in the visible light band. In addition, the first electrode 168 is made of indium tin oxide (hereinafter also referred to as “ITO”), indium zinc oxide (hereinafter also referred to as “IZO”), zinc oxide to which aluminum is added (hereinafter referred to as “AZO”). A transparent conductive film such as zinc oxide (hereinafter also referred to as "GZO") to which gallium is added and a metal film may be stacked. The second electrode 174 is made of a transparent conductive film such as ITO, IZO, AZO, GZO or the like in order to transmit light emitted from the organic layer 172. The second electrode 174 is provided over substantially the entire surface of the display unit 112.
 封止層136は、第2電極174の上層側に設けられる。図4に示すように、封止層136は、第1無機絶縁膜178、有機樹脂膜180及び第2無機絶縁膜182が積層された構造を有していてもよい。第1無機絶縁膜178及び第2無機絶縁膜182としては、窒化シリコン膜、酸化アルミニウム膜等の無機絶縁材料が用いられる。有機樹脂膜180としては、アクリル樹脂、ポリイミド樹脂、ポリアミド樹脂、エポキシ樹脂等が用いられる。第1無機絶縁膜178及び第2無機絶縁膜182は、0.1μm~10μm、好ましくは、1μm~7μm、例えば、5μmの膜厚を有する。有機樹脂膜180は、1μm~20μm、例えば、10μmの膜厚を有する。封止層136の上面には、光学フィルム138が設けられる。光学フィルム138は、表示素子層134、駆動素子層132を保護する保護部材としての機能も有する。 The sealing layer 136 is provided on the upper layer side of the second electrode 174. As shown in FIG. 4, the sealing layer 136 may have a structure in which a first inorganic insulating film 178, an organic resin film 180, and a second inorganic insulating film 182 are stacked. As the first inorganic insulating film 178 and the second inorganic insulating film 182, an inorganic insulating material such as a silicon nitride film or an aluminum oxide film is used. As the organic resin film 180, an acrylic resin, a polyimide resin, a polyamide resin, an epoxy resin or the like is used. The first inorganic insulating film 178 and the second inorganic insulating film 182 have a thickness of 0.1 μm to 10 μm, preferably 1 μm to 7 μm, for example, 5 μm. The organic resin film 180 has a thickness of 1 μm to 20 μm, for example, 10 μm. An optical film 138 is provided on the top surface of the sealing layer 136. The optical film 138 also has a function as a protective member that protects the display element layer 134 and the drive element layer 132.
 図5は、図1に示すB1-B2線に対応する断面構造を示す。すなわち、図5は、第1領域106の一部、第3領域110、及び第2領域108の断面構造を示す。 FIG. 5 shows a cross-sectional structure corresponding to line B1-B2 shown in FIG. That is, FIG. 5 shows a cross-sectional structure of a part of the first region 106, the third region 110, and the second region 108.
 第1領域106は、コモンコンタクト122を含む。コモンコンタクト122は、画素120から延伸する第2電極174が、コモン配線160と接続する領域となる。コモン配線160は、第3絶縁層158の上に設けられる第1コモン配線160aと、第2電極174との間に介在する第2コモン配線160bとで構成されていてもよい。第1コモン配線160aは、第1配線118aを形成する導電膜と同様の導電膜で形成され、第2コモン配線160bは、発光素子144の第1電極168と同様の導電膜で形成される。 The first region 106 includes the common contact 122. The common contact 122 is a region where the second electrode 174 extending from the pixel 120 is connected to the common wiring 160. The common wire 160 may be configured by a first common wire 160 a provided on the third insulating layer 158 and a second common wire 160 b interposed between the second electrode 174. The first common wiring 160 a is formed of a conductive film similar to the conductive film forming the first wiring 118 a, and the second common wiring 160 b is formed of a conductive film similar to the first electrode 168 of the light emitting element 144.
 第1領域106は、有機絶縁材料で形成される第4絶縁層162及び第6絶縁層170は除去された開口領域184を含む。開口領域184は、第6絶縁層170が分断され、底面において第1絶縁層150、第2絶縁層154、第3絶縁層158、及び第5絶縁層166が積層された構造を有する。第1絶縁層150、第2絶縁層154、第3絶縁層158、及び第5絶縁層166は、酸化シリコン膜、窒化シリコン膜、酸窒化シリコン膜等の無機絶縁膜で形成される。開口領域184において、第6絶縁層170は分割される(第6絶縁層170a、170b)。開口領域184で分割された第6絶縁層170a、170bは、製造工程において有機樹脂膜180の堰き止め部材となり、第1無機絶縁膜178の端部まで流出することを防止する機能を有する。 The first region 106 includes an open region 184 in which the fourth insulating layer 162 and the sixth insulating layer 170 formed of an organic insulating material are removed. The opening region 184 has a structure in which the sixth insulating layer 170 is divided and the first insulating layer 150, the second insulating layer 154, the third insulating layer 158, and the fifth insulating layer 166 are stacked on the bottom surface. The first insulating layer 150, the second insulating layer 154, the third insulating layer 158, and the fifth insulating layer 166 are formed of an inorganic insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film. In the opening region 184, the sixth insulating layer 170 is divided (sixth insulating layers 170a and 170b). The sixth insulating layers 170 a and 170 b divided by the opening region 184 serve as a blocking member of the organic resin film 180 in the manufacturing process, and have a function of preventing the outflow to the end of the first inorganic insulating film 178.
 一方、封止層136を構成する有機樹脂膜180は、第6絶縁層170aを超えないように設けられる。したがって、有機樹脂膜180の端部より先の領域では、第1無機絶縁膜178及び第2無機絶縁膜182が密接して設けられる。このような構成を有することで、封止層136を構成する有機樹脂膜180は外部に露出しない構造となる。この構造により、第4絶縁層162に水分が浸入するのを防ぐことができる。第2領域108は、水分遮断領域と呼ばれることもある。 On the other hand, the organic resin film 180 forming the sealing layer 136 is provided so as not to exceed the sixth insulating layer 170 a. Therefore, in the region beyond the end of the organic resin film 180, the first inorganic insulating film 178 and the second inorganic insulating film 182 are provided in close contact. With such a configuration, the organic resin film 180 that constitutes the sealing layer 136 has a structure that is not exposed to the outside. This structure can prevent moisture from entering the fourth insulating layer 162. The second area 108 may also be referred to as a moisture blocking area.
 第1領域106は、封止樹脂139を介して光学フィルム138が設けられる。光学フィルム138の端部は、第6絶縁層170bの端と一致するか、それよりも外側に配置される。光学フィルム138が第6絶縁層170bの端部まで覆って配置されることで、表示部112は確実に保護される。 The first region 106 is provided with an optical film 138 via a sealing resin 139. The end of the optical film 138 is disposed to coincide with or outside the end of the sixth insulating layer 170 b. By arranging the optical film 138 so as to cover the end of the sixth insulating layer 170b, the display unit 112 can be protected securely.
 第1領域106において、第2絶縁層154と第3絶縁層158との間に第2配線118bが設けられる。第3絶縁層158の上層側に設けられる第3配線118cは、第2領域108に延伸される。第2領域108は、ベース部材102上に接する第1絶縁層150、第1絶縁層150上の第2絶縁層154及び第3絶縁層158が積層された構造を有する。貫通溝126はベース部材102の第1面を露出させ、これらの絶縁層124を分断する。第3配線118cは、第3絶縁層158の上面から、貫通溝126の側壁面(第1絶縁層150、第2絶縁層154、及び第3絶縁層158の側面)と、ベース部材102の第1面に接して配設される。貫通溝126をベース部材102の折り曲げ領域に設けることで、第1絶縁層150、第2絶縁層154、第3絶縁層158、及び第5絶縁層166の剥離、ひび割れが抑制される。 In the first region 106, the second wiring 118b is provided between the second insulating layer 154 and the third insulating layer 158. The third wiring 118 c provided on the upper layer side of the third insulating layer 158 is extended to the second region 108. The second region 108 has a structure in which a first insulating layer 150 in contact with the base member 102, a second insulating layer 154 on the first insulating layer 150, and a third insulating layer 158 are stacked. The through groove 126 exposes the first surface of the base member 102 and separates the insulating layers 124. The third wiring 118 c is a side wall surface of the through groove 126 (a side surface of the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158) from the upper surface of the third insulating layer 158 and the third surface of the base member 102. It is arranged in contact with one side. By providing the through groove 126 in the bent region of the base member 102, peeling and cracking of the first insulating layer 150, the second insulating layer 154, the third insulating layer 158, and the fifth insulating layer 166 are suppressed.
 貫通溝126において、第1絶縁層150及び第3絶縁層158の側面は、少なくとも1つの段差部127を有する。第1絶縁層150及び第3絶縁層158の側面に、それぞれ1つ以上の段差を有することにより、貫通溝126全体では側壁面に複数の段差が設けられる。第1絶縁層150及び第3絶縁層158のそれぞれに設けられる段差の高さは、膜厚の半分かそれ以下であることが好ましい。このような高さの段差を、それぞれの絶縁層の側面に設けることで、貫通溝126の深さ方向に対する段差の急峻性を緩和することができる。なお、第2絶縁層154は、第1絶縁層150及び第3絶縁層158と比べて膜厚が薄いため、必ずしも段差を設ける必要はない。しかしながら、貫通溝126において、第2絶縁層154の側面に段差が含まれていてもよい。また、貫通溝126は、第2絶縁層154の端部が、第3絶縁層158の端部より外側に有り、第1絶縁層150の端部より内側にあることで、第2絶縁層154自体が一つの段差を構成してもよい。 In the through groove 126, the side surfaces of the first insulating layer 150 and the third insulating layer 158 have at least one step portion 127. By providing one or more steps on the side surfaces of the first insulating layer 150 and the third insulating layer 158, a plurality of steps are provided on the side wall surface of the through groove 126 as a whole. The height of the step provided in each of the first insulating layer 150 and the third insulating layer 158 is preferably half or less of the film thickness. By providing the level | step difference of such height on the side surface of each insulating layer, the steepness of the level | step difference with respect to the depth direction of the penetration groove 126 can be relieve | moderated. Note that since the second insulating layer 154 is thinner than the first insulating layer 150 and the third insulating layer 158, it is not necessary to provide a step. However, in the through groove 126, the side surface of the second insulating layer 154 may include a step. In addition, the end of the second insulating layer 154 is on the outer side than the end of the third insulating layer 158 and the inner side of the end of the first insulating layer 150 in the through groove 126. Oneself may constitute one level difference.
 第3配線118cは、貫通溝126を横断して配置される。第3配線118cは、例えば、第1配線118aと同じ構造で形成される。第2領域108に配設される第3配線118cは、第3絶縁層158、第2絶縁層154、及び第1絶縁層150の側面に沿って配設される。貫通溝126は、側壁面に複数の段差を含む段差部127を有することで、溝の深さ(ベース部材102の表面から第3絶縁層158の上面までの高さ)の急峻性が緩和される。第3配線118cは、貫通溝126において、階段状の段差面に沿って設けられることで、断線が防止され、また後述されるように、パターニング不良による、隣接する配線との短絡が防止される。また、第2領域108においてベース部材102を曲げた場合でも、貫通溝126の端部で第3配線118cに曲げ応力が集中することを抑制することができる。 The third wiring 118 c is disposed across the through groove 126. The third wiring 118c is formed, for example, in the same structure as the first wiring 118a. The third wiring 118 c disposed in the second region 108 is disposed along the side surfaces of the third insulating layer 158, the second insulating layer 154, and the first insulating layer 150. The through groove 126 has a step portion 127 including a plurality of steps on the side wall surface, whereby the steepness of the groove depth (the height from the surface of the base member 102 to the upper surface of the third insulating layer 158) is alleviated. Ru. The third wiring 118c is provided along the step-like stepped surface in the through groove 126, whereby disconnection is prevented, and as will be described later, a short circuit with an adjacent wiring due to patterning failure is prevented. . Further, even when the base member 102 is bent in the second region 108, concentration of bending stress on the third wiring 118c at the end of the through groove 126 can be suppressed.
 第2領域108は、第3配線118cを埋設する樹脂層130が設けられる。樹脂層130は、第3配線118cの保護部材として用いられる。樹脂層130は光学フィルム138の高さを超えない厚さで設けられる。樹脂層130は、例えば、アクリル樹脂、エポキシ樹脂、ポリイミド樹脂等が用いられる。 The second region 108 is provided with a resin layer 130 in which the third wiring 118 c is embedded. The resin layer 130 is used as a protective member for the third wiring 118 c. The resin layer 130 is provided with a thickness not exceeding the height of the optical film 138. As the resin layer 130, for example, an acrylic resin, an epoxy resin, a polyimide resin, or the like is used.
 第2駆動回路116bは、例えば、ベアチップの集積回路で形成され、ベース部材102に実装される。端子部114は、第1絶縁層150、第2絶縁層154、及び第3絶縁層158が積層された構造を含み、第3絶縁層158の上面に設けられた端子電極148を含む。端子電極148は、例えば、第1端子電極層149aと第2端子電極層149bとにより形成される。第1端子電極層149aは、第3配線118cを形成する導電層と同様の導電層で形成され、第2端子電極148bは、発光素子144の第1電極168と同様の導電層で形成される。 The second drive circuit 116 b is formed, for example, of a bare chip integrated circuit and mounted on the base member 102. The terminal portion 114 includes a structure in which the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 are stacked, and includes the terminal electrode 148 provided on the upper surface of the third insulating layer 158. The terminal electrode 148 is formed of, for example, a first terminal electrode layer 149a and a second terminal electrode layer 149b. The first terminal electrode layer 149a is formed of the same conductive layer as the conductive layer forming the third wiring 118c, and the second terminal electrode 148b is formed of the same conductive layer as the first electrode 168 of the light emitting element 144. .
 図6A及び図6Bを参照して、第2領域108の詳細を説明する。図6Aは、第2領域108の平面図を示し、図中に示すC1-C2線に対応する断面構造を図6Bに示す。第1領域106は、第1絶縁層150、第2絶縁層154、及び第3絶縁層158が積層された領域と、これらの絶縁層が除去された貫通溝126を有する。 The details of the second area 108 will be described with reference to FIGS. 6A and 6B. 6A shows a plan view of the second region 108, and FIG. 6B shows a cross-sectional structure corresponding to line C1-C2 shown in the drawing. The first region 106 has a region in which the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 are stacked, and the through groove 126 from which the insulating layer is removed.
 貫通溝126は、第1絶縁層150、第2絶縁層154、及び第3絶縁層158が除去され、ベース部材102が露出する底面129と、第1絶縁層150、第2絶縁層154、及び第3絶縁層158の各層の側面が露出する側壁面128とを有する。側壁面128は、段差部127を有する。段差部127は、少なくとも、第1絶縁層150と第3絶縁層158の側面に形成された段差によって形成される。このため、段差部127は、複数の段差が、階段状に設けられる。第3配線118cは、第3絶縁層158の上面から、側壁面128及び底面129に沿って、貫通溝126を横断するように配設される。 In the through groove 126, the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 are removed, and the bottom surface 129 where the base member 102 is exposed, the first insulating layer 150, the second insulating layer 154, and And a side wall surface 128 on which the side surface of each layer of the third insulating layer 158 is exposed. Side wall surface 128 has a stepped portion 127. The stepped portion 127 is formed by at least steps formed on the side surfaces of the first insulating layer 150 and the third insulating layer 158. For this reason, in the step portion 127, a plurality of steps are provided in a step-like manner. The third wiring 118 c is disposed to cross the through groove 126 from the top surface of the third insulating layer 158 along the side wall surface 128 and the bottom surface 129.
 なお、図6Bは、第1絶縁層150と第3絶縁層158に、それぞれ1段の段差が設けられる態様を示すが、本実施形態はこれに限定されず、各絶縁層の側面に複数の段差が設けられていてもよい。また、第2絶縁層154は、第1絶縁層150及び第3絶縁層158と比べて膜厚が小さいため段差部が設けられていないが、第2絶縁層154においても少なくとも一つの段差部が設けられていてもよい。また、第2絶縁層154の端部を、第3絶縁層158の外側であって、第1絶縁層150の端部より内側に配置することで、第2絶縁層154が段差の一部を形成するようにしてもよい。 Although FIG. 6B shows an aspect in which one step is provided in each of the first insulating layer 150 and the third insulating layer 158, the present embodiment is not limited to this, and a plurality of side surfaces of each insulating layer are provided. A level difference may be provided. Further, although the second insulating layer 154 is smaller in thickness than the first insulating layer 150 and the third insulating layer 158, no stepped portion is provided, but at least one stepped portion is also provided in the second insulating layer 154. It may be provided. In addition, by disposing the end of the second insulating layer 154 outside the third insulating layer 158 and inside the end of the first insulating layer 150, the second insulating layer 154 can partially form a step. It may be formed.
 図6Bに示すように、貫通溝126の側壁面に複数の段差部が設けられることにより、1段当たりの段差の高さ(高低差)は小さくなる。このような形態により、第3配線は、段段差被覆性が改善され、膜厚の均一化、線幅の均一化を図ることができる。 As shown in FIG. 6B, by providing the plurality of step portions on the side wall surface of the through groove 126, the height (difference in height) of the step per step is reduced. With such a configuration, the step coverage with the third wiring can be improved, and film thickness uniformity and line width uniformity can be achieved.
 図6Bに示すような、段差部127を有する貫通溝126は絶縁層をエッチング加工することで作製される。第1絶縁層150、第2絶縁層154、及び第3絶縁層158が積層された構造において、貫通溝126を形成するには、フォトリソグラフィ工程によってレジストマスクを形成する必要がある。この場合において、貫通溝126の側壁面128に段差を設けるには、多階調露光法を用い、段差部に対応して膜厚の異なるレジストマスクを形成することで、工程数の増加を防止することができる。 A through groove 126 having a step portion 127 as shown in FIG. 6B is manufactured by etching an insulating layer. In the structure in which the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 are stacked, in order to form the through groove 126, it is necessary to form a resist mask by a photolithography process. In this case, in order to provide the step on the side wall surface 128 of the through groove 126, the increase in the number of steps is prevented by using multi-tone exposure to form resist masks having different film thicknesses corresponding to the step. can do.
 多階調露光法では、多階調フォトマスクが用いられる。多階調フォトマスクには、ガラス基板に形成されるマスクパターンとして、露光機の解像度以下のスリットを設け、そのスリットが光の一部を遮って中間露光を実現するグレイトーンマスクと、半透過膜を利用して中間露光を実現するハーフトーンマスクが知られているが、本実施形態においては、双方の多階調フォトマスクを用いることができる。多階調フォトマスクを使用して露光することで、フォトレジスト膜には露光部分、中間露光部分、未露光部分の領域が形成され、膜厚を異ならせることができる。 In the multi-tone exposure method, a multi-tone photomask is used. A multi-tone photomask is provided with a slit equal to or lower than the resolution of the exposure machine as a mask pattern formed on a glass substrate, and the slit blocks a part of light to realize intermediate exposure, Although a halftone mask is known that uses a film to realize an intermediate exposure, in the present embodiment, both multi-tone photomasks can be used. By performing exposure using a multi-gradation photomask, areas of an exposed portion, an intermediate exposed portion, and an unexposed portion are formed on the photoresist film, and the film thickness can be made different.
 図7は、貫通溝126を形成する際に、多階調フォトマスク186を用いて、第1領域106にレジストマスク190を形成する態様を示す。多階調フォトマスク186のマスクパターン187は、段差部127の形態に合わせて光の透過率が異なるように設計されている。多階調フォトマスク186を用いてレジスト膜188を露光することで、露光量の異なる複数の領域が形成される。その後、レジスト膜188を現像することで、段差部127の領域に対応して膜厚の異なるレジストマスク190が形成される。具体的には、第3絶縁層158の段差形状に対応して、薄膜領域と厚膜領域とを有するレジストマスク190が形成される。このようなレジストマスク190を用い、第3絶縁層158をエッチングすることで、第3絶縁層158の側面に段差を形成することができる。第3絶縁層158は、酸化シリコン膜、窒化シリコン膜で形成されるので、これらの無機絶縁膜を連続的にエッチングするには、ドライエッチングを用いることが好ましい。ドライエッチングでは、エッチングガスとして、四フッ化炭素(CF4)、三フッ化メタン(CHF3)等のガスを用い、異方性エッチングを行うことが好ましい。なお、第1絶縁層150についても、同様にして段差部を形成することができる。 FIG. 7 shows an aspect in which a resist mask 190 is formed in the first region 106 using the multi-tone photomask 186 when forming the through groove 126. The mask pattern 187 of the multi-tone photomask 186 is designed to have different light transmittances in accordance with the form of the stepped portion 127. By exposing the resist film 188 using the multi-tone photomask 186, a plurality of regions with different exposure amounts are formed. Thereafter, the resist film 188 is developed to form resist masks 190 having different film thicknesses corresponding to the regions of the stepped portions 127. Specifically, a resist mask 190 having a thin film region and a thick film region corresponding to the step shape of the third insulating layer 158 is formed. By etching the third insulating layer 158 using such a resist mask 190, a step can be formed on the side surface of the third insulating layer 158. Since the third insulating layer 158 is formed of a silicon oxide film or a silicon nitride film, it is preferable to use dry etching to etch these inorganic insulating films continuously. In dry etching, anisotropic etching is preferably performed using a gas such as carbon tetrafluoride (CF 4 ) or methane trifluoride (CHF 3 ) as an etching gas. A stepped portion can be similarly formed for the first insulating layer 150 as well.
 貫通溝126は、第1絶縁層150、第2絶縁層154、及び第3絶縁層158をエッチングすることで作製される。この工程において、多階調露光法を適用することで、1枚のフォトマスクを用いるだけで貫通溝126の側壁面128に複数の段差を設けることができる。多階調露光法では、多階調フォトマスクが用いられる。多階調フォトマスクには、ガラス面に形成されるマスクパターンとして、露光機の解像度以下のスリットを設け、そのスリットが光の一部を遮って中間露光を実現するグレイトーンマスクと、半透過膜を利用して中間露光を実現するハーフトーンマスクが知られているが、本実施形態においては、双方の多階調フォトマスクを用いることができる。多階調フォトマスクを使用して露光することで、フォトレジスト膜には露光部分、中間露光部分、未露光部分の領域が形成され、膜厚を異ならせることができる。 The through groove 126 is formed by etching the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158. In this process, by applying the multi-gradation exposure method, a plurality of steps can be provided on the side wall surface 128 of the through groove 126 only by using a single photomask. In the multi-tone exposure method, a multi-tone photomask is used. A multi-tone photomask is provided with a slit equal to or less than the resolution of the exposure machine as a mask pattern formed on a glass surface, and the slit blocks a part of light to realize intermediate exposure, Although a halftone mask is known that uses a film to realize an intermediate exposure, in the present embodiment, both multi-tone photomasks can be used. By performing exposure using a multi-gradation photomask, areas of an exposed portion, an intermediate exposed portion, and an unexposed portion are formed on the photoresist film, and the film thickness can be made different.
 なお、貫通溝126における側壁面128の形態は、図6A及び図6Bに示すものに限定されない。例えば、図8に示すように、第1絶縁層150、第2絶縁層154、及び第3絶縁層158の側面は略垂直に設けられていてもよい。側壁面128は、垂直に立設されていても、複数の段差部127を含むことにより1段当たりの高さが緩和され、第1領域106に配設される第3配線118cの不良を防止することができる。 In addition, the form of the side wall surface 128 in the penetration groove 126 is not limited to what is shown to FIG. 6A and 6B. For example, as shown in FIG. 8, the side surfaces of the first insulating layer 150, the second insulating layer 154, and the third insulating layer 158 may be provided substantially vertically. Even if the side wall surface 128 is erected vertically, the height per step is mitigated by including the plurality of step portions 127, and the defect of the third wiring 118c disposed in the first region 106 is prevented. can do.
 本実施形態によれば、表示装置100を折り曲げる領域に下地絶縁膜及び層間絶縁膜が除去された貫通溝126を設けることで、これらの絶縁膜の剥離及びひび割れを防止することができる。この場合において、貫通溝126の側面に複数の段差を設けることで、貫通溝126を横断する配線の剥離、断線を防止することができる。 According to the present embodiment, peeling and cracking of the insulating film can be prevented by providing the through groove 126 from which the base insulating film and the interlayer insulating film are removed in the region where the display device 100 is bent. In this case, by providing a plurality of steps on the side surface of the through groove 126, it is possible to prevent peeling and disconnection of the wiring crossing the through groove 126.
第2実施形態:
 本実施形態は、表示装置100の製造方法の一例を示す。なお、本実施形態において、表示装置100は、第1実施形態で示されるものと同様の構成を有している。なお、本実施形態の説明において、図9A、図10A、図12A、図13A、及び図10Aは、画素120の断面に対応する構造を示し、図9B、図10B、図12B、図13B、及び図10Bは、第1領域106の一部及び第2領域108に対応する構造を示す。
Second embodiment:
The present embodiment shows an example of a method of manufacturing the display device 100. In the present embodiment, the display device 100 has the same configuration as that shown in the first embodiment. 9A, 10A, 12A, 13A, and 10A show structures corresponding to the cross section of the pixel 120 in the description of this embodiment, and FIGS. 9B, 10B, 12B, 13B, and 13B. FIG. 10B shows a structure corresponding to a part of the first region 106 and the second region 108.
 図9A及び図9Bは、画素120にトランジスタ142が形成され、第1領域106に第2配線118bが形成された段階を示す。第3絶縁層158の上には、多階調マスク(ハーフトーンマスク)を用いて、第1レジストマスク190aが形成される。第1レジストマスク190aは、第3絶縁層及び第2絶縁層154を加工するためのパターンが形成される。具体的に第1レジストマスク190aは、画素120の領域において半導体層152に形成されるソース領域及びドレイン領域に達するコンタクトホールを形成するための第1開口パターン192aと、第2領域108において貫通溝126を形成するための第2開口パターン192bと、を有する。第1レジストマスク190aは、第2開口パターン192bの内側領域が、他の領域に比べてレジスト膜厚が薄くなるように形成される。このような第1レジストマスク190aの形態は、例えば、ポジ型レジストをベース部材102の上に塗布し、第2開口パターン192bの内側領域の露光量が、内側の抜き領域の露光量に比べて減少するように、多階調フォトマスク(ハーフトーンマスク)を用いて露光することにより作製される。 9A and 9B illustrate stages in which the transistor 142 is formed in the pixel 120 and the second wiring 118b is formed in the first region 106. A first resist mask 190 a is formed on the third insulating layer 158 using a multi-tone mask (halftone mask). The first resist mask 190 a has a pattern for processing the third insulating layer and the second insulating layer 154. Specifically, the first resist mask 190a has a first opening pattern 192a for forming a contact hole reaching the source region and the drain region formed in the semiconductor layer 152 in the region of the pixel 120, and a through groove in the second region 108. And a second opening pattern 192 b for forming the first electrode 126. The first resist mask 190a is formed such that the inner region of the second opening pattern 192b has a thinner resist film thickness than the other regions. Such a form of the first resist mask 190a is, for example, applying a positive resist on the base member 102, and the exposure amount of the inner region of the second opening pattern 192b is smaller than the exposure amount of the inner removal region. It is fabricated by exposure using a multi-tone photomask (halftone mask) so as to decrease.
 図10A及び図10Bは、第1レジストマスク190aにより、画素120において、第3絶縁層158及び第2絶縁層154を貫通するコンタクトホール167aが形成され、第2領域108において、第3絶縁層158を貫通し第2配線118bを露出させるコンタクトホール167b、及び貫通溝126の領域で第3絶縁層158及び第2絶縁層154が除去された構造が形成された態様を示す。第2領域108は、多階調フォトマスクで第1レジストマスク190aが形成されたことにより、第3絶縁層158の側面部に段差が形成される。 10A and 10B, the contact hole 167a penetrating the third insulating layer 158 and the second insulating layer 154 is formed in the pixel 120 by the first resist mask 190a, and the third insulating layer 158 is formed in the second region 108. And the third insulating layer 158 and the second insulating layer 154 are removed in the region of the through hole 126 and the contact hole 167b for exposing the second wiring 118b. In the second region 108, a step is formed on the side surface portion of the third insulating layer 158 by forming the first resist mask 190a using a multi-tone photomask.
 図11A及び図11Bは、第3絶縁層158上に第2レジストマスク190bが形成された態様を示す。画素120は全面が第2レジストマスク190bで覆われ、第2領域108は、貫通溝126に対応する領域に、第1レジストマスク190aと同様に、第3開口パターン192cの内側領域に、レジスト膜厚が薄くなる領域が形成される。第2レジストマスク190bを用いて、ベース部材102の表面が露出するまで第1絶縁層150のエッチングを行う。 11A and 11B illustrate an embodiment in which the second resist mask 190 b is formed on the third insulating layer 158. The entire surface of the pixel 120 is covered with the second resist mask 190b, and the second region 108 is a resist film in the region corresponding to the through groove 126, like the first resist mask 190a, in the inner region of the third opening pattern 192c. An area of reduced thickness is formed. The first insulating layer 150 is etched using the second resist mask 190 b until the surface of the base member 102 is exposed.
 図12A及び図12Bは、第2領域108に貫通溝126が形成された状態を示す。画素120は、多階調露光法が適用されないため、第3絶縁層158に通常の形態でコンタクトホール167aが形成される。第2領域108は、2回の多階調露光により、第3絶縁層158と第1絶縁層150のそれぞれに段差が形成される。すなわち、貫通溝126は、側壁面128に複数の段差が形成される。 12A and 12B show a state in which the through groove 126 is formed in the second region 108. FIG. In the pixel 120, the multi-tone exposure method is not applied, so the contact hole 167a is formed in the third insulating layer 158 in a normal form. In the second region 108, a step is formed in each of the third insulating layer 158 and the first insulating layer 150 by two-time multi-tone exposure. That is, in the through groove 126, a plurality of steps are formed on the side wall surface 128.
 図13Aは、画素120に第1配線118aが形成される態様を示し、図13Bは、第1領域106に第1コモン配線160aが形成され、第2領域108に第3配線118cが形成される段階を示す。第1配線118a、第1コモン配線160a、及び第3配線118cは、第3絶縁層158上に導電膜を形成し、フォトリソグラフィ工程を経て、当該導電膜をパターニングすることで作製される。第3配線118cを形成する第3レジストマスク190cを形成する場合、貫通溝126の側壁面128は複数の段差を有するため、段差部が無い場合に比べ1段当たりの段差の高さが低くされている。これにより、貫通溝126の側壁面128においてもフォトレジストが十分に露光され、露光不足によりレジストが残存することが防止される。これにより、第2領域108に、第3配線118cを複数本並置する場合においても、隣接する配線間の短絡が防止される。すなわち、隣接する配線同士の短絡不良が防止され、製造歩留まりの向上を図ることができる。 13A shows an aspect in which the first wiring 118a is formed in the pixel 120, and FIG. 13B shows that the first common wiring 160a is formed in the first region 106, and the third wiring 118c is formed in the second region 108. Indicates the stage. The first wiring 118a, the first common wiring 160a, and the third wiring 118c are formed by forming a conductive film over the third insulating layer 158 and patterning the conductive film through a photolithography process. When the third resist mask 190c for forming the third interconnection 118c is formed, the side wall surface 128 of the through groove 126 has a plurality of steps, so the height of the step per step is reduced compared to the case where there is no step. ing. Thereby, the photoresist is sufficiently exposed also on the side wall surface 128 of the through groove 126, and the resist is prevented from remaining due to the insufficient exposure. As a result, even when a plurality of third wires 118c are juxtaposed in the second region 108, a short circuit between adjacent wires is prevented. That is, short circuit defects between adjacent wirings can be prevented, and the manufacturing yield can be improved.
 図14A及び図14Bは、第1配線118a、第1コモン配線160a、及び第3配線118cを形成した後、第4絶縁層162、容量電極164、第5絶縁層166、第1電極168、第2コモン配線160b、第6絶縁層170、有機層172、及び第2電極174を形成する段階を示す。第2領域108においては、第4絶縁層162及びそれより上層側に設けられる層が全て除去される。第2領域108は、側壁面128に複数の段差が設けられるため、第3配線118cは、第1領域106内に形成される第1配線118aと同じ部材(同じ導電膜)によって形成可能とされる。さらに、封止層136、光学フィルム138、樹脂層130等を設ければ、図5、図6A、及び図6Bで示す表示装置100が作製される。 14A and 14B, after forming the first wiring 118a, the first common wiring 160a, and the third wiring 118c, the fourth insulating layer 162, the capacitor electrode 164, the fifth insulating layer 166, the first electrode 168, the A step of forming the two common wires 160b, the sixth insulating layer 170, the organic layer 172, and the second electrode 174 is shown. In the second region 108, all of the fourth insulating layer 162 and the layers provided thereabove are removed. Since the second region 108 is provided with a plurality of steps on the side wall surface 128, the third wiring 118c can be formed by the same member (the same conductive film) as the first wiring 118a formed in the first region 106. Ru. Furthermore, when the sealing layer 136, the optical film 138, the resin layer 130, and the like are provided, the display device 100 shown in FIGS. 5, 6A, and 6B is manufactured.
 本実施形態によれば、多階調フォトマスク(ハーフトーン)マスクを用いることで、工程数を大幅に増加させることなく、貫通溝126を形成することができ、かつ貫通溝126の側壁面128に複数の段差を設けることができる。この場合において、第2領域108で、フォトリソグラフィ工程によって配線パターンを露光する際に、段差部が設けられていることで、確実にフォトレジストを露光することができる。段差部の高さが高い場合は、フォトリソグラフィ工程において、段差部分を十分に露光することができず、段差部分にレジスト膜が残ってしまうことが問題となる。このような状況で配線パターンを加工すると、パターニング不良が発生し、隣接する配線同士が短絡するという不良が発生する。しかしながら、本実施形態によれば、貫通溝126の側壁面128に複数の段差部を設けることで、パターニング不良を解消することができる。 According to the present embodiment, by using the multi-tone photomask (halftone) mask, the through groove 126 can be formed without significantly increasing the number of steps, and the sidewall surface 128 of the through groove 126 can be formed. Can have a plurality of steps. In this case, when the wiring pattern is exposed in the second region 108 by the photolithography process, the photoresist can be reliably exposed because the stepped portion is provided. When the height of the step portion is high, the step portion can not be sufficiently exposed in the photolithography step, and the resist film remains in the step portion. When the wiring pattern is processed in such a situation, a patterning failure occurs, and a failure occurs in which adjacent wirings are short-circuited. However, according to the present embodiment, patterning defects can be eliminated by providing the plurality of step portions on the side wall surface 128 of the through groove 126.
第3実施形態:
 図15は、本実施形態に係る表示装置100の貫通溝126の形態を示す。図15に示すように、貫通溝126は、底面129と側壁面128とを含む。側壁面128は、第3絶縁層158に段差が設けられている。一方、第1絶縁層150は、段差が設けられておらず、上方に開く傾斜した側面(テーパ状の側面)を有する。
Third embodiment:
FIG. 15 shows a form of the through groove 126 of the display device 100 according to the present embodiment. As shown in FIG. 15, the through groove 126 includes a bottom surface 129 and a side wall surface 128. The side wall surface 128 is provided with a step in the third insulating layer 158. On the other hand, the first insulating layer 150 is not provided with a step, and has an inclined side (a tapered side) which opens upward.
 貫通溝126を形成するに当たり、第3絶縁層158及び第2絶縁層154は第2実施形態と同様に多階調フォトマスク(ハーフトーンマスク)を用いてレジストマスクを設け、ドライエッチングにより加工を行う。この工程では、第1領域106におけるコンタクトホールの形成も同時に行われるため、ドライエッチングで精密に加工することが好ましい。 In forming the through groove 126, the third insulating layer 158 and the second insulating layer 154 are provided with a resist mask using a multi-gradation photomask (halftone mask) as in the second embodiment, and are processed by dry etching. Do. In this process, since the formation of the contact hole in the first region 106 is also performed simultaneously, it is preferable to process precisely by dry etching.
 図16に示すように、第1絶縁層150の加工は、通常のフォトマスクを用いてレジストマスク190dを設け、ウェットエッチングにより行われる。ウェットエッチングは、アンダーカットを形成することで、第1絶縁層150の側面に傾斜角を持たせることが可能となる。例えば、第1絶縁層150を加工するに際し、レジストマスク190dの密着性を低下させ、アンダーカットが促進されるようにしてウェットエッチングを行ってもよい。また、第1絶縁層150の密度を膜厚方向で異ならせ(具体的には、ベース部材102側の密度に対し、レジストマスク190dとの境界面側の密度を低下させる。)、ウェットエッチングを行うことで、アンダーカットが促進される。第1絶縁層150の側面の傾斜角は15°~80°、好ましくは30°~60°の範囲とされる。 As shown in FIG. 16, the processing of the first insulating layer 150 is performed by wet etching by providing a resist mask 190 d using a normal photomask. In wet etching, the side surfaces of the first insulating layer 150 can have an inclination angle by forming an undercut. For example, when processing the first insulating layer 150, the adhesion of the resist mask 190d may be reduced and wet etching may be performed so as to promote undercut. In addition, the density of the first insulating layer 150 is made different in the film thickness direction (specifically, the density on the boundary surface with the resist mask 190 d is reduced with respect to the density on the base member 102 side), and wet etching is performed. Doing so promotes undercutting. The inclination angle of the side surface of the first insulating layer 150 is in the range of 15 ° to 80 °, preferably 30 ° to 60 °.
 このように、第1絶縁層150の側面を傾斜させることによっても、貫通溝126の段差を緩和することができる。特に、第1絶縁層150の側面を傾斜面とすることで、第3配線118cが、貫通溝126の底面129から側壁面128へ立ち上がる部位において、段差の急峻性を緩和することができる。 Thus, the step of the through groove 126 can be relaxed also by inclining the side surface of the first insulating layer 150. In particular, by setting the side surface of the first insulating layer 150 as the inclined surface, the steepness of the step can be alleviated at the portion where the third wiring 118c rises from the bottom surface 129 of the through groove 126 to the side wall surface 128.
 第1絶縁層150をウェットエッチングで加工することで、ベース部材102がエッチングされることを防止することができ、第1絶縁層150の下面がアンダーカットされるのを防止することができる。それにより、第3配線118cの断線を防止することができる。また、第1絶縁層150をウェットエチングに変更することで、多階調フォトマスク(ハーフトーンマスク)を用いる必要がなく、フォトマスクの費用を削減することができる。 By processing the first insulating layer 150 by wet etching, etching of the base member 102 can be prevented, and undercutting of the lower surface of the first insulating layer 150 can be prevented. Thereby, disconnection of the third wiring 118c can be prevented. Further, by changing the first insulating layer 150 to wet etching, it is not necessary to use a multi-tone photomask (halftone mask), and the cost of the photomask can be reduced.
100・・・表示装置、102・・・ベース部材、104・・・支持部材、106・・・第1領域、108・・・第2領域、110・・・第3領域、112・・・表示部、114・・・端子部、116・・・駆動回路、118・・・配線、120・・・画素、122・・・コモンコンタクト、124・・・絶縁層、126・・・貫通溝、127・・・段差部、128・・・側壁面、129・・・底面、130・・・樹脂層、132・・・駆動素子層、134・・・表示素子層、136・・・封止層、138・・・光学フィルム、139・・・封止樹脂、140・・・開口部、142・・・トランジスタ、144・・・発光素子、146・・・容量素子、148・・・端子電極、149・・・端子電極層、150・・・第1絶縁層、152・・・半導体層、154・・・第2絶縁層、156・・・ゲート電極、158・・・第3絶縁層、160・・・コモン配線、162・・・第4絶縁層、164・・・容量電極、166・・・第5絶縁層、167・・・コンタクトホール、168・・・第1電極、170・・・第6絶縁層、172・・・有機層、174・・・第2電極、178・・・第1無機絶縁膜、180・・・有機樹脂膜、182・・・第2無機絶縁膜、184・・・開口領域、186・・・多階調フォトマスク、187・・・マスクパターン、188・・・レジスト膜、190・・・レジストマスク、192・・・開口パターン 100: display device 102: base member 104: support member 106: first region 108: second region 110: third region 112: display Portions 114: Terminal portions 116: Drive circuits 118: Wirings 120: Pixels 122: Common contacts 124: Insulating layers 126: Through grooves 127 · · · Stepped portion, 128 · · · side wall surface, 129 · · · bottom surface · 130 · · · resin layer, 132 · · · drive element layer, 134 · · · display element layer, 136 · · · sealing layer, 138: optical film, 139: sealing resin, 140: opening, 142: transistor, 144: light emitting element, 146: capacitive element, 148: terminal electrode, 149 ... terminal electrode layer, 150 ... first insulating layer, 152 ... Semiconductor layer, 154: second insulating layer, 156: gate electrode, 158: third insulating layer, 160: common wiring, 162: fourth insulating layer, 164: capacitance electrode 166: fifth insulating layer 167: contact hole 168: first electrode 170: sixth insulating layer 172: organic layer 174: second electrode 178 ... First inorganic insulating film, 180 ... Organic resin film, 182 ... Second inorganic insulating film, 184 ... Opening area, 186 ... Multi-tone photomask, 187 ... Mask pattern , 188: resist film, 190: resist mask, 192: opening pattern

Claims (10)

  1.  第1面及び前記第1面と反対側の第2面とを有するベース部材と、
     前記ベース部材の前記第1面に配置された表示部を含む第1領域と、
     前記ベース部材の前記第1面に配設された配線を含む第2領域と、
     前記ベース部材の前記第1面に配置された端子部と、前記表示部にデータ信号を出力する駆動回路と、を含む第3領域と、
     前記ベース部材の前記第1面に、前記第1領域及び前記第2領域に亘って配設される絶縁層と、
    を有し、
     前記絶縁層は、前記第2領域において、前記表示部に沿って設けられ、前記ベース部材を露出させる底面と、複数の段差を含む側壁面と、を有する貫通溝を有し、
     前記配線は、前記貫通溝と交差して配置される
    ことを特徴とする表示装置。
    A base member having a first surface and a second surface opposite to the first surface;
    A first region including a display portion disposed on the first surface of the base member;
    A second region including a wire disposed on the first surface of the base member;
    A third region including a terminal portion disposed on the first surface of the base member, and a drive circuit outputting a data signal to the display portion;
    An insulating layer disposed over the first area and the second area on the first surface of the base member;
    Have
    The insulating layer has a through groove having a bottom surface which is provided along the display portion and exposes the base member in the second region, and a side wall surface including a plurality of steps.
    The display device is characterized in that the wiring intersects the through groove.
  2.  前記絶縁層は、前記ベース部材に接する第1絶縁層と、前記第1絶縁層上の第2絶縁層と、前記第2絶縁層上の第3絶縁層と、を含む、請求項1に記載の表示装置。 The said insulating layer is a 1st insulating layer which contact | connects the said base member, The 2nd insulating layer on the said 1st insulating layer, The 3rd insulating layer on the said 2nd insulating layer is described in Claim 1 Display device.
  3.  前記貫通溝は、前記第1絶縁層と、前記第3絶縁層と、のそれぞれの側壁面で少なくとも1つの段差を含む、請求項2に記載の表示装置。 The display device according to claim 2, wherein the through groove includes at least one level difference on each side wall surface of the first insulating layer and the third insulating layer.
  4.  前記貫通溝は、前記第1絶縁層の側壁面が傾斜面を有し、前記第3絶縁層の側壁面に一つ又は複数の段差部を含む、請求項2に記載の表示装置。 The display device according to claim 2, wherein the side wall surface of the first insulating layer has an inclined surface, and the through groove has one or more stepped portions on the side wall surface of the third insulating layer.
  5.  前記貫通溝は、側壁面に階段状の段差を有する、請求項1に記載の表示装置。 The display device according to claim 1, wherein the through groove has a step-like step on a side wall surface.
  6.  前記第1絶縁層及び前記第3絶縁層のそれぞれの段差の高さは、前記前記第1絶縁層及び前記第3絶縁層のそれぞれの膜厚の半分以下である、請求項3に記載の表示装置。 The display according to claim 3, wherein the height of each step of the first insulating layer and the third insulating layer is equal to or less than half the thickness of each of the first insulating layer and the third insulating layer. apparatus.
  7.  前記第1絶縁層、前記第2絶縁層、及び前記第3絶縁層が、無機絶縁膜である、請求項2に記載の表示装置。 The display device according to claim 2, wherein the first insulating layer, the second insulating layer, and the third insulating layer are inorganic insulating films.
  8.  前記第2領域は、前記配線を覆う樹脂層を含む、請求項1に記載の表示装置。 The display device according to claim 1, wherein the second region includes a resin layer covering the wiring.
  9.  前記ベース部材は、可撓性を有する、請求項1に記載の表示装置。 The display device according to claim 1, wherein the base member is flexible.
  10.  前記ベース部材は、前記貫通溝で前記第2面側に折り曲げられている、請求項9に記載の表示装置。 The display device according to claim 9, wherein the base member is bent to the second surface side by the through groove.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111627973A (en) * 2020-06-09 2020-09-04 京东方科技集团股份有限公司 Display substrate, preparation method thereof and display device

Families Citing this family (2)

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CN115428059A (en) 2020-04-20 2022-12-02 夏普株式会社 Display device and method for manufacturing display device
CN116438943A (en) * 2020-11-30 2023-07-14 夏普株式会社 Display device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140217373A1 (en) * 2013-02-01 2014-08-07 Lg Display Co., Ltd. Flexible display substrate, flexible organic light emitting display device and method for manufacturing the same
US20140232956A1 (en) * 2013-02-15 2014-08-21 Lg Display Co., Ltd. Flexible organic light emitting display device and method for manucaturing the same
US20170040406A1 (en) * 2015-08-06 2017-02-09 Samsung Display Co., Ltd. Flexible display device and manufacturing method thereof
US20170194411A1 (en) * 2015-12-31 2017-07-06 Lg Display Co., Ltd. Electronic device with flexible display panel

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140217373A1 (en) * 2013-02-01 2014-08-07 Lg Display Co., Ltd. Flexible display substrate, flexible organic light emitting display device and method for manufacturing the same
US20140232956A1 (en) * 2013-02-15 2014-08-21 Lg Display Co., Ltd. Flexible organic light emitting display device and method for manucaturing the same
US20170040406A1 (en) * 2015-08-06 2017-02-09 Samsung Display Co., Ltd. Flexible display device and manufacturing method thereof
US20170194411A1 (en) * 2015-12-31 2017-07-06 Lg Display Co., Ltd. Electronic device with flexible display panel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111627973A (en) * 2020-06-09 2020-09-04 京东方科技集团股份有限公司 Display substrate, preparation method thereof and display device
CN111627973B (en) * 2020-06-09 2022-12-09 京东方科技集团股份有限公司 Display substrate, preparation method thereof and display device

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