WO2019056299A1 - 一种零压降电流测量的电路 - Google Patents

一种零压降电流测量的电路 Download PDF

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WO2019056299A1
WO2019056299A1 PCT/CN2017/102924 CN2017102924W WO2019056299A1 WO 2019056299 A1 WO2019056299 A1 WO 2019056299A1 CN 2017102924 W CN2017102924 W CN 2017102924W WO 2019056299 A1 WO2019056299 A1 WO 2019056299A1
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circuit
voltage drop
current
zero
resistor
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PCT/CN2017/102924
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English (en)
French (fr)
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潘志浪
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深圳传音通讯有限公司
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Priority to PCT/CN2017/102924 priority Critical patent/WO2019056299A1/zh
Publication of WO2019056299A1 publication Critical patent/WO2019056299A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof

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  • the invention relates to the field of current measurement, in particular to a circuit for measuring zero voltage drop current.
  • Current is one of the most basic physical quantities. Current is often measured as a basic parameter of a circuit in a circuit, and methods and circuits for measuring current are also various.
  • the current measurement currents mainly have the following three schemes:
  • the first type use a sampling resistor to string into the circuit to be tested, measure the voltage on the sampling resistor, and then calculate the current according to Ohm's law.
  • a load is connected to the circuit, and a sampling resistor Rs is connected in series in the circuit.
  • One end of the sampling resistor is grounded, and the other end is connected with a voltmeter.
  • One end of the voltmeter is connected to the sampling resistor Rs.
  • the power supply U measured by the voltmeter is the voltage of the sampling resistor Rs; and the current flowing through the sampling resistor Rs is I, and the current of the sampling resistor Rs can be calculated according to Ohm's law.
  • the second type use a shunt to connect the ammeter to the circuit to be tested, and divide the current value measured by the ammeter by the shunt ratio to calculate the total current.
  • a load and a shunt resistor are connected to the circuit to be tested, and the ammeter is connected in parallel with the shunt resistor.
  • the current flowing through the ammeter is I A
  • the current flowing through the load is recorded as I, according to the current.
  • the size of each resistor in the parallel circuit calculate the shunt ratio, and calculate the total current through the shunt ratio and current of the ammeter, then the current I of the load.
  • the first method is mainly used for digital multimeters
  • the second method is mainly used for pointer tables or some large current measuring circuits.
  • the current meter we use (the first method and the second method) is not a complete zero due to the existence of the sampling resistor or shunt.
  • the current meter of the resistor so that no additional voltage drop is caused by the stringing into the circuit.
  • the internal sampling resistance of the meter is 33m ⁇ .
  • the internal resistance of the whole table in the current range is more than 300m ⁇ , so that the voltage drop can reach about 0.6V when the current is 2A.
  • This voltage drop affects the measurement in many cases. For example, measuring the current of a 5V power supply charging system for a mobile phone is equivalent to reducing the power supply voltage to 4.4V, which causes the measurement current to be much smaller than the normal value.
  • the third type According to the principle of electromagnetic induction, a magnetic field is generated outside the energized wire, and the magnitude of the magnetic field is measured by the Hall sensor to calculate the current.
  • a load is connected to the circuit to be tested, and the current flowing through the load is recorded as I, and a Hall sensor is also disposed in the circuit to be tested, and the Hall sensor is connected with an amplification and compensation circuit, and A voltmeter is connected to the output of the amplification and compensation circuit.
  • the third method is mainly used for clamp meter or current probe.
  • the third method is the non-contact measurement method, which does not introduce line loss, but this method also has a problem. Due to the existence of natural magnetic field, the accuracy of measuring small currents of several amperes is relatively low, so most of the meter or current probe ranges are Ten amps or even 100 amps or more, the actual accuracy is not high, and the precision of the clamp or the current probe is slightly cheaper.
  • the object of the present invention is to provide a circuit for measuring zero voltage drop current, which is connected with an integral operation circuit and a control voltage drop circuit in a circuit to be tested, and controls the voltage drop of the MOS tube in the voltage drop circuit through the negative feedback of the integral operation circuit.
  • the present invention provides a zero voltage drop current measuring circuit, which comprises:
  • circuit to be tested which is provided with a load and a power supply for supplying the load; the circuit to be tested measures a current of the load;
  • An arithmetic circuit connected to the circuit to be tested; the arithmetic circuit detects an operational amplifier detection voltage difference between a connection point thereof and the circuit to be tested;
  • Controlling a voltage drop circuit which is respectively connected to the circuit to be tested and the operation circuit; the control voltage drop circuit is provided with a field effect transistor; and the signal feedback of the output of the output end of the operation circuit is used to control the field of the control voltage drop circuit
  • the voltage drop across the effect tube causes the voltage difference between the current input and output of the load to be zero or greater than zero.
  • the operation circuit is an integral operation circuit
  • the operational amplifier detects a voltage difference integral as a negative feedback signal at the output of the operational circuit.
  • the integral operation circuit is provided with a first resistor, a second resistor, a capacitor, and an operational amplifier;
  • the first resistor is connected to the VEE terminal of the operational amplifier; one end of the second resistor is grounded, and the other end of the second resistor is connected to the VCC terminal of the operational amplifier;
  • the capacitor is in parallel with the operational amplifier.
  • the operational amplifier is an OP07 operational amplifier.
  • the VCC terminal of the operational amplifier is set to +5V, and the VEE terminal of the operational amplifier is set to -5V;
  • the value of the capacitor is 1 nf
  • the resistance of the first resistor is 10 k ⁇
  • the resistance of the second resistor is 10 k ⁇ .
  • the current of the first resistor is equal to the current of the capacitor, and if the initial power of the capacitor is set to zero, then:
  • u 0 is the operational amplifier detection voltage difference integral, which refers to the voltage at the output end of the integral operation circuit
  • u i is the voltage at the input of the integral operation circuit
  • R 1 is a resistance value of the first resistor
  • C 1 is the capacitance value of the capacitor.
  • control voltage drop circuit is further provided with a sampling resistor, the sampling resistor is connected in series with the FET; or the control voltage drop circuit is provided with a multimeter, the multimeter and the The field effect transistors are connected in series.
  • the field effect transistor is an N-channel enhancement type MOS transistor, and the three ends thereof are a gate, a drain and a source;
  • the drain of the FET is connected to the circuit to be tested, and the gate thereof is connected to the output end of the integral operation circuit;
  • the source of the FET is connected to the sampling resistor, or the source of the FET is connected to a multimeter.
  • the field effect transistor is an IRFZ34N field effect transistor.
  • the FET in the voltage drop circuit controls the voltage of the power supply of the control voltage drop circuit by the negative feedback of the integral operation circuit, and the load is controlled when the control voltage drop circuit is stable.
  • the voltage difference between the current input terminal and the output terminal is zero;
  • the current of the load is equal to the current of the sampling resistor, or the current of the load is equal to the current displayed by the multimeter.
  • the voltage drop generated at the current input end and the output end is close to 0V, for example, the voltage drop does not exceed 0.2 mV when the current is measured through 4A, so the ammeter is greatly reduced.
  • the self-voltage drop has an effect on the circuit to be tested.
  • the active circuit portion can adopt a relatively large sampling resistor, and can generate a larger sampling voltage, It is necessary to utilize a high-magnification voltage amplifying circuit, and an excessively high-amplification circuit tends to be more unstable, so that higher current resolution accuracy and stability can be obtained.
  • FIG. 1 is a schematic diagram of current measurement of a series sampling resistor of a circuit to be tested in the prior art
  • FIG. 2 is a schematic diagram of current measurement of a shunt resistor parallel current meter in a circuit to be tested in the prior art
  • FIG. 3 is a schematic diagram of current measurement of a magnetic field measured by a Hall sensor in a circuit to be tested in the prior art
  • FIG. 4 is a schematic diagram of a zero voltage drop current detecting circuit of the present invention.
  • Figure 5 is a schematic diagram of an operational circuit of the active circuit of the present invention.
  • FIG. 6 is a schematic diagram showing the relationship between the operation circuit of the zero voltage drop current detection and the control voltage drop circuit of the present invention.
  • FIG. 7 is a schematic diagram of a zero voltage drop current detecting circuit with a multimeter according to the present invention.
  • Fig. 8 is a schematic view showing the method of zero voltage drop current detection of the present invention.
  • the present invention provides a circuit for zero voltage drop current measurement.
  • the present invention will be described in detail with reference to the accompanying drawings.
  • the drawings used herein are for illustrative purposes only and are not intended to be a true proportion and precise configuration after the implementation of the present invention. Therefore, the present invention should not be construed as limiting the scope and configuration of the drawings. The scope of rights in implementation.
  • the invention relates to a circuit for measuring zero-voltage drop current, which is realized by externally connecting an active circuit on the circuit to be tested, so that the voltage difference between the current input end and the output end of the load is zero, thereby achieving zero Current detection of voltage drop.
  • FIG. 4 is a schematic diagram of a zero voltage drop current detecting circuit of the present invention.
  • the circuit for measuring the zero voltage drop current of the present invention mainly comprises a circuit to be tested and an active circuit, and the active circuit is connected to the circuit to be tested.
  • a load is connected, and the current passing through the load is recorded as I, and an active circuit is connected to the input end of the current of the load, so that the entire active circuit is connected in series with the load in the circuit to be tested.
  • the active circuit of the present invention is provided with an arithmetic circuit and a control voltage drop circuit, so that the circuit to be tested is respectively connected to the arithmetic circuit and the control voltage drop circuit.
  • the connection points of the circuit to be tested and the operation circuit are respectively recorded as the first connection point A point and the second connection point B point.
  • the arithmetic circuit of the present invention is used to detect the voltage difference between the first connection point A and the second connection point B in the circuit to be tested.
  • the arithmetic circuit has a feedback function on the control voltage drop circuit, thereby realizing the control voltage drop circuit
  • the control function is such that when the control voltage drop circuit is stable, the voltage value of the second connection point B is 0, or substantially close to zero.
  • the point A of the first connection point is grounded, that is, the voltage of the point A of the first connection point is 0V, so the voltage difference between the input end and the output end of the load current is zero. That is, the active power source is equivalent to a measured ammeter to achieve the zero voltage drop current detection of the present invention.
  • Fig. 5 is a schematic diagram of an arithmetic circuit of the active circuit of the present invention.
  • the arithmetic circuit employed in the active circuit of the present invention is an integral arithmetic circuit.
  • the integration circuit is mainly used for waveform conversion, elimination of the offset voltage of the amplification circuit, and integral compensation in the feedback control.
  • the integral operation circuit includes a first resistor R1, a second resistor R2, a capacitor C1, and an operational amplifier.
  • the op amp is available with an OP07 op amp with low input offset voltage, a low noise, non-chopper-stabilized bipolar op amp IC. Due to the very low input offset voltage, the OP07 op amp does not require additional zeroing in many applications.
  • the OP07 op amp features low input bias current and high open-loop gain. This low offset, high open-loop gain makes the OP07 op amp especially suitable for high-gain measurement devices and weak signals for amplified sensors.
  • the OP07 operational amplifier can improve the accuracy of the measured current of the present invention.
  • the positive power supply terminal and the negative power supply terminal of the operational amplifier are respectively recorded as VCC terminal and VEE terminal; the first resistor R1 is connected to the VEE terminal of the operational amplifier; the second resistor R2 is grounded at one end, and the other end is connected to the VCC terminal of the operational amplifier.
  • Capacitor C1 is connected in parallel to the VEE and output of the operational amplifier.
  • the VCC terminal is set to +5V
  • the VEE terminal is -5V
  • the capacitance of the capacitor C1 is 1nf
  • the resistance of the first resistor R1 is 10k ⁇
  • the resistance of the second resistor R2 is 10k ⁇ .
  • the current through the first resistor R1 is equal to the current through the capacitor C1, that is, the current signal passes through the first resistor R1 and then flows through the feedback to the capacitor C1.
  • the initial charge of the capacitor is considered to be zero, so the capacitor C1 is charged at this time;
  • u 0 represents the voltage at the output of the integral operation circuit
  • u i represents the voltage at the input of the integral operation circuit
  • t represents time
  • R 1 represents the resistance value of the first resistor
  • C 1 represents the capacitance value of the capacitor.
  • the voltage u 0 at the output of the integral operation circuit is the integral of the voltage u i at the input end of the integral operation circuit with respect to time.
  • the resistor R2 is grounded, and the voltage u i at the input end of the integral operation circuit is the voltage difference between the point A of the first connection point and the point B of the second connection point in FIG. 4, that is, the voltage u 0 at the output end of the integration operation circuit. It refers to the integral of the voltage difference of the current access point of the load with respect to time.
  • the integral operation circuit of the present invention plays a feedback role on the control voltage drop circuit, and the control voltage drop circuit is provided with a sampling resistor Rs and a MOS tube (field effect transistor), and the sampling resistor Rs and the MOS tube are connected in series.
  • the sampling resistor R is connected to the power terminal VCC terminal, and the power terminal VCC terminal is set to +5V.
  • the MOS transistor can adopt an N-channel enhancement type MOS transistor, which is provided with three terminals, which are a gate G, a drain D, and a source S, respectively.
  • the MOS transistor controls the current at the D terminal of the output terminal by the voltage applied to the G terminal of the input terminal. Therefore, the MOS transistor is a voltage-controlled device which controls the characteristics of the device by the voltage applied to the gate, and does not cause a charge storage effect due to the base current when the transistor is switched.
  • the G terminal of the input terminal of the MOS transistor of the present invention is connected to the output terminal of the integrating operation circuit.
  • the voltage u 0 at the output terminal of the integrating operation circuit serves as a negative feedback to control the voltage drop of the MOS transistor.
  • the source S end of the MOS transistor is connected to the sampling resistor Rs, and the drain D terminal of the MOS transistor is connected to the second connection point B.
  • the MOS tube shares the nearly all voltage of the power supply VCC terminal of the control voltage drop circuit, and the negative feedback of the integral operation circuit makes The voltage at the point B connected to the drain D terminal of the MOS transistor is 0V.
  • the MOS tube works in a non-fully conductive state, it will bear most of the voltage of the power supply, so it is necessary to dissipate heat, and actually use a heat sink for assembly.
  • the first connection point A and the second connection point B The voltage difference between the points of the connection point B is a variable.
  • the voltage difference between the first connection point A and the second connection point B is 0V, that is, the voltage difference between the current input end and the output end of the load is automatically balanced to 0V, thereby achieving zero voltage.
  • Current reduction measurement When the integral operation circuit performs negative feedback on the control voltage drop circuit, the first connection point A and the second The voltage difference between the points of the connection point B is a variable.
  • the control voltage drop circuit is stable, the voltage difference between the first connection point A and the second connection point B is 0V, that is, the voltage difference between the current input end and the output end of the load is automatically balanced to 0V, thereby achieving zero voltage. Current reduction measurement.
  • the current I of the sampling resistor Rs in the control voltage drop circuit is equal to the current I of the load in the circuit to be tested. Therefore, to measure the current of the load, it is only necessary to measure the voltage of the sampling resistor, and then calculate the current of the sampling resistor according to Ohm's law.
  • the resistance value of the sampling resistor Rs may be larger or smaller, and the resistance drop of the sampling resistor Rs may not be considered, so the utility model is more practical and the circuit is simpler.
  • the MOS transistor is a MOS tube with a large current and a low on-resistance, such as an IRFZ34N field effect transistor.
  • Fig. 8 is a schematic view showing the method of zero voltage drop current detection of the present invention.
  • the zero voltage drop current detection process of the present invention is specifically as follows:
  • a circuit for connecting the zero voltage drop current detection of the present invention is set.
  • the connection of the circuit mainly includes the connection of the circuit to be tested, the connection of the integral operation circuit, and the connection of the control voltage drop circuit.
  • the integral operation circuit detects the voltage difference of the current access point of the load, and outputs the integral of the voltage difference as a negative feedback.
  • S3 The negative feedback at the output of the integral operation circuit controls the voltage drop of the MOS transistor in the control voltage drop circuit.
  • S5 Measure the voltage of the sampling resistor of the control voltage drop circuit, calculate the current of the sampling resistor, and obtain the current of the load in the circuit to be tested.
  • Fig. 7 is a schematic diagram of a zero voltage drop current detecting circuit including a multimeter of the present invention.
  • the sampling resistor Rs provided by the control voltage drop circuit in the zero voltage drop current detecting circuit of the present invention can be replaced with a multimeter.
  • the multimeter can be an ordinary multimeter.
  • the zero voltage drop current detecting circuit in which the sampling resistor is replaced by a multimeter in FIG. 7, one end of the multimeter is connected to the power source, and one end is connected to the field effect transistor.
  • the control voltage drop circuit When the control voltage drop circuit is stable, the voltage difference between the current input terminal and the output terminal of the load is automatically balanced to zero, thereby achieving zero voltage drop current measurement. At this time, the current value displayed by the multimeter in the control voltage drop circuit is equal to the current of the load in the circuit to be tested, so only the universal control in the control voltage drop circuit needs to be read.
  • the current value of the table can be.

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Abstract

一种零压降电流测量的电路，其包含待测电路、运算电路和控制压降电路；待测电路设置有负载和为负载供电的电源；待测电路用于测量负载的电流；运算电路与待测电路连接，运算电路检测其与待测电路连接点之间的运放检测电压差；控制压降电路分别与待测电路和运算电路连接，控制压降电路设置有场效应管；运算电路输出端的反馈来控制控制压降电路的场效应管的压降，使负载的电流输入端与输出端之间的电压差为零或大于零。大大减小电流表自身压降对待测电路产生影响，得到更高的电流分辨精度和稳定性，只需增加少量的器件就能获得稳定的效果，成本较低，可以有效拓展普通万用表的功能。

Description

一种零压降电流测量的电路 技术领域
本发明涉及电流测量领域，特别涉及一种零压降电流测量的电路。
背景技术
电流是最基本的物理量之一，电流在电路中作为电路的一个基本参数经常需要被测量，而且测量电流的方法和电路也有多种多样。
现有技术中，通常测电流主要有如下三种方案：
(一)第一种：用采样电阻串入待测电路中，测量该采样电阻上的电压，再根据欧姆定律计算出电流。
如图1所示，电路中接入一个负载，再在电路中串联一个采样电阻Rs，该采样电阻的一端接地，其另一端连接有一个电压表，电压表的一端与采样电阻Rs连接，电压表的另一端接地，则该电压表测量的电源U就是采样电阻Rs的电压；同时记流过采样电阻Rs的电流为I，根据欧姆定律，可计算出该采样电阻Rs的电流。
由于负载与采样电阻Rs是串联的，所以该电流I也是负载的电流。
(二)第二种：用分流器并联电流表串到待测电路中，通过电流表测量的电流值除以分流比，计算总电流。
如图2所示，待测电路中接入有一个负载和一个分流电阻，且将电流表与分流电阻进行并联，记流过电流表的电流为IA，流过负载的电流记为I，根据电流中的各个电阻的大小和并联电路，计算分流比，从而通过电流表的分流比和电流计算出总电流，则为负载的电流I。
其中，第一种方法主要用于数字万用表，第二种方法主要是用于指针表或者某些大电流测量电路。
因为理想的电流表是一个内阻为零的仪表，但实际上我们常用到的电流表(即第一种方法和第二种方法)由于采样电阻或者分流器的存在，所以其并不是一个完全零内阻的电流表，这样串入电路中不会造成额外的压降。
例如，以Fluke数字万用表F115C为例，实测其表内部采样电阻为33mΩ，加上原装表笔，整个表在电流档的内阻达到了300mΩ以上，这样通过2A电流时压降可以达到约0.6V，这种压降在很多情况下会影响测量，比如测一个用于手机的5V电源充电系统的电流，无形中相当于把电源电压降为4.4V了，这样会造成测量电流远小于正常值。
(三)第三种：根据电磁感应原理，通电导线外会产生磁场，利用霍尔传感器测量磁场大小来计算电流。
如图3所示，待测电路中接入有一个负载，流过该负载的电流记为I，待测电路中还设置有霍尔传感器，该霍尔传感器连接有放大及补偿电路，并在放大及补偿电路的输出端连接有电压表。
其中，第三种方法主要测用于钳表或者电流探头。第三种方法是非接触式测量方式，不会引入线损，但该方法也存在一个问题，由于自然磁场的存在，测量几安培的小电流精度比较低，因而多数钳表或者电流探头量程在几十安培甚至一百安培以上，实际精度也不高，而且精度稍高点的钳表或者电流探头价格都不便宜。
所以需要一种零压降电流测量的电路，使得待测电路中测得的电流精度较高，稳定性更好。
发明的公开
本发明的目的是提供一种零压降电流测量的电路，通过待测电路中连接有积分运算电路和控制压降电路，通过积分运算电路的负反馈控制压降电路中的MOS管的压降，实现电流输入端和输出端之间的电压差平衡为零时，根据测量控制压降电路中的采样电阻的电流或万用表显示的电流，进行零压降测量负载的电流，使得测量的电流精度和稳定性更好，还可减少成本，实用性更强。
为了达到上述目的，本发明提供的一种零压降电流测量的电路，其包含：
待测电路，其设置有负载和为所述负载供电的电源；所述待测电路测量所述负载的电流；
运算电路，其与所述待测电路连接；所述运算电路检测其与所述待测电路连接点之间的运放检测电压差；
控制压降电路，其分别与所述待测电路和所述运算电路连接；所述控制压降电路设置有场效应管；运算电路输出端的输出的信号反馈来控制所述控制压降电路的场效应管的压降，使负载的电流输入端与输出端之间的电压差为零或大于零。
优选地，所述运算电路为积分运算电路；
所述运放检测电压差积分作为运算电路的输出端的负反馈信号。
优选地，所述积分运算电路设置有第一电阻、第二电阻、电容和运算放大器；
所述第一电阻与所述运算放大器的VEE端连接；所述第二电阻的一端接地，其另一端与所述运算放大器的VCC端连接；
所述电容与所述运算放大器并联。
优选地，所述运算放大器为OP07运算放大器。
优选地，所述运算放大器的VCC端设为+5V，所述运算放大器的VEE端设为-5V；
所述电容的值为1nf，所述第一电阻的电阻值为10kΩ，所述第二电阻的电阻值为10kΩ。
优选地，在所述积分运算电路中，所述第一电阻的电流与所述电容的电流相等，设定所述电容的初始电量为零，则可得：
Figure PCTCN2017102924-appb-000001
其中，u0是所述运放检测电压差积分，其是指积分运算电路的输出端的电压；
ui是积分运算电路的输入端的电压；
t是时间；
R1是第一电阻的电阻值；
C1是电容的电容值。
优选地，所述控制压降电路还设置有采样电阻，所述采样电阻与所述场效应管串联连接；或者，所述控制压降电路设置有万用表，所述万用表与所 述场效应管串联连接。
优选地，所述场效应管为N沟道增强型MOS管，其三端分别为栅极、漏极和源极；
所述场效应管的漏极与待测电路连接，其栅极与所述积分运算电路的输出端连接；
所述场效应管的源极与所述采样电阻连接，或者所述场效应管的源极与万用表连接。
优选地，所述场效应管为IRFZ34N场效应管。
优选地，当设置场效应管为截止状态时，通过积分运算电路的负反馈，控制压降电路中的场效应管承担控制压降电路的电源的电压，在控制压降电路稳定时使负载的电流输入端与输出端的电压差平衡为零；
所述负载的电流等于所述采样电阻的电流，或者，所述负载的电流等于所述万用表显示的电流。
与现有技术相比，本发明的有益效果为：
(1)利用本发明的零压降电流测量的电路来测量电流时，电流输入端和输出端产生的压降接近0V，例如实测通过4A电流时压降不超过0.2mV，所以大大减小电流表自身压降对待测电路产生影响。
(2)利用本发明的零压降电流测量的电路来测量电流时，由于不需要顾忌采样电阻的压降，有源电路部分可以采用比较大的采样电阻，能产生更大的采样电压，不需要利用高倍数的电压放大电路，而过高倍数的放大电路往往更不稳定，因此这样能得到更高的电流分辨精度和稳定性。
(3)利用本发明的零压降电流测量的电路来测量电流时，只需要增加少量的器件就能获得稳定的效果，成本较低，可以有效拓展普通万用表的功能。
附图的简要说明
图1现有技术中的待测电路串联采样电阻的电流测量示意图；
图2现有技术中的待测电路中的分流电阻并联电流表的电流测量示意图；
图3现有技术中的待测电路中的霍尔传感器测量磁场的电流测量示意图；
图4本发明的零压降电流检测电路示意图；
图5本发明的有源电路的运算电路示意图；
图6本发明的零压降电流检测的运算电路和控制压降电路关系示意图；
图7本发明的含有万用表的零压降电流检测电路示意图；
图8本发明的零压降电流检测的方法示意图。
实现本发明的最佳方式
本发明提供了一种零压降电流测量的电路，为了解本发明的特征、内容与优点及其所能达成的功效，则将本发明结合附图，并以实施例的表达形式详细说明如下，而其中所使用的附图，其主旨仅为示意及辅助说明书用，未必为本发明实施后的真实比例与精准配置，故不应就附图的比例与配置关系解读、局限本发明于实际实施上的权利范围。
本发明的优点、特征以及达到的技术方法将参照例示性实施例及附图进行更详细地描述而更容易理解，且本发明或可用不同形式来实现，故不应被理解仅限于此处所陈述的实施例；相反地，对所属技术领域的技术人员而言，所提供的实施例将使本发明更加透彻与全面且完整地传达本发明的范畴，且本发明将仅为所附加的权利要求范围所定义。
本发明的一种零压降电流测量的电路，其是通过在待测电路基础上，外接有一个有源电路，使负载的电流输入端和输出端的之间的压差为零，从而实现零压降的电流检测。
图4是本发明的零压降电流检测电路示意图。
如图4所示，本发明的零压降电流测量的电路主要包含待测电路和有源电路，有源电路与待测电路进行连接。
其中，在待测电路中，接入一个负载，经过该负载的电流记为I，在负载的电流的输入端接入有源电路，使该整个有源电路与负载串联在待测电路中。
本发明的有源电路设置有运算电路和控制压降电路，所以待测电路分别与运算电路和控制压降电路连接。待测电路与运算电路连接点分别记为第一连接点A点和第二连接点B点。
所以本发明的运算电路用来检测待测电路中的第一连接点A点和第二连接点B点之间的电压差。
其中，运算电路对控制压降电路有反馈作用，从而实现对控制压降电路 的控制作用，使得当控制压降电路稳定时，第二连接点B点的电压值为0，或基本接近为零。
其中，第一连接点A点处为接地状态，即第一连接点A点的电压为0V，所以负载的电流的输入端和输出端之间的压差平衡为零。即有源电源相当于一个测量的电流表，从而实现本发明的零压降电流检测。
图5是本发明的有源电路的运算电路示意图。
本发明的有源电路中采用的运算电路是一种积分运算电路。其中，积分电路主要用于波形变换、放大电路失调电压的消除及反馈控制中的积分补偿等场合。
如图5所示，积分运算电路包含有第一电阻R1、第二电阻R2、电容C1和运算放大器。
该运算放大器可以选用低输入偏移电压的OP07运算放大器，其是一种低噪声，非斩波稳零的双极性运算放大器集成电路。由于具有非常低的输入失调电压，所以OP07运算放大器在很多应用场合不需要额外的调零措施。
OP07运算放大器同时具有输入偏置电流低和开环增益高的特点，这种低失调、高开环增益的特性使得OP07运算放大器特别适用于高增益的测量设备和放大传感器的微弱信号等方面，所以使用OP07运算放大器可以提高本发明的测量的电流的精度。
其中，运算放大器的正电源端和负电源端分别记为VCC端和VEE端；第一电阻R1连接于运算放大器的VEE端；第二电阻R2一端接地，另一端连接于运算放大器的VCC端。电容C1并联于运算放大器的VEE端和输出端。
示例地，设置VCC端为+5V，VEE端为-5V；电容C1的电容值为1nf；第一电阻R1电阻值为10kΩ，第二电阻R2的电阻值为10kΩ。
利用虚地的概念，可知经过第一电阻R1的电流与经过电容C1的电流相等，即电流信号经过第一电阻R1后经过反馈流到电容C1上。
此时认为电容的初始电量为零，故此时给电容C1充电；
可得：
Figure PCTCN2017102924-appb-000002
其中，u0表示积分运算电路的输出端的电压；
ui表示积分运算电路的输入端的电压；
t表示时间；
R1表示第一电阻的电阻值；
C1表示电容的电容值。
所以，从公式(1)可知，积分运算电路的输出端的电压u0是积分运算电路的输入端的电压ui对时间的积分。此时，电阻R2接地，积分运算电路的输入端的电压ui就是图4中的第一连接点A点和第二连接点B点之间的电压差，即积分运算电路的输出端的电压u0是指负载的电流接入点的电压差对时间的积分。
图6为本发明的零压降电流检测的运算电路和控制压降电路关系示意图。
如图6所示，本发明的积分运算电路对控制压降电路起到反馈作用，控制压降电路设置有一个采样电阻Rs和MOS管(场效应管)，采样电阻Rs和MOS管串联连接，采样电阻R与电源端VCC端连接，该电源端VCC端设为+5V。
MOS管可采用N沟道增强型MOS管，其设置有三端，分别为栅极G、漏极D和源极S。
MOS管是由加在输入端栅极G端的电压来控制输出端漏极D端的电流。所以MOS管是压控器件它通过加在栅极上的电压控制器件的特性，不会发生像三极管做开关时的因基极电流引起的电荷存储效应。
本发明的MOS管的输入端栅极G端与积分运算电路的输出端连接，根据公式(1)可知，积分运算电路的输出端的电压u0作为负反馈来控制MOS管的压降。MOS管的源极S端与采样电阻Rs连接，MOS管的漏极D端与第二连接点B点连接。
当设置MOS管为截止状态时，即MOS管电阻很大，在控制压降电路中，MOS管分担了控制压降电路的电源VCC端的接近全部的电压，通过积分运算电路的负反馈，使得与MOS管的漏极D端连接的B点处的电压为0V。
而在实际由于MOS管工作在非完全导通状态，会承担电源的大部分电压，因此需要做好散热，实际中要装配散热片使用。
当积分运算电路对控制压降电路进行负反馈时，第一连接点A点和第二 连接点B点之间的电压差为变量。当控制压降电路稳定时，第一连接点A电和第二连接点B点之间的电压差为0V，即负载的电流输入端和输出端的电压差自动平衡为0V，从而实现了零压降电流测量。
同时，控制压降电路中的采样电阻Rs的电流I等于待测电路中的负载的电流I。所以测量负载的电流，只需要测量采样电阻的电压，再根据欧姆定律，计算出采样电阻的电流即可。
其中，采样电阻Rs的电阻值可以大一些，也可以小一些，即可不考虑采样电阻Rs的电阻压降，所以本发明的实用性更强，电路更加简便。MOS管选用大电流、低导通电阻的MOS管，例如IRFZ34N场效应管。
图8是本发明的零压降电流检测的方法示意图。
如图8所示，本发明的零压降电流检测的过程具体为：
S1：设置连接好本发明的零压降电流检测的电路，该电路的连接主要包含待测电路的连接、积分运算电路的连接和控制压降电路的连接。
S2：积分运算电路检测负载的电流接入点的电压差，并输出电压差的积分作为负反馈。
S3：积分运算电路的输出端的负反馈控制该控制压降电路中的MOS管的压降。
S4：当控制压降电路中的MOS管压降稳定时，使得电流输入端与输出端之间的电压差为零，此时的控制压降电路的采样电阻的电流与待测电路中的负载的电流相等。
S5：测量控制压降电路的采样电阻的电压，计算采样电阻的电流，从而得到待测电路中的负载的电流。
图7是本发明的含有万用表的零压降电流检测电路示意图。
示例地，如图7所示，本发明的零压降电流检测电路中的控制压降电路设置的采样电阻Rs可以用万用表替换。
该万用表可以是普通的万用表。在图7中的用万用表替换采样电阻的零压降电流检测电路中，万用表的一端与电源连接，一端与场效应管连接。
当控制压降电路稳定时，负载的电流输入端和输出端的电压差自动平衡为零，从而实现了零压降电流测量。此时控制压降电路中的万用表显示的电流值等于待测电路中的负载的电流，所以只需要读取控制压降电路中的万用 表的电流值即可。
尽管本发明的内容已经通过上述优选实施例作了详细介绍，但应当认识到上述的描述不应被认为是对本发明的限制。在本领域技术人员阅读了上述内容后，对于本发明的多种修改和替代都将是显而易见的。因此，本发明的保护范围应由所附的权利要求来限定。

Claims (10)

  1. 一种零压降电流测量的电路，其特征在于，其包含：
    待测电路，其设置有负载和为所述负载供电的电源；所述待测电路测量所述负载的电流；
    运算电路，其与所述待测电路连接；所述运算电路检测其与所述待测电路连接点之间的运放检测电压差；
    控制压降电路，其分别与所述待测电路和所述运算电路连接；所述控制压降电路设置有场效应管；运算电路输出端输出的信号反馈来控制所述控制压降电路的场效应管的压降，使负载的电流输入端与输出端之间的电压差为零或大于零。
  2. 如权利要求1所述的一种零压降电流测量的电路，其特征在于，
    所述运算电路为积分运算电路；
    所述运放检测电压差积分作为运算电路的输出端的负反馈信号。
  3. 如权利要求2所述的一种零压降电流测量的电路，其特征在于，
    所述积分运算电路设置有第一电阻、第二电阻、电容和运算放大器；
    所述第一电阻与所述运算放大器的VEE端连接；所述第二电阻的一端接地，其另一端与所述运算放大器的VCC端连接；
    所述电容与所述运算放大器并联。
  4. 如权利要求3所述的一种零压降电流测量的电路，其特征在于，
    所述运算放大器为OP07运算放大器。
  5. 如权利要求3所述的一种零压降电流测量的电路，其特征在于，
    所述运算放大器的VCC端设为+5V，所述运算放大器的VEE端设为-5V；
    所述电容的值为1nf，所述第一电阻的电阻值为10kΩ，所述第二电阻的电阻值为10kΩ。
  6. 如权利要求3所述的一种零压降电流测量的电路，其特征在于，
    在所述积分运算电路中，所述第一电阻的电流与所述电容的电流相等，设定所述电容的初始电量为零，则可得：
    Figure PCTCN2017102924-appb-100001
    其中，u0是所述运放检测电压差积分，其是指积分运算电路的输出端的电压；
    ui是积分运算电路的输入端的电压；
    t是时间；
    R1是第一电阻的电阻值；
    C1是电容的电容值。
  7. 如权利要求1所述的一种零压降电流测量的电路，其特征在于，
    所述控制压降电路还设置有采样电阻，所述采样电阻与所述场效应管串联连接；或者，所述控制压降电路设置有万用表，所述万用表与所述场效应管串联连接。
  8. 如权利要求7所述的一种零压降电流测量的电路，其特征在于，
    所述场效应管为N沟道增强型MOS管，其三端分别为栅极、漏极和源极；
    所述场效应管的漏极与待测电路连接，其栅极与所述积分运算电路的输出端连接；
    所述场效应管的源极与所述采样电阻连接，或者所述场效应管的源极与所述万用表连接。
  9. 如权利要求1所述的一种零压降电流测量的电路，其特征在于，
    所述场效应管为IRFZ34N场效应管。
  10. 如权利要求7所述的一种零压降电流测量的电路，其特征在于，
    当设置场效应管为截止状态时，通过积分运算电路的负反馈，控制压降电路中的场效应管承担控制压降电路的电源的电压，在控制压降电路稳定时使负载的电流输入端与输出端的电压差平衡为零；
    所述负载的电流等于所述采样电阻的电流，或者，所述负载的电流等于所述万用表显示的电流。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1229922A (zh) * 1998-01-16 1999-09-29 日本电气株式会社 电流检测电路
US20070241763A1 (en) * 2006-04-12 2007-10-18 Harald Panhofer Differential Level Shifter with Automatic Error Compensation
CN202631606U (zh) * 2012-03-22 2012-12-26 西安电子科技大学 一种电流检测装置
CN105955378A (zh) * 2016-07-04 2016-09-21 广东海洋大学 一种高精度电流源
CN205958641U (zh) * 2016-05-03 2017-02-15 广州视声电子实业有限公司 一种电流检测电路
CN206339589U (zh) * 2016-12-15 2017-07-18 深圳市锐骏半导体股份有限公司 电流检测电路

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1229922A (zh) * 1998-01-16 1999-09-29 日本电气株式会社 电流检测电路
US20070241763A1 (en) * 2006-04-12 2007-10-18 Harald Panhofer Differential Level Shifter with Automatic Error Compensation
CN202631606U (zh) * 2012-03-22 2012-12-26 西安电子科技大学 一种电流检测装置
CN205958641U (zh) * 2016-05-03 2017-02-15 广州视声电子实业有限公司 一种电流检测电路
CN105955378A (zh) * 2016-07-04 2016-09-21 广东海洋大学 一种高精度电流源
CN206339589U (zh) * 2016-12-15 2017-07-18 深圳市锐骏半导体股份有限公司 电流检测电路

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