WO2019047456A1 - 多硬盘储存装置 - Google Patents

多硬盘储存装置 Download PDF

Info

Publication number
WO2019047456A1
WO2019047456A1 PCT/CN2018/071581 CN2018071581W WO2019047456A1 WO 2019047456 A1 WO2019047456 A1 WO 2019047456A1 CN 2018071581 W CN2018071581 W CN 2018071581W WO 2019047456 A1 WO2019047456 A1 WO 2019047456A1
Authority
WO
WIPO (PCT)
Prior art keywords
hard disk
control
storage device
controller
controllers
Prior art date
Application number
PCT/CN2018/071581
Other languages
English (en)
French (fr)
Inventor
黄魁锠
陈雅玲
郭能安
Original Assignee
威盛电子股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 威盛电子股份有限公司 filed Critical 威盛电子股份有限公司
Priority to CN201890001181.1U priority Critical patent/CN211124026U/zh
Publication of WO2019047456A1 publication Critical patent/WO2019047456A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers

Definitions

  • the present invention relates to a storage device, and more particularly to a storage device using a plurality of hard disks.
  • a file server can usually be divided into two parts, one part is the management part, which is the processor in the file server and the file management system running in the processor, and the other part is the data storage part, that is hard disk. Compared with the management part, the data storage part will be built at a lower cost. Therefore, in order to achieve a large amount of information and easy management for a small amount of cost, each file server is usually connected to as many hard disks as possible to manage and access the most data through a minimum management system.
  • the present invention provides a multi-hard disk storage device that can turn on the hard disk in a time-sharing manner to achieve the purpose of dispersing the current load.
  • the present invention provides a multiple hard disk storage device including a plurality of hard disk controllers, a backplane, and an interface control board.
  • the interface control board includes a plurality of network transmission ports and a central control chipset; each of the hard disk controllers is adapted to control a corresponding one of the hard disks;
  • the bottom plate includes a plurality of hard disk connection ports, a plurality of data lines, and a plurality of control lines.
  • the central control chipset controls a plurality of control signals according to data received from the network transmission port; each of the hard disk controllers is electrically coupled to one of the hard disk connection ports, and each of the hard disk connection ports is suitable for electrical
  • the plurality of data lines are electrically coupled between the hard disk connection port and the network transmission port, so that the hard disk controller controls the network transmission port to transmit data to each other through the data line and the hard disk connection port;
  • the control lines are electrically coupled between the hard disk controller and the central control chip set, and each of the foregoing control lines is adapted to provide one of the foregoing control signals.
  • the hard disk controller is turned on or off according to a control signal received from the coupled control line.
  • the hard disk connection ports are coupled to the data lines in a one-to-one manner, and the hard disk controllers are coupled to the control signals in a one-to-one manner.
  • the hard disk connection port is coupled to the data line in a one-to-one manner, and the hard disk controller is coupled to the control signal in a many-to-one manner.
  • the backplane further includes a plurality of memory modules and a plurality of first state data lines, the memory modules are disposed on the backplane, and the first state data lines are electrically coupled to the hard disk controller and the memory, respectively. Between the modules, the status signals generated on the corresponding at least one hard disk controller are transmitted to the corresponding memory modules for storage as parameters.
  • the backplane further includes a plurality of second state data lines electrically coupled between the interface control board and the memory module, and the foregoing parameters are provided by the memory module to the interface control. board.
  • the multiple hard disk storage device further includes a fan pack.
  • the fan pack is electrically coupled to the central control chipset and includes a plurality of fans.
  • the central control chipset controls the state in which the fans are respectively turned on and off according to the state in which the hard disk controller is turned on or off. Further, the central control chipset controls the state in which the fan group is turned on and off based on parameters obtained from the above-described memory module.
  • the backplane further includes a plurality of expansion chips electrically coupled between the central control chipset and a portion of the hard disk controller.
  • the central control chipset sends a control signal corresponding to at least a part of the hard disk controllers to one of the expansion chips, and the extension chip that receives the control signal transmits the control signal to the corresponding hard disk controller.
  • At least one of the hard disk controllers described above is a chip disposed on a backplane.
  • At least one of the foregoing hard disk controllers is a circuit board, and the bottom plate further includes a plurality of controller connection ports and each of the controller connection ports is adapted to be electrically connected to a hard disk controller, and One side of the hard disk controller is locked to the corresponding one of the hard disks.
  • At least one of the above described hard disk controllers further includes a metal cover that partially or fully covers the hard disk controller.
  • the multi-disk storage device provided by the present invention can separately control the switches of the plurality of hard disks, so that the hard disks can be turned on without being concentrated at the same time point, thereby avoiding excessive transient current generation.
  • the overall reliability of the multi-drive storage device can be effectively improved.
  • FIG. 1 is a circuit block diagram of a multiple hard disk storage device in accordance with an embodiment of the present invention.
  • FIG. 2 is a circuit block diagram of a multiple hard disk storage device in accordance with another embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a combined structure of a hard disk controller and a hard disk according to an embodiment of the invention.
  • 4A is a schematic diagram of a combined structure of a backplane and a hard disk controller according to an embodiment of the invention.
  • 4B is a schematic diagram of a combined structure of a backplane and a hard disk controller according to another embodiment of the present invention.
  • FIG. 5 is a circuit block diagram of an interface control board in accordance with an embodiment of the present invention.
  • FIG. 6 illustrates a multiple hard disk storage device in accordance with an embodiment of the present invention.
  • FIG. 1 is a circuit block diagram of a multiple hard disk storage device according to an embodiment of the invention.
  • the multiple hard disk storage device 10 in this embodiment can access four hard disks 130A, 130B, 130C, and 130D, and includes an interface control board 100, a backplane 110, and four hard disk controllers 120A, 120B, 120C, and 120D.
  • the hard disk controller 120A controls the operation (for example, reading or writing) of the hard disk 130A
  • the hard disk controller 120B controls the operation of the hard disk 130B
  • the hard disk controller 120C controls the operation of the hard disk 130C
  • the hard disk controller 120D controls the operation of the hard disk 130D.
  • the hard disk controllers 120A, 120B, 120C, and 120D are respectively independent circuits, such as a system on chip (SoC) or a circuit board. Moreover, when the hard disk controllers 120A, 120B, 120C, and 120D are turned off, the corresponding controlled hard disks 130A, 130B, 130C, and 130D are stopped; when the hard disk controllers 120A, 120B, 120C, and 120D are turned on, The corresponding controlled hard disks 130A, 130B, 130C, and 130D will start up and enter a normal operating state.
  • each of the hard disk controllers may be implemented by a chip or all of them by a circuit board, or may be partially implemented by a chip and partly by a circuit board.
  • the interface control board 100 determines the output control signals C1, C2, C3, and C4 according to the received data DATA, and is electrically coupled to the backplane 110 through the signal bus 105 to respectively control the signal C1.
  • C2, C3 and C4 are provided to corresponding control lines 112A, 112B, 112C and 112D.
  • Control lines 112A, 112B, 112C, and 112D are disposed on the backplane 110 and are designed to allow electrical coupling with the interface control board 100; further, the control line 112A is designed to allow electrical coupling with the hard disk controller 120A, Control line 112B is designed to allow electrical coupling with hard disk controller 120B, control line 112C is designed to allow electrical coupling with hard disk controller 120C, and control line 112D is designed to allow electrical coupling with hard disk controller 120D Pick up.
  • the control line 112A can transmit the control signal C1 from the interface control board 100 to the hard disk controller 120A
  • the control line 112B can transmit the control signal C2 from the interface control board 100 to the hard disk controller 120B
  • the control line The 112C can transmit the control signal C3 from the interface control board 100 to the hard disk controller 120C
  • the control line 112D can transfer the control signal C4 from the interface control board 100 to the hard disk controller 120D.
  • the interface control board 100 can respectively transmit the control signals C1, C2, C3 and C4 to the hard disk controllers 120A, 120B, 120C and 120D, respectively, to be controlled by the control signals C1, C2, C3 and C4. Whether the hard disk controllers 120A, 120B, 120C, and 120D should be turned on or should be turned off.
  • the above embodiment controls the opening and closing of a hard disk controller unit, that is, a total of four groups for opening and closing control, and each of the groups is Each contains a hard disk controller.
  • a hard disk controller unit that is, a total of four groups for opening and closing control, and each of the groups is Each contains a hard disk controller.
  • this is not a necessary limitation of the technology of the present invention.
  • the technology provided by the present invention can change the number of hard disk controllers that can be controlled at one time according to actual needs.
  • FIG. 2 is a circuit block diagram of a multiple hard disk storage device 20 according to another embodiment of the present invention.
  • elements denoted by the same reference numerals as those in FIG. 1 indicate that the functions of the elements are similar to those shown in FIG. 1, and thus will not be described again.
  • the interface control board 100 controls the opening and closing of the four hard disk controllers 120A, 120B, 120C, and 120D with only two control signals C5 and C6. From another perspective, the four hard disk controllers 120A, 120B, 120C, and 120D are divided into two groups G1 and G2.
  • the control signal C5 is transmitted from the interface control board 110 to the hard disk controllers 120A and 120B via the signal bus 105 and the control line 112E provided on the backplane, thereby simultaneously controlling whether the hard disk controllers 120A and 120B are turned on or off;
  • the control signal C6 is transmitted from the interface control board 110 to the hard disk controllers 120C and 120D via the signal bus 105 and the control line 112F provided on the backplane, thereby simultaneously controlling whether to turn on or off the hard disk controllers 120C and 120D. .
  • partition control can be implemented to turn on or off the hard disk in units of two hard disk controllers.
  • each group does not have to be limited to only include the above number of hard disk controllers, and is not necessarily limited to having to include the same number of hard disk controllers.
  • each group can contain at least one hard disk controller, and the number of hard disk controllers included does not need to be equal to the number of hard disk controllers included with other groups.
  • FIG. 3 is a schematic diagram of a hard disk controller according to an embodiment of the invention.
  • the hard disk controller 310 is locked together by using screws (not shown) and screw holes 3010 on the corresponding hard disk 300.
  • the hard disk controller 310 is a circuit board and has a gold finger 3110 adapted to be inserted into the slot to receive an electronic signal from the outside and transmit it to the hard disk controller 310, or transmit an electronic signal in the hard disk controller 310. To the outside world.
  • FIG. 4A it is a schematic diagram of a combination structure of a bottom plate and a hard disk controller according to an embodiment of the invention.
  • a plurality of storage unit connectors 410 (only three are shown), one control panel connector 420, one light group 430, and a plurality of memory modules 440 (only one shown) are disposed on the bottom plate 400.
  • a plurality of data lines 4112 (only one shown), a plurality of control lines 4212 (only one shown), a plurality of first status data lines 4114 (only one shown), and a plurality of second status data lines 4216 (shown only One) and a plurality of light control lines 4214 (only one shown).
  • the connection port 4110 is formed in the form of a circuit board slot for inserting the hard disk 300 and the hard disk controller 310, and the circuit connection is used to realize signal transmission between the hard disk connection port 4100 and the controller connection port 4110, so that the signal is transmitted.
  • Electronic signals can be passed between the hard disk connection port 4100 and the controller connection port 4110.
  • the hard disk 300 and the hard disk controller 310 are locked together as shown in FIG. 3, the hard disk 300 can be inserted into the hard disk connection port 4100, and the hard disk controller 310 can be inserted into the controller connection port 4110. In this way, the hard disk controller 310 can control the hard disk 300 by using the controller connection port 4110, the hard disk connection port 4100, and a circuit connected between the two connection ports.
  • the hard disk 300 and the hard disk controller 310 that are locked together are not directly transmitted by the hard disk connection port 4100, the controller connection port 4110, and the circuit trace provided on the bottom plate 400. Signal transmission.
  • the hard disk controller 310 may be a chip integrated on the backplane 400.
  • the storage unit connector 410 does not need the controller connection port 4110, and the hard disk controller 310 connects to the hard disk through the port 4100. Circuit traces between the two to achieve signal transfer between the two.
  • the bottom plate 400 is electrically coupled to the interface control board 100 shown in FIG. 1 through the control board connector 420.
  • the control board connector 420 includes a power connection port 4200 and an interface control board connection port 4210, and the power connection port 4200 is connected to a power supply (not shown) to receive and transmit power to the backplane.
  • the electronic components disposed on the 400 may further provide power to the electronic components electrically coupled to the backplane 400.
  • the interface control board connection port 4210 is adapted to be directly coupled to the signal bus 105 shown in FIG. 1, or may be directly coupled to the interface control board 100 shown in FIG. 1 (ie, the signal bus 105 is omitted).
  • control signals C1, C2, C3, and C4 generated by the foregoing interface control board 100 can be started from the interface control board 100, connected to the port 4210 via the interface control board, and connected to the interface control board connection port 4210 and the controller.
  • the control line 4212 between the connection ports 4110 is passed to the corresponding controller connection port 4110 and then to the corresponding hard disk controller 310.
  • a control line is provided for each storage unit connector 410 on the base plate 400. And each such control line is independent and does not intersect the control line that controls other hard disk controllers.
  • control signals C1 - C4 can control the opening or closing of the corresponding hard disk controller 310, respectively. Once controlled to be turned off, power is not provided to the hard disk controller 310 and the hard disk 300 controlled by the hard disk controller 310.
  • control signals C1 - C4 may also be provided to switch 4120 in storage unit connector 410 via control line 4212 to control whether switch 4120 is turned "on". Once the switch 4120 is turned off, power is not supplied to the corresponding storage unit connector 410. At this time, the hard disk controller 310 and the hard disk 300 coupled to the storage unit connector 410 are stopped because there is no power supply. Operation.
  • a plurality of data lines 4112 are electrically coupled between each hard disk connection port 4100 and the interface control board connection port 4210 (for simplicity of the drawing, only one of the figures is shown in the figure).
  • Data line 4112 ; whereby data line 4112 can communicate data between hard disk 300 and the interface control board under control of hard disk controller 310.
  • a plurality of first state data lines 4114 are electrically coupled between each of the controller connection ports 4110 and the corresponding memory module 440 (for simplicity of the drawing, only one of the figures is shown on the figure).
  • the memory module 440 stores the parameters represented by the foregoing status signals and is electrically coupled to the memory module 440 and the interface control board connection port when the interface control board requests the parameters or after a period of time.
  • the second status data line 4216 between the 4210 provides parameters to the interface control board for the interface control board to determine how to control the operation of the entire multi-hard disk storage device, for example, by electrically coupling to the interface control board connection port 4210 and A light control line 4214 between the light groups 430 controls the lighting pattern of each of the light groups 430 to indicate which of the plurality of hard disks 300 are activated, or controls the fan group for heat dissipation through other control lines ( The opening and closing of each of the fans in the unillustrated manner is performed to dissipate heat in accordance with the number or position of the activated hard disks 300.
  • the plurality of memory modules 440 in the present invention may be respectively coupled to a portion of the plurality of controller connection ports 4110.
  • FIG. 5 is a circuit block diagram of an interface control board according to an embodiment of the invention.
  • the interface control board 50 includes a central control chipset 510, a plurality of network connection ports 500 and 520-532, a plurality of data lines 550-562, and a control line 540.
  • Each of the network connection ports 500 and 520-532 is electrically coupled to a corresponding network connection hole (for example, an RJ-45 connection hole) to thereby perform data interaction with the outside world.
  • a corresponding network connection hole for example, an RJ-45 connection hole
  • data lines 550-562 and the control line 540 are represented by one line, actually one or more of the data lines 550-562 and the control line 540 may be A bus is not limited to a single trace.
  • the data received from the network connection port 500 is passed to the central control chipset 510, and the central control chipset 510 determines which hard disk must be activated based on the data received from the network connection port 500. And generating the correct control signals (such as the aforementioned control signals C1 - C4) onto the control line 540 to control the opening and closing of the hard disk by transmitting control signals through the control lines on the backplane.
  • the present embodiment provides a gold finger-like projection 55 on the interface control panel 50. The protruding portion 55 can be inserted into the interface control board connection port 4210 shown in FIG. 4A or FIG.
  • the control line 540 is electrically coupled to the control line 4212 and the light control line 4214 and the second state data line 4216 or a fan pack, a power supply (not shown), and the like.
  • the central control chipset 510 can separately control the opening and closing of each hard disk using the manner previously described; and after the hard disk is turned on, the data taken by the hard disk and the data to be entered into the hard disk can be The two-way transmission is performed directly by the network connection ports 520-532, the data lines 550-562, and the correspondingly connected data lines on the backplane (for example, the data line 4112 in FIG. 4A).
  • FIG. 6 illustrates a multiple hard disk storage device 60 in accordance with an embodiment of the present invention.
  • the multi-hard disk storage device 60 is provided with a metal cover 320 on the hard disk controller 310 in addition to the hard disk controller, the bottom plate and the interface control board presented in the above embodiments.
  • the hard disk 300, the hard disk controller 310 and the metal cover 320 may together form a hard disk module 600.
  • the metal cover 320 covers part or all of the hard disk controller 310 and is disposed between the hard disk controller 310 and an adjacent other hard disk module. Thereby, the metal cover 320 can shield the influence of the electronic signals of the hard disk or the hard disk controller in the other hard disk modules on the hard disk controller 310 (for example, electromagnetic interference), so that the hard disk modules can be arranged more closely without mutual influences.
  • the hard disk module 300, the hard disk controller 310 and the metal cover 320 forming a hard disk module 600 is that when one of the hard disk or hard disk controllers in the multiple hard disk storage device 60 fails, only the hard disk module needs to be replaced. No need to move to the entire backplane, interface control board or all other hard drives.
  • the hard disk module 600 may not include the metal cover 320, so that there is still an advantage of facilitating maintenance and replacement.
  • a fan group is further provided, the fan group including eight fans 610 to 624, and the fans 610 to 624 are electrically charged in the manner set forth in the previous embodiment.
  • the multiple hard disk storage device 60 may include a plurality of backplanes 400, a plurality of corresponding interface control boards 50, and a plurality of corresponding hard disk modules 600, wherein each of the backplanes 400 and each corresponding interface is controlled.
  • Plate 50 operates in the manner set forth in the previous embodiments.
  • each GPIO expansion chip can be electrically coupled between the central control chipset of the interface control board and a part of the hard disk controller.
  • the central control chipset sends a control signal to this part of the hard disk controller, the control signal is first transmitted to the GPIO expansion chip, and then the GPIO expansion chip selects the correct hard disk controller, and Transfer control signals to the selected hard disk controller.
  • each hard disk can be independently controlled to be turned on and off, when a certain hard disk is not needed, the corresponding hard disk controller or switch can be turned off to stop the rotation of the hard disk, thereby saving power. Effect.
  • the corresponding hard disk controller or switch can be turned off to stop the rotation of the hard disk, thereby saving power. Effect.
  • the multi-disk storage device provided by the present invention can separately control the switches of the plurality of hard disks, so that the hard disks can be turned on without being concentrated at the same time point, thereby avoiding excessive transient current generation.
  • the multi-disk storage device can separately control the switches of the plurality of hard disks, so that the hard disks can be turned on without being concentrated at the same time point, thereby avoiding excessive transient current generation.
  • G1, G2 Group of hard disk controllers.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Power Sources (AREA)

Abstract

一种多硬盘储存装置，包括多个硬盘控制器、底板以及一个接口控制板。其中，多个硬盘控制器电性耦接至底板，接口控制板也电性耦接至底板，以使接口控制板可以根据所接收到的数据而以分群的方式来决定每一群硬盘控制器的开启与关闭。

Description

多硬盘储存装置 技术领域
本发明是有关于一种储存装置，特别是有关于一种使用多个硬盘的储存装置。
背景技术
在网络发达的地区，许多信息都已经被储存在网络的公开节点上，以使储存者自己或者关系人等可以通过网络轻松地取得所需的信息。这些用来储存信息的公开节点，一般都是由一或多个文件服务器所组成。一个文件服务器通常可被区分为两个部分，其中一个部分是管理部分，也就是文件服务器里面的处理器以及处理器中所运作的文件管理系统，而另一个部分则是数据储存部分，也就是硬盘。相较于管理部分，数据储存部分的建置成本会比较低。因此，为了在较少的成本需求下达到储存大量的信息且简易管理的目的，每一个文件服务器通常都会连接到尽可能多的硬盘，以通过最少的管理系统来管理及存取最多的数据。
因此，一般在一台用来作为文件服务器的储存装置中，会同时存在着许多颗硬盘。一旦储存装置被要求开启，在这一台储存装置中的所有硬盘也会全部被同时开启。由于硬盘在开启的时候需要一个较大的启动电流，因此，一旦所有硬盘被同时开启，在这一瞬间将会产生一个极大的电流突波。这个电流突波容易对电源供应器以及相关的连接电路产生无法恢复的伤害，进而降低储存装置及整个文件服务器的可靠性。
发明内容
有鉴于此，本发明提出一种多硬盘储存装置，其可分时开启硬盘而达到分散电流负荷的目的。
从一个方面来看，本发明提出一种多硬盘储存装置，包括多个硬盘控制器、一个底板以及一个接口控制板。其中，接口控制板包括多个网络传输端口以及一个中央控制芯片组；每一个硬盘控制器适于控制对应的一个硬盘；底板包括多个硬盘连接端口、多条数据线以及多条控制线。中央控制芯片组根据从网络传输端口接收的数据来控制多个控制信号；每一个上述的硬盘控制器电性耦接至上述的硬盘连接端口中的一个，而且每一个硬盘连接端口适于电性耦接至一个硬盘上；上述的多条数据线分别电性耦接于硬盘连接端口与网络传输端口之间，以使硬盘控制器控制网络传输端口经由数据线而与硬盘 连接端口彼此传递数据；上述的控制线分别电性耦接于硬盘控制器以及中央控制芯片组之间，且每一条上述的控制线适于提供前述控制信号之一。其中，硬盘控制器并根据从所耦接的控制线上接收的控制信号而开启或关闭。
在一个实施例中，上述的硬盘连接端口以一对一的方式对应耦接至数据线，且硬盘控制器以一对一的方式对应耦接至控制信号。在另一个实施例中，上述的硬盘连接端口以一对一的方式对应耦接至数据线，且硬盘控制器以多对一的方式对应耦接至控制信号。
在一个实施例中，上述的底板还包括多个存储器模块以及多个第一状态数据线，这些存储器模块设置于底板上，而第一状态数据线则分别电性耦接于硬盘控制器及存储器模块之间，并将对应的至少一个硬盘控制器上所产生的状态信号传递至对应的存储器模块以储存成参数。
在一个实施例中，底板还包括多个第二状态数据线，这些第二状态数据线分别电性耦接于接口控制板与存储器模块之间，并将前述的参数由存储器模块提供至接口控制板。
在一个实施例中，多硬盘储存装置还包括一个风扇组。此风扇组电性耦接至中央控制芯片组且包括多个风扇。其中，中央控制芯片组根据硬盘控制器分别开启或关闭的状态控制各风扇分别启闭的状态。更进一步的，中央控制芯片组是根据从上述的存储器模块中取得的参数来控制风扇组启闭的状态。
在一个实施例中，底板还包括多个扩展芯片，这些扩展芯片分别电性耦接在中央控制芯片组与一部分的硬盘控制器之间。其中，中央控制芯片组发出对应这些硬盘控制器的至少其中一部分的控制信号到这些扩展芯片之一，而接收到控制信号的扩展芯片再将控制信号传送到对应的硬盘控制器。
在一个实施例中，上述的硬盘控制器中至少有一个是设置在底板上的芯片。
在一个实施例中，上述的硬盘控制器中至少有一个是一块电路板，底板还包括多个控制器连接端口并使每一个控制器连接端口适于电性连接至一个硬盘控制器，且，硬盘控制器的一侧锁合在对应的一个硬盘上。
在一个实施例中，至少一个上述的硬盘控制器还包括一个金属盖，此金属盖部分或全部覆盖此硬盘控制器。
根据上述，本发明所提供的多硬盘储存装置可以将多个硬盘的开关分开控制，因此可以使这些硬盘不集中在同一个时间点开启，进而避免了过大的瞬间电流的产生。通 过这样的设计，多硬盘储存装置的整体可靠度将可以得到有效的提升。
附图说明
图1为根据本发明一实施例的多硬盘储存装置的电路方块图。
图2为根据本发明另一实施例的多硬盘储存装置的电路方块图。
图3为根据本发明一实施例的硬盘控制器与硬盘的结合结构示意图。
图4A为根据本发明一实施例的底板与硬盘控制器的结合结构示意图。
图4B为根据本发明另一实施例的底板与硬盘控制器的结合结构示意图。
图5为根据本发明一实施例的接口控制板的电路方块图。
图6为根据本发明一实施例的多硬盘储存装置。
具体实施方式
请参照图1，其为根据本发明一实施例的多硬盘储存装置的电路方块图。本实施例中的多硬盘储存装置10可以存取四个硬盘130A、130B、130C与130D，且包括接口控制板100、底板110以及四个硬盘控制器120A、120B、120C与120D。其中，硬盘控制器120A控制硬盘130A的运作(例如读或写)，硬盘控制器120B控制硬盘130B的运作，硬盘控制器120C控制硬盘130C的运作，硬盘控制器120D控制硬盘130D的运作。而且，硬盘控制器120A、120B、120C与120D分别是一个独立运作的电路，例如是系统单芯片(SoC，System on Chip)或电路板。而且当硬盘控制器120A、120B、120C与120D被关闭的时候，对应的被控制的硬盘130A、130B、130C与130D就会停止运作；当硬盘控制器120A、120B、120C与120D开启的时候，对应的被控制的硬盘130A、130B、130C与130D就会开始启动并进入正常运转的状态。在本发明中各个硬盘控制器可以全部都是以芯片实施或全部都是以电路板实施，也可以部分是以芯片实施而部分是以电路板实施。
在本实施例中，接口控制板100根据所接收到的数据DATA来决定输出的控制信号C1、C2、C3与C4，并且通过信号总线105电性耦接至底板110以分别将控制信号C1、C2、C3与C4提供到对应的控制线112A、112B、112C与112D。控制线112A、112B、112C与112D被设置于底板110上，并且被设计成允许与接口控制板100电性耦接；此外，控制线112A被设计成允许与硬盘控制器120A电性耦接，控制线112B被设计成允许与硬盘控制器120B电性耦接，控制线112C被设计成允许与硬盘控制器120C电性耦接，且控制线112D被设计成允许与硬盘控制器120D电性耦接。通过与信号总线105的配合，控制线112A可以将控 制信号C1从接口控制板100传送到硬盘控制器120A，控制线112B可以将控制信号C2从接口控制板100传送到硬盘控制器120B，控制线112C可以将控制信号C3从接口控制板100传送到硬盘控制器120C，而控制线112D则可以将控制信号C4从接口控制板100传送到硬盘控制器120D。从另一个角度来看，接口控制板100可以分别将控制信号C1、C2、C3与C4分别传递给硬盘控制器120A、120B、120C与120D，以通过控制信号C1、C2、C3与C4来控制是否应该开启或者应该关闭硬盘控制器120A、120B、120C与120D。
值得注意的是，上述的实施例是以一个硬盘控制器为单位来进行开启与关闭的控制，也就是总共被分为四个群组来进行开启与关闭的控制，而其中每一个群组则各自包含一个硬盘控制器。但这并非本发明技术的必要限制。相对的，本发明所提供的技术可以根据实际需求而改变一次可以控制的硬盘控制器的数量。
请参照图2，其为根据本发明另一实施例的多硬盘储存装置20的电路方块图。在本实施例中，与图1相同以相同元件标号标示的元件表示该元件的功能与图1所示的相近，故在此不再赘述。在本实施例中，与前一实施例较大的差异在于，接口控制板100仅以两个控制信号C5与C6来控制四个硬盘控制器120A、120B、120C与120D的开启与关闭。从另一个角度来看，四个硬盘控制器120A、120B、120C与120D被分为两个群组G1与G2。控制信号C5自接口控制板110，经由信号总线105以及底板上所设置的控制线112E而被传递至硬盘控制器120A与120B，以借此同时控制是否开启或关闭硬盘控制器120A与120B；类似的，控制信号C6自接口控制板110，经由信号总线105以及底板上所设置的控制线112F而被传递至硬盘控制器120C与120D，以借此同时控制是否开启或关闭硬盘控制器120C与120D。如此一来，就可以以两个硬盘控制器为单位而实现分区控制开启或关闭硬盘的目的。
当然，每一个群组并不必被限制为仅能包含上述数量的硬盘控制器，也不必被限定为必须包含相同数量的硬盘控制器。事实上，每一个群组可以包含最少一个硬盘控制器，而且所包含的硬盘控制器的数量不需要等同于与其它群组所包含的硬盘控制器的数量。
接下来将详细说明各元件的结构及其组成方式。请参见图3，其为根据本发明一实施例的硬盘控制器的示意图。在本实施例中，硬盘控制器310是通过使用螺丝(未示)与对应的硬盘300上的螺丝孔3010而锁合在一起。其中，硬盘控制器310是一块电路板，且具有一个适于插入插槽中的金手指3110以从外界接收电子信号并传递至硬盘控制器310中，或将硬盘控制器310中的电子信号传送至外界。
请一并参见图4A，其为根据本发明一实施例的底板与硬盘控制器的结合结构示意 图。在本实施例中，底板400上设置了多个储存单元连接器410(仅示出三个)，一个控制板连接器420、一个灯光组430、多个存储器模块440(仅示出一个)、多条数据线4112(仅示出一条)、多条控制线4212(仅示出一条)、多条第一状态数据线4114(仅示出一条)、多条第二状态数据线4216(仅示出一条)与多条灯光控制线4214(仅示出一条)。其中，为了配合图3所示的硬盘300与硬盘控制器310，在每一个储存单元连接器410中都各自包括了一个硬盘连接端口4100以及一个控制器连接端口4110，硬盘连接端口4100以及控制器连接端口4110都被做成电路板插槽的形式以适于安插硬盘300与硬盘控制器310，而硬盘连接端口4100与控制器连接端口4110之间则利用电路走线来实现信号传递，以使电子信号可以在硬盘连接端口4100与控制器连接端口4110之间传递。当如图3所示的硬盘300与硬盘控制器310被锁合在一起之后，可以把硬盘300插入在硬盘连接端口4100，并把硬盘控制器310插入在控制器连接端口4110。如此一来，硬盘控制器310就可以利用控制器连接端口4110、硬盘连接端口4100以及连接在这两个连接端口之间的电路来控制硬盘300。换句话说，锁合在一起的硬盘300与硬盘控制器310并不是直接进行信号传递而是通过底板400上设置的硬盘连接端口4100、控制器连接端口4110与电路走线来实现两者间的信号传递。在另一实施例中，硬盘控制器310可以是整合设置在底板400上的一芯片，储存单元连接器410中并不需要控制器连接端口4110，而硬盘控制器310通过其与硬盘连接端口4100之间的电路走线来实现两者间的信号传递。
在本实施例中，底板400通过控制板连接器420电性耦接至图1所示的接口控制板100。具体来说，在本实施例中，控制板连接器420包括一个电源连接端口4200与一个接口控制板连接端口4210，电源连接端口4200连接到电源供应器(未示)以接收并传送电力至底板400上所设置的电子元件，或者还可以更进一步的提供电力至与底板400电性耦接的电子元件。接口控制板连接端口4210适于直接耦接至图1所示的信号总线105，或者也可以是直接耦接至图1所示的接口控制板100(也就是省略信号总线105)。整体而言，前述接口控制板100所产生的控制信号C1、C2、C3与C4，可以从接口控制板100处开始，经由接口控制板连接端口4210以及连接在接口控制板连接端口4210与控制器连接端口4110之间的控制线4212，传递至对应的控制器连接端口4110并进而传递至对应的硬盘控制器310。应注意的是，为了图式上的简单明了，在图中仅绘制出了一条控制线4212，但实际上在本实施例中，底板400上会对于每一个储存单元连接器410提供一条控制线，而每一条这样的控制线都是独立的，并不会与控制其它硬盘控制器的控制线相交。
在图4A所示的实施例中，控制信号C1～C4可以分别控制对应的硬盘控制器310的开 启或关闭。一旦被控制为关闭，电力就不会被提供至此硬盘控制器310以及受此硬盘控制器310所控制的硬盘300。在另一个实施例中，请参照图4B，控制信号C1～C4也可以经由控制线4212而被提供至储存单元连接器410中的开关4120以控制开关4120是否开启。一旦开关4120被关闭，电力就不会被提供至对应的储存单元连接器410，此时耦接于此储存单元连接器410的硬盘控制器310与硬盘300，就会因为没有电力的供应而停止运作。相对的，若开关4120被开启，则电力就会被提供至对应的储存单元连接器410(例如通过未在图中绘示出的电源线)，此时耦接于此储存单元连接器410的硬盘控制器310与硬盘300，就会因为有了电力的供应而开始运作。
请再回到图4A。在本实施例中，有多条数据线4112电性耦接在每一个硬盘连接端口4100与接口控制板连接端口4210之间(为了图式上的简单明了，在图上仅画出了其中一条数据线4112)；借此，数据线4112可以在硬盘300与接口控制板之间在硬盘控制器310的控制下传递数据。此外，尚有多条第一状态数据线4114电性耦接在每一个控制器连接端口4110与对应的存储器模块440之间(为了图式上的简单明了，在图上仅画出了其中一条第一状态数据线4114与一个存储器模块440)；借此，第一状态数据线4114可以将对应的硬盘控制器310上所产生的一些指示硬盘300或硬盘控制器310状态的状态信号，例如：硬盘300是否为运作中以及硬盘温度或容量等状态信号，从硬盘控制器310传递至存储器模块440。存储器模块440储存由前述的状态信号所表示的参数，并在接口控制板来要求这些参数的时候，或者是每间隔一段时间之后，就通过电性耦接在存储器模块440与接口控制板连接端口4210之间的第二状态数据线4216，将参数提供至接口控制板，以供接口控制板决定如何控制整个多硬盘储存装置的运作，例如：通过电性耦接于接口控制板连接端口4210与灯光组430之间的灯光控制线4214，控制灯光组430中的每一个灯的发光样式来指示多个硬盘300中的哪些被启动，或者通过其它的控制线来控制用于散热的风扇组(未示)中的每一个风扇的开启与关闭以配合被启动的硬盘300的数目或位置进行散热。本发明中的多个存储器模块440可以分别对应耦接至多个控制器连接端口4110中的一部分。
接下来请参照图5，其为根据本发明一实施例的接口控制板的电路方块图。在本实施例中，接口控制板50包括一个中央控制芯片组510、多个网络连接端口500与520～532，多条数据线550～562以及一条控制线540。每一个网络连接端口500与520～532分别电性耦接至一个对应的网络连接孔(例如RJ-45连接孔)，以借此与外界进行数据互动。此外，值得注意的是，虽然在本实施例中只是以一条线来表示数据线550～562以及控制线540， 但实际上这些数据线550～562以及控制线540中的一或多者可以是一个总线，并非以单一条走线为限。
在本实施例中，从网络连接端口500所接收的数据会被传递至中央控制芯片组510，而中央控制芯片组510就会根据从网络连接端口500所接收的数据来判断必须启动哪一个硬盘，并产生正确的控制信号(例如前述的控制信号C1～C4)到控制线540上，以通过底板上的控制线传递控制信号来控制硬盘的开启与关闭。为了与图4A或图4B中所示的底板相配合，本实施例在接口控制板50上提供了一个金手指样式的突出部位55。突出部位55可以被插入到图4A或图4B所示的接口控制板连接端口4210之中，以使数据线520～532以一对一的方式电性耦接至底板上的数据线4112，并使控制线540电性耦接至控制线4212与灯光控制线4214以及第二状态数据线4216或风扇组、电源供应器(未示)等。如此一来，中央控制芯片组510可以使用先前所述的方式来分开控制每一个硬盘的开启与关闭；而在硬盘被开启之后，由硬盘取出的数据以及要进入到硬盘中的数据，就可以直接由网络连接端口520～532、数据线550～562以及底板上对应连接的数据线(例如图4A中的数据线4112)来进行双向传递。
通过组合上述的硬盘、硬盘控制器、底板以及接口控制板，就可以得到利用本发明技术而成的多硬盘储存装置。请参照图6，其为根据本发明一实施例的多硬盘储存装置60。在本实施例中，多硬盘储存装置60除了上述实施例中所呈现的硬盘控制器、底板及接口控制板之外，还在硬盘控制器310上设置了一块金属盖320。硬盘300、硬盘控制器310与金属盖320可以共同组成一硬盘模块600。硬盘控制器310的一侧锁合在对应的硬盘300上，硬盘控制器310的另一侧部分或全部被金属盖320覆盖。金属盖320覆盖硬盘控制器310的部分或全部，并被设置在硬盘控制器310与相邻的其它硬盘模块之间。借此，金属盖320可以屏蔽其它硬盘模块中的硬盘或硬盘控制器的电子信号对于硬盘控制器310的影响(例如电磁干扰)，使得这些硬盘模块可以被更紧密地排列在一起而不会互相影响。将硬盘300、硬盘控制器310与金属盖320组成一硬盘模块600的另一项优点是，当多硬盘储存装置60中的某一个硬盘或硬盘控制器故障时，仅需要更换该硬盘模块即可，不需要动到整个底板、接口控制板或所有其他硬盘。在本发明另一实施例中，硬盘模块600可以不包含金属盖320，这样仍然有便于维修更换的优点。除此之外，在多硬件储存装置60之中，还设置了一个风扇组，这个风扇组包括了八个风扇610～624，而这些风扇610～624就以先前实施例中所陈述的方式电性耦接至中央控制芯片组，以受中央控制芯片组的控制而决定其开启或关闭的状态。在本发明又一实施例中，多硬盘储存装置60可以包括多个底板 400、多个对应的接口控制板50与多个对应的硬盘模块600，其中每个底板400与每个对应的接口控制板50皆以先前实施例中所陈述的方式运作。
为了有效增加在同一台多硬盘储存装置中可以安装的硬盘数量，还可以进一步在底板上设置使用多个I 2C(Inter-Integrated Circuit，内部集成电路)接口的GPIO(General Purpose Input Output，通用输入/输出)扩展芯片。此时，每一GPIO扩展芯片可以电性耦接在接口控制板的中央控制芯片组与一部分的硬盘控制器之间。此时，当中央控制芯片组在发出控制信号给这一部分的硬盘控制器的时候，使控制信号会先被传送到这一个GPIO扩展芯片，之后再由GPIO扩展芯片选择正确的硬盘控制器，并将控制信号传送到所选择的硬盘控制器上。
根据上述，由于可以独立控制每一个硬盘的开启与关闭，所以在不需要使用到某一个硬盘的时候，就可以通过关闭对应的硬盘控制器或开关以停止此硬盘的转动，借此达到省电的效果。除此之外，当需要同时启动多个硬盘的时候，也可以一次仅启动这些硬盘中的一部分，之后在过了一段时间之后才启动其它的硬盘。例如，当需要启动15个硬盘的时候，可以先启动其中的5个硬盘，过了3秒钟之后再启动另外的5个硬盘，然后在再次过了3秒钟之后在启动最后5个硬盘。这样就可以有效的降低瞬间电流的峰值。
根据上述，本发明所提供的多硬盘储存装置可以将多个硬盘的开关分开控制，因此可以使这些硬盘不集中在同一个时间点开启，进而避免了过大的瞬间电流的产生。通过这样的设计，不仅多硬盘储存装置的整体可靠度可以得到有效的提升，还可以有机会降低电力的消耗。除此之外，将硬盘与硬盘控制器一起模块化也可以便利维修更换。
符号说明
10、20、60：多硬盘储存装置
50、100：接口控制板
55：突出部位
105：信号总线
110、400：底板
112A、112B、112C、112D、112E、112F：控制线
120A、120B、120C、120D、310：硬盘控制器
130A、130B、130C、130D、300：硬盘
500、520、522、524、526、528、530、532：网络连接端口
510：中央控制芯片组
540：接口控制板上的控制线
550、552、554、556、558、560、562：接口控制板上的数据线
610、612、614、616、618、620、622、624：风扇
3010：螺丝孔
3110：金手指
320：金属盖
410：储存单元连接器
420：控制板连接器
430：灯光组
440：存储器模块
4100：硬盘连接端口
4110：控制器连接端口
4112：底板上的数据线
4114：第一状态数据线
4120：开关
4200：电源连接端口
4210：接口控制板连接端口
4212：底板上的控制线
4214：灯光控制线
4216：第二状态数据线
C1、C2、C3、C4、C5、C6：控制信号
DATA：数据
G1、G2：硬盘控制器的群组。

Claims (10)

  1. 一种多硬盘储存装置，其特征在于，包括：
    接口控制板，包括：
    多个网络传输端口；以及
    中央控制芯片组，根据从该多个网络传输端口接收的数据，控制多个控制信号；
    多个硬盘控制器，每一该多个硬盘控制器适于根据该多个控制信号之一控制硬盘；以及
    底板，电性耦接至该接口控制板，包括：
    多个硬盘连接端口，每一该多个硬盘控制器电性耦接至该多个硬盘连接端口的其中之一，其中每一该多个硬盘连接端口适于电性连接至硬盘；
    多条数据线，该多条数据线分别电性耦接于该多个硬盘连接端口以及该多个网络传输端口之间，以使该多个硬盘控制器控制该多个网络传输端口经由该多条数据线和该多个硬盘连接端口彼此传递数据；以及
    多条控制线，该多条控制线分别电性耦接于该多个硬盘控制器以及该中央控制芯片组之间，每一该多条控制线适于提供该多个控制信号之一，
    其中，该多个硬盘控制器的开启或关闭是根据从所耦接的该控制线上接收的该控制信号而定。
  2. 根据权利要求1所述的多硬盘储存装置，其中，该多个硬盘连接端口以一对一的方式对应耦接至该多条数据线，且该多个硬盘控制器以一对一的方式对应耦接至该多个控制信号。
  3. 根据权利要求1所述的多硬盘储存装置，其中，该多个硬盘连接端口以一对一的方式对应耦接至该多条数据线，且该多个硬盘控制器以多对一的方式对应耦接至该多个控制信号。
  4. 根据权利要求1所述的多硬盘储存装置，其中，该底板还包括多个存储器模块以及多个第一状态数据线，该多个存储器模块设置于该底板上，该多个第一状态数据线分别电性耦接于该多个硬盘控制器以及该多个存储器模块之间，并将对应的至少一硬盘控制器上所产生的状态信号传递至对应的存储器模块以储存成参数。
  5. 根据权利要求4所述的多硬盘储存装置，其中，该底板还包括多个第二状态数据线，该多个第二状态数据线分别电性耦接于该接口控制板以及该多个存储器模块之间，并将该参数由该多个存储器模块提供至该接口控制板。
  6. 根据权利要求1所述的多硬盘储存装置，还包括风扇组，该风扇组电性耦接至该 中央控制芯片组并包括多个风扇，其中该中央控制芯片组根据该多个硬盘控制器分别开启或关闭的状态，控制该风扇组中该多个风扇分别启闭的状态。
  7. 根据权利要求1所述的多硬盘储存装置，其中，该底板还包括多个扩展芯片，该多个扩展芯片分别电性耦接在该中央控制芯片组与一部分的该多个硬盘控制器之间，其中该中央控制芯片组发出对应该多个硬盘控制器中一部分的该控制信号到该多个扩展芯片之一，该扩展芯片再将该控制信号传送到对应的该部分的硬盘控制器。
  8. 根据权利要求1所述的多硬盘储存装置，其中，至少一该多个硬盘控制器为设置在该底板上的芯片。
  9. 根据权利要求1所述的多硬盘储存装置，其中，至少一该多个硬盘控制器为电路板，且其中该底板还包括多个控制器连接端口，其中每一该多个控制器连接端口适于电性连接至硬盘控制器，其中该硬盘控制器的一侧锁合在由该硬盘控制器所控制的该硬盘上。
  10. 根据权利要求9所述的多硬盘储存装置，其中，至少一该多个硬盘控制器还包括金属盖，该金属盖部分或全部覆盖该硬盘控制器的另一侧。
PCT/CN2018/071581 2017-09-07 2018-01-05 多硬盘储存装置 WO2019047456A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201890001181.1U CN211124026U (zh) 2017-09-07 2018-01-05 多硬盘储存装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201762555135P 2017-09-07 2017-09-07
US62/555,135 2017-09-07

Publications (1)

Publication Number Publication Date
WO2019047456A1 true WO2019047456A1 (zh) 2019-03-14

Family

ID=63257431

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/071581 WO2019047456A1 (zh) 2017-09-07 2018-01-05 多硬盘储存装置

Country Status (3)

Country Link
CN (1) CN211124026U (zh)
TW (2) TWM561247U (zh)
WO (1) WO2019047456A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM561247U (zh) * 2017-09-07 2018-06-01 威盛電子股份有限公司 多硬碟儲存裝置
TWI688864B (zh) * 2018-08-31 2020-03-21 威剛科技股份有限公司 儲存設備及儲存方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101241417A (zh) * 2007-02-08 2008-08-13 佛山市顺德区顺达电脑厂有限公司 硬盘启动时序控制电路
CN101727399A (zh) * 2008-10-30 2010-06-09 鸿富锦精密工业（深圳）有限公司 存储装置及使用该存储装置的数据交换系统
CN103777735A (zh) * 2012-10-26 2014-05-07 英业达科技有限公司 储存装置及其节能方法
CN103793307A (zh) * 2012-10-31 2014-05-14 英业达科技有限公司 电子装置及其管理方法与机柜伺服系统
CN104166613A (zh) * 2013-05-20 2014-11-26 鸿富锦精密工业（深圳）有限公司 硬盘工作状态监控系统及方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6483107B1 (en) * 1999-05-11 2002-11-19 Josef Rabinovitz Canister having a combined guide rail and light pipe system for use in a computer peripheral enclosure
USRE40866E1 (en) * 2000-09-27 2009-08-04 Huron Ip Llc System, method, and architecture for dynamic server power management and dynamic workload management for multiserver environment
US7334064B2 (en) * 2003-04-23 2008-02-19 Dot Hill Systems Corporation Application server blade for embedded storage appliance
US7565566B2 (en) * 2003-04-23 2009-07-21 Dot Hill Systems Corporation Network storage appliance with an integrated switch
TW201126327A (en) * 2010-01-27 2011-08-01 Compal Electronics Inc Power-saving method and system for the same
TW201516634A (zh) * 2013-10-16 2015-05-01 Wistron Corp 磁碟陣列儲存裝置、伺服器系統及其電源管理方法
TWM561247U (zh) * 2017-09-07 2018-06-01 威盛電子股份有限公司 多硬碟儲存裝置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101241417A (zh) * 2007-02-08 2008-08-13 佛山市顺德区顺达电脑厂有限公司 硬盘启动时序控制电路
CN101727399A (zh) * 2008-10-30 2010-06-09 鸿富锦精密工业（深圳）有限公司 存储装置及使用该存储装置的数据交换系统
CN103777735A (zh) * 2012-10-26 2014-05-07 英业达科技有限公司 储存装置及其节能方法
CN103793307A (zh) * 2012-10-31 2014-05-14 英业达科技有限公司 电子装置及其管理方法与机柜伺服系统
CN104166613A (zh) * 2013-05-20 2014-11-26 鸿富锦精密工业（深圳）有限公司 硬盘工作状态监控系统及方法

Also Published As

Publication number Publication date
CN211124026U (zh) 2020-07-28
TWM561247U (zh) 2018-06-01
TWI655547B (zh) 2019-04-01
TW201913392A (zh) 2019-04-01

Similar Documents

Publication Publication Date Title
US8522064B2 (en) Server system having mainboards
US7275935B2 (en) Universal backplane connection or computer storage chassis
US7584325B2 (en) Apparatus, system, and method for providing a RAID storage system in a processor blade enclosure
US20110191514A1 (en) Server system
TWI502374B (zh) 用於大型可縮放處理器設施之模組化運算供應之系統及方法中之系統板及節點卡
KR20020041281A (ko) 네트워크 스위치가 내장된 고밀도 멀티 서버 시스템
GB2405034A (en) Cooling fans for electronic modules
EP1356359A2 (en) Server array hardware architecture and system
US20030172191A1 (en) Coupling of CPU and disk drive to form a server and aggregating a plurality of servers into server farms
US10624228B2 (en) Rack mount case storage system separably coupled to body
KR20150049572A (ko) 랙 마운트 서버의 전원을 공유하기 위한 시스템 및 그 운영 방법
CN108874711B (zh) 一种优化散热的硬盘背板系统
TWI655547B (zh) 多硬碟儲存裝置
TW201337523A (zh) 電源裝置
WO2024066456A1 (zh) 服务器
CN102081432B (zh) 服务器系统
US20170142190A1 (en) Blade server
TWI546682B (zh) 藉助於混和管理路徑來管理一儲存系統之方法與裝置
US10025601B2 (en) Server capable of supporting and automatically identifying IP hard disk and SATA hard disk
TWI518249B (zh) 風扇控制器以及具該風扇控制器之伺服器系統
CN113220092A (zh) 服务器
CN111722683A (zh) 一种风扇板卡和服务器
US9858135B2 (en) Method and associated apparatus for managing a storage system
US20180285311A1 (en) Server having ip miniature computing unit
TW201519731A (zh) 機櫃

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18854371

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18854371

Country of ref document: EP

Kind code of ref document: A1