WO2019012276A1

WO2019012276A1 - Single photon detector

Info

Publication number: WO2019012276A1
Application number: PCT/GB2018/051972
Authority: WO
Inventors: Andrew Marshall; Adam CRAIG
Original assignee: University Of Lancaster
Priority date: 2017-07-11
Filing date: 2018-07-11
Publication date: 2019-01-17
Also published as: GB201711138D0

Abstract

A photon detector such as an avalanche photodiode or a single photon avalanche photodiode comprises a semiconductor device comprising an absorber region and a multiplication region. The multiplication region comprises aluminium arsenide antimonide (AIAsSb) and/or aluminium gallium arsenide antimonide (AIGaAsSb). The absorption region comprises indium gallium arsenide antimonide (InGaAsSb) and/or indium arsenide antimonide (InAsSb).

Description

Single Photon Detector

Various embodiments relate to a photon detector, and in particular to a semiconductor photon detector such as an avalanche photodiode (APD) or a single photon avalanche photodiode (SPAD).

Avalanche photodiodes (APDs) and single photon avalanche photodiodes (SPADs) are semiconductor devices that detect photons by converting incident photons into charge carriers (electrons and/or holes). Charge carriers generated within the semiconductor device are multiplied within the semiconductor device, i.e. in order to produce an output signal.

Typically, the impact ionisation process is utilised for charge carrier multiplication. Here, a bias voltage is applied to the semiconductor device to produce an electric field within the semiconductor device, so that charge carriers generated by incident photons are accelerated by the electric field. The carriers may undergo high-energy collisions with electrons bound to the semiconductor crystal lattice, thereby liberating the electrons. These electrons (and the holes left behind) are then accelerated by the electric field in the same way, and the process is repeated, thereby building an avalanche.

Currently, avalanche photodiodes (APDs) and single photon avalanche photodiodes (SPADs) are limited in their ability to detect photons to wavelengths below around 1.65 μηι (for indium gallium arsenide (InGaAs) based systems).

The Applicants believe that there remains scope for improvements to single photon detectors.

According to a first aspect, there is provided a photon detector comprising: a semiconductor device comprising an absorber region and a multiplication region;

wherein the multiplication region comprises aluminium arsenide antimonide (AIAsSb) and/or aluminium gallium arsenide antimonide (AIGaAsSb).

According to a second aspect, there is provided a method of detecting one or more photons, the method comprising:

using a semiconductor device comprising an absorber region and a multiplication region to detect a photon;

wherein the multiplication region comprises aluminium arsenide antimonide (AIAsSb) and/or aluminium gallium arsenide antimonide (AIGaAsSb). Various embodiments are concerned with a photon detector comprising a semiconductor device comprising an absorber region and a multiplication region. In various embodiments, the multiplication region comprises (is formed from) aluminium arsenide antimonide (AIAsSb) and/or aluminium gallium arsenide antimonide (AIGaAsSb).

As will be described in more detail below, the Applicants have found that the use of aluminium arsenide antimonide (AIAsSb) or aluminium gallium arsenide antimonide (AIGaAsSb) as a multiplier is particular beneficial, since it can allow the photon detector to detect photons having relatively high wavelengths (e.g. above 1.65 μηι). In particular, aluminium arsenide antimonide (AIAsSb) or aluminium gallium arsenide antimonide (AIGaAsSb) can be integrated with (i.e. lattice matched to) absorber materials that allows photons having relatively long wavelengths (e.g. above 1.65 μηι) to be detected.

Furthermore (and as will be described in more detail below) the Applicants have found that the multiplication region according to various embodiments exhibits a particularly high ionisation coefficient, gives rise to a relatively low dark count rate, and can be operated at relatively low bias voltages.

It will be appreciated, therefore, that various embodiments provide an improved photon detector.

The semiconductor device of various embodiments should be (and is in various embodiments) an avalanche photodiode (APD) or a single photon avalanche photodiode (SPAD). Thus, in various embodiments, the photon detector comprises an avalanche photodiode (APD) or a single photon avalanche

photodiode (SPAD) comprising an absorber region and a multiplication region.

In particular embodiments, the semiconductor device comprises a separate absorption and multiplication region avalanche photodiode (SAM-APD).

The semiconductor device should (and in various embodiments does) comprise a semiconductor heterostructure that includes the absorber region and the multiplication region. As such, the semiconductor device may comprise plural semiconductor layers (i.e. that are grown together into a single crystal), including an absorber layer and a multiplication layer.

The semiconductor device (the semiconductor heterostructure) may comprise a substrate, i.e. onto which each of the other layers of the plural semiconductor layers are grown. Correspondingly, the method of manufacturing the photon detector of various embodiments may comprise growing plural semiconductor layers (including the absorber layer and the multiplication layer) onto a substrate.

However, in some embodiments, the substrate may subsequently be removed from the semiconductor device, i.e. after the semiconductor device has been grown on the substrate (this may be done, for example, where it is desired to integrate the device with one or more other devices), and so the semiconductor device need not comprise a substrate.

The substrate may comprise any suitable substrate. The substrate should be (and is in various embodiments) selected so that one or more, e.g. each, of the (other) semiconductor layers can be lattice matched to the substrate. Thus, in various embodiments, the substrate is selected so that (at least) aluminium arsenide antimonide (AIAsSb) and/or aluminium gallium arsenide antimonide (AIGaAsSb) can be lattice matched to the substrate.

In various embodiments, the substrate comprises gallium antimonide (GaSb). In this regard, the Applicants have recognised that aluminium arsenide antimonide (AIAsSb) and/or aluminium gallium arsenide antimonide (AIGaAsSb) can be lattice matched to gallium antimonide (GaSb).

The semiconductor device (the semiconductor heterostructure) may optionally comprise a buffer layer, e.g. that is (grown) immediately adjacent to the substrate. Where present, the buffer layer may comprise the same semiconductor material as the substrate. Thus, in various embodiments, the buffer layer comprises gallium antimonide (GaSb).

The absorption region of the semiconductor device should be (and is in various embodiments) configured to convert each of one or more incident photons into one or more charge carriers (an electron and a hole).

The absorption region may be one particular layer of the plural

semiconductor layers, and may be a different (separate) layer to the multiplication region. The absorption region (layer) may be provided at or close to one extreme of the semiconductor device (semiconductor heterostructure), i.e. such that photons incident on the semiconductor device will be absorbed by the absorption region.

The particular (semiconductor) material that is used for the absorption region may be selected as desired. The absorption region may comprise a different (semiconductor) material to the material of the multiplication region.

The absorption region should be (and is in various embodiments) configured to convert incident photons that have a particular (relatively long) wavelength into one or more charge carriers (an electron and a hole). In this regard, longer wavelength photons have less energy, and so can be detected by smaller bandgap (semiconductor) materials. Thus, the bandgap of the absorber material may be selected such that the absorption region can convert incident photons that have a particular (relatively long) wavelength into one or more charge carriers.

In addition, the absorber material should be (and is in various embodiments) lattice matched to the other materials of the semiconductor heterostructure, i.e. to at least the aluminium arsenide antimonide (AIAsSb) or aluminium gallium arsenide antimonide (AIGaAsSb) multiplication region, and in various embodiments the (gallium antimonide) substrate. This ensures that the semiconductor device has a low internal strain and a relatively high crystal quality, which in turn reduces the dark count rate of the photon detector (e.g. which can be caused by crystal defects in the semiconductor device).

In various embodiments, the absorption region comprises indium gallium arsenide antimonide (InGaAsSb). The Applicants have found that an indium gallium arsenide antimonide (InGaAsSb) absorption region can be lattice matched to the multiplication region, and is able to detect photons having wavelengths up to around 2.2 μηι (for a given InGaAsSb composition, and a given operating temperature, at least).

In other embodiments, the absorption region comprises indium arsenide antimonide (InAsSb). The Applicants have found that a photon detector comprising an indium arsenide antimonide (InAsSb) absorption region can be lattice matched to the multiplication region, and is able to detect photons having wavelengths up to around 3.8 μηι (for a given operating temperature at least).

According to various other embodiments, the absorption region may comprise a (type 2) super-lattice or strained layer super-lattice (SLS), i.e.

comprising alternating layers of two or more different semiconductor materials. The Applicants have recognised that a strained layer super-lattice (SLS) absorption region can be (in effect) lattice matched to the multiplication region of various embodiments, and can be configured to detect photons having any desired wavelength, e.g. up to 20 μηι, and beyond.

According to various other embodiments, the absorption region may comprise a layer of quantum dots.

According to various other embodiments, the absorption region may comprise a dilute alloy layer, i.e. comprising a particular semiconductor (such as InGaAsSb or InAsSb) comprising a very low concentration of some other material that causes the bandgap of the particular semiconductor to be decreased (and its absorption wavelength to be increased). Suitable dilute materials include, for example, bismuth and nitrogen.

Other types of absorption region would be possible.

The ability of the photon detector of various embodiments to detect light with a relatively high wavelength means that the photon detector can be (and in various embodiments is) used for light detection in the presence of obscurant media, such as water (e.g. clouds), smoke, sand, or snow, and the like.

The multiplication region of the semiconductor device should be (and is in various embodiments) configured to multiply charge carriers (e.g. that are generated within the absorption region and/or the multiplication region), e.g. by means of the impact ionisation process.

The multiplication region should (and in various embodiments does) comprise one or more semiconductor layers of the plural layers of the

semiconductor heterostructure. The multiplication region (layer) may be provided at or close to the opposite extreme of the semiconductor device (semiconductor heterostructure) as the absorption region.

The multiplication region comprises aluminium arsenide antimonide

(AIAsSb) or aluminium gallium arsenide antimonide (AIGaAsSb). The Applicants have found that these materials can be lattice matched with the absorber materials of various embodiments (as described above), exhibit a particularly high ionisation coefficient (and therefore multiplication gain), and exhibit a relatively low tunnelling rate (and therefore dark count rate).

The aluminium content x and/or the arsenide content y of the aluminium gallium arsenide antimonide

may be selected as desired. The aluminium content x and/or the arsenide content y of the aluminium gallium arsenide antimonide

may be fixed throughout the layer in question or the ratio(s) may vary, e.g. may form a composition-gradient.

In various embodiments, the aluminium content x of the aluminium gallium arsenide antimonide

is relatively high, in various embodiments as high as possible. In this regard, the Applicants have recognised that aluminium gallium arsenide antimonide

alloys with a higher aluminium content have a larger bandgap (and that aluminium arsenide antimonide (AIAsSb) has the highest bandgap of these materials), and that higher bandgap materials beneficially lead to a lower tunnelling rate, and in turn to a lower dark count rate. On the other hand, alloys with a higher aluminium content are more susceptible to deleterious oxidisation processes.

Thus, in various embodiments, the multiplication region comprises aluminium gallium arsenide antimonide

with a relatively high aluminium content x, i.e. greater than 60 % (and so x≥ 0.6).

The Applicants have found that such materials are sufficiently robust with respect to oxidisation processes, can be lattice matched with the absorber materials of various embodiments (as described above), exhibit a particularly high ionisation coefficient (and therefore multiplication gain), and have a relatively large bandgap (and so exhibit a relatively low tunnelling rate, and dark count rate).

The aluminium content x of the aluminium gallium arsenide antimonide

may be selected from the group consisting of: (i) 0.6≤ x≤ 0.7; (ii) 0.7≤ x≤ 0.8; (iii) 0.8≤ x≤ 0.9; and (iv) 0.9≤ x≤ 1.0.

In particular embodiments, the aluminium content x of the aluminium gallium arsenide antimonide

is 0.9.

The arsenide content y of the aluminium gallium arsenide antimonide

may be selected to ensure that the alloy is lattice matched with the absorber materials of various embodiments (as described above), and in various embodiments the (gallium antimonide) substrate. In various embodiments, the arsenide content y of the aluminium gallium arsenide antimonide (Al_xGa₍₁.

X₎AS_ySb₍₁.y)) is relatively low, i.e. is less than 40 % (and so y < 0.4). The arsenide content y of the aluminium gallium arsenide antimonide

may be selected from the group consisting of: (i) 0.3≤ y≤ 0.4; (ii) 0.2≤ y≤ 0.3; (iii) 0.1≤ y≤ 0.2; and (iv) 0.1≤y≤0.0.

In particular embodiments, the arsenide content y of the aluminium gallium arsenide antimonide

is 0.08.

Thus, in particular embodiments, the multiplication region comprises (is formed from) Alo.9Gao.1Aso.08Sbo.92- The Applicants have found that this particular quaternary material is particular suited for use in a multiplication region, since for example, it is well lattice matched with the absorber materials of various embodiments (as described above), has a relatively high ionisation coefficient (and therefore multiplication gain), and a relatively low tunnelling rate. The multiplication region (layer) may have any suitable thickness. In various embodiments, the multiplication region (layer) is relatively thin, i.e. has a thickness (in the growth direction) < 1 μηι. This is possible since, as described above, the multiplication materials of the various embodiments exhibit a particularly high ionisation coefficient (and therefore multiplication gain).

Furthermore, providing a relatively thin multiplication region (layer) is beneficial since a thinner multiplication region requires that a lower bias voltage is applied to the device in order to produce a given electric field within the

multiplication region (layer). Thus, reducing the thickness of the multiplication region reduces the operation voltage of the photon detector.

The thickness of the multiplication region (layer) may be selected from the group consisting of: (i) < 1 μηι; (ii) < 0.9 μηι; (iii) < 0.8 μηι; (iv) < 0.7 μηι; (v) < 0.6 μηι; (vi) < 0.5 μηι; (vii) < 0.4 μηι; (viii) < 0.3 μηι; (ix) < 0.2 μηι; and (x) < 0.1 μηι.

It would be possible for the absorption region (layer) and the multiplication region (layer) to be immediately adjacent to one another (i.e. within the

semiconductor heterostructure). However, in various embodiments, one or more semiconductor layers are provided between the absorption layer and the

multiplication layer. These intermediate layers may comprise any suitable semiconductor layers.

In various embodiments, a so-called "charge sheet" is provided between the absorption layer and the multiplication layer. The charge sheet may operate as a field stop, i.e. to control the electric field that is applied across the absorption layer and the multiplication layer. The charge sheet may be provided adjacent to the multiplication region (layer) (i.e. within the semiconductor heterostructure).

The particular (semiconductor) material that is used for the charge sheet may be selected as desired. The charge sheet material should be (and is in various embodiments) lattice matched to the other materials of the semiconductor heterostructure. Suitable materials for the charge sheet include, for example, doped (e.g. p-doped) aluminium gallium arsenide antimonide (AIGaAsSb).

The charge sheet (layer) may have any suitable thickness. In various embodiments, the charge sheet (layer) is relatively thin, i.e. has a thickness (in the growth direction) of 30 nm or less.

Additionally or alternatively, one or more grading layers may be provided between the absorption region and the multiplication region that have a bandgap (or bandgaps) intermediate to the bandgaps of the absorption region and the multiplication region.

In this regard, the Applicants have recognised that the transfer of charge carriers between the absorption region and the multiplication region is particularly important for the operation of the photon detector of various embodiments. The Applicants have furthermore recognised that, although an electric field within the semiconductor device will cause charge carriers to move from the absorption region to the multiplication region, since according to various embodiments, the difference in bandgap between the two layers can be relatively large, it is possible that some of the charge carriers will be trapped by the potential barrier formed by the multiplication region (i.e. that may have a relatively wide bandgap). This can reduce the efficiency of the device.

The Applicants have found that the provision of one or more grading layers between the absorption region and the multiplication region can increase the charge transfer rate between the absorption region and the multiplication region and can thereby increase the efficiency of the device.

The one or more grading layers may be one or more particular layers of the plural semiconductor layers. The one or more grading layers may be provided adjacent to the absorption region (layer) (i.e. within the semiconductor

heterostructure).

The particular (semiconductor) material that is used for the one or more grading layers may be selected as desired (so long it has a bandgap intermediate to the bandgaps of the absorption region and the multiplication region). The grading layer material should be (and is in various embodiments) lattice matched to the other materials of the semiconductor heterostructure. Suitable materials for the one or more grading layers include gallium antimonide (GaSb), gallium indium arsenide antimonide (GalnAsSb), and aluminium gallium indium arsenide antimonide (AIGalnAsSb).

The one or more grading layers may have any suitable thickness. In various embodiments, the grading layer is relatively thin, i.e. has a thickness (in the growth direction) of 20 nm or less. In particular embodiments, the grading layer has a thickness of around 16 nm.

In various embodiments, the semiconductor device comprises one or more doped regions, e.g. a p-type region and an n-type region. The p-type and n-type regions may be provided in any suitable layer or layers of the semiconductor device, e.g. by appropriately doping that layer.

In various embodiments, the p-type region and an n-type region are provided at or close to opposite extremes of the semiconductor device

(semiconductor heterostructure), i.e. so that an electric field can be applied across the semiconductor device (semiconductor heterostructure), to ensure that charge carriers are accelerated within the device.

In various embodiments, one of the doped regions is provided within the absorption region (layer), e.g. at or close to one extreme of the absorption region (layer) (and in various embodiments at or close to one extreme of the

semiconductor device (semiconductor heterostructure)). As such, in various embodiments, the absorption region comprises a doped region and an undoped region.

In various embodiments, this doped region is p-doped. As such, in various embodiments, the doped region of the absorption region comprises p-doped indium gallium arsenide antimonide (InGaAsSb) or p-doped indium arsenide antimonide (InAsSb). In other embodiments the polarity is reversed. Thus in various other embodiments, this doped region is n-doped.

Other arrangements would, however, be possible.

In various embodiments, the other of the doped regions is provided within the multiplication region (layer), e.g. at or close to one extreme of the multiplication region (layer) (and in various embodiments at or close to the other extreme of the semiconductor device (semiconductor heterostructure)). As such, in various embodiments, the multiplication region comprises a doped region and an undoped region. It would also be possible for the multiplication region to comprise only a doped region (i.e. for all of the multiplication region to be doped).

This doped region may be n-doped. As such, in various embodiments, the doped region of the multiplication region comprises n-doped aluminium arsenide antimonide (AIAsSb) or n-doped aluminium gallium arsenide antimonide

(AIGaAsSb).

The semiconductor device may be configured such that light is laterally confined. The lateral optical confinement may be achieved in any suitable manner.

In various embodiments, the semiconductor device comprises a mesa or a pillar such as a micropillar. A mesa or pillar may be formed, for example, by suitably etching a semiconductor wafer or chip. The mesa or pillar may have any suitable cross-section, such as an elliptical, square or circular cross-section. The mesa or pillar may have any suitable form, such as an elliptical prism. In this case, the cross-sectional area of the elliptical prism may be constant or may vary, e.g. may taper or diverge.

Thus, in various embodiments, the semiconductor device is formed from a semiconductor heterostructure (wafer or chip) that has been etched or otherwise formed into one or more mesa or pillar structures.

Other techniques for lateral optical confinement may additionally or alternatively be used.

In various embodiments, dielectric passivation is used to prevent or reduce lateral oxidisation of the mesa or pillar structure(s). This maintains low leakage dark count rate during operation. Thus, in various embodiments a dielectric material is applied to the side walls of the mesa or pillar structure(s). Suitable such materials include, for example, SU8 and BCB.

The semiconductor device may be in the form of a solid state photo- electronic device (i.e. an APD or an SPAD). Thus, the semiconductor device may comprise electrical contacts. The electrical contacts may be configured to allow a voltage to be applied across (at least) the multiplication region and the absorption region.

A first electrical contact may be arranged to contact the p-type region and a second electrical contact may be arranged to contact the n-type region, e.g. to thereby facilitate application of an electrical bias therebetween.

The electrical contacts may be configured to contact the p-type and n-type regions at any suitable position within the semiconductor heterostructure. For example, one or more of the contacts may be configured to contact one or more extremities of the semiconductor device, and/or one or more of the contacts may be configured to contact the doped region of the multiplication region.

The photon detector of various embodiments may comprises control circuitry operable to apply a (bias) voltage to the semiconductor device.

The control circuitry may comprise any suitable such circuitry that is operable to apply a (bias) voltage to the semiconductor device. The control circuitry may comprise or may form part of a voltage source or similar.

The control circuitry may apply any suitable voltage to the semiconductor device. The photon detector may be operated as an avalanche photodiode (APD), e.g. where the voltage applied to the semiconductor device is less than the breakdown voltage of the semiconductor device. Additionally or alternatively, the semiconductor device may be operated as a single photon avalanche photodiode (SPAD), e.g. where the applied voltage is greater than (or equal to) the breakdown voltage of the semiconductor device (i.e. the semiconductor device may be operated in Geiger mode).

The applied voltage may be constant and/or pulsed. In various

embodiments, a substantially constant DC voltage is applied to the semiconductor device, e.g. at a level below the breakdown voltage of the semiconductor device, together with a series of voltage pulses having an amplitude selected such that the total applied voltage is greater than the breakdown voltage of the semiconductor device.

In various embodiments, the (total) applied voltage (the operation voltage) is: (i) < 20 V; (ii) < 19 V; (iii) < 18 V; (iv) < 17 V; (v) < 16 V; or (vi) < 15 V. In various embodiments, the applied voltage (the operation voltage) is between 13-15 V.

It should be noted that this is a relatively low voltage, e.g. when compared with known APDs and SPADs. Thus, a particular benefit of various embodiments is that the photon detector can be operated with a relatively low applied voltage. This has the effect of reducing the complexity of the photon detector, and also reduces the power consumption of the photon detector.

Moreover, these voltages mean that the photon detector is compatible with other semiconductor technologies, such as in particular, silicon based

semiconductor devices and integrated circuits. In this regard, the Applicants have recognised that existing APD and SPAD devices can be incompatible with silicon based semiconductor devices primarily because of the relatively high voltages required by existing APD and SPAD devices.

The relatively low operation voltages of the photon detector mean, in particular, that the photon detector of various embodiments can be integrated with silicon control circuitry. This then allows the photon detector of various

embodiments to be used in the form of a detector array, i.e. where each element of the array comprises appropriate (silicon) control circuitry configured to control the respective photon detector element.

Thus, according to various embodiments, the semiconductor device comprises one such semiconductor device of an array, matrix or grid of plural semiconductor devices. Correspondingly, according to various embodiments, there is provided a photon detector comprising an array, matrix or grid of semiconductor devices, wherein each semiconductor device comprises an absorber region and a multiplication region, and wherein each multiplication region comprises aluminium arsenide antimonide (AIAsSb) or aluminium gallium arsenide antimonide

(AIGaAsSb).

In these embodiments, the photon detector may further comprise an array, matrix or grid of (silicon based) control elements. The control elements may comprise one or more read out integrated circuits (ROICs).

The array, matrix or grid of control elements may correspond to the array, matrix or grid of semiconductor devices. Each photon detector device in the array, matrix or grid may be (individually) coupled to (and controlled by) the corresponding control element in the array, matrix or grid of control elements.

The photon detector according to these embodiments can be (and is in various embodiments) used to detect a two-dimensional image.

Various embodiments also extend to the formation of the photon detector.

Thus, according to a third aspect, there is provided a method of making a photon detector comprising:

forming a semiconductor device comprising an absorption region and a multiplication region;

wherein the multiplication region comprises aluminium arsenide antimonide (AIAsSb) or aluminium gallium arsenide antimonide (AIGaAsSb).

This aspect can, and in various embodiments does, comprises any one or more or all of the optional features described herein, as appropriate.

In these aspects and embodiments, forming the semiconductor device may comprise growing a semiconductor wafer comprising an absorption layer and a multiplication layer, e.g. using molecular beam epitaxy (MBE) or any other suitable technique. Forming the semiconductor device may further comprise etching the semiconductor wafer to form one or more mesa structures, and/or implanting ions of another element to define individual detecting elements. A dielectric such as SU8 or BCB may (then) be applied to (spun on to) the device, e.g. in order to passivate the mesa side walls.

Various embodiments will now be described, by way of example only, and with reference to the accompanying drawings in which: Figure 1 shows an XRD Bragg scan for a photon detector formed according to an embodiment;

Figure 2 shows a 1 D array of photon detectors (at high magnification) formed in accordance with an embodiment;

Figure 3 shows the room temperature current-voltage response of a photon detector according to an embodiment;

Figure 4A shows current-voltage characteristics at 77 K for a photon detector according to an embodiment, and Figure 4B shows current-voltage characteristics at 77 K for another photon detector according to an embodiment;

Figure 5A shows spectral response measurements for a photon detector according to an embodiment (dark line) together with an atmospheric absorption spectrum (grey line), and Figure 5B shows spectral response measurements for another photon detector according to an embodiment (dark line) together with an atmospheric absorption spectrum (grey line);

Figure 6 shows the cumulative breakdown probability as a function of time and an exponential fitting (dashed line) for a photon detector according to an embodiment;

Figure 7 A shows dark count rates as a function of overbias, as measured at 77K with background radiation excluded, for a photon detector according to an embodiment, and Figure 7B shows dark count rate as a function of overbias, as measured at 77 K with background radiation excluded, for another photon detector according to an embodiment;

Figure 8 shows a layer structure of a photon detector in accordance with an embodiment; and

Figure 9 shows a layer structure of a photon detector in accordance with an embodiment.

Like reference numerals are used for like components throughout the drawings, where appropriate.

Various embodiments will now be described with reference to the Figures. Light (e.g. visible or infrared) has wave-like behaviour in many respects, but the minimum signal level that can be detected is determined by the particulate form of light, i.e. photons. The fundamental signal limit is the detection of a single photon. This may be achieved using either a photo-multiplier tube or its

semiconductor equivalent, a single photon avalanche photodiode ("SPAD"). SPAD devices are desirable in offering the ability to resolve signal levels unreachable by other photo-sensors (such as simple photodiodes or micro- bolometers).

A SPAD is a specific type of avalanche photodiode ("APD"). APDs operate by multiplication of electrons (and/or holes) generated by incident photons.

A suitable APD multiplication process is impact ionisation. Here, the first electron (or hole) generated directly by the photon, is accelerated by a strong electric field, and may undergo a high-energy collision with further electrons bound to the semiconductor crystal lattice, thereby liberating them. These further electrons and the holes left behind are then accelerated by the electric field in the same way, and the process repeats, thereby building an avalanche.

The opposite directions of travel for electrons and holes within the electric field introduce feedback as they both undergo further impact ionisation. As a result, the total multiplication, or "gain", depends exponentially on the electric field and, in turn, the voltage applied to the device.

For a SPAD in particular, the electric field is held at a level where a single electron (or hole), generated by a single photon, can undergo pseudo infinite multiplication and generate a macroscopic current pulse, allowing the single photon to be detected. The impact ionisation process is stochastic in nature, and hence to ensure a high probability of achieving a pseudo infinite multiplication for any single primary carrier, SPADs are typically operated beyond their breakdown voltage, where the average carrier gain tends to infinity, a mode termed as Geiger mode.

Through their ability to detect low photon fluxes (low signal levels) SPAD devices have potential for imaging systems designed to penetrate obscurant media (such as sand, snow or smoke). As a result, these devices are attractive for low light intensity applications.

However, currently available SPAD devices are typically limited in their wavelength of operation to, at best around < 1.65 μηι (for indium gallium arsenide (InGaAs) based systems). More typically, SPADs may be fabricated from silicon limiting the wavelength of operation to around < 1 μηι. Unfortunately, these spectral ranges are inherently limited by atmospheric absorption, generally by water, and also by background radiation from the sun, in the case of active imaging.

Imaging at longer wavelengths (such as 2 μηι or greater), offers greater penetration of obscurant media when compared with visible or near-infrared (NIR) wavelengths. It is therefore desirable to develop improved SPAD devices operating at such longer wavelengths, where the effects of obscurants are weaker.

In the growth of lll-V materials, one or more group III elements from the periodic table (aluminium, gallium, indium, etc.) is combined with one or more group V elements (phosphorus, arsenic, antimony, etc.) to form crystal layers which may be used to form device structures. It is relatively straightforward to alloy multiple group III compounds. For example, in a deposition process the alloy composition simply depends on the ratio of the elemental fluxes.

However, alloying of ternary and quaternary materials, with both arsenic and antimony fractional content is non-trivial. This is believed to be due to due to competition between arsenic dimers and antimony dimers on the crystal surface. Specifically, arsenic is typically adsorbed more readily than antimony, where the exact ratio depends on the growth temperature.

As noted above, InGaAs-based SPADs offer photosensitivity in the NIR spectral range. However, to gain access to longer wavelengths, a new material system is needed. The use of an indium phosphide substrate, whilst attractive due to low cost and the availability of large diameter wafers, allows only for NIR absorber materials (e.g. InGaAs) (i.e. that can be lattice matched with the indium phosphide substrate).

However, the Applicants have recognised that a wide variety of longer wavelength antimony-based absorbers can be used if a gallium antimonide substrate is chosen. These include materials suitable for the extended short wave infrared (eSWIR) range (> 2 μηι), the mid-wave infrared (MWIR) range (3-5 μηι), and, in principle, the long wave infrared (LWIR) range (8-12 μηι).

However, in order to develop a SPAD on a gallium antimonide substrate, a suitable multiplication material must first be found. The multiplication material requires suitable ionisation coefficients, but also a low susceptibility to dark currents due to tunnelling (which is typically lower for wider bandgap materials).

The Applicants have identified aluminium arsenide antimonide (AIAsSb) or aluminium gallium arsenide antimonide (AIGaAsSb) as a suitable material for a

SPAD multiplication region. While little or no literature describes the properties of this material system, it is attractive because of the availability of native antimony- based absorbers.

The Applicants have identified, in particular, an aluminium antimonide-rich quaternary, Alo.9Gao.1Aso.08Sbo.92, which can be lattice- matched to gallium antimonide. It will be appreciated, however, that the multiplication layer need not have this exact alloy composition, and other similar materials may be used.

A number of devices were produced in accordance with various

embodiments, where all crystal growth was carried out by molecular beam epitaxy (MBE). Growth was carried out by M BE on GaSb substrates.

Two designs were investigated in detail, with "eSWIR" and "sMWIR" absorbers, respectively. The eSWIR absorber was grown using a quaternary alloy rich in gallium antimonide, namely indium gallium arsenide antimonide (InGaAsSb). The sMWIR absorber was grown using indium arsenide antimonide (InAsSb).

Both designs were lattice matched to gallium antimonide (GaSb). For these alloys, a series of calibration growths were used to adjust the composition to achieve minimal strain, for optimised crystal quality.

This is reflected in Figure 1 , which shows X-ray diffraction measurements for the eSWIR sample (grown on a 2 inch gallium antimonide substrate), in which closely spaced peaks are visible, thereby indicating low strain. The strain was calculated (based on the separation between the peaks) to be <500 ppm for both designs.

Device processing was carried out in the clean room facility at the Quantum

Technology Centre (QTC) at Lancaster University. A single element design (SED) was used for the sMWIR device. For the eSWIR device, a linear array "XAC275" with 28 μηι x 16 μηι mesas, remote pads for electrical contacts and dielectric passivation was fabricated.

The dielectric material stops oxidation of the aluminium-rich multiplication layer and ensures long term reliability. SU8 and BCB were found to be effective at preventing oxidisation damage to the detector surface under atmospheric exposure, and maintaining extremely low leakage. The successful incorporation of this dielectric represents a significant step forwards in the development of new SPAD technology.

A citric acid-based etchant was used to define a mesa for each of plural SPAD devices. HF was combined with citric acid and used to define the mesas. This was effective in preventing the formation of unstable (oxidation) device sidewalls.

Figure 2 shows the eSWIR 1 D array at high magnification, with bond pads 21 fabricated on silicon nitride on the left and right hand extremes of the image, and gold tracks 22 travelling across the dielectric to the mesas 23, in the centre of the image.

Both eSWIR and sMWIR designs were tested at 77 K using liquid nitrogen. This operating temperature is readily achieved in the field, e.g. using Stirling engine coolers, which are widely available.

Dark count rates (DCRs) were established using a pulse generator, a stable DC bias supply, an oscilloscope and a simple custom circuit.

A Bruker Vertex 70 Fourier transform infrared (FTIR) spectrometer was used to measure the spectral response, or the relative signal response, as a function of wavelength, for each sample.

Further samples were fabricated to perform a focused evaluation of the properties of the aluminium antimonide-based multiplication material, and to facilitate design refinements.

Figure 3 shows the room temperature response of the eSWIR array to a 1 mW 1.55 μηι fibre-coupled laser (this laser was selected for convenience, operation with another, e.g. 2 μηι, source would be essentially identical).

The three plots represent dark current (dark line), illuminated current (grey line) and photo-current (dashed line). It can be seen that the photocurrent (the difference in the current flowing due to incident radiation) rises rapidly at around -1 1 V. This is indicative of punch through, i.e. the controlled spreading of the electric field into the absorption layer, as is required for operation.

Dark current measurements were performed at 77 K. The results are shown in Figure 4. Figure 4A shows current-voltage characteristics at 77 K for the eSWIR XAC275 linear array, and Figure 4B shows current-voltage characteristics at 77 K for the MWIR design. The results show abrupt breakdowns and an absence of tunnelling for both designs.

It should be noted that there is an inherent noise floor associated with the measurement instrumentation. As a result, the current level between zero bias and about -14 volts reflects the noise floor of the meter, and not the current flowing in the device (which will be lower). The difference in noise floor between the eSWIR and sMWIR measurement relates to the use of different meters.

It can be seen that avalanche breakdown occurs at 13.7 V and 12.8 V, for the eSWIR and sMWIR designs, respectively. This means that a chain of multiplication events occurs due to one (or more) thermally generated electrons flowing in the device. Under Geiger mode operating bias (at bias conditions above breakdown, or over-bias) avalanche events can be triggered either by thermally generated electrons, or by electrons(s) generated due to incident photon(s).

In the absence of incident radiation, thermal avalanche events necessarily occur at random, with the cumulative probability of a breakdown event exponentially tending to unity over time. The shape of this exponential dependence has a characteristic time, which is the reciprocal of the dark count rate.

It can be seen from Figure 4, that there is little or no dark current prior to the avalanche breakdown. This indicates an absence of deleterious tunnelling processes in the devices, which generate electrons rapidly and cause excessive dark counts.

It can also be seen from Figure 4 that punch through occurs at smaller applied bias than avalanche breakdown. This means that there is a high probability that avalanche breakdown can be triggered by incident radiation, even by a single photon.

Figures 5A and 5B show spectral response measurements, indicating the spectral range of each design. Figure 5A shows spectral response measurements for the eSWIR XAC260 linear array, and Figure 5B shows spectral response measurements for the MWIR single element design. The dark line shows detector response and the grey line shows the atmospheric absorption spectrum.

The spectral response measurements show sensitivity out to 2.2 μηι and 3.8 μηι, for the eSWIR and sMWIR designs, respectively. It is readily apparent that the detectors have sensitivity within the ranges not covered by absorption, indicating that these devices are sensitive in the presence of water vapour (for example due to cloud, mist, fog or high humidity). These spectral ranges are improved in comparison to <1.6 μηι (InGaAs) and <1 μηι (Si) devices.

Dark count rates were determined at 77 K for both eSWIR and MWIR devices. This was done using a custom-made circuit that operates as follows.

A constant DC bias was applied to the device, at a level of roughly 90% of the breakdown voltage. The bias was drawn from a battery, in order to eliminate 50 Hz noise (present, e.g., in DC derived from UK mains electricity).

A pulse generator was used to produce a square wave with variable amplitude, which was then passed through a DC-blocking capacitor and connected in parallel with the DC bias. The arrangement served to transition the bias across the device through the breakdown voltage at regular intervals. When the total bias applied to the device is above the breakdown voltage, the device is susceptible to avalanche breakdown, i.e. is primed to detect the first photon. As discussed above, in the absence of incident radiation, this breakdown is triggered after a stochastic time by a thermally generated electron (i.e. after a random interval).

Before avalanche breakdown, the device is highly resistive. However, when breakdown is triggered, the device passes current freely, so that the applied bias falls across a resistor placed in series with the device. By monitoring the voltage across the resistor, the timing of the avalanche can be determined.

The distribution of the breakdown probability was established from many over-bias cycles. This was fitted to an exponential function, yielding the dark count rate.

An example of the fitting is shown in Figure 6. Figure 6 shows cumulative breakdown probability as a function of time for the XAC275 device at 77 K with an overbias voltage of 700 millivolts. An exponential fitting (dashed line) yielded a dark count rate figure of 130 kHz.

Figure 7A shows dark count rates as a function of overbias, as measured at 77K with background radiation excluded, for the SWIR linear array XAC 275, and Figure 7B shows dark count rate as a function of overbias, as measured at 77 K with background radiation excluded, for the sMWIR single element design. An exponential dependence on the over-bias is evident for both figures.

It can be seen that the dark count rate testing showed DCRs below 200 kHz for > 0.5 V over-bias for both designs.

Figure 8 shows a layer structure for an APD or SPAD in accordance with an embodiment. As shown in Figure 8, the semiconductor heterostructure comprises a gallium antimonide (GaSB) substrate 81. A 0.7 μηι thick contact/cladding layer 82 of n-doped aluminium gallium arsenide antimonide (AIGaAsSb) is grown on the substrate 81 , followed by a 0.25 μηι thick multiplication layer 83 of undoped aluminium gallium arsenide antimonide (AIGaAsSb), and a 30 nm thick charge sheet layer 84 of p-doped aluminium gallium arsenide antimonide (AIGaAsSb). Next, a 16 nm thick grading layer 85 of not-intentionally-doped (NID) gallium antimonide (GaSb) is grown on the aluminium gallium arsenide antimonide

(AIGaAsSb). This is followed by a 1.4 μηι thick absorption layer 86 of undoped indium arsenide antimonide (InAsSb), and a 0.25 μηι thick contact layer 87 of p- doped indium arsenide antimonide (InAsSb). Figure 9 shows a layer structure for an APD or SPAD in accordance with various other embodiments. As shown in Figure 9, the semiconductor

heterostructure comprises a gallium antimonide (GaSb) substrate 91. A

contact/cladding layer 92 of doped aluminium gallium arsenide antimonide

(AIGaAsSb) is grown on the substrate 91 , followed by a multiplication layer 93 of undoped aluminium gallium arsenide antimonide (AIGaAsSb), and a charge sheet layer 94 of doped aluminium gallium arsenide antimonide (AIGaAsSb). Next, a grading layer 95 is grown on the aluminium gallium arsenide antimonide

(AIGaAsSb). This is followed by an absorption layer 96, and a doped

cladding/contact layer 97. As shown in Figure 9, the absorption layer 96, and the doped cladding/contact layer 97 may be formed using indium gallium arsenide antimonide (InGaAsSb), indium arsenide antimonide (InAsSb), or a type 2 strained layer superlatice (SLS).

It will be appreciated that various embodiments are directed to extended wavelength IR-SPAD devices. It is believed that the sMWIR device is the first demonstration of a Geiger mode SPAD operating at such long wavelengths (3.8 μΓΠ).

The operating voltage of the devices according to various embodiments is uniquely low for SPADs. In particular, the breakdown (operating) voltage is reduced to 13-15 V with tunnelling currents absent. This brings the devices into the operating bias range for "off the shelf" integrated circuits. For example, the devices may be used in a focal plane array and integrated with ROICs (read-out ICs).

Related to this, the ionisation coefficients are higher than for current state of the art materials, i.e. aluminium indium arsenide, within a useful electric field range. As such, so lower fields, and hence lower bias, are required for operation.

Although the above designs were described in terms of a 1 D array of eSWIR devices, and a single element sMWIR device, it would be possible to implement the sMWIR design in a linear array format and/or to implement one or both devices in a 2D array.

In addition, the use of gallium antimonide-based materials allows for many absorbers sensitive from UV through visible and near IR and on into the short wave infrared, mid wave infrared and, in principle, even long wave infrared wavelengths. For example, strained layer super-lattice absorbers may be used, including a super- lattice comprised of alternating layers of InAs and GaSb or a super-lattice comprised of alternating layers of InAs and InAsSb. In general, the absorber region may use: bulk materials, strained layer super-lattices, quantum dots, and/or dilute alloys.

According to various embodiments, one or more intermediate layers are provided between the absorber and multiplication layers. This may be comprised of binary GaSb or another alloy or super-lattice. This can allow for improved transport of carriers between the regions by dividing the band offsets into smaller steps. This in turns provides improved photo-collection.

It can be seen from the above that various embodiments enable single photon detection at relatively long wavelengths. This is achieved, in various embodiments at least, by providing a photon detector comprising a semiconductor device comprising an absorber region and a multiplication region, wherein the multiplication region comprises aluminium arsenide antimonide (AIAsSb) or aluminium gallium arsenide antimonide (AIGaAsSb).

Claims

1. A photon detector comprising:

a semiconductor device comprising an absorber region and a multiplication region;

wherein the multiplication region comprises aluminium arsenide antimonide (AIAsSb) and/or aluminium gallium arsenide antimonide (AIGaAsSb); and

wherein the absorber region comprises indium gallium arsenide antimonide (InGaAsSb) and/or indium arsenide antimonide (InAsSb).

2. The photon detector of claim 1 , wherein the semiconductor device comprises a single photon avalanche photodiode (SPAD).

3. The photon detector of claim 1 or 2, wherein the absorption region comprises: (i) a super-lattice or strained layer super-lattice (SLS); (ii) one or more layers of quantum dots; and/or (iii) a dilute alloy.

4. The photon detector of claim 1 , 2 or 3, wherein the multiplication region comprises aluminium gallium arsenide antimonide (AIGaAsSb).

5. The photon detector of any one of the preceding claims, wherein the multiplication region comprises aluminium gallium arsenide antimonide (Al_xGa₍₁. _X)AS_ySb₍₁._y)) having an aluminium content x greater than 60 %.

6. The photon detector of any one of the preceding claims, wherein:

the semiconductor device further comprises one or more grading layers between the absorption region and the multiplication region; and

the one or more grading layers have a bandgap or bandgaps between the absorption region bandgap and the multiplication region bandgap.

7. The photon detector of claim 6, wherein the one or more grading layers comprises gallium antimonide (GaSb), gallium indium arsenide antimonide (GalnAsSb), and/or aluminium gallium indium arsenide antimonide (AIGalnAsSb).

8. The photon detector of any one of the preceding claims, further comprising control circuitry operable to apply a voltage to the semiconductor device, wherein the voltage is less than 20 V.

9. The photon detector of claim 8, wherein the voltage is greater than the breakdown voltage of the semiconductor device.

10. The photon detector of any one of the preceding claims, comprising:

an array, matrix or grid of semiconductor devices; and

an array, matrix or grid of control elements;

wherein each semiconductor device in the array, matrix or grid of semiconductor devices is coupled to a corresponding control element in the array, matrix or grid of control elements.

1 1. A method of detecting one or more photons, the method comprising:

wherein the absorber region comprises indium gallium arsenide antimonide

(InGaAsSb) and/or indium arsenide antimonide (InAsSb).

12. A method of making a photon detector comprising:

13. The method of claim 1 1 or 12, wherein the semiconductor device comprises a single photon avalanche photodiode (SPAD).

14. The method of any one of claims 1 1-13, wherein the absorption region comprises: (i) a super-lattice or strained layer super-lattice (SLS); (ii) one or more layers of quantum dots; and/or (iii) a dilute alloy.

15. The method of any one of claims 11-14, wherein the multiplication region comprises aluminium gallium arsenide antimonide (AIGaAsSb).

16. The method of any one of claims 1 1-15, wherein the multiplication region comprises aluminium gallium arsenide antimonide (Al_xGa^AS_ySb^._y)) having an aluminium content x greater than 60 %.

17. The method of any one of claims 1 1-16, wherein:

18. The method of claim 17, wherein the one or more grading layers comprises gallium antimonide (GaSb), gallium indium arsenide antimonide (GalnAsSb), and/or aluminium gallium indium arsenide antimonide (AIGalnAsSb).

19. The method of any one of claims 1 1-19, further comprising applying a voltage to the semiconductor device, wherein the voltage is less than 20 V.

20. The photon detector of claim 19, wherein the voltage is greater than the breakdown voltage of the semiconductor device.

21. The method of any one of claims 11-20, further comprising:

forming an array, matrix or grid of semiconductor devices;

forming an array, matrix or grid of control elements; and

coupling each semiconductor device in the array, matrix or grid of semiconductor devices to a corresponding control element in the array, matrix or grid of control elements.