WO2019001858A1

WO2019001858A1 - Measurement method using an inductive displacement sensor

Info

Publication number: WO2019001858A1
Application number: PCT/EP2018/063791
Authority: WO
Inventors: Frédéric Bocage; Daniel SAUVENT
Original assignee: Safran Electronics & Defense
Priority date: 2017-06-30
Filing date: 2018-05-25
Publication date: 2019-01-03

Abstract

A measurement method using an inductive displacement sensor (1) that comprises a transformer and a magnetic core (2), the transformer comprising a primary winding (3) and two secondary windings (4, 5), the measurement method comprising: - an excitation phase; - an acquisition phase; - a first main processing phase implemented at two measurements voltages and comprising the steps, for each measurement voltage, of: multiplying the measurement voltage by a reference sine function and by a reference cosine function; carrying out a first integration of each resulting signal on a sliding window having a width equal to the excitation period; carrying out a second integration of each integrated signal on a sliding window having a width equal to an excitation half-period; producing an amplitude of the measurement voltage; - a first final processing phase comprising the step of producing an estimation of a position of the magnetic core.

Description

MEASURING METHOD USING A SENSOR

INDUCTIVE MOVEMENT

The invention relates to the field of measurement methods using an inductive displacement sensor.

BACKGROUND OF THE INVENTION

With reference to FIG. 1, an LVDT sensor 1 (Linear Variable Differential Transformer) conventionally comprises a cylindrical body in which a transformer and a magnetic core 2 are integrated.

The transformer comprises a primary winding 3, a first secondary winding 4 and a second secondary winding 5. The magnetic core 2 slides axially in the cylindrical body and thus modifies the distribution of the magnetic field in the cylindrical body.

An excitation voltage Ve is applied across the primary winding 3. The excitation voltage Ve has a determined period and excitation frequency. A first measurement voltage Va is measured across the first secondary winding 4 and a second measurement voltage Vb across the second secondary winding 5.

The position of the magnetic core 2 is obtained from the ratio R:

R = (amp (Va) -amp (Vb)) / (amp (Va) + amp (Vb)),

where amp (Va) is the amplitude of the first measurement voltage Va and where amp (Vb) is the amplitude of the second measurement voltage Vb.

Generally, the first measurement voltage Va is acquired and digitized during a whole excitation period and at a sampling frequency higher than that of the excitation, and amp (Va) is obtained thanks to a synchronous demodulation of the first voltage Measurement goes on this period of excitation. Then, during the next excitation period, the second measurement voltage Vb is acquired and digitized, with the same sampling frequency, and amp (Vb) is obtained by means of a synchronous demodulation of the second measurement voltage Vb over an excitation period.

The calculation of the ratio R is then carried out once amp (Va) then amp (Vb) have been obtained. The response time of the measurement is therefore greater than two excitation periods, which is relatively important. This solution, however, allows the acquisition by a common part of a single acquisition chain (excluding electromagnetic interference filtering components), and therefore by the same digital analog converter. This reduces the gain error on the measurement.

Note that the non-zero speed of the magnetic core 2 makes the ratio R not constant between the two excitation periods, which generates a drag effect on the measurement of the position of the magnetic core 2.

Alternatively, the first measurement voltage Va and the second measurement voltage Vb are acquired and digitized simultaneously by two separate acquisition chains, during the same excitation period and with the same sampling frequency.

The calculation of the ratio R is then carried out once amp (Va) and amp (Vb) have been simultaneously obtained, and therefore the response time of the measurement is this time close to an excitation period. However, the gain error is increased due to the use of two separate acquisition strings for VA and VB.

Alternatively, it is also possible to use asynchronous demodulation. Such asynchronous demodulation is however more sensitive to environmental noise, whatever their frequency.

OBJECT OF THE INVENTION

The object of the invention is to improve the response time and the accuracy of an inductive displacement sensor and an acquisition system connected to said sensor inductive displacement, and to simplify said acquisition chain.

SUMMARY OF THE INVENTION

With a view to achieving this object, a measurement method is proposed using an inductive displacement sensor which comprises a transformer and a magnetic core, the transformer comprising a primary winding and two secondary windings, the measuring method comprising:

an excitation phase comprising the step of applying an AC excitation voltage across the terminals of the primary winding;

an acquisition phase comprising the steps whose objective is to acquire and digitize two measurement voltages at the terminals of the two secondary windings;

a first main treatment phase implemented on the two measurement voltages and comprising the steps, for each measurement voltage, of:

- multiply the measurement voltage by a reference sine and a reference cosine to obtain two resulting signals;

performing a first integration of each resulting signal on a sliding window of width equal to the excitation period to obtain two integrated signals;

performing a second integration of each integrated signal on a sliding window of width equal to one half-excitation period to obtain two doubly integrated signals;

producing, from the doubly integrated signals, an amplitude of the measurement voltage;

a first final processing phase comprising the step of producing, from the amplitudes of the two measurement voltages, an estimate of a position of the magnetic core. Being performed at each sampling step, on the last excitation period, the first main processing phase of the measuring method according to the invention therefore corresponds to a "sliding synchronous demodulation".

The measurement is therefore robust to environmental noise. In addition, an estimate of the position of the magnetic core can be produced after each acquisition of a new sampled value of each measurement voltage, which reduces the response time and increases the refreshing of the measurement.

Finally, it is possible to implement the measurement method according to the invention by using a single analog-digital converter which alternately acquires the two measurement voltages (sampling rate of the doubled analog-to-digital converter, but use of a only digital analog converter instead of two). This simplifies the acquisition chain connected to the inductive displacement sensor, and eliminates the gain error present with two separate digital analog converters.

In addition, a computer is proposed for connection to an inductive displacement sensor, the computer comprising a processing component and an analog-digital converter arranged to implement the measurement method just described.

In addition, a system comprising a computer such as the one just described and an inductive displacement sensor is proposed.

Other characteristics and advantages of the invention will emerge on reading the following description of a particular non-limiting embodiment of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS Reference will be made to the accompanying drawings, among which: FIG. 1 represents an LVDT sensor;

FIG. 2 represents a part of the first main processing phase of the measuring method according to the invention;

FIG. 3 represents another part of the first main treatment phase and a part of the first final treatment phase;

FIG. 4 represents the measuring method according to the invention;

- Figure 5 represents a preliminary phase;

- Figure 6 shows a second main treatment phase and a second final treatment phase.

DETAILED DESCRIPTION OF THE INVENTION

The invention is here carried out in a system comprising an LVDT sensor and a computer connected to the LVDT sensor.

The LVDT sensor is similar to the LVDT sensor 1 which has just been described.

The computer comprises a processing component and an acquisition chain comprising an analog digital converter. The processing component and the digital analog converter are arranged to implement the measuring method according to the invention.

The processing component here is an FPGA, but could be a different component, for example a processor, a microcontroller or an ASIC.

The measurement method first makes it possible to estimate a position of the magnetic core 2 of the LVDT sensor 1.

For this, the measurement method firstly comprises an excitation phase.

During the excitation phase, the computer produces an excitation voltage Ve which is applied across the primary winding 3 of the transformer of the LVDT sensor 1. The excitation voltage Ve is here applied continuously, during a whole period of the extent to which measurements must be made. The excitation voltage has an excitation period Texc and an excitation frequency Fexc determined (with Texc = 1 / Fexc).

The measurement method further comprises an acquisition phase. During the acquisition phase, the first measurement voltage Va and the second measurement voltage Vb are acquired by the computer, and then digitized by the digital analog converter with a certain sampling frequency, which is much greater than the frequency of measurement. excitation.

The first measuring voltage Va and the second measuring voltage Vb are scanned alternately, at each sampling step, by the analog-digital converter.

The processing component acquires the sampled values of the first measurement voltage Va and the second measurement voltage Vb.

Let Van and Vbn be the sampled values of the first measurement voltage Va and the second measurement voltage Vb at time n. As the acquisition is alternated, the instant n is shifted in time for the first measurement voltage Va and for the second measurement voltage Vb. Note also in the NPT suite the number of sampling points Va (and Vb) per excitation period Texc. Here, NPT = 32, but the NPT number could be different, for example equal to 64.

With reference to FIGS. 2 and 3, the measuring method also comprises a first main treatment phase implemented on the first measurement voltage Va and on the second measurement voltage Vb. Figures 2 and 3 illustrate only the implementation of the first main treatment phase on the first measurement voltage Va, but the following applies also to the second measurement voltage Vb.

The first phase of main treatment is carried out by the calculator processing component. A number of function blocks are programmed into the process component. Among these functional blocks, there is a first multiplier 11, a first integrator block 12, a second multiplier 13 and a second integrator block 14. These functional blocks are visible in FIG.

A reference sinus SIN_REF and a cosign of reference COS_REF, of frequency equal to the excitation frequency Fexc, are generated internally of the processing component. The reference sinus SIN_REF and the cosine of reference COS_REF are discretized with a period equal to the period of sampling. The elements thus obtained are called in the sequence Sn (for the reference sinus S IN_REF) and Cn (for the cosine of reference COS_REF).

The following steps are first applied to the first measurement voltage Va, following each of its scans VAn by the digital analog converter.

The sampled value Van of the first measurement voltage Va acquired at instant n is multiplied by the first multiplier 11 to the reference sine SIN_REF discretized at time n, ie Sn, to obtain a first resultant signal that will be noted SRaln in the sequel.

Then, for each new sampled value Van of the first measurement voltage Va, the first integrator block 12 integrates the first resultant signal SRaln obtained for the last NPT sampled values Van, thereby covering an excitation period Texc. A first integration of the first resultant signal SRaln is thus performed on a sliding window of duration equal to the excitation period Texc, this sliding window ending at the time of the last acquisition of a sampled value Van.

Then, at the output of the first integrator block 12, a first integrated Slaln signal is obtained for each new sampled value Van of the first measurement voltage Va.

Similarly, the sampled value Van of the first measuring voltage Va acquired at time n is multiplied by the second multiplier 13 at the cosign of reference COS_REF discretized at time n, ie Cn, to obtain a second signal resulting from the we will note SRa2n in the following.

Then, for each new sampled value Van of the first measurement voltage Va, the second integrator block 14 integrates the second resultant signal SRa2n obtained for the last NPT sampled values Van, thereby covering a Texc excitation period. A first integration of the second resulting signal SRa2n is thus performed on a sliding window of duration equal to the excitation period Texc, this sliding window ending at the last acquisition of a sampled value Van.

At the output of the second integrator block 14, a second integrated signal SIa2n is thus obtained for each new sampled value Van of the first measurement voltage Va.

The first integrator block 12 and the second integrator block 14 are here similar. An exemplary algorithm of the first integrator block 12 and the second integrator block 14 is provided in Appendix 1 of this description. The integration can be of order 0 (as proposed in Appendix 1), order 1 (trapezoidal integration), order 2, or even higher order.

Among the functional blocks programmed in the processing component, there is also a third integrator block 21, a first elevation block 22, a fourth integrator block 23, a second elevation block 24, a summator 25, a calculation block 26 and a gain block 27. These functional blocks are visible in FIG. The following steps are applied, for each new sampled value Van of the first measurement voltage Va, on the first integrated signal Slaln and on the second integrated signal SIa2n of the first measurement voltage Va.

The second integration of the first integrated signal Slaln uses the third integrator block 21. The second integration is performed this time, for each new sampled value Van of the first measurement voltage Va, on a sliding window of the NPT / 2 last points, which corresponds to a width equal to half a period of excitation.

Similarly, the second integration of the second integrated signal SIa2n uses the fourth integrator block 23. The second integration is performed, for each new sampled value Van of the first measurement voltage Va, on a sliding window of the NPT / 2 last points, this which corresponds to a width equal to half a period of excitation.

The second integration makes it possible to eliminate a residual signal after the first integration, this residual signal being of frequency equal to twice the excitation frequency Fexc. This residual signal is present when the speed of variation of the position of the sensor (therefore the speed of variation of the ratio) is not negligible during a period of excitation (the ratio can not be considered constant over a period of excitation with regard to the expected accuracy of measurement). This assumption is assumed to be valid in classical demodulation algorithms based on simple integration.

Thus, a first doubly integrated signal Sllaln and a second doubly integrated signal SIIa2n are obtained. The first doubly integrated signal Sllaln and the second doubly integrated signal SIIa2n are then each squared, respectively by the first elevation block 22 and the second elevation block 24. The treatment realized by the blocks 22, 24, 25 and 26 makes it possible to eliminate any dependence of the phase shift measurement between the excitation and the cosines / reference sines (conventional in a synchronous algorithm).

The first main processing step then comprises the step of producing, from the first doubly integrated signal Sllaln and the second doubly integrated signal SIIa2n, the amplitude amp (Va) of the first measurement voltage Va.

For this, the first doubly integrated signal Sllaln and the second doubly integrated signal SIIa2n are summed by the adder 25. The calculation block 26 then calculates a square root of the output signal of the adder 25.

Then, the gain G of the gain block 27 is applied at the output of the calculation block 26.

The gain G of the gain block 27 is such that:

G = 1 / (2 ^Λ (ADC_Nbits-1) / 10 * (Nstep_demod) / 2) / (Nstep_demod / 2), where:

- 1 / (2 ^A (ADC_Nbits-l) / 10 makes it possible to correct the nominal gain of the analog-to-digital conversion performed by the analog-digital converter (for a 10-volt full-scale analog-to-digital converter);

- Nstep_demod allows to correct the gain of the first integration over a period of excitation

(corresponding to NPT no sampling);

- Nstep_demod / 2 makes it possible to correct the gain of the second integration over a half-period of excitation (corresponding to NPT / 2 no sampling);

- 1/2 is a constant. This constant comes from the underlying trigonometric formula of the sina synchronous demodulation algorithm. sinb = 1/2 (sin (a + b) / 2 + sin (a-b) / 2 and equivalent).

The gain G is thus defined to correct a gain of the digital analog converter, a gain of the first integrator block 12, a gain of the second integrator block 14 (Which realize the first integration), a gain of the third integrator block 21, and a gain of the third integrator block 23 (which realize the second integration).

At the output of the gain block 27, the amplitude amp (Va) of the first measurement voltage Va is obtained.

The amplitude amp (Va) of the first measurement voltage Va is equal to G. JCCIal ² + SIIa 2n ² ).

All the steps just described are also performed in the same way on the second measurement voltage Vb. Thus, a first resultant signal SRbln and a second resultant signal SRb2n, a first integrated signal Slbln and a second integrated signal SIb2n, a first doubly integrated signal Sllbln and a second doubly integrated signal SIIb2n are obtained.

The amplitude amp (Vb) of the second measurement voltage Vb is then obtained.

The amplitude amp (Vb) of the second measurement voltage Vb is equal to G. ^ j {Sllbln ² + Sllbln ² ).

The measurement method then comprises a first final processing phase which comprises the step of producing, from the amplitudes of the two measurement voltages, an estimate of a position of the magnetic core 2.

The estimation of the position of the magnetic core 2 is obtained from the ratio R:

R = (amp (Va) -amp (Vb)) / (amp (Va) + amp (Vb)).

The first main processing phases and the first final processing phase just described are shown at a higher level (system level) in Figure 4.

Blocks 30 and 31 represent the first main processing phase implemented on the first measurement voltage Va.

The block 30 thus acquires the first measurement voltage Va as well as the reference sinus SIN_REF and the reference cosine COS_REF, and produces the first doubly integrated signal Sllaln and the second doubly signal integrated SIIa2n.

The block 31 acquires the first doubly integrated signal Sllaln and the second doubly integrated signal SIIa2n, and produces the amplitude amp (Va) of the first measurement voltage Va.

The first processing phase is triggered by the TriggVa signal at each new acquisition of a sampled value Van of the first measurement voltage Va.

Likewise, the blocks 32 and 33 represent the first main processing phase implemented on the second measurement voltage Vb.

The block 32 thus acquires the second measurement voltage Vb as well as the reference sine SIN_REF and the reference cosine COS_REF, and produces the first doubly integrated signal Sllbln and the second doubly integrated signal SIIb2n.

The block 33 acquires the first doubly integrated signal Sllbln and the second doubly integrated signal SIIb2n, and produces the amplitude amp (Vb) of the second measurement voltage Vb.

The first processing phase is triggered by the TriggVb signal, with each new acquisition of a sampled value Vbn of the first measurement voltage Vb.

Finally, block 34 represents the first phase of final processing. Block 34 acquires the amplitude amp (Va) of the first measurement voltage Va and the amplitude amp (Vb) of the second measurement voltage Vb. The block 34 produces the ratio R and therefore an estimate of the position of the magnetic core 2. The block 34 also produces the amplitude amp (Va + Vb) of the sum of the first measurement voltage Va and the second measurement voltage Vb.

If necessary, the ratio R can be calculated for each sampling period of the first measurement voltage Va and / or the first measurement voltage Vb (especially if the samples are alternated).

The measurement method also makes it possible to estimate a speed of variation of the position of the magnetic core 2 of the LVDT sensor 1.

For this, the measurement method performs a synchronous sliding demodulation on a speed signal VR (t) representative of the speed of variation of the ratio R. Synchronous sliding demodulation is carried out during a second phase of main processing similar to the first phase of main processing, carried out in parallel with the first phase.

We have :

VR (t) = dR / dt = d (Va (t) -Vb (t)) / ((Va (t) + Vb (t)) .dt),

with Va (t) + Vb (t) = V0.

Here V0 is assumed to be constant during a Texc excitation period, which corresponds to a conventional assumption for an LVDT sensor, regardless of position or rate of change of position.

Thus, dVa (t) = -dVb (t).

We can then also write:

dVa (t) / dt = VR (t) .V0 / 2 = VR (t). (amp (Va) + amp (Vb) / 2.

Assuming constant speed VR (t) over a period of excitation Texc, we have:

VR (t) = dR. Fexc = (dVa-dVb). Fexc / V0

where dVa is the amplitude variation of the first measurement voltage Va over an excitation period Texc and where dVb is the amplitude variation of the second measurement voltage Vb over an excitation period Texc.

The speed VR can be positive or negative, unlike the ratio R which is necessarily positive and between 0 and 1.

Since the synchronous demodulation produced by the first main processing phase described earlier provides the amplitude of the input signal, and therefore an absolute value, the signals can not be directly injected into the algorithms corresponding to the first main processing phase. . If this were the case, the algorithm would produce the absolute value of the speed. Now, this one can be negative.

The measurement method therefore comprises a preliminary phase comprising the step of producing two "crossed" voltages depending on each of the two measurement voltages.

For the first measurement voltage Va, a first cross voltage VCa is produced such that:

VCa (n) = (Va (n) + Vb (n)) .Vmax + (Va (n) -Va (n-1 / Fexc)) * Fexc.

For the second measurement voltage Vb, a second cross voltage VCb is produced such that:

VCb (n) = (Va (n) + Vb (n)) .Vmax + (Vb (n) -Vb (n-1 / Fexc)) * Fexc.

In these formulas, VCa (n), VCb (n), Va (n) and Vb (n) are respectively the _n ^th samples of the first crossed voltage, the second crossed voltage, the first measurement voltage Va and the the second measurement voltage Vb, Vmax is a maximum expected absolute value of the rate of change of the magnetic core position, and Fexc is the excitation frequency of the excitation voltage; (nl / Fexc) represents the index of the sample acquired an excitation period before the sample n, the duration between the two samples n and (nl / Fexc) being the step of the derivative dt = 1 / Fexc.

The synchronous sliding demodulation is then implemented, in this second main processing phase (similar to the first main processing phase) on the first cross voltage VCa (n) and the second cross voltage VCb (n). This treatment is carried out in parallel with the first main treatment phase (position measurement).

Figure 5 illustrates the preliminary phase for the measurement voltage VCa. The block 40 acquires the voltage VX, with VX = Va, and the voltage VY, with VY = Vb, the sampling frequency Fech and the value NP.

Block 40 then produces the first crossed voltage VCa (n).

To produce the second cross voltage VCb (n), a similar block 41 to block 40 is used, with VX = Vb and VY = Va.

An example of the preliminary phase algorithm is provided in Appendix 2 of this description.

Figure 6 illustrates the speed measurement as a whole. Block 40 and block 41 perform the preliminary phase and respectively produce the first cross voltage VCa (n) and the second cross voltage VCb (n).

Then, the second main processing phase, similar to the first main processing phase, is implemented on the first cross voltage VCa (n) and on the second cross voltage VCb (n).

Block 42 represents the implementation of the first integration and the second integration on the first crossed voltage VCa (n), while block 43 represents the implementation of the first integration and the second integration on the second voltage. crossed VCb (n). The blocks 44, 45 and 46 respectively correspond to the elevator blocks, the summator and the calculation block previously described.

Note that the second integration is not necessarily realized.

The synchronous sliding demodulation of VCa (n), implemented during the second main processing phase, gives an amplitude value equal to:

Vouta = (V0.Vmax + dVa.Fexc).

The synchronous demodulation of VCb (n), implemented during the second main processing phase, gives an amplitude value equal to:

Voutb = (V0.Vmax + dVb.Fexc).

A ratio R ', similar to the ratio R, is thus calculated:

R '= (Vouta-Voutb) / (amp (Va) + amp (Vb))

Let R '= (Vouta-Voutb) / (amp (Va + Vb)),

Let R '= 2.dVa.Fexc / V0

So R '= dR / dt speed of variation of the position Because dVa (t) / dt = VR (t) .VO / 2 = -dVb / dt and dt = l / Fexc

or :

Vouta and Voutb are the second phase outputs of the main processing applied to the signals generated for the speed measurement, and where amp (Va) and amp (Vb) are respectively the amplitude of the first measurement voltage and the amplitude of the second one. measurement voltage provided by the first phase of main processing (or amp (VA + Vb) amplitude of the sum Va + Vb).

The signal amp (Va + Vb), derived from the position demodulation algorithm, is used via a fifth integrator block 49. Optionally according to the gains in precision, simple filtering can be added.

The gain block 47 applies a final gain G:

G = single (1 / (2 ^Λ (ADC_Nbits-1) / 10 * single (Nstep_demod) / 2)).

The final gain compensates the gain of the digital analog converter and the gain of the integration (only the first integration is taken into account in this formula), as well as the trigonometric gain equal to 1/2.

Of course, the invention is not limited to the embodiment described but encompasses any variant within the scope of the invention as defined by the claims.

Although it has been indicated here that the inductive displacement sensor is a LDVT, the invention also applies to a different inductive displacement sensor, for example an RVD. The invention applies more generally to any sensor whose acquisition is based on a synchronous demodulation.

The computer described here comprises a single digital analog converter. It is however possible to use two digital analog converters connected in parallel, and to acquire the first measurement voltage and the second measurement voltage simultaneously. The sampling frequency can then be divided by 2. The choice between the acquisition Simultaneous acquisition and alternate acquisition depends on the hardware resources and their optimization (number of digital analog converters and maximum accessible sampling frequency).

NOTES

APPENDIX 1 function y = fcn_orderO (A, step_demod) persist mat% FPGA storage of data

acquired (memory traversed cyclically)

persist cnt% position of the last data acquired in the memory mat if isempty (mat)% initialization

mat = single (zeros (500));

cnt = uint8 (1); % Counter to count numbe r of t ime end if (cnt == Nstep_demod + l)% return to the beginning of the memory when the end of zone is reached

cnt = uint8 (1);

end if cnt <= Nstep_demod

mat (cnt) = A; % storage of the last data acquired cnt = cnt + l; % incrementation of the position counter

% memory

end add = single (0); % integration over a period of

% demodulation

for i = l: step_demod

add = add + mat (i);

end y = add; ANNEX 2 memoire_periode function y = (X, Y, Nstep_demod, Fsample) persist Matx% FPGA storing the data mentioned o oj ^<113 ^ ^ rocks mo ZL ^* jo .3. iz ^* cz oixyu ç * cz y 1. τ_ izi G IXI ^ nt

_t_r _L_ ^~ tz χτ ^"ta 31. ^IW" ^ t ^ ^"0 ΓΤ cz m otz ¹ 1 _^. ^ c. t_- 1 in. Ji u. cz- czl.z ^ XZL XZL cz- cz-

if isempty (matX) ¾ x 11 i. t a. X i. s a t i on

matX = single (zeros (500));

matY = single (zeros (500));

ni ^~

τ nt † "î TTI Q ena led

end if (cnt == Nstep_demod + l)% return to the beginning of the memory

\ x ^~ nd _~ 1 If ΐϊ i n. cl z ^ n. ç¾ ^ cnt = uint8 (1);

end oldX = matX (cnt); "O storage of the value of VA dating from oldY = matY (cnt);% storage of the value of VY dating from a

o T 1Z 3 ... Oj, CZi 01 € i CZ1 ΓΠZ (Zl.1Z1. i 3. ^" t ZL 0 ΧΊ.

ΙΊΖΙ cl. iw- (JZ1. iw-) ^ oo t- CZ * ~ Z. ~ - Zl. CZ- ^"1 cl CZL -.. ~ Z -1 XZL 1 ^ u- J - ^'J ^{^~."} Z 1 ^"1Z1 j- CZ-

VX

IQcl † Y (cnt) ⁼ Y% StZOCkcl JG (ΐθ .1.3. (Ζΐθ .1ZZH X θ ΙΖΘ 3.1 Θ u. I CIG VY add = single (0);

add = (matX (cnt) + matY (cnt)) * 100 / Fsample * single (Nstep_dem od) / 2; % With 100 / s% = Vmax = 100 / s for Example Ό i- i ^"o. 1 CZ- ^I" L * .._ ^ 3-Z- ^ j- i mz ¹ ^_L! .ζ

add = add + (matX (cnt) -oldX);

o -t '3. 1, i> ZL n cj ^~ 13 ISI ^"tz3 cj. cj mo. / ^ ¾ .ti i ^* fi ..izz izi if ri u.

-F nt = cnt = add;

Claims

A measuring method using an inductive displacement sensor (1) which comprises a transformer and a magnetic core (2), the transformer comprising a primary winding (3) and two secondary windings (4, 5), the measurement method comprising :

an excitation phase comprising the step of applying an alternating excitation voltage (Ve) to the terminals of the primary winding;

an acquisition phase comprising the steps whose objective is to acquire and digitize two measurement voltages (Va, Vb) across the two secondary windings;

a first main treatment phase implemented on both measurement voltages and comprising the steps, for each measurement voltage, of:

- multiply the measurement voltage by a reference sine and a reference cosine to obtain two resulting signals (SRaln, SRa2n);

- perform a first integration of each resulting signal on a sliding window of width equal to the excitation period to obtain two integrated signals (Slaln, SIa2n);

- Performing a second integration of each integrated signal on a sliding window of width equal to half a period of excitation to obtain two doubly integrated signals (Sllaln, SIIa2n);

a first final processing phase comprising the step of producing, from the amplitudes of the two measurement voltages, an estimate of a position of the magnetic core.

2. Measuring method according to claim 1 _. , in which, for each measuring voltage Vx, the amplitude of the measuring voltage is equal to where G is a gain and where S11xln and SIIx2n are the doubly integrated signals of the measuring voltage Vx,

The measurement method according to claim 2, wherein the gain G is set to correct a gain of a digital analog conversion, a gain of the first integration, a gain of the second integration, and a trigonometric gain equal to 1 / 2.

4. Measuring method according to claim 1, further comprising a preliminary phase comprising the step of producing two crossed voltages (VCa, VCb) depending each of the two measurement voltages, a second main processing phase similar to the first phase of main processing but implemented on the two crossed voltages, and a second final processing phase comprising the step of producing an estimate of a speed of variation of the position of the magnetic core.

The measuring method according to claim 4, wherein the two crossed voltages are such that

VCa (n) = (Va (n) + Vb (n)). Vmax + {Va (n) -Va (n-l / Fexc)} * Fexc

VCb (n) = {Va (n) + Vb (n)). Vmax + (Vb (n) -Vb (nl / Fexc)) * Fexc, where VCa (n), VCb (n), Va (n) and V (n) are respectively the ^nth samples of a first crossed voltage, a second cross voltage, a first measurement voltage and a second measurement voltage, wherein Vmax is an expected maximum absolute value of the magnetic field position variation rate, and Fexc is a frequency of excitation of the excitation voltage, and where (nl / Fexc) represents the index of a sample acquired 1 excitation period before the sample n. b. Calculator intended to be connected to a sensor of inductive displacement, the computer comprising a processing component and an analog-digital converter arranged to implement the measurement method according to one of the preceding claims.

7. System comprising a computer according to claim 6 and an inductive displacement sensor.