WO2019001013A1 - 像素读出电路、驱动其的方法、以及图像传感器 - Google Patents

像素读出电路、驱动其的方法、以及图像传感器 Download PDF

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WO2019001013A1
WO2019001013A1 PCT/CN2018/078776 CN2018078776W WO2019001013A1 WO 2019001013 A1 WO2019001013 A1 WO 2019001013A1 CN 2018078776 W CN2018078776 W CN 2018078776W WO 2019001013 A1 WO2019001013 A1 WO 2019001013A1
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signal
transistor
circuit
node
pixel
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PCT/CN2018/078776
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English (en)
French (fr)
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刘晓惠
马占洁
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京东方科技集团股份有限公司
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Priority to EP18765349.8A priority Critical patent/EP3648455A4/en
Priority to US16/086,432 priority patent/US11006063B2/en
Publication of WO2019001013A1 publication Critical patent/WO2019001013A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/30Circuitry of solid-state image sensors [SSIS]; Control thereof for transforming X-rays into image signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75Circuitry for providing, modifying or processing image signals from the pixel array
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/1461Pixel-elements with integrated switching, control, storage or amplification elements characterised by the photosensitive area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers
    • H01L27/14658X-ray, gamma-ray or corpuscular radiation imagers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50Control of the SSIS exposure
    • H04N25/57Control of the dynamic range
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/709Circuitry for control of the power supply
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/766Addressed sensors, e.g. MOS or CMOS sensors comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/778Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/78Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Definitions

  • the present disclosure relates to a pixel readout circuit, a method of driving the pixel readout circuit, and an image sensor including an array of pixel readout circuits.
  • a typical image acquisition device such as an X-ray imager, includes a plurality of pixels, each of which generates a photo response signal and the generated photo response signal is read by a pixel readout circuit.
  • These optical response signals are typically so weak that the image acquisition device has to be equipped with an amplifier, such as a charge amplifier, to amplify these optical response signals for subsequent processing. This can lead to a complicated structure and therefore a high cost.
  • a pixel readout circuit comprising: a reset circuit configured to reset a first node at a first supply voltage in response to a signal on a first scan line being active; a photodetector, Configuring to generate a charge signal in response to incident light and integrating the charge signal, the integrated charge signal causing a change in voltage level at the first node; a photosensitive circuit configured to be responsive to the first A change in the voltage level at the node to generate a pixel current; and a switching circuit configured to transmit the pixel current to the signal sense line for readout in response to the signal on the second scan line being active.
  • the photosensitive circuit includes a photo transistor having a gate connected to the first node, a first pole connected to the third signal terminal, and a second connected to the switching circuit The third signal terminal is for coupling to a third power supply voltage.
  • the phototransistor is a P-type transistor and the first supply voltage is a low level voltage.
  • the photodetector includes: a photodiode connected between the first node and a second signal terminal, the second signal terminal for coupling to a second power supply voltage; and A capacitor is connected in parallel with the photodiode.
  • the reset circuit includes a first transistor having a gate connected to the first scan line, a first pole connected to the first signal terminal, and a first node connected to the first node The second pole.
  • the first signal terminal can be coupled to the first supply voltage.
  • the first transistor is a phototransistor having an active layer and a light shielding layer covering the active layer to protect the active layer from the incident light.
  • the first transistor is a P-type transistor.
  • the switching circuit includes a second transistor having a gate connected to the second scan line, a first pole connected to a second pole of the phototransistor, and connected to The signal senses the second pole of the line.
  • the second transistor is a photo transistor having an active layer and a light shielding layer covering the active layer to protect the active layer from the incident light.
  • the second transistor is a P-type transistor.
  • a method of driving a pixel readout circuit includes a reset circuit, a photodetector, a photosensor, and a switch circuit.
  • the method includes: resetting, by the reset circuit, a first node at a first supply voltage in response to a signal valid on a first scan line during a reset phase; generating, by the photodetector, in response to incident light during an integration phase a charge signal and integrating the charge signal, wherein the integrated charge signal causes a change in a voltage level at the first node; the photoresponsive circuit is responsive to the voltage at the first node during a readout phase The pixel current is generated by a change in level; and the pixel current is transmitted to the signal sense line for readout by the switching circuit in response to the signal asserted on the second scan line during the readout phase.
  • an image sensor including: a plurality of first scan lines configured to transmit a first scan signal; and a plurality of second scan lines configured to transmit a second scan signal; a plurality of signal readout lines configured to transmit pixel currents for readout; and a pixel array comprising a plurality of pixels arranged in an array, each pixel comprising: a reset circuit configured to be responsive to said plurality of first lines The first scan signal on a corresponding one of the scan lines is active to reset the first node at the first supply voltage; the photodetector is configured to generate a charge signal and integrate the charge signal in response to the incident light, integrated The charge signal causes a change in a voltage level at the first node; a photosensitive circuit configured to generate a pixel current in response to a change in the voltage level at the first node; and a switching circuit configured to respond Transmitting, by the second scan signal on a corresponding one of the plurality of second scan lines, the pixel current generated by the
  • FIG. 1 is a circuit diagram of a typical pixel readout circuit
  • FIG. 2 is a schematic circuit diagram of a pixel readout circuit in accordance with an embodiment of the present disclosure
  • FIG. 3 is a graph showing an I-V characteristic of a typical phototransistor
  • FIG. 4 is a timing chart for the pixel readout circuit shown in FIG. 2;
  • FIG. 5-7 are respectively equivalent circuit diagrams of the pixel readout circuit shown in FIG. 2 at different operation stages;
  • FIG. 8 is a schematic circuit diagram of a pixel readout circuit according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic block diagram of an image sensor in accordance with an embodiment of the present disclosure.
  • FIG. 1 shows a circuit diagram of a typical pixel readout circuit 100.
  • the pixel readout circuit 100 includes a photodetector, an amplification transistor M1, a reset transistor M2, and a transfer transistor M3 that are sensitive to incident light (for example, X-rays) in a predetermined wavelength range and indicated by Cpix.
  • the photodetector Cpix acts as a capacitor that integrates the photogenerated charge signal.
  • the amplifying transistor M1 which is illustrated as an n-type field effect transistor, can operate in a saturation region
  • the reset transistor M2 and the transfer transistor M3, which are illustrated as n-type field effect transistors can each operate in the ohmic region.
  • the amplifying transistor M1 resets the photodetector Cpix in response to the reset signal RST.
  • the photodetector Cpix generates photocarriers that discharge to Cpix under irradiation of incident light, causing the voltage level at the gate of the amplifying transistor M1 to decrease by ⁇ V G .
  • the amount of decrease ⁇ V G may indicate the intensity of the incident light.
  • the amplifying transistor M1 then generates a saturation current (also referred to herein as a pixel current) in response to a decrease amount ⁇ V G of the gate voltage, wherein the amount of change in the pixel current is amplified by a factor g m with respect to ⁇ V G (ie, an amplifying transistor) Transconductance of M1). Therefore, sensing of incident light can be achieved by detecting the amount of change in pixel current. However, the pixel current is still so weak that it has to be amplified by means of an amplifier AMP (e.g., a charge amplifier) to enable detection of the pixel current by subsequent processing circuitry.
  • an amplifier AMP e.g., a charge amplifier
  • FIG. 2 shows a circuit diagram of a pixel readout circuit 200 in accordance with an embodiment of the present disclosure.
  • the pixel readout circuit 200 includes a reset circuit 210, a photodetector 220, a photosensitive circuit exemplarily shown as a photo transistor Td, and a switch circuit 230.
  • the reset circuit 210 is configured to reset the first node N1 at the first supply voltage in response to the signal on the first scan line S1[n] being active.
  • the reset circuit 210 is shown in this embodiment to include a first transistor T1 having a gate connected to the first scan line S1[n], a first pole connected to the first signal terminal V1, and Connected to the second pole of the first node N1.
  • the first transistor T1 is shown as a p-type transistor, and the first supply voltage coupled to the first signal terminal V1 is a low level voltage, respectively.
  • the phrase "signal active" means that the signal has a low level.
  • Photodetector 220 is configured to generate a charge signal and integrate the charge signal in response to incident light.
  • the photodetector 220 is shown in this embodiment to include a photodiode PD connected between the first node N1 and the second signal terminal V2 and a capacitor Cap connected in parallel with the photodiode PD.
  • the second signal terminal V2 can be coupled to a second supply voltage having a high level to allow the photodiode PD to be reverse biased.
  • the photodiode PD generates a reverse photocurrent that charges the capacitor Cap under the illumination of the incident light. Therefore, the voltage level at the first node N1 is increased by a small signal voltage ⁇ V G .
  • photodiode PD is merely exemplary, and other photosensitive elements, such as a-Se photoconductors, may be used in other embodiments.
  • the phototransistor Td illustrated as a p-type transistor, is configured to generate a pixel current in response to a change in the voltage level ⁇ V G at the first node N1 (ie, the gate of the phototransistor Td).
  • the pixel current can be calculated as follows:
  • W/L is the channel width to length ratio of the phototransistor Td
  • is the dielectric constant of the channel insulating layer
  • is the channel carrier mobility
  • V TH is the threshold voltage of the phototransistor Td
  • V GS is The gate-source voltage of the phototransistor Td.
  • the first pole of the phototransistor Td (in this example, the source) is connected to a third signal terminal V3 that can be coupled to a third supply voltage having a high level, and a second photodiode Td
  • the pole in this example, the drain
  • the pole is connected to the switching circuit 230.
  • g m is the transconductance of the photosensitive transistor Td which the photosensitive transistor Td is inversely proportional to the threshold voltage V TH.
  • the phototransistor Td such as a pentacene thin film transistor, has such sensitivity to visible light that it is subject to threshold voltage drift after being exposed to visible light. This in turn causes the threshold voltage shift of the transconductance g m is increased, thereby providing a case where Td is greater compared with a pixel current and ⁇ I where normal transistor.
  • the threshold voltage drift of the phototransistor Td advantageously provides an additional gain such that it is possible to directly read out the pixel current I without using an amplifier such as a charge amplifier.
  • the pentacene transistor is merely exemplary, and other transistors having similar photosensitive characteristics may be used as the phototransistor Td, such as a WSe 2 phototransistor, in other embodiments.
  • the photosensitive circuit can take other forms.
  • the switch circuit 230 is configured to transmit the pixel current I to the signal sense line RL[m] in response to the signal on the second scan line S2[n] being active.
  • the switch circuit 230 is illustrated in this embodiment as including a second transistor T2 having a gate connected to the second scan line, a first pole connected to the second pole of the phototransistor Td, and connected to The signal senses the second pole of line RL[m].
  • the second transistor T2 is shown as a p-type transistor.
  • the phrase "signal active" means that the signal has a low level.
  • FIG. 4 shows a timing diagram for the pixel readout circuit 200 shown in FIG. 2.
  • the pixel readout circuit 200 can operate in three stages.
  • the first scan signal on the first scan line S1[n] is active, and the second scan signal on the second scan line S2[n] is invalid. Therefore, the first transistor T1 is turned on and the second transistor T2 is turned off.
  • An equivalent circuit diagram of the pixel readout circuit 200 is shown in FIG. 5, in which the turned-off second transistor T2 is indicated by a dotted circle.
  • the first node is reset at a first supply voltage (in this example, a low level voltage) applied to the first signal terminal V1. This causes the photodiode PD to be in a reverse biased state.
  • the first scan signal on the first scan line S1[n] and the second scan signal on the second scan line S2[n] are invalid. Therefore, the first and second transistors T1 and T2 are turned off.
  • An equivalent circuit diagram of the pixel readout circuit 200 is shown in Fig. 6, in which the first and second transistors T1 and T2 that are turned off are indicated by a dotted circle.
  • the photodiode PD illuminated by the incident light produces a photocurrent and is integrated by the capacitor Cap, resulting in a small change in the voltage level at the first node N1.
  • the photo transistor Td is turned on and operates in the saturation region, no pixel current is generated because there is no current flow path available due to the closed second transistor T2.
  • the phototransistor Td is also illuminated by incident light and thus suffers from threshold voltage drift, as previously described.
  • X-rays can be converted into visible light having a wavelength of, for example, 300-600 nm by means of a scintillator, to which the photodiode PD and the phototransistor Td are sensitive.
  • the first scan signal on the first scan line S1[n] is invalid, and the second scan signal on the second scan line S2[n] is valid. Therefore, the first transistor T1 is turned off and the second transistor T2 is turned on.
  • An equivalent circuit diagram of the pixel readout circuit 200 is shown in FIG. 7, in which the turned-off first transistor T1 is indicated by a dotted circle.
  • the pixel current generated by phototransistor Td is transmitted via second transistor T2 to signal sense line RL[m], which in turn transmits the pixel current to a subsequent processing circuit (not shown), such as sample and hold Circuit for picking.
  • the threshold voltage drift of phototransistor Td can provide additional gain so that the pixel current can be picked up directly by the sample and protection circuitry without being amplified by the charge amplifier.
  • FIG. 8 shows a variation 800 of the pixel readout circuit 200 shown in FIG. 2.
  • the same reference numerals in FIG. 8 denote the same elements as in FIG. 2.
  • the first and second transistors T1 and T2 each have an active layer indicated by a broken line.
  • the pixel readout circuit 800 is different from the pixel readout circuit 200 in that the second transistor T2 is also a phototransistor. This allows the photo transistor Td and the second transistor T2 to be fabricated using the same materials and processes, thereby simplifying the process. However, since the second transistor T2 operates in the ohmic region as a switching element, it does not need to be illuminated by incident light to avoid undesired threshold voltage drift.
  • the second transistor T2 is provided with a light shielding layer indicated by a short solid line.
  • the light shielding layer may be formed on the active layer to cover the active layer to protect it from incident light.
  • the first transistor T1 may also be a phototransistor and thus also have a light-shielding layer covering its active layer, as shown in FIG.
  • FIG. 9 shows a schematic block diagram of an image sensor 900 in accordance with an embodiment of the present disclosure.
  • the image sensor 900 includes a plurality of first scan lines S11, S12...S1n, a plurality of second scan lines S21, S22...S2n, a plurality of signal readout lines RL1, RL2...RLm, and a pixel array 910.
  • the image sensor 900 also optionally includes a first scan driver 920, a second scan driver 930, a plurality of sample and hold circuits SH1, SH2, ... SHm, and a power source 940.
  • Pixel array 910 includes a plurality of pixels P arranged in an array, each of which may take the form of pixel readout circuitry 200 or 800 described above with respect to Figures 4-8 and will not be described in detail herein.
  • the first scan driver 920 is connected to the first scan lines S11, S12...S1n to sequentially supply respective first scan signals to the respective rows of pixels in the pixel array 910.
  • the second scan driver 930 is connected to the second scan lines S21, S22, S2n to sequentially supply respective second scan signals to the respective rows of pixels in the pixel array 910.
  • the sample and hold circuits SH1, SH2, ... SHm are respectively connected to the signal readout lines RL1, RL2 ... RLm to sample the pixel currents on the signal readout lines RL1, RL2 ... RLm during the readout phase.
  • the power supply 940 supplies a first power supply voltage (eg, a low level voltage), a second power supply voltage (eg, a high level voltage), and a third power supply voltage (eg, a high level voltage) to respective pixels in the pixel array 910. P.
  • a first power supply voltage eg, a low level voltage
  • a second power supply voltage eg, a high level voltage
  • a third power supply voltage eg, a high level voltage
  • the image sensor 900 can be applied to various image pickup devices. It will be appreciated that in the context of X-ray detection, image sensor 900 may also include a scintillator (not shown) that converts X-rays into visible light.
  • a scintillator not shown
  • transistors T1, T2 and Td are illustrated and described as p-type transistors in the above embodiments, n-type transistors are possible.
  • the effective voltage for turning on the transistor is a high level voltage
  • the inactive voltage for turning off the transistor is a low level voltage.
  • These transistors are typically fabricated as thin film transistors such that their first and second poles are used interchangeably.

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Abstract

一种像素读出电路,包括:复位电路,被配置成响应于第一扫描线上的信号有效而将第一节点复位处于第一电源电压;光检测器,被配置成响应于入射光而生成电荷信号并对电荷信号进行积分,经积分的电荷信号引起第一节点处的电压水平的改变;光敏电路,被配置成响应于第一节点处电压水平的改变而生成像素电流;以及开关电路,被配置成响应于第二扫描线上的信号有效而将像素电流传输至信号读出线以供读出。

Description

像素读出电路、驱动其的方法、以及图像传感器 技术领域
本公开涉及一种像素读出电路、驱动该像素读出电路的方法、以及包括像素读出电路的阵列的图像传感器。
背景技术
典型的图像获取装置,例如X射线成像器,包括多个像素,其每一个生成光响应信号并且生成的光响应信号通过像素读出电路读出。这些光响应信号典型地如此微弱以致图像获取装置不得不配备放大器,诸如电荷放大器,来放大这些光响应信号以供后续处理。这可以导致结构复杂并且因此成本较高。
发明内容
提供一种可以缓解、减轻或消除上述问题中的一个或多个的机制将是有利的。
根据本公开的第一方面,提供一种像素读出电路,包括:复位电路,被配置成响应于第一扫描线上的信号有效而将第一节点复位处于第一电源电压;光检测器,被配置成响应于入射光而生成电荷信号并对电荷信号进行积分,经积分的所述电荷信号引起所述第一节点处的电压水平的改变;光敏电路,被配置成响应于所述第一节点处所述电压水平的改变而生成像素电流;以及开关电路,被配置成响应于第二扫描线上的信号有效而将所述像素电流传输至信号读出线以供读出。
在某些示例性实施例中,所述光敏电路包括光敏晶体管,其具有连接到所述第一节点的栅极、连接到第三信号端的第一极、以及连接到所述开关电路的第二极,所述第三信号端用于耦合到第三电源电压。
在某些示例性实施例中,所述光敏晶体管为P型晶体管,并且所述第一电源电压为低电平电压。
在某些示例性实施例中,所述光检测器包括:光敏二极管,连接在所述第一节点与第二信号端之间,所述第二信号端用于耦合到第二电源电压;和电容器,与所述光敏二极管并联。
在某些示例性实施例中,所述复位电路包括第一晶体管,其具有 连接到所述第一扫描线的栅极、连接到第一信号端的第一极、以及连接到所述第一节点的第二极。所述第一信号端可以被耦合到所述第一电源电压。在一些实施例中,所述第一晶体管为光敏晶体管,其具有有源层和覆盖所述有源层以保护所述有源层免受所述入射光的遮光层。在一些实施例中,所述第一晶体管为P型晶体管。
在某些示例性实施例中,所述开关电路包括第二晶体管,其具有连接到所述第二扫描线的栅极、连接到所述光敏晶体管的第二极的第一极、以及连接到所述信号读出线的第二极。在一些实施例中,所述第二晶体管为光敏晶体管,其具有有源层和覆盖所述有源层以保护所述有源层免受所述入射光的遮光层。在一些实施例中,所述第二晶体管为P型晶体管。
根据本公开的另一方面,提供了一种驱动像素读出电路的方法。所述像素读出电路包括复位电路、光检测器、光敏电路和开关电路。所述方法包括:由所述复位电路在复位阶段响应于第一扫描线上的信号有效而将第一节点复位处于第一电源电压;由所述光检测器在积分阶段响应于入射光而生成电荷信号并对电荷信号进行积分,其中经积分的所述电荷信号引起所述第一节点处的电压水平的改变;由所述光敏电路在读出阶段响应于所述第一节点处所述电压水平的改变而生成像素电流;以及由所述开关电路在所述读出阶段响应于第二扫描线上的信号有效而将所述像素电流传输至信号读出线以供读出。
根据本公开的又另一方面,提供了一种图像传感器,包括:多条第一扫描线,被配置成传输第一扫描信号;多条第二扫描线,被配置成传输第二扫描信号;多条信号读出线,被配置成传输像素电流以供读出;以及像素阵列,包括布置成阵列的多个像素,每个像素包括:复位电路,被配置成响应于所述多条第一扫描线中的对应一条上的第一扫描信号有效而将第一节点复位处于第一电源电压;光检测器,被配置成响应于入射光而生成电荷信号并对电荷信号进行积分,经积分的所述电荷信号引起所述第一节点处的电压水平的改变;光敏电路,被配置成响应于所述第一节点处所述电压水平的改变而生成像素电流;以及开关电路,被配置成响应于所述多条第二扫描线中的对应一条上的第二扫描信号有效而将所述光敏晶体管生成的所述像素电流传输至所述多条信号读出线中的对应一条以供读出。
根据在下文中所描述的实施例,本公开的这些和其它方面将是清楚明白的,并且将参考在下文中所描述的实施例而被阐明。
附图说明
在下面结合附图对于示例性实施例的描述中,本公开的更多细节、特征和优点被公开,在附图中:
图1为一种典型的像素读出电路的电路图;
图2为根据本公开实施例的一种像素读出电路的示意性电路图;
图3为典型的光敏晶体管的I-V特性曲线图;
图4为用于图2所示的像素读出电路的时序图;
图5-7分别为图2所示的像素读出电路在不同操作阶段的等效电路图;
图8为根据本公开实施例的一种像素读出电路的示意性电路图;并且
图9为根据本公开实施例的一种图像传感器的示意性框图。
具体实施方式
将理解的是,尽管术语第一、第二、第三等等在本文中可以用来描述各种元件或部件,但是这些元件或部件不应当由这些术语限制。这些术语仅用来将一个元件或部件与另一个元件或部件相区分。因此,下面讨论的第一元件或部件可以被称为第二元件或部件而不偏离本公开的教导。
本文中使用的术语仅出于描述特定实施例的目的并且不意图限制本公开。如本文中使用的,单数形式“一个”、“一”和“该”意图也包括复数形式,除非上下文清楚地另有指示。将进一步理解的是,术语“包括”和/或“包含”当在本说明书中使用时指定所述及特征、整体、步骤、操作、元件和/或部件的存在,但不排除一个或多个其他特征、整体、步骤、操作、元件、部件和/或其群组的存在或添加一个或多个其他特征、整体、步骤、操作、元件、部件和/或其群组。如本文中使用的,术语“和/或”包括相关联的列出项目中的一个或多个的任意和全部组合。
将理解的是,当元件或层被称为“在另一个元件或层上”、“连 接到另一个元件或层”或“耦合到另一个元件或层”时,其可以直接在另一个元件或层上、直接连接到另一个元件或层或直接耦合到另一个元件或层,或者可以存在中间元件或层。相反,当元件被称为“直接在另一个元件或层上”、“直接连接到另一个元件或层”或“直接耦合到另一个元件或层”时,没有中间元件或层存在。
除非另有定义,本文中使用的所有术语(包括技术术语和科学术语)具有与本发明所属领域的普通技术人员所通常理解的相同含义。将进一步理解的是,诸如那些在通常使用的字典中定义的之类的术语应当被解释为具有与其在相关领域和/或本说明书上下文中的含义相一致的含义,并且将不在理想化或过于正式的意义上进行解释,除非本文中明确地如此定义。
图1示出了一种典型的像素读出电路100的电路图。如图1所示,像素读出电路100包括对预定波长范围中的入射光(例如X射线)敏感且由Cpix指示的光检测器、放大晶体管M1、复位晶体管M2和传输晶体管M3。光检测器Cpix充当对光生电荷信号进行积分的电容器。被图示为n型场效应管的放大晶体管M1可以工作在饱和区,并且被图示为n型场效应管的复位晶体管M2和传输晶体管M3每一个都可以工作在欧姆区。
在操作中,放大晶体管M1响应于复位信号RST而将光检测器Cpix复位。光检测器Cpix在入射光的照射下生成对Cpix放电的光载流子,导致放大晶体管M1的栅极处的电压水平减小ΔV G。该减小量ΔV G可以指示入射光的强度。放大晶体管M1于是响应于栅极电压的减小量ΔV G而生成饱和电流(本文中也称为像素电流),其中像素电流的变化量相对于ΔV G被放大一因子g m(即,放大晶体管M1的跨导)。因此,对入射光的感测可以通过检测像素电流的变化量来实现。然而,像素电流仍然如此微弱以致于其不得不借助放大器AMP(例如电荷放大器)来被放大以便使得能够实现后续处理电路对该像素电流的检测。
图2示出了根据本公开实施例的一种像素读出电路200的电路图。如图2所示,像素读出电路200包括复位电路210、光检测器(photodetector)220、被示例性地示出为光敏晶体管Td的光敏电路、以及开关电路230。
复位电路210被配置成响应于第一扫描线S1[n]上的信号有效而将 第一节点N1复位处于第一电源电压。具体地,复位电路210在该实施例中被示出为包括第一晶体管T1,其具有连接到第一扫描线S1[n]的栅极、连接到第一信号端V1的第一极、以及连接到第一节点N1的第二极。更具体地,在该实施例中,第一晶体管T1被示出为p型晶体管,并且相应地耦合到第一信号端V1的所述第一电源电压为低电平电压。在p型晶体管的情况下,短语“信号有效”意指该信号具有低电平。
光检测器220被配置成响应于入射光而生成电荷信号并对电荷信号进行积分。具体地,光检测器220在该实施例中被示出为包括连接在第一节点N1和第二信号端V2之间的光敏二极管PD以及与光敏二极管PD并联的电容器Cap。在示例中,第二信号端V2可以被耦合到具有高电平的第二电源电压以允许光敏二极管PD被反向偏置。于是,光敏二极管PD在入射光的照射下生成对电容器Cap充电的反向光电流。因此,第一节点N1处的电压水平增大一小信号电压ΔV G。将理解的是,光敏二极管PD仅仅是示例性的,并且在其他实施例中更可以使用其他光敏元件,例如a-Se光电导体(photoconductor)。
光敏晶体管Td,图示为p型晶体管,被配置成响应于第一节点N1(即,光敏晶体管Td的栅极)处所述电压水平的改变ΔV G而生成像素电流。该像素电流可以计算如下:
Figure PCTCN2018078776-appb-000001
其中W/L为光敏晶体管Td的沟道宽长比,ε为沟道绝缘层的介电常数,μ为沟道载流子迁移率,V TH为光敏晶体管Td的阈值电压,并且V GS为光敏晶体管Td的栅-源电压。在该示例中,光敏晶体管Td的第一极(在该示例中,源极)连接到可以被耦合到具有高电平的第三电源电压的第三信号端V3,并且光敏晶体管Td的第二极(在该示例中,漏极)连接到开关电路230。
像素电流I的改变ΔI相对于栅极电压的改变ΔV G为:
ΔI=g m·ΔV G
其中g m为光敏晶体管Td的跨导,其与光敏晶体管Td的阈值电压V TH成反比。光敏晶体管Td,例如并五苯薄膜晶体管,对可见光具有这样的敏感性以致于其被可见光照射后会遭受阈值电压漂移。该阈值电压漂移进而引起跨导g m的增大,从而提供与其中使用普通晶体管作为Td的情形相比更大的像素电流和ΔI。图3示出了典型的并五苯光敏晶体管的I-V特性曲线图,从中可以看到,在光敏晶体管被100mW/cm 2的白光照射90秒之后,光敏晶体管的阈值电压漂移了高达ΔV T=14V,并且因此对于相同的栅极电压V G而言得到大得多的漏-源电流I DS。换言之,光敏晶体管Td的阈值电压漂移有利地提供了附加的增益,使得直接读出像素电流I而不使用诸如电荷放大器之类的放大器成为可能。
将理解的是,并五苯晶体管仅仅是示例性的,并且在其他实施例中可以使用其他具有类似光敏特性的晶体管作为光敏晶体管Td,比如WSe 2光敏晶体管。而且,在其他实施例中,光敏电路可以采取其他形式。
开关电路230被配置成响应于第二扫描线S2[n]上的信号有效而将像素电流I传输至信号读出线RL[m]。具体地,开关电路230在该实施例中被图示为包括第二晶体管T2,其具有连接到第二扫描线的栅极、连接到光敏晶体管Td的第二极的第一极、以及连接到信号读出线RL[m]的第二极。更具体地,在该实施例中,第二晶体管T2被示出为p型晶体管。如前所述,在p型晶体管的情况下,短语“信号有效”意指该信号具有低电平。
图4示出了用于图2所示的像素读出电路200的时序图。像素读出电路200可以工作在三个阶段。
在复位阶段P1,第一扫描线S1[n]上的第一扫描信号有效,并且第二扫描线S2[n]上的第二扫描信号无效。因此,第一晶体管T1被开启并且第二晶体管T2被关闭。像素读出电路200的等效电路图在图5中示出,其中被关闭的第二晶体管T2利用虚线圆指示。在阶段P1期间,第一节点被复位处于施加到第一信号端V1的第一电源电压(在该示例中,低电平电压)。这使得光电二极管PD处于反向偏置状态。
在积分阶段P2,第一扫描线S1[n]上的第一扫描信号和第二扫描线S2[n]上的第二扫描信号无效。因此,第一和第二晶体管T1和T2被关闭。像素读出电路200的等效电路图在图6中示出,其中被关闭的第 一和第二晶体管T1和T2利用虚线圆指示。在反向偏置状态下,被入射光照射的光敏二极管PD产生光电流并由电容器Cap积分,导致第一节点N1处的电压水平的小的改变。虽然光敏晶体管Td被开启并且工作在饱和区,但是没有像素电流被生成,因为由于被关闭的第二晶体管T2的原因而没有可用的电流流动路径。而且,光敏晶体管Td也被入射光照射并且因此遭受阈值电压漂移,如前面描述的。在X射线检测的情景中,X射线可以借助于闪烁体而被转换成具有例如300-600nm的波长的可见光,光敏二极管PD和光敏晶体管Td对于该可见光是敏感的。
在读出阶段P3,第一扫描线S1[n]上的第一扫描信号无效,并且第二扫描线S2[n]上的第二扫描信号有效。因此,第一晶体管T1被关闭并且第二晶体管T2被开启。像素读出电路200的等效电路图在图7中示出,其中被关闭的第一晶体管T1利用虚线圆指示。在阶段P3期间,光敏晶体管Td生成的像素电流经由第二晶体管T2被传输到信号读出线RL[m],其进而将该像素电流传输到后续处理电路(未示出),例如采样和保持电路,以供拾取。如前所述,光敏晶体管Td的阈值电压漂移可以提供附加的增益,使得该像素电流可以直接由采样和保护电路拾取而无需被电荷放大器放大。
图8示出了图2所示的像素读出电路200的变型800。与图2相比,图8中的相同的参考符号指示相同的元件。如图8所示,第一和第二晶体管T1和T2每个都具有由虚线指示的有源层。像素读出电路800不同于像素读出电路200之处在于,第二晶体管T2也是光敏晶体管。这允许利用相同的材料和工艺来制备光敏晶体管Td和第二晶体管T2,从而简化工艺。然而,由于第二晶体管T2工作在欧姆区作为开关元件,所以其不需要被入射光照射以避免不期望的阈值电压漂移。为此目的,第二晶体管T2被提供有由短实线指示的遮光层。该遮光层可以形成在有源层上以覆盖有源层,从而保护其免受入射光的照射。替换地或附加地,第一晶体管T1也可以是光敏晶体管,并且因此也具有覆盖其有源层的遮光层,如图8所示的。
图9示出了根据本公开实施例的一种图像传感器900的示意性框图。如图9所示,图像传感器900包括多条第一扫描线S11,S12…S1n、多条第二扫描线S21,S22…S2n、多条信号读出线RL1,RL2…RLm、以 及像素阵列910。图像传感器900还可选地包括第一扫描驱动器920、第二扫描驱动器930、多个采样保持电路SH1,SH2…SHm、以及电源940。
像素阵列910包括布置成阵列的多个像素P,其每一个可以采取上面关于图4-8描述的像素读出电路200或800的形式并且在此不再详细描述。
第一扫描驱动器920连接至第一扫描线S11,S12…S1n以向像素阵列910中的各行像素顺序地供应各自的第一扫描信号。
第二扫描驱动器930连接至第二扫描线S21,S22…S2n以向像素阵列910中的各行像素顺序地供应各自的第二扫描信号。
采样保持电路SH1,SH2…SHm分别连接至信号读出线RL1,RL2…RLm以在读出阶段期间对信号读出线RL1,RL2…RLm上的像素电流进行采样。
电源940将第一电源电压(例如,低电平电压)、第二电源电压(例如,高电平电压)和第三电源电压(例如,高电平电压)供应至像素阵列910中的各个像素P。
图像传感器900可以应用于各种图像拾取装置中。将理解的是,在X射线检测的场景中,图像传感器900还可以包括将X射线转换成可见光的闪烁体(未示出)。
还将理解的是,虽然晶体管T1、T2和Td在上面的实施例中被图示和描述为p型晶体管,但是n型晶体管是可能的。在n型晶体管的情况下,用于开启晶体管的有效电压为高电平电压,并且用于关断晶体管的无效电压为低电平电压。这些晶体管典型地被制作为薄膜晶体管使得其第一极和第二极可互换地使用。
虽然在附图和和前面的描述中已经详细地说明和描述了本公开,但是这样的说明和描述应当被认为是说明性的和示意性的,而非限制性的。本公开不限于所公开的实施例。

Claims (20)

  1. 一种像素读出电路,包括:
    复位电路,被配置成响应于第一扫描线上的信号有效而将第一节点复位处于第一电源电压;
    光检测器,被配置成响应于入射光而生成电荷信号并对电荷信号进行积分,经积分的所述电荷信号引起所述第一节点处的电压水平的改变;
    光敏电路,被配置成响应于所述第一节点处所述电压水平的改变而生成像素电流;以及
    开关电路,被配置成响应于第二扫描线上的信号有效而将所述像素电流传输至信号读出线以供读出。
  2. 根据权利要1所述的像素读出电路,其中所述光敏电路包括光敏晶体管,其具有连接到所述第一节点的栅极、连接到第三信号端的第一极、以及连接到所述开关电路的第二极,所述第三信号端用于耦合到第三电源电压。
  3. 根据权利要2所述的像素读出电路,其中所述光敏晶体管为P型晶体管,并且其中所述第一电源电压为低电平电压。
  4. 根据权利要2所述的像素读出电路,其中所述光检测器包括:
    光敏二极管,连接在所述第一节点与第二信号端之间,所述第二信号端用于耦合到第二电源电压;和
    电容器,与所述光敏二极管并联。
  5. 根据权利要求4所述的像素读出电路,其中所述复位电路包括第一晶体管,其具有连接到所述第一扫描线的栅极、连接到第一信号端的第一极、以及连接到所述第一节点的第二极,所述第一信号端用于耦合到所述第一电源电压。
  6. 根据权利要求5所述的像素读出电路,其中所述第一晶体管为光敏晶体管,其具有有源层和覆盖所述有源层以保护所述有源层免受所述入射光的遮光层。
  7. 根据权利要求5或6所述的像素读出电路,其中所述第一晶体管为P型晶体管。
  8. 根据权利要求5所述的像素读出电路,其中所述开关电路包括 第二晶体管,其具有连接到所述第二扫描线的栅极、连接到所述光敏晶体管的第二极的第一极、以及连接到所述信号读出线的第二极。
  9. 根据权利要求8所述的像素读出电路,其中所述第二晶体管为光敏晶体管,其具有有源层和覆盖所述有源层以保护所述有源层免受所述入射光的遮光层。
  10. 根据权利要求8或9所述的像素读出电路,其中所述第二晶体管为P型晶体管。
  11. 一种驱动像素读出电路的方法,所述像素读出电路包括复位电路、光检测器、光敏电路和开关电路,所述方法包括:
    由所述复位电路在复位阶段响应于第一扫描线上的信号有效而将第一节点复位处于第一电源电压;
    由所述光检测器在积分阶段响应于入射光而生成电荷信号并对电荷信号进行积分,其中经积分的所述电荷信号引起所述第一节点处的电压水平的改变;
    由所述光敏电路在读出阶段响应于所述第一节点处所述电压水平的改变而生成像素电流;以及
    由所述开关电路在所述读出阶段响应于第二扫描线上的信号有效而将所述像素电流传输至信号读出线以供读出。
  12. 根据权利要求11所述的方法,其中所述光敏电路包括光敏晶体管,并且其中所述方法还包括:
    通过利用所述入射光在照射所述光检测器的同时照射所述光敏晶体管而使所述光敏晶体管遭受阈值电压漂移。
  13. 一种图像传感器,包括:
    多条第一扫描线,被配置成传输第一扫描信号;
    多条第二扫描线,被配置成传输第二扫描信号;
    多条信号读出线,被配置成传输像素电流以供读出;以及
    像素阵列,包括布置成阵列的多个像素,每个像素包括:
    复位电路,被配置成响应于所述多条第一扫描线中的对应一条上的第一扫描信号有效而将第一节点复位处于第一电源电压;
    光检测器,被配置成响应于入射光而生成电荷信号并对电荷信号进行积分,经积分的所述电荷信号引起所述第一节点处的电压水平的改变;
    光敏电路,被配置成响应于所述第一节点处所述电压水平的改变而生成像素电流;以及
    开关电路,被配置成响应于所述多条第二扫描线中的对应一条上的第二扫描信号有效而将所述光敏晶体管生成的所述像素电流传输至所述多条信号读出线中的对应一条以供读出。
  14. 根据权利要13所述的图像传感器,其中所述光敏电路包括光敏晶体管,其具有连接到所述第一节点的栅极、连接到第三信号端的第一极、以及连接到所述开关电路的第二极,所述第三信号端用于耦合到第三电源电压。
  15. 根据权利要14所述的图像传感器,其中所述光敏晶体管为P型晶体管,并且其中所述第一电源电压为低电平电压。
  16. 根据权利要13所述的图像传感器,其中所述光检测器包括:
    光敏二极管,连接在所述第一节点与第二信号端之间,所述第二信号端用于耦合到第二电源电压;和
    电容器,与所述光敏二极管并联。
  17. 根据权利要求13所述的图像传感器,其中所述复位电路包括第一晶体管,其具有连接到所述对应一条第一扫描线的栅极、连接到第一信号端的第一极、以及连接到所述第一节点的第二极,所述第一信号端用于耦合到所述第一电源电压。
  18. 根据权利要求17所述的图像传感器,其中所述第一晶体管为光敏晶体管,其具有有源层和覆盖所述有源层以保护所述有源层免受所述入射光的遮光层。
  19. 根据权利要求13所述的图像传感器,其中所述开关电路包括第二晶体管,其具有连接到所述对应一条第二扫描线的栅极、连接到所述光敏电路的第一极、以及连接到所述对应一条信号读出线的第二极。
  20. 根据权利要求19所述的图像传感器,其中所述第二晶体管为光敏晶体管,其具有有源层和覆盖所述有源层以保护所述有源层免受所述入射光的遮光层。
PCT/CN2018/078776 2017-06-30 2018-03-13 像素读出电路、驱动其的方法、以及图像传感器 WO2019001013A1 (zh)

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